Circuit board with integrated connecting structure

Abstract

To provide a substrate with a built-in connecting structure.SOLUTION: A substrate with a built-in connecting structure according to the present disclosure includes a printed circuit substrate including a first insulating main body and a plurality of first wiring layers arranged at least one of the outside and the inside of the first insulating main body, and a connecting structure embedded in the first insulating body and including first and second substrates, and the first and second substrates are arranged adjacent to each other.SELECTED DRAWING: Figure 3

Description

Technical Field

[0001] The present disclosure relates to a substrate incorporating a connection structure.

Background Art

[0002] In the fields of artificial intelligence (AI) accelerators or autonomous driving used in servers, networks, electric fields, etc., high-performance semiconductors are used. These are high-performance products with semiconductor input / output terminals (I / O) and a large number of transistors, and due to mounting a large-sized semiconductor, the size of the substrate is large, and a high-density fine circuit is often required. As the overall size of the substrate increases, the price significantly increases due to a decrease in the number of pick-and-place operations and the yield, so an idea to reduce the price of the substrate is demanded.

Summary of the Invention

Problems to be Solved by the Invention

[0003] One of the various objects of the present disclosure is to provide a substrate incorporating a connection structure in which the connection structure is incorporated without a separate adhesive for joining a separate connection structure.

[0004] Another one of the various objects of the present disclosure is to provide a substrate incorporating a connection structure in which a plurality of substrates are arranged side by side and adjacent to each other and incorporated.

[0005] Still another one of the various objects of the present disclosure is to provide a substrate incorporating a connection structure capable of improving electrical characteristics during high-speed signal transmission between die-to-die.

[0006] Still another one of the various objects of the present disclosure is to provide a substrate incorporating a connection structure that connects a plurality of substrates to shorten the signal transmission distance and improve electrical characteristics.

Means for Solving the Problems

[0007] One of the various solutions proposed through this disclosure is to join the connecting structures using a semi-cured or partially cured insulating material within the connecting structure, thereby connecting multiple substrates via connecting vias.

[0008] For example, a substrate with a built-in connecting structure according to one example includes a printed circuit board including a first insulating body and a plurality of first wiring layers arranged on at least one of the exterior and interior of the first insulating body, and a connecting structure embedded in the first insulating body and including first and second substrates, wherein the first and second substrates may be arranged adjacent to each other.

[0009] For example, a substrate with a built-in connecting structure according to another example may include a printed circuit board having a first insulating layer with a cavity, a first wiring layer arranged on one and the other side of the first insulating layer, and a connecting structure including first and second substrates arranged adjacent to each other inside the cavity. [Effects of the Invention]

[0010] One of the various effects of this disclosure is that it is possible to provide a substrate with an integrated connecting structure that incorporates a connecting structure without the need for a separate adhesive for joining the separate connecting structure.

[0011] Another of the various effects of this disclosure is that it is possible to provide a substrate with a built-in connecting structure in which multiple substrates are arranged side by side adjacent to each other.

[0012] Another of the various effects of this disclosure is the provision of a substrate with a built-in coupling structure that can improve electrical characteristics during high-speed signal transmission between die-to-die connections.

[0013] Another of the various effects of this disclosure is that it is possible to provide a substrate with a built-in linking structure that shortens the signal transmission distance by linking multiple substrates and improves electrical characteristics. [Brief explanation of the drawing]

[0014] [Figure 1]It is a block diagram schematically showing an example of an electronic device system. [Figure 2] It is a perspective view schematically showing an example of an electronic device. [Figure 3] It is a cross-sectional view schematically showing an example of a substrate with a built-in connection structure. [Figure 4] It is a process diagram schematically showing an example of the manufacture of a substrate built into the substrate with a built-in connection structure of FIG. 3. [Figure 5] It is a process diagram schematically showing an example of the manufacture of a substrate built into the substrate with a built-in connection structure of FIG. 3. [Figure 6] It is a process diagram schematically showing an example of the manufacture of a substrate built into the substrate with a built-in connection structure of FIG. 3. [Figure 7] It is a process diagram schematically showing an example of the manufacture of a substrate built into the substrate with a built-in connection structure of FIG. 3. [Figure 8] It is a process diagram schematically showing an example of the manufacture of the substrate with a built-in connection structure of FIG. 3. [Figure 9] It is a process diagram schematically showing an example of the manufacture of the substrate with a built-in connection structure of FIG. 3. [Figure 10] It is a process diagram schematically showing an example of the manufacture of the substrate with a built-in connection structure of FIG. 3. [Figure 11] It is a plan view along the line I-I' of the substrate with a built-in connection structure of FIG. 3. [Figure 12] It is a cross-sectional view schematically showing a modified example of the substrate with a built-in connection structure of FIG. 3. [Figure 13] It is a cross-sectional view schematically showing another example of the substrate with a built-in connection structure. [Figure 14] It is a process diagram schematically showing an example of the manufacture of the substrate with a built-in connection structure of FIG. 13. [Figure 15] It is a process diagram schematically showing an example of the manufacture of the substrate with a built-in connection structure of FIG. 13. [Figure 16] It is a process diagram schematically showing an example of the manufacture of the substrate with a built-in connection structure of FIG. 13. [Figure 17] It is a cross-sectional view schematically showing a modified example of the substrate with a built-in connection structure of FIG. 14. [Figure 18]It is a cross-sectional view schematically showing another example of the substrate incorporating the connection structure. [Figure 19] It is a process diagram schematically showing an example of manufacturing the substrate incorporating the connection structure of FIG. 18. [Figure 20] It is a process diagram schematically showing an example of manufacturing the substrate incorporating the connection structure of FIG. 18. [Figure 21] It is a process diagram schematically showing an example of manufacturing the substrate incorporating the connection structure of FIG. 18. [Figure 22] It is a process diagram schematically showing an example of manufacturing the substrate incorporating the connection structure of FIG. 18. [Figure 23] It is a cross-sectional view schematically showing a modified example of the substrate incorporating the connection structure of FIG. 18.

Embodiments for Carrying Out the Invention

[0015] Hereinafter, the present disclosure will be described with reference to the accompanying drawings. In the drawings, the shape, size, etc. of elements may be enlarged or reduced (or emphasized or simplified) for clearer explanation.

[0016] FIG. 1 is a block diagram schematically showing an example of an electronic device system.

[0017] Referring to the drawings, the electronic device 1000 houses a main board 1010. Chip-related components 1020, network-related components 1030, and other components 1040, etc. are physically and / or electrically connected to the main board 1010. These also combine with other electronic components described later to form various signal lines 1090.

[0018] The chip-related components 1020 include memory chips such as volatile memory (e.g., DRAM), non-volatile memory (e.g., ROM), and flash memory; application processor chips such as central processors (e.g., CPUs), graphics processors (e.g., GPUs), digital signal processors, encryption processors, microprocessors, and microcontrollers; and logic chips such as analog-to-digital converters and ASICs (application-specific ICs). However, the chip-related components 1020 are not limited to these, and may include other different forms of chip-related components. Furthermore, these chip-related components may be combined with each other. The chip-related components 1020 may also be in the form of a package containing the aforementioned chips.

[0019] The network-related component 1030 includes, but is not limited to, any other wireless and wired protocols designated as Wi-Fi® (IEEE 802.11 family, etc.), WiMAX® (IEEE 802.16 family, etc.), IEEE 802.20, LTE (long term evolution), Ev-DO, HSPA+, HSDPA+, HSUPA+, EDGE, GSM®, GPS, GPRS, CDMA, TDMA, DECT, Bluetooth®, 3G, 4G, 5G, and later. It may also include any other numerous wireless or wired standards and protocols. Furthermore, the network-related component 1030 may be provided in a package form combined with the chip-related component 1020.

[0020] Other components 1040 include high-frequency inductors, ferrite inductors, power inductors, ferrite beads, LTCCs (Low Temperature Co-Firing Ceramics), EMI (Electro Magnetic Interference) filters, MLCCs (Multi-Layer Ceramic Condensers), etc. However, they are not limited to these, and may also include other passive elements in chip component form used for various other applications. Furthermore, other components 1040 may be provided in package form in combination with chip-related components 1020 and / or network-related components 1030.

[0021] Depending on the type of electronic device 1000, it may include other electronic components that are physically and / or electrically connected to the main board 1010, or that are not connected. Examples of other electronic components include a camera module 1050, an antenna module 1060, a display 1070, and a battery 1080. However, it is not limited to these, and may also include audio codecs, video codecs, power amplifiers, compasses, accelerometers, gyroscopes, speakers, mass storage devices (e.g., hard disk drives), CDs (compact disks), DVDs (digital versatile disks), and so on. Of course, it may also include other electronic components used for various purposes depending on the type of electronic device 1000.

[0022] The electronic device 1000 may be a smartphone, personal digital assistant, digital video camera, digital still camera, network system, computer, monitor, tablet, laptop, netbook, television, video game, smartwatch, or automobile. However, it is not limited to these, and it may be any other electronic device that processes data.

[0023] Figure 2 is a schematic perspective view showing an example of an electronic device.

[0024] Referring to the drawings, the electronic device may be, for example, a smartphone 1100. Inside the smartphone 1100 is a motherboard 1110, to which various electronic components 1120 are physically and / or electrically connected. A camera module 1130 and / or a speaker 1140 are also housed inside. Some of the electronic components 1120 may be the chip-related components mentioned above, and may, for example, be a substrate 1121 with a connected structure on which multiple electronic components are mounted on the surface, but is not limited to this. On the other hand, the electronic device is not necessarily limited to a smartphone 1100, and of course may be other electronic devices as mentioned above.

[0025] Figure 3 is a schematic cross-sectional view showing an example of a substrate containing a connecting structure.

[0026] Referring to the drawings, an example of a connected structure-embedded substrate 700A1 includes a printed circuit board 100 comprising a first insulating body 110 including multiple layers of first insulating layers 111, 112, 113, multiple layers of first wiring layers 121, 122, 123 arranged on or within the first insulating body 110, and multiple layers of first via layers 131, 132 arranged within the first insulating body 110, and a connected structure 200 comprising a second insulating body 210 embedded within the first insulating body 110 and including multiple layers of second insulating layers 211, 212, 215, multiple layers of second wiring layers 221, 222, 223 arranged on or within the second insulating body 210, and multiple layers of second via layers 231, 232 arranged within the second insulating body 210, and first and second substrates 200A, 200B arranged adjacent to each other. In the following description, the first and second substrates 200A and 200B are each microcircuit boards containing microcircuits, and the microcircuit boards can contain circuits of relatively higher density compared to the printed circuit board 100. This will be explained in detail later. On the other hand, the first insulating layers 111, 112, and 113 of the first insulating body 110 and the second insulating layers 211, 212, and 215 of the second insulating body 210 may contain insulating resin, and the lower surface of the second insulating body 210 can be in contact with the first insulating body 110.

[0027] On the other hand, the multiple insulating layers 111, 112, and 113 can each include the first-first insulating layer 111, the first-second insulating layer 112, and the first-third insulating layer 113, and can also include more insulating layers than those currently shown in Figure 3.

[0028] Thus, the example of the interconnected structure-integrated substrate 700A1 has a structure in which the interconnected structure 200 is integrated into the printed circuit board 100. Furthermore, the interconnected structure 200 is joined to the printed circuit board 100 without the need for a separate adhesive, for example, by having the lower surface of the second insulating body 210 of the interconnected structure 200 come into contact with the first insulating body 110.

[0029] In the example of the interconnected structure-integrated substrate 700A1, the printed circuit board 100 may be in the form of a coreless substrate. For example, the printed circuit board 100 may consist of a first-first insulating layer 111, a first-first wiring layer 121 embedded below the first-first insulating layer 111, a first-second wiring layer 122 positioned on the upper surface of the first-first insulating layer 111, a first-first via layer 131 penetrating the first-first insulating layer 111 and connecting the first-first wiring layer 121 and the first-second wiring layer 122, and positioned on the upper surface of the first-first insulating layer 111. The structure may include a first-second insulating layer 112 covering the first-second wiring layer 122, a first-third insulating layer 113 positioned on the upper surface of the first-second insulating layer 112, a first-third wiring layer 123 positioned on the upper surface of the first-third insulating layer 113, and a first-second via layer 132 that penetrates both the first-second insulating layer 112 and the first-third insulating layer 113 and connects the first-second wiring layer 122 and the first-third wiring layer 123.

[0030] Because the printed circuit board 100 has a coreless structure, at least a portion of the first wiring layer 121 embedded beneath the first insulating layer 111 can be exposed to the outside of the printed circuit board 100.

[0031] The coreless printed circuit board 100 described above may be manufactured by a single-sided build-up process, or it may be manufactured by a double-sided build-up process and then separated.

[0032] Furthermore, in one example, the substrate 700A1 containing the connecting structure may be arranged such that the connecting structure 200, which includes the first and second substrates 200A and 200B arranged adjacently at the same level, is in contact with the upper surface of the first-second insulating layer 112 and is covered by the first-third insulating layer 113. Here, "arranged adjacently" means that the first and second substrates 200A and 200B are not arranged in separate areas such as partitioned or separated cavities, but are arranged within the same unpartitioned area. In other words, when the first and second substrates 200A and 200B are arranged adjacently, it is not necessarily required that they be in close contact, and it refers to a structure in which they are arranged in an area not partitioned by insulating material or other cavities, or a structure in which, even if they are partitioned, a shortest path is provided that allows them to be connected in the shortest distance.

[0033] Furthermore, the first and second substrates 200A and 200B may, but are not limited to, be arranged side by side at the same level, as shown in Figure 3. Here, being arranged at the same level does not mean being arranged at exactly the same height horizontally, but rather being arranged in contact with the same surface of the same layer.

[0034] On the other hand, the substrate 700A1 with the connecting structure built-in may include connecting vias 310 that penetrate the first-second and first-third insulating layers 112, 113 and the connecting structure 200, and electrically connect the first-third wiring layer 123, the second wiring layers 221, 222, 223 and the first-second wiring layer 122. It may also include wiring vias 320 that penetrate the first-third insulating layer 113 and connect the first-third wiring layer 123 and the second-first wiring layer 221.

[0035] In the case of the connected structure-embedded substrate 700A1 shown in the example in Figure 3, the printed circuit board 100 does not include a core layer and can be manufactured by a coreless process. The first and second substrates 200A and 200B can be manufactured by the processes shown in Figures 4 to 7, described later, and may be arranged so that the upper surface of the built-up first- and second insulating layers 112 and the organic insulating layers 215 of the first and second substrates 200A and 200B are in contact with each other, and may be arranged side by side at the same level.

[0036] The connecting structure 200 may include first and second substrates 200A and 200B, each having an organic insulating layer 215 positioned at the bottom. In this case, the organic insulating layer 215 positioned on the lower surface of the second insulating body 210 of the connecting structure 200 may be bonded to the first-to-second insulating layer 112 while remaining in a semi-cured or partially cured state, or the connecting structure 200 may be fixed by curing the organic insulating layer 215 through a curing process after the connecting structure 200 is bonded. As a result, in one example, the substrate 700A1 with a built-in connecting structure can fix the connecting structure 200 to the first-to-second insulating layer 112 without the need for a separate adhesive.

[0037] In conventional printed circuit boards with embedded substrates, after forming cavities in the printed circuit board (PCB), the connecting structure is fixed to the stopper metal using adhesive attached to the connecting structure. This ensures that the connecting structure remains fixed and does not move during subsequent processes. However, the adhesive used for joining the connecting structure, such as DAF (Die Attach Film), has a short lifespan and is expensive, making it difficult to manage its lifespan and potentially increasing costs. In the case of the example substrate 700A1 with an embedded connecting structure, the connecting structure 200 can be embedded without a separate adhesive, improving upon the problems of conventional printed circuit boards with embedded micro-circuit boards.

[0038] Furthermore, as a core-less structure within the substrate containing the connecting structure, the example substrate 700A1 with a connecting structure can have a substrate structure that incorporates a substrate with fine circuits even at a thinner thickness. Therefore, it is possible to achieve advantageous effects in miniaturizing and thinning the entire component.

[0039] The organic insulating layers 215 of the first and second substrates 200A and 200B may include an organic insulating material that can be semi-cured or partially cured. For example, the organic insulating layer 215 may include ABF (Ajinomoto Build-up Film), but it is not limited to this and can be used as long as it is an insulating material that can be placed in a semi-cured or partially cured state and then cured to ensure adhesion.

[0040] On the other hand, the connecting structure 200 may include first and second substrates 200A and 200B, and the above description of the connecting structure 200 can be applied similarly to the first and second substrates 200A and 200B, respectively. On the other hand, the connecting structure 200 may include more or fewer microcircuit boards in addition to the first and second substrates 200A and 200B shown in the drawings.

[0041] The first and second substrates 200A and 200B may be arranged at the same level within a substrate 700A1 containing a connected structure, as in one example. Referring to Figure 3, each of the first and second substrates 200A and 200B may be placed on the first and second insulating layers 112 of the printed circuit board 100.

[0042] On the other hand, the example substrate 700A1 with a built-in connecting structure includes a connecting via 310 that penetrates the connecting structure 200. The connecting via 310 is formed to penetrate at least a portion of each of the first and second substrates 200A and 200B, and is connected to a plurality of second wiring layers 221, 222, and 223 to electrically connect the first and second substrates 200A and 200B to each other. In the case of a conventional substrate with a built-in connecting structure, the substrates may be indirectly connected via vias and wiring layers connected to the upper or lower part of the substrate, but in the example substrate 700A1 with a built-in connecting structure, the first and second substrates 200A and 200B are directly electrically connected via the connecting via 310, so that the signal transmission distance can be shortened and signal loss can be effectively prevented.

[0043] The connecting via 310 may have tapers in opposite directions to the second via layers 231 and 232 within the connecting structure 200. For example, as shown in Figure 3, the connecting via 310 may be tapered in the same direction as the first via layers 131 and 132 of the printed circuit board 100, while the second via layers 231 and 232 may have shapes tapered in the opposite direction to the connecting via 310.

[0044] On the other hand, the connecting via 310 can penetrate not only the connecting structure 200 but also at least a portion of the first insulating body 110 of the printed circuit board 100. For example, after the connecting structure 200 is embedded at the same level as the 1-1 insulating layer 111, the connecting via 310 can penetrate the connecting structure 200 while simultaneously penetrating the 1-2 and 1-3 insulating layers 112 and 113.

[0045] After processing and plating the linked via 310, the bottommost of the multiple first wiring layers 121, 122, and 123 of the printed circuit board 100, the first wiring layer 123, may be connected to the linked via 310. The first wiring layer 123 can function as a stopper layer during laser processing of the linked via 310.

[0046] On the other hand, the uppermost of the multiple layers of second wiring layers 221, 222, and 223 of the connecting structure 200, the second wiring layer 221, can be embedded above the uppermost of the multiple layers of second insulating layers 211, 212, and 215, so that its upper surface is exposed. The exposed upper surface of the uppermost second wiring layer 221 of the connecting structure 200 may be covered by the uppermost of the multiple first insulating layers 111, 112, and 113 of the printed circuit board 100, specifically the first to third insulating layers 113. The exposed upper surface of the uppermost second wiring layer 221 of the connecting structure 200 may be electrically connected to the uppermost of the multiple layers of first wiring layers 221, 222, and 223 of the printed circuit board 100 via wiring vias 320. The wiring via 320 can penetrate only the first to third insulating layers 113, which are located on the uppermost side of the multiple layers of first insulating layers 111, 112, and 113 of the printed circuit board 100.

[0047] In the following section, the components of the connected structure-integrated substrate 700A1 will be described in more detail, referring to the attached drawings.

[0048] The printed circuit board 100 may include a first insulating body 110 comprising multiple layers of first insulating layers 111, 112, and 113, multiple layers of first wiring layers 121, 122, and 123, and multiple layers of first via layers 131 and 132. Each of the multiple layers of first wiring layers 121, 122, and 123 may contain a conductor pattern, and the multiple layers of first via layers 131 and 132 can electrically connect the conductor patterns of the aforementioned multiple layers of first wiring layers 121, 122, and 123.

[0049] The multiple first wiring layers 121, 122, and 123 may each include a first-first wiring layer 121, a first-second wiring layer 122, and a first-third wiring layer 123, and the multiple first via layers 131, 132, and 133 may each include a first-first via layer 131 and a first-second via layer 132.

[0050] The materials for the multiple first insulating layers 111, 112, and 113 may each be insulating materials. These insulating materials may include thermosetting resins such as epoxy resin, thermoplastic resins such as polyimide, and resins containing inorganic fillers such as silica and / or reinforcing materials such as glass fibers, such as prepregs and ABF. The number of layers of the multiple first insulating layers 111, 112, and 113 may be more or less than those shown in the drawings.

[0051] The materials used for the multiple layers of first wiring layers 121, 122, and 123 may each be metallic materials, such as copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), or alloys thereof. Each of the multiple layers of first wiring layers 121, 122, and 123 can perform a variety of functions depending on the design. For example, they may include ground patterns, power patterns, signal patterns, etc. These patterns may each have the form of lines, planes, or pads. The multiple layers of first wiring layers 121, 122, and 123 may be formed by plating processes such as AP (Additive Process), SAP (Semi AP), MSAP (Modified SAP), and TT (Tenting), and as a result, each may include a seed layer which is an electroless plating layer and an electroplating layer formed on such a seed layer. A primer copper foil may also be further included as needed. The number of layers in the multi-layered first wiring layers 121, 122, and 123 may be more or less than those shown in the drawing.

[0052] Metallic materials may be used for the multiple layers of the first via layers 131 and 132, and examples of such metallic materials include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), or alloys thereof. The multiple layers of the first via layers 131 and 132 may each include signal connection vias, ground connection vias, power connection vias, etc., depending on the design. The wiring vias of the multiple layers of the first via layers 131, 132, and 133 may each be completely filled with metallic material, or the metallic material may be formed along the walls of the via holes. The multiple layers of the first via layers 131 and 132 may each have a tapered shape. The multiple layers of the first via layers 131 and 132 may be formed by a plating process, such as AP, SAP, MSAP, TT, etc., and as a result may include a seed layer which is an electroless plating layer and an electroplating layer formed on such a seed layer. The number of layers in the multi-layered first via layers 131, 132, and 133 may be more or less than those shown in the drawing.

[0053] The connecting structure 200 includes first and second substrates 200A and 200B. Each of the first and second substrates 200A and 200B includes a second insulating body 210 containing multiple layers of second insulating layers 211, 212, and 215, multiple layers of second wiring layers 221, 222, and 223, and multiple layers of second via layers 231 and 232. Each of the multiple layers of first wiring layers 221, 222, and 223 may contain a conductor pattern, and the multiple layers of second via layers 231 and 232 can electrically connect the conductor patterns. The connecting structure 200 may also be in the form of a coreless substrate.

[0054] An example of the structure before the connecting structure 200 is incorporated into the printed circuit board 100 is as follows: the connecting structure 200 consists of a second-first insulating layer 211, a second-first wiring layer 221 embedded beneath the second-first insulating layer 211, a second-second wiring layer 222 positioned on the upper surface of the second-first insulating layer 211, a second-first via layer 231 penetrating the second-first insulating layer 211 and connecting the second-first wiring layer 221 and the second-second wiring layer 222, and a second -1 The system may include a second-second insulating layer 212 positioned on the upper surface of the insulating layer 211 and covering the second-second wiring layer 222, a second-third wiring layer 223 positioned on the upper surface of the second-second insulating layer 212, a second via layer 232 penetrating the second-second insulating layer 212 and connecting the second-second wiring layer 222 and the second-third wiring layer 223, and an organic insulating layer 215 positioned on the upper surface of the second-second insulating layer 212 and covering the second-third wiring layer 223.

[0055] The above-described connecting structure 200 may be inverted vertically while positioned on the carrier 710 as described later, and then joined to the first to third insulating layers 113 of the precursor printed circuit board 100. Therefore, the connecting structure 200 in the final structure may be inverted vertically compared to the state of the connecting structure 200 before it is incorporated or joined.

[0056] For example, the structure of the connecting structure 200 embedded on the first to third insulating layers 113 of the printed circuit board 100 may include an organic insulating layer 215, second to third wiring layers 223 embedded above the organic insulating layer 215, a second to second insulating layer 212 positioned on the upper surface of the organic insulating layer 215, a second to second wiring layer 222 embedded above the second to second insulating layer 212, a second via layer 232 penetrating the second to second insulating layer 212 and connecting the second to second wiring layer 222 and the second to third wiring layer 223, a second to first insulating layer 211 positioned on the upper surface of the second to second insulating layer 212, a second to first wiring layer 221 embedded above the second to first insulating layer 211 with its upper surface exposed, and a second to first via layer 231 penetrating the second to first insulating layer 211 and connecting the second to first wiring layer 221 and the second to second wiring layer 222.

[0057] On the other hand, after the first and second substrates 200A and 200B are incorporated into the printed circuit board 100, connecting vias 310 may be formed. The connecting vias 310 penetrate the connecting structure 200. Specifically, the connecting vias 310 penetrate at least a portion of each of the first and second substrates 200A and 200B and may be electrically connected to a portion of at least one of the multiple layers of second wiring layers 221, 222, and 223 of each of the first and second substrates 200A and 200B.

[0058] Therefore, the first and second substrates 200A and 200B, which are installed at a predetermined distance apart, may be electrically connected via connecting vias 310, which can achieve the effect of shortening the signal transmission distance compared to connecting them via the wiring layers and vias of the printed circuit board 100.

[0059] On the other hand, in high-performance products, the number of I / Os increases, requiring a substrate with fine circuits, and thus necessitating the use of a larger printed circuit board 100 and a fine circuit board. However, this presents a problem in that the manufacturing cost of the substrate increases due to a decrease in the number of parts per mold and yield when producing the larger fine circuit board. In the case of a substrate 700A1 with a built-in linked structure as an example, by manufacturing the first and second substrates 200A and 200B in smaller sizes and then connecting them inside the printed circuit board 100 via linked vias 310, the same effect as using a larger fine circuit board can be achieved, while also solving the problems of increased productivity and costs in the manufacturing process.

[0060] The aforementioned connecting via 310 can penetrate the connecting structure 200 and simultaneously penetrate the first-second and first-third insulating layers 112 and 113 of the printed circuit board 100. Furthermore, the connecting via 310 may be electrically connected to the first-second and first-third wiring layers 122 and 123 of the printed circuit board 100. In other words, by penetrating at least a portion of the printed circuit board 100 and the connecting structure 200, the connecting via 310 connects the printed circuit board 100 and the connecting structure 200, thereby shortening the signal transmission distance. This is advantageous in preventing signal loss and achieving an increase in signal transmission speed.

[0061] The materials for the multiple second insulating layers 211, 212, and 215 may each be insulating materials. For example, the insulating materials for the second-first insulating layer 211 and the second-second insulating layer 212 may be thermosetting resins such as epoxy resins, thermoplastic resins such as polyimides, and resins containing inorganic fillers such as silica and / or reinforcing materials such as glass fibers, such as prepregs. Alternatively, photosensitive insulating materials such as PID (Photo Imageable Dielectric) may be used, but the invention is not limited to these.

[0062] On the other hand, while ABF can be used as the insulating material for the organic insulating layer 215, it is not limited to ABF and can be used as long as it is an insulating material whose adhesion is ensured by a curing treatment after being placed in a semi-cured or partially cured state. The number of layers of the multiple second insulating layers 211, 212, and 215 may be more or less than those shown in the drawings, and there is no limit to the number of layers. However, even if more or fewer second insulating layers are placed, the insulating layer placed at the bottom of the connecting structure 200 may include ABF as the organic insulating layer.

[0063] The materials used for the multiple layers of the second wiring layers 221, 222, and 223 may each be metallic materials. These metallic materials may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), or alloys thereof. Each of the multiple layers of the second wiring layers 221, 222, and 223 can perform a variety of functions depending on the design. For example, they may include ground patterns, power patterns, signal patterns, etc. These patterns may each have line, plane, or pad forms. The multiple layers of the second wiring layers 221, 222, and 223 may be formed by plating processes such as AP, SAP, MSAP, and TT, resulting in each including a seed layer which is an electroless plating layer and an electroplating layer formed based on such a seed layer. A primer copper foil may also be included as needed. The number of layers of the multiple layers of the second wiring layers 221, 222, and 223 may be more or less than those shown in the drawings.

[0064] Metallic materials may be used for the multiple layers of the second via layers 231 and 232, and examples of such metallic materials include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), or alloys thereof. The multiple layers of the second via layers 231 and 232 may each include signal connection vias, ground connection vias, power connection vias, etc., depending on the design. The wiring vias of the multiple layers of the second via layers 231 and 232 may each be completely filled with metallic material, or the metallic material may be formed along the walls of the via holes. The multiple layers of the second via layers 231 and 232 may each have a tapered shape. The multiple layers of the second via layers 231 and 232 may be formed by a plating process, such as AP, SAP, MSAP, TT, etc., and as a result may include a seed layer which is an electroless plating layer and an electroplating layer formed on such a seed layer. The number of layers in the multi-layered second via layers 231 and 232 may be more or less than that shown in the drawing.

[0065] The connected structure 200, which includes the first and second substrates 200A and 200B, includes second wiring layers 221, 222, and 223, and the second wiring layers 221, 222, and 223 may be composed of microcircuits. By composing the second wiring layers 221, 222, and 223 with microcircuits, the signal transmission characteristics can be improved, and a large number of substrates with microcircuits can be placed on a large substrate, contributing to improved yield and an increase in the number of individual pieces. Furthermore, the signal characteristics can be improved by arranging a large number of microcircuits.

[0066] The meaning of the multiple layers of second wiring layers 221, 222, and 223 of the connected structure 200 having fine circuits will be explained in detail. The multiple layers of second wiring layers 221, 222, and 223 can contain relatively higher density circuits than the multiple layers of first wiring layers 121, 122, and 123 of the printed circuit board 100. Here, high density may mean having a relatively fine pitch and / or a relatively small spacing.

[0067] To give an example of a high-density circuit, the multiple layers of second wiring layers 221, 222, and 223 of the connected structure 200 can have a finer pitch relative to the multiple layers of first wiring layers 121, 122, and 123 of the printed circuit board 100.

[0068] Here, pitch can refer to the distance from the center of any one conductor pattern to the center of another adjacent conductor pattern in each wiring layer arranged on the same layer. Furthermore, in this disclosure, the pitch of the multiple layers of first wiring layers 121, 122, 123 and the multiple layers of second wiring layers 221, 222, 223 does not refer to the pitch of each individual wiring layer, but rather to the average pitch. That is, the meaning that the multiple layers of second wiring layers 221, 222, 223 of the first and second substrates 200A and 200B have a relatively finer pitch than the multiple layers of first wiring layers 121, 122, 123 of the printed circuit board 100 is that the average value of the individual pitches within the multiple layers of second wiring layers 221, 222, 223 may be smaller than the average value of the individual pitches within the multiple layers of first wiring layers 121, 122, 123.

[0069] For example, if the average pitch of at least one of the multiple first wiring layers 221, 222, and 223 of the printed circuit board 100 is defined as the first pitch, and the average pitch of at least one of the multiple second wiring layers 221, 222, and 223 of the connecting structure 200 is defined as the second pitch, then the first pitch may be larger than the second pitch.

[0070] Another example of a high-density circuit is when the average spacing between multiple layers of first wiring layers 221, 222, and 223 of the printed circuit board 100 is defined as the first spacing, and the average spacing between multiple layers of second wiring layers 221, 222, and 223 of the first and second substrates 200A and 200B of the connecting structure 200 is defined as the second spacing, in which case the first spacing may be larger than the second spacing. Here, spacing can refer to the interlayer spacing between each wiring layer in the multiple layers of first wiring layers 221, 222, and 223 and the multiple layers of second wiring layers 221, 222, and 223.

[0071] In the case of the connected structure-embedded substrate 700A1 shown in Figure 3, a coreless structure is disclosed in which the printed circuit board 100 has a structure in which the first-first wiring layer 121 is embedded in the first-first insulating layer 111, and the first and second substrates 200A and 200B are arranged on the upper surface of the first-second insulating layer 112. However, the printed circuit board 100 may have a core layer, and the first and second substrates 200A and 200B may be embedded in the cavity of the core layer. This will be explained in more detail in the connected structure-embedded substrate shown in another example later.

[0072] Since the other contents are essentially the same as those described above, a detailed explanation will be omitted.

[0073] Figures 4 to 7 are schematic process diagrams illustrating an example of the manufacturing process for a substrate embedded in the substrate containing the connected structure shown in Figure 3.

[0074] Referring to Figures 4 to 6, first, a carrier 710 is prepared with a seed layer 711 formed on at least one surface. Next, multiple layers of second insulating layers 211, 212, 215, multiple layers of second wiring layers 221, 222, 223, and multiple layers of second via layers 231, 232, 233 are formed on the seed layer 711 of the carrier 710. The multiple layers of second insulating layers 211, 212, 215 can be formed by coating and curing insulating material or laminating and curing insulating film. The multiple layers of second wiring layers 221, 222, 223 can be formed by a plating process. The multiple layers of second via layers 231, 232, 233 can be formed by a plating process after via hole processing by a photolithography process or the like. This forms a laminate.

[0075] Referring to Figure 7, the laminate is then sawed with the carrier 710 attached to form the first and second substrates 200A and 200B, respectively. Subsequently, the unit-based laminate, i.e., the connected structure 200 including the first and second substrates 200A and 200B, is embedded in the 1-1 insulating layer 111 of the printed circuit board 100.

[0076] The manufacturing process for the linked structure-embedded substrate 700A1, as described below, will be explained in a later example.

[0077] Figures 8 to 10 are schematic process diagrams illustrating an example of the manufacturing process for the substrate containing the linked structure shown in Figure 3.

[0078] Figures 8 to 10 disclose a printed circuit board 100 and its precursor fabricated by a single-sided build-up process. However, it is obvious that, contrary to the figures, the printed circuit board 100 and its precursor may also be fabricated by a double-sided build-up process.

[0079] Referring to Figure 8, a precursor of the printed circuit board 100 is fabricated using a carrier substrate (not shown). The precursor of the printed circuit board 100 includes a first-first insulating layer 111 with a first-first wiring layer 121 embedded beneath it, a first-second wiring layer 122 placed on the first-first insulating layer 111, a first-second insulating layer 112 placed on the first-first insulating layer 111 and covering the first-second wiring layer 122, and a first-first via layer 131 that penetrates the first-first insulating layer 111 and connects the first-second wiring layer 122 and the first-first insulating layer 111.

[0080] The first and second substrates 200A and 200B may be placed on the upper surface of the first-to-second insulating layer 112. The first and second substrates 200A and 200B are placed on the upper surface of the first-to-second insulating layer 112 while remaining on the carrier 710, and then undergo a process in which the carrier 710 and seed layer 711 are removed.

[0081] At this time, the organic insulating layer 215, which is located at the bottom of the first and second substrates 200A and 200B respectively, is positioned to be in contact with the first-to-second insulating layer 112.

[0082] Referring to Figure 9, a first-to-third insulating layer 113 is placed to embed the first and second substrates 200A and 200B. Subsequently, first to third via holes V1, V2, and V3 that penetrate at least a portion of the first-to-third insulating layer 113 may be formed by conventional processing methods such as laser processing. At this time, the first and third via holes V1 and V3 may also be formed in a portion of the first-to-second insulating layer 112.

[0083] During the processing of the first and third via holes V1 and V3, the first-second wiring layer 122 functions as a stopper layer to control the laser processing, and during the processing of the second via hole V2, the second-first wiring layer 221 embedded above the second-first insulating layer 211 of the first and second substrates 200A and 200B functions as a stopper layer to control the laser processing.

[0084] As disclosed in Figure 9, the first and second substrates 200A and 200B are arranged in an inverted state from their state during the manufacturing process so as to be in contact with the first-to-second insulating layer 112, and the second via hole V2 is processed thereafter. Therefore, the connecting via 310 formed by subsequently plating the second via hole V2 can have a shape that is tapered in the opposite direction to the second via layers 231 and 232 of the first and second substrates 200A and 200B.

[0085] Subsequently, the substrate 700A1 containing the linked structure, as shown in Figure 3, may be manufactured by a process of plating the processed first to third via holes V1, V2, and V3 and a patterning process such as photolithography.

[0086] Figure 11 is a plan view of the substrate containing the connecting structure in Figure 3, along the line I-I'.

[0087] Figure 11 discloses a plan view of a connected structure-embedded substrate 700A1 as shown in an example in Figure 3, when viewed along the line I-I'. As shown in Figure 11, the connected structure-embedded substrate 700A1 as an example can include many more microcircuit boards in addition to the first and second substrates 200A and 200B. As an example, Figure 12 illustrates the structure of a connected structure 200 that further includes third and fourth substrates. The third and fourth substrates may also be placed adjacent to each other, similar to the first and second substrates 200A and 200B. In this case, it is not necessary for all of the microcircuit boards to be adjacent to each other; it is sufficient that at least one microcircuit board is placed adjacent to another microcircuit board. Adjacent means, as described above, that they do not necessarily have to be in close contact, but rather are placed in an area not separated by insulating material or other cavities, and are arranged so that they are connected to each other by the shortest distance.

[0088] As can be seen from the plan view in Figure 11, it is obvious that multiple connecting vias 310 may be arranged on the same layer, and each connecting via 310 may be fabricated across two or more substrates. Therefore, the connecting via 310 can have a structure that penetrates at least a portion of each of two or more microcircuit boards. Furthermore, as shown in Figure 12, the connecting via 310 may be electrically connected to the second-first wiring layer 221 on the substrate, and each substrate may be electrically connected via the connecting via 310.

[0089] Figure 12 is a schematic cross-sectional view showing a modified example of the substrate containing the connecting structure shown in Figure 3.

[0090] According to the modified example 700A2 of the substrate with a built-in linking structure shown in Figure 12, a plurality of electronic components 510, 520 may be further arranged on the substrate with a built-in linking structure shown in the example in Figure 3, 700A1. A solder resist 400 having openings that expose at least a portion of the first wiring layers 121, 122, and 123 may be arranged on the outer layer of the printed circuit board 100. In this case, the first wiring layers 121, 122, and 123 exposed through the openings can function as pads for external connections of the printed circuit board 100.

[0091] Referring to the drawings, in the modified example, the substrate 700A2 with a built-in connecting structure has multiple electronic components 510 and 520 arranged on the printed circuit board 100 as surface mounts via bumps 511 and 521 and electrically connecting metal 600. At least some of each of the multiple electronic components 510 and 520 may be electrically connected to one another via the connecting structure 200. The connecting structure 200 and the connecting vias 310 that penetrate the connecting structure 200 can improve the electrical signal transmission characteristics between the multiple electronic components 510 and 520, shorten the signal transmission distance, and prevent signal loss. Each of the multiple electronic components 510 and 520 may be an IC die (Integrated Circuit Die) in which hundreds to millions or more elements are integrated into a single chip. If necessary, the multiple electronic components 510 and 520 may further include chip-type inductors, chip-type capacitors, etc., in addition to IC dies. The bumps 511 and 521 may include metallic materials such as copper (Cu). The electrically connecting metal 600 may include tin (Sn) or tin (Sn)-containing alloys, such as solder.

[0092] Since the other contents are essentially the same as those described above, a detailed explanation will be omitted.

[0093] Figure 13 is a schematic cross-sectional view showing another example of a substrate with a built-in connecting structure.

[0094] In the case of the interconnected structure-embedded substrate 700B1 shown in Figure 13, which is another example, it differs from the interconnected structure-embedded substrate 700A1 of the first example in that the core layer is arranged and the layer in which the interconnected structure 200 is embedded is different. Therefore, in the description of the interconnected structure-embedded substrate 700B1 according to this embodiment, the differences from the interconnected structure-embedded substrate 700A1 of the first example described above will be explained, and the same explanation can be applied to configurations that overlap with the interconnected structure-embedded substrate 700A1 of the first example.

[0095] Referring to Figure 13, in the case of the linked structure-embedded substrate 700B1 according to another example, the printed circuit board 100 can have a core layer, for example, the first-first insulating layer 111 of the printed circuit board 100 can function as a core layer. Therefore, the structure can have one side and the other side of the first-first insulating layer 111, which is the core layer, on which the first-first wiring layer 121 is arranged.

[0096] On the other hand, in the case of the linked structure-embedded substrate 700B1 according to another example, the first-first insulating layer 111 of the printed circuit board 100 functions as a core layer, and the first-first wiring layer 121 may be arranged on one and the other side of the first-first insulating layer 111. The first-first wiring layer 121 and the first-first via layer 131 may be formed by processing both sides of the first-first insulating layer 111. As a result, the first-first via layer 131 formed on the first-first insulating layer 111 can have an hourglass shape. That is, the first-first via layer 131 can have a shape in which the width narrows from one and the other side of the first-first insulating layer 111 towards the center of the first-first insulating layer 111. In addition, the first-second and first-third via layers 132 and 133 can each have a tapered shape in which the width narrows towards the first wiring layer 121. As a result, the first-second and first-third via layers 132 and 133 can have shapes that are tapered in opposite directions to each other.

[0097] On the other hand, the printed circuit board 100 of the substrate 700B1 with a built-in connecting structure according to another example may further include the first-fourth and first-fifth insulating layers 114 and 115, and the connecting structure 200 may be arranged to be in contact with the upper surface of the first-fourth insulating layer 114 and embedded by the first-fifth insulating layer 115.

[0098] On the other hand, the printed circuit board 100 of the substrate 700B1 with a built-in connecting structure according to another example may further include a first-fourth via layer 134 that penetrates the first-fourth and first-fifth insulating layers 114 and 115 collectively. The first-fourth via layer 134 can electrically connect the first-second wiring layer 122 and the first-fourth wiring layer 124 and may have a shape tapered in the same direction as the first-second via layer 132.

[0099] On the other hand, the connecting via 310 penetrates the 1st-4th and 1st-5th insulating layers 114 and 115, and can electrically connect the 1st-4th wiring layer 124 and the 1st-2nd wiring layer 122.

[0100] Furthermore, by having the connecting via 310 penetrate at least a portion of the first and second substrates 200A and 200B, the first-fourth wiring layers 124 and the first-two wiring layers 122 can also be electrically connected to at least a portion of the second wiring layer.

[0101] The substrate 700B1, which incorporates a connecting structure, is similar in structure to the substrate 700A1, which incorporates a connecting structure, in the example described above. The organic insulating layer 215, which is placed on the bottom layer of the connecting structure 200, contains an insulating material such as ABF that is placed in a semi-cured or partially cured state and then cured to ensure adhesion. The organic insulating layer 215 may be placed in a semi-cured or partially cured state so as to be in contact with the upper surface of the first to fourth insulating layers 114. Subsequently, the semi-cured or partially cured organic insulating layer 215 is cured, allowing the connecting structure 200 to be bonded to the first to fourth insulating layers 114.

[0102] Therefore, the substrate 700B1 with a built-in connecting structure according to another example of the present invention does not require a separate adhesive layer, thus achieving cost reduction and productivity improvement. Furthermore, since the process of embedding the substrate using cavity processing is not utilized, the process of forming cavities in the first to fifth insulating layers 115 can be omitted, thereby achieving process simplification.

[0103] Figures 14 to 17 are schematic process diagrams illustrating an example of the manufacturing process for the substrate containing the linked structure shown in Figure 13.

[0104] In the manufacturing process of the linked structure-embedded substrate 700B1 according to another example, the first and second substrates 200A and 200B obtained by the processes shown in Figures 4 to 7 above may be used as is.

[0105] Referring to Figure 14, the first and second substrates 200A and 200B, separated using a semi-cured or partially cured organic insulating layer 215, are bonded to the precursor of the printed circuit board 100, which includes a plurality of first insulating layers 111, 112, 113, 114, a plurality of first wiring layers 121, 122, 123, and a plurality of first via layers 131, 132, 133. Specifically, the first to fourth insulating layers 114 may be placed on the uppermost layer of the precursor of the printed circuit board 100 in Figure 14, and the first and second substrates 200A and 200B may be placed so that the first to fourth insulating layers 114 and the organic insulating layer 215 are in contact.

[0106] Next, referring to Figure 15, the carrier 710 is separated and the seed layer 711 is removed by etching. After that, the connecting structure 200 can be embedded in the first to fifth insulating layers 115.

[0107] Referring to Figure 16, the first to third vias V1, V2, and V3 may be processed thereafter. In this case, the first to second wiring layer 122 can function as a stopper layer during laser processing of the first to third vias V1, V2, and V3. After that, after patterning processes such as plating and photolithography, the organic insulating layer 215 of the connecting structure 200 is cured and fixed through a curing process, thereby manufacturing the connecting structure-embedded substrate 700B1 according to the other example described above.

[0108] On the other hand, in the case of the linked structure-embedded substrate 700B1 according to another example, the first-first insulating layer 111 of the printed circuit board 100 functions as a core layer, and copper-clad laminate may be used in the manufacturing process of the printed circuit board 100. The first-first wiring layer 121 and the first-first via layer 131 may be formed by double-sided processing of the copper-clad laminate, thereby allowing the first-first via layer 131 formed on the first-first insulating layer 111 to have an hourglass shape.

[0109] Since the other contents are essentially the same as those described above, a detailed explanation will be omitted.

[0110] Figure 17 is a schematic cross-sectional view showing a modified example of the substrate containing the connecting structure shown in Figure 14.

[0111] According to the modified example 700B2 of the substrate with a built-in linking structure shown in Figure 17, a plurality of electronic components 510, 520 may be further arranged on the substrate with a built-in linking structure 700B1 according to another example shown in Figure 13. A solder resist 400 having openings that expose at least a portion of the first wiring layers 121, 122, and 123 may be arranged on the outer layer of the printed circuit board 100. In this case, the first wiring layers 121, 122, and 123 exposed through the openings can function as pads for external connections of the printed circuit board 100.

[0112] Referring to the drawings, the modified substrate 700B2 with a built-in connecting structure has multiple electronic components 510 and 520 arranged on the printed circuit board 100 as surface mounts via bumps 511 and 521 and electrically connecting metal 600. At least some of each of the multiple electronic components 510 and 520 may be electrically connected to each other via the connecting structure 200. The connecting structure 200 and the connecting vias 310 that penetrate the connecting structure 200 can improve the electrical signal transmission characteristics between the multiple electronic components 510 and 520, shorten the signal transmission distance, and prevent signal loss. Each of the multiple electronic components 510 and 520 may be an IC die in which hundreds to millions or more elements are integrated into a single chip. If necessary, the multiple electronic components 510 and 520 may further include chip-type inductors, chip-type capacitors, etc., in addition to IC dies. The bumps 511 and 521 may include metallic materials such as copper (Cu). The electrically connecting metal 600 may include tin (Sn) or tin (Sn)-containing alloys, such as solder.

[0113] Since the other contents are essentially the same as those described above, a detailed explanation will be omitted.

[0114] Figure 18 is a schematic cross-sectional view showing another example of a substrate with a built-in connecting structure.

[0115] The substrate 700C1 with a built-in connecting structure, as disclosed in Figure 18, differs from the substrate 700B1 with a built-in connecting structure, as described above, in the configuration of the connecting structure 200, the layer on which the connecting structure 200 is arranged, and the manufacturing method thereof.

[0116] Therefore, in the case of overlapping configurations, the description of the interconnected structure-integrated substrate 700B1 in the other example described above may be applied as is, and the following description will focus on the differences.

[0117] Referring to Figure 18, in the case of the substrate 700C1 with a built-in connecting structure according to another example, the first-first insulating layer 111 may function as a core layer, and the connecting structure 200 may be placed inside a cavity formed in the first-first insulating layer 111.

[0118] In the case of the linked structure-embedded substrate 700C1 according to another example, the first and second substrates 200A and 200B may include a second-third insulating layer 213 instead of the organic insulating layer 215. As shown in Figure 18, the second-third insulating layer 213 of the first and second substrates 200A and 200B may contain the same material as the second-first and second-second insulating layers 211 and 212. This allows for the inclusion of common insulating materials such as epoxy resin, prepreg, and PID, and does not necessarily require the inclusion of ABF material.

[0119] On the other hand, the lower surface of the second insulating body 210 of the connecting structure 200 can be in contact with the upper surface of any one of the multiple first insulating layers 111, 112, and 113 of the first insulating body 110 of the printed circuit board 100. Specifically, the second-third insulating layer 213, which is located at the bottom of the connecting structure 200, may be arranged to be in contact with the first-third insulating layer 113. The boundaries between the first-first insulating layer 111, the first-second insulating layer 112, and the first-third insulating layer 113 described above may be clear or unclear.

[0120] On the other hand, in the linked structure-embedded substrate 700C1 according to another example, the printed circuit board 100 may have a core layer. In this case, of the multiple first insulating layers 111, 112, and 113, the first-first insulating layer 111 arranged internally can function as the core layer of the printed circuit board 100. In this case, as shown in Figure 18, multiple first-first wiring layers 121 may be arranged on one side and the other side of the first-first insulating layer 111 which is the core layer, and the first-first via layer 131 may penetrate the first-first insulating layer 111 and be electrically connected to the first-first wiring layer 121.

[0121] For example, the first via layer 131 that penetrates the core layer, the first-first insulating layer 111, can have an hourglass shape that tapers from one side and the other side of the first-first insulating layer 111 towards the center, and the first-second and first-third via layers 132 and 133 can each have a tapered shape that narrows towards the first wiring layer 121. As a result, the first-second and first-third via layers 132 and 133 can have shapes that are tapered in opposite directions to each other.

[0122] Figures 19 to 22 are schematic process diagrams illustrating an example of the manufacturing process for the substrate containing the linked structure shown in Figure 18.

[0123] As shown in Figure 19, a copper-clad laminate is prepared, including an insulating material 11 and metal layers 12 arranged on one and the other side of the insulating material 11. Then, as shown in Figure 20, cavities C and through holes are formed in the copper-clad laminate 10. Next, a tape is attached to one side of the copper-clad laminate 10 on which the cavities C are formed, and the first and second substrates 200A and 200B, which were fabricated in Figure 7, are attached to the tape.

[0124] Subsequently, a fluid insulating material is filled into the excess space of cavity C, and then the first-second insulating layer 112 is formed by a curing process, after which the tape is removed. After that, the first-third insulating layer 113 is laminated in the area where the tape was removed, completing a structure in which the first and second substrates 200A and 200B are completely embedded within the first insulating layer 111.

[0125] In the case of the interconnected structure-embedded substrate 700C1 according to another example, unlike the interconnected structure-embedded substrates 700A1 and 700B1 according to the first and other examples, the second-third insulating layer 213 is not placed in a semi-cured or partially cured state, but in a fully cured state during the process of placing the first and second substrates 200A and 200B. This is because the first and second substrates 200A and 200B are placed in the cavity C of the first-first insulating layer 111 using tape.

[0126] Figure 21 discloses a structure in which the first and second substrates 200A and 200B described above are completely embedded within the 1-1 insulating layer 111. In this case, the 2-3 insulating layer 213, which is located at the very bottom, can be in contact with the 1-3 insulating layer 113.

[0127] On the other hand, although not shown in the figures, as described above, the second-third insulating layer 213 is not placed in a semi-cured or partially cured state, but in a fully cured state. Therefore, in the case of the substrate 700C1 with a built-in connecting structure according to another example, the first and second substrates 200A and 200B are not inverted, and may be embedded in the cavity C so that the second-third insulating layer 213 is placed on the uppermost side, as in the manufacturing process. In this case, the second-first wiring layer 221 may be embedded below the second-first insulating layer 211, with a portion of it exposed toward the lower surface of the connecting structure 200.

[0128] Therefore, in the case of the first and second substrates 200A and 200B of the interconnected structure-embedded substrate 700C1 according to another example, the multiple second via layers 231 and 232 may each have a tapered shape that narrows in width towards the top, or each may have a tapered shape that narrows in width towards the bottom.

[0129] Furthermore, the first and second substrates 200A and 200B may be arranged in a configuration where they are inverted vertically relative to each other. In this case, for example, the multiple second via layers 231 and 232 of the first substrate 200A may be inverted vertically and have a tapered shape that becomes narrower towards the top, while the multiple second via layers 231 and 232 of the second substrate 200B may not be inverted vertically and may have a tapered shape that becomes narrower towards the bottom.

[0130] Thus, in the case of the interconnected substrate 700C1 according to another example, the degree of freedom in arranging the interconnected structure 200 is higher compared to other embodiments, thereby ensuring design flexibility.

[0131] Referring to Figure 22, a structure is disclosed in which first to third via holes V1, V2, and V3 are processed on the first insulating body 111, 112, and 113. In this case, the first via hole V1 may be processed with the third wiring layer 123 as a stopper layer, the second via hole V2 may be processed with the second-first wiring layer 221 exposed on the upper surface of the connecting structure 200 as a stopper layer, and the third via hole V3 may be processed with the first wiring layer 121 as a stopper layer. Therefore, the present invention does not require a separate stopper layer. Subsequently, the structure of the connecting structure-embedded substrate 700C1 according to another example disclosed in Figure 18 can be completed by patterning processes such as plating and photolithography.

[0132] Figure 23 is a schematic cross-sectional view showing a modified example of the substrate containing the connecting structure shown in Figure 18.

[0133] According to the modified example 700C2 of the substrate with a built-in linking structure shown in Figure 23, a plurality of electronic components 510, 520 may be further arranged on the substrate with a built-in linking structure 700C1 as shown in the example in Figure 18. A solder resist 400 having openings that expose at least a portion of the first wiring layers 121, 122, and 123 may be arranged on the outer layer of the printed circuit board 100. In this case, the first wiring layers 121, 122, and 123 exposed through the openings can function as pads for external connections of the printed circuit board 100.

[0134] Referring to Figure 23, the modified substrate 700C2 with a built-in connecting structure is similar to the substrate 700C1 with a built-in connecting structure according to another example described above, in which multiple electronic components 510 and 520 are surface-mounted on the printed circuit board 100 via bumps 511 and 521 and an electrically connecting metal 600. At least some of each of the multiple electronic components 510 and 520 may be electrically connected to each other via the connecting structure 200 and the printed circuit board. Each of the multiple electronic components 510 and 520 may be an IC (Integrated Circuit) die in which hundreds to millions or more elements are integrated into a single chip. If necessary, the multiple electronic components 510 and 520 may further include chip-shaped inductors, chip-shaped capacitors, etc., in addition to IC dies. The bumps 511 and 521 may include metallic materials such as copper (Cu). The electrically connecting metal 600 may include tin (Sn) or a tin (Sn) alloy, such as solder.

[0135] Since the other contents are essentially the same as those described above, a detailed explanation will be omitted.

[0136] In this disclosure, for convenience, terms such as "side," "side," etc., are used to mean the left / right direction or the surface in that direction relative to the drawing; for convenience, terms such as "up," "top," and "top surface" are used to mean the upward direction or the surface in that direction relative to the drawing; and for convenience, terms such as "down," "bottom," and "bottom surface" are used to mean the downward direction or the surface in that direction. In addition, the terms "side," "up," "top," "bottom," or "bottom" are used to include not only cases where the component in question is in direct contact with the reference component and in that direction, but also cases where it is located in that direction but does not directly contact it. However, this is a definition of direction for explanatory purposes only, and the scope of rights in the claims is not particularly limited by such descriptions of direction, and concepts such as "up" and "down" can change at any time.

[0137] In this disclosure, the term "connected" includes not only cases where components are directly connected, but also cases where components are indirectly connected, such as by an adhesive layer. Furthermore, the term "electrically connected" includes both cases where components are physically connected and cases where they are not connected. The terms "first," "second," etc., are used to distinguish one component from another and do not limit the order and / or importance of those components. In some cases, within the scope of the rights, the first component may be named the second component, and similarly, the second component may be named the first component.

[0138] The expression "example" as used in this disclosure does not mean that each embodiment is identical to another, but is provided to highlight and illustrate other unique features of each. However, the examples presented above do not exclude cases where they are realized in combination with features of other examples. For example, even if a matter described in one example is not described in another example, it should be understood to be a description relating to the other example unless there is a description in the other example that contradicts or is inconsistent with that description.

[0139] The terms used in this disclosure are for illustrative purposes only and are not intended to limit the disclosure. Where otherwise, singular expressions include plural expressions unless the context clearly indicates a different meaning. [Explanation of Symbols]

[0140] 700A1, 700A2, 700B1, 700B2, 700C1, 700C2: Circuit board with built-in interconnected structure 100: Printed circuit board 110: First insulating body 111, 112, 113, 114: First insulating layer 121, 122, 123: 1st wiring layer 131, 132, 133: First via layer 200: Linked structure 200A, 200B: First and second substrates 210: Second insulating body 211, 212, 213: Second insulating layer 215: Organic insulating layer 221, 222, 223: 2nd wiring layer 231, 232: Second via layer 310: Linked via 320: Wiring via 400: Solder Resist 510, 520: Electronic components 511, 521: Bump 600: Electrically connected metal

Claims

1. A printed circuit board having a first insulating body and a plurality of first wiring layers arranged on at least one of the exterior and interior of the first insulating body, A connecting structure having first and second substrates, which is embedded within the first insulating body, Includes connecting vias disposed between the first and second substrates and penetrating the connecting structure, The first and second substrates are arranged adjacent to each other. The first insulating body includes multiple first insulating layers, A substrate with a built-in connecting structure, wherein the connecting via further penetrates one of the multiple layers of the first insulating layer and is connected to at least a portion of the multiple layers of the first wiring layer.

2. The substrate with a built-in connecting structure according to claim 1, wherein the first and second substrates are arranged at the same level.

3. Each of the first and second substrates includes a second insulating body and a plurality of second wiring layers disposed on the outside and inside of the second insulating body. The substrate with a connecting structure according to claim 2, wherein at least a portion of the multiple layers of the second wiring layer is connected to the connecting via.

4. When at least one pitch of the multiple layers of the first wiring layer is designated as the first pitch, and at least one pitch of the multiple layers of the second wiring layer is designated as the second pitch, The substrate with a connecting structure according to claim 3, wherein the first pitch is larger than the second pitch.

5. When the average spacing between the first wiring layers of the multiple layers is defined as the first spacing, and the average spacing between the second wiring layers of the multiple layers is defined as the second spacing, A substrate with a connecting structure according to claim 3 or 4, wherein the first interval is greater than the second interval.

6. The second insulating body includes multiple layers of the second insulating layer, The substrate with a built-in connecting structure according to claim 3, wherein the lower surface of the second insulating layer, which is positioned at the bottom of the multiple layers of second insulating layers, is in contact with the upper surface of any one of the multiple layers of first insulating layers.

7. The substrate with a built-in connecting structure according to claim 6, wherein the lowest of the multiple layers of second insulating layers is ABF (Ajinomoto Build-up Film).

8. The substrate with a built-in connecting structure according to claim 7, wherein the uppermost of the multiple layers of second wiring layers is embedded above the uppermost of the multiple layers of second insulating layers, and its upper surface is exposed.

9. The substrate with a built-in connecting structure according to claim 8, wherein the exposed upper surface of the uppermost of the multiple layers of second wiring is connected to a portion of at least one of the multiple layers of first wiring via a wiring via.

10. The substrate with a built-in connecting structure according to claim 9, wherein at least a portion of the multiple layers of first wiring is arranged on one of the multiple layers of first insulating layers, and on the other side, respectively.

11. The printed circuit board further includes a plurality of first via layers that penetrate at least a portion of the first insulating body and connect the plurality of first wiring layers, Each of the first and second substrates includes a plurality of second via layers that penetrate at least a portion of the second insulating body and electrically connect the plurality of second wiring layers, The substrate with a connecting structure according to any one of claims 3 to 10, wherein the connecting via has a tapered shape in the opposite direction to the second via layer of the plurality of layers.

12. The aforementioned printed circuit board further includes a plurality of electronic components arranged on the printed circuit board, The connecting structure is positioned at the same level as the first insulating layer, which is positioned as the uppermost of the multiple layers of first insulating layers. A substrate with a connecting structure according to any one of claims 9 to 11, wherein at least a portion of each of the plurality of electronic components are electrically connected to one another via the connecting structure.

13. A printed circuit board including a first insulating layer having a cavity, and a first wiring layer disposed on one side and the other side of the first insulating layer, A connecting structure including first and second substrates arranged adjacent to each other inside the cavity, The first insulating layer includes connecting vias that penetrate the first wiring layer and are connected to the first wiring layer, The connecting via is a substrate containing a connecting structure, which penetrates at least a portion of each of the first and second substrates.

14. The first and second substrates each include a plurality of wiring layers, The substrate with a connecting structure according to claim 13, wherein the connecting via is connected to the plurality of wiring layers.

15. The printed circuit board further includes second and third insulating layers that cover one and the other side of the first insulating layer, and second and third wiring layers disposed on the second and third insulating layers, The substrate with a connecting structure according to claim 14, wherein the connecting via further penetrates at least one of the second and third insulating layers and is connected to the second and third wiring layers.

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