Nitride crystals and semiconductor laminates

Abstract

To improve a quality of a nitride crystal.SOLUTION: A nitride crystal has a composition formula of InxAlyGa1-x-yN (where 0≤x≤1, 0≤y≤1, 0≤x+y≤1). A carbon concentration in the crystal is less than 1×1015 cm-3. A concentration of an electron trap E3 existing in an energy range of 0.5 eV or more and 0.65 eV or less from a lower edge of a conduction band in the crystal is less than 1×1014 cm-3.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to nitride crystals, semiconductor laminates, methods for manufacturing nitride crystals, and apparatus for manufacturing nitride crystals. [Background technology]

[0002] When fabricating semiconductor devices such as light-emitting elements and high-speed transistors, crystals of group III nitrides, such as gallium nitride (GaN), are sometimes used (see Patent Documents 1-4). [Prior art documents] [Patent Documents]

[0003] [Patent Document 1] Japanese Patent Publication No. 2016-104693 [Patent Document 2] Japanese Patent Publication No. 2007-153664 [Patent Document 3] Japanese Patent Publication No. 2005-39248 [Patent Document 4] Japanese Patent Publication No. 2020-23427 [Overview of the project] [Problems that the invention aims to solve]

[0004] The objective of this invention is to improve the quality of nitride crystals. [Means for solving the problem]

[0005] According to one aspect of the present invention, In x Al y Ga 1-x-y A crystal represented by the chemical formula of N (where 0≦x≦1, 0≦y≦1, 0≦x+y≦1), The concentration of carbon in the aforementioned crystal is 1 × 10 15 cm -3 It is less than, The concentration of the electron trap E3 existing in the energy range of 0.5 eV or more and 0.65 eV or less from the lower end of the conduction band in the crystal is 1×10 14 cm -3 less, and a nitride crystal is provided.

[0006] According to another aspect of the present invention, In x Al y Ga 1-x-y a crystal represented by the composition formula of N (where 0≦x≦1, 0≦y≦1, 0≦x + y≦1), satisfying formula (1-1) and formula (1-2), [E3]<1×10 14 ···(1-1) [E3]·[C] 2 ≦1×10 43 ···(1-2) However, [C] is the concentration of carbon in the crystal with the unit of cm -3 , [E3] is the concentration of the electron trap E3 existing in the energy range of 0.5 eV or more and 0.65 eV or less from the lower end of the conduction band in the crystal, and the unit of the concentration of E3 is cm -3 . A nitride crystal is provided.

[0007] ​​​​​​​​​​​​​​​​​​​​​​​​​​​

[0008] According to yet another aspect of the present invention, circuit board and Provided on the aforementioned substrate, In x Al y Ga 1-x-y A nitride crystal layer consisting of a crystal represented by the composition formula of N (where 0≦x≦1, 0≦y≦1, 0≦x+y≦1), It has, The nitride crystal layer satisfies equations (1-1) and (1-2), [E3]<1×10 14 ...(1-1) [E3]·[C] 2 ≤ 1 × 10 43 ...(1-2) however, [C] is in units of cm -3 This is the concentration of carbon in the nitride crystal layer, [E3] is the concentration of electron traps E3 located in the crystal in an energy range of 0.5 eV to 0.65 eV from the lower end of the conduction band, and the unit of the concentration of E3 is cm. -3 A semiconductor laminate is provided.

[0009] According to yet another aspect of the present invention, The process of preparing a reaction vessel to house the substrate, In the reaction vessel, the substrate is heated to a predetermined growth temperature, to which a Group III element raw material gas and a nitrogen raw material gas are supplied. x Al y Ga 1-x-y A step of epitaxially growing a nitride crystal represented by the composition formula of N (where 0≦x≦1, 0≦y≦1, 0≦x+y≦1) on the substrate, It has, The step of preparing the reaction vessel is: The step of preparing a container as the reaction vessel, which has a region heated to the growth temperature and a high-temperature reaction region in which the gas supplied to the substrate comes into contact, and at least a portion of the surface of the member constituting the high-temperature reaction region has a protective layer made of an iron cyano complex, A high-temperature bake process is performed to clean and modify the surface of the components constituting the high-temperature reaction region by heating the temperature of the high-temperature reaction region to a temperature of 1500°C or higher, while withholding the supply of the nitrogen raw material gas into the reaction vessel and supplying hydrogen gas and halogen-based gas into the reaction vessel. has A method for producing nitride crystals is provided.

[0010] According to yet another aspect of the present invention, A reaction vessel for housing the substrate, A heating section for heating at least the substrate inside the reaction vessel, A gas supply system that supplies a group III element raw material gas and a nitrogen raw material gas to the substrate in the reaction vessel, The group III element raw material gas and the nitrogen raw material gas are supplied to the substrate heated to a predetermined growth temperature in the reaction vessel. x Al y Ga 1-x-y A control unit controls the heating unit and the gas supply system to epitaxially grow a nitride crystal represented by the composition formula of N (where 0≦x≦1, 0≦y≦1, 0≦x+y≦1) on the substrate, Equipped with, The reaction vessel has a high-temperature reaction region that is heated to the growth temperature and comes into contact with the gas supplied to the substrate, At least a portion of the surface of the member constituting the high-temperature reaction region has a protective layer made of an iron cyano complex, The control unit, prior to the epitaxial growth of the nitride crystals, performs a high-temperature bake treatment to clean and modify the surface of the components constituting the high-temperature reaction region by heating the temperature of the high-temperature reaction region to 1500°C or higher, withholding the supply of the nitrogen raw material gas into the reaction vessel, and supplying hydrogen gas and halogen-based gas into the reaction vessel. A nitride crystal manufacturing apparatus is provided. [Effects of the Invention]

[0011] According to the present invention, it is possible to improve the quality of nitride crystals. [Brief explanation of the drawing]

[0012] [Figure 1] (a) is a schematic plan view of the nitride crystal substrate 10, and (b) is a schematic side view of the nitride crystal substrate 10. [Figure 2] This figure shows an example of a measurement using isothermal volumetric transient spectroscopy. [Figure 3] This figure shows the results of measuring the electron trap concentration in the GaN crystal of the first embodiment of the present invention and the GaN crystal of reference 4, respectively, by isothermal capacitive transient spectroscopy. [Figure 4] This is a schematic diagram of the HVPE apparatus 200, showing the crystal growth step being performed inside the reaction vessel 203. [Figure 5] This is a schematic diagram of the HVPE apparatus 200, showing the reactor port 221 of the reaction vessel 203 in an open state. [Figure 6] (a) is a diagram showing how a crystalline film 21 is grown thickly on a seed crystal substrate 20, and (b) is a diagram showing how multiple substrates 10 are obtained by slicing the thickly grown crystalline film 21. [Figure 7] This is a schematic cross-sectional view showing a semiconductor laminate according to a fourth embodiment of the present invention. [Figure 8] This figure shows the relationship between the electron trap E3 concentration and the carbon concentration. [Modes for carrying out the invention]

[0013] <Insights gained by the inventor> The presence of impurities other than shallow donors such as silicon (Si), germanium (Ge), and oxygen (O) in nitride crystals can degrade device characteristics. Specifically, this can lead to decreased carrier mobility, increased diode resistance and reduced breakdown voltage, and decreased luminous efficiency. Therefore, it is desirable to keep the concentration of unintended impurities in nitride crystals as low as possible.

[0014] As described in Reference 4 regarding the concentration of the impurities, the present inventors have used a novel manufacturing method to reduce the concentrations of all elements in the nitride crystal, such as boron (B), O, and carbon (C), to 1 × 10⁻⁶. 15 cm -3 We succeeded in making it less than [amount].

[0015] However, when the electron trap concentration in the nitride crystal described in Reference 4 was measured by isothermal capacitance transient spectroscopy (ICTS), electron trap E3 remained at a position of approximately 0.6 eV from the conduction band, and the concentration of this E3 was 1 × 10⁻⁶. 14 cm -3 It was revealed to be super.

[0016] Recent papers (such as Narita 2020, shown in Figure 8 below) report that the origin of E3 is iron (Fe) in the nitride crystal. According to the paper, it is thought that by measuring the E3 concentration in the nitride crystal using the ICTS method, it may be possible to indirectly estimate the Fe concentration in the nitride crystal.

[0017] As described in reference 4 above, the Fe concentration in the nitride crystals grown using the new manufacturing method was below the lower limit of secondary ion mass spectrometry (SIMS).

[0018] However, as mentioned above, the E3 concentration in the nitride crystal of reference 4 measured by the ICTS method was 1 × 10⁻⁶. 14 cm -3 Since it was above the limit, we indirectly estimated the Fe concentration in the nitride crystal based on this, and found that the nitride crystal in reference 4 contained a Fe concentration slightly below the lower limit of the above SIMS (2 × 10⁻¹⁰). 14 cm -3 ~7×10 14 cm -3 It was revealed that a certain amount of Fe was present.

[0019] According to reports on the E3 concentration in nitride crystals obtained by conventional metal-organic vapor deposition (MOCVD) or hydride vapor deposition (HVPE) methods (Tanaka 2016, shown in Figure 8 below), there is a trade-off relationship between E3 concentration and C concentration. As mentioned above, since the origin of E3 is considered to be Fe, this corresponds to a trade-off relationship between Fe concentration and C concentration.

[0020] In other words, in conventional MOCVD or HVPE methods, a predetermined amount of Fe and C is present in the crystal growth environment. If conditions are selected that facilitate the incorporation of C into the nitride crystal, the incorporation of Fe is suppressed. On the other hand, if conditions are selected that make it difficult for C to be incorporated into the nitride crystal, the incorporation of Fe is promoted.

[0021] Specifically, for example, if the C concentration is 5 × 10 16 cm -3 If we consider it to be approximately, the Fe concentration is 1 × 10⁻⁶. 11 cm -3 It can be reduced to a similar level. On the other hand, the C concentration can be reduced to 1 × 10⁻⁶. 15 cm -3 When reduced to this extent, the Fe concentration becomes 1 × 10⁻⁶ 15 cm -3 It could potentially increase to that extent.

[0022] Therefore, nitride crystals with extremely low C and Fe concentrations have never been realized before. Specifically, for example, a C concentration of 1 × 10⁻⁶ 15 cm -3 It is less than and the Fe concentration is 1 × 10 14 cm -3 Nitride crystals with a molecular weight less than 50% could not be produced even using the novel manufacturing method described in reference 4 above.

[0023] In light of the above new findings, the inventors diligently conducted studies to further reduce the impurity concentration.

[0024] In the MOCVD or HVPE methods, stainless steel components can be considered as sources of Fe. However, stainless steel chambers in the MOCVD method are usually sufficiently water-cooled. In the HVPE method, for example, an opaque quartz gas supply pipe is used in the middle of a quartz gas supply pipe. This suppresses heating of the stainless steel flange due to thermal radiation. By implementing such measures, excessive heating of stainless steel components can be suppressed, and the generation of Fe from those components can be reduced.

[0025] On the other hand, carbon components are sometimes used in the high-temperature reaction region of MOCVD or HVPE apparatuses. These carbon components are made of high-purity carbon, but inevitably contain Fe at a concentration of 0.06 ppm or less. For this reason, as described in Reference 4, the inventors have provided a heat-resistant protective layer (coating layer), for example, made of silicon carbide (SiC), on the outer circumference of the carbon component.

[0026] However, under the growth temperatures and atmospheric conditions of the nitride crystals and the source gases, SiC could become brittle. This could lead to cracking or porosity in the protective layer. Consequently, there was a possibility that impurities such as Fe could leak from the carbon component into the growth atmosphere through the protective layer.

[0027] Therefore, the inventors investigated coating the surface of carbon components and other elements in the high-temperature reaction region with a protective layer made of an iron cyano complex (chemical formula: Fe4[Fe(CN)6]3) instead of SiC. As a result, they found that it was possible to suppress the leakage of Fe from each component in the high-temperature reaction region into the growth atmosphere, and to dramatically reduce the inclusion of Fe in the nitride crystal. Furthermore, they found that by combining this with a manufacturing method having a high-temperature bake step developed by the inventors, it is possible to obtain nitride crystals with extremely low C and Fe concentrations.

[0028] The following embodiments are based on the above findings discovered by the inventors.

[0029] <First Embodiment of the Invention> Hereinafter, a first embodiment of the present invention will be described with reference to the drawings.

[0030] (1) Nitride crystal substrate The nitride crystal substrate 10 according to this embodiment will be described using Figure 1. Figure 1(a) is a schematic plan view of the nitride crystal substrate 10, and (b) is a schematic side view of the nitride crystal substrate 10.

[0031] As shown in Figures 1(a) and (b), the nitride crystal substrate 10 of this embodiment (hereinafter also referred to as substrate 10) is configured as a disc-shaped substrate used when manufacturing the semiconductor laminate 1 or semiconductor device described later. The substrate 10 is made of a single crystal of a group III nitride semiconductor, and in this embodiment, for example, it is made of a single crystal of gallium nitride (GaN).

[0032] The plane orientation of the main surface (top surface) of the substrate 10 is, for example, the (0001) plane (+c plane, Ga polarity plane). The GaN crystals constituting the substrate 10 may have a predetermined off-angle with respect to the main surface of the substrate 10. The off-angle is the angle between the normal direction of the main surface of the substrate 10 and the principal axis (c-axis) of the GaN crystals constituting the substrate 10. Specifically, the off-angle of the substrate 10 is, for example, 0° or more and 1.2° or less.

[0033] The main surface of the substrate 10 is the epiready surface, and the root mean square roughness (RMS) of the main surface of the substrate 10 is, for example, 10 nm or less, preferably 1 nm or less. Here, "RMS" refers to the RMS obtained by measuring a 20 μm square area with an atomic force microscope (AFM).

[0034] Furthermore, the diameter D of the substrate 10 is not particularly limited, but is, for example, 25 mm or more. If the diameter D of the substrate 10 is less than 25 mm, the productivity of the semiconductor device tends to decrease. For this reason, it is preferable that the diameter D of the substrate 10 be 25 mm or more. Also, the thickness T of the substrate 10 is, for example, 150 μm or more and 2 mm or less. If the thickness T of the substrate 10 is less than 150 μm, the mechanical strength of the substrate 10 decreases, and it may become difficult to maintain a self-supporting state. For this reason, it is preferable that the thickness T of the substrate 10 be 150 μm or more. Here, for example, the diameter D of the substrate 10 is 2 inches (50.8 mm), and the thickness T of the substrate 10 is 400 μm.

[0035] [Impurity concentration] In this embodiment, as will be described later, a container having a protective layer made of an iron cyano complex in the high-temperature reaction region is used as the reaction vessel, and a high-temperature bake step is performed to manufacture the substrate 10, so that the concentration of each impurity in the GaN crystal constituting the substrate 10 is below the detection limit (lower limit) of SIMS.

[0036] Specifically, the carbon concentration in the crystal measured by SIMS using the highly sensitive raster transformation method was, for example, 1 × 10⁻⁶. 15 cm -3 It is less than.

[0037] The "raster change method" is a technique that, during SIMS depth profile analysis, involves changing the area of ​​the raster scan to distinguish between elements contained in the sample and the background level originating from the SIMS instrument, thereby accurately determining the net concentration of elements in the sample.

[0038] Furthermore, the O concentration in the crystal measured by SIMS using the raster transformation method is, for example, 1 × 10⁻⁶. 15 cm -3 It is less than.

[0039] Furthermore, the B concentration in the crystal, as measured by SIMS depth profile analysis, is, for example, 1 × 10⁻⁶. 15 cm -3 It is less than.

[0040] Furthermore, in this embodiment, since Si is not doped as an n-type impurity in the crystal, the Si concentration in the crystal measured by SIMS depth profile analysis is, for example, 1 × 10⁻⁶ 15 cm -3 It is less than.

[0041] Furthermore, in this embodiment, the Fe concentration in the crystal is below the lower limit of the SIMS depth profile analysis, similar to the case described in reference 4. However, in the crystal of this embodiment, the Fe concentration estimated from the electron trap E3 concentration is lower than that in reference 4. This point will be explained in detail later.

[0042] Furthermore, the crystals of this embodiment were grown by the HVPE method, as described later, and not by the flux method, which uses alkali metals such as sodium (Na) or lithium (Li) as flux. Therefore, the crystals of this embodiment do not substantially contain alkali metal elements such as Na or Li.

[0043] Furthermore, none of the following elements were detected in the crystal of this embodiment: arsenic (As), chlorine (Cl), phosphorus (P), fluorine (F), sodium (Na), lithium (Li), potassium (K), tin (Sn), titanium (Ti), manganese (Mn), chromium (Cr), molybdenum (Mo), tungsten (W), and nickel (Ni).

[0044] In other words, the concentrations of these impurities in the crystal are below the lower limit of SIMS. The current detection limits for each element in SIMS are as follows:

[0045] As: 5 × 10 12 cm -3 , Cl: 1 × 10 14 cm -3 , P: 2×10 15 cm -3 , F:4×10 13 cm -3、 Na: 5×10 11 cm -3 、 Li: 5×10 11 cm -3 、 K: 2×10 12 cm -3 、 Sn: 1×10 13 cm -3 、 Ti: 1×10 12 cm -3 、 Mn: 5×10 12 cm -3 、 Cr: 7×10 13 cm -3 、 Mo: 1×10 15 cm -3 、 W: 3×10 16 cm -3 、 Ni: 1×10 14 cm -3

[0046] [Electron trap concentration] In this embodiment, as will be described later, a container having a protective layer made of an iron cyanide complex is used as a reaction vessel, and a high-temperature baking step is performed to manufacture the substrate 10, whereby the electron trap concentration in the crystal is reduced.

[0047] Here, using FIG. 2, the ICTS method as a method for measuring an electron trap will be described. FIG. 2 is a diagram showing a measurement example of isothermal capacitance transient spectroscopy.

[0048] In the measurement by the ICTS method, first, an ohmic electrode is provided on the back side of the sample, and a Schottky electrode is provided on the front side of the sample. Specifically, for example, titanium (Ti) / aluminum (Al) is used as the ohmic electrode on the back side of the substrate 10 made of a GaN crystal, and nickel (Ni) / gold (Au) is used as the Schottky electrode on the front side.

[0049] Once the preparation of the sample is completed, as shown in a of FIG. 2, a reverse bias (bias voltage V b ) is applied in the Schottky junction between the substrate 10 and the Schottky electrode.

[0050] Next, as shown in b of FIG. 2, a forward pulse (filling pulse) is superimposed on the Schottky junction. At this time, electrons are trapped in the electron traps in the GaN crystal constituting the substrate 10.

[0051] Next, as shown in c of FIG. 2, the Schottky junction is returned to the state where a reverse bias is applied again. The time t when returning to the reverse bias is set to 0, and the change in the junction capacitance C(t) from t = 0 is measured by a high-speed transient capacitance meter.

[0052] When returning to the reverse bias (t = 0), the electrons trapped in the trap levels above the Fermi level are released into the conduction band. Along with the release of electrons after t = 0, the depletion layer width gradually decreases and the junction capacitance C(t) increases.

[0053] [[ID=1"]] The ICTS spectrum S(t) with respect to the time change of the junction capacitance C(t) as described above is defined by the following equation (i).

[0054]

Equation

[0055] The ICTS spectrum S(t) has a peak at the time t = τ e corresponding to the thermal emission time constant (τ e ) of the electron trap level.

[0056] Here, if the crystal contains a plurality of electron trap levels and the thermal emission time constant of the i-th level is τ e i then S(t) is represented by the following equation (ii).

[0057]

Equation

[0058] However, q is the elementary charge of an electron, and ε r ε0 is the relative permittivity of the crystal, ε0 is the permittivity of vacuum, and V d V is the diffusion potential, b is the bias voltage, A is the junction cross-sectional area, and N T i This represents the concentration (density) of the i-th trap level.

[0059] Each τ e i If the intervals are sufficiently discrete, then S(t) is given by each interval t = τ e i It has a peak. Therefore, based on the position of each peak in the ICTS spectrum S(t), the thermal emission time constant τ of each electron trap level is e i This is how we find t=τ. e i By substituting this into equation (ii), the concentration N of the electron trap can be obtained from the intensity of each peak in the ICTS spectrum S(t). T i This is required.

[0060] Furthermore, the thermal emission time constant τ of each electron trap level e i From this, based on the following equation (iii), the activation energy ΔE of that level is obtained. i It is possible to find this.

[0061]

number

[0062] However, N c σ is the effective density of states in the conduction band. n i ν is the capture cross-section of the i-th electron trap. th θ is the thermal velocity of electrons, g is the degeneracy of the trap, k is the Boltzmann constant, and T is the absolute temperature.

[0063] Here, the electron traps in the GaN crystal of this embodiment will be explained using Figure 3. Figure 3 shows the results of measuring the electron trap concentrations in the GaN crystal of this embodiment (Si trace doped sample A4' described later) and the GaN crystal of Reference 4 (Si trace doped sample B7' described later) by isothermal capacitance transient spectroscopy.

[0064] As shown in Figure 3, the ICTS spectrum S(t) of a GaN crystal measured by ICTS has multiple peaks corresponding to different energy levels. Of these, electron traps located in the energy range of 0.5 eV to 0.65 eV from the lower edge of the conduction band are called "E3", electron traps located in the energy range of 0.15 eV to 0.3 eV from the lower edge of the conduction band are called "E1", and electron traps located in the energy range of 0.68 eV to 0.75 eV from the lower edge of the conduction band are called "Ex".

[0065] The measurement temperature using the ICTS method is set based on the energy position of each electron trap, for example, within a range of 80K to 350K. In Figure 3, the measurement temperature when measuring electron traps E3 and Ex is set to room temperature (300K). On the other hand, the temperature when measuring electron trap E1, which is at an energy position close to the conduction band, is set, for example, between 100K and 150K.

[0066] In the GaN crystal described in reference 4, the concentration of electron traps E3 is 1 × 10⁻⁶. 14 cm -3 (For example, approximately 3 x 10) 14 cm -3 (approximately) As mentioned above, since the origin of E3 is considered to be Fe, the Fe concentration in the GaN crystal described in reference 4 was 1 × 10⁻⁶. 14 cm -3 This corresponds to the above.

[0067] Furthermore, in the GaN crystal described in reference 4, the concentration of electron trap E1 is 3 × 10⁻⁶. 12 cm -3 It was incredible.

[0068] Furthermore, in the GaN crystal described in reference 4, the concentration of electron trap Ex is 3 × 10⁻⁶. 13 cm -3 It was incredible.

[0069] In contrast, in the GaN crystal of this embodiment, the concentration of electron traps E3 is, for example, 1 × 10⁻⁶ 14 cm -3 It is less than 1 × 10⁻¹⁰. Estimating the Fe concentration in the GaN crystal indirectly as described above, the Fe concentration in the GaN crystal of this embodiment is 1 × 10⁻¹⁰. 14 cm -3 This is equivalent to being less than.

[0070] Furthermore, in the GaN crystal of this embodiment, the concentration of electron traps E1 is, for example, 3 × 10⁻⁶ 12 cm -3 The following applies:

[0071] Furthermore, in the GaN crystal of this embodiment, the concentration of electron traps Ex is, for example, 3 × 10 13 cm -3 The following applies:

[0072] Furthermore, in the GaN crystal of this embodiment, no electron traps other than E1, E3, and Ex existed within the temperature range in which ICTS measurements were performed, i.e., the temperature range of 80K to 350K. Therefore, the total concentration of electron traps in the energy range of 0.1eV to 1.0eV from the lower end of the conduction band is 1 × 10⁻⁶ 14 cm -3 It can be said that it is less than [a certain value].

[0073] [Relationship between C concentration and E3 concentration] In this embodiment, as will be described later, by using a container having a protective layer made of an iron cyano complex in the high-temperature reaction region as the reaction vessel, and by performing a high-temperature bake step to manufacture the substrate 10, both the C concentration and E3 concentration in the crystal, which are in a trade-off relationship as described above, are reduced. As a result, the GaN crystal of this embodiment also satisfies the following requirements.

[0074] In other words, the GaN crystal of this embodiment satisfies, for example, the following equations (1-1) and (1-2). [E3]<1×10 14 ...(1-1) [E3]·[C] 2 ≤ 1 × 10 43 ...(1-2) however, [C] is in units of cm -3 This is the concentration of carbon in the crystal. [E3] is the concentration of electron trap E3 in the crystal, and the unit of the concentration of E3 is cm -3 That is the case.

[0075] Furthermore, the GaN crystal of this embodiment preferably satisfies, for example, the following formula (2). [E3]·[C] 2 ≤ 1 × 10 42 ...(2)

[0076] [Insulating properties] In this embodiment, as described above, the concentration of conductive (n-type impurities) in the crystal is extremely low. Therefore, even if the concentrations of C and Fe, which form deep energy levels in the crystal, are low, the substrate 10 is configured as a semi-insulating substrate.

[0077] Specifically, the resistivity of the GaN crystal constituting the substrate 10 of this embodiment is, for example, 1 × 10⁻¹⁰ under temperature conditions of 20°C to 300°C. 6 The coefficient of gravity is greater than Ωcm, and under temperature conditions between 300°C and 400°C, 1 × 10⁻¹⁰ 5 It is greater than Ωcm.

[0078] The upper limit of the resistivity of GaN crystals is not particularly limited, but for example, 1 × 10 10 It is approximately Ωcm.

[0079] (2) Method for manufacturing GaN substrate The manufacturing method of the substrate 10 in this embodiment will be described in detail below.

[0080] First, the configuration of the HVPE apparatus 200 used for growing GaN crystals will be explained in detail with reference to Figure 4. The HVPE apparatus 200 includes, for example, a reaction vessel 203 configured in a cylindrical shape. The reaction vessel 203 has a sealed structure to prevent outside air and gas from the glove box 220 (described later) from entering the interior. Inside the reaction vessel 203, a reaction chamber 201 is formed where crystal growth takes place. Inside the reaction chamber 201, a susceptor 208 is provided to hold a seed crystal substrate 20 made of a GaN single crystal. The susceptor 208 is connected to a rotating shaft 215 of a rotating mechanism 216 and is configured to be rotatable. The susceptor 208 also contains an internal heater 210 as a heating element. The temperature of the internal heater 210 is configured to be controllable separately from the zone heater 207 (described later). Furthermore, the upstream side and surrounding area of ​​the susceptor 208 are covered by a heat shield wall 211. The presence of the heat shield wall 211 prevents gases other than those supplied from the nozzles 249a to 249c (described later) from being supplied to the seed crystal substrate 20.

[0081] The reaction vessel 203 is connected to the glove box 220 via a cylindrical metal flange 219 made of SUS or the like. The glove box 220 is also airtight to prevent air from entering its interior. An exchange chamber 202 located inside the glove box 220 is continuously purged with high-purity nitrogen (hereinafter also simply referred to as N2 gas) to maintain low oxygen and moisture concentrations. The glove box 220 comprises a transparent acrylic wall, several rubber gloves connected to holes penetrating the wall, and a pass box for moving items in and out of the glove box 220. The pass box is equipped with a vacuum mechanism and an N2 purging mechanism, and is configured to allow items to be moved in and out of the glove box 220 without drawing oxygen-containing air into the glove box 220 by replacing the air inside with N2 gas. When inserting or removing the crystal substrate from the reaction vessel 203, the opening of the metal flange 219, i.e., the furnace opening 221, is opened, as shown in Figure 5. This prevents the surfaces of the components inside the reaction vessel 203, which have been cleaned and modified by the high-temperature bake step described later, from becoming contaminated again, and prevents air and gases containing the various impurities mentioned above from adhering to the surfaces of these components. The impurities referred to here include at least one of the following: O2 and moisture (H2O) from the air; organic matter containing C, O, hydrogen (H), Na, K, etc. from the human body, etc.; As, Cl, P, F, etc. from gases used in the crystal growth process and device manufacturing process, etc.; and Fe, Sn, Ti, Mn, Cr, Mo, W, Ni, etc. from metal components inside the furnace.

[0082] One end of the reaction vessel 203 is connected to a gas supply pipe 232a for supplying HCl gas to the gas generator 233a (described later), a gas supply pipe 232b for supplying ammonia (NH3) gas to the reaction chamber 201, a gas supply pipe 232c for supplying HCl gas for high-temperature baking and normal baking to the reaction chamber 201, and a gas supply pipe 232d for supplying nitrogen (N2) gas to the reaction chamber 201. Note that gas supply pipes 232a to 232c are also configured to supply hydrogen (H2) gas and N2 gas as carrier gases, in addition to HCl gas and NH3 gas. Each gas supply pipe 232a to 232c is equipped with a flow controller and a valve (not shown), allowing for individual control of the flow rate and start / stop of supply for each type of gas. Gas supply pipe 232d is also equipped with a flow controller and a valve (not shown). The N2 gas supplied from the gas supply pipe 232d is used to maintain the cleanliness of the atmosphere in the reaction chamber 201 by purging the upstream side and surrounding area of ​​the heat shield wall 211.

[0083] The HCl gas supplied from gas supply pipe 232c and the H2 gas supplied from gas supply pipes 232a to 232c act as cleaning gases to purify the surfaces of components inside the reaction chamber 201 (especially inside the heat shield wall 211) and as modifying gases to transform these surfaces into surfaces with a low probability of releasing impurities, during the high-temperature bake step and normal bake step described later. The N2 gas supplied from gas supply pipes 232a to 232c acts to appropriately adjust the flow rate of the HCl gas and H2 gas ejected from the tips of nozzles 249a to 249c so that desired areas inside the reaction chamber 201 (especially inside the heat shield wall 211) are properly cleaned during each bake step.

[0084] The HCl gas introduced from gas supply pipe 232a acts as a reaction gas in the crystal growth step described later, reacting with the Ga raw material to produce GaCl gas, a halide of Ga, i.e., the Ga raw material gas. The Ga raw material gas is also called the "Group III element raw material gas." The NH3 gas supplied from gas supply pipe 232b acts as a nitride agent in the crystal growth step described later, reacting with the GaCl gas to grow GaN, a nitride of Ga, on the seed crystal substrate 20, i.e., the N raw material gas. Hereafter, GaCl gas and NH3 gas may be collectively referred to as raw material gases. The H2 gas and N2 gas supplied from gas supply pipes 232a to 232c act in the crystal growth step described later to appropriately adjust the flow rate of the raw material gas ejected from the tips of nozzles 249a to 249c, directing the raw material gas toward the seed crystal substrate 20.

[0085] Downstream of the gas supply pipe 232a, as described above, a gas generator 233a is provided to contain melted Ga as a Ga raw material. The gas generator 233a is equipped with a nozzle 249a that supplies GaCl gas, produced by the reaction of HCl gas and melted Ga, toward the main surface of the seed crystal substrate 20 held on the susceptor 208. Downstream of the gas supply pipes 232b and 232c, nozzles 249b and 249c are provided that supply various gases supplied from these gas supply pipes toward the main surface of the seed crystal substrate 20 held on the susceptor 208. Nozzles 249a to 249c are each configured to penetrate the upstream side of the heat shield wall 211.

[0086] Furthermore, the gas supply pipe 232c is configured to supply not only HCl gas, H2 gas, and N2 gas, but also dopant gases such as Fe-containing gases like ferrocene (Fe(C5H5)2, abbreviated as Cp2Fe) gas and iron trichloride (FeCl3), Si-containing gases like silane (SiH4) gas and dichlorosilane (SiH2Cl2), and Mg-containing gases like bis(cyclopentadienyl)magnesium (Mg(C5H5)2, abbreviated as Cp2Mg) gas.

[0087] The gas supply system is comprised of the gas supply pipes 232a to 232d, flow controllers, valves, and nozzles 249a to 249c described above.

[0088] An exhaust pipe 230 for exhausting the reaction chamber 201 is provided on a metal flange 219 located at the other end of the reaction vessel 203. An APC valve 244 and a pump 231 are installed in the exhaust pipe 230, in order from the upstream side, serving as pressure regulators. Alternatively, a blower with a pressure regulating mechanism can be used instead of the APC valve 244 and pump 231.

[0089] A zone heater 207 is provided on the outer circumference of the reaction vessel 203 as a heating section, which heats the inside of the reaction chamber 201 to a desired temperature. The zone heater 207 consists of at least two heaters, an upstream section including the gas generator 233a and a downstream section including the susceptor 208. Each heater has a temperature sensor and a temperature controller (neither of which are shown) so that it can be individually adjusted to a temperature in the range of room temperature to 1200°C.

[0090] As described above, the susceptor 208, which holds the seed crystal substrate 20, is equipped with an internal heater 210, a temperature sensor 209, and a temperature controller (not shown) to allow temperature adjustment in a range of at least room temperature to 1600°C, separate from the zone heater 207. Furthermore, the upstream side and surrounding area of ​​the susceptor 208 are surrounded by a heat shield wall 211, as described above. Of the heat shield wall 211, at least the surface of the side facing the susceptor 208 (inner circumferential surface) must be made of a limited material that does not generate impurities, as will be described later, but for the other surfaces (outer circumferential surface), there are no limitations on the material used as long as it is a material that can withstand temperatures of 1600°C or higher. Of the heat shield wall 211, at least the part excluding the inner circumferential surface can be made of a highly heat-resistant non-metallic material such as carbon, silicon carbide (SiC), tantalum carbide (TaC), or a highly heat-resistant metallic material such as Mo or W, and it can also be a structure in which plate-shaped reflectors are stacked. By using this configuration, even when the temperature of the susceptor 208 is set to 1600°C, the temperature outside the heat shield wall 211 can be suppressed to 1200°C or less. Since this temperature is below the softening point of quartz, in this configuration, quartz can be used as the components that make up the reaction vessel 203, the gas generator 233a, and the upstream parts of the gas supply pipes 232a to 232d.

[0091] Within the reaction chamber 201, there is a region (high-temperature reaction region) 201a that is heated to 900°C or higher when the crystal growth step described later is carried out, and which may come into contact with the gas supplied to the seed crystal substrate 20.

[0092] In this embodiment, at least a portion of the surface of the member constituting the high-temperature reaction region 201a has a protective layer (not shown) made of, for example, an iron cyano complex (chemical formula: Fe4[Fe(CN)6]3).

[0093] Iron cyano complexes, also known as Prussian blue, are a raw material for blue paints. However, because the Fe atom and cyanide ion are extremely strongly bonded in iron cyano complexes, these complexes are extremely difficult to decompose. While cyanide is generally considered toxic, the bond between Fe and cyanide ions in iron cyano complexes is extremely stable, so the iron cyano complexes themselves are not toxic. This strong bond between the Fe atom and cyanide ion suppresses the isolation of Fe from the iron cyano complex, thereby inhibiting the incorporation of Fe into the GaN crystal originating from the iron cyano complex itself.

[0094] As described above, based on the stable properties of the iron cyano complex, by covering the surface of the component constituting the high-temperature reaction region 201a with a protective layer made of the iron cyano complex, the protective layer made of the iron cyano complex can be stably maintained even under the conditions of the GaN crystal growth temperature, the temperature in the high-temperature bake step, and the atmosphere of the raw material gas. In other words, the occurrence of cracks in the protective layer can be suppressed, and the porosity of the protective layer can be suppressed.

[0095] However, if the components made of carbon or other materials that constitute the high-temperature reaction region 201a are directly coated with a protective layer made of an iron cyano complex, there is a risk that the protective layer may crack due to physical impact.

[0096] Therefore, in this embodiment, it is preferable to provide an underlayer (buffer layer, adhesion strengthening layer) between the main body of the component constituting the high-temperature reaction region 201a and the protective layer. Examples of materials for the underlayer include SiC. By interposing such an underlayer between the main body and the protective layer, the protective layer can be firmly adhered to the main body of the component constituting the high-temperature reaction region 201a via the underlayer. As a result, the strength of the protective layer can be ensured.

[0097] Examples of parts of the components constituting the high-temperature reaction region 201a where the above-mentioned protective layer is provided include the inner wall of the heat shield wall 211 upstream of the susceptor 208, the portions of the nozzles 249a to 249c that penetrate to the inside of the heat shield wall 211, the portions on the outside of the heat shield wall 211 that are heated to 900°C or higher during the crystal growth step, and the surface of the susceptor 208.

[0098] The thickness of the protective layer is not limited, but for example, it is between 30 μm and 300 μm. By making the protective layer 30 μm or thicker, the durability of the protective layer can be ensured. By making the protective layer 300 μm or less, cracking of the protective layer caused by the difference in thermal expansion coefficients between the substrate and the protective layer during heating and cooling can be suppressed. The thickness of the base layer is not limited, but for example, it is between 30 μm and 200 μm. By making the base layer 30 μm or thicker, the adhesion of the base layer can be ensured. By making the base layer 200 μm or less, cracking of the base layer caused by the difference in thermal expansion coefficients between the substrate and the base layer during heating and cooling can be suppressed.

[0099] Each component of the HVPE device 200 described above, such as the various valves and flow controllers in the gas supply pipes 232a to 232d, the pump 231, the APC valve 244, the zone heater 207, the internal heater 210, the temperature sensor 209, etc., is connected to a controller 280 configured as a computer.

[0100] Next, an example of a process for epitaxially growing a GaN single crystal on a seed crystal substrate 20 using the HVPE apparatus 200 described above will be explained in detail with reference to Figure 4. In the following explanation, the operation of each component of the HVPE apparatus 200 is controlled by the controller 280.

[0101] (High-temperature baking step) This step is performed when the reaction chamber 201 or the exchange chamber 202 is exposed to the atmosphere due to maintenance of the HVPE apparatus 200 or the introduction of Ga raw material into the gas generator 233a. Before performing this step, it is confirmed that the airtightness of the reaction chamber 201 and the exchange chamber 202 is ensured. After confirming airtightness, the reaction chamber 201 and the exchange chamber 202 are replaced with N2 gas, and then, with the reaction vessel 203 in a predetermined atmosphere, the surfaces of the various components constituting the reaction chamber 201 are heat-treated. This treatment is performed when the seed crystal substrate 20 has not been introduced into the reaction vessel 203, and when the Ga raw material has been introduced into the gas generator 233a.

[0102] In this step, the temperature of the zone heater 207 is adjusted to approximately the same temperature as in the crystal growth step. Specifically, the temperature of the upstream heater, including the gas generator 233a, is set to 700-900°C, and the temperature of the downstream heater, including the susceptor 208, is set to 1000-1200°C. Furthermore, the temperature of the internal heater 210 is set to a predetermined temperature of 1500°C or higher. As will be described later, in the crystal growth process, the internal heater 210 is either off or set to a temperature of 1200°C or lower, so the temperature of the high-temperature reaction region 201a is between 900°C and 1200°C. On the other hand, in the high-temperature bake step, by setting the temperature of the internal heater 210 to 1500°C or higher, the temperature of the high-temperature reaction region 201a becomes 1000 to 1500°C or higher, the area near the susceptor 208 on which the seed crystal substrate 20 is placed becomes 1500°C or higher, and other locations also become at least 100°C higher than the temperature during the crystal growth step. Within the high-temperature reaction region 201a, the area where the temperature is lowest at 900°C during the crystal growth step, specifically the area upstream of the nozzles 249a to 249c inside the heat shield wall 211, is the area where attached impurity gases are most difficult to remove. By setting the temperature of the internal heater 210 to 1500°C or higher so that the temperature in this area is at least 1000°C or higher, the effects of the cleaning and modification treatment described later, that is, the effect of reducing impurities in the grown GaN crystal, can be sufficiently obtained. If the temperature of the internal heater 210 is set to less than 1500°C, the temperature at any point within the high-temperature reaction region 201a cannot be sufficiently raised, making it difficult to obtain the effects of the cleaning and modification treatment described later, i.e., the effect of reducing impurities in the GaN crystal.

[0103] The upper limit of the internal heater 210 temperature in this step depends on the capacity of the heat shield wall 211. As long as the temperature of the quartz components, etc., outside the heat shield wall 211 is kept below their heat resistance temperature, the higher the temperature of the internal heater 210, the easier it is to achieve the cleaning and reforming effects in the reaction chamber 201. If the temperature of the quartz components, etc., outside the heat shield wall 211 exceeds their heat resistance temperature, the maintenance frequency and cost of the HVPE device 200 may increase.

[0104] Furthermore, in this step, after the temperatures of the zone heater 207 and the internal heater 210 have reached the predetermined temperatures described above, H2 gas is supplied from gas supply pipes 232a and 232b at a flow rate of, for example, about 3 slm. Additionally, HCl gas is supplied from gas supply pipe 232c at a flow rate of, for example, about 2 slm, and H2 gas is supplied at a flow rate of, for example, about 1 slm. N2 gas is also supplied from gas supply pipe 232d at a flow rate of, for example, about 10 slm. By maintaining this state for a predetermined time, baking is carried out in the reaction chamber 201. By starting the supply of H2 gas and HCl gas at the timing described above, that is, after the temperature inside the reaction chamber 201 has risen, it is possible to reduce the amount of gas that would otherwise be wasted without contributing to the cleaning and reforming processes described later, thereby reducing the processing cost of crystal growth.

[0105] In this embodiment, it is preferable not to supply O2 gas during the high-temperature base step. That is, it is preferable not to perform the "oxidation sequence" in which O2 gas is supplied as described in Reference 4. If O2 gas is supplied, the iron cyano complex may be oxidized, potentially weakening the protective layer. In contrast, by performing the high-temperature bake step without supplying O2 gas, i.e., in a gas atmosphere that intentionally does not contain O2 gas, the oxidation of the iron cyano complex can be suppressed, and the weakening of the protective film can be suppressed.

[0106] Furthermore, this step is performed with the pump 231 in operation, and the pressure inside the reaction vessel 203 is maintained at, for example, between 0.5 atmospheres and 2 atmospheres by adjusting the opening of the APC valve 244. Performing this step while the reaction vessel 203 is being evacuated makes it possible to efficiently remove impurities from inside the reaction vessel 203, i.e., to clean the reaction vessel 203. If the pressure inside the reaction vessel 203 falls below 0.5 atmospheres, the effects of the cleaning and reforming treatments described later will be difficult to obtain. Also, if the pressure inside the reaction vessel 203 exceeds 2 atmospheres, the etching damage to the components inside the reaction chamber 201 will be excessive.

[0107] Furthermore, in this step, the partial pressure ratio of HCl gas to H2 gas in the reaction vessel 203 (partial pressure of HCl / partial pressure of H2) is set to, for example, between 1 / 50 and 1 / 2. If the aforementioned partial pressure ratio is less than 1 / 50, the effects of the cleaning and reforming treatments in the reaction vessel 203 will be less pronounced. Also, if the aforementioned partial pressure ratio is greater than 1 / 2, the etching damage suffered by the components in the reaction chamber 201 will be excessive.

[0108] These partial pressure controls can be performed by adjusting the flow rate using flow controllers installed in the gas supply pipes 232a to 232c.

[0109] By performing this step for a time of, for example, 30 minutes to 300 minutes, the surfaces of various components constituting at least the high-temperature reaction region 201a within the reaction chamber 201 can be cleaned, and foreign matter adhering to these surfaces can be removed. Furthermore, by maintaining the surfaces of these components at a temperature of 100°C or more higher than the temperature in the crystal growth step described later, the release of impurity gases from these surfaces is promoted, making it possible to modify the surfaces to be less prone to the release of impurities such as Si, B, Fe, O, and C under the temperature and pressure conditions of the crystal growth step (surfaces where outgassing is less likely to occur). Note that if the time spent performing this step is less than 30 minutes, the effects of the cleaning and modification treatment described here may be insufficient. Also, if the time spent performing this step exceeds 300 minutes, the components constituting the high-temperature reaction region 201a will be excessively damaged.

[0110] Furthermore, when supplying H2 gas and HCl gas into the reaction vessel 203, the supply of NH3 gas into the reaction vessel 203 is not performed. If NH3 gas is supplied into the reaction vessel 203 in this step, the effects of the above-mentioned purification and reforming treatments, particularly the reforming treatment, will be difficult to obtain.

[0111] Furthermore, when supplying H2 gas and HCl gas into the reaction vessel 203, a halogenated gas such as chlorine (Cl2) gas may be supplied instead of HCl gas. In this case as well, the same effects of the purification and reforming treatments described above will be obtained.

[0112] Furthermore, when supplying H2 gas and HCl gas into the reaction vessel 203, N2 gas may be added as a carrier gas from the gas supply pipes 232a to 232c. By adjusting the gas flow rate from nozzles 249a to 249c through the addition of N2 gas, it is possible to prevent incomplete purification and reforming processes. Alternatively, a noble gas such as Ar gas or He gas may be supplied instead of N2 gas.

[0113] Once the above-described cleaning and modification processes are complete, the output of the zone heater 207 is reduced to lower the temperature inside the reaction vessel 203 to, for example, 200°C or lower, that is, a temperature at which it is possible to introduce the seed crystal substrate 20 into the reaction vessel 203. At the same time, the supply of H2 gas and HCl gas into the reaction vessel 203 is stopped and the vessel is purged with N2 gas. Once the purging of the reaction vessel 203 is complete, the opening of the APC valve 244 is adjusted so that the pressure inside the reaction vessel 203 is equal to atmospheric pressure or slightly higher than atmospheric pressure, while maintaining the supply of N2 gas into the reaction vessel 203.

[0114] (Normal baking step) The high-temperature bake step described above is performed when the reaction chamber 201 or the exchange chamber 202 is exposed to the atmosphere. However, when performing the crystal growth step, the reaction chamber 201 or the exchange chamber 202 is not usually exposed to the atmosphere, including before and after the step, so the high-temperature bake step is unnecessary. However, when performing the crystal growth step, GaN polycrystalline material adheres to the surfaces of nozzles 249a to 249c, the surface of susceptor 208, the inner wall of heat shield wall 211, etc. If the next crystal growth step is performed with residual GaN polycrystalline material, GaN polycrystalline powder and Ga droplets that have separated from the polycrystalline material and scattered will adhere to the seed crystal substrate 20, hindering good crystal growth. For this reason, a bake step is usually performed after the crystal growth step to remove the aforementioned GaN polycrystalline material. The processing procedure and conditions for the normal bake step can be the same as those for the high-temperature bake step, except that the internal heater 210 is turned off and the temperature near the susceptor 208 is set to 1000-1200°C. By performing the normal bake step, GaN polycrystals can be removed from inside the reaction chamber 201.

[0115] (Crystal growth step) After performing the high-temperature bake step or the normal bake step, once the cooling and purging of the reaction vessel 203 is complete, the furnace opening 221 of the reaction vessel 203 is opened and the seed crystal substrate 20 is placed on the susceptor 208, as shown in Figure 5. The furnace opening 221 is isolated from the atmosphere and connected to a glove box 220 that is continuously purged with N2 gas. As described above, the glove box 220 comprises a transparent acrylic wall, several rubber gloves connected to holes penetrating the wall, and a pass box for moving objects in and out of the glove box 220. By replacing the atmosphere inside the pass box with N2 gas, it is possible to move objects in and out of the glove box 220 without drawing in the atmosphere. By using such a mechanism to place the seed crystal substrate 20, it is possible to prevent re-contamination of each component in the reaction vessel 203, which has been cleaned and modified by the high-temperature bake step, and to prevent the re-adhesion of impurity gases to these components. Furthermore, the surface of the seed crystal substrate 20 placed on the susceptor 208, that is, the main surface (crystal growth surface, base surface) on the side facing the nozzles 249a to 249c, is, for example, the (0001) plane of the GaN crystal, that is, the +c plane (Ga polarity plane).

[0116] Once the seed crystal substrate 20 has been loaded into the reaction chamber 201, the furnace opening 221 is closed, and while heating and exhausting the reaction chamber 201 are carried out, the supply of H2 gas, or H2 gas and N2 gas, into the reaction chamber 201 is started. When the reaction chamber 201 reaches the desired processing temperature and pressure, and the atmosphere inside the reaction chamber 201 becomes the desired atmosphere, the supply of HCl gas and NH3 gas from the gas supply pipes 232a and 232b is started, supplying GaCl gas and NH3 gas to the surface of the seed crystal substrate 20, respectively. As a result, GaN crystals are epitaxially grown on the surface of the seed crystal substrate 20, as shown in the cross-sectional view in Figure 6(a), and a GaN crystal film 21 is formed.

[0117] In this step, in order to prevent thermal decomposition of the GaN crystals constituting the seed crystal substrate 20, it is preferable to start supplying NH3 gas into the reaction chamber 201 when the temperature of the seed crystal substrate 20 reaches 500°C, or even earlier. Furthermore, in order to improve the uniformity of the in-plane film thickness of the GaN crystal film 21, it is preferable to carry out this step with the susceptor 208 rotating.

[0118] In this step, it is preferable to set the temperature of the zone heater 207 to, for example, 700-900°C for the upstream heater including the gas generator 233a, and to, for example, 1000-1200°C for the downstream heater including the susceptor 208. This adjusts the temperature of the susceptor 208 to a predetermined crystal growth temperature of 1000-1200°C. In this step, the internal heater 210 may be used in the OFF state, but temperature control using the internal heater 210 may be performed as long as the temperature of the susceptor 208 is within the above range of 1000-1200°C.

[0119] Other processing conditions for this step include the following: Processing pressure: 0.5~2 atmospheres Partial pressure of GaCl gas: 0.1~20kPa Partial pressure of NH3 gas / Partial pressure of GaCl gas: 1~100 Partial pressure of H2 gas / Partial pressure of GaCl gas: 0~100

[0120] Furthermore, when supplying GaCl gas and NH3 gas to the surface of the seed crystal substrate 20, N2 gas may be added as a carrier gas from each of the gas supply pipes 232a to 232c. By adding N2 gas and adjusting the gas flow rate supplied from nozzles 249a to 249c, the distribution of the raw material gas supply amount on the surface of the seed crystal substrate 20 can be appropriately controlled, and a uniform growth rate distribution can be achieved over the entire surface. In addition, a rare gas such as Ar gas or He gas may be supplied instead of N2 gas.

[0121] (Removal step) Once a GaN crystal film 21 of the desired thickness has grown on the seed crystal substrate 20, NH3 gas and N2 gas are supplied into the reaction chamber 201, and while the reaction chamber 201 is evacuated, the supply of HCl gas and H2 gas to the reaction chamber 201 and heating by the zone heater 207 are stopped. When the temperature inside the reaction chamber 201 drops below 500°C, the supply of NH3 gas is stopped, and the atmosphere inside the reaction chamber 201 is replaced with N2 gas to return to atmospheric pressure. The temperature inside the reaction chamber 201 is then lowered to, for example, below 200°C, that is, to a temperature at which the GaN crystal ingot (seed crystal substrate 20 with the GaN crystal film 21 formed on its surface) can be removed from the reaction vessel 203. After that, the crystal ingot is removed from the reaction chamber 201 via the glove box 220 and the pass box.

[0122] (Slice step) Subsequently, by slicing the removed crystal ingot, for example, parallel to the growth surface, one or more substrates 10 can be obtained, as shown in Figure 6(b). This slicing process can be performed using, for example, a wire saw or an electrical discharge machine. After that, the surface (+c surface) of the substrate 10 is subjected to a predetermined polishing process to make this surface an epi-ready mirror surface. The back surface (-c surface) of the substrate 10 is made into a lapped surface or a mirror surface.

[0123] Furthermore, the preferred order of execution for the above-mentioned high-temperature bake step, normal bake step, crystal growth step, and removal step is as follows: When n is an integer of 1 or more, for example, the preferred order is: exposure of the reaction chamber 201 or exchange chamber 202 to the atmosphere → high-temperature bake step → crystal growth step → removal step → (normal bake step → crystal growth step → removal step) × n.

[0124] (3) Effects obtained by this embodiment According to this embodiment, one or more of the following effects can be obtained.

[0125] (a) In this embodiment, by covering at least a portion of the surface of the component constituting the high-temperature reaction region 201a with a protective layer made of an iron cyano complex (chemical formula: Fe4[Fe(CN)6]3), the leakage of Fe from the component constituting the high-temperature reaction region 201a to the growth atmosphere can be suppressed, and the inclusion of Fe in the GaN crystal can be dramatically reduced. Furthermore, by combining this with a manufacturing method having a high-temperature bake step developed by the inventors, it is possible to obtain a GaN crystal with extremely low C concentration and electron trap E3 concentration corresponding to Fe concentration.

[0126] Specifically, the C concentration in the crystal measured by SIMS using the raster transformation method was 1 × 10⁻⁶ 15 cm -3 The concentration of electron traps E3 in the GaN crystal is set to less than 1 × 10⁻¹⁰. 14 cm -3 Less than 2 × 10 13 cm -3 It can be less than.

[0127] Furthermore, the GaN crystal of this embodiment is given by the above formula (1-1) "[E3] < 1 × 10 14 While satisfying the condition, equation (1-2) "[E3]·[C] 2 ≤ 1 × 10 43 The above formula (2) "[E3]·[C]" is satisfied and preferably satisfies the above formula (2) "[E3]·[C] 2 ≤ 1 × 10 42 It satisfies the condition.

[0128] Thus, by manufacturing GaN crystals using the above-described method, it is possible to dramatically reduce both the carbon concentration and the electron trap E3 concentration, which were previously reported to be in a trade-off relationship.

[0129] As a result, the GaN crystals of this embodiment have extremely good crystal quality, with significantly lower impurity and trap concentrations compared to conventional GaN crystals with high C and E3 concentrations.

[0130] Also, when manufacturing a semiconductor device using the substrate 10 obtained by slicing the GaN crystal of the present embodiment, compared with the case of using a substrate made of a conventional GaN crystal in which at least one of the C concentration and the E3 concentration was high, it is possible to suppress deterioration of the device due to diffusion of impurities and destabilization of device operation due to charge and discharge of traps caused by impurities.

[0131] (b) In the present embodiment, by using, as the reaction vessel 203, a container in which at least a part of the surface of the member constituting the high-temperature reaction region 201a has a protective layer made of an iron cyanide complex, based on the stable characteristics of the iron cyanide complex, even under the growth temperature of the GaN crystal, the temperature conditions in the high-temperature bake step, and the atmosphere of the source gas, the protective layer made of the iron cyanide complex can be stably maintained. That is, it is possible to suppress the occurrence of cracks in the protective layer and suppress the protective layer from becoming porous. Thereby, it is possible to suppress leakage of impurities such as Fe from the member made of carbon or the like constituting the high-temperature reaction region 201a into the growth atmosphere.

[0132] Furthermore, in the high-temperature bake step, while heating the temperature of the high-temperature reaction region 201a to a temperature of 1500 °C or higher, the supply of NH3 gas into the reaction vessel 203 is not performed, and the supply of H2 gas and a halogen-based gas into the reaction vessel 203 is performed, whereby the surface of the member constituting the high-temperature reaction region 201a can be cleaned and modified. That is, it is possible to promote the release of impurity gas from the surface of the member constituting the high-temperature reaction region 201a and modify it to a surface where the release of impurities such as C (a surface where outgassing hardly occurs) hardly occurs under the temperature and pressure conditions in the crystal growth step.

[0133] As a result, in the GaN crystal of the present embodiment, it is possible to dramatically reduce both the C concentration and the E3 concentration corresponding to the Fe concentration, which is an electron trap.

[0134] (c) In this embodiment, by manufacturing GaN crystals by the above manufacturing method and drastically reducing the impurity concentration, the crystal quality of the GaN crystals can be improved. As a result, not only can the concentration of the electron trap E3 in the GaN crystals be reduced, but the concentrations of other electron traps can also be reduced.

[0135] Specifically, the concentration of the electron trap E1 can be made 3×10 12 cm -3 or less, and the concentration of the electron trap Ex can be made 3×10 13 cm -3 or less. Note that the origins of these E1 and Ex traps are not clear at present. However, by using the protective layer of this embodiment, since the respective concentrations of E1 and Ex are reduced, it is considered that both E1 and Ex are traps related to impurities resulting from the base material of the member constituting the high-temperature reaction region 201a, similar to the E3 trap.

[0136] Thus, by reducing various electron trap concentrations that can occur in the GaN crystals, it becomes possible to prevent destabilization of device operation due to charge and discharge of the electron traps.

[0137] (d) In this embodiment, by manufacturing GaN crystals by the above manufacturing method, the impurity concentration of elements other than C in the GaN crystals can also be drastically reduced. Specifically, the O concentration in the crystal measured by SIMS using the raster change method can be made less than 1×10 15 cm -3 . Also, the B concentration in the crystal measured by depth profile analysis of SIMS can be made less than 1×10 15 cm -3 .

[0138] (e) Since the GaN crystals obtained in this embodiment are of high purity as described above, the resistivity under temperature conditions of 20°C or higher and 300°C or lower is 1×10 6It possesses high insulating properties of Ωcm or more. Furthermore, when GaN crystals contain a large amount of donor impurities such as Si and O, a method is known to improve the insulating properties of the crystal by adding donor compensating impurities (hereinafter referred to as compensating impurities) such as Mn, Fe, cobalt (Co), Ni, and copper (Cu) into the crystal, as disclosed in, for example, Japanese Patent Publication No. 2007-534580. However, this method has the drawback that the quality of the GaN crystal tends to deteriorate due to the addition of compensating impurities. For example, adding compensatory impurities to a GaN crystal makes the substrate obtained by slicing this crystal more prone to cracking. Furthermore, the diffusion of compensatory impurities into the layered structure formed on the substrate can degrade the properties of semiconductor devices fabricated using this substrate. In contrast, the GaN crystal of this embodiment achieves high insulation without the addition of compensatory impurities, thus avoiding the crystal degradation issues that are common in conventional methods.

[0139] (d) The insulating properties of the GaN crystal obtained in this embodiment are less temperature-dependent and more stable compared to the insulating properties obtained by adding compensating impurities to the crystal. This is because Si and O are added, for example, in a 1 × 10⁻⁶ state. 17 cm -3 It might seem possible to impart insulating properties similar to those of the GaN crystal in this embodiment by adding Fe at concentrations exceeding those of GaN crystals containing the above concentrations. However, since the energy level of Fe used as a compensating impurity is relatively shallow at around 0.6 eV, the insulating properties obtained by adding Fe tend to decrease more easily with increasing temperature compared to the insulating properties of the GaN crystal in this embodiment. In contrast, according to this embodiment, since insulation can be achieved without adding compensatory impurities, it is possible to avoid the problem of increased temperature dependence, which is a common issue with conventional methods.

[0140] (e) As described above, the GaN crystal obtained in this embodiment is of high purity, so when this crystal is converted into an n-type semiconductor by implanting Si ions, or when this crystal is formed as a p-type semiconductor by implanting Mg ions, the amount of implanted ions can be kept to a minimum. In other words, the GaN crystal of this embodiment is advantageous compared to conventional GaN crystals containing more impurities such as Fe, in that it is possible to impart desired semiconductor properties while suppressing the deterioration of crystal quality due to ion implantation as much as possible. Furthermore, the GaN crystal of this embodiment is also advantageous compared to conventional GaN crystals containing more impurities in that the concentration of impurities that cause carrier scattering is extremely low, so it is possible to avoid a decrease in carrier mobility.

[0141] <Second Embodiment of the Present Invention> Next, a second embodiment of the present invention will be described, focusing on the differences from the first embodiment.

[0142] The GaN crystal in this embodiment is similar to that of the first embodiment in that both the C concentration and the electron trap E3 concentration are extremely low, but the Si concentration is 1 × 10⁻⁶ 15 cm -3 The above points differentiate this embodiment from the first embodiment. In this embodiment, the GaN crystal contains Si at such a concentration, resulting in a resistivity of 1 × 10⁻¹⁶ under temperature conditions of 20°C to 300°C. 2 It has conductivity of less than Ωcm and functions as a so-called n-type semiconductor crystal. For example, the Si concentration is 1 × 10⁻⁶. 15 cm -3 The above 5 x 10 19 cm -3 The size can be as follows. In this case, the free electron concentration (n-type carrier concentration) under temperature conditions of 20°C to 300°C is, for example, 1 × 10⁻⁶. 15 cm -3 The above 5 x 10 19 cm -3 The resistivity under the same temperature conditions is, for example, 1 × 10⁻⁶. -4 The resistance will be between Ωcm and 100Ωcm.

[0143] In the GaN crystal of this embodiment, the Si concentration and the free electron concentration in the crystal were approximately equal. This indicates that the actual concentration of impurities that are the source of carriers other than Si (such as Fe and C that compensate for free electrons, or O that acts as a donor) was extremely small, and these impurities were present at the minimum Si concentration of 1 × 10⁻⁶ in this embodiment. 15 cm -3 This indicates that, in comparison, it is present in the GaN crystal in a negligible amount.

[0144] The addition of Si to the GaN crystal can be carried out in the crystal growth step described above by supplying a Si-containing gas such as SiH4 gas or SiH2Cl2 gas to the seed crystal substrate 20 simultaneously with the raw material gas (GaCl gas + NH3 gas). The partial pressure ratio of the Si-containing gas to the Group III raw material gas in the reaction vessel 203 (partial pressure of the Si-containing gas / total partial pressure of the GaCl gas) is, for example, 1 / 10. 8 ~1 / 10 3 The size can be set to this. In addition, the addition of Si to the GaN crystal can also be performed by obtaining a substrate 10 using the same method as in the first embodiment, and then implanting Si ions into this substrate 10.

[0145] The GaN crystal obtained in this embodiment has extremely low concentrations of B, Fe, O, and C in the crystal, similar to the GaN crystal of the first embodiment, and therefore has better quality than conventional GaN crystals that contain more of these impurities. Furthermore, according to this embodiment, since the impurity concentrations, such as the Fe concentration estimated from the electron trap E3 concentration in the GaN crystal, are as low as described above, it is possible to impart the desired conductivity (n-type semiconductor properties) to the GaN crystal even if the amount of Si added is kept low. In other words, the GaN crystal of this embodiment is advantageous over conventional GaN crystals that contain more of impurities such as Fe and C in that it can impart the desired semiconductor properties while minimizing the deterioration of crystal quality due to the addition of Si. In addition, the GaN crystal of this embodiment is advantageous over conventional GaN crystals that contain more impurities in that it is possible to avoid a decrease in carrier mobility because the concentration of impurities that cause carrier scattering is extremely low.

[0146] Furthermore, since the GaN crystal obtained in this embodiment has an extremely low concentration of impurities that compensate for n-type conductivity, such as Fe and C, similar to the GaN crystal of the first embodiment, it is possible to improve the uniformity of carrier concentration compared to conventional GaN crystals that contain more of these impurities.

[0147] For example, when growing GaN crystals on a GaN substrate with a +c plane as the surface and an off-angle distribution, the amount of Fe and C incorporated into the GaN crystals depends on the off-angle. Therefore, in situations where a large amount of Fe or C is incorporated into the GaN crystals, the resulting GaN crystals will have a large variation in free electron concentration of several tens of percent or more across the wafer surface. For example, in Shiojima 2019, described later, when the off-angle distribution on a 2-inch substrate is about 0.3°, the effective carrier concentration across the surface is 5 × 10⁻⁶. 15 cm -3 ~8×10 15 cm -3 It fluctuates within this range. The variance of carrier concentrations measured across the entire plane corresponds to a variation of more than 15% of the mean value.

[0148] In contrast, the GaN crystal of this embodiment has an extremely low concentration of impurities such as Fe and C that compensate for n-type conductivity, similar to the GaN crystal of the first embodiment. As a result, even if the surface of the GaN crystal constituting the seed crystal substrate 20 has a large off-angle distribution, it is possible to easily obtain a uniform carrier concentration distribution.

[0149] Specifically, for example, if the substrate 10 is a GaN substrate of 25 mm or more (2 inches, 4 inches, or 6 inches), and the off-angle distribution measured in the radial direction of the substrate 10 (the maximum value of the difference in off-angles measured at any two points within a distance of 80% of the radius from the center in the radial direction) is 0.4° or less, then the average carrier concentration (mean free electron concentration) in the plane of the substrate 10 is 1 × 10⁻¹⁰ 15 cm -3 If the above conditions are met, it is possible to keep the carrier concentration variance below 3% of the mean.

[0150] Furthermore, the GaN crystal of this embodiment has an advantage over conventional GaN crystals containing more impurities because the concentration of impurities that cause carrier scattering is extremely low, which suppresses the decrease in carrier mobility. For example, the electron concentration in the GaN crystal of this embodiment is 2 × 10⁻⁶ 15 cm -3 If the following conditions are met, the room temperature will be 1500 cm². 2 A mobility of / Vs or higher is being achieved.

[0151] Furthermore, it has been confirmed that similar effects can be obtained when using Ge instead of Si as the n-type dopant, or when using both Si and Ge. In these cases, the total concentration of Si and Ge in the crystal is, for example, 1 × 10⁻⁶ 15 cm -3 The above, preferably 5 × 10 19 cm -3 The following applies:

[0152] <Modified example of the second embodiment of the present invention> In the above-described second embodiment, by further reducing the amount of Si-containing gas supplied during the crystal growth step, the free electron concentration can be made less than 1×10 14 cm -3 and greater than or equal to 1×10 15 cm -3 However, in this case, since it is impossible to measure the Si concentration in the crystal, at present, it can only be said that the Si concentration is less than 1×10 15 cm -3 In addition, as the n-type dopant, it is also possible to use Ge instead of Si, or to use both Si and Ge.

[0153] <The Third Embodiment of the Present Invention> Subsequently, the third embodiment of the present invention will be described focusing on the differences from the first embodiment. The GaN crystal in this embodiment is the same as the first embodiment in that both the C concentration and the electron trap E3 concentration are extremely low, but it further contains Mg, and the concentration is 3×10 18 cm -3 This is different from the first embodiment in that it is greater than or equal to. The GaN crystal in this embodiment contains Mg at such a concentration, so that the resistivity under temperature conditions of 20°C or higher and 300°C or lower is less than 1×10 2 Ωcm and has conductivity, functioning as a so-called p-type semiconductor crystal. Note that the Mg concentration can be, for example, 1×10 17 cm -3 or more and 5×10 20 cm -3 or less. In this case, the hole (p-type carrier) concentration under temperature conditions of 20°C or higher and 300°C or lower is, for example, 5×10 15 cm -3 or more and 5×10 18 cm -3 or less, and the resistivity under the same temperature conditions is, for example, 0.5Ωcm or more and 100Ωcm or less.

[0154] The addition of Mg to the GaN crystal can be carried out in the crystal growth step described above by supplying a Mg-containing gas, such as Cp2Mg gas, to the seed crystal substrate 20 simultaneously with the raw material gas (GaCl gas + NH3 gas). The partial pressure ratio of the Mg-containing gas to the Group III raw material gas in the reaction vessel 203 (partial pressure of Mg-containing gas / total partial pressure of GaCl gas) is, for example, 1 / 10. 5 ~1 / 10 2 The size can be set to this. In addition, instead of Cp2Mg gas, a gas containing magnesium nitride (Mg3N2) or metallic Mg may be used to add Mg to the GaN crystal. These gases can be generated by, for example, placing Mg3N2 or metallic Mg in a high-temperature region of about 800°C in the middle of the gas supply pipe 232c to produce vapors of these substances. Alternatively, Mg can be added to the GaN crystal by obtaining the substrate 10 using the same method as in the first embodiment, and then implanting Mg ions into the substrate 10. Similar to the second embodiment, using a dopant gas is advantageous because Mg can be added uniformly throughout the thickness direction of the GaN crystal, and damage to the crystal surface due to ion implantation can be easily avoided. In addition, using ion implantation is advantageous because it is easier to avoid the incorporation of the C component contained in Cp2Mg gas into the crystal, i.e., an increase in the C concentration in the GaN crystal.

[0155] The GaN crystal obtained in this embodiment has extremely low concentrations of Si, B, Fe, O, and C, similar to the GaN crystal of the first embodiment, and therefore has better quality than conventional GaN crystals that contain more of these impurities. Furthermore, according to this embodiment, because the concentrations of impurities such as Si and O in the GaN crystal are as low as described above, it is possible to impart the desired conductivity (p-type semiconductor properties) to the GaN crystal even if the amount of Mg added is kept low. In other words, the GaN crystal of this embodiment is advantageous over conventional GaN crystals that contain more of impurities such as Si and O in that it can impart the desired semiconductor properties while minimizing the deterioration of crystal quality due to the addition of Mg. In addition, the GaN crystal of this embodiment is advantageous over conventional GaN crystals that contain more impurities in that the concentration of impurities that cause carrier scattering is extremely low, making it possible to avoid a decrease in carrier mobility. For example, if the hole concentration in the GaN crystal of this embodiment is 1 × 10⁻⁶ 18 cm -3 In that case, at room temperature, 20cm 2 A mobility of / Vs or higher is being achieved.

[0156] <Fourth Embodiment of the Invention> Next, a fourth embodiment of the present invention will be described, focusing on the differences from the first embodiment. The GaN crystal in this embodiment differs from the first embodiment in that it is not configured as a substrate 10, but rather constitutes at least a crystalline layer 40 of the semiconductor laminate 1.

[0157] Figure 7 is a schematic cross-sectional view showing the semiconductor laminate of this embodiment. As shown in Figure 7, the semiconductor laminate 1 of this embodiment includes, for example, a substrate 30 and a crystal layer 40.

[0158] The substrate 30 is configured as a base substrate for epitaxial growth of the crystal layer 40. Examples of substrate 30 include sapphire substrates, SiC substrates, and nitride crystal substrates. If substrate 30 is a nitride crystal substrate, it may be made of any of the GaN crystals in the first to third embodiments.

[0159] The crystalline layer 40 is provided on the substrate 30 and is made of one of the GaN crystals from the first to third embodiments described above. That is, the C concentration in the crystal constituting the crystalline layer 40 is 1 × 10⁻¹⁶ 15 cm -3 It is less than , and the concentration of electron traps E3 in the crystal is 1 × 10 14 cm -3 It is less than . Also, the crystals constituting the crystal layer 40 are given by the above formula (1-1) "[E3] < 1 × 10 14 While satisfying the condition, equation (1-2) "[E3]·[C] 2 ≤ 1 × 10 43 It satisfies the condition.

[0160] For example, various semiconductor devices can be manufactured by arbitrarily combining and stacking (bonding) any of the semi-insulating crystals shown in the first and second embodiments, the n-type crystals shown in the third embodiment, and the p-type crystals shown in the fourth embodiment.

[0161] For example, in a semiconductor laminate 1 for manufacturing a pn junction diode, the substrate 30 is made of, for example, an n-type GaN crystal according to the second embodiment, and the crystal layer 40 is made of, for example, a p-type GaN crystal according to the third embodiment.

[0162] For example, in a semiconductor laminate 1 for manufacturing a Schottky barrier diode, the substrate 30 is made of, for example, a high-carrier-concentration n-type GaN crystal according to the second embodiment, and the crystal layer 40 is made of, for example, a low-carrier-concentration n-type GaN crystal according to the second embodiment.

[0163] For example, in a semiconductor laminate 1 for manufacturing a high electron mobility transistor (HEMT), the substrate 30 is, for example, a semi-insulating SiC substrate or a semi-insulating GaN crystal substrate as in the first embodiment, and the crystal layer 40 is composed of, for example, an electron transport layer made of a GaN crystal as in the first embodiment and an electron supply layer made of aluminum gallium nitride (AlGaN) crystal manufactured in the same manner as in the first embodiment.

[0164] Furthermore, when forming p-type or n-type GaN crystals, as described above, Si or Mg may be added to the crystal using a doping gas, or Si or Mg may be ion-implanted into a semi-insulating GaN crystal.

[0165] Furthermore, a nucleation layer (not shown) may be provided between the substrate 10 and the crystal layer 40. The nucleation layer may be made of, for example, aluminum nitride (AlN).

[0166] According to this embodiment, by constructing the crystal layer 40 with the high-quality GaN crystal of the above-described embodiment, it is possible to improve the device characteristics of the semiconductor device obtained from the semiconductor stack 1.

[0167] <Other embodiments of the present invention> The embodiments of the present invention have been specifically described above. However, the present invention is not limited to the embodiments described above, and various modifications are possible without departing from the spirit of the invention.

[0168] (a) The present invention is not limited to GaN, but also includes, for example, group III nitride crystals such as aluminum nitride (AlN), aluminum gallium nitride (AlGaN), indium nitride (InN), indium gallium nitride (InGaN), and aluminum indium gallium nitride (AlInGaN), i.e., In x Al y Ga 1-x-y It is also suitably applicable when growing crystals represented by the compositional formula of N (where 0≦x≦1, 0≦y≦1, 0≦x+y≦1).

[0169] (b) In the embodiments described above, the ICTS method was described as a method for measuring the concentration of the electron trap E3, but the method for measuring the electron trap is not limited to the ICTS method, and other measurement methods may be used as long as they are possible.

[0170] (c) In the above embodiment, a method was described in which a crystal ingot grown thickly on a seed crystal substrate 20 made of GaN single crystal was sliced ​​to make the substrate 10 self-supporting, but the invention is not limited to this case. For example, the substrate 10 may be manufactured by the so-called VAS (Void-Assisted Separation) method. That is, a GaN layer may be formed as a base layer on a different substrate as described in Reference 2, and the GaN layer grown thickly via a nanomask made of titanium nitride (TiN) or the like may be peeled off from the different substrate, and the substrate 10 may be obtained by removing the faceted crystals on the different substrate side.

[0171] (d) The crystal growth step of the present invention is not limited to the method shown in the embodiments described above, but can also be used in combination with the following methods.

[0172] For example, by optimizing the dimensions and shape of the gas generator, the time during which the HCl gas resides (contacts) on the Ga melt can be extended (e.g., 1 minute or more), further reducing the impurity concentration in the GaCl gas. Alternatively, for example, a nanomask made of TiN or the like, with numerous micropores that have an impurity-trapping effect, can be formed on a seed crystal substrate, and GaN crystals can be grown on it. Alternatively, for example, when crystal growth is carried out on the seed crystal substrate, the growth period on facets other than the c-plane, where impurities are easily incorporated, can be shortened. When facet growth is performed on a seed crystal substrate in this way, it is preferable to grow a thick GaN layer, peel it off the seed crystal substrate, and remove the facet-grown crystals on the other substrate side to obtain the substrate 10.

[0173] As described above, the methods shown in the first to third embodiments can significantly reduce the impurity concentration in the GaN crystal on their own. However, by further combining them with the auxiliary methods described here, it is possible to reduce the impurity concentration in the crystal more reliably. However, it is impossible to obtain the various effects shown in the embodiments described above by simply using these auxiliary methods in combination without performing the high-temperature bake step.

[0174] (e) In the embodiments described above, the case in which GaN crystals are grown using an HVPE apparatus 200 has been described, but the invention is not limited to this case, and an MOCVD apparatus may also be used. That is, as the MOCVD apparatus, an apparatus having a protective layer made of an iron cyano complex on at least a part of the surface of the member constituting the high-temperature reaction region may be used, and the above-described high-temperature bake step may be performed to grow GaN crystals. [Examples]

[0175] The following describes experimental results that support the effects of the above-described embodiment.

[0176] (1) Sample of GaN crystal substrate Using an HVPE apparatus, GaN crystal films were grown on GaN species crystal substrates with a diameter of 3 inches and a +c plane under the following growth conditions to produce GaN crystal substrates for samples A1-A5 and B1-B10. Impurity doping will be described later.

[0177] (Samples A1-A5) Of samples A1 to A5, samples A3 and A4 correspond to substrates made of GaN crystal in the embodiments described above.

[0178] For samples A1 to A5, the HVPE apparatus used had a protective layer made of an iron cyano complex on the surface of the carbon components constituting the high-temperature reaction region. For samples A1 to A4, the high-temperature bake step was performed without an oxidation sequence supplying O2 gas before the crystal growth step. The high-temperature bake temperatures for samples A1 to A4 were 1100°C, 1400°C, 1500°C, and 1600°C, respectively. The pressure condition was 1 atmosphere for all samples. For sample A5, the high-temperature bake step was not performed. Next, a 5 mm thick GaN crystal was grown on a seed crystal substrate without opening the reaction chamber to the atmosphere. After that, cylindrical grinding was performed to adjust the outer diameter of the GaN crystal, and then a 400 μm thick substrate was sliced. The substrate had a diameter of 2 inches or more.

[0179] (Samples B1-B10) Samples B1 to B10 correspond to samples 8 to 17 in reference 4, respectively.

[0180] For samples B1 to B10, an HVPE apparatus was used in which the surface of the components constituting the high-temperature reaction region had a protective layer made of SiC. For samples B1 to B4, a high-temperature bake step similar to that of samples A1 to A4 was performed before the crystal growth step. For samples B5 to B9, a high-temperature bake step was performed before the crystal growth step, in which an oxidation sequence and an etching sequence with O2 gas supplied were alternately repeated. At this time, the high-temperature bake temperatures for samples B5 to B9 were 1100°C, 1400°C, 1500°C, 1550°C, and 1600°C, respectively. The pressure condition was 1 atmosphere for all samples. Note that the high-temperature bake step was not performed for sample B10. Next, a 5 mm thick GaN crystal was grown on a seed crystal substrate without opening the reaction chamber to the atmosphere. Subsequently, a 400 μm thick substrate was sliced ​​from the GaN crystal.

[0181] (Regarding impurity doping) First, all of the above samples were prepared without impurity doping, and then impurity analysis and conductivity confirmation were performed using SIMS, as described below. The impurity concentrations listed in Tables 1-3 are the measurement results for samples that were not doped with impurities.

[0182] On the other hand, if the GaN crystal film is highly pure without impurity doping, the GaN crystal film will have high resistance. Therefore, electrical property measurements such as the ICTS method cannot be performed on high-resistance samples. Accordingly, for measurements using the ICTS method, samples were prepared and evaluated as follows, depending on the conductivity of the sample.

[0183] For samples that were not doped with impurities and did not exhibit high resistance, the undoped samples themselves were measured using the ICTS method described below.

[0184] In contrast, among the samples that were not doped with impurities, samples A3, A4, A5, B3, B4, and B7-B10, which exhibited high resistance, could not be measured using the ICTS method. Therefore, 1 × 10 16 cm -3 A sample was prepared separately under the same growth conditions as the undoped sample, except that Si was intentionally gas-doped at a certain concentration to impart n-type conductivity. Hereafter, an apostrophe will be added to the sample number, and the sample will be referred to as "Si trace-doped sample A3'," etc. After sample preparation, Si trace-doped samples A3', A4', A5', B3', B4', B7'~B10' were measured using the ICTS method described below.

[0185] Here, in the Si-trace doped samples A3', A4', A5', B3', B4', B7'~B10', even if a small amount of Si is doped with a Si-containing gas (SiH2Cl2 gas), it is considered that Fe will hardly be introduced into the GaN crystal originating from the Si-containing gas. As mentioned above, since the origin of E3 is considered to be Fe, it is considered that there is no difference in electron trap concentration between the undoped sample and the Si-trace doped sample if the growth conditions are the same except for the Si doping.

[0186] Therefore, the measurement results for Si trace-doped samples A3', A4', A5', B3', B4', and B7'~B10' are recorded in the columns for samples A3, A4, A5, B3, B4, and B7~B10 in Tables 1-3, respectively.

[0187] (2) Evaluation The following evaluations were performed on the GaN crystal substrate of the sample described above.

[0188] (SIMS) The Si, B, and Fe concentrations in each crystal were measured using SIMS depth profile analysis.

[0189] Furthermore, the O and C concentrations in each crystal were measured using SIMS with a raster transformation method.

[0190] (ICTS Act) As described above, measurements were performed using the ICTS method according to the conductivity of the samples that were not doped with impurities. Specifically, for the low-resistance samples A1, A2, B1, B2, B5, and B6, measurements were performed directly using the ICTS method. On the other hand, for the high-resistance samples A3, A4, A5, B3, B4, B7-B10, measurements were performed using the ICTS method on Si-trace doped samples A3', A4', A5', B3', B4', B7'-B10', and the results of these measurements were evaluated as the results for samples A3, A4, A5, B3, B4, B7-B10.

[0191] As a result, the concentrations of electron traps E3 (located in the energy range of 0.5 eV to 0.65 eV from the bottom of the conduction band), E1 (located in the energy range of 0.15 eV to 0.3 eV from the bottom of the conduction band), and Ex (located in the energy range of 0.68 eV to 0.75 eV from the bottom of the conduction band) were measured in each crystal.

[0192] In ICTS measurements, the measurement temperature was adjusted within the range of 80K to 350K so that the time constant of thermionic emission from the target trap fell within the measurable time range (0.01 seconds to 1000 seconds). For example, in Figure 3, the measurement temperature when measuring electron traps E3 and Ex was set to room temperature (300K). On the other hand, the temperature when measuring electron trap E1, which is at an energy position close to the conduction band, was set to, for example, 100K to 150K. In addition, the reverse bias during ICTS measurement was set to -2V, and the filling pulse was set to 0V for 100msec.

[0193] In the ICTS measurement method, an ohmic electrode of Ti / Al was used on the back side of the sample, and a Schottky electrode of Ni / Au was used on the front side.

[0194] (3) Results The evaluation results for GaN crystal substrates of samples A1-A5 and B1-B10 are shown in Tables 1-3 below. In the tables, (lower limit) indicates the detection limit for each evaluation, and results below that detection limit are indicated as "DL".

[0195] [Table 1]

[0196] [Table 2]

[0197] [Table 3]

[0198] (Samples B1-B10) In samples B1 to B10, as described above, the protective layer on the surface of the high-temperature reaction region was made of SiC. Of these, sample B10, which did not undergo the high-temperature bake step, samples B1 to B4, which did not perform the oxidation sequence of the high-temperature bake step, and samples B5 and B6, which underwent the oxidation sequence but with a high-temperature bake temperature of less than 1500°C, showed high concentrations of oxygen and carbon.

[0199] Furthermore, sample B10, which did not undergo a high-temperature baking step, had a higher concentration of B. Furthermore, samples B1, B2, B5, and B6, which were baked at a high temperature of less than 1500°C, had higher Si concentrations.

[0200] In contrast, in samples B7-B9, which underwent a high-temperature bake step including an oxidation sequence with a high-temperature bake temperature of 1500°C or higher, the Si, B, O, and C concentrations were below the detection limit, i.e., 1 × 10⁻⁶. 15 cm -3 It was possible to set it to less than.

[0201] Furthermore, in all samples B1 to B10, the Fe concentration measured by SIMS depth profile analysis was below the detection limit.

[0202] However, when we performed measurements using the ICTS method on samples B1 to B10, we found that the electron trap E3 concentration in each of samples B1 to B10 was 2.0 × 10⁻⁶. 14 cm -3 That concludes the report. Since the origin of electron trap E3 is believed to be Fe, the Fe concentration in samples B1 to B10 is 2.0 × 10⁻⁶ based on the E3 concentration. 14 cm -3 It was found that this was the case.

[0203] In addition, for samples B1 to B10, the electron trap E1 concentration and electron trap Ex concentration were 2 × 10⁻⁶, respectively.13 cm -3 The above is 1 x 10 14 cm -3 That was all.

[0204] In samples B1 to B10, the protective layer in the high-temperature reaction region was constructed of SiC, which resulted in a weakened protective layer under the GaN crystal growth temperature and the atmosphere of the source gas. Therefore, it is thought that trace amounts of Fe leaked from the carbon components constituting the high-temperature reaction region as impurities. This likely prevented a reduction in the electron trap E3 concentration. Furthermore, these impurities slightly reduced the crystal quality of the GaN crystal, leading to the formation of electron traps E1 or Ex within the crystal. Additionally, other impurities besides Fe were generated from the carbon components, which may have introduced electron traps E1 and Ex into the crystal.

[0205] As a result of the above findings, samples B1 to B10, based on the technique described in Reference 4, were unable to reduce both the C concentration and the electron trap E3 concentration, which are in a trade-off relationship.

[0206] (Samples A1-A5) In samples A1 to A5, as described above, the protective layer on the surface of the high-temperature reaction region was composed of an iron cyano complex. Of these, sample A5, which did not undergo a high-temperature bake step, and samples A1 and A2, which had a high-temperature bake temperature of less than 1500°C, had high concentrations of oxygen and carbon.

[0207] Furthermore, sample A5, which did not undergo a high-temperature bake step, had a high concentration of B. Also, samples A1 and A2, which were baked at a high temperature of less than 1500°C, had a high concentration of Si.

[0208] In contrast, in samples A3 and A4, where the protective layer on the surface of the high-temperature reaction region was composed of an iron cyano complex and a high-temperature bake step was performed at a temperature of 1500°C or higher without oxidation sequencing, the Si and B concentrations were below the detection limit, i.e., 1 × 10⁻⁶. 15 cm-3 It can be less than 1 × 10⁻¹⁰, and the O concentration and C concentration can also be 1 × 10⁻¹⁰. 15 cm -3 It was possible to keep it below the limit. In particular, in sample A4, which underwent a high-temperature bake step at 1600°C, the O concentration was kept below the lower limit of the raster change method, i.e., 5 × 10⁻⁶. 14 cm -3 The C concentration is set to less than 1.1 × 10, which is close to the lower limit of the raster change method. 14 cm -3 This was possible.

[0209] Furthermore, in the Si trace-doped samples A3' and A4', the electron trap E3 concentration in the crystal measured by the ICTS method was 1 × 10⁻⁶. 14 cm -3 It was possible to keep it below 2 × 10⁻⁶. In particular, in the Si trace doped sample A4', the electron trap E3 concentration was reduced to 2 × 10⁻⁶. 13 cm -3 It was possible to set it to less than.

[0210] In this experiment, the source of Fe, which is the cause of electron trap E3, was thought to be the carbon component in the high-temperature reaction region. However, in samples A3 and A4, the generation of Fe from the carbon component in the high-temperature reaction region was suppressed by the iron cyano complex coating. This suggests that Fe generation was suppressed regardless of the presence or absence of Si doping.

[0211] In other words, since the electron trap E3 concentration is reduced in the Si-trace doped samples A3' and A4', it is reasonable to assume that the electron trap E3 concentration is also reduced in samples A3 and A4, which were prepared under the same conditions except for the absence of Si doping, and may even be reduced further than in the Si-trace doped samples A3' and A4'.

[0212] Based on the above, and considering the results of the electron trap E3 concentration in the Si trace-doped samples A3' and A4', the electron trap E3 concentration in samples A3 and A4 is 1 × 10⁻⁶. 14 cm -3It was confirmed that it was less than 2 × 10⁻⁶. Furthermore, the electron trap E3 concentration in samples A3 and A4 was 2 × 10⁻⁶. 13 cm -3 It was confirmed to be less than [amount].

[0213] Furthermore, since the origin of E3 is believed to be Fe, in samples A3 and A4, the Fe concentration was set to 1 × 10 based on the E3 concentration. 14 cm -3 I confirmed that it was possible to set it to less than.

[0214] Furthermore, based on the results of the electron trap E1 and Ex concentrations in Si trace doped samples A3' and A4', the concentration of electron trap E1 in samples A3 and A4 was set to 3 × 10⁻⁶. 12 cm -3 The following conditions apply: The concentration of the electron trap Ex is set to 3 × 10⁻⁶. 13 cm -3 We confirmed that we were able to achieve the following.

[0215] Thus, we confirmed that in samples A3 and A4, we were able to dramatically reduce both the C concentration and the electron trap E3 concentration, which had been reported to be in a trade-off relationship, simultaneously.

[0216] Here, referring to Figure 8, we will explain the relationship between the C concentration and the electron trap E3 concentration in samples A3 and A4. Figure 8 is a diagram showing the relationship between the electron trap E3 concentration and the carbon concentration. Note that "pE+q" on each axis in Figure 8 represents p × 10⁻¹⁰ q It means that.

[0217] In Figure 8, "samples A3 and A4 series" refers to the results for samples A3 and A4, which were determined based on Si-trace doped samples A3' and A4', as well as the results for samples whose growth conditions were changed from those of samples A3 and A4, within the range that satisfies the requirements of the above-described embodiment.

[0218] Furthermore, Figure 8 shows data from prior art publications or patent documents. [Honda 2012] Honda, Shiojima JJAP 51 (2012) 04DF04 [Shiojima 2019] Shiojima et al., Phys. Status Solidi B 2019, 1900561 [Tanaka 2016] T. Tanaka, K. Shiojima, T. Mishima, Y. Tokuda, Jpn. J. Appl. Phys.55, 061101 (2016) [Horikiri 2018] Japanese Patent Application Laid-Open No. 2020-35980 [Zhang 2020] Zhang et al., J. Appl. Phys. 127, 215707 (2020) [Tokuda 2016] Yutaka Tokuda, ECS Transactions, 75 (4) 39-49 (2016) [Kanegae 2019] Kanegae et al., Appl. Phys. Lett. 115, 012103 (2019) [Narita 2020] Narita et al., Jpn. J. Appl. Phys. 59, 105505 (2020)

[0219] Also, "Equatin (1-1)", "Equation (1-2)", and "Equation 2" in Fig. 8 represent [E3]=1×10 14 , [E3]·[C] 2 =1×10 43 , [E3]·[C] 2 =1×10 42 respectively.

[0220] As shown in Figure 8, it was confirmed once again that in the conventional technology, there is a trade-off relationship between the C concentration and the electron trap E3 concentration in the GaN crystal.

[0221] Furthermore, data from previous papers and patent documents have failed to reduce both the C concentration and the electron trap E3 concentration in GaN crystals. In other words, data from previous papers and patent documents showed that [E3] ≥ 1 × 10 14 or [E3]·[C] 2 >1×10 43 That was the case.

[0222] In contrast, for samples A3 and A4, and the corresponding samples, the above formula (1-1) "[E3] < 1 × 10 14 While satisfying the condition, equation (1-2) "[E3]·[C] 2 ≤ 1 × 10 43 The above formula (2) "[E3]·[C]" is satisfied and preferably satisfies the above formula (2) "[E3]·[C] 2 ≤ 1 × 10 42 We confirmed that we were able to satisfy the condition.

[0223] Furthermore, in samples A3 and A4, no electron traps other than E1, E3, and Ex were present within the temperature range in which ICTS measurements were performed, i.e., the temperature range of 80K to 350K. Therefore, the total concentration of electron traps in the energy range of 0.1eV to 1.0eV from the lower end of the conduction band is 1 × 10⁻¹⁰ 14 cm -3 It was confirmed to be less than [amount].

[0224] As described above, we have confirmed that by using samples A3 and A4, which satisfy the requirements of the above-described embodiments, and equivalent samples, it is possible to realize GaN crystals of extremely high quality that could not be achieved with conventional technology.

[0225] (4) Supplement In the experiment described above, the electron trap concentrations in samples A3 and A4 were estimated based on the measurement results of electron trap concentrations in Si-doped samples A3' and A4', but this is not the only case.

[0226] For example, for samples A3 and A4, which originally have high resistance, 1 × 10 16 cm -3 When Si is intentionally ion-implanted at this concentration, direct measurement by the ICTS method becomes possible for both samples A3 and A4.

[0227] Even in that case, the electron trap E3 concentration was set to 2 × 10⁻⁶ in each of samples A3 and A4, which were ion-implanted with a small amount of Si. 13 cm -3 The concentration of electron trap E1 is set to less than 3 × 10⁻⁶. 12 cm -3 The following conditions apply: The concentration of the electron trap Ex is set to 3 × 10⁻⁶. 13 cm -3 We have confirmed that the following is possible.

[0228] <Preferred Embodiments of the Invention> Preferred embodiments of the present invention are described below.

[0229] (Note 1) In x Al y Ga 1-x-y A crystal represented by the chemical formula of N (where 0≦x≦1, 0≦y≦1, 0≦x+y≦1), The concentration of carbon in the aforementioned crystal is 1 × 10 15 cm -3 It is less than, The concentration of electron traps E3 in the crystal, located in the energy range of 0.5 eV to 0.65 eV from the lower end of the conduction band, is 1 × 10⁻¹⁶ 14 cm -3 Less than Nitride crystals.

[0230] (Note 2) The equation (1-2) is satisfied, [E3]·[C] 2 ≤ 1 × 10 43 ...(1-2) however, [C] is in units of cm -3 This is the concentration of carbon in the aforementioned crystal, [E3] is in cm -3 This is the E3 concentration in the aforementioned crystal. Nitride crystals as described in Appendix 1.

[0231] (Note 3) In x Al y Ga 1-x-y A crystal represented by the chemical formula of N (where 0≦x≦1, 0≦y≦1, 0≦x+y≦1), The following conditions satisfy equations (1-1) and (1-2): [E3]<1×10 14 ...(1-1) [E3]·[C] 2 ≤ 1 × 10 43 ...(1-2) however, [C] is in units of cm -3 This is the concentration of carbon in the aforementioned crystal, [E3] is the concentration of electron traps E3 located in the crystal in an energy range of 0.5 eV to 0.65 eV from the lower end of the conduction band, and the unit of the concentration of E3 is cm. -3 That is Nitride crystals.

[0232] (Note 4) The following equation (2) is satisfied: [E3]·[C] 2 ≤ 1 × 10 42 ...(2) Nitride crystals as described in Appendix 2 or 3.

[0233] (Note 5) The concentration of electron traps E1 in the crystal, located in the energy range of 0.15 eV to 0.3 eV from the lower end of the conduction band, is 3 × 10⁻¹⁰ 12 cm -3 The following is A nitride crystal as described in any one of the appendices 1 to 4.

[0234] (Note 6) The concentration of electron traps Ex in the crystal, located in the energy range of 0.68 eV to 0.75 eV from the lower end of the conduction band, is 3 × 10⁻¹⁰ 13 cm -3 The following is Nitride crystals as described in any one of the appendices 1 to 5.

[0235] (Note 7) The E3 concentration in the aforementioned crystal is 2 × 10 13 cm -3 Less than Nitride crystals as described in any one of the appendices 1 to 6.

[0236] (Note 8) The concentration of boron in the aforementioned crystal is 1 × 10 15 cm -3 Less than A nitride crystal as described in any one of the appendices 1 to 7.

[0237] (Note 9) The oxygen concentration in the aforementioned crystal is 1 × 10 15 cm -3 Less than A nitride crystal as described in any one of the appendices 1 to 8.

[0238] (Note 10) The total concentration of electron traps in the crystal, located in the energy range of 0.1 eV to 1.0 eV from the bottom of the conduction band, is 1 × 10⁻⁶ 14 cm -3 Less than A nitride crystal as described in any one of the appendices 1 to 9.

[0239] (Note 11) The silicon concentration in the aforementioned crystal is 1 × 10 15 cm -3 Less than Nitride crystals as described in any one of the appendices 1 to 10.

[0240] (Note 12) The resistivity under temperature conditions between 20°C and 300°C is 1 × 10⁻⁶ 6 It is greater than Ωcm A nitride crystal as described in any one of the appendices 1 to 11.

[0241] (Note 13) The resistivity under temperature conditions between 20°C and 300°C is 1 × 10⁻⁶ 7 It is greater than Ωcm Nitride crystals as described in Appendix 12.

[0242] (Note 14) The total concentration of Si and Ge in the aforementioned crystal is 1 × 10⁻⁶ 15 cm -3 The above, preferably 5 × 10 19 cm -3 The following is Nitride crystals as described in any one of the appendices 1 to 10.

[0243] (Note 15) The resistivity under temperature conditions between 20°C and 300°C is 1 × 10⁻⁶ 2 It is less than or equal to Ωcm, preferably 1 × 10⁻⁶ -4 It is greater than Ωcm, Furthermore, preferably, the free electron concentration under temperature conditions of 20°C to 300°C is 1 × 10⁻⁶. 15 cm -3 The above 5 x 10 19 cm -3 The following is Nitride crystals as described in Appendix 14.

[0244] (Note 16) The Mg concentration in the aforementioned crystal is 1 × 10 17 cm -3 That is all. Preferably, 5 × 10 20 cm -3 The following is Nitride crystals as described in any one of the appendices 1 to 10.

[0245] (Note 17) The resistivity under temperature conditions between 20°C and 300°C is 1 × 10⁻⁶.2 It is less than or equal to Ωcm. Preferably it is between 0.5 Ωcm and 100 Ωcm. Preferably, the hole concentration under temperature conditions of 20°C to 300°C is 2 × 10⁻¹⁰ 17 cm -3 The above 5 x 10 18 cm -3 The following is Nitride crystals as described in Appendix 16.

[0246] (Note 18) circuit board and Provided on the aforementioned substrate, In x Al y Ga 1-x-y A nitride crystal layer consisting of a crystal represented by the composition formula of N (where 0≦x≦1, 0≦y≦1, 0≦x+y≦1), It has, The carbon concentration in the nitride crystal layer is 1 × 10 15 cm -3 It is less than, The concentration of electron traps E3 in the crystal, located in the energy range of 0.5 eV to 0.65 eV from the lower end of the conduction band, is 1 × 10⁻¹⁶ 14 cm -3 Less than Semiconductor laminate.

[0247] (Note 19) circuit board and Provided on the aforementioned substrate, In x Al y Ga 1-x-y A nitride crystal layer consisting of a crystal represented by the composition formula of N (where 0≦x≦1, 0≦y≦1, 0≦x+y≦1), It has, The nitride crystal layer satisfies equations (1-1) and (1-2), [E3]<1×10 14 ...(1-1) [E3]·[C] 2 ≤ 1 × 10 43 ...(1-2) however, [C] is in units of cm -3 This is the concentration of carbon in the nitride crystal layer, [E3] is the concentration of electron traps E3 located in the crystal in an energy range of 0.5 eV to 0.65 eV from the lower end of the conduction band, and the unit of the concentration of E3 is cm. -3 That is Semiconductor laminate.

[0248] (Note 20) The process of preparing a reaction vessel to house the substrate, In the reaction vessel, the substrate is heated to a predetermined growth temperature, to which a Group III element raw material gas and a nitrogen raw material gas are supplied. x Al y Ga 1-x-y A step of epitaxially growing a nitride crystal represented by the composition formula of N (where 0≦x≦1, 0≦y≦1, 0≦x+y≦1) on the substrate, It has, The step of preparing the reaction vessel is: The step of preparing a container as the reaction vessel, which has a region heated to the growth temperature and a high-temperature reaction region in which the gas supplied to the substrate comes into contact, and at least a portion of the surface of the member constituting the high-temperature reaction region has a protective layer made of an iron cyano complex, A high-temperature bake process is performed to clean and modify the surface of the components constituting the high-temperature reaction region by heating the temperature of the high-temperature reaction region to a temperature of 1500°C or higher, while withholding the supply of the nitrogen raw material gas into the reaction vessel and supplying hydrogen gas and halogen-based gas into the reaction vessel. has A method for producing nitride crystals.

[0249] (Note 21) In the aforementioned high-temperature baking process, The pressure inside the reaction vessel is maintained at a pressure of 0.5 atmospheres or more and 2 atmospheres or less. Preferably, in the high-temperature baking step, Maintain the temperature of at least the high-temperature reaction region within the reaction vessel at a temperature of 1500°C or higher. Preferably, in the high-temperature baking step, The reaction is carried out while evacuating the reaction vessel. Preferably, the high-temperature baking process is carried out for 30 minutes or more. Method for producing nitride crystals as described in Appendix 20.

[0250] (Note 22) A reaction vessel for housing the substrate, A heating section for heating at least the substrate inside the reaction vessel, A gas supply system that supplies a group III element raw material gas and a nitrogen raw material gas to the substrate in the reaction vessel, The group III element raw material gas and the nitrogen raw material gas are supplied to the substrate heated to a predetermined growth temperature in the reaction vessel. x Al y Ga 1-x-y A control unit controls the heating unit and the gas supply system to epitaxially grow a nitride crystal represented by the composition formula of N (where 0≦x≦1, 0≦y≦1, 0≦x+y≦1) on the substrate, Equipped with, The reaction vessel has a high-temperature reaction region that is heated to the growth temperature and comes into contact with the gas supplied to the substrate, At least a portion of the surface of the member constituting the high-temperature reaction region has a protective layer made of an iron cyano complex, The control unit, prior to the epitaxial growth of the nitride crystals, performs a high-temperature bake treatment to clean and modify the surface of the components constituting the high-temperature reaction region by heating the temperature of the high-temperature reaction region to 1500°C or higher, withholding the supply of the nitrogen raw material gas into the reaction vessel, and supplying hydrogen gas and halogen-based gas into the reaction vessel. Nitride crystal manufacturing apparatus. [Explanation of symbols]

[0251] 10 Substrate (nitride crystal substrate) 20 Seed crystal substrate 21 GaN crystal film 30 circuit boards 40. Crystalline layer (nitride crystalline layer)

Claims

1. In ｘ Al ｙ Ga １－ｘ－ｙ A crystal represented by the chemical formula of N (where 0 ≤ x ≤ 1, 0 ≤ y ≤ 1, 0 ≤ x + y ≤ 1), The concentration of carbon in the aforementioned crystal is 1 × 10 １５ cm －３ It is less than, The concentration of electron traps E3 in the crystal, located in the energy range of 0.5 eV to 0.65 eV from the lower end of the conduction band, is 1 × 10⁻¹⁶ １４ cm －３ Less than Nitride crystals.

2. The equation (1-2) is satisfied, [E3]・[C] ２ ≦1×10 ４３ ・・・(1-2) however, [C] is in units of cm －３ This is the concentration of carbon in the aforementioned crystal, [E3] is in cm －３ This is the E3 concentration in the aforementioned crystal. The nitride crystal according to claim 1.

3. In ｘ Al ｙ Ga １－ｘ－ｙ A crystal represented by the chemical formula of N (where 0 ≤ x ≤ 1, 0 ≤ y ≤ 1, 0 ≤ x + y ≤ 1), The following conditions satisfy equations (1-1) and (1-2): [[3]<1×10] １４ ・・・(1-1) [E3]・[C] ２ ≦1×10 ４３ ・・・(1-2) however, [C] is in units of cm －３ This is the concentration of carbon in the aforementioned crystal, [E3] is the concentration of electron traps E3 located in the crystal in an energy range of 0.5 eV to 0.65 eV from the lower end of the conduction band, and the unit of the concentration of E3 is cm. －３ That is Nitride crystals.

4. The following equation (2) is satisfied: [E3]・[C] ２ ≦1×10 ４２ ・・・(2) The nitride crystal according to claim 2 or 3.

5. The concentration of electron traps E1 in the crystal, located in the energy range of 0.15 eV to 0.3 eV from the lower end of the conduction band, is 3 × 10⁻¹⁰ １２ cm －３ The following is A nitride crystal according to any one of claims 1 to 4.

6. The concentration of electron traps Ex in the crystal, located in the energy range of 0.68 eV to 0.75 eV from the lower end of the conduction band, is 3 × 10⁻¹⁰ １３ cm －３ The following is A nitride crystal according to any one of claims 1 to 5.

7. The concentration of boron in the aforementioned crystal is 1 × 10 １５ cm －３ Less than A nitride crystal according to any one of claims 1 to 6.

8. The oxygen concentration in the aforementioned crystal is 1 × 10 １５ cm －３ Less than A nitride crystal according to any one of claims 1 to 7.

9. The total concentration of electron traps in the crystal located in the energy range of 0.1 eV to 1.0 eV from the lower end of the conduction band is 1 × 10⁻⁶ １４ cm －３ Less than A nitride crystal according to any one of claims 1 to 8.

10. circuit board and Provided on the aforementioned substrate, In ｘ Al ｙ Ga １－ｘ－ｙ A nitride crystal layer consisting of a crystal represented by the composition formula of N (where 0 ≤ x ≤ 1, 0 ≤ y ≤ 1, 0 ≤ x + y ≤ 1), It has, The carbon concentration in the nitride crystal layer is 1 × 10 １５ cm －３ It is less than, The concentration of electron traps E3 in the crystal, located in the energy range of 0.5 eV to 0.65 eV from the lower end of the conduction band, is 1 × 10⁻¹⁶ １４ cm －３ Less than Semiconductor laminate.

11. circuit board and Provided on the aforementioned substrate, In ｘ Al ｙ Ga １－ｘ－ｙ A nitride crystal layer consisting of a crystal represented by the composition formula of N (where 0 ≤ x ≤ 1, 0 ≤ y ≤ 1, 0 ≤ x + y ≤ 1), It has, The nitride crystal layer satisfies formulas (1-1) and (1-2), [[3]<1×10] １４ ・・・(1-1) [E3]・[C] ２ ≦1×10 ４３ ・・・(1-2) however, [C] is in units of cm －３ This is the concentration of carbon in the nitride crystal layer, [E3] is the concentration of electron traps E3 located in the crystal in an energy range of 0.5 eV to 0.65 eV from the lower end of the conduction band, and the unit of the concentration of E3 is cm. －３ That is Semiconductor laminate.

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