Semiconductor equipment

Abstract

To provide a DCDC converter which achieves improvement in power conversion efficiency.SOLUTION: A semiconductor device includes: a transistor which functions as a switching element for controlling output power and comprises a back gate electrode for controlling a threshold voltage in addition to a normal gate electrode; and a back gate control circuit for controlling a level of a voltage applied to the back gate electrode according to a magnitude of an output voltage output from a DCDC converter. By controlling potential applied to the back gate electrode by the back gate control circuit, the threshold voltage can be adjusted in such a manner that on-resistance is decreased when the output power is large and the threshold voltage can be adjusted in such a manner that an off-state current is decreased when the output power is small. in addition, the transistor functioning as the switching element is an insulated gate filed effect transistor having an extremely small off-state current.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] This invention relates to a DC-DC converter, a power supply circuit, and a semiconductor device using a thin semiconductor film. ru. [Background technology]

[0002] In recent years, high mobility has been obtained from polysilicon and microcrystalline silicon, and amorphous silicon As a new semiconductor material that combines uniform device characteristics obtained by the process, oxide semiconductors Metal oxides, which exhibit semiconductor properties and are called conductors, are attracting attention. It is used in various applications; for example, indium oxide, a well-known metal oxide, is used in liquid It is used as a transparent electrode material in crystal display devices, etc. It is a metal oxide exhibiting semiconductor properties. For example, there are tungsten oxide, tin oxide, indium oxide, zinc oxide, and this A transistor that uses a metal oxide exhibiting such semiconductor properties in the channel formation region is already known. (Patent Documents 1 and 2) [Prior art documents] [Patent Documents]

[0003] [Patent Document 1] Japanese Patent Publication No. 2007-123861 [Patent Document 2] Japanese Patent Publication No. 2007-96055 [Overview of the project] [Problems that the invention aims to solve]

[0004] By the way, a DC-DC converter obtains a constant output voltage regardless of the input voltage value. It is a constant voltage circuit that can perform this function and is used in power supply circuits along with rectifier circuits, etc. In particular, A power supply circuit using a switching-type DCDC converter is called a switching power supply or a switching regulator.

[0005] The switching-type DCDC converter forms a voltage with a pulsed waveform from the input voltage by a switching element, and obtains an output voltage of a desired magnitude by smoothing or holding the voltage in a coil, a capacitive element, etc. In the case of the switching method, the internal loss of power in the DCDC converter can be theoretically reduced compared to the linear method that uses voltage drop by a resistor, so the power conversion efficiency is high and the heat generation accompanied by power loss can be reduced. Therefore, in semiconductor devices that require a large output voltage such as microprocessors, power supply circuits using switching-type DCDC converters are widely used. However, although the switching-type DCDC converter can obtain higher power conversion efficiency than the linear type, further improvement in power conversion efficiency is required to achieve lower power consumption of semiconductor devices. In particular, in the case of portable electronic devices that use various batteries such as primary batteries and secondary batteries, and power stored in capacitors, etc., in order to convert the voltage output from the battery or capacitor, etc. to an optimal magnitude, it is necessary to use a DCDC converter. Improving the power conversion efficiency of the DCDC converter leads to reducing the power consumption of the semiconductor device, and

[0006] eventually ensuring a longer continuous usage time of the portable electronic device using the above semiconductor device. However, although the switching-type DCDC converter can obtain higher power conversion efficiency than the linear type, further improvement in power conversion efficiency is required to achieve lower power consumption of semiconductor devices. In particular, in the case of portable electronic devices that use various batteries such as primary batteries and secondary batteries, and power stored in capacitors, etc., in order to convert the voltage output from the battery or capacitor, etc. to an optimal magnitude, it is necessary to use a DCDC converter. Improving the power conversion efficiency of the DCDC converter leads to reducing the power consumption of the semiconductor device, and eventually ensuring a longer continuous usage time of the portable electronic device using the above semiconductor device. converter. Improving the power conversion efficiency of the DCDC converter leads to reducing the power consumption of the semiconductor device, and eventually ensuring a longer continuous usage time of the portable electronic device using the above semiconductor device. to.

[0007] In view of the above problems, the present invention provides a DCDC converter that realizes improvement in power conversion efficiency, and One object of the present invention is to provide a power supply circuit using the above-described DC-DC converter. Alternatively, the present invention aims to reduce the power consumption of a semiconductor device using a DC-DC converter. One object of the present invention is to reduce the power consumption of a semiconductor device using a DC-DC converter. **Means for Solving the Problems**

[0008] The inventors of the present invention focused on the fact that the power conversion efficiency of a DC-DC converter depends on the on-resistance or off-current of a transistor that functions as a switching element for controlling the output power. When the output power of the DC-DC converter is small, it is considered that the power loss due to the off-current of the transistor leads to a reduction in power conversion efficiency rather than the power loss due to the on-resistance of the transistor. When the output power of the DC-DC converter is large, it is considered that the power loss due to the on-resistance of the transistor leads to a reduction in power conversion efficiency rather than the power loss due to the off-current of the transistor. The inventors of the present invention focused on the fact that the power conversion efficiency of a DC-DC converter depends on the on-resistance or off-current of a transistor that functions as a switching element for controlling the output power. When the output power of the DC-DC converter is small, it is considered that the power loss due to the off-current of the transistor leads to a reduction in power conversion efficiency rather than the power loss due to the on-resistance of the transistor. When the output power of the DC-DC converter is small, it is considered that the power loss due to the off-current of the transistor leads to a reduction in power conversion efficiency rather than the power loss due to the on-resistance of the transistor. When the output power of the DC-DC converter is large, it is considered that the power loss due to the on-resistance of the transistor leads to a reduction in power conversion efficiency rather than the power loss due to the off-current of the transistor. When the output power of the DC-DC converter is large, it is considered that the power loss due to the on-resistance of the transistor leads to a reduction in power conversion efficiency rather than the power loss due to the off-current of the transistor. When the output power of the DC-DC converter is large, it is considered that the power loss due to the on-resistance of the transistor leads to a reduction in power conversion efficiency rather than the power loss due to the off-current of the transistor.

[0009] Therefore, a DC-DC converter according to one aspect of the present invention includes a transistor that functions as a switching element, and in addition to a normal gate electrode, a back gate electrode for controlling the threshold voltage is provided facing the gate electrode with a channel formation region interposed therebetween. A back gate control circuit is provided for controlling the height of the potential applied to the back gate electrode according to the magnitude of the output power output from the DC-DC converter. By controlling the potential applied to the back gate electrode by the back gate control circuit, the threshold voltage is adjusted so that the on-resistance decreases when the output power is large (when it exceeds a predetermined value), and the threshold voltage is adjusted so that the off-current decreases when the output power is small (when it is below a predetermined value). Therefore, a DC-DC converter according to one aspect of the present invention includes a transistor that functions as a switching element, and in addition to a normal gate electrode, a back gate electrode for controlling the threshold voltage is provided facing the gate electrode with a channel formation region interposed therebetween. Therefore, a DC-DC converter according to one aspect of the present invention includes a transistor that functions as a switching element, and in addition to a normal gate electrode, a back gate electrode for controlling the threshold voltage is provided facing the gate electrode with a channel formation region interposed therebetween. A back gate control circuit is provided for controlling the height of the potential applied to the back gate electrode according to the magnitude of the output power output from the DC-DC converter. A back gate control circuit is provided for controlling the height of the potential applied to the back gate electrode according to the magnitude of the output power output from the DC-DC converter. By controlling the potential applied to the back gate electrode by the back gate control circuit, the threshold voltage is adjusted so that the on-resistance decreases when the output power is large (when it exceeds a predetermined value), and the threshold voltage is adjusted so that the off-current decreases when the output power is small (when it is below a predetermined value). By controlling the potential applied to the back gate electrode by the back gate control circuit, the threshold voltage is adjusted so that the on-resistance decreases when the output power is large (when it exceeds a predetermined value), and the threshold voltage is adjusted so that the off-current decreases when the output power is small (when it is below a predetermined value). By controlling the potential applied to the back gate electrode by the back gate control circuit, the threshold voltage is adjusted so that the on-resistance decreases when the output power is large (when it exceeds a predetermined value), and the threshold voltage is adjusted so that the off-current decreases when the output power is small (when it is below a predetermined value). This is possible.

[0010] Furthermore, in a DC-DC converter according to one aspect of the present invention, the switching element functions as The transistor is an insulated gate field-effect transistor (hereinafter referred to as, The above transistor is characterized by being a transistor. Semiconductors have a wider band gap than silicon and a lower intrinsic carrier density than silicon. The semiconductor having the above-described properties is characterized by including the body material in the channel-forming region. By including the body material in the channel formation region, the off-current is extremely low and the voltage withstand capability is high. Transistors can be realized. Examples of such semiconductor materials include silicone. An example is an oxide semiconductor having a band gap approximately three times larger than that of a standard semiconductor. By using a transistor as a switching element, high voltage is used when the output power is large. This prevents degradation of the switching element due to the application of the power, and when the output power is small, the power is turned off. The flow rate can be kept significantly low.

[0011] Furthermore, impurities such as water or hydrogen, which act as electron donors, are reduced, and acid Oxide semiconductors (purified OS) that have been purified by reducing elemental defects are, It is a type i (intrinsic semiconductor) or very close to type i. Therefore, the above oxide semiconductor is used in The inverter has the characteristic of having a remarkably low off-current. Specifically, highly purified oxide Physical semiconductors are processed using secondary ion mass spectrometry (SIMS). The hydrogen concentration was measured by spectrometry, which is 5 × 10⁻⁶. 19 / cm 3 below, Preferably 5 × 10 18 / cm 3 The following is more preferable: 5 x 10 17 / cm 3 Hereinafter, preferably is 1×10 16 / cm 3 or less. Also, the carrier density of the oxide semiconductor film that can be measured by Hall effect measurement is 1×10 14 / cm 3 or less, preferably 1×10 12 / cm 3 or less, more preferably 1×10 11 / cm 3 or less. Also, the band gap of the oxide semiconductor is 2 eV or more, preferably 2.5 eV or more, more preferably 3 eV or more above. By using an oxide semiconductor film that has been highly purified by sufficiently reducing the concentration of impurities such as moisture or hydrogen and reducing oxygen deficiency, the off-current of the transistor can be reduced.

[0012] Here, the analysis of the hydrogen concentration in the oxide semiconductor film will be mentioned. The measurement of the hydrogen concentration in the oxide semiconductor film and the conductive film is performed by SIMS. In principle, SIMS has difficulty in accurately obtaining data near the sample surface or near the laminated interface with a film of a different material. Therefore, when analyzing the thickness direction distribution of the hydrogen concentration in the film by SIMS, in the range where the target film exists, the average value in the region where there is no extreme fluctuation in the value and a substantially constant value can be obtained is adopted as the hydrogen concentration. Also, when the thickness of the film to be measured is small it may be impossible to find a region where a substantially constant value can be obtained due to the influence of the hydrogen concentration in the adjacent film. In this case, the maximum value or the minimum value of the hydrogen concentration in the region where the film exists is adopted as the hydrogen concentration in the film. Furthermore, in the region where the film exists if the film is thin, it may be impossible to find a region where a substantially constant value can be obtained due to the influence of the hydrogen concentration in the adjacent film. In this case, the maximum value or the minimum value of the hydrogen concentration in the region where the film exists is adopted as the hydrogen concentration in the film. Further, in the region where the film exists or the minimum value is adopted as the hydrogen concentration in the film. Furthermore, in the region where the film exists ​​Therefore, if there is no bell-shaped peak with a local maximum and no trough-shaped peak with a local minimum, then the inflection The value at the point is adopted as the hydrogen concentration.

[0013] Specifically, the off-current of a transistor using a highly purified oxide semiconductor film as the active layer. The low value can be proven through various experiments. For example, if the channel width is 1 × 10⁻⁶ 6 μm Even with an element with a channel length of 10 μm, the voltage between the source electrode and the drain electrode (drain) When the off-voltage is in the range of 1V to 10V, the off-current (voltage between the gate electrode and source electrode) The drain current (when the voltage is set to 0V or less) is below the measurement limit of the semiconductor parameter analyzer. That is, 1 × 10 -13 A characteristic of A or less can be obtained. In this case, the off-current is The off-current density, which corresponds to the value obtained by dividing by the transistor channel width, is 100 zA / μm or less. It can be seen that it is below. Also, connect the capacitive element and the transistor and let the current flow into the capacitive element. Alternatively, using a circuit that controls the charge flowing out of a capacitive element with the transistor, off-current density can be reduced. A measurement was performed. In this measurement, a highly purified oxide semiconductor film was applied to the transistor. Used in the channel formation region, the transition of the charge amount per unit time of the capacitive element is used to determine the transient. The off-current density of the transistor was measured. As a result, the current between the source and drain electrodes of the transistor was measured. When the voltage is 3V, an even lower off-current density of several tens of yA / μm can be obtained. Understood. Therefore, in a semiconductor device according to one aspect of the present invention, highly purified oxide semiconductor The off-current density of a transistor using a conductive film as the active layer is measured between the source electrode and the drain electrode. Depending on the voltage between them, the current may be 100 yA / μm or less, preferably 10 yA / μm or less, and more preferably Alternatively, it can be reduced to 1 yA / μm or less. Therefore, the highly purified oxide semiconductor film The transistor used as the active layer had an off-current density, and was made of crystalline silicon. It is significantly lower than that of a transistor.

[0014] Furthermore, oxide semiconductors are quaternary metal oxides, specifically In-Sn-Ga-Zn-O system oxide semiconductors. Conductors, and ternary metal oxides such as In-Ga-Zn-O oxide semiconductors and In-Sn-Z nO-based oxide semiconductors, In-Al-Zn-O-based oxide semiconductors, Sn-Ga-Zn-O-based Oxide semiconductors, Al-Ga-Zn-O based oxide semiconductors, Sn-Al-Zn-O based oxide semiconductors Conductors, and binary metal oxides such as In-Zn-O oxide semiconductors and Sn-Zn-O oxide semiconductors. Monocrystalline semiconductors, Al-Zn-O oxide semiconductors, Zn-Mg-O oxide semiconductors, Sn-Mg -O-based oxide semiconductors, In-Mg-O-based oxide semiconductors, In-Ga-O-based oxide semiconductors and Using In-O-based oxide semiconductors, Sn-O-based oxide semiconductors, Zn-O-based oxide semiconductors, etc. It is possible to be. In this specification, for example, In-Sn-Ga-Zn-O system Oxide semiconductors include indium (In), tin (Sn), gallium (Ga), and zinc (Zn). This means a metal oxide having [a certain characteristic], and the composition ratio is not particularly specified. Semiconductors may contain silicon.

[0015] Alternatively, oxide semiconductors have the chemical formula InMO3(ZnO). m (If m > 0, m is a natural number) It can be expressed as (not necessarily). Here, M is Zn, Ga, Al, Mn and Co It represents one or more metallic elements selected from the following. For example, M may be Ga, Ga and Al, G Examples include a and Mn, or Ga and Co. [Effects of the Invention]

[0016] In one aspect of the present invention, with the above configuration, when the output power is large, the on-resistance of the transistor By lowering the resistance, the transistor's off-current can be reduced when the output power is low. Therefore, it is important to understand that the main factors leading to power loss differ depending on the magnitude of the output power. By implementing measures to reduce power loss in accordance with those factors, the DC-DC converter and the above The power conversion efficiency of power supply circuits using DC-DC converters can be improved. Alternatively, By improving the power conversion efficiency of the DC-DC converter, This can reduce the power consumption of semiconductor devices. [Brief explanation of the drawing]

[0017] [Figure 1] A diagram showing the configuration of a DC-DC converter and a diagram showing the cross-sectional structure of a transistor. [Figure 2] A diagram showing an example of a DC-DC converter configuration. [Figure 3] A timing chart showing the operation of a DC-DC converter. [Figure 4] A timing chart showing the operation of a DC-DC converter. [Figure 5] Top view and cross-sectional view of a transistor. [Figure 6] A magnified view of a portion of the top view of a transistor. [Figure 7] A graph showing the measured value of drain current Id(A) against gate voltage Vgs(V). [Figure 8] A graph showing the relationship between output power Wout (W) and power conversion efficiency (%). [Figure 9] A diagram showing an example of the configuration of an output voltage control circuit. [Figure 10] A diagram showing an example of the configuration of a back gate control circuit. [Figure 11] A diagram showing an example of a DC-DC converter configuration. [Figure 12] A diagram showing the configuration of a lighting system. [Figure 13] A diagram showing the configuration of a solar cell. [Figure 14] A diagram illustrating the method for fabricating a semiconductor device. [Figure 15] A diagram showing the configuration of a transistor. [Figure 16] Circuit diagram of the characteristic evaluation circuit. [Figure 17] Timing chart for the characteristic evaluation circuit. [Figure 18] This diagram shows the relationship between the elapsed time (Time) and the potential of the output signal (Vout) in a characteristic evaluation circuit. [Figure 19] This figure shows the relationship between the elapsed time (Time) in the characteristic evaluation circuit and the leakage current calculated by the measurement. [Figure 20] A diagram showing the relationship between the potential at node A and the leakage current in a characteristic evaluation circuit. [Figure 21] A diagram of an electronic device. [Modes for carrying out the invention]

[0018] The embodiments of the present invention will be described in detail below with reference to the drawings. However, the present invention is... Not limited to the following description, the present invention may have forms and characteristics that do not depart from the spirit and scope of the invention. Those skilled in the art will readily understand that the details can be modified in various ways. Therefore, the present invention This shall not be interpreted as being limited to the contents of the embodiments described below.

[0019] In addition, integrated circuits such as microprocessors and image processing circuits, RF tags, storage media, and solar panels are also included. DCDC converters or power supplies for batteries, lighting devices using light-emitting elements, semiconductor display devices, etc. Any semiconductor device that can use a circuit is included in the scope of this invention. Semiconductor display devices include liquid crystal displays and light-emitting elements such as organic light-emitting elements (OLEDs). Light-emitting device equipped with electronic paper, DMD (Digital Micromirror) Device), PDP (Plasma Display Panel), FED (Fi DC-DC converters or power supply circuits such as Emission Display (ELD) Semiconductor display devices that possess this feature are included in this category.

[0020] (Embodiment 1) Figure 1 shows, as an example, the configuration of a DC-DC converter according to one aspect of the present invention, with Figure 1(A) illustrating this. vinegar.

[0021] The DC-DC converter 100 shown in Figure 1(A) applies a voltage (input voltage) to the input terminal IN. Power conversion that uses voltage to generate a constant voltage (output voltage) and outputs it from the output terminal OUT. It has a circuit 101. The power conversion circuit 101 has a transistor that functions as a switching element It has a starter 102 and a constant voltage generation unit 103.

[0022] When transistor 102 is ON, it supplies an input voltage to the constant voltage generation unit 103, and When the power supply is turned off, the constant voltage generation section is stopped. A fixed voltage such as ground is applied to 103. Therefore, the transistor 102 According to the switching, a pulsed signal in which the input voltage and fixed voltage alternate appears is generated, creating a constant voltage. It is supplied to the adult section 103.

[0023] The constant voltage generation unit 103 has one or more of the following: a coil, a capacitive element, and a diode. The constant voltage generation unit 103, upon receiving a pulsed signal, smooths the voltage of the signal. By converting or maintaining the output voltage, a constant output voltage is generated.

[0024] Furthermore, the DC-DC converter 100 shown in Figure 1(A) is when transistor 102 is ON. It has an output voltage control circuit 104 for controlling the ratio of the on-time to the off-time. In path 104, by controlling the ratio of the on time and off time of transistor 102 In the pulsed signal supplied to the constant voltage generation unit 103, the interval of the period during which the pulse appears This allows for control over the duty cycle.

[0025] The switching of transistor 102 is determined by the voltage Vgs between the gate electrode and the source electrode. It can be controlled. The output voltage control circuit 104 controls the time change of the gate voltage Vgs. This controls the ratio of the on time to the off time of transistor 102.

[0026] When the duty cycle changes, the output voltage value also changes. Specifically, when a power supply with an input voltage is used... The longer the proportion of time during which the rust occurs, the greater the difference between the output voltage and the fixed voltage. Conversely, The smaller the proportion of the time period during which pulses appear due to the input voltage, the smaller the difference between the output voltage and the fixed voltage. It will bloom.

[0027] In one embodiment of the present invention, in addition to the usual gate electrode, the transistor 102 has a threshold It is characterized by having a back gate electrode for controlling the value voltage. Specifically, ZISTA 102 consists of a semiconductor film that functions as an active layer, a gate electrode, and a semiconductor film sandwiched in between. It has a back gate electrode located in a position overlapping with the gate electrode. Furthermore, the transistor T102 consists of an insulating film formed between the gate electrode and the semiconductor film, and a back gate electrode and a semiconductor It has an insulating film formed between body membranes, and source and drain electrodes in contact with a semiconductor film. ru.

[0028] The DC-DC converter shown in Figure 1(A) uses the back gate power of transistor 102. It includes a back gate control circuit 105 for controlling the potential applied to the electrodes. The threshold voltage of 102 adjusts the back gate voltage Vbgs between the back gate electrode and the source electrode. By adjusting it, it can be controlled. And the back gate control circuit 105 is DCD The back gate power is determined according to the magnitude of the power output from the C converter 100 (output power). By controlling the potential applied to the electrodes, the back gate voltage Vbgs is adjusted, and transistor 10 The threshold voltage of step 2 is controlled according to the magnitude of the output power.

[0029] Specifically, the back gate control circuit 105, when the output power is large (exceeding a predetermined value) In this case, the back gate voltage Vbgs is increased, shifting the threshold voltage in the negative direction. This reduces the on-resistance of transistor 102. Also, the back gate control circuit 1 05 is the back gate voltage V when the output power is small (smaller than the specified value). By lowering BGS and shifting the threshold voltage in the positive direction, transistor 102 Reduce the off-current.

[0030] With the above configuration, if the output power of the DC-DC converter 100 is small, the transistor The power loss due to the off-current of transistor 102 is greater than the power loss due to the on-resistance of transistor 102. By prioritizing minimizing this, a reduction in power conversion efficiency can be prevented. Also, DCD When the output power of the C converter 100 is high, the off-current of transistor 102 Prioritize minimizing power loss due to the on-resistance of transistor 102 over power loss. This prevents a reduction in power conversion efficiency.

[0031] Unless otherwise specified, in this specification, off-current refers to the off-current of an n-channel transistor. In this state, the drain electrode is at a higher potential than the source electrode and gate electrode, When the potential of the gate electrode is 0 or less relative to the potential of the source electrode, the source electrode and This refers to the current flowing between the drain electrodes. Alternatively, in this specification, off-current means p In channel transistors, the drain electrode is lower than the source electrode and gate electrode. In a state where the potential is such that the potential of the gate electrode is 0 or less when the potential of the source electrode is used as a reference. This refers to the current flowing between the source electrode and the drain electrode when the voltage is above.

[0032] Furthermore, the DC-DC converter 100 according to one aspect of the present invention has a transistor 102 The semiconductor film has a wider band gap than silicon semiconductors and an intrinsic carrier density than silicon. It is characterized by using a wide-bandgap semiconductor material with a lower value than that. Examples include compound semiconductors such as silicon carbide (SiC) and gallium nitride (GaN), and oxides. Oxide semiconductors made of metal oxides such as zinc (ZnO) can be applied. Furthermore, compound semiconductors such as silicon carbide and gallium nitride must be single crystals, and single bonds To obtain a crystalline material, crystallization must be performed at a temperature significantly higher than the process temperature of oxide semiconductors. The manufacturing conditions are strict, such as requiring long lengths or epitaxial growth on special substrates. In both cases, it is difficult to deposit films on readily available silicon wafers or glass substrates with low heat resistance. However, oxide semiconductors can be fabricated by sputtering or wet processes (such as printing). It has advantages such as excellent mass-producibility. Furthermore, oxide semiconductors can be deposited even at room temperature. Therefore, it is possible to deposit films on glass substrates or on integrated circuits using semiconductor elements. Furthermore, it can accommodate larger substrates. Therefore, among the wide-bandgap semiconductors mentioned above... Furthermore, oxide semiconductors, in particular, have the advantage of being highly mass-producible. In the field of obtaining crystalline oxide semiconductors in order to improve performance (e.g., field-effect mobility) Even in this case, crystalline oxide semiconductors can be obtained by heat treatment at temperatures ranging from 200°C to 800°C. ru.

[0033] In the following explanation, an oxide, which has the above advantages, is described as a semiconductor with a large band gap. The example given uses a physical semiconductor.

[0034] By including a semiconductor material having the characteristics described above in the channel formation region, the off-current is reduced to an extreme value. This makes it possible to create transistor 102, which has the lowest voltage and yet the highest voltage rating. By using the transistor 102 having the above configuration as a switching element, the output power When the value is large, it is possible to prevent the degradation of the switching element due to the application of high voltage, and the output power If the value is small, the off-current can be kept significantly low.

[0035] Figure 1(B) shows the structure of a top-gate type transistor 102 having a channel etch structure. This is shown as an example in a cross-sectional view.

[0036] The transistor 102 shown in Figure 1(B) has a gate electrode 1 on a substrate 120 having an insulating surface. 10, the insulating film 111 on the gate electrode 110, and the gate electrode 1 with the insulating film 111 in between. The semiconductor film 112 overlapping with 10, and the source electrode 113 and drain on the semiconductor film 112. The electrode 114, the semiconductor film 112, the source electrode 113, and the insulating film on the drain electrode 114. 115 and the back gate electrode 1 which overlaps with the semiconductor film 112 with the insulating film 115 in between. It has 16. Furthermore, the back gate electrode 116 is covered with an insulating film 117. Transistor 102 may also have an insulating film 117 added to its components.

[0037] The transistor 102 shown in Figure 1(B) is a bottom-gate type and also has a source electrode. A portion of the semiconductor film 112 located between 113 and the drain electrode 114, i.e., the source electrode A portion of the semiconductor film 112 that does not overlap with electrode 113 and drain electrode 114 is etched. This illustrates the case where the channel etch structure is modified.

[0038] Note that Figure 1(B) illustrates the case where transistor 102 has a single-gate structure. However, transistor 102 has multiple electrically connected gate electrodes 110. Therefore, it may also be a multi-gate structure having multiple channel-forming regions.

[0039] Furthermore, inorganic materials such as silicon oxide and silicon oxide nitride containing oxygen are in contact with the semiconductor film 112. By using it in the insulating film 115, heat treatment to reduce moisture or hydrogen reduces the semiconductor Even if an oxygen vacancy occurs in the film 112, oxygen will be absorbed from the insulating film 115 into the semiconductor film 112. This configuration supplies oxygen, reduces oxygen deficiencies that act as donors, and satisfies the stoichiometric composition ratio of semiconductor materials. It is possible to do so. Furthermore, the semiconductor film 112 contains an amount of oxygen exceeding its stoichiometric composition. It is preferable that it is included. Therefore, the semiconductor film 112 can be brought closer to type i, and acid This reduces variations in the electrical characteristics of transistor 102 due to elemental defects, thereby improving electrical characteristics. It is possible.

[0040] Furthermore, by heat-treating the semiconductor film 112 in an oxygen atmosphere, oxygen is added to the oxide semiconductor. In addition, the oxygen vacancies that serve as donors in the semiconductor film 112 may be reduced. The temperature should be, for example, between 100°C and 350°C, preferably between 150°C and 250°C. The oxygen gas used in the above-mentioned heat treatment under an oxygen atmosphere must not contain water, hydrogen, etc. This is preferable. Alternatively, the purity of the oxygen gas introduced into the heat treatment device may be set to 6N (99.999 9% or more, preferably 7N (99.99999%) or more (i.e., the impurity concentration in oxygen is It is preferable that the concentration be 1 ppm or less, preferably 0.1 ppm or less.

[0041] Alternatively, oxygen can be added to the semiconductor film 112 using methods such as ion implantation or ion doping. Adding it may reduce the oxygen deficiency in the donor. For example, 2.45 GHz The solution is to add oxygen that has been plasma-generated by microwaves to the semiconductor film 112.

[0042] In this specification, an oxidized nitride is defined as a compound in which the oxygen content is higher than the nitrogen content. It is a substance, and nitride oxides have a higher nitrogen content than oxygen in their composition. It means substance.

[0043] Next, we will describe an example of a specific configuration of the power conversion circuit 101.

[0044] In this specification, "connection" means an electrical connection, and current, voltage, or potential is... This corresponds to a state where it can be supplied or transmitted. Therefore, a connected state is a state where it is directly connected. It does not necessarily refer to a state in which current, voltage, or potential is available or To enable transmission, circuit elements such as wiring, resistors, diodes, and transistors are used. This category also includes situations where the connection is indirect.

[0045] Furthermore, even if components that appear independent on the circuit diagram are connected to each other, in reality For example, when a part of the wiring also functions as an electrode, one conductive film can function as multiple components. It may also have the functions of a single conductive device. In this specification, connection means such a single conductive device. This category also includes cases where a membrane possesses the functions of multiple constituent elements.

[0046] Furthermore, the source and drain electrodes of a transistor are related to the polarity of the transistor and each electrode The name changes depending on the difference in potential applied to the poles. Generally, n-channel In a transistor, the electrode to which a low potential is applied is called the source electrode, and the electrode to which a high potential is applied is called the source electrode. The electrode that is subjected to low potential is called the drain electrode. Also, in a p-channel transistor, the potential is low. The electrode to which a current is applied is called the drain electrode, and the electrode to which a high potential is applied is called the source electrode. It will be discovered. Below, one of the source electrode and the drain electrode will be the first terminal, and the other the second terminal. Next, we will explain the configuration of the DC-DC converter.

[0047] A DC-DC converter according to one aspect of the present invention can obtain an output voltage that is large relative to the input voltage. It can be a boost type, or a buck type that can obtain a small output voltage relative to the input voltage. This is also good. Figure 2(A) shows the configuration of a step-down DC-DC converter.

[0048] The DC-DC converter shown in Figure 2(A) has a constant voltage generation unit 103 which is a diode 130, It has a 131 element and a capacitive element 132. Also, the DC-DC converter shown in Figure 2(A) is input An input terminal IN1 to which a power voltage is applied, an input terminal IN2 to which a fixed voltage is applied, and an output terminal It has a sub-outlet OUT1 and an output terminal OUT2.

[0049] Transistor 102 connects the input terminal IN1 and the cathode of diode 130. It is being controlled. Specifically, transistor 102 has its first terminal connected to input terminal IN1. The second terminal is connected to the cathode of diode 130. The coil has One of the pair of terminals is connected to the cathode of diode 130, and the other is connected to the DC-DC converter. It is connected to output terminal OUT1. Input terminal IN2 is connected to the anode of diode 130 and output It is connected to terminal OUT2. And, one of the pair of electrodes of the capacitive element 132 is One end is connected to output terminal OUT1, and the other end is connected to output terminal OUT2.

[0050] In the DC-DC converter shown in Figure 2(A), when transistor 102 is turned on, the input terminal A potential difference is created between the IN1 terminal and the OUT1 terminal, causing current to flow through the coil 131. Coil 131 becomes magnetized when the above current flows through it, and also induces the flow of current through self-induction. An electromotive force is generated in the opposite direction. Therefore, the output terminal OUT1 is supplied to the input terminal IN1. The voltage obtained by stepping down the input voltage is given. That is, the capacitive element 132 Between the pair of electrodes it has, a fixed voltage is supplied from the input terminal IN2, and the input voltage is stepped down. A voltage equivalent to the difference between the voltage obtained by doing so and the voltage obtained by doing so is given.

[0051] Next, when transistor 102 is turned off, between input terminal IN1 and output terminal OUT1 The current path that was formed is interrupted. Coil 131 opposes the above change in current. In other words, the electromotive force in the opposite direction to the electromotive force generated when transistor 102 is ON. Therefore, the current flowing through coil 131 is due to the voltage generated by the electromotive force mentioned above. , is maintained. That is, when transistor 102 is off, input terminal IN2 or A coil 131 and a diode 130 are connected between output terminal OUT2 and output terminal OUT1. A current path is formed. Therefore, the current is applied between the pair of electrodes of the capacitive element 132. The voltage is maintained to a certain extent.

[0052] The voltage held in the capacitive element 132 is the output voltage output from the output terminal OUT1. This corresponds to pressure. In the above operation, the higher the proportion of time that transistor 102 is ON, the better. Therefore, the voltage held by the capacitive element 132 will be close to the difference between the fixed voltage and the input voltage. The voltage can be stepped down to obtain an output voltage that is closer in magnitude to the input voltage. Conversely, The higher the proportion of time that transistor 102 is off, the more electricity is held in capacitive element 132. The voltage difference from the fixed voltage becomes smaller. Therefore, an output voltage closer in magnitude to the fixed voltage can be obtained. It can be lowered so that it can be lowered.

[0053] Next, Figure 2(B) shows the configuration of a boost-type DC-DC converter.

[0054] The DC-DC converter shown in Figure 2(B) has a constant voltage generation unit 103 which is a diode 130, It has a 131 element and a capacitive element 132. Also, the DC-DC converter shown in Figure 2(B) is input An input terminal IN1 to which a power voltage is applied, an input terminal IN2 to which a fixed voltage is applied, and an output terminal It has a sub-outlet OUT1 and an output terminal OUT2.

[0055] The pair of terminals on coil 131 are such that one is connected to input terminal IN1 and the other is connected to diode It is connected to the anode of coil 130. Transistor 102 is connected to the above coil 131 and diode Controls the connection between the node between 130 and the input terminal IN2 or output terminal OUT2. Specifically, transistor 102 has its first terminal connected to coil 131 and diode 1 It is connected to a node between 30, and its second terminal is the input terminal IN2 and the output terminal OUT2. It is connected to [the specified terminal]. Also, the cathode of diode 130 is connected to output terminal OUT1. The pair of electrodes of the capacitive element 132 are such that one is connected to the output terminal OUT1 and the other is connected to the output terminal OUT1. It is connected to power terminal OUT2.

[0056] In the DC-DC converter shown in Figure 2(B), when transistor 102 is turned on, the input terminal A current flows through coil 131 due to the potential difference between sub-IN1 and input terminal IN2. Coil 131 is magnetized by the current described above. Because an electromotive force is generated in the opposite direction to the current flow, the above current gradually increases.

[0057] Next, when transistor 102 is turned off, a shape forms between input terminal IN1 and input terminal IN2. The current path that was established is interrupted. In coil 131, the direction that opposes the above change in current In other words, an electromotive force is generated in the opposite direction to the electromotive force generated when transistor 102 is ON. Therefore, between the pair of terminals of the coil 131, the transistor 102 is turned on. Sometimes a voltage is generated that is proportional to the current flowing through coil 131. And coil 1 The current flowing through 31 is maintained by the voltage generated across the terminals. That is, a transistor. When 102 is off, coil 131 and a dash are connected between input terminal IN1 and output terminal OUT1. A current path is formed through the ion 130. At this time, the output terminal OUT1 receives an input The input voltage applied to the power terminal IN1 is added to the voltage generated across the terminals of coil 131. A voltage is applied, and this voltage is output from the DC-DC converter as the output voltage. The voltage equivalent to the difference between the voltage at output terminal OUT1 and the fixed voltage is the voltage of the capacitive element 132. It is held between the poles.

[0058] In the above operation, if the proportion of time that transistor 102 is ON is high, coil 131 The current flowing through it increases. Therefore, when transistor 102 is turned off, coil 1 The voltage across terminal 31 will increase, so the difference between the output voltage and the input voltage will increase. It can be boosted to that level. Conversely, the higher the proportion of time that transistor 102 is off, the higher the voltage can be boosted. Therefore, the current flowing through coil 131 decreases. As a result, transistor 102 turns off. Sometimes the voltage across the terminals of coil 131 becomes small, so the difference between the output voltage and the input voltage is The voltage can be increased to reduce its size.

[0059] Note that in Figures 1 and 2, the constant voltage generation unit 103 functions as a switching element. Although the present invention shows a configuration having only one sta 102, the present invention is not limited to this configuration. In one aspect of the invention, multiple transistors may function as a single switching element. i. When there are multiple transistors that function as a single switching element, the above multiple The transistors may be connected in parallel or in series, or in series It is also possible that they are connected in parallel. In any case, multiple transistors In one or more of the zistors, control the potential applied to the back gate electrode. The off-current or on-resistance of the switching element is adjusted to match the magnitude of the output power. This can improve power conversion efficiency.

[0060] In this specification, the state in which transistors are connected in series means, for example, the first Only one of the first or second terminals of the first transistor is the first terminal of the second transistor. This means that only one of the terminals, the first or second terminal, is connected. The state in which the transistors are connected in parallel means that the first terminal of the first transistor is connected to the second transistor. The first terminal of the first transistor is connected to the second terminal of the second transistor. This means that it is connected to a child.

[0061] Furthermore, the switching of transistor 102 is controlled by pulse width control (PWM). This can be done by (dth Modulation control), or by pulse frequency Control (PFM:Pulse Frequency Modulation control) l) This can also be done by this method.

[0062] Figure 3(A) shows the gate voltage Vgs of transistor 102 when pulse width control is used. The time evolution is shown as an example. In Figure 3(A), the gate voltage Vgs is a pulsed voltage. Furthermore, this shows the case where the pulse width Ton increases over time. In pulse width control, the time interval Tp at which pulses appear is kept constant. The pulse width Ton is made variable.

[0063] Figure 3(B) shows the change in the gate voltage Vgs shown in Figure 3(A) for transistor 102 This shows the time variation of the output power Wout obtained when the device is switched. Figure 3(B) As shown, increasing the pulse width Ton results in a larger output power Wout. .

[0064] In one aspect of the present invention, the back gate electrode is supplied with power according to the magnitude of the output power Wout. By controlling the potential, the back gate voltage Vbg between the back gate electrode and the source electrode can be controlled. The characteristic feature is the adjustment of s. As shown in Figure 3(B), the output power Wout is varied over time. Figure 3(C) shows an example of the time variation of the back gate voltage Vbgs in this case. vinegar.

[0065] In Figure 3(C), the back gate voltage Vbgs is increased in steps. That is, the output power When the power Wout is small, the back gate voltage Vbgs is low, and the output power W When output is large, the back gate voltage Vbgs is high. Therefore, the output voltage When the power Wout is small, the back gate voltage Vbgs is lowered, and transistor 102 By shifting the threshold voltage in the positive direction, the power generated by the off-current of transistor 102 can be reduced. This prioritizes minimizing losses and prevents a reduction in power conversion efficiency. Furthermore, it also reduces output power (W). When output is large, the back gate voltage Vbgs is increased, and the threshold of transistor 102 By shifting the voltage value in the negative direction, the power due to the on-resistance of transistor 102 can be reduced. This allows for prioritizing minimizing losses and preventing a reduction in power conversion efficiency.

[0066] Note that in Figure 3(C), the magnitude of the back gate voltage Vbgs is set in 7 steps, but The invention is not limited to this configuration. The magnitude of the back gate voltage Vbgs can be set in steps. If possible, you can obtain the above effects.

[0067] Furthermore, as shown in Figure 3(B), when the output power Wout is varied over time, the buck Another example of the time variation of the gate voltage Vbgs is shown in Figure 3(D). In Figure 3(D), The gate voltage Vbgs is being changed so that it increases linearly over time.

[0068] Alternatively, the back gate voltage Vbgs is like the gate voltage Vgs of transistor 102. It may also change in a pulsed manner. In this case, the gate voltage Vgs pulse appears. The period and the period during which the back gate voltage Vbgs pulse appears overlap, It is desirable to control the gate voltage Vbgs.

[0069] Furthermore, Figure 4(A) shows the gate voltage of transistor 102 when pulse frequency control is used. The time variation of the voltage Vgs is shown as an example. In Figure 4(A), the gate voltage Vgs has pulsed A voltage is applied, and the time interval Tp at which the pulse appears is... This shows the case where the pulse width decreases over time. In the case of pulse frequency control, the pulse width T The "on" state is kept constant, while the time interval Tp at which pulses appear is made variable.

[0070] Figure 4(B) shows the switching of transistor 102 according to the gate voltage Vgs shown in Figure 4(A). This shows the time variation of the output power Wout obtained when the device is switched on. (Figure 4(B)) To make the time interval Tp at which pulses appear smaller over time, Consequently, a large output power (Wout) can be obtained.

[0071] In one aspect of the present invention, pulse width control and pulse frequency control are combined to enable the trans The output power of the ZISTRA 102 may be adjusted by switching. For example, the output power may be For small values, pulse frequency control is better for controlling the switching frequency of transistor 102. The number can be kept low, and power loss due to switching of transistor 102 can be reduced. It can be suppressed. Conversely, if the output power is large, it is better to use pulse width control. The switching frequency of transistor 102 can be kept low, and the switching frequency of transistor 102 Power loss due to switching can be kept to a minimum. Therefore, it matches the magnitude of the output power. In addition, by switching between pulse width control and pulse frequency control, the power conversion efficiency is improved. It is possible.

[0072] (Embodiment 2) In this embodiment, the transistor configuration and characteristics of the DC-DC converter of the present invention are described. This section explains the properties and the measurement of the power conversion efficiency of a DC-DC converter using the above-mentioned transistors. do.

[0073] Figure 5(A) shows the top surface of a transistor in a DC-DC converter according to one embodiment of the present invention. An example of a diagram is shown. Also, in Figure 5(B), the dashed line A1-A2 in the top view shown in Figure 5(A) A cross-sectional view is shown.

[0074] The transistors shown in Figures 5(A) and 5(B) have an insulating film 501 on a glass substrate 500. And, the back gate electrode 502 on the insulating film 501, and the insulating film 5 on the back gate electrode 502 03 and the semiconductor film 502 overlapping with the back gate electrode 502 with the insulating film 503 in between. 4, source electrode 505 and drain electrode 506 on the semiconductor film 504, and semiconductor film 504 , insulating film 507 covering the source electrode 505 and the drain electrode 506, and insulating film 507 The gate electrode 508 overlaps with the back gate electrode 502 and the semiconductor film 504. It has the following characteristics.

[0075] Note that in Figure 5(A), to clearly show the structure of the transistor, the insulating film 501 and the insulating film are shown. 503 and insulating film 507 are omitted.

[0076] Specifically, the insulating film 501 contains silicon oxide nitride, and its film thickness is approximately 100 nm. The back gate electrode 502 contains tungsten and has a film thickness of 150 nm. The insulating film 503 contains silicon oxynitride, and its film thickness is 100 nm. Semiconductor film 504 contains an In-Ga-Zn-O oxide semiconductor, and its film thickness is 50 nm. The source electrode 505 and drain electrode 506 contain titanium, and their film thickness is 150 It is nm. Insulating film 507 contains silicon dioxide, and its film thickness is 300 nm. The electrode 508 contains indium tin oxide (ITSO) which contains silicon oxide, and The film thickness is 150 nm.

[0077] Furthermore, as shown in Figure 5(B), the channel formation region is the gate electric field of the semiconductor film 504. It overlaps with electrode 508 and is sandwiched between source electrode 505 and drain electrode 506. It is formed in region 510. Figure 6 shows the channel formation of the transistor shown in Figure 5(A). A magnified view of the area is shown. However, in Figure 6, the back gate electrode 502 is omitted. Yes, they are.

[0078] As shown in Figure 6, in the transistor shown in this embodiment, the source electrode observed from above The contours of 505 and the drain electrode 506 are comb-shaped and parallel to the surface of the substrate 500. It has a shape that includes irregularities. The source electrode 505 and the drain electrode 506 are The comb-like protrusions are arranged so that they interlock with each other, while maintaining a constant channel length L. Furthermore, the channel width W is the channel perpendicular to the direction in which the carrier flows. This represents the length of the channel-forming region, and in Figure 6, it corresponds to the length of the dashed line W1-W2.

[0079] In this embodiment, the channel length L was set to 3 μm and the channel width W to 10 cm.

[0080] Figure 7 shows the gate voltage Vgs(V) of a transistor having the structure shown in Figures 5 and 6. The measured drain current Id(A) is shown. In the measurement, the source electrode 505 and the drain electrode The voltage Vds between electrodes 506 was set to 5V. Also, in Figure 7, the backgear of the transistor is shown. The back gate voltage Vbgs between the source electrode and the source electrode is set to -2.5V, 0V, and 5V, respectively. The measured values ​​are shown for each setting of 10V.

[0081] As shown in Figure 7, the lower the back gate voltage Vbgs, the lower the transistor threshold voltage. You can see that it shifts to the positive side, and the off-current is reduced. Also, the back gate voltage Vb As gs increases, the transistor's threshold voltage shifts to the negative side, and the off-current increases. This means that the on-resistance decreases.

[0082] Next, the power of the DC-DC converter using the above transistor as a switching element The conversion efficiency was measured. The power conversion circuit of the DC-DC converter used for the measurement is shown in Figure 2. It has the same configuration as the power conversion circuit 101 of the DC-DC converter shown in B).

[0083] The switching of transistor 102 is performed by setting its gate voltage Vgs to 0V or 5V. It was controlled by [this method]. In addition, the duty cycle was adjusted using pulse width control, and the timing of pulse appearance was [this method]. The timing frequency was set to 97Hz. The duty cycle was determined by the gate of transistor 102. During the period when the voltage Vgs is 5V, that is, the period when transistor 102 is ON, This corresponds to the proportion of the period. Also, the input voltage applied to input terminal IN1 is 5V, and the output The output voltage supplied to power terminal OUT1 was fixed at 10V. The duty cycle was then set to The relationship between output power Wout (W) and power conversion efficiency (%) was varied from 40% to 68%. It was determined by measurement.

[0084] Figure 8 shows the relationship between output power Wout (W) and power conversion efficiency (%) obtained from the measurement results. As shown in Figure 8, when the output power Wout is small, the back gate voltage Vbgs is low. High power conversion efficiency was obtained as the output power Wout increased. In either case, power conversion efficiency increases, but when the back gate voltage Vbgs is low The increase in power conversion efficiency saturates and then decreases. In contrast, the back gate voltage Vbgs When the voltage is high, such as 5V or 10V, a saturation of this increase in power conversion efficiency is observed. Compared to cases where the back gate voltage Vbgs is low, such as -2.5V or 0V, this results in higher power consumption. Conversion efficiency was achieved.

[0085] Therefore, in one aspect of the present invention, when the output power is large, the back gate voltage Vbgs The above method involves increasing the voltage and, when the output power is low, lowering the back gate voltage Vbgs. As can be seen from the measurement results shown in Figure 8, the configuration has a DC power conversion efficiency that is high. A DC converter or power supply circuit can be obtained.

[0086] This embodiment can be implemented in appropriate combination with the above embodiment.

[0087] (Embodiment 3) This embodiment describes an example of the configuration of an output voltage control circuit when pulse width control is used. I will explain.

[0088] Figure 9 schematically shows an example of the configuration of an output voltage control circuit. Output voltage control circuit 1 shown in Figure 9 04 consists of resistor 200, resistor 201, error amplifier 202, phase compensation circuit 203, and comparator. It has a 204 meter, a triangular wave oscillator 205, and a buffer 206.

[0089] Resistors 200 and 201 are connected in series, and one terminal of resistor 200 is connected to a DC-DC converter. The output voltage from the converter's output terminal OUT1 is provided. Also, one resistor 201 One terminal is supplied with a fixed voltage such as ground. The other terminal of the 200 resistor is connected to the other terminal. The node where the terminal of the resistor 201 is connected to the other terminal of the resistor 201 is the reverse of the error amplifier 202. It is connected to the negative (-) input terminal. Therefore, the output voltage is supplied from the output terminal OUT1. This is divided by resistors 200 and 201, and is the inverting input terminal of error amplifier 202 ( -) is given

[0090] A reference voltage Vref1 is applied to the non-inverting input terminal (+) of the error amplifier 202. In the difference amplifier 202, the voltage applied to the inverting input terminal (-) and the reference voltage Vref1 are used. The values ​​are compared, the error is amplified, and the result is output from the output terminal of the error amplifier 202.

[0091] The voltage output from the error amplifier 202 is supplied to the phase compensation circuit 203. In path 203, the phase of the voltage output from error amplifier 202 is controlled. Phase compensation circuit 2 The voltage phase is controlled by 03, such as the error amplifier 202 or comparator 204. This prevents the amplifier's output voltage from oscillating and stabilizes the operation of the DC-DC converter. can.

[0092] The voltage output from the phase compensation circuit 203 is at the non-inverting input terminal (+) of the comparator 204. It is given to the inverting input terminal (-) of the comparator 204. A triangular wave or sawtooth wave signal is applied from port 5. Then, the comparison... In the Ta204, the period is constant, and the pulse width is applied to the non-inverting input terminal (+). It generates a square wave signal that changes according to the magnitude of the voltage. The output from comparator 204 is... The powered square wave signal is output from the output voltage control circuit 104 via the buffer 206. This is input to the gate electrode of transistor 102.

[0093] This embodiment can be implemented in appropriate combination with the above embodiment.

[0094] (Embodiment 4) This embodiment describes an example of the configuration of a back gate control circuit.

[0095] Figure 10 schematically shows an example of the configuration of a back gate control circuit. The control circuit 105 detects the magnitude of the current output from the output terminal OUT1. Circuit 210, the magnitude of the current detected by the current detection circuit 210, and output from output terminal OUT1 The power voltage conversion circuit 216 uses the output voltage to determine the potential of the buck gate electrode. They are doing it.

[0096] Specifically, in Figure 10, the current detection circuit 210 is a CT sensor (current transformer sensor) An example is shown where the sensor has 211, a rectifier 212, and an integrating circuit 213. CT sensor 211 is installed adjacent to conductors such as wiring that supply current to output terminal OUT1. And when current flows through the above conductor, a magnetic flux is generated around the conductor, which is the origin of the transformer. According to this principle, a current of a height corresponding to the magnitude of the above current is generated in the CT sensor 211. For example, the current flowing through the output terminal OUT1 is I0, and the CT sensor 211 generates... If the current being applied is Ict, then I0:Ict=N:1 (N>>1). That is, C The T sensor 211 can generate a small current Ict that is proportional to the current I0.

[0097] The rectifier 212 rectifies the current generated in the CT sensor 211, and then integrates it with the integrating circuit 21 Send to 3. The integrating circuit 213 is between the rectifier 212 and the node to which a fixed voltage is applied. It has a resistor 214 and a capacitive element 215 connected in parallel, and a low-pass filter It functions as a Luter. Therefore, the integrating circuit 213 is used to process the electricity rectified in the rectifier 212. The current is converted to a voltage, averaged, and output. The voltage Vct output from the integrating circuit 213 is: This is supplied to the power-voltage conversion circuit 216.

[0098] In Figure 10, the power-voltage conversion circuit 216 consists of a comparator 217 and an inverter 220. Power supply 221, and transistors 218 and 2 that function as switching elements. This illustrates the case where 19 is present.

[0099] The non-inverting input terminal (+) of comparator 217 receives the voltage V output from the integrating circuit 213. When ct is given, the output voltage of output terminal OUT1 is sent to the inverting input terminal (-), or the output terminal A voltage of a height corresponding to the voltage of child OUT1 is given as the reference voltage Vref2. The rectifier 217 compares the input voltage Vct with the reference voltage Vref2, and if voltage Vct > base In the case of a reference voltage Vref2, a high-level voltage is output, and the voltage Vct ≤ reference voltage Vref2 In this case, it outputs a low-level voltage.

[0100] The voltage output from comparator 217 is applied to the gate electrode of transistor 219. Furthermore, the voltage output from comparator 217 has polarity in inverter 220. This is inverted and applied to the gate electrode of transistor 218. Therefore, the comparator If the voltage output from 217 is high level, transistor 218 is off, Since terminal 219 is turned on, the potential Vbg1 from power supply 221 is converted to power voltage conversion circuit 216 Output from there. When the voltage output from comparator 217 is low level, the transient Since transistor 218 is ON and transistor 219 is OFF, the ground potential Vbg2 is The output is from the power voltage conversion circuit 216. In this embodiment, the potential Vbg2 is Although the example shows a rounded potential, the potential Vbg2 can be any potential other than ground. good.

[0101] The potential Vbg1 or potential Vbg2 output from the power voltage conversion circuit 216 is a backgear The output from the control circuit 105 is, for example, the battery of the transistor 102 shown in Figure 1(A). It is supplied to the gate electrode. That is, the DCDC converter is supplied by the back gate control circuit 105. The potential applied to the buck gate electrode of transistor 102 is determined according to the output power of the transistor. It can be changed.

[0102] In one aspect of the present invention, the current at output terminal OUT1 and the buck gauge are determined according to the output voltage. By changing the potential applied to the electrode, when the output power is large, the transistor 102 The threshold voltage is adjusted so that the resistance decreases, and if the output power is small, transistor 102 The threshold voltage can be adjusted so that the off-current decreases. Therefore, the DC-DC converter The power conversion efficiency of the device can be improved. And, as in one aspect of the present invention, DCD Monitor the output power of the C converter and adjust the potential of the buck gate electrode according to the output power. By controlling it, compared to simply monitoring the output voltage of the DC-DC converter, This allows the potential of the gate electrode to be set to a more appropriate value, and as a result, the power conversion efficiency can be improved. It can be improved.

[0103] Furthermore, by using the above DC-DC converter, the power conversion efficiency of the power supply circuit can be improved. This can be done. Alternatively, by improving the power conversion efficiency of the DC-DC converter, The power consumption of semiconductor devices using converters can be reduced.

[0104] This embodiment can be implemented in appropriate combination with the above embodiment.

[0105] (Embodiment 5) In this embodiment, a form of the DC-DC converter, in which the configuration of the power conversion circuit 101 is different from that of the DC-DC converter shown in FIG. 2, will be described.

[0106] FIG. 11(A) shows the configuration of a flyback-type DC-DC converter. As shown in FIG. 11(A), the DC-DC converter includes a constant voltage generation unit 103 having a diode 130, a capacitive element 132, and a transformer 133. Further, the DC-DC converter shown in FIG. 11(A) has an input terminal IN1 to which an input voltage is applied, an input terminal IN2 to which a fixed voltage is applied, an output terminal OUT1, and an output terminal OUT2.

[0107] The transformer 133 has a primary coil and a secondary coil provided with a common core at its center. The transistor 102 controls the connection between the input terminal IN2 and one terminal of the primary coil of the transformer 133. Specifically, the first terminal of the transistor 102 is connected to the input terminal IN2, and the second terminal thereof is connected to one terminal of the primary coil of the transformer 133. Also, the other terminal of the primary coil of the transformer 133 is connected to the input terminal IN1. Further, one of the pair of terminals of the secondary coil of the transformer 133 is connected to the anode of the diode 130,

[0108] and the other terminal is connected to the output terminal OUT2. The cathode of the diode 130 is connected to the output terminal OUT1. One of the pair of electrodes of the capacitive element 132 is connected to the output terminal OUT1, and the other is connected to the output terminal OUT2.

[0109] ​​Figure 11(B) also shows the configuration of a forward-type DC-DC converter. The DC-DC converter shown has a constant voltage generation unit 103 which includes diode 130 and diode 13 4. It has a coil 131, a capacitive element 132, and a transformer 135. Also shown in Figure 11(B). The DC-DC converter has an input terminal IN1 to which an input voltage is applied, and a terminal to which a fixed voltage is applied. It has an input terminal IN2, an output terminal OUT1, and an output terminal OUT2.

[0110] Transformer 135, like transformer 133 shown in Figure 11(A), has a common core at its center. It has a primary coil and a secondary coil, with a provided A. However, the transformer 133 is The starting positions of the first coil and the secondary coil are positioned on opposite sides, whereas transformer 13 In configuration 5, the starting points of the primary and secondary coils are located on the same side.

[0111] Transistor 102 has an input terminal IN2 and one of the primary coils of transformer 135. It controls the connection between the terminal and the other terminal. Specifically, transistor 102 has its first terminal It is connected to input terminal IN2, and its second terminal is the primary coil of transformer 135. It is connected to one of the terminals. Also, the other terminal of the primary coil of transformer 135 It is connected to input terminal IN1.

[0112] Furthermore, the secondary coil of transformer 135 has a pair of terminals connected to diode 1. It is connected to the anode 30, and the other terminal is connected to the output terminal OUT2. The cathode of diode 130 is connected to the cathode of diode 134 and one terminal of coil 131. The anode of diode 134 is connected to output terminal OUT2. Coil 131 The other terminal is connected to the output terminal OUT1. The pair of electrical components of the capacitive element 132 The poles are connected to output terminal OUT1 on one end and to output terminal OUT2 on the other end. Yes, they are.

[0113] In this embodiment, a flyback type DC-DC converter and a forward type DC converter are used. The configuration of the DC converter has been shown, but a DC-DC converter according to one aspect of the present invention is The present invention is not limited to these. A DC-DC converter according to one aspect of the present invention includes a switching element A switching method that allows the output voltage to be adjusted by the duty cycle. That's fine.

[0114] This embodiment can be implemented in appropriate combination with the above embodiment.

[0115] (Embodiment 6) In this embodiment, one form of a lighting device, which is a semiconductor device according to one aspect of the present invention, Let me explain. Figure 12 shows an example of the configuration of a lighting device.

[0116] The lighting device shown in Figure 12 includes an AC power supply 301, a switch 302, a rectifier circuit 303, and D It has a CDC converter 100 and a light-emitting element 304. Rectifier circuit 303 and DCD The C converter 100 constitutes the power supply circuit.

[0117] The DC-DC converter 100 shown in Figure 12 is a step-down type DC-DC converter as shown in Figure 2(A). It has the same configuration as the previous model. An illumination device according to one aspect of the present invention is the DCDC shown in Figure 2(A). It is not necessarily required to use converter 100, and DCD according to another aspect of the present invention It is also possible to use a C converter.

[0118] Specifically, in the lighting device shown in FIG. 12, the AC voltage from the AC power supply 301 is applied to the rectifier circuit 303 through the switch 30 2 and is rectified. The DC voltage obtained by rectification is input to the DC-DC converter 100, and its magnitude is adjusted and output. For the detailed operation of the DC-DC converter 100, refer to the description of FIG. 2(A) in Embodiment 1 . In this embodiment, in the DC-DC converter 100, the input voltage is stepped down and output .

[0119] Then, the voltage output from the DC-DC converter 100 is applied to the light-emitting element 304 , and the light-emitting element 304 emits light. Various light sources such as light-emitting diodes (LEDs) and organic light-emitting elements (OLEDs) can be used for the light-emitting element 304 .

[0120] Note that FIG. 12 shows the configuration of a lighting device using an AC power supply 301 as a power source , but the present invention is not limited to this configuration. A DC power supply may be used instead of the AC power supply as the power source . However, when using a DC power supply, the rectifier circuit 303 may not be provided

[0121] Also, FIG. 12 shows the configuration of a lighting device having an AC power supply 301 as a power source , but the lighting device according to one aspect of the present invention does not necessarily need to include a power source in its components .

[0122] This embodiment can be implemented in appropriate combination with the above embodiments

[0123] (Embodiment 7) In this embodiment, one form of a solar cell, which is one of the semiconductor devices according to one aspect of the present invention ​Let me explain. Figure 13 shows an example of a solar cell configuration.

[0124] The solar cell shown in Figure 13 consists of a photodiode 350, a switch 351, and a capacitive element 35 2, a DC-DC converter 100, a pulse width modulation circuit 353, an inverter 354, It has a bandpass filter 355.

[0125] The DC-DC converter 100 shown in Figure 13 is a boost-type DC-DC converter as shown in Figure 2(B). It has the same configuration as the previous one. A solar cell according to one aspect of the present invention is the DC-DC shown in Figure 2(A). It is not necessarily required to use converter 100, and DCD according to another aspect of the present invention It is also possible to use a C converter.

[0126] Specifically, in the solar cell shown in Figure 13, when light is shone on the photodiode 350, a voltage is generated. This occurs. The above voltage is smoothed in the capacitive element 352 and then passed through the switch 351. The signal is then input to the DC-DC converter 100. Furthermore, by providing the capacitive element 352, The pulsed current generated by the switching of switch 351 is transmitted to photodiode 350. This can prevent it from flowing into the water.

[0127] Then, the voltage input to the DC-DC converter 100 is... The signal is then adjusted in size before being output. Detailed operation of DC-DC converter 100 For details, refer to the description in Figure 2(B) in Embodiment 1. In this configuration, the input voltage is boosted and output in the DC-DC converter 100. .

[0128] The voltage output from the output terminal OUT1 of the DC-DC converter 100 is a DC voltage. The converter 354 converts the DC voltage output from the DC-DC converter 100 to an AC voltage. And, it outputs. In Figure 13, inverter 354 has four transistors 356~transistors An example is shown consisting of diode 359 and four diodes 360 to 363. Yes, they are.

[0129] Specifically, transistor 356 has its first terminal connected to the output terminal of the DC-DC converter 100. It is connected to OUT1, and its second terminal is connected to the first terminal of transistor 357. Yes. The second terminal of transistor 357 is the output terminal OUT2 of the DC-DC converter 100. It is connected to the first terminal of transistor 358 of the DC-DC converter 100. It is connected to output terminal OUT1, and its second terminal is connected to the first terminal of transistor 359. It is connected. The second terminal of transistor 359 is the output terminal of DC-DC converter 100. It is connected to OUT2. Diodes 360 to 363 are connected to transistor 35 6 to transistor 359 are connected in parallel. Specifically, transistor The anodes of diodes 360 and 363 are connected to the first terminal of transistor 356-359. Each is connected, and diode 3 is connected to the second terminal of transistors 356 to 359. The cathodes of diodes 60 and 363 are connected to each other.

[0130] Furthermore, the pulse width modulation circuit 353 is supplied with the voltage output from the DC-DC converter 100. It is obtained. The pulse width modulation circuit 353 operates when the above voltage is applied, and This generates a signal to control the switching of transistors 356 to 359.

[0131] Transistors 356 to 355 follow the above signal from pulse width modulation circuit 353. 9 performs switching, which activates the second transistor 356 of the inverter 354. The node to which the terminal and the first terminal of transistor 357 are connected, and the terminal of transistor 358 From the node where the second terminal and the first terminal of transistor 359 are connected, the PWM waveform is generated. The AC voltage it possesses is output.

[0132] Then, using the bandpass filter 355, the AC power output from the inverter 354 is filtered. By removing the high-frequency components of the voltage, an AC voltage with a sinusoidal wave can be obtained.

[0133] This embodiment can be implemented in appropriate combination with the above embodiment.

[0134] (Embodiment 8) In this embodiment, a transistor using silicon and a transistor using oxide semiconductor A method for manufacturing a semiconductor device according to one aspect of the present invention, which has a ta, will be described.

[0135] In one aspect of the present invention, at least in order to control the output power of the DC-DC converter It is sufficient to use an oxide semiconductor in the transistor that functions as a switching element. Other transistors besides the one that functions as the switching element are made of germanium. Conventional CMOs using silicon, silicon germanium, or single-crystal silicon carbide, etc. It can be formed using the S process. For example, a silicon transistor can be formed using the S process. Single-crystal semiconductor substrates such as silicon wafers, silicon thin films fabricated by the SOI method, gas phase It can be formed using silicon thin films produced by growth methods, etc.

[0136] First, as shown in Figure 14(A), a known method for fabricating a CMOS is used on the insulating surface of the substrate 700. Using this method, an n-channel transistor 704 and a p-channel transistor 705 are formed. In this embodiment, a single-crystal semiconductor film separated from a single-crystal semiconductor substrate is used. An example of forming an n-channel transistor 704 and a p-channel transistor 705. It is listed as follows.

[0137] Let's briefly explain one example of a specific method for fabricating single-crystal semiconductor films. First, the single crystal semi An ion beam, consisting of ions accelerated by an electric field, is injected into a conductive substrate, and the surface of the semiconductor substrate... In a region of a certain depth, a locally weakened brittle layer is formed due to the disruption of the crystal structure. The depth of the region where the embrittlement layer is formed depends on the acceleration energy of the ion beam and the ion beam's energy. It can be adjusted by the angle of incidence. Then, the semiconductor substrate and the insulating film 701 are formed. The substrate 700 and the insulating film 701 are bonded together so that the insulating film 701 is sandwiched between them. After stacking the semiconductor substrate and substrate 700, a portion of the semiconductor substrate and substrate 700 is coated with 1N / cm 2 More than 500N / cm 2 Preferably 11 N / cm 2 More than 20N / cm 2 below Apply pressure. When pressure is applied to a certain part, the semiconductor substrate and the insulating film 701 separate from that part. The bonding process begins, eventually extending to the entire surface that is in contact with the material. Next, a heat treatment is performed. Then, the microscopic voids present in the embrittlement layer expand and bond together, giving rise to voids with a large volume. As a result, in the embrittlement layer, the single-crystal semiconductor film, which is part of the semiconductor substrate, separates from the semiconductor substrate. Separate. The temperature of the above heat treatment should not exceed the strain point of the substrate 700. Then, By processing the above single-crystal semiconductor film into a desired shape by etching or the like, island-shaped semiconductor films are produced. 702, an island-shaped semiconductor film 703 can be formed.

[0138] The n-channel transistor 704 is formed using island-shaped semiconductor films 702 on an insulating film 701. The p-channel transistor 705 is configured such that the island-shaped semiconductor film 7 on the insulating film 701 It is formed using 03. Also, the n-channel transistor 704 is the gate electrode 70 It has 6, and the p-channel type transistor 705 has a gate electrode 707. Then, the n-channel transistor 704 has an island-shaped semiconductor film 702 and a gate electrode 706 An insulating film 708 is provided in between. The p-channel transistor 705 has an island-shaped semiconductor film 70 An insulating film 708 is provided between 3 and the gate electrode 707.

[0139] There are no major restrictions on the type of substrate that can be used as substrate 700, but at least, the subsequent processing It is necessary that it has sufficient heat resistance to withstand heat treatment. For example, substrate 700 Glass substrates, quartz substrates, ceramic substrates, etc., fabricated by fusion or float methods. It can be used. As for the glass substrate, if the temperature of the subsequent heat treatment is high, the strain point It is best to use one that can reach 730°C or higher. Also, a metal substrate including a stainless steel substrate or a silicon substrate A substrate with an insulating film formed on its surface may also be used. A flexible material such as plastic may also be used. Substrates made of synthetic resin generally tend to have a lower heat resistance temperature compared to the above substrates, It can be used if it can withstand the processing temperature during the manufacturing process.

[0140] In this embodiment, a single-crystal semiconductor film is used to form an n-channel transistor 704. Although an example of forming a p-channel type transistor 705 is described, the present invention is a structure It is not limited to the material. For example, polycrystalline, microcrystalline material formed on an insulating film 701 using vapor phase growth. A crystalline semiconductor film may be used, or an amorphous semiconductor may be crystalline using known techniques. It may be transformed. Known crystallization methods include laser crystallization using laser light and catalytic elements. There are crystallization methods that use [a specific element]. Alternatively, a combination of a crystallization method using a catalytic element and a laser crystallization method can be used. They can also be used together. Furthermore, when using a substrate with excellent heat resistance, such as quartz... , a thermal crystallization method using an electric furnace, a lamp annealing crystallization method using infrared light, a catalyst element A crystallization method combining the crystallization method used and a high-temperature annealing method of about 950°C may also be used. .

[0141] Furthermore, in Figure 14(A), after forming a conductive film on the insulating film 708, the conductive film is etched. By processing it into the desired shape using a tool, etc., together with the gate electrode 706 and gate electrode 707 , forming wiring 711.

[0142] Next, as shown in Figure 14(A), an n-channel transistor 704 and a p-channel transistor... An insulating film 712 is formed to cover the transistor 705 and the wiring 711. In the example shown, a case in which a single-layer insulating film 712 is used is illustrated, but the insulating film 712 is a single layer It is not necessary to be that way; two or more insulating films may be stacked and used as the insulating film 712.

[0143] The insulating film 712 will be made of a material that can withstand the heat treatment temperature in the subsequent manufacturing process. Furthermore, as insulating film 712, silicon oxide, silicon nitride, silicon oxide nitride, silicon nitride, aluminum nitride It is preferable to use materials such as aluminum or aluminum oxide.

[0144] The insulating film 712 may have its surface planarized by methods such as CMP.

[0145] Next, as shown in Figure 14(A), a gate electrode 713 is formed on the insulating film 712.

[0146] The materials for the gate electrode 713 are molybdenum, titanium, chromium, tantalum, tungsten, and Metallic materials such as odymium and scandium, and alloy materials with these metallic materials as the main component, are used in the development of the material. The electrolytic film, or nitrides of these metals, can be used in a single layer or in a multilayer structure. If it can withstand the heat treatment temperature performed in the process, then aluminum can be used as the metal material. Aluminum and copper can also be used. Aluminum or copper overcomes heat resistance and corrosion problems. To avoid this, it is best to use it in combination with a high-melting-point metallic material. Examples of high-melting-point metallic materials include: Molybdenum, titanium, chromium, tantalum, tungsten, neodymium, scandium, etc. are used. It is possible to be there.

[0147] For example, as a gate electrode 713 having a two-layer stacked structure, molybdenum on an aluminum film A two-layer laminated structure in which a copper film is laminated, a two-layer structure in which a molybdenum film is laminated on a copper film, on a copper film A two-layer structure consisting of a titanium nitride film or a tantalum nitride film, or a titanium nitride film and molybdenum A two-layer structure with a butene film is preferable. A gate electric element having a three-layer laminated structure For the 713, aluminum film, aluminum and silicon alloy film, aluminum and A titanium alloy film or an aluminum-neodymium alloy film serves as an intermediate layer, with a tungsten film, The structure consists of layers of tungsten nitride film, titanium nitride film, or titanium film stacked as upper and lower layers. This is preferable.

[0148] In addition, the gate electrode 713 contains indium oxide, indium oxide mixed tin oxide, and i Mixed zinc oxide, zinc oxide, aluminum zinc oxide, aluminum zinc oxynitride A transparent oxide conductive film such as gallium oxide or zinc oxide can also be used.

[0149] The film thickness of gate 713 is 10 nm to 400 nm, preferably 100 nm to 200 nm. In this embodiment, a sputtering method using a tungsten target is used to produce 150n After forming a conductive film for the gate electrode of m, the conductive film is processed into the desired shape by etching. The gate electrode 713 is formed by (patterning). A tapered shape at the ends of the poles is preferable because it improves the coverage of the gate insulating film layered on top. It seems so. Furthermore, the resist mask may be formed by an inkjet method. Since inkjet printing does not require a photomask, manufacturing costs can be reduced. .

[0150] Next, as shown in Figure 14(B), a gate insulating film 714 is formed on the gate electrode 713. The gate insulating film 714 is oxidized using plasma CVD or sputtering. Silicon film, silicon nitride film, silicon oxide nitride film, silicon oxide nitride film, aluminum oxide film, aluminum nitride Aluminum film, aluminum oxide nitride film, aluminum nitride oxide film, hafnium oxide film, The tantalum oxide film can be formed as a single layer or by stacking. The gate insulating film 714 is It is desirable to minimize the amount of impurities such as water and hydrogen. Oxidation by sputtering method. When depositing a silicon film, a silicon target or a quartz target is used as the target. The sputtering gas used is oxygen or a mixture of oxygen and argon.

[0151] Oxides that have been converted to type i or substantially converted to type i by removing impurities and reducing oxygen deficiency. Semiconductors (highly purified oxide semiconductors) are extremely sensitive to interface states and interface charges. Therefore, the interface between the highly purified oxide semiconductor and the gate insulating film 714 is important. Therefore, the gate insulating film (GI) that comes into contact with the highly purified oxide semiconductor requires high quality. .

[0152] For example, high-density plasma CVD using μ-waves (frequency 2.45 GHz) produces dense and dielectric materials. It is preferable because it can form a high-pressure, high-quality insulating film. The close contact with the gate insulating film reduces the interface state and improves the interface properties. Because it is possible.

[0153] Of course, if it can form a good insulating film as the gate insulating film 714, sputtering Other film deposition methods such as the ring method and plasma CVD can be applied. Furthermore, after film deposition... The insulating film may also be one whose film quality and interface properties with oxide semiconductors are improved by heat treatment. In any case, it is essential that the film quality as a gate insulating film is good, as well as gate insulation Any solution that can reduce the interface state density between the film and the oxide semiconductor and form a good interface would be ideal. .

[0154] Insulating film using a highly barrier material, silicon oxide film with a low nitrogen content, silicon oxide nitride A gate insulating film 714 having a structure in which an insulating film such as a film is laminated may be formed. In this case, insulating films such as silicon oxide films and silicon oxide nitride films are highly barrier insulating films and oxide semiconductors. It is formed between body membranes. Examples of highly barrier insulating films include silicon nitride films and silicon oxide nitride films. Examples include aluminum nitride films or aluminum nitride oxide films. By using an insulating film, impurities in the atmosphere such as moisture or hydrogen, or those contained within the substrate, can be prevented. Impurities such as alkali metals and heavy metals are present in the oxide semiconductor film and the gate insulating film 714. Alternatively, it can prevent the oxide semiconductor film from penetrating the interface between the film and other insulating films, or its vicinity. Furthermore, silicon oxide films and silicon oxide nitride films with a low nitrogen content are placed in contact with the oxide semiconductor film. By forming an insulating film, such as a thin film, the highly barrier insulating film comes into direct contact with the oxide semiconductor film. This can prevent that.

[0155] For example, the first gate insulating film is made by sputtering and has a film thickness of 50 nm to 200 nm. The following silicon nitride film (SiN y (y>0)) is formed, and the second gate on the first gate insulating film A silicon oxide film (SiO₂) with a thickness of 5 nm to 300 nm is used as the insulating film. x (x>0) It may also be layered to form a gate insulating film 714 with a thickness of 100 nm. This can be set appropriately depending on the characteristics required of the transistor, ranging from 350nm to 400nm. Even something around m would be fine.

[0156] In this embodiment, a silicon nitride film with a thickness of 50 nm formed by sputtering is applied to the film. A gate insulating film 71 has a structure in which silicon oxide films with a thickness of 100 nm formed by stacking. Form 4.

[0157] The gate insulating film 714 will come into contact with the oxide semiconductor that will be formed later. The oxide semiconductor is made of water Since the presence of elements adversely affects the properties, the gate insulating film 714 is limited to hydrogen, hydroxyl groups, and It is desirable that no moisture is present. The gate insulating film 714 should contain as little hydrogen, hydroxyl groups, and moisture as possible. To prevent contamination, preheating of the sputtering apparatus is performed as a pretreatment before film formation. The substrate 700 on which the gate electrode 713 is formed is preheated in the chamber, and moisture adsorbed on the substrate 700 Alternatively, it is preferable to desorb impurities such as hydrogen and exhaust the gas. The preheating temperature is 1 The temperature is between 0°C and 400°C, preferably between 150°C and 300°C. A cryopump is preferred as the exhaust means to be installed in the chamber. Note that the preheating process is omitted. It is also possible.

[0158] Next, a film thickness of 2 nm to 200 nm, preferably 3 nm, is applied to the gate insulating film 714. A oxide semiconductor film with a thickness of 50 nm or less, more preferably 3 nm to 20 nm, is formed. Oxide semiconductor films are made by using an oxide semiconductor as a target and the sputtering method. It forms a film. Also, oxide semiconductor films are formed under a noble gas (e.g., argon) atmosphere, an oxygen atmosphere, Alternatively, it may be formed by sputtering in a mixed atmosphere of a noble gas (e.g., argon) and oxygen. It is possible.

[0159] Furthermore, before depositing the oxide semiconductor film by sputtering, argon gas is introduced to form plasma Reverse sputtering is performed to generate sputtering, and dust adhering to the surface of the gate insulating film 714 is removed. It is preferable to do so. Reverse sputtering is a method in which voltage is not applied to the target side, and an argon atmosphere is used. Under atmospheric pressure, a voltage is applied to the substrate side using an RF power supply to form plasma near the substrate and modify the surface. This is a testing method. Note that nitrogen, helium, or other elements may be used instead of an argon atmosphere. Alternatively, the procedure may be carried out in an atmosphere where oxygen, nitrous oxide, etc., are added to an argon atmosphere. The procedure may also be carried out in an atmosphere containing chlorine, carbon tetrafluoride, etc., in addition to a argon atmosphere.

[0160] As mentioned above, oxide semiconductor films include the quaternary metal oxide In-Sn-Ga-Zn -O-based oxide semiconductors and ternary metal oxides such as In-Ga-Zn-O-based oxide semiconductors, In-Sn-Zn-O oxide semiconductors, In-Al-Zn-O oxide semiconductors, Sn-G a-Zn-O oxide semiconductors, Al-Ga-Zn-O oxide semiconductors, Sn-Al-Zn -O-based oxide semiconductors, In-Hf-Zn-O-based oxide semiconductors, In-La-Zn-O-based Oxide semiconductors, In-Ce-Zn-O based oxide semiconductors, In-Pr-Zn-O based oxide semiconductors Conductors, In-Nd-Zn-O oxide semiconductors, In-Pm-Zn-O oxide semiconductors, I n-Sm-Zn-O oxide semiconductors, In-Eu-Zn-O oxide semiconductors, In-Gd -Zn-O-based oxide semiconductors, In-Tb-Zn-O-based oxide semiconductors, In-Dy-Zn- O-based oxide semiconductors, In-Ho-Zn-O-based oxide semiconductors, In-Er-Zn-O-based oxide semiconductors Monocrystalline semiconductors, In-Tm-Zn-O oxide semiconductors, In-Yb-Zn-O oxide semiconductors In-Lu-Zn-O oxide semiconductors and binary metal oxides such as In-Zn-O acids Iridescent semiconductors, Sn-Zn-O oxide semiconductors, Al-Zn-O oxide semiconductors, Zn-M gO-based oxide semiconductors, Sn-Mg-O-based oxide semiconductors, In-Mg-O-based oxide semiconductors In-Ga-O oxide semiconductors, In-O oxide semiconductors, Sn-O oxide semiconductors Zn-O-based oxide semiconductors can be used.

[0161] In this embodiment, a t In-Ga-Zn-O based oxide film thickness of 30 nm obtained by sputtering using a GET. A thin film of a semiconductor material is used as an oxide semiconductor film. As the target, for example, In A target having a composition ratio of 2O3:Ga2O3:ZnO=1:1:1 [molar ratio] Use. Also, use the composition ratio In2O3:Ga2O3:ZnO=1:1:2 [molar ratio]. The target has In2O3:Ga2O3:ZnO = 1:1:4 [molar ratio] A target having the following can be used. In addition, a target containing In, Ga, and Zn can be used. The filling rate of the container is 90% or more and 100% or less, preferably 95% or more and less than 100%. By using a target with a high efficiency, the deposited oxide semiconductor film becomes a dense film.

[0162] Furthermore, when using an In-Zn-O based material as the oxide semiconductor, the combination of targets used The ratio is an atomic ratio, where In:Zn = 50:1 to 1:2 (which translates to In2O3 in mole ratio). :ZnO=25:1~1:4), preferably In:Zn=20:1~1:1 (in terms of mole ratio) When converted, In2O3:ZnO = 10:1 to 1:2), and more preferably In:Zn = 1 0.5:1~15:1 (converted to a mole ratio of In2O3:ZnO=3:4~15:2) For example, the target used to form In-Zn-O oxide semiconductors has an atomic ratio of When In:Zn:O = X:Y:Z, assume Z > 1.5X + Y. Set the ratio of Zn within the above range. By storing them compactly, mobility can be improved.

[0163] In this embodiment, the substrate is held in a processing chamber that is maintained under reduced pressure, and residual moisture in the processing chamber is removed. Sputtered gas from which hydrogen and water have been removed while removing the above target is introduced, and the above target is used An oxide semiconductor film is deposited on a substrate 700. During film deposition, the substrate temperature is set to 100°C to 600°C. The following is preferable: the temperature may be between 200°C and 400°C. The film is deposited while heating the substrate. This makes it possible to reduce the impurity concentration in the deposited oxide semiconductor film. Furthermore, damage caused by sputtering is reduced. In order to remove residual moisture in the processing chamber, It is preferable to use an adsorption-type vacuum pump. For example, a cryopump, an ion pump, It is preferable to use a titanium sublimation pump. Also, as an exhaust means, A cold trap may be added to the pump. Film deposition can be performed using a cryopump. When the room is vented, for example, hydrogen atoms, water (H2O) and other compounds containing hydrogen atoms (preferably Since substances such as compounds containing carbon atoms are exhausted, oxide semiconductors deposited in the deposition chamber are affected. The concentration of impurities in the body membrane can be reduced.

[0164] An example of film deposition conditions is a distance of 100 mm between the substrate and the target, and a pressure of 0.6 Pa. The conditions applied are a DC power supply of 0.5kW and an oxygen atmosphere (oxygen flow rate ratio of 100%). Furthermore, using a pulsed DC power supply can reduce dust generated during film formation, and the film This is preferable because it results in a uniform thickness distribution.

[0165] Furthermore, in order to minimize the presence of hydrogen, hydroxyl groups, and water in the oxide semiconductor film, As a pretreatment before film formation, the gate insulating film 714 is formed in the preheating chamber of the sputtering apparatus. The prepared substrate 700 is preheated to remove impurities such as moisture or hydrogen adsorbed on the substrate 700. It is preferable to exhaust the gases separately. The preheating temperature should be between 100°C and 400°C. The temperature is between 150°C and 300°C. The exhaust means installed in the preheating chamber is a coolant. An optoelectronic pump is preferred. Note that this preheating process can be omitted. Heating is performed before the deposition of the insulating film 723, and the substrate formed from electrodes 716 to 718 The same procedure can be applied to plate 700.

[0166] Next, as shown in Figure 14(B), the oxide semiconductor film is etched to form a desired shape. The gate insulating film 714 is processed (patterned) and placed in a position that overlaps with the gate electrode 713 on the gate insulating film 714. Island-shaped oxide semiconductor films 715 are formed.

[0167] A resist mask for forming island-shaped oxide semiconductor films 715 is formed by an inkjet method. It is also permissible to form the resist mask using an inkjet method, which eliminates the need for a photomask. Therefore, manufacturing costs can be reduced.

[0168] Furthermore, the etching for forming the island-shaped oxide semiconductor film 715 is performed by dry etching. Wet etching is also acceptable, and both can be used. Etching used in dry etching Examples of chlorine-containing gases include chlorine-based gases (such as chlorine (Cl2), boron trichloride, etc.) BCl3), silicon tetrachloride (SiCl4), carbon tetrachloride (CCl4), etc. are preferred. Also, fluorine-containing gases (fluorinated gases, such as carbon tetrafluoride (CF4) and sulfur hexafluoride (SF4)) 6) Nitrogen trifluoride (NF3), trifluoromethane (CHF3), etc., hydrogen bromide (HB3) r), oxygen (O2), and noble gases such as helium (He) and argon (Ar) can be added to these gases. Gases with added substances, etc., can be used.

[0169] As for dry etching methods, parallel plate type RIE (Reactive Ion Etching) Methods such as the ing method and ICP (Inductively Coupled Plasma: induction) A coupled plasma etching method can be used. The desired processing shape can be etched. To that end, etching conditions (amount of power applied to the coil-type electrode, amount of power applied to the electrode on the substrate side) Adjust the amount of power used, the electrode temperature on the substrate, etc., as appropriate.

[0170] For wet etching, we use ITO-07N (manufactured by Kanto Chemical Co., Ltd.) as the etching solution. It is acceptable. Also, the etching solution after wet etching will remain with the etched material. It is removed by washing. The waste etching solution containing the removed material is purified and contains The material extracted may be reused. The waste liquid after etching contains in the oxide semiconductor film By recovering and reusing materials such as indium, resources can be used effectively and costs can be reduced. It is possible.

[0171] Furthermore, before forming the conductive film in the next step, reverse sputtering is performed to create island-shaped oxide semiconductor films 715 and It is preferable to remove any resist residue or other material adhering to the surface of the gate insulating film 714. .

[0172] Furthermore, in oxide semiconductor films formed by sputtering, etc., water or hydrogen may be present as impurities. It can be present in large quantities. Water or hydrogen readily forms donor levels, thus oxidizing Water is an impurity for semiconductors. Therefore, in one aspect of the present invention, water in an oxide semiconductor film To reduce impurities such as carbon dioxide or hydrogen, nitrogen and acid are applied to the oxide semiconductor film 715. Under an atmosphere of solid, ultra-dry air, or a noble gas (argon, helium, etc.), oxides The semiconductor film 715 is subjected to heat treatment. The gas has a water content of 20 ppm or less, preferably. It is desirable that the concentration be 1 ppm or less, preferably 10 ppb or less.

[0173] By subjecting the oxide semiconductor film 715 to heat treatment, moisture or water in the oxide semiconductor film 715 is removed. The element can be removed. Specifically, at a temperature of 300°C to 700°C, preferably 30°C Heat treatment should be performed at a temperature between 0°C and 500°C. For example, 500°C for 3 to 6 minutes. It is sufficient to do so at the level shown below. If the RTA method is used for heat treatment, dehydration or dehydrogenation can be achieved in a short time. Because this can be done, processing can be performed even at temperatures exceeding the strain point of the glass substrate.

[0174] In this embodiment, an electric furnace, which is one of the heat treatment devices, is used.

[0175] Furthermore, the heat treatment device is not limited to electric furnaces, but also includes heat conduction or heat from heat-generating elements such as resistance heating elements. The device may include an apparatus that heats the object to be processed by radiation. For example, GRTA(Gas Rapid Thermal Anneal) equipment, LRTA (Lamp Rapid RTA (Rapid Thermal Angle) for Thermal Annealing devices, etc. A neal device can be used. The LRTA device uses halogen lamps and metal halide lamps. Lamps, xenon arc lamps, carbon arc lamps, high-pressure sodium lamps, high pressure A device that heats an object to be processed by radiation of light (electromagnetic waves) emitted from lamps such as mercury lamps. The GRTA device is a device that performs heat treatment using high-temperature gas. The gas contains A Inert gases such as argon or nitrogen, which do not react with the material being treated by heat treatment, are used. A gaseous substance is used.

[0176] In addition, during the heat treatment, water is added to nitrogen or a noble gas such as helium, neon, or argon. It is preferable that it does not contain nitrogen or hydrogen. Alternatively, nitrogen introduced into the heat treatment device is not included. Alternatively, the purity of noble gases such as helium, neon, and argon must be 6N (99.9999%) or higher. Preferably 7N (99.99999%) or higher (i.e., impurity concentration of 1 ppm or less, preferably It is preferable to keep the concentration at 0.1 ppm or less.

[0177] Through the above process, the hydrogen concentration in the oxide semiconductor film 715 is reduced, and its purity is increased. Yes, it is possible. This allows for the stabilization of oxide semiconductor films. Also, the glass transition temperature The following heat treatment results in an oxide semiconductor film with extremely low carrier density and a wide band gap. This allows for the formation of transistors using large-area substrates. This allows for increased mass production efficiency. Furthermore, the hydrogen concentration is reduced and the oxidation is purified. By using a monocrystalline semiconductor film, it is possible to fabricate transistors with high breakdown voltage and a high on / off ratio. It is possible.

[0178] Furthermore, when heating an oxide semiconductor film, the heating process depends on the material of the oxide semiconductor film and the heating conditions. Plate-like crystals may form on the surface. The plate-like crystals are formed relative to the surface of the oxide semiconductor film. It is preferable that the single crystal is oriented approximately perpendicular to the c axis. Furthermore, even if it is not a single crystal, each crystal It is preferable that the crystals are polycrystalline, with the c axis oriented approximately perpendicular to the surface of the oxide semiconductor film. Furthermore, in addition to being c-axis oriented, the above polycrystalline material has the ab-planes of each crystal coinciding. Alternatively, it is preferable that the a-axis or b-axis coincides. If the surface has irregularities, the plate-like crystals become polycrystalline. Therefore, the substrate surface should be as flat as possible. It is desirable to be straightforward.

[0179] Next, the insulating film 708, insulating film 712, and gate insulating film 714 are partially etched. Then, island-shaped semiconductor film 702, island-shaped semiconductor film 703, and contact hose reaching wiring 711 Forms a circle.

[0180] Then, a conductive film is formed to cover the oxide semiconductor film 715 using sputtering or vacuum deposition. Then, by patterning the conductive film through etching or the like, as shown in Figure 14(C) Electrodes 716 to 718, which function as source electrodes, drain electrodes, or wiring. To form.

[0181] Electrodes 716 and 717 are in contact with the island-shaped semiconductor film 702. Electrode 718 is in contact with the island-shaped semiconductor film 703. Electrode 719 is in contact with the wiring 711 and acid The electrode 720 is in contact with the oxide semiconductor film 715.

[0182] The conductive film material for electrodes 716 to 718 can be aluminum, chromium, copper, or tungsten. Elements selected from tul, titanium, molybdenum, and tungsten, or the elements mentioned above Examples include alloys as components, or alloy films combining the elements mentioned above. Chromium, copper, and other metal films are placed under or above chromium, tantalum, titanium, molybdenum, and tar. A configuration in which high-melting-point metal films such as sten are laminated is also possible. Alternatively, aluminum or Copper is used in combination with high-melting-point metal materials to avoid problems with heat resistance and corrosion. This is good. Examples of high melting point metal materials include molybdenum, titanium, chromium, tantalum, and tungsten. You can use materials such as ammonium compounds, neodymium, scandium, and yttrium.

[0183] Furthermore, the conductive film may be a single-layer structure or a multilayer structure of two or more layers. For example, silicon A single-layer structure containing an aluminum film, a two-layer structure with a titanium film laminated on top of an aluminum film, Ti A film is formed, then an aluminum film is layered on top of the Ti film, and then another Ti film is deposited on top of that. Examples include a three-layer structure.

[0184] Furthermore, the conductive film that forms electrodes 716 to 718 can also be formed from a conductive metal oxide. Good. Conductive metal oxides include indium oxide, tin oxide, zinc oxide, and indium oxide. Mixed tin oxide, mixed indium zinc oxide, or the aforementioned metal oxide material A material containing silicon or silicon oxide can be used.

[0185] If heat treatment is performed after the conductive film is formed, the conductive film must have heat resistance to withstand this heat treatment. It is preferable to do so.

[0186] Furthermore, during the etching of the conductive film, the oxide semiconductor film 715 is to be removed as little as possible. Adjust the materials and etching conditions as appropriate. Depending on the etching conditions, island-shaped The exposed portion of the oxide semiconductor film 715 is partially etched, forming grooves (recesses). It can happen.

[0187] In this embodiment, a titanium film is used as the conductive film. Therefore, ammonia and hydrogen peroxide solution are used. By using a solution containing (ammonia hydrogen water), the conductive film can be selectively wet-etched. It is possible, but the oxide semiconductor film 715 is also partially etched. Specifically, 31% by weight of the oxide semiconductor film is etched. A mixture of hydrogen oxide water, 28% by weight aqueous ammonia, and water in a volume ratio of 5:2:2. Use Monia hydrogen peroxide. Alternatively, use a gas containing chlorine (Cl2), boron trichloride (BCl3), etc. The conductive film may also be dry-etched using [a specific method / tool].

[0188] Furthermore, in order to reduce the number of photomasks and steps used in the photolithography process, Using a resist mask formed by a multi-level mask that gives the light multiple levels of intensity, The etching process may be performed. Multiple resist masks are formed using a multi-gradation mask. The resulting shape has a film thickness, and the shape can be further deformed by etching. Therefore, it can be used in multiple etching processes that process different patterns. A single multi-gradation mask can support at least two different patterns. A mask can be formed, thus reducing the number of exposure masks. Since the photolithography process can also be reduced, the process can be simplified.

[0189] Next, plasma treatment is performed using a gas such as N2O, N2, or Ar. The process removes adsorbed water and other substances adhering to the surface of the exposed oxide semiconductor film. Alternatively, plasma treatment may be performed using a mixed gas of oxygen and argon.

[0190] Furthermore, after the plasma treatment, as shown in Figure 14(D), electrodes 716 to 718 and Then, an insulating film 723 is formed so as to cover the oxide semiconductor film 715. The insulating film 723 is water It is desirable that the material contains as few impurities as possible, such as hydrogen and oxygen, even if it is a single-layer insulating film. It is fine, and it may also be composed of multiple layered insulating films. The insulating film 723 contains hydrogen. Then, the hydrogen penetrates the oxide semiconductor film, or the hydrogen extracts oxygen from the oxide semiconductor film. The back channel region of the oxide semiconductor film becomes low-resistance (n-type), and parasitic channels There is a risk that a hydrogen deposit may form. Therefore, the insulating film 723 will be a film that contains as little hydrogen as possible. Therefore, it is important not to use hydrogen in the film deposition method. The above insulating film 723 has barrier properties It is desirable to use materials with high barrier properties. For example, as an insulating film with high barrier properties, silicon nitride film, Use a silicon nitride film, an aluminum nitride film, or an aluminum nitride film, etc. This is possible. When using multiple layered insulating films, silicon oxide films with a low nitrogen content, acid An insulating film such as a silicon nitride film is used, rather than the above-mentioned insulating film with high barrier properties, an oxide semiconductor film 715 It is formed on the side closer to it. Then, an insulating film with a low nitrogen content is sandwiched in between, and electrode 716~ A highly barrier insulating film is formed so as to overlap the electrode 718 and the oxide semiconductor film 715. By using an insulating film with high barrier properties, the gate insulating film 714 can be used within the oxide semiconductor film 715. Inside, or at or near the interface between the oxide semiconductor film 715 and other insulating films, moisture or hydrogen This prevents any impurities from entering. Also, it can be used to contact the oxide semiconductor film 715. By forming an insulating film such as a silicon oxide film or silicon oxidnitride film with a low nitrogen ratio, a barrier is created. This prevents the insulating film made of a high-performance material from directly contacting the oxide semiconductor film 715. .

[0191] In this embodiment, on a silicon oxide film with a thickness of 200 nm formed by sputtering, An insulating film 723 having a structure in which silicon nitride films with a thickness of 100 nm formed by the method are stacked. Formed. The substrate temperature during film formation should be between room temperature and 300°C, and in this embodiment... Set the temperature to 100°C.

[0192] Furthermore, heat treatment may be performed after the insulating film 723 is formed. The heat treatment may involve nitrogen or superdry Preferably in a dry air or noble gas (argon, helium, etc.) atmosphere, 20 The process is carried out at temperatures between 0°C and 400°C (for example, between 250°C and 350°C). The above gas contains water. The amount is 20 ppm or less, preferably 1 ppm or less, preferably 10 ppb or less. This is preferable. In this embodiment, for example, a heat treatment at 250°C for 1 hour under a nitrogen atmosphere is performed. Alternatively, before forming electrodes 716 to 720, reduce moisture or hydrogen. Similar to the heat treatment performed on the oxide semiconductor film, a high-temperature, short-duration RTA treatment was performed. It is also acceptable. After the insulating film 723 containing oxygen is provided, a heat treatment is applied. As a result of the heat treatment performed on the oxide semiconductor film, oxygen deficiency was created in the oxide semiconductor film 715. Even if damage occurs, oxygen is supplied from the insulating film 723 to the oxide semiconductor film 715. Then, when oxygen is supplied to the oxide semiconductor film 715, This reduces the oxygen deficiency in the donor and makes it possible to satisfy the stoichiometric composition ratio. As a result, the oxide semiconductor film 715 can be made closer to type i, and the transient due to oxygen vacancy can be reduced. This heating treatment can reduce variations in the electrical characteristics of the device and improve its electrical properties. The timing of the process is not particularly limited as long as it is performed after the formation of the insulating film 723, and can be performed in other processes, for example. This can be combined with heat treatment during resin film formation or heat treatment to reduce the resistance of transparent conductive films. Therefore, the oxide semiconductor film 715 can be made closer to type i without increasing the number of process steps.

[0193] Furthermore, by heat-treating the oxide semiconductor film 715 under an oxygen atmosphere, the oxide semiconductor is subjected to acid By adding an element, the oxygen vacancies that act as donors in the oxide semiconductor film 715 may be reduced. The heat treatment temperature is, for example, 100°C or more and less than 350°C, preferably 150°C or more and 250°C. The process should be carried out at temperatures below °C. The oxygen gas used in the above-mentioned heat treatment under an oxygen atmosphere may contain water, hydrogen, etc. It is preferable that it is not included. Alternatively, the purity of the oxygen gas introduced into the heat treatment device should be 6N. 99.9999% or higher, preferably 7N (99.99999% or higher), (i.e., in oxygen) It is preferable to keep the impurity concentration at 1 ppm or less, preferably 0.1 ppm or less.

[0194] Alternatively, the oxide semiconductor film 715 can be modified using methods such as ion implantation or ion doping. Adding oxygen can reduce the oxygen deficiency in the donor. For example, 2.45G. The solution is to add oxygen, which has been plasma-generated using Hz microwaves, to the oxide semiconductor film 715.

[0195] Next, as shown in Figure 14(D), after forming a conductive film on the insulating film 723, the conductive film is By patterning, the back gate electrode 725 is positioned to overlap with the oxide semiconductor film 715. Then, after forming the back gate electrode 725, the back gate electrode 725 An insulating film 726 is formed to cover it. The back gate electrode 725 is gate electrode 713, or It is possible to form it using the same materials and structure as electrodes 716 to 718.

[0196] The film thickness of the back gate electrode 725 is 10 nm to 400 nm, preferably 100 nm to 20 nm. Let it be 0 nm. For example, a structure in which a titanium film, an aluminum film, and a titanium film are stacked. After forming the conductive film, a resist mask is formed by photolithography or the like, and then etching. By removing unnecessary parts through a process, the conductive film is processed (patterned) into the desired shape. Therefore, it is good to form the back gate electrode 725.

[0197] Through the above process, transistor 724 is formed.

[0198] Transistor 724 has a gate electrode 713 and a gate insulating film 714 on the gate electrode 713. And the oxide semiconductor film 71 overlaps the gate electrode 713 on the gate insulating film 714. 5 and a pair of electrodes 719 or electrodes 720 formed on the oxide semiconductor film 715, and An insulating film 723 formed on a monocrystalline semiconductor film 715, and an oxide semiconductor on the insulating film 723 It has a film 715 and a back gate electrode 725 that overlaps it. Furthermore, transistor 72 4 may include the insulating film 726 as one of its components. Transistor shown in Figure 14(D) 724 indicates that a portion of the oxide semiconductor film 715 is etched between electrode 719 and electrode 720. It is a channel-etched structure.

[0199] Note that while transistor 724 was explained using a single-gate transistor, it is not necessary to... Depending on the requirements, a channel can be formed by having multiple electrically connected gate electrodes 713. It is also possible to form transistors with a multi-gate structure that have multiple regions.

[0200] This embodiment can be implemented in combination with the above embodiment.

[0201] (Embodiment 9) In this embodiment, a tracer using an oxide semiconductor film having a different structure from that of Embodiment 8 is used. Let me explain about the 'njista'.

[0202] In the semiconductor device shown in Figure 15(A), similar to Embodiment 8, an n-channel transistor is used. It has 704 and a p-channel type transistor 705. And in Figure 15(A) On the n-channel transistor 704 and the p-channel transistor 705, oxide semiconductor A bottom-gate type transistor 724 with a channel protection structure using a conductive film is formed. Yes, they are.

[0203] The transistor 724 has a gate electrode 730 formed on the insulating film 712, and a gate electrode 7 The gate insulating film 731 on 30 and the gate electrode 730 overlapping on the gate insulating film 731 The oxide semiconductor film 732 and the gate electrode 730 are located at a position where they overlap, forming an island-shaped oxide A channel protection film 733 formed on the semiconductor film 732, and formed on the oxide semiconductor film 732 Electrodes 734 and 735 are attached, and on electrodes 734, 735 and the channel protective film 733 The insulating film 736 formed therein, and the insulating film 736 at a position overlapping with the oxide semiconductor film 732 It has a back gate electrode 737 formed on top. Furthermore, transistor 724 has An insulating film 738 formed on the gate electrode 737 may also be included as a component.

[0204] By providing the channel protection film 733, the channel formation region of the oxide semiconductor film 732 is formed. In the subsequent process, the plasma and etching agent used during etching of the area This prevents damage such as film wear. Therefore, it improves the reliability of transistors. It is possible.

[0205] The channel protective film 733 contains an oxygen-containing inorganic material (silicon oxide, silicon oxide nitride, silicon oxide nitride). Aluminum oxide, aluminum oxide, or aluminum nitride (such as charcoal) can be used. Nell protective film 733 is produced by vapor phase growth methods such as plasma CVD and thermal CVD, as well as sputtering. It can be formed using the method. The channel protective film 733 is shaped by etching after film formation. The shape is processed. Here, a silicon oxide film is formed by sputtering and then photolithography is performed. A channel protective film 733 is formed by etching using a mask.

[0206] By using an inorganic material containing oxygen in the channel protective film 733, moisture or hydrogen can be reduced. Even if oxygen vacancies occur in the oxide semiconductor film 732 due to the heat treatment for which the acid is produced, Oxygen is supplied to the ionized semiconductor film 732 from the channel protection film 733, and oxygen vacancies that serve as donors are created. It is possible to reduce the amount to achieve a configuration that satisfies the stoichiometric composition. Therefore, the channel formation region The region can be brought closer to type i, and the variation in the electrical characteristics of transistor 724 due to oxygen deficiency can be reduced. This can reduce sticking and improve electrical characteristics.

[0207] The semiconductor device shown in Figure 15(B) is similar to Embodiment 8 in that it uses n-type crystalline silicon. It has a channel-type transistor 704 and a p-channel-type transistor 705. In Figure 15(B), n-channel transistor 704 and p-channel transistor 7 A bottom-contact type transistor 724 using an oxide semiconductor film is formed on 05. It is.

[0208] Transistor 724 has a gate electrode 741 formed on an insulating film 712, and gate electrode 7 41 has a gate insulating film 742, and electrodes 743 and 744 on the gate insulating film 742, The oxide semiconductor film 745 overlaps the gate electrode 741 with the insulating film 742 in between. , an insulating film 746 formed on the oxide semiconductor film 745, and overlapping with the oxide semiconductor film 745 It has a back gate electrode 747 formed on the insulating film 746 at the position. Furthermore, Transistor 724 includes an insulating film 748 on the back gate electrode 747 as part of its components. You can do that.

[0209] This embodiment can be implemented in combination with the above embodiment.

[0210] (Embodiment 10) This embodiment describes an example of calculating the off-current of a transistor.

[0211] First, the configuration of the characteristic evaluation circuit used to calculate the off-current will be explained using Figure 16. In this embodiment, the characteristic evaluation circuit measures a plurality of measurement systems 801 connected in parallel with each other. To prepare. Specifically, in Figure 16, eight measurement systems 801 are connected in parallel for characteristic evaluation. The diagram illustrates the path (only two measurement systems are shown in Figure 16).

[0212] The measurement system 801 consists of transistor 811, transistor 812, capacitive element 813, and It includes transistor 814 and transistor 815.

[0213] Transistor 811 is a charge injection transistor. And transistor 811 is The first terminal is connected to a node to which a potential V1 is applied, and the second terminal is , is connected to the first terminal of transistor 812. The gate electrode of transistor 811 is It is connected to the node to which the potential Vext_a is given.

[0214] Transistor 812 is a transistor for evaluating leakage current. Leakage current includes the off-current of the transistor. And transistor 81 2 has its first terminal connected to the second terminal of transistor 811, and its second terminal However, it is connected to a node to which potential V2 is given. The gate voltage of transistor 812 The pole is connected to the node to which the potential Vext_b is given.

[0215] The first electrode of the capacitive element 813 is connected to the second terminal of transistor 811 and transistor 812 It is connected to the first terminal. The second electrode of the capacitive element 813 is given a potential V2. It is connected to a node.

[0216] The transistor 814 has its first terminal connected to a node to which a potential V3 is applied. Furthermore, its second terminal is connected to the first terminal of transistor 815. The gate electrode of 814 is the second terminal of transistor 811 and the first terminal of transistor 812. It is connected to the first electrode of the capacitive element 813. The point where the electrodes are connected is designated as node A.

[0217] The first terminal of transistor 815 is connected to the second terminal of transistor 814. Furthermore, its second terminal is connected to a node to which a potential V4 is applied. (Transistor) The gate electrode of the 815 is connected to the node to which the potential Vext_c is given.

[0218] The measurement system 801 then uses the second terminal of transistor 814 and the first terminal of transistor 815. The potential of the node to which the terminal is connected is output as the potential of the output signal, Vout.

[0219] In this embodiment, the transistor 811 includes an oxide semiconductor in its active layer. Furthermore, the size of the channel-forming region contained in the active layer is such that the channel length L = 10 μm, A transistor with a channel width W = 10 μm was used.

[0220] The channel formation region is the area in the semiconductor film between the source electrode and the drain electrode. This corresponds to the region that overlaps with the gate electrode, with the gate insulating film in between.

[0221] Furthermore, transistors 814 and 815 include an oxide semiconductor in their active layer. Furthermore, the size of the channel-forming region contained in the active layer is such that the channel length L = 3 μm, A transistor with a channel width W = 100 μm was used.

[0222] Furthermore, transistor 812 includes an oxide semiconductor in its active layer, with a source located on top of the active layer. The electrode and drain electrode are in contact, and the source electrode and drain electrode overlap with the gate electrode. A bottom gate structure without a lap region, having an offset region with a width of 1 μm. An inverter was used. By providing an offset region, the parasitic capacity can be reduced. Furthermore, as transistor 812, the channel formation region included in the active layer is as follows: Transistors of different sizes were used, as shown in conditions 1 to 6 of Table 1.

[0223] [Table 1]

[0224] If the charge injection transistor 811 is not provided in the measurement system 801, the capacitive element 81 When injecting charge into 3, it is necessary to turn on the leakage current evaluation transistor 812 once. In this case, the leakage current evaluation transistor 812 will enter a steady state from on to off. If the element requires time to complete the process, the measurement will take time. As shown in Figure 16, charge note The input transistor 811 and the leakage current evaluation transistor 812 are measured separately using the measurement system 80. By providing it at 1, the leakage current evaluation transistor 812 is always on during charge injection. It can be kept in a stable state. Therefore, the time required for measurement can be shortened.

[0225] Furthermore, the charge injection transistor 811 and the leakage current evaluation transistor 812 were measured. By providing both in system 801, each transistor can be made to an appropriate size. Yes, it is possible. Also, the channel width W of the leakage current evaluation transistor 812 is set to the charge injection transistor. By making the channel width W of the transistor 811 larger, the transient for leakage current evaluation To relatively reduce the leakage current components in the characteristic evaluation circuit, excluding the leakage current of the STA812. This allows for high-precision measurement of the leakage current of the leakage current evaluation transistor 812. It can be measured at the same time as the leakage current evaluation transistor 81 during charge injection. Since it is not necessary to turn on 2 once, some of the charge in the channel formation region flows into node A. There is no influence from the potential fluctuations at node A caused by this.

[0226] On the other hand, the channel width W of the charge injection transistor 811 is used for the leakage current evaluation transistor By making the channel width W of 812 smaller, the charge injection transistor 811 The current can be made relatively smaller. Also, during charge injection, the channel formation region The influence of potential fluctuations at node A due to some of the charge flowing into node A is also small.

[0227] Furthermore, as shown in Figure 16, by creating a structure in which multiple measurement systems 801 are connected in parallel, This allows for a more accurate calculation of the leakage current in the characteristic evaluation circuit.

[0228] Next, we will explain the specific method for calculating the transistor's off-current using the characteristic evaluation circuit shown in Figure 16. I will explain this.

[0229] First, the leakage current measurement method for the characteristic evaluation circuit shown in Figure 16 will be explained using Figure 17. Figure 17 illustrates a leakage current measurement method using the characteristic evaluation circuit shown in Figure 16. This is a timing chart.

[0230] The leakage current measurement method using the characteristic evaluation circuit shown in Figure 16 is performed during the write period and the hold period. It can be divided into sections. The operations during each period are explained below. Note that the writing period During both the interval and retention period, potentials V2 and V4 were set to 0V, potential V3 to 5V, and potential Vext_c was set to 0.5V.

[0231] First, during the writing period, the potential Vext_b is set so that transistor 812 is turned off. Set the potential to VL (-3V). Also, after setting the potential V1 to the write potential Vw, The potential Vext_a is set to a potential VH such that transistor 811 is turned on for a certain period of time. Set to 5V). With the above configuration, charge accumulates at node A, and the potential of node A is written The input potential Vw becomes equivalent to the value. Next, the potential Vext_a is set by transistor 811. Set the potential VL to a value that turns it off. Then, set the potential V1 to a value VSS (0V). ru.

[0232] Next, during the retention period, the change in the amount of charge held by node A results in the following changes in node A. The change in potential is measured. From the change in potential, the first terminal and the second terminal of transistor 812 are determined. The value of the current flowing between the terminals can be calculated. Therefore, the charge accumulation at node A can be calculated. This allows for the measurement of the change in potential at node A.

[0233] The accumulation of charge at node A and the measurement of the change in potential at node A (also called the accumulation and measurement operation). This is repeated. First, the first accumulation and measurement operation was repeated 15 times. In the measurement operation, a potential of 5V is input as the write potential Vw during the write period, and the retention period... A 1-hour hold period was performed in between. Next, the second accumulation and measurement operation was repeated twice. In the accumulation and measurement operation, the write potential Vw is set to 3.5V during the write period, and during the retention period... A 50-hour hold period was performed. Next, a third storage and measurement operation was performed once. In the measurement operation, the write potential Vw was set to 4.5V during the write period, and the hold period was 10 hours. The data was held. By repeatedly performing the accumulation and measurement operations, the measured current value reached a steady state. It can be confirmed that this is the value in the state. In other words, the current flowing through node A. I A Excluding transient currents (current components that decrease over time from the start of measurement) This allows for more accurate measurement of leakage current.

[0234] Generally, the potential V of node A A It can be expressed as a function of the output signal potential Vout as follows: It is possible.

[0235]

number

[0236] Also, the charge Q at node A. A The potential V of node A is A Capacity C connected to node A A , fixed Using a constant, it can be expressed as follows: Capacity C connected to node A A teeth, This is the sum of the capacitance value of the capacitive element 813 and the capacitance values ​​of the other capacitors besides the capacitive element 813.

[0237]

number

[0238] Current I at node A A This is the charge flowing into node A (or the charge flowing out of node A) Since it is a time derivative, the current I at node A A It can be expressed as follows:

[0239]

number

[0240] For example, let Δt be approximately 54,000 seconds. Capacity C connected to node A. A and output signal From the potential Vout, the current I at node A A Since it is possible to determine the characteristics of the evaluation circuit The current can be calculated.

[0241] Next, the measurement results of the output signal potential Vout using the measurement method with the above characteristic evaluation circuit and The leakage current value of the characteristic evaluation circuit calculated from the measurement results is shown.

[0242] Figure 18 shows, as an example, the above measurements under conditions 1, 2, and 3 (first accumulation and measurement). Figure 19 shows the relationship between the elapsed time (Time) during the constant operation and the potential (Vout) of the output signal. The relationship between the elapsed time (Time) related to the above measurement and the leakage current calculated by the measurement is As shown, the potential Vout of the output signal fluctuates from the start of measurement, and in order to reach a steady state... It appears that more than 10 hours will be needed.

[0243] Furthermore, Figure 20 shows the potential of node A under conditions 1 to 6, as estimated by the above measurements. The relationship between this and leakage current is shown. In Figure 20, for example, under condition 4, the potential of node A is 3. At 0V, the leakage current is 28yA / μm. The leakage current is measured by transistor 812. Since this includes the off-current, the off-current of transistor 812 is also considered to be 28 yA / μm or less. It is possible.

[0244] As described above, it contains a highly purified oxide semiconductor layer that functions as a channel-forming layer. In a characteristic evaluation circuit using a transistor, the leakage current is sufficiently low, It can be seen that the off-current of the inverter is sufficiently small. [Examples]

[0245] By using a semiconductor device according to one aspect of the present invention, it is possible to provide an electronic device with low power consumption. This is possible. In particular, in the case of portable electronic devices that have difficulty receiving a constant power supply, this By adding a low-power semiconductor device according to one aspect of the invention to its components, This offers the advantage of longer continuous use time.

[0246] A semiconductor device according to one aspect of the present invention is a display device, a notebook personal computer, and a recording device. Image playback device equipped with a media (typically DVD: Digital Versatile) (A device that plays recording media such as discs and has a display capable of displaying the images thereof) It is possible to use a semiconductor device according to one aspect of the present invention. As sub-devices, mobile phones, portable game consoles, personal digital assistants, e-books, video cameras, etc. Digital still camera, goggle-type display (head-mounted display), navigation Audio systems, sound reproduction devices (car audio, digital audio players, etc.) , photocopiers, fax machines, printers, multifunction printers, ATMs (A Examples include electronic devices (TM), vending machines, etc. Specific examples of these electronic devices are shown in Figure 21.

[0247] Figure 21(A) shows a portable game console, comprising a casing 7031, casing 7032, display unit 7033, Display unit 7034, microphone 7035, speaker 7036, operation key 7037, stand It has illustrations 7038, etc. A semiconductor device according to one aspect of the present invention is a drive for a portable game console. It can be used in integrated circuits for controlling the operation of portable game consoles. By using a semiconductor device according to one aspect of the present invention in the integrated circuit, a portable game controller with low power consumption can be created. We can provide a mobile game console. Note that the portable game console shown in Figure 21(A) has two It has a display unit 7033 and a display unit 7034, but the number of display units that a portable game console has This is not limited to this.

[0248] Figure 21(B) is a mobile phone, comprising a housing 7041, a display unit 7042, an audio input unit 7043, It has an audio output unit 7044, an operation key 7045, a light receiving unit 7046, etc. By converting the light received into an electrical signal, external images can be captured. A semiconductor device according to one aspect of the invention is used in an integrated circuit for controlling the operation of a mobile phone. This can be done. A semiconductor device according to one aspect of the present invention can be used in an integrated circuit for controlling the operation of a mobile phone. By using this technology, it is possible to provide mobile phones with low power consumption.

[0249] Figure 21(C) shows a portable information terminal, consisting of a housing 7051, a display unit 7052, and operation keys 7053. The portable information terminal shown in Figure 21(C) has a modem built into the casing 7051. It may also be done. A semiconductor device according to one aspect of the present invention is a collection for controlling the drive of a portable information terminal. It can be used in integrated circuits. The present invention is used in integrated circuits for controlling the operation of portable information terminals. By using a semiconductor device according to one embodiment, it is possible to provide a portable information terminal with low power consumption. can.

[0250] Figure 21(D) shows a lighting device, which includes a housing 7081, a light source 7082, etc. Light source 7082 A light-emitting element is provided therein. A semiconductor device according to one aspect of the present invention is a light source 7082 It can be used in integrated circuits for controlling the drive. For controlling the drive of a lighting device. By using a semiconductor device according to one aspect of the present invention in an integrated circuit, a lighting device with low power consumption can be made. It can be provided.

[0251] This embodiment can be implemented in appropriate combination with the above embodiment. [Explanation of symbols]

[0252] 100 DC-DC converters 101 Power Conversion Circuit 102 transistors 103 Constant voltage generation unit 104 Output Voltage Control Circuit 105 Back gate control circuit 110 Guard Station 111 Insulating Film 112 Semiconductor film 113 Source electrode 114 Drain electrode 115 Insulating film 116 Back gate 117 Insulating Film 120 circuit boards 130 diodes 131 coils 132 Capacitive elements 133 Transformers 134 diodes 135 Transformers 200 resistor 201 Resistor 202 Error Amplifier 203 Phase compensation circuit 204 Comparator 205 Triangular wave oscillator 206 buffers 210 Current detection circuit 211 CT sensor 212 Rectifier 213 Integral circuit 214 resistors 215 Capacitive element 216 Power Voltage Conversion Circuit 217 Comparator 218 transistors 219 transistors 220 Inverter 221 Power supply 301 AC power supply 302 Switch 303 Rectifier circuit 304 Light-emitting element 350 Photodiodes 351 switches 352 Capacitive elements 353 Pulse width modulation circuit 354 Inverter 355 Bandpass Filter 356 transistors 357 transistors 358 transistors 359 transistors 360 diodes 363 diodes 500 glass substrates 501 Insulating Film 502 Terminal 503 Insulating film 504 Semiconductor film 505 Source electrode 506 Drain electrode 507 Insulating film 508 Back gate electrode 510 areas 700 circuit boards 701 Insulating Film 702 Semiconductor film 703 Semiconductor film 704 n-channel transistor 705 p-channel transistor 706 Gateway 707 Gate Station 708 insulating film 711 Wiring 712 Insulating film 713 gate 714 Gate Insulator 715 Oxide semiconductor film 716 Electrode 717 Electrode 718 Electrode 719 Electrode 720 electrode 723 Insulating film 724 transistors 725 Back gate electrode 726 Insulating film 730 Gate 731 Gate Insulator 732 Oxide semiconductor film 733 Channel protective film 734 Electrode 735 Electrode 736 Insulating film 737 Back Terminal 738 Insulating Film 741 Gate Shuttle 742 Gate insulating film 743 Electrode 744 Electrode 745 Oxide semiconductor film 746 Insulating film 747 Back gate 748 insulating film 801 Measurement System 811 Transistors 812 transistors 813 Capacitive element 814 Transistors 815 Transistors 7031 enclosure 7032 enclosure 7033 Display section 7034 Display section 7035 Microphone 7036 Speaker 7037 Operation Keys 7038 Stylus 7041 enclosure 7042 Display section 7043 Voice Input Section 7044 Audio output section 7045 Operation Keys 7046 Light receiving section 7051 enclosure 7052 Display section 7053 Operation Keys 7081 enclosure 7082 Light Source

Claims

1. A first conductive film having the function of a transistor gate, An oxide semiconductor film having a region positioned above the first conductive film and having a channel formation region for the transistor, A second conductive film having a region positioned above the oxide semiconductor film and functioning as either the source or the drain of the transistor, A third conductive film having a region positioned above the oxide semiconductor film and functioning as the other of the source or drain of the transistor, In a plan view, the second conductive film has a comb-like shape with a plurality of first protrusions, In a plan view, the third conductive film has a comb-like shape with a plurality of second protrusions, In a plan view, the second conductive film has a region sandwiched between the third conductive film, The second conductive film and the third conductive film are arranged such that the plurality of first protrusions and the plurality of second protrusions interlock with each other. The second conductive film has regions that overlap with the first conductive film in regions other than the plurality of first protrusions. In a cross-sectional view of the transistor in the channel length direction including the channel formation region, the second conductive film has a first end that overlaps with the first conductive film via the oxide semiconductor film, and a second end that overlaps with the first conductive film via the oxide semiconductor film and faces the first end. In the cross-sectional view, the third conductive film has a third end that overlaps with the first conductive film via the oxide semiconductor film, and a fourth end that overlaps with the oxide semiconductor film but does not overlap with the first conductive film and faces the third end. Semiconductor equipment.

2. A first conductive film having the function of a transistor gate, An oxide semiconductor film having a region positioned above the first conductive film and having a channel formation region for the transistor, A second conductive film having a region positioned above the oxide semiconductor film and functioning as either the source or the drain of the transistor, A third conductive film having a region positioned above the oxide semiconductor film and functioning as either the source or the drain of the transistor, In a plan view, the second conductive film has a comb-like shape with a plurality of first protrusions, In a plan view, the third conductive film has a comb-like shape with a plurality of second protrusions, In a plan view, the second conductive film has a region sandwiched between the third conductive film, The second conductive film and the third conductive film are arranged such that the plurality of first protrusions and the plurality of second protrusions interlock with each other. The second conductive film has regions that overlap with the first conductive film in regions other than the plurality of first protrusions. In a plan view, the first conductive film has a region that overlaps with the oxide semiconductor film and a region that does not overlap with the oxide semiconductor film. In a cross-sectional view of the transistor in the channel length direction including the channel formation region, the second conductive film has a first end that overlaps with the first conductive film via the oxide semiconductor film, and a second end that overlaps with the first conductive film via the oxide semiconductor film and faces the first end. In the cross-sectional view, the third conductive film has a third end that overlaps with the first conductive film via the oxide semiconductor film, and a fourth end that overlaps with the oxide semiconductor film but does not overlap with the first conductive film and faces the third end. Semiconductor equipment.

3. A first conductive film having the function of a transistor gate, An oxide semiconductor film having a region positioned above the first conductive film and having a channel formation region for the transistor, A second conductive film having a region positioned above the oxide semiconductor film and functioning as either the source or the drain of the transistor, A third conductive film having a region positioned above the oxide semiconductor film and functioning as either the source or the drain of the transistor, In a plan view, the second conductive film has a comb-like shape with a plurality of first protrusions, In a plan view, the third conductive film has a comb-like shape with a plurality of second protrusions, In a plan view, the second conductive film has a region sandwiched between the third conductive film, The second conductive film and the third conductive film are arranged such that the plurality of first protrusions and the plurality of second protrusions interlock with each other. The second conductive film has regions that overlap with the first conductive film in regions other than the plurality of first protrusions. In a plan view, the third conductive film overlaps with the periphery of the first conductive film. In a cross-sectional view of the transistor in the channel length direction including the channel formation region, the second conductive film has a first end that overlaps with the first conductive film via the oxide semiconductor film, and a second end that overlaps with the first conductive film via the oxide semiconductor film and faces the first end. In the cross-sectional view, the third conductive film has a third end that overlaps with the first conductive film via the oxide semiconductor film, and a fourth end that overlaps with the oxide semiconductor film but does not overlap with the first conductive film and faces the third end. Semiconductor equipment.

4. A first conductive film having the function of a transistor gate, An oxide semiconductor film having a region positioned above the first conductive film and having a channel formation region for the transistor, A second conductive film having a region positioned above the oxide semiconductor film and functioning as either the source or the drain of the transistor, A third conductive film having a region positioned above the oxide semiconductor film and functioning as either the source or the drain of the transistor, In a plan view, the second conductive film has a comb-like shape with a plurality of first protrusions, In a plan view, the third conductive film has a comb-like shape with a plurality of second protrusions, In a plan view, the second conductive film has a region sandwiched between the third conductive film, The second conductive film and the third conductive film are arranged such that the plurality of first protrusions and the plurality of second protrusions interlock with each other. The second conductive film has regions that overlap with the first conductive film in regions other than the plurality of first protrusions. In a plan view, the first conductive film has a region that overlaps with the oxide semiconductor film and a region that does not overlap with the oxide semiconductor film. In a plan view, the third conductive film overlaps with the periphery of the first conductive film. In a cross-sectional view of the transistor in the channel length direction including the channel formation region, the second conductive film has a first end that overlaps with the first conductive film via the oxide semiconductor film, and a second end that overlaps with the first conductive film via the oxide semiconductor film and faces the first end. In the cross-sectional view, the third conductive film has a third end that overlaps with the first conductive film via the oxide semiconductor film, and a fourth end that overlaps with the oxide semiconductor film but does not overlap with the first conductive film and faces the third end. Semiconductor equipment.

5. In any one of claims 1 to 4, In a plan view, the second end and the third end face each other with the channel formation region of the transistor in between. Semiconductor equipment.

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