Method for manufacturing high-frequency SOI wafers

Abstract

To provide a manufacturing method for an SOI wafer for high frequency, in which the harmonic distortion is reduced by forming a trap-rich layer with high flatness by laser irradiation right below a BOX layer.SOLUTION: A manufacturing method for an SOI wafer for high frequency includes a preparing step for a first silicon single-crystal substrate and a second silicon single-crystal substrate, a processing step of forming a laser damage layer by irradiating a surface layer at a predetermined depth from a surface of the first silicon single-crystal substrate with laser and then thermally oxidizing the first silicon single-crystal substrate, thereby forming a thermal oxide film on the laser damage layer, a processing step of thermally oxidizing the second silicon single-crystal substrate, thereby forming a thermal oxide film on the surface, a step of attaching the silicon single-crystal substrates to each other through the thermal oxide film on the laser damage layer of the first silicon single-crystal substrate and the thermal oxide film on the second silicon single-crystal substrate, and an SOI layer forming step of thinning the second silicon single-crystal substrate.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to a method for manufacturing a high-frequency SOI wafer.

Background Art

[0002] As a substrate for manufacturing semiconductor integrated circuits, silicon wafers mainly manufactured by the CZ (Czochralski) method are used. In particular, integrated circuits in communication devices are strongly required to be highly functional and miniaturized. In the integrated circuits in communication devices, active elements such as transistors and passive elements such as inductors are combined. The levels of signals handled by these elements range from large signals to very weak signals over a very wide range. Therefore, it is necessary to reduce the interference between signals of different integrated circuits on the semiconductor substrate. Also, for both active and passive elements, if the resistance loss component and the stray capacitance component are not reduced, the power consumption current increases and the operating time of the communication device becomes short. Therefore, it is desirable that the harmonic distortion level is an extremely small value.

[0003] Silicon wafers may be used for these high-frequency integrated circuits. The silicon wafers to be used need to have a high resistivity in order to reduce the resistance loss. It is known that the higher the resistivity, the better the high-frequency characteristics. Furthermore, in order to further improve the characteristics, wafers using a trap-rich layer are widely used. Specifically, a polysilicon layer (polycrystalline silicon layer) is often used as the trap-rich layer. When a high-frequency signal is input to a high-resistivity substrate, an inversion layer is formed and the resistivity of the substrate changes. Therefore, by capturing carriers at deep levels in the trap-rich layer, the resistivity can be kept high and good high-frequency characteristics can be obtained. In addition, as the trap-rich layer, a SiGe layer, a porous layer, or an amorphous silicon layer may be used. In passive elements, wafers in which a polysilicon layer is formed as a trap-rich layer on a high-resistivity substrate are often used. On the other hand, SOI wafers using a trap-rich layer are frequently used for active elements. The specific structure consists of a polysilicon layer as a trap-rich layer on a high-resistivity substrate, an oxide layer as a thermal oxide layer on top of that, and a single-crystal silicon layer on top of that. However, demands for miniaturization of communication equipment and reduction of power consumption necessitate further reduction of high-frequency characteristics, particularly harmonic distortion.

[0004] Patent Document 1 describes a method for fabricating a trap-rich SOI structure using laser irradiation, specifically a method in which the laser-irradiated layer is a polysilicon layer. The depth of the polysilicon layer is controlled by adjusting the laser's focal depth, but the thickness of the layer affected by laser irradiation often varies within the plane, making it difficult to make it uniform. If a gap occurs between the laser-irradiated layer and the oxide film, the effect as a trap-rich layer is reduced. Also, if the focal depth is set to just below the depth of the oxide film, the damage from laser irradiation reaches the oxide film, introducing defects into the oxide film and reducing its breakdown strength.

[0005] Patent Document 2 describes a wafer for high-frequency devices that uses a layer mechanically processed by laser manipulation. This document states that laser manipulation suppresses parasitic surface conduction in the lattice damage retention region and the fractured silicon region. This lattice damage retention region or fractured silicon region is the trap-rich layer. However, when laser irradiation, a target focal depth is set, but there is a large variation in the width of the irradiated layer around that depth, with a width difference of approximately several micrometers in the depth direction. This indicates that parasitic surface conduction can be suppressed if the laser irradiation region reaches the surface, but it cannot be suppressed if the laser irradiation region does not reach the surface. In particular, as the frequency increases, the depth to which the high-frequency signal flows becomes shallower (skin effect), and the effect of this variation becomes larger. Furthermore, when the laser is focused on the very surface layer and irradiated, surface roughness occurs on the wafer surface due to damage from the laser irradiation up to the surface, which makes the subsequent bonding process difficult. Claim 2 of Patent Document 2 describes a step of polishing the surface after laser irradiation, but the polishing step can only process one or a few sheets at a time, which is problematic as it is time-consuming. Furthermore, removing surface damage caused by laser irradiation by processing removes the trap-rich layer, which reduces the effect of suppressing parasitic surface conduction.

[0006] Patent Document 3 describes an SOI wafer in which a bond wafer and a base wafer are bonded together via an insulating film, wherein a polysilicon layer is deposited on the bonding surface side of the base wafer. This polysilicon layer becomes a trap-rich layer. In order to bond the wafers after the polysilicon film is deposited, the polysilicon surface needs to be flattened, and polishing after film deposition is required. However, the surface of polysilicon has different lattice planes for each grain, making it difficult to polish uniformly, and attempting to polish uniformly requires slowing down the polishing speed, which presents a problem. [Prior art documents] [Patent Documents]

[0007] [Patent Document 1] Japanese Patent Publication No. 2019-129195 [Patent Document 2] Special Publication No. 2016-541118 [Patent Document 3] Japanese Patent Publication No. 2017-220503 [Overview of the Initiative] [Problems that the invention aims to solve]

[0008] The present invention has been made in view of the above problems, and aims to provide a method for manufacturing a high-frequency SOI wafer with reduced harmonic distortion by forming a highly flat charge trapping layer (trap-rich layer) directly beneath the BOX layer by laser irradiation. [Means for solving the problem]

[0009] The present invention was made to achieve the above objective, and is a method for manufacturing a high-frequency SOI wafer having a structure in which a base wafer, a laser damage layer, a BOX layer, and an SOI layer are stacked in this order, comprising the steps of preparing a first silicon single crystal substrate to be the base wafer having a resistivity of 10 Ω·cm or more and less than 10,000 Ω·cm, and a second silicon single crystal substrate to be the SOI layer, and irradiating the surface layer of the first silicon single crystal substrate to a predetermined depth with a laser to form a laser damage layer, and then thermally oxidizing the first silicon single crystal substrate on which the laser damage layer has been formed, thereby forming the laser damage The present invention provides a method for manufacturing a high-frequency SOI wafer, comprising: a processing step of a first silicon single crystal substrate in which a thermal oxide film forming a BOX layer is formed on a laser damage layer; a processing step of a second silicon single crystal substrate in which a thermal oxide film forming a BOX layer is formed on the surface of the second silicon single crystal substrate by thermal oxidation treatment; a step of bonding the first silicon single crystal substrate and the second silicon single crystal substrate via the thermal oxide film on the laser damage layer of the first silicon single crystal substrate and the thermal oxide film of the second silicon single crystal substrate; and a step of thinning the second silicon single crystal substrate to form an SOI layer of a predetermined thickness.

[0010] According to this method for manufacturing high-frequency SOI wafers, a highly flat charge trapping layer (trap-rich layer) is formed directly beneath the BOX layer by laser irradiation, thereby enabling the production of high-frequency SOI wafers with reduced harmonic distortion. In particular, if a base wafer is fabricated by heat treatment in an oxidizing atmosphere after laser irradiation, and then an SOI wafer is manufactured using this base wafer by a bonding method, an SOI wafer with reduced harmonic levels can be easily manufactured, making it suitable for manufacturing wafers for high-frequency devices. Furthermore, since the configuration involves irradiating one side of the first silicon single crystal substrate with a laser to a predetermined depth to form a laser damage layer, and then forming a thermal oxide film layer on the surface of the laser damage layer, the surface of the thermal oxide film layer can be made flat without polishing, making bonding easier.

[0011] In this case, when irradiating the surface of the first silicon single crystal substrate with a laser to form a laser damage layer, the laser irradiation conditions are preferably such that the laser power is 2 μJ or more and the laser irradiation interval is 2 μm or less.

[0012] This allows for the formation of a laser-damaged layer by irradiating one side of the first silicon single-crystal substrate to a predetermined depth with a laser, enabling the surface of the thermal oxide film layer to be flattened without polishing, and facilitating easy and reliable bonding. As a result, SOI wafers with reduced harmonic levels can be easily manufactured. [Effects of the Invention]

[0013] As described above, according to the method for manufacturing high-frequency SOI wafers of the present invention, a silicon wafer having an oxide film formed in an oxidation process after forming a laser-damaged layer by laser irradiation can be obtained, and the harmonic levels of this silicon wafer can be reduced due to defects in the laser-damaged layer caused by laser irradiation. This is because the defects formed by laser irradiation act as a charge trapping layer (trap-rich layer), inhibiting the formation of an inversion layer directly beneath the oxide film during device operation. Thus, an SOI wafer having an oxide film formed in an oxidation process after forming a laser-damaged layer can have its harmonic levels reduced due to defects in the laser-damaged layer. In this way, the method for manufacturing SOI wafers of the present invention makes it possible to easily manufacture an SOI wafer with reduced harmonic distortion levels. [Brief explanation of the drawing]

[0014] [Figure 1] A flowchart illustrating an example of the manufacturing method for the SOI wafer of the present invention is shown. [Figure 2] A cross-sectional image of the radar damage layer is shown. [Modes for carrying out the invention]

[0015] The present invention will be described in detail below, but the present invention is not limited to these descriptions. As mentioned above, there is a growing demand for wafers with even lower harmonics, driven by requirements for miniaturization and reduced power consumption of communication equipment. The inventors diligently investigated this problem. In one experiment, a 400 nm thick thermal oxide film was formed on a silicon single crystal substrate with a resistivity of 10 Ω·cm to less than 10,000 Ω·cm by irradiating it with a laser and then heat-treating it in an oxygen atmosphere at 1050°C. Electrodes with a line length of 2200 μm were formed on these wafers, and the second and third harmonic characteristics were measured. As a result, it was found that the levels of second and third harmonic distortion could be reduced compared to when no laser irradiation was performed. This is thought to be because the laser-damaged layer acted as a charge-trapping layer (trap-rich layer), inhibiting the formation of the inversion layer. From this, it was found that when an oxide film is formed after laser irradiation, the laser-damaged layer is effective as a trap-rich layer, and therefore it can be applied to trap-rich SOI wafers used as active elements. Based on the above findings, the present inventors have come to the present invention. That is, an embodiment of the present invention is a method for manufacturing an SOI wafer characterized by having a structure in which a laser-damaged layer, a thermal oxide film layer, and a silicon single crystal layer (SOI layer) are configured in this order on a silicon single crystal substrate having a resistivity of 10 Ω·cm or more and less than 10,000 Ω·cm, irradiated with a laser. That is, the present invention is a method for manufacturing a high-frequency SOI wafer having a structure in which a base wafer, a laser damage layer, a BOX layer, and an SOI layer are laminated in this order, and has a resistivity of 10 Ω·cm or more and less than 10,000 Ω·cm as the base wafer. A step of preparing a first single-crystalline silicon substrate and a second single-crystalline silicon substrate to be an SOI layer; after performing laser irradiation on a surface layer having a predetermined depth from the surface of the first single-crystalline silicon substrate to form a laser damage layer, The step of processing the first single-crystalline silicon substrate on which the laser damage layer is formed by thermal oxidation treatment to form a thermal oxide film serving as a BOX layer on the laser damage layer; and the second single-crystalline silicon substrate is thermally oxidized. A step of processing the second single-crystalline silicon substrate to form a thermal oxide film serving as a BOX layer on the surface; and the first single-crystalline silicon substrate and the second single-crystalline silicon substrate are bonded via the thermal oxide film on the laser damage layer of the first single-crystalline silicon substrate and the thermal oxide film of the second single-crystalline silicon substrate. A step of thinning the second single-crystalline silicon substrate to form an SOI layer having a predetermined thickness, and a method for manufacturing a high-frequency SOI wafer, characterized by comprising: Hereinafter, the present invention will be described in detail with reference to the drawings.

[0016] [Manufacturing method of high-frequency SOI wafer] The manufacturing method of the high-frequency SOI wafer according to the present invention will be described. FIG. 1 shows an example of a manufacturing method of a high-frequency SOI wafer according to the present invention. The manufacturing method of the high-frequency SOI wafer according to the present invention includes a step of preparing a single-crystalline silicon substrate, a step of processing the first single-crystalline silicon substrate, a step of processing the second single-crystalline silicon substrate, a step of bonding the single-crystalline silicon substrates, and a thinning step.

[0017] (Step of preparing a single-crystalline silicon substrate) This step is a step of preparing a first single-crystalline silicon substrate having a resistivity of 10 Ω·cm or more and less than 10,000 Ω·cm as a base wafer and a second single-crystalline silicon substrate to be an SOI layer. First, as shown in FIG. 1a), a first single-crystalline silicon substrate (silicon wafer) 10 with a resistivity of 10 Ω·cm or more and less than 10000 Ω·cm to be used as a base wafer is prepared. Separately from the first single-crystalline silicon substrate 10, as shown in FIG. 1d), a second single-crystalline silicon substrate (silicon wafer) 20 to be used as an SOI layer is prepared. The second single-crystalline silicon substrate 20 can be, for example, a single-crystalline silicon with a resistivity of about 10 Ω·cm, but is not limited thereto. The preparation of the first single-crystalline silicon substrate 10 and the second single-crystalline silicon substrate 20 can be done either one first or in parallel.

[0018] (Processing step of the first single-crystalline silicon substrate) In this step, after laser irradiation is performed on the surface layer at a predetermined depth from the surface of the first single-crystalline silicon substrate to form a laser damage layer, the first single-crystalline silicon substrate on which the laser damage layer is formed is thermally oxidized to form a thermal oxide film serving as a BOX layer on the laser damage layer. After FIG. 1a), as shown in FIG. 1b), a laser damage layer 12 is formed on the first single-crystalline silicon substrate 10 by laser irradiation. The laser conditions for forming the laser damage layer 12 do not need to be particularly limited as long as damage is caused, but the laser output is preferably 2 μJ or more. Also, the laser irradiation interval is preferably 2 μm or less. The laser irradiation interval is preferably made sufficiently narrower than the width of the Co-planer Waveguide (CPW). If the laser irradiation interval is longer than the width of the Co-planer Waveguide (CPW), there is a possibility that the CPW will hit an area where there is no laser damage. Regardless of the laser irradiation method, it is preferable that the irradiation interval is short so that there is an irradiated portion directly under the signal line of the CPW. Furthermore, the surface layer, which is formed at a predetermined depth from the surface, is preferably 0.5 μm to 5 μm thick. This range ensures the necessary thickness for forming a thermal oxide film on the surface. The thickness of the laser damage layer is preferably 5 μm to 20 μm. A thickness of 5 μm or more can reduce the carriers in the inversion layer generated during device operation. A thickness of 20 μm or more provides sufficient effect.

[0019] Next, as shown in Figure 1c), after forming the laser damage layer 12, a thermal oxide film 14 is grown. However, it is sufficient for the thermal oxide film to be formed, and the heat treatment temperature is not particularly limited. In this case, the thickness of the thermal oxide film 14 is preferably 400 nm or more. The first silicon single crystal substrate 10 fabricated in this manner becomes the base wafer during bonding.

[0020] (Second silicon single crystal substrate processing step) This process involves thermal oxidation of a second silicon single crystal substrate to form a thermal oxide film that will become the BOX layer on its surface. Following Figure 1d), a thermal oxide film 22 is formed on the surface of the second silicon single crystal substrate 20, as shown in Figure 1e). This thermal oxide film 22 can be formed using known techniques such as wet oxidation or dry oxidation, which are heat treatments under an oxidizing atmosphere. In this way, a thermal oxide film 22 can be formed on the entire surface of the second silicon single crystal substrate 20 or on the bonding surface by thermal oxidation. This second silicon single crystal substrate 20 becomes the bond wafer during bonding. The order of the steps in Figures 1a), b), c) and 1d), e) does not matter. Therefore, either the processing step for the first silicon single crystal substrate or the processing step for the second silicon single crystal substrate can be performed first, or they can be performed in parallel.

[0021] (Silicon single crystal substrate bonding process) This process involves bonding the first silicon single crystal substrate and the second silicon single crystal substrate via a thermal oxide film on the laser damage layer of the first silicon single crystal substrate and a thermal oxide film on the second silicon single crystal substrate. As described above, after preparing a first silicon single crystal substrate 10 on which a thermal oxide film 14 has been formed after laser irradiation and a second silicon single crystal substrate 20 on which a thermal oxide film 22 has been formed on its surface, the thermal oxide film 14 on the laser damage layer 12 of the first silicon single crystal substrate 10 and the thermal oxide film 22 on the second silicon single crystal substrate 20 are bonded together as shown in Figure 1f).

[0022] (Thinning process) This process involves thinning a second silicon single crystal substrate to form an SOI layer of a predetermined thickness. After bonding, the second silicon single crystal substrate 20, which will become the SOI layer, can be thinned as shown in Figure 1g). This thinning can be achieved to the desired thickness of the silicon single crystal layer (SOI layer) 30 by polishing the single crystal substrate on the bond wafer side or by ion implantation exfoliation. As described above, high-frequency SOI wafers can be manufactured.

[0023] [SOI wafers for high-frequency applications] A high-frequency SOI wafer manufactured by the method for manufacturing a high-frequency SOI wafer according to the present invention has a structure in which a base wafer, a laser damage layer, a BOX layer, and an SOI layer are stacked in this order. The structure consists of a silicon single crystal substrate base wafer with a resistivity of 10 Ω·cm or more and less than 10,000 Ω·cm, with a laser damage layer, a thermal oxide film layer, and a silicon single crystal layer configured in that order, and the laser damage layer functions as a trap-rich layer.

[0024] [Harmonic characteristics] This section describes the measurement of harmonic characteristics of silicon wafers and SOI wafers. The harmonic characteristics of an SOI wafer are measured as follows. Second harmonic characteristics (2HD) and third harmonic characteristics (3HD) are obtained by first removing the top silicon single crystal layer in the SOI wafer, then forming a metal Co-planer Waveguide (CPW) on the thermal oxide film layer, and grounding probes to both ends of this metal electrode. Subsequently, a high-frequency signal is input from one side, and the second or third harmonic characteristics of the output from the other side are measured (for example, frequency 1 GHz, input power 15 dBm). As a result, defects in the laser-damaged layer of a silicon single-crystal substrate have deep energy levels and can trap carriers, thereby reducing second and third harmonic distortions. [Examples]

[0025] The present invention will be described in detail below with reference to examples, but this is not intended to limit the present invention.

[0026] (Example 1) SOI wafers for Example 1 were manufactured according to Figures 1a) to 1g). Specifically, a laser damage layer was formed on a first silicon single crystal substrate with a diameter of 300 mm and a resistivity of 5000 Ω·cm by laser irradiation under the conditions of laser power of 2 μJ, laser irradiation interval of 2 μm, and focal depth of 15 μm. At this time, the cross-section of the laser damage layer was observed under a microscope using an observation sample. Figure 2 shows a cross-sectional image of the laser damage layer. As can be seen from Figure 2, the laser damage layer is formed at a depth of approximately 15 μm from the surface, and the flatness of the surface is maintained.

[0027] Subsequently, heat treatment was performed in an oxidizing atmosphere at 1050°C to form a 400 nm thick thermal oxide film on top of the laser-damaged layer. Separately, a second silicon single crystal substrate with a diameter of 300 mm was heat-treated in an oxidizing atmosphere at 1050°C to form a thermal oxide film with a thickness of 100 nm. Next, the thermal oxide film on the laser-damaged layer of the first silicon single crystal substrate was bonded to the thermal oxide film on the second silicon single crystal substrate. Although the surface of the first silicon single crystal substrate was not repolished after laser irradiation, the bonding was successful without any problems. Then, the silicon single crystal layer on the surface of the bonded SOI wafer was thinned by polishing to create an SOI wafer of Example 1 with a single crystal silicon film (SOI layer) thickness of 1 μm.

[0028] (Comparative Example 1) In Comparative Example 1, an SOI wafer was formed in the same manner as in Example 1, except that the first silicon single crystal substrate was not irradiated with a laser and a laser damage layer was not formed.

[0029] For the SOI wafers of Example 1 and Comparative Example 1, the silicon single crystal layer was polished and removed using the procedure described above to expose the oxide film layer. Then, an electrode with a path length of 2200 μm was formed on the oxide film, and the second and third harmonics were measured under conditions of a frequency of 1 GHz and an input power of 15 dBm.

[0030] As a result, it was found that Example 1 could reduce the second harmonic characteristics by approximately 30 dBm and the third harmonic characteristics by approximately 20 dBm compared to Comparative Example 1. In other words, it was found that irradiating the first silicon single crystal substrate in Example 1 with a laser resulted in better performance than not irradiating it with a laser. These results indicate that the laser-damaged layer is effective as a trap-rich layer, and that subsequent thermal oxidation has the effect of suppressing the inversion layer directly beneath the thermal oxide film.

[0031] It should be noted that the present invention is not limited to the embodiments described above. The embodiments described above are illustrative, and any configuration that is substantially identical to the technical idea described in the claims of the present invention and achieves similar effects is included within the technical scope of the present invention. [Explanation of symbols]

[0032] 10...First silicon single crystal substrate (silicon wafer), 12...Laser damage layer, 14...Thermal oxide film (BOX layer), 20...Second silicon single crystal substrate (silicon wafer), 22...Thermal oxide film (BOX layer), 30...Silicon single crystal layer (SOI layer).

Claims

1. A method for manufacturing a high-frequency SOI wafer having a structure in which a base wafer, a laser damage layer, a BOX layer, and an SOI layer are stacked in this order, The process involves preparing a first silicon single crystal substrate, which will serve as the base wafer, having a resistivity of 10 Ω·cm or more and less than 10,000 Ω·cm, and a second silicon single crystal substrate, which will serve as the SOI layer. A processing step for a first silicon single crystal substrate, comprising: irradiating a surface layer to a predetermined depth from the surface of the first silicon single crystal substrate with a laser to form a laser damage layer; and then thermally oxidizing the first silicon single crystal substrate on which the laser damage layer has been formed to form a thermal oxide film that will become a BOX layer on the laser damage layer; A processing step for a second silicon single crystal substrate, wherein a thermal oxide film that forms a BOX layer is formed on the surface of the second silicon single crystal substrate by thermal oxidation treatment, A step of bonding the first silicon single crystal substrate and the second silicon single crystal substrate via the thermal oxide film on the laser damage layer of the first silicon single crystal substrate and the thermal oxide film of the second silicon single crystal substrate, A method for manufacturing a high-frequency SOI wafer, comprising the steps of thinning the second silicon single crystal substrate to form an SOI layer of a predetermined thickness.

2. The method for manufacturing a high-frequency SOI wafer according to claim 1, characterized in that, when a laser is irradiated onto the surface of the first silicon single crystal substrate to form a laser damage layer, the laser irradiation conditions are a laser power of 2 μJ or more and a laser irradiation interval of 2 μm or less.

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