Optical circuit and method for manufacturing an optical circuit

Abstract

An optical circuit according to the present disclosure comprises, in the end face of a waveguide of the optical circuit, an opening (6) of a light-shielding film (4) in a region including the cross-section of a core (3). Additionally, the optical circuit comprises a gas barrier film (5) that covers the top face and end face of a chip (50) of the optical circuit. As a result of the gas barrier film (5) covering the end face of the chip (50), it is possible to prevent the shape of emitted light from deteriorating due to moisture absorption. The light-shielding film (4) is capable of removing stray light originating from inside the chip (50). The present invention presents a novel structure for the chip (50) end face in optical circuits such as PLCs. Also disclosed is a novel method for producing an optical circuit utilizing a self-written waveguide.

Description

Technical Field

[0001] The present invention relates to an optical circuit, and more particularly to an end structure of an optical circuit and a method for manufacturing the same.

Background Art

[0002] Techniques for applying a silica-based planar lightwave circuit (PLC), which has mainly developed in the field of optical communication, to visible light have been attracting attention. A PLC forms an optical waveguide on a substrate on a plane such as a Si wafer by patterning using photolithography or the like and reactive ion etching. The optical waveguide is formed by first creating a core and embedding it with a cladding having a refractive index lower than that of the core. A PLC is characterized by a high transmittance of the optical waveguide, and a low-loss optical functional circuit can be realized by combining a plurality of basic optical circuits such as a directional coupler and a Mach-Zehnder interferometer. Since a PLC has high transparency even in the visible light band and has a small propagation loss, it is possible to mass-produce a low-loss and highly functional optical circuit.

[0003] An application example of a PLC in visible light is a circuit element that multiplexes visible light three primary colors (R, G, B) used for an eyewear-type display or a small projector for a head-up display. In addition, the use of a silica-based PLC is also progressing as an optical circuit for a super-small analyzer for bio-life science (Non-Patent Document 1).

[0004] When configuring an optical circuit for an optical device using visible light as described above with a silica-based PLC, it is necessary to suppress deterioration of the glass material caused by visible light. In a conventional silica-based PLC, germanium oxide (GeO2) has generally been used as a dopant for increasing the refractive index in the core constituting the waveguide. However, a core doped with germanium oxide is particularly blue It is known that the refractive index fluctuates when light with wavelengths close to the color (400-490 nm) is input (Non-Patent Literature 2). In recent years, in response to the increasing demand for silica-based waveguides for visible light, several waveguide structures with higher visible light resistance have been proposed. For example, waveguides with zirconia (ZrO2) added to the core (Patent Literature 1) and those using undoped SiO2 as the core, i.e., undoped core waveguides, have attracted attention. [Prior art documents] [Patent Documents]

[0005] [Patent Document 1] Japanese Patent Publication No. 2017-187719 [Patent Document 2] Japanese Patent Publication No. 2020-204642 [Non-patent literature]

[0006] [Non-Patent Document 1] J. Sakamoto, S. Katayose, K. Watanabe, M. Itoh and T. Hashimoto, Proc. SPIE 10126, Advances in Display Technologies VII, 101260M, 2017 [Non-Patent Document 2] N. Takato, T. Kominato, A. Sugita, K. Jinguji, H. Toba and M. Kawachi, in IEEE Journal on Selected Areas in Communications, vol. 8, p. 1120, 1990 [Overview of the project] [Problems that the invention aims to solve]

[0007] While undoped core PLCs are expected to have high resistance to visible light, challenges remain. Generally, waveguides consist of a core and a cladding with a lower refractive index than the core. In the case of undoped core PLCs, the cladding is boron-doped SiO2 with a lower refractive index. Fluorine-doped SiO2 is used. These glass materials are known to be hygroscopic. Furthermore, the cladding combines with water vapor in the atmosphere, causing the refractive index of the cladding to change over time. Therefore, in order to make non-doped core PLCs practical, it is envisioned that the PLC be covered with a gas barrier film to prevent combination with water vapor.

[0008] However, in conventional PLC wafer processes, a gas barrier film is deposited on the wafer surface before chip formation, meaning the chip edges are not protected by the gas barrier film. Because the chip edges are exposed, the refractive index changes over time, causing a problem where the shape of the emitted light changes. Furthermore, to remove stray light emitted from the chip, it is necessary to separately mount light-shielding components such as absorbers and apertures, which also leads to increased mounting costs (Patent Document 2).

[0009] The present invention has been made in view of these problems, and provides an end face structure for an optical circuit that prevents the quality of emitted light over time in a PLC that handles visible light. [Means for solving the problem]

[0010] One embodiment of the present invention is an optical circuit formed on a substrate, comprising: a waveguide composed of a cladding layer on the substrate and a core formed within the cladding layer; a light-shielding film that covers the end face of the chip including the cross-section of the core of the waveguide and has an opening that leaves the region including the cross-section of the core open; and a gas barrier film that covers the top surface and all end faces of the chip.

[0011] Another embodiment of the present invention is a method for manufacturing an optical circuit, comprising the steps of: creating a groove on a wafer that will be the end face of an optical circuit in which a waveguide is formed; creating a self-forming waveguide on the extension of the waveguide in the groove; forming a light-shielding film around the self-forming waveguide and on the wafer; removing the self-forming waveguide to form an opening on the end face of the optical circuit including the core cross section of the waveguide; forming a gas barrier film on the wafer; and cutting the groove to produce a chip-shaped optical circuit. [Effects of the Invention]

[0012] The optical circuit disclosed herein can prevent the quality of light emitted from the PLC from degrading over time and can also eliminate stray light. [Brief explanation of the drawing]

[0013] [Figure 1] The perspective view and cross-sectional view of the area near the tip of the optical circuit of Embodiment 1 are shown. [Figure 2] This figure illustrates the procedure for fabricating the end face structure of the optical circuit disclosed herein. [Figure 3] This diagram illustrates the position and function of chips and grooves in a wafer state. [Figure 4] This figure shows the configuration of an optical circuit chip using a silica-based PLC in Embodiment 2. [Figure 5] This figure shows an optical circuit chip using a silica-based PLC as a modified example of Embodiment 2. [Modes for carrying out the invention]

[0014] The optical circuit of the present disclosure has an opening of a light-shielding film in which a region including the core cross-section is opened at the end face of the waveguide of the optical circuit. Further, it includes a gas barrier film that covers the upper surface and the end face of the chip of the optical circuit. The gas barrier film that covers both the upper surface and the end face of the chip can prevent the shape of the emitted light from deteriorating over time due to moisture absorption. The light-shielding film can remove stray light from inside the chip. It presents a novel structure of the chip end face in an optical circuit including a PLC. The present invention also has aspects related to a method for manufacturing an optical circuit. Hereinafter, embodiments of the optical circuit of the present invention will be described in detail with reference to the drawings.

[0015] [Embodiment 1] FIG. 1 shows a perspective view and a cross-sectional view near the chip end of the optical circuit of Embodiment 1. (a) in FIG. 1 is a perspective view of the end face of the chip 50 of the optical circuit, in which the core cross-section of the input end or the output end of the waveguide appears on the chip end face. To show the structure near the core cross-section, the front and back surfaces perpendicular to the chip end face including the core cross-section are shown cut. (b) in FIG. 1 is a cross-sectional view taken along a plane including line Ib-Ib and cutting longitudinally through the core 3 of the waveguide. Both are schematic views, and different from the actual size relationships of each part, the size of the core 3 is drawn significantly larger. Also, note that the actual cladding layer 2 is much thinner than the support substrate 1.

[0016] The optical circuit 50 in FIG. 1 is a silica-based PLC and includes a general embedded waveguide formed on the support substrate 1. The periphery of the core 3 is embedded by the cladding layer 2, and except for the circular region 6 centered on the core cross-section, the end face and the upper surface of the chip are covered with the light-shielding film 4. Further, a gas barrier film 5 is formed so as to cover the entire surface of the light-shielding film 4. The circular region 6 serves as an opening for the incident light to the core or the emitted light from the core. At the same time, it acts to prevent the mixing and interference of stray light from inside the chip with the emitted light. Also, at the end face of the PLC, since the gas barrier film 5 covers all the ends of the chip, no temporal change in the refractive index of the cladding due to moisture absorption of the cladding occurs.

[0017] Therefore, the optical circuit of the present disclosure is an optical circuit 50 formed on a substrate 1, which is composed of a clad layer 2 on the substrate and a waveguide composed of a core 3 formed in the clad layer, a light-shielding film 4 that covers the end face of the chip including the core cross-section of the waveguide and has an opening 6 with an area including the core cross-section opened, and a gas barrier film 5 that covers the upper surface and all end faces of the chip.

[0018] The manufacturing procedure of the PLC having the chip end face structure shown in FIG. 1 is as follows. The non-doped core PLC of a general embedded waveguide in a PLC is composed of the following steps. First, on a Si substrate, an underclad layer composed of fluorine-doped SiO2 glass or boron-doped SiO2 glass with a thickness of 20 μm and a core layer composed of non-doped SiO2 glass with a thickness of 2.5 μm are formed in this order. For example, the refractive index difference Δ between the core and the clad is set to 1.1%. By using general photolithography and dry etching techniques, the core layer is processed to form the core 3 of the waveguide. The core width is set to approximately 1.7 μm. Then, an overclad layer composed of fluorine-doped SiO2 glass or boron-doped SiO2 glass, similar to the underclad layer, is formed on the core 3, and an embedded waveguide is formed. So far, it is the procedure for manufacturing a general embedded waveguide. Subsequently, the procedure for manufacturing the chip end face structure of the optical circuit 50 of the present disclosure shown in FIG. 1 will be described. The following describes the procedure for manufacturing the chip end face structure of the optical circuit 50 of the present disclosure shown in FIG. 1. The procedure for manufacturing the chip end face structure of the optical circuit 50 of the present disclosure shown in FIG. 1 will be described. By using general photolithography and dry etching techniques, the core layer is processed to form the core 3 of the waveguide. The core width is set to approximately 1.7 μm. Then, an overclad layer composed of fluorine-doped SiO2 glass or boron-doped SiO2 glass, similar to the underclad layer, is formed on the core 3, and an embedded waveguide is formed. So far, it is the procedure for manufacturing a general embedded waveguide. Subsequently, the procedure for manufacturing the chip end face structure of the optical circuit 50 of the present disclosure shown in FIG. 1 will be described.

[0019] FIG. 2 is a diagram for explaining the procedure for manufacturing the end face structure of the optical circuit of the present disclosure. Any of the diagrams (a) to (f) in FIG. 2 is a cross-sectional view taken along a plane passing through the center of the core of the manufactured embedded waveguide and perpendicular to the substrate surface. Referring also to FIG. 3 described later, the steps will be described in the order of step (a) 1 to step (f) 6.

[0020] In step 1 of Figure 2(a), a groove is formed in the wafer containing the silica-based PLC, which will form the chip end face where the waveguide cross-section will be exposed after the chip shape is cut out. The figure for step 1 shows the state in which the groove 10 is formed perpendicular to the core 3. Since this groove 10 will become the end face of the chip, when connecting the optical fiber and the PLC chip, the groove should be made to a depth of at least half the diameter of the optical fiber. The width of the groove should be greater than or equal to the thickness of the blade used for dicing. This prevents the blade from contacting the chip end face when cutting the chip from the wafer. In step 1, the silica-based glass can be etched using conventional dry etching techniques, in the same way as during core formation. The Si substrate 1, which is the support substrate, can be etched using a Bosch process or the like.

[0021] By forming the groove 10, the PLC is divided into the main circuit 50 and the dummy circuit 51. In Figure 2, the main circuit 50 is the part that becomes the optical circuit after being cut into a chip shape, and light is emitted in the direction of arrow 21. On the other hand, the waveguide core 52 included in the dummy circuit 51 is integrated with the core 3 of the main circuit 50 and is part of the core 3 before the groove 10 is formed. Here, referring to the structure of the groove 10 in the wafer state will help to better understand the entire process in Figure 2.

[0022] Figure 3 illustrates the position and function of the PLC chip and grooves in the wafer state. Figure 3(a) shows the wafer 60 before the optical circuits are cut out, with four grooves 10a to 10d formed by process 1. The wafer 60 contains a total of 12 main circuits 50, indicated by dotted lines, arranged in two rows of six. By forming grooves 10a and 10b, the six optical circuits in the left column are partitioned, and the areas of the main circuits 50 and dummy circuits 51, indicated by dotted lines, are formed. Similarly, by forming grooves 10c and 10d, the six optical circuits in the right column are partitioned, and the areas of the main circuits 50 and dummy circuits 51 are formed. Figure 3 shows an example in which the main circuits 50 after being cut out as chips each have an incident end face or an exit end face of the waveguide on the left and right sides. The bottom edge of the wafer has a terminal 53 for inputting visible light to cure the resin in order to create a self-formed waveguide, which will be described later.

[0023] In the chip arrangement shown in Figure 3(a), the waveguide branches into four from terminal 53, and each of these branches further branches into five, forming the dummy waveguide 52. The waveguide core 3 of the main circuit and the dummy waveguide core 52 of the dummy circuit are formed coaxially and face each other. The embedded waveguide, which was originally connected as a single unit, is cut by the groove, so it is formed coaxially with the dummy waveguide 52 and the input / output waveguide 3 of the main circuit. The branching sections of the dummy waveguide are designed so that the light is evenly distributed. The core width of the dummy waveguide is set to 1.7 μm.

[0024] Returning to Figure 2, in step 2 of Figure 2(b), a self-forming waveguide 11 is formed between the dummy waveguide 52 of the dummy circuit 51 and the waveguide 5 of the main circuit. More specifically, first, a photocurable resin 7 is applied to the entire wafer by spin coating. Next, visible light is input from the side of the dummy waveguide 52 to cure the resin 7. That is, as shown in Figure 3(b), visible light 23 is input from the input waveguide terminal 53 of the wafer, and after branching, visible light 22 propagates the resin 7 in the groove toward the main circuit from the left and right sides of each of the optical circuits. A self-forming waveguide 11 is formed between the dummy waveguide 52 and the waveguide 5. In this embodiment, a visible light source with a wavelength of 405 nm and a power of 30 mW to the input waveguide terminal 53 was prepared.

[0025] When curing the resin 7 in step 3, which will be described later, the intensity of the light input into the dummy waveguide 52 is monitored by detecting the branched monitor light 24 with a photodiode 55. The input visible light 23 propagates from the dummy waveguide 52 to the chip end face of each main circuit 50 and irradiates the photocurable resin 7 filled in the groove 10. As a result, a self-forming waveguide 11 is formed along the optical path from the end face of the dummy waveguide 52 to the input / output end of the main circuit. A structure is created in which the cores 3 and 52 of the two waveguides are connected by a self-forming waveguide. After that, the photocurable resin 7 other than the self-forming waveguide 11 is removed. Under the manufacturing conditions of the optical circuit in this embodiment, a self-forming waveguide with a diameter of about 5 μm was formed.

[0026] In step 3 of Figure 2(c), a light-shielding film 4 was formed over the entire wafer using electroless plating. To form the opening shown in Figure 1, it is necessary to form the light-shielding film 4 over the entire chip end face of this circuit, so as to wrap around the sides of the columnar self-formed waveguide 11 formed in step 2. For forming this light-shielding film 4, the plating method is more suitable than deposition methods such as sputtering or vapor deposition. In the optical circuit of this embodiment, a thin gold film with a thickness of about 500 nm was fabricated as the light-shielding film 4.

[0027] In step 4, shown in Figure 2(d), the self-formed waveguide 11 is removed. After cleaning with a general organic solvent, ashing is performed using oxygen plasma. The ashing process removes the columnar self-formed waveguide 11, exposing the core 3 of the waveguide of the main circuit that was covered by the self-formed waveguide 11. Since the self-formed waveguide 11 is composed of organic material, only the self-formed waveguide 11 is removed by ashing. As a result, a light-shielding film 4 is formed on the chip end face of the main circuit 50, excluding the circular region 6 around the core 3. Steps 1 to 4 allow for the simultaneous formation of a light-shielding film 4 with openings on the chip end face of all the main circuits on the wafer.

[0028] In step 5, shown in Figure 2(e), a gas barrier film 5 is further deposited on top of the light-shielding film 4. To form the gas barrier film 5 on the sidewall of the groove 10 which will become the tip end face, a SiN film with a thickness of approximately 100 nm was deposited using the plasma CVD (Chemical Vapor Deposition) method.

[0029] Finally, in step 6 of Figure 2(f), dicing is performed to separate each main circuit on the wafer and obtain a chip-shaped optical circuit. As mentioned above, a blade that is sufficiently thinner than the width of the groove 10 is used to protect the chip edge.

[0030] Therefore, the present invention can also be implemented as a method for manufacturing an optical circuit, comprising the steps of: creating a groove 10 on a wafer 60 which will be the end face of an optical circuit with a waveguide formed thereon; creating a self-forming waveguide 11 on the extension of the waveguide in the groove; forming a light-shielding film 4 around the self-forming waveguide and on the wafer; removing the self-forming waveguide to form an opening 6 on the end face of the optical circuit including the core cross section of the waveguide; forming a gas barrier film 5 on the wafer; and cutting the groove to produce a chip-shaped optical circuit 50.

[0031] The end face structure of the optical circuit 50 of this disclosure, fabricated using the procedure shown in Figures 1 and 2, allows for the formation of a gas barrier film on the chip end face in addition to the top surface of the chip. Furthermore, the formation of the aperture 6 on the chip end face can be done collectively on a wafer-by-wafer basis. The configuration of the optical circuit 50 simultaneously suppresses the degradation of the shape of the emitted light caused by the change in the refractive index of the cladding due to moisture absorption, and the inclusion of stray light into the emitted light. The diameter of the aperture 6 is determined by the diameter of the self-formed waveguide. Therefore, the inner diameter of the aperture 6 can be controlled to some extent by the amount of light irradiated to grow the self-formed waveguide. In the optical circuit of this embodiment, the diameter of the self-formed waveguide was set to about 5 μm, but a self-formed waveguide can be formed by the series of steps shown in Figure 2 if the diameter is generally 10 μm or less. The diameter of the aperture 6 can also be controlled by the core diameter of the dummy waveguide 52. To obtain the effect of stray light removal, the diameter (inner diameter) of the aperture 6 is appropriately about twice the mode field diameter of the core.

[0032] In the optical circuit of this embodiment, gold is used for the light-shielding film 4, but the material of the light-shielding film is not limited to gold. The material of the light-shielding film can be any material that can be handled by a method that can form a film that follows the surface irregularities, such as the plating method. In addition to SiN, the gas barrier film 5 may also be made of alumina, quartz glass, niobium oxide, cerium oxide, or other resin materials.

[0033] In the optical circuit layout diagram on the wafer shown in Figure 3, grooves 10a to 10d were formed along the left and right sides of the two rows of the main circuit region 50. However, it is also possible to include the top and bottom sides of the chip of the main circuit 50 and cut grooves along all four sides. When forming grooves along all four sides of the main circuit, it is advisable to leave approximately 100 μm of material on the underside of the support substrate 1. In addition, although the grooves 10 are formed leaving the underside of the substrate intact in the series of steps described in Figure 2, it is also possible to form grooves that completely separate the circuit from the underside of the support substrate 1. This is because even if grooves are formed along the left and right sides of the region of the main circuit 50 as shown in Figure 3, the main circuit will not fall out of the wafer 60, and steps 1 to 6 can be performed on each wafer in a single operation.

[0034] According to steps 1 to 6 described above, the light-shielding film 4 is formed on the entire upper surface of the chip and on the end faces of the chip excluding the openings. The stray light removal effect is achieved if the light-shielding film 4 is formed together with the openings 6 on at least the end faces of the chip where the waveguide core cross-section is located. To minimize the effects of unexpected stray light, it is preferable that the light-shielding film 4 is formed on the upper surface of the chip and on all end faces of the chip. In the manufacturing procedure shown in Figure 2, an example is shown where the rectangular chip shape has two opposite sides with either an incident or outgoing light end, and the grooves 10 were fabricated on both sides of the circuit 50. However, grooves may also be created on the sides of the chip that do not have a cross-section of the waveguide core of the optical circuit, and the light-shielding film 4 and gas barrier film 5 may be formed therein.

[0035] In the optical circuit configuration shown in Figure 1 and the process shown in Figure 2, a gas barrier film 5 is formed on top of the light-shielding film 4. However, the order in which these two layers are formed can be reversed, with the light-shielding film being formed on top of the gas barrier layer. In this case, only the order of some of the steps in Figure 2 needs to be changed. Specifically, in Figure 2, only the steps need to be modified in the following order: groove formation in step 1, gas barrier film 5 formation in step 5, self-formed waveguide formation in step 2, light-shielding film 4 formation in step 3, opening formation by ashing in step 4, and chip cutting by dicing in step 6.

[0036] In the optical circuit disclosed herein, it is most preferable, from the viewpoint of preventing stray light output, that the center position of the aperture 6 and the center position of the core cross-section coincide on the end face of the chip. Furthermore, although a rectangular embedded waveguide is shown as an example of the core cross-sectional shape, a rib-type waveguide or a slot waveguide may also be used.

[0037] [Embodiment 2] Figure 4 shows the configuration of an optical circuit chip using a silica-based PLC of Embodiment 2. The optical circuit 100 in Figure 4 is an RGB combiner, also called an RGB combiner or RGB coupler. Figure 4(a) is a top view of the chip, (b) is a side view looking at end face B, (c) is a side view looking at end face C, and (d) is a cross-sectional view of a plane perpendicular to the substrate surface passing through the IVd-IVd line near end face C.

[0038] The optical circuit 100 combines the R, G, and B input light signals to the R input waveguide 101, the G input waveguide 102, and the B input waveguide 103 using a multiplexer 107 made of embedded waveguides, and outputs the combined signal from the opposite end of waveguide 102. The three input waveguides are equipped with monitor waveguides 104, 105, and 106, which are also made of embedded waveguides. As shown in Figures 4(b) and 4(c), at end faces B and C, the cross-section of the waveguide core is located within an opening where no light-shielding film is formed. Above the light-shielding film, a gas barrier film is formed to cover the top surface and end face of the chip. The cross-sectional view in Figure 4(d) is exactly the same as that in Figure 1(b).

[0039] The core thickness of each waveguide was set to 2.5 μm, the core width to 1.7 μm, and the relative refractive index difference Δ between the core and cladding to 1.1%. The multiplexer 107 was designed to combine three wavelengths corresponding to visible light red (R: wavelength 640 nm), green (G: 520 nm), and blue (B: 445 nm) into a single waveguide. Monitor waveguides 104, 105, and 106 in Figure 4 monitor the input power of visible light input to the three waveguides 101, 102, and 103. The structure of the aperture at the tip end of the optical circuit of this disclosure can significantly suppress stray light output from the output end of the monitor waveguide. It can also significantly suppress the inclusion of stray light in the combined output light. The RGB multiplexer 100 shown in Figure 4 can be further modified to further improve stray light in the monitor light.

[0040] Figure 5 shows the configuration of an optical circuit chip using a silica-based PLC as a modified example of Embodiment 2. The optical circuit 200 in Figure 5 is a modified version of the RGB multiplexer 100 of Embodiment 2, differing only from the RGB multiplexer 100 in the configuration of the three monitor waveguides. Figure 5(a) is a top view of the chip, (b) is a side view looking at end face B, (c) is a side view looking at end face C, (d) is a side view looking at end face D, and (e) is a side view looking at end face E.

[0041] The optical circuit 200 combines the R, G, and B input light signals to the R input waveguide 201, the G input waveguide 202, and the B input waveguide 203 using a multiplexer 207 made of embedded waveguides, and outputs the combined light from the opposite end of waveguide 202. The three input waveguides are equipped with monitor waveguides 204, 205, and 206, which are also made of embedded waveguides. In this modified example, the monitor waveguides have output terminals on the chip side faces D and E, respectively, relative to end face C, where the combined light is output, rather than on end face C. By providing the output terminals of the monitor waveguides on the chip end faces perpendicular to the direction of light propagation of the multiplexer, stray light to both the monitor light and the combined light is further suppressed. The structure of the openings around the cross-section of the core shown in Figure 1 can significantly suppress stray light output from the output terminals of the monitor waveguides and the output terminals of the combined light. [Industrial applicability]

[0042] This invention can be used in optical instruments.

Claims

1. A method for manufacturing an optical circuit, The steps include creating grooves on a wafer that will form the end faces of optical circuits with waveguides, The steps include creating a self-forming waveguide on the extension of the waveguide within the groove, The steps include forming a light-shielding film around the self-formed waveguide and on the wafer, The steps include removing the self-forming waveguide and forming an opening on the end face of the optical circuit that includes the cross-section of the waveguide core, The steps include forming a gas barrier film on the wafer, The steps include cutting the groove to produce a chip-shaped optical circuit and A manufacturing method that includes the following features.

2. A method for manufacturing an optical circuit, The steps include creating grooves on a wafer that will form the end faces of optical circuits with waveguides, The steps include forming a gas barrier film on the wafer, The steps include creating a self-forming waveguide on the extension of the waveguide within the groove, The steps include forming a light-shielding film around the self-formed waveguide and on the wafer, The steps include removing the self-forming waveguide and forming an opening on the end face of the optical circuit that includes the cross-section of the waveguide core, The steps include cutting the groove to produce a chip-shaped optical circuit and A manufacturing method that includes the following features.

3. The optical circuit is The waveguide is composed of a cladding layer on the wafer and a core formed within the cladding layer, The light-shielding film covers the end face of the chip including the cross-section of the core, and has an opening that leaves open the region including the cross-section, The gas barrier film covers the upper surface and all end faces of the chip. A manufacturing method according to claim 1 or 2, comprising:

4. The optical circuit is The system comprises two or more input waveguides into which visible light of different wavelengths is input, a multiplexer for the visible light of different wavelengths, and an output waveguide for the combined light. The manufacturing method according to claim 1 or 2, wherein each end of the input waveguide and the output waveguide has the opening.

5. The manufacturing method according to claim 1 or 2, wherein the diameter of the opening is 10 μm or less.

6. The manufacturing method according to claim 1 or 2, wherein the core is composed of zirconium (ZrO2) doped SiO2 or undoped SiO2.

7. The manufacturing method according to claim 3, wherein the cladding layer is composed of boron-doped SiO2 or fluorine-doped SiO2.

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