Active control of radial etching uniformity

Abstract

To provide a system and a method for active control of radial etching uniformity.SOLUTION: A systems and a method for active control of radial etching uniformity are described. One method comprises the steps of generating a radio frequency (RF) signal having a fundamental frequency and generating another RF signal having a harmonic frequency. The harmonic frequency, a phase, a parameter level, or a combination thereof of the other RF signal is controlled so as to control harmonics of an RF plasma sheath in a plasma chamber to achieve radial etching uniformity.SELECTED DRAWING: Figure 3A

Description

Technical Field

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[0001] The present disclosure relates to a system and method for actively controlling radial etching uniformity.

Background Art

[0002] The description of the background art provided herein is intended to present the background of the present disclosure in general. The research of the inventors named in this specification regarding the scope described in this background art section, and aspects of the description that may not be considered prior art at the time of filing in other cases, are not admitted as prior art to the present disclosure either explicitly or implicitly.

[0003] Plasma equipment generally includes a radio frequency (RF) generator, an impedance matching circuit, and a plasma chamber. The RF generator generates a radio frequency signal supplied to the impedance matching circuit. The impedance matching circuit receives the radio frequency signal and outputs the radio frequency signal, which is supplied to the plasma chamber. A wafer is processed in the plasma chamber by plasma generated when the radio frequency signal is supplied together with a processing gas. For example, the wafer is etched in the plasma chamber according to the radio frequency signal. When etching the wafer, there is non-uniformity in the etching of the wafer.

[0004] Embodiments described in the present disclosure arise in this regard.

Summary of the Invention

[0005] Embodiments of the present disclosure provide a system, apparatus, method, and computer program for actively controlling radial etching uniformity. It should be understood that the present embodiments can be implemented in a number of ways, such as processes, apparatuses, systems, devices, or methods, on a computer-readable medium. Some embodiments will be described below.

[0006] Radial etching uniformity occurs within plasma etchers, such as capacitively coupled plasma etchers using parallel plates. Localization of plasma non-uniformity at the center, mid-diameter, edge, or polar edge results in non-uniformity of the etching rate across the wafer surface. Examples of etching rate non-uniformity include central peak non-uniformity, W-shaped non-uniformity, and M-shaped non-uniformity. Etching rate non-uniformity is observed at various radio frequency (RF) drive frequencies, various processing gaps, and various gas pressures. Due to its nature, the plasma generated within a plasma etcher produces multiple harmonics with respect to the RF drive frequency. Some of the higher-order harmonics generate standing waves within the plasma, which result in non-uniformity of the etching rate across the wafer surface. Due to standing waves, it is difficult to increase radial etching uniformity by adjusting processing parameters such as the processing gap between the plasma etcher chuck and the upper electrode, the RF power ratio, the gas center weight delivery, and the pressure within the plasma etcher.

[0007] In some embodiments, the systems and methods described herein provide active control of radial plasma uniformity by harmonic control. To provide active control, an additional RF power supply is provided in the RF generator in addition to the main high-frequency RF power supply. The additional RF power supply provides a high-RF harmonic power signal whose phase is adjustable or fixed relative to the fundamental frequency. The power magnitude, frequency, and phase of the high-RF harmonic power signal are optimized to reduce the effects of standing waves in the plasma on the wafer surface and increase radial etching uniformity.

[0008] In various embodiments, the main high-frequency RF source supplies a fundamental drive frequency and the phase associated with the fundamental drive frequency to an additional RF source. The additional RF source generates RF power at twice, three times, four times, etc., the fundamental drive frequency, and its phase is adjustable relative to the phase associated with the fundamental drive frequency. By controlling the phase of the additional RF source and the power level of the additional RF source, the shape of the electromagnetic waves in the plasma, the radial shape of the plasma sheath, and the radial plasma density on the wafer surface are controlled to adjust the etching uniformity across the wafer surface and increase radial etching uniformity.

[0009] In some embodiments, a method for controlling radial etching uniformity is described. The method includes generating a first RF signal having a fundamental frequency and a first phase. The method further includes generating a second RF signal having an (n-1)th harmonic frequency and a second phase, based on the fundamental frequency and the first phase, respectively. Note that n is an integer of 3 or more. The method further includes generating a third RF signal having an nth harmonic frequency and a third phase, based on the fundamental frequency and the first phase, respectively. The method also includes receiving the first RF signal, the second RF signal, and the third RF signal by an RF matcher. The method includes outputting a modified RF signal to an electrode in the plasma chamber by the RF matcher in order to control radial etching uniformity across the substrate surface during the etching operation.

[0010] In some embodiments, a system for controlling radial etching uniformity is described. The system includes a first RF generator configured to generate a first RF signal having a fundamental frequency and a first phase. The system further includes a second RF generator configured to generate a second RF signal having an (n-1)th harmonic frequency and a second phase, based on the fundamental frequency and the first phase, respectively. The system includes a third RF generator configured to generate a third RF signal having an nth harmonic frequency and a third phase, based on the fundamental frequency and the first phase, respectively. The system further includes an RF matcher coupled to the first RF generator, the second RF generator, and the third RF generator to receive the first RF signal, the second RF signal, and the third RF signal and to output a modified RF signal. The modified RF signal is used to control radial etching uniformity across the substrate surface during etching operations in a plasma chamber.

[0011] Various embodiments of the system are described. The system includes a first controller configured to control a first RF power supply to generate a first RF signal having a fundamental frequency and a first phase. The system further includes a second controller configured to control a second RF power supply to generate a second RF signal having an (n-1)th harmonic frequency and a second phase, based on the fundamental frequency and the first phase, respectively. The system includes a third RF controller configured to control a third RF power supply to generate a third RF signal having an nth harmonic frequency and a third phase, based on the fundamental frequency and the first phase, respectively. The first RF signal, the second RF signal, and the third RF signal are supplied to an RF matcher and configured to be modified to generate a plurality of modified signals combined to generate a modified RF signal.

[0012] Some of the advantages of the systems and methods described herein include controlling radial etching uniformity across the substrate surface during the etching operation. Radial etching uniformity is controlled by controlling the harmonics of the plasma in the plasma chamber. The harmonics are controlled by generating an RF signal with harmonic frequencies and adjusting the harmonic frequencies, phase, parameter levels, or combinations thereof of the RF signal. By adjusting the harmonics, control of radial etching uniformity is achieved.

[0013] Other embodiments will become apparent from the following detailed description in conjunction with the attached drawings.

[0014] The embodiments can be best understood by referring to the following description in conjunction with the attached drawings. [Brief explanation of the drawing]

[0015] [Figure 1A] Figure 1A shows one embodiment of a system that demonstrates the control of uniformity in radial etching across a substrate surface.

[0016] [Figure 1B] Figure 1B is a graph of one embodiment showing the fundamental frequency of the radio frequency (RF) signal in Figure 1A, the second harmonic frequency of another RF signal in Figure 1A, and the third harmonic frequency of yet another RF signal in Figure 1A.

[0017] [Figure 2] Figure 2 shows one embodiment of a system demonstrating the generation of multiple continuous wave RF signals.

[0018] [Figure 3A] Figure 3A is a diagram of one embodiment of a system demonstrating the multiple state control of harmonics of a plasma in a plasma chamber.

[0019] [Figure 3B] Figure 3B shows an embodiment of a multiplexed state RF signal in which parameter levels are alternated in synchronization with a multiplexed state clock signal.

[0020] [Figure 4] FIG. 4 is a diagram of one embodiment of a system for controlling the parameter levels, phases, and fundamental frequencies of a continuous wave RF signal, the parameter levels, phases, and fundamental frequencies of another continuous wave RF signal, and also the parameter levels, phases, and fundamental frequencies of yet another continuous wave RF signal.

[0021] [Figure 5] FIG. 5 is a diagram of one embodiment of a system for controlling the parameter levels, phases, and fundamental frequencies of a multi-state RF signal, the parameter levels, phases, and fundamental frequencies of another multi-state RF signal, and also the parameter levels, phases, and fundamental frequencies of yet another multi-state RF signal.

[0022] [Figure 6] FIG. 6 is a diagram of one embodiment of a system for controlling one or more variable components within an RF matcher, where the one or more variable components fix the (n - 1)th harmonic frequency of an RF signal and the harmonic frequency of another RF signal to the fundamental frequency of yet another RF signal, fix the phase at the (n - 1)th harmonic frequency of the RF signal and the phase at the nth harmonic frequency of the other RF signal to the phase at the fundamental frequency of yet another RF signal, and fix the parameter level at the (n - 1)th harmonic frequency of the RF signal and the parameter level at the nth harmonic frequency of the other RF signal to the parameter level at the fundamental frequency of yet another RF signal.

[0023] [Figure 7] FIG. 7 is a graph of one embodiment showing the etching rate versus the substrate radius for substrate etching, providing an example of the radial etching uniformity along the substrate radius.

DETAILED DESCRIPTION OF THE INVENTION

[0024] The following embodiments describe systems and methods for actively controlling radial etching uniformity. It will be apparent that embodiments of the present application may be carried out without some or all of these specific details. In other examples, well-known process operations are not described in detail so as not to unnecessarily obscure embodiments of the present application.

[0025] Figure 1A shows one embodiment of system 100 demonstrating control of uniformity in radial etching across a substrate surface. System 100 includes a low-frequency generator (LFG) and a high-frequency generator (HFG). The low-frequency generator LFG is a radio frequency (RF) generator, and the high-frequency generator HFG is also an RF generator. System 100 further includes an RF matcher and a plasma chamber. The low-frequency generator LFG is coupled to input I4 of the RF matcher via RF cable 112.

[0026] The high-frequency generator HFG includes a high-frequency sub-generator HFGf0 operating at a fundamental frequency f0, another high-frequency sub-generator HFGf(n-1) operating at the (n-1)th harmonic frequency f(n-1), and yet another high-frequency sub-generator HFGfn operating at the nth harmonic frequency fn. As used herein, the fundamental frequency is the first harmonic frequency. Note that as used herein, n is an integer greater than or equal to 3. For example, the high-frequency sub-generator HFGf(n-1) operates at the second harmonic frequency, and the high-frequency sub-generator HFGfn operates at the third harmonic frequency. Another example is n = 3.

[0027] The high-frequency subgenerator HFGf0 is coupled to the input I1 of the RF matcher via RF cable 114A. Furthermore, the high-frequency subgenerator HFGf(n-1) is coupled to the input I2 of the RF matcher via another RF cable 114B, and the high-frequency subgenerator HFGfn is coupled to the input I3 of the RF matcher via yet another RF cable 114C. The RF matcher output O1 is coupled to the plasma chamber via RF transmission line 116.

[0028] An example of a low-frequency generator (LFG) includes an X kilohertz (kHz) RF generator, where X is in the range of 50 kHz to 5 megahertz (MHz). For example, a low-frequency generator (LFG) is a 400 kHz RF generator. Another example of a low-frequency generator (LFG) includes a 2 MHz RF generator. An example of a high-frequency generator (HFG) includes a Y MHz RF generator, where Y is in the range of 13 MHz to 100 MHz. For example, a Y MHz RF generator could be a 60 MHz RF generator, a 40 MHz RF generator, or a 27 MHz RF generator. As an example, a 60 MHz RF generator operates between 57 MHz and 63 MHz.

[0029] The RF matching unit includes multiple variable components (VCs) (not shown), such as resistors, inductors, capacitors, or combinations thereof, which are coupled in series or parallel. The RF matching unit matches the impedance of the load coupled to the RF matching unit's output O1 with the impedance of the sources coupled to the RF matching unit's inputs I1, I2, and I3. An example of a load includes an RF transmission line 116 and a plasma chamber. An example of a source includes RF cables 112 and 114A-114C, as well as RF generators LFG and HFG.

[0030] The low-frequency generator LFG generates an RF signal 118 and supplies the RF signal 118 to the input I4 of the RF matcher via the RF cable 112. The high-frequency sub-generator HFGf(n-1) obtains the fundamental frequency, the phase of the RF signal 108A at the fundamental frequency, and the parameter level of the RF signal 108A at the fundamental frequency, generated by the high-frequency sub-generator HFGf0. An example of a parameter level used herein is a voltage or power level. The high-frequency sub-generator HFGf(n-1) multiplies the fundamental frequency by a multiplier (n-1) to generate the (n-1)th harmonic frequency f(n-1) and fixes the harmonic frequency f(n-1) at the fundamental frequency. For example, when tuning the fundamental frequency, if the difference between the (n-1)th harmonic frequency and the fundamental frequency is d1, then the (n-1)th harmonic frequency is also tuned and the difference is maintained at d1. Similarly, the high-frequency subgenerator HFGf(n-1) modifies the phase of the RF signal 108A having a fundamental frequency, for example, by displacing it, generating a phase at the (n-1)th harmonic frequency, and fixing the phase at the (n-1)th harmonic frequency to the phase at the fundamental frequency. For example, when tuning the phase at the fundamental frequency, for example by slightly changing it, if the difference between the phase at the (n-1)th harmonic frequency and the phase at the fundamental frequency is d2, then the phase at the (n-1)th harmonic frequency is also tuned, and the difference is maintained at d2.

[0031] The high-frequency subgenerator HFG(n-1) also changes the parameter level at the fundamental frequency, for example by adding or subtracting, to generate a parameter level at the harmonic frequency f(n-1), and then fixes the parameter level at the harmonic frequency f(n-1) at the parameter level at the fundamental frequency f0. For example, when tuning the parameter level at the fundamental frequency, if the difference between the parameter level at the (n-1)th harmonic frequency and the parameter level at the fundamental frequency is d3 when the parameter level is changed, for example slightly, the parameter level at the (n-1)th harmonic frequency is also tuned, and the difference is maintained at d3.

[0032] Similarly, the high-frequency subgenerator HFGfn multiplies the fundamental frequency by a multiplier n to generate the nth harmonic frequency fn, and fixes the harmonic frequency fn at the fundamental frequency. For example, when tuning the fundamental frequency, if the difference between the nth harmonic frequency and the fundamental frequency is d4 when the fundamental frequency is slightly changed, the nth harmonic frequency is also tuned, and the difference is maintained at d4. Similarly, the high-frequency subgenerator HFGfn modifies the phase of the RF signal 108A having a fundamental frequency, for example, by displacement, to generate the phase at the nth harmonic frequency, and fixes the phase at the nth harmonic frequency at the phase at the fundamental frequency. For example, when tuning the phase at the fundamental frequency, if the difference between the phase at the nth harmonic frequency and the phase at the fundamental frequency is d5 when the phase is slightly changed, the phase at the nth harmonic frequency is also tuned, and the difference is maintained at d5.

[0033] The high-frequency subgenerator HFGfn also changes the parameter level at the fundamental frequency, for example by adding or subtracting, to generate a parameter level at a harmonic frequency fn, and then fixes the parameter level at the harmonic frequency fn at the parameter level at the fundamental frequency f0. For example, when tuning the parameter level at the fundamental frequency, if the difference between the parameter level at the nth harmonic frequency and the parameter level at the fundamental frequency is d6 when the parameter level at the nth harmonic frequency is changed, for example slightly, the parameter level at the nth harmonic frequency is also tuned, and the difference is maintained at d6.

[0034] The low-frequency generator LFG generates an RF signal 118, which is transmitted to input I4 via RF cable 112. Furthermore, the high-frequency sub-generator HFGf0 generates an RF signal 108A having a fundamental frequency, phase at the fundamental frequency, and parameter level at the fundamental frequency, and supplies RF signal 108A to input I1 of the RF matcher via RF cable 114A. Similarly, the high-frequency sub-generator HFGf(n-1) generates an RF signal 108B having the (n-1)th harmonic frequency, phase at the (n-1)th harmonic frequency, and parameter level at the (n-1)th harmonic frequency, and supplies RF signal 108B to input I2 of the RF matcher via RF cable 114B. Similarly, the high-frequency subgenerator HFGfn generates an RF signal 108C having the nth harmonic frequency, phase at the nth harmonic frequency, and parameter level at the nth harmonic frequency, and supplies the RF signal 108C to the input I3 of the RF matcher via the RF cable 114C.

[0035] The RF matching unit receives RF signals 118 and 108A-108C, matches the load impedance with the source impedance, generates a modified RF signal 110 from RF signals 118 and 108A-108C, and supplies the modified RF signal 110 to the plasma chamber via the RF signal transmission line 116. In addition to the modified RF signal 110, supplying one or more processing gases, such as fluorine-containing gases, to the plasma chamber causes the plasma to collide or be maintained within the plasma chamber to process the substrate. Examples of fluorine-containing gases include tetrafluoromethane (CF4), sulfur hexafluoride (SF6), and hexafluoroethane (C2F6). Examples of substrate processing include material deposition on the substrate, substrate etching, substrate cleaning, and substrate sputtering.

[0036] When a substrate is processed by applying a modified RF signal 110 generated based on RF signals 108B to 108C, the RF harmonics of the plasma sheath within the plasma chamber are controlled to ensure radial etching uniformity across the substrate surface. Otherwise, if the RF harmonics of the plasma sheath are not controlled, standing waves may be generated within the plasma, leading to non-uniformity in radial etching across the substrate surface.

[0037] Figure 1B is a graph 150 of one embodiment showing the fundamental frequency of RF signal 108A in Figure 1A, the second harmonic frequency of RF signal 108B in Figure 1A, and the third harmonic frequency of RF signal 108C in Figure 1A. Graph 150 represents the parameter level PL3 at the fundamental frequency of RF signal 152A, the parameter level PL2 at the second harmonic frequency of RF signal 152B, and the parameter level PL1 at the third harmonic frequency of RF signal 152C against time t. RF signal 152A is an example of RF signal 108A, RF signal 152B is an example of RF signal 108B, and RF signal 152C is an example of RF signal 108C. Examples of RF signal parameter levels include the envelope of the RF signal, the peak-to-peak magnitude of the RF signal, or the zero-to-peak magnitude of the RF signal. RF signals 152A~152C are continuous wave (CW) signals and do not transition between multiplexed states, maintaining a single state. Parameter level PL3 is greater than parameter level PL2. Parameter level PL2 is greater than parameter level PL1.

[0038] The continuous wave signals used herein do not transition between multiple states, such as between high and low states. For example, all parameter values ​​of the parameter level of the continuous wave signal lie within a preset range, such as the variance or standard deviation of one of the parameter values. As another example, the difference between the lowest and highest values ​​of all parameter values ​​at the parameter level of the continuous wave signal is less than a preset threshold. For example, the highest parameter value is 20% or less of the lowest parameter value. As yet another example, the continuous wave signal may have high states such as state S1, or low states such as state S0, but may not have both states S1 and S0. States S1 and S0 are described further below.

[0039] In some embodiments, the parameter level of RF signal 152B is greater than the parameter level of RF signal 152A. Furthermore, in various embodiments, the parameter level of RF signal 152C is greater than the parameter level of RF signal 152A and greater than the parameter level of RF signal 152B. In some embodiments, the parameter level of RF signal 152C is less than the parameter level of RF signal 152A and greater than the parameter level of RF signal 152B. In some embodiments, the parameter level of RF signal 152C is greater than the parameter level of RF signal 152A and less than the parameter level of RF signal 152B.

[0040] Figure 2 is a diagram of one embodiment of system 200 showing the generation of multiplexed RF signals 208A, 208B, and 208C, which are continuous wave (CW) signals. RF signal 208A is an example of RF signal 108A in Figure 1A, RF signal 208B is an example of RF signal 108B in Figure 1A, and RF signal 208C is an example of RF signal 108C in Figure 1A.

[0041] System 200 includes a low-frequency RF generator LFGCW and a high-frequency RF generator HFGCW. The low-frequency RF generator LFGCW is an example of the low-frequency generator LFG in Figure 1A, and the high-frequency RF generator HFGCW is an example of the high-frequency generator HFG in Figure 1A.

[0042] The low-frequency generator LFGCW includes a digital signal processor (DSP), a parameter controller (PR), a frequency controller (FC), a driver system (DRVR), and a power supply (PSU). The digital signal processor (DSP) is coupled to the parameter controller (PR) and the frequency controller (FC). The parameter controller (PR) and the frequency controller (FC) are coupled to the driver system (DRVR), which is coupled to the power supply (PSU). The power supply (PSU) is coupled to the input I4 of the RF matcher via RF cable 112.

[0043] The processors used herein are application-specific integrated circuits (ASICs), programmable logic devices (PLDs), central processing units (CPUs), microprocessors, or microcontrollers. The controllers used herein include ASICs, PLDs, CPUs, microprocessors, microcontrollers, or processors, and further include memory devices. Examples of memory devices used herein include random-access memory (RAM) and read-only memory (ROM). For example, memory devices include flash memory, hard disks, or storage devices. A memory device is an example of a computer-readable medium.

[0044] An example of a driver system used herein includes one or more transistors coupled together to generate an electric current signal. An example of a power supply used herein includes a radio frequency oscillator that oscillates to generate a radio frequency signal.

[0045] The high-frequency RF generator HFGCW includes a sub-generator HFGf0CW operating at the fundamental frequency, another sub-generator HFGf(n-1)CW operating at the (n-1)th harmonic frequency, and yet another sub-generator HFGfnCW operating at the nth harmonic frequency. The sub-generator HFGf0CW includes a digital signal processor DSP, a parameter controller PRf0, a phase controller φf0, a frequency controller FCf0, a driver system DRVR, and a power supply PSUf0. The digital signal processor of the sub-generator HFGf0CW is coupled to the parameter controller PRf0, the phase controller φf0, and the frequency controller FCf0 of the sub-generator HFGf0CW. The parameter controller PRf0, phase controller φf0, and frequency controller FCf0 of the sub-generator HFGf0CW are coupled to the driver system DRVR of the sub-generator HFGf0CW, and the driver system DRVR is coupled to the power supply PSUf0 of the sub-generator HFGf0CW. The power supply PSUf0 of the sub-generator HFGf0CW is coupled to RF cable 114A.

[0046] Similarly, the sub-generator HFGf(n-1)CW includes a parameter controller PRf(n-1), a phase controller φf(n-1), a frequency controller FCf(n-1), a driver system DRVR, and a power supply PSUf(n-1). The parameter controller PRf(n-1), the phase controller φf(n-1), and the frequency controller FCf(n-1) of the sub-generator HFGf(n-1)CW are coupled to the driver system DRVR of the sub-generator HFGf(n-1)CW, and the driver system DRVR of the sub-generator HFGf(n-1)CW is coupled to the power supply PSUf(n-1) of the sub-generator HFGf(n-1)CW. The power supply PSUf(n-1) for the sub-generator HFGf(n-1)CW is coupled to RF cable 114B.

[0047] Furthermore, the sub-generator HFGfnCW includes a parameter controller PRfn, a phase controller φfn, a frequency controller FCfn, a driver system DRVR, and a power supply PSUfn. The parameter controller PRfn, the phase controller φfn, and the frequency controller FCfn of the sub-generator HFGfnCW are coupled to the driver system DRVR of the sub-generator HFGfnCW, and the driver system DRVR of the sub-generator HFGfnCW is coupled to the power supply PSUfn of the sub-generator HFGfnCW. The power supply PSUfn of the sub-generator HFGfnCW is coupled to RF cable 114C.

[0048] Furthermore, the parameter controller PRf(n-1) of the sub-generator HFGf(n-1)CW is coupled to the parameter controller PRf0 of the sub-generator HFGf0CW, and the parameter controller PRfn of the sub-generator HFGfnCW is coupled to the parameter controller PRf0 of the sub-generator HFGf0CW. Furthermore, the phase controller φf(n-1) of the sub-generator HFGf(n-1)CW is coupled to the phase controller φf0 of the sub-generator HFGf0CW, and the phase controller φfn of the sub-generator HFGfnCW is coupled to the phase controller φf0 of the sub-generator HFGf0CW. Furthermore, the frequency controller FCf(n-1) of the sub-generator HFGf(n-1)CW is coupled to the frequency controller FCf0 of the sub-generator HFGf0CW, and the frequency controller FCfn of the sub-generator HFGfnCW is coupled to the frequency controller FCf0 of the sub-generator HFGf0CW.

[0049] System 200 includes a host computer system (HCS), which includes a processor (P) and a memory device (MD). The processor of the host computer system is coupled to the memory device of the host computer system.

[0050] The host computer system's processor is coupled to the digital signal processor of the low-frequency RF generator LFGCW via transfer medium TM1 and to the digital signal processor of the high-frequency RF generator HFGCW via another transfer medium TM2. Examples of transfer media used herein include parallel transfer cables, serial transfer cables, or Universal Serial Bus (USB) transfer cables.

[0051] The output O1 of the RF matcher is coupled to a chuck 212, such as an electrostatic chuck in a plasma chamber, via a transmission line 116. The plasma chamber includes an upper electrode facing the chuck 212. The substrate S is placed on the upper surface of the chuck 212 and processed by the plasma generated in the plasma chamber. The chuck 212 includes a lower electrode made of a metal such as aluminum or an aluminum alloy. Similarly, the upper electrode is made of a metal. The upper electrode is coupled to ground potential, and the chuck 212 is coupled to the RF transmission line 116. A gap is formed between the upper electrode and the chuck 212, and plasma is generated in the gap to process the substrate S.

[0052] The host computer system's processor transmits a data signal via the transfer medium TM1 to the digital signal processor of the low-frequency RF generator LFGCW, the data signal including the parameter levels and frequency of the RF signal 218 generated by the low-frequency RF generator LFGCW. Note that the RF signal 218 is an example of the RF signal 118 in Figure 1A and is a continuous wave signal.

[0053] The digital signal processor of the low-frequency RF generator LFGCW receives the parameter level and frequency of the RF signal 218, provides the parameter level to the parameter controller of the low-frequency RF generator LFGCW, and provides the frequency to the frequency controller of the low-frequency RF generator LFGCW. Upon receiving the parameter level, the parameter controller of the low-frequency RF generator LFGCW provides the parameter level to the driver system of the low-frequency RF generator LFGCW. Furthermore, upon receiving the frequency, the frequency controller of the low-frequency RF generator LFGCW provides the frequency to the driver system of the low-frequency RF generator LFGCW. The driver system of the low-frequency RF generator LFGCW generates a current signal based on the parameter level received from the parameter controller and the frequency received from the frequency controller, and provides the current signal to the power supply of the low-frequency RF generator LFGCW. Upon receiving the current signal, the power supply of the low-frequency RF generator LFGCW generates the RF signal 218 having the parameter level and frequency received from the host computer system's processor by the digital signal processor of the low-frequency RF generator LFGCW. The RF signal 218 is supplied to the input I4 of the RF matcher via the RF cable 112.

[0054] Similarly, the host computer system's processor transmits a data signal via the transfer medium TM2 to the sub-generator HFGf0CW's digital signal processor, which includes the frequency f0, the fundamental frequency, and the phase at the fundamental frequency of the RF signal 208A generated by the sub-generator HFGf0CW, as well as parameter levels at the fundamental frequency. The sub-generator HFGf0CW's digital signal processor receives the parameter levels, fundamental frequency, and phase of the RF signal 208A, and provides the parameter levels to the sub-generator HFGf0CW's parameter controller, the phase to the sub-generator HFGf0CW's phase controller, and the fundamental frequency to the sub-generator HFGf0CW's frequency controller. Upon receiving the parameter levels, the sub-generator HFGf0CW's parameter controller provides the parameter levels to the sub-generator HFGf0CW's driver system. Furthermore, the phase controller of the sub-generator HFGf0CW provides the phase to the driver system of the sub-generator HFGf0CW upon receiving the phase. In addition, the frequency controller of the sub-generator HFGf0CW provides the fundamental frequency to the driver system of the sub-generator HFGf0CW upon receiving the fundamental frequency. The driver system of the sub-generator HFGf0CW generates a current signal based on the parameter level received from the parameter controller of the sub-generator HFGf0CW, the phase received from the phase controller of the sub-generator HFGf0CW, and the fundamental frequency received from the frequency controller of the sub-generator HFGf0CW, and provides the current signal to the power supply of the sub-generator HFGf0CW. Upon receiving the current signal, the power supply of the sub-generator HFGf0CW generates an RF signal 208A having the parameter level, phase, and fundamental frequency received from the processor of the host computer system by the digital signal processor of the sub-generator HFGf0CW. RF signal 208A is supplied to input I1 of the RF matcher via RF cable 114A.

[0055] The frequency controller of the sub-generator HFGf(n-1)CW obtains the fundamental frequency of RF signal 208A from the frequency controller of sub-generator HFGf0CW and generates the (n-1)th harmonic frequency of RF signal 208B generated by sub-generator HFGf(n-1)CW. For example, the frequency controller of sub-generator HFGf(n-1)CW obtains the fundamental frequency of RF signal 208A, multiplies the fundamental frequency by a multiplier such as (n-1), and generates the (n-1)th harmonic frequency of RF signal 208B. The frequency controller of sub-generator HFGf(n-1)CW generates the (n-1)th harmonic frequency of RF signal 208B, achieves a predetermined frequency difference between the (n-1)th harmonic frequency of RF signal 208B and the fundamental frequency of RF signal 208A, and fixes the (n-1)th harmonic frequency at the fundamental frequency. The frequency controller for the sub-generator HFGf(n-1)CW provides the (n-1)th harmonic frequency of the RF signal 208B to the driver system of the sub-generator HFGf(n-1)CW.

[0056] It should be noted that a predetermined frequency difference corresponds to a predetermined uniformity in the etching rate when etching the substrate S. For example, the frequency controller of the sub-generator HFGf(n-1)CW stores a one-to-one correspondence or relationship between a predetermined frequency difference and a predetermined uniformity in the etching rate in the frequency controller's memory device. The frequency controller of the sub-generator HFGf(n-1)CW accesses the predetermined frequency difference from the sub-generator HFGf(n-1)CW's memory device to achieve the predetermined uniformity in the etching rate.

[0057] Furthermore, the parameter controller of the sub-generator HFGf(n-1)CW obtains the parameter level at the fundamental frequency of RF signal 208A from the parameter controller of the sub-generator HFGf0CW, and generates the parameter level at the (n-1)th harmonic frequency of RF signal 208B generated by the sub-generator HFGf(n-1)CW. For example, the parameter controller of the sub-generator HFGf(n-1)CW obtains the parameter level of RF signal 208A, adds to or subtracts from the parameter level, and generates the parameter level at the (n-1)th harmonic frequency of RF signal 208B. The parameter controller of the sub-generator HFGf(n-1)CW generates the parameter level at the (n-1)th harmonic frequency of RF signal 208B, achieves a predetermined parameter level difference between the parameter level at the (n-1)th harmonic frequency of RF signal 208B and the parameter level at the fundamental frequency of RF signal 208A, and fixes the parameter level at the (n-1)th harmonic frequency to the parameter level at the fundamental frequency. The parameter controller of the sub-generator HFGf(n-1)CW provides the parameter level at the (n-1)th harmonic frequency of RF signal 208B to the driver system of the sub-generator HFGf(n-1)CW.

[0058] It should be noted that a predetermined parameter level difference corresponds to a predetermined uniformity in the etching rate when etching the substrate S. For example, the parameter controller of the sub-generator HFGf(n-1)CW stores a one-to-one correspondence or relationship between a predetermined parameter level difference and a predetermined uniformity in the etching rate in the parameter controller's memory device. The parameter controller of the sub-generator HFGf(n-1)CW accesses the predetermined parameter level difference from the sub-generator HFGf(n-1)CW's memory device to achieve the predetermined uniformity in the etching rate.

[0059] Furthermore, the phase controller of the sub-generator HFGf(n-1)CW obtains the phase at the fundamental frequency of RF signal 208A from the phase controller of sub-generator HFGf0CW, and generates the phase at the (n-1)th harmonic frequency of RF signal 208B generated by sub-generator HFGf(n-1)CW. For example, the phase controller of sub-generator HFGf(n-1)CW obtains the phase of RF signal 208A, shifts the phase along time t, and generates the phase at the (n-1)th harmonic frequency of RF signal 208B. The phase controller of the sub-generator HFGf(n-1)CW generates the phase at the (n-1)th harmonic frequency of RF signal 208B, achieves a predetermined parameter level difference between the phase at the (n-1)th harmonic frequency of RF signal 208B and the phase at the fundamental frequency of RF signal 208A, and fixes the phase at the (n-1)th harmonic frequency to the phase at the fundamental frequency. The phase controller of the sub-generator HFGf(n-1)CW provides the phase at the (n-1)th harmonic frequency of RF signal 208B to the driver system of the sub-generator HFGf(n-1)CW.

[0060] It should be noted that a predetermined phase difference corresponds to a predetermined uniformity in the etching rate of the substrate S. For example, the phase controller of the sub-generator HFGf(n-1)CW stores a one-to-one correspondence or relationship between a predetermined phase difference and a predetermined uniformity in the etching rate in the memory device of the phase controller. The phase controller of the sub-generator HFGf(n-1)CW accesses the predetermined phase difference from the memory device of the sub-generator HFGf(n-1)CW to achieve the predetermined uniformity in the etching rate. It should be further noted that the predetermined uniformity in the etching rate is the uniformity of radial etching across the upper surface of the substrate S.

[0061] The driver system of the sub-generator HFGf(n-1)CW receives the frequency at the (n-1)th harmonic frequency, the phase at the (n-1)th harmonic frequency, and the parameter at the (n-1)th harmonic frequency, and generates a current signal from these frequencies, phases, and parameters. The power supply of the sub-generator HFGf(n-1)CW receives the current signal from the driver system of the sub-generator HFGf(n-1)CW and generates an RF signal 208B having the frequency at the (n-1)th harmonic frequency, the phase at the (n-1)th harmonic frequency, and the parameter level at the (n-1)th harmonic frequency, and supplies the RF signal 208B to the input I2 of the RF matcher via the RF cable 114B.

[0062] Furthermore, in a similar manner, the frequency controller of the sub-generator HFGfnCW obtains the fundamental frequency of RF signal 208A from the frequency controller of sub-generator HFGf0CW and generates the nth harmonic frequency of RF signal 208C generated by sub-generator HFGfnCW. For example, the frequency controller of sub-generator HFGfnCW obtains the fundamental frequency of RF signal 208C, multiplies the fundamental frequency by a power such as n, and generates the nth harmonic frequency of RF signal 208C. The frequency controller of sub-generator HFGfnCW generates the nth harmonic frequency of RF signal 208C, achieves a predetermined frequency difference (frequency difference) between the nth harmonic frequency of RF signal 208C and the fundamental frequency of RF signal 208A, and fixes the nth harmonic frequency at the fundamental frequency. The frequency controller of the sub-generator HFGfnCW provides the nth harmonic frequency of the RF signal 208C to the driver system of the sub-generator HFGfnCW.

[0063] It should be noted that a predetermined frequency difference corresponds to a predetermined uniformity in the etching rate when etching the substrate S. For example, the frequency controller of the sub-generator HFGfnCW stores a one-to-one correspondence or relationship between a predetermined frequency difference and a predetermined uniformity in the etching rate in the frequency controller's memory device. The frequency controller of the sub-generator HFGfnCW accesses the predetermined frequency difference from the sub-generator HFGfnCW's memory device to achieve the predetermined uniformity in the etching rate.

[0064] Furthermore, the parameter controller of the sub-generator HFGfnCW obtains the parameter level at the fundamental frequency of RF signal 208C from the parameter controller of the sub-generator HFGf0CW, and generates the parameter level at the nth harmonic frequency of RF signal 208C generated by the sub-generator HFGfnCW. For example, the parameter controller of the sub-generator HFGfnCW obtains the parameter level of RF signal 208C, adds to or subtracts from the parameter level, and generates the parameter level at the nth harmonic frequency of RF signal 208C. The parameter controller of the sub-generator HFGfnCW generates the parameter level at the nth harmonic frequency of RF signal 208C, achieves a predetermined parameter level difference (parameter level difference) between the parameter level at the nth harmonic frequency of RF signal 208C and the parameter level at the fundamental frequency of RF signal 208A, and fixes the parameter level at the nth harmonic frequency to the parameter level at the fundamental frequency. The parameter controller for the sub-generator HFGfnCW provides the parameter level at the nth harmonic frequency of the RF signal 208C to the driver system of the sub-generator HFGfnCW.

[0065] It should be noted that a predetermined parameter level difference corresponds to a predetermined uniformity in the etching rate when etching the substrate S. For example, the parameter controller of the sub-generator HFGfnCW stores a one-to-one correspondence or relationship between a predetermined parameter level difference and a predetermined uniformity in the etching rate in the parameter controller's memory device. The parameter controller of the sub-generator HFGfnCW accesses the predetermined parameter level difference from the sub-generator HFGfnCW's memory device to achieve the predetermined uniformity in the etching rate.

[0066] Furthermore, the phase controller of the sub-generator HFGfnCW obtains the phase at the fundamental frequency of RF signal 208A from the phase controller of the sub-generator HFGf0CW, and generates the phase at the nth harmonic frequency of RF signal 208C generated by the sub-generator HFGfnCW. For example, the phase controller of the sub-generator HFGfnCW obtains the phase of RF signal 208A, shifts the phase along time t, and generates the phase at the nth harmonic frequency of RF signal 208C. The phase controller of the sub-generator HFGfnCW generates the phase at the nth harmonic frequency of RF signal 208C, achieves a predetermined phase difference between the phase at the nth harmonic frequency of RF signal 208C and the phase at the fundamental frequency of RF signal 208A, and fixes the phase at the nth harmonic frequency to the phase at the fundamental frequency. The phase controller of the sub-generator HFGfnCW provides the phase of the RF signal 208C at the nth harmonic frequency to the driver system of the sub-generator HFGfnCW.

[0067] It should be noted that a predetermined phase difference corresponds to a predetermined uniformity in the etching rate when etching the substrate S. For example, the phase controller of the sub-generator HFGfnCW stores a one-to-one correspondence or relationship between a predetermined phase difference and a predetermined uniformity in the etching rate in the phase controller's memory device. The phase controller of the sub-generator HFGfnCW accesses the predetermined phase difference from the sub-generator HFGfnCW's memory device to achieve the predetermined uniformity in the etching rate.

[0068] The driver system of the sub-generator HFGfnCW receives the frequency at the nth harmonic frequency, the phase at the nth harmonic frequency, and the parameter level at the nth harmonic frequency, and generates a current signal from these frequencies, phases, and parameters. The power supply of the sub-generator HFGfnCW, upon receiving the current signal from the driver system of the sub-generator HFGfnCW, generates an RF signal 208C having the frequency at the nth harmonic frequency, the phase at the nth harmonic frequency, and the parameter level at the nth harmonic frequency, and supplies the RF signal 208C to the input I3 of the RF matcher via the RF cable 114C.

[0069] When the RF matcher receives RF signals 218, 208A, 208B, and 208C, it matches the impedance of the load coupled to output O1 with the impedance of the sources coupled to inputs I1-I4, generates a corrected RF signal, combines the corrected RF signals, for example by adding them, to generate a corrected RF signal 210 at output O1. Examples of sources coupled to inputs I1-I4 include RF generator LGFCW, RF generator HFGCW, and RF cables 112 and 114A to 114C. The corrected RF signal 210 is supplied to the chuck 212 of the plasma chamber via the RF transmission line 116. Once one or more processing gases and the corrected RF signal 210 are supplied to the plasma chamber, plasma collides or is generated within the plasma chamber to process the substrate S. By controlling the parameter levels, phases, and frequencies of RF signal 208A, the parameter levels, phases, and frequencies of RF signal 208B, RF signal 208C, and the relationship between the RF harmonics of the plasma sheath of the plasma in the plasma chamber and the fundamental frequencies such as f0 of the plasma sheath in the plasma chamber are controlled, thereby achieving radial etching uniformity across the upper surface of the substrate S.

[0070] In some embodiments, the digital signal processor DSP, parameter controller PR, and frequency controller FC of the low-frequency RF generator LFGCW are replaced by a controller. For example, the functions performed by the digital signal processor DSP, parameter controller PR, and frequency controller FC of the low-frequency RF generator LFGCW as described herein are instead performed by the controller.

[0071] In various embodiments, the digital signal processor, parameter controller, phase controller, and frequency controller of the sub-generator HFGf0CW are replaced by the controller of the sub-generator HFGf0CW. For example, the functions performed by the digital signal processor, parameter controller, phase controller, and frequency controller of the sub-generator HFGf0CW described herein are instead performed by the controller of the sub-generator HFGf0CW. Furthermore, in some embodiments, the parameter controller, phase controller, and frequency controller of the sub-generator HFGf(n-1)CW are replaced by the controller of the sub-generator HFGf(n-1)CW, and the parameter controller, phase controller, and frequency controller of the sub-generator HFGfnCW are replaced by the controller of the sub-generator HFGf(n-1)CW. For example, the functions performed by the parameter controller, phase controller, and frequency controller of the sub-generator HFGf(n-1)CW described herein are instead performed by the controller of the sub-generator HFGf(n-1)CW, and the functions performed by the parameter controller, phase controller, and frequency controller of the sub-generator HFGfnCW described herein are instead performed by the controller of the sub-generator HFGfnCW.

[0072] In some embodiments, the high-frequency RF generator HFGCW includes any number of sub-generators. For example, the high-frequency RF generator HFGCW excludes the sub-generators HFGf(n-1)CW or HFGfnCW. As another example, the high-frequency RF generator HFGCW includes one or more additional sub-generators other than those shown in Figure 2, such as sub-generators HFGf(n+1)CW and HFGf(n+2)CW.

[0073] In various embodiments, the chuck 212 is coupled to ground potential, and the upper electrode is coupled to the RF transmission line 116 to receive the modified RF signal 210.

[0074] In some embodiments, the controllers PRf0, φf0, FCf0, PRf(n-1), φf(n-1), FCf(n-1), PRfn, φfn, and FCfn of the sub-generator HFGf0CW, as well as the digital signal processor DSP, are integrated into a single controller. For example, the functions performed by the controllers PRf0, φf0, FCf0, PRf(n-1), φf(n-1), FCf(n-1), PRfn, φfn, and FCfn of the sub-generator HFGf0CW, as well as the digital signal processor DSP, as described herein, are performed by the processor of the single controller. The single controller is coupled to the driver systems for the sub-generator HFGf0CW, the sub-generator HFGf(n-1)CW, and the sub-generator HFGfnCW. The single controller includes a processor and a memory device, the processor being coupled to the memory device. The functions performed by the controllers PRf0, φf0, FCf0, PRf(n-1), φf(n-1), FCf(n-1), PRfn, φfn, and FCfn of the sub-generator HFGf0CW, as described herein, and the digital signal processor DSP, are computer modules or computer programs executed by the processor of a single controller.

[0075] In various embodiments, the single controllers that perform the functions of the sub-generator HFGf0CW controllers PRf0, φf0, FCf0, PRf(n-1), φf(n-1), FCf(n-1), PRfn, φfn, and FCfn, as well as the functions performed by the digital signal processor DSP, as described herein, are part of the host computer. For example, the processor of the single controller is the same as the processor of the host computer system, and the memory devices of the single controller are the same as the memory devices of the host computer. In some embodiments, the single controllers that perform the functions of the sub-generator HFGf0CW controllers PRf0, φf0, FCf0, PRf(n-1), φf(n-1), FCf(n-1), PRfn, φfn, and FCfn, as well as the functions performed by the digital signal processor DSP, as described herein, are located within the RF generator HFGCW and are coupled to the processor of the host computer.

[0076] In some embodiments, the functions performed by the parameter controller PR and frequency controller FC of the low-frequency RF generator LFGCW, as described herein, are performed by the digital signal processor DSP of the low-frequency RF generator LFGCW. In these embodiments, the digital signal processor of the low-frequency RF generator LFGCW is coupled to the driver system of the low-frequency RF generator LFGCW.

[0077] Furthermore, in various embodiments, the functions performed by the controllers PR and FC of the low-frequency RF generator LFGCW and the digital signal processor DSP of the low-frequency RF generator LFGCW, as described herein, are performed by the processor of the host computer system. In these embodiments, the processor of the host computer system is coupled to the driver system of the low-frequency RF generator LFGCW.

[0078] Figure 3A is a diagram of one embodiment of system 300 demonstrating multiple state control of the harmonics of a plasma in a plasma chamber. System 300 includes a low-frequency RF generator LFGMS, which is an example of the low-frequency RF generator LFG shown in Figure 1A. System 300 further includes a high-frequency RF generator HFGMS, which is an example of the high-frequency RF generator HFG shown in Figure 1A. System 300 further includes an RF matcher and a plasma chamber.

[0079] The low-frequency RF generator LFGMS includes a digital signal processor DSP, a parameter controller PRS1 for state S1, a frequency controller FCS1 for state S1, another parameter controller PRS0 for state S0, a frequency controller FCS0 for state S0, a driver system DRVR, and a power supply unit PSU. The digital signal processor of the low-frequency RF generator LFGMS is coupled to the parameter controllers for state S1, the parameter controller for state S0, the frequency controller for state S1, and the frequency controller for state S0. Controllers PRS1, PRS0, FCS0, and FCS1 are coupled to the driver system DRVR of the low-frequency RF generator LFGMS, and the driver system DRVR is coupled to the power supply unit PSU of the low-frequency RF generator LFGMS. The power supply unit of the low-frequency RF generator LFGMS is coupled to the input I4 of the RF matcher via RF cable 112.

[0080] The high-frequency RF generator HFGMS includes a sub-generator HFG0MS, another sub-generator HFGf(n-1)MS, and yet another sub-generator HFGfnMS. Sub-generator HFGf0MS operates at a fundamental frequency such as frequency f0, sub-generator HFGf(n-1)MS operates at the (n-1)th harmonic frequency, and sub-generator HFGfnMS operates at the nth harmonic frequency.

[0081] The sub-generator HFGf0MS includes a digital signal processor DSP, a parameter controller PRf0S1 for state S1, another parameter controller PRf0S0 for state S0, a phase controller φf0S1 for state S1, another phase controller φf0S0 for state S0, a frequency controller FCf0S1 for state S1, and another frequency controller FCf0S0 for state S0. The sub-generator HFGf0MS further includes a driver system DRVR and a power supply PSUf0.

[0082] The digital signal processor of the sub-generator HFGf0MS is coupled to the parameter controllers PRf0S1 and PRf0S0, the frequency controllers FCf0S1 and FCf0S0, and the phase controllers φf0S1 and φf0S0. The parameter controllers PRf0S1 and PRf0S0, the frequency controllers FCf0S1 and FCf0S0, and the phase controllers φf0S1 and φf0S0 are coupled to the driver system of the sub-generator HFGf0MS, and the driver system is coupled to the power supply PSUf0. The power supply PSUf0 is coupled to the RF cable 114A.

[0083] Similarly, the sub-generator HFGf(n-1)MS includes a parameter controller PRf(n-1)S1 for state S1, another parameter controller PRf(n-1)S0 for state S0, a phase controller φf(n-1)S1 for state S1, another phase controller φf(n-1)S0 for state S0, a frequency controller FCf(n-1)S1 for state S1, and another frequency controller FCf(n-1)S0 for state S0. The sub-generator HFGf(n-1)MS further includes a driver system DRVR and a power supply PSUf(n-1).

[0084] The digital signal processor of the sub-generator HFGf(n-1)MS is coupled to the parameter controllers PRf(n-1)S1 and PRf(n-1)S0, the frequency controllers FCf(n-1)S1 and FCf(n-1)S0, and the phase controllers φf(n-1)S1 and φf(n-1)S0. The parameter controllers PRf(n-1)S1 and PRf(n-1)S0, the frequency controllers FCf(n-1)S1 and FCf(n-1)S0, and the phase controllers φf(n-1)S1 and φf(n-1)S0 are coupled to the driver system of the sub-generator HFGf(n-1)MS, and the driver system is coupled to the power supply PSUf(n-1). The power supply PSUf(n-1) is coupled to RF cable 114B.

[0085] Furthermore, the sub-generator HFGfnMS includes a digital signal processor DSP, a parameter controller PRfnS1 for state S1, another parameter controller PRfnS0 for state S0, a phase controller φfnS1 for state S1, another phase controller φfnS0 for state S0, a frequency controller FCfnS1 for state S1, and another frequency controller FCfnS0 for state S0. The sub-generator HFGfnMS further includes a driver system DRVR and a power supply PSUf0.

[0086] The digital signal processor of the sub-generator HFGfnMS is coupled to the parameter controllers PRfnS1 and PRfnS0, the frequency controllers FCfnS1 and FCfnS0, and the phase controllers φfnS1 and φfnS0. The parameter controllers PRfnS1 and PRfnS0, the frequency controllers FCfnS1 and FCfnS0, and the phase controllers φfnS1 and φfnS0 are coupled to the driver system of the sub-generator HFGfnMS, and the driver system is coupled to the power supply PSUfn. The power supply PSUfn is coupled to the RF cable 114C.

[0087] Furthermore, the parameter controller PRf(n-1)S1 for state S1 is coupled to the parameter controller PRf0S1 for state S1, and the parameter controller PRfnS1 for state S1 is coupled to the parameter controller PRf0S1. Similarly, the parameter controller PRf(n-1)S0 for state S0 is coupled to the parameter controller PRf0S0 for state S0, and the parameter controller PRfnS0 for state S0 is coupled to the parameter controller PRf0S0.

[0088] Furthermore, the phase controller φf(n-1)S1 for state S1 is coupled to the phase controller φf0S1 for state S1, and the phase controller φfnS1 for state S1 is coupled to the phase controller φf0S1. Similarly, the phase controller φf(n-1)S0 for state S0 is coupled to the phase controller φf0S0 for state S0, and the phase controller φfnS0 for state S0 is coupled to the phase controller φf0S0 for state S0.

[0089] Furthermore, the frequency controller FCf(n-1)S1 for state S1 is coupled to the frequency controller FCf0S1 for state S1, and the frequency controller FCfnS1 for state S1 is coupled to the frequency controller FCf0S1. Similarly, the frequency controller FCf(n-1)S0 for state S0 is coupled to the frequency controller FCf0S0 for state S0, and the frequency controller FCfnS0 for state S0 is coupled to the frequency controller FCf0S0.

[0090] System 300 includes a host computer system. The processor of the host computer system is coupled to the digital signal processor of the low-frequency RF generator LGFMS via transfer medium TM1 and to the digital signal processor of the high-frequency RF generator HFGMS via transfer medium TM2. Furthermore, the processor of the computer system is coupled to the digital signal processor of the low-frequency RF generator LGFMS via transfer medium TM3 and to the digital signal processor of the high-frequency RF generator HFGMS via transfer medium TM4.

[0091] The host computer system's processor transmits a clock signal, such as a transistor-to-transistor logic (TTL) signal, to the digital signal processor of the low-frequency RF generator LFGMS via the transfer medium TM3, and also transmits a data signal to the digital signal processor of the low-frequency RF generator LFGMS via the transfer medium TM1. The data signal transmitted to the low-frequency RF generator LFGMS includes the parameter level for state S1 of the RF signal 318 generated by the low-frequency RF generator LFGMS, the parameter level for state S0 of the RF signal 318, the frequency for state S1 of the RF signal 318, and the frequency for state S0 of the RF signal 318.

[0092] The digital signal processor of the low-frequency RF generator (LFGMS) receives a clock signal and determines whether the state of the clock signal is S1 or S0. For example, in response to a determination that the clock signal has a logic level of 1, the digital signal processor of the low-frequency RF generator (LFGMS) determines that the state of the clock signal is S1. Furthermore, in response to a determination that the clock signal has a logic level of 0, the digital signal processor of the low-frequency RF generator (LFGMS) determines that the state of the clock signal is S0. As another example, in response to a determination that the clock signal has a logic level greater than a predetermined logic level, the digital signal processor of the low-frequency RF generator (LFGMS) determines that the state of the clock signal is S1. On the other hand, in response to a determination that the clock signal has a logic level less than a predetermined logic level, the digital signal processor of the low-frequency RF generator (LFGMS) determines that the state of the clock signal is S0.

[0093] During state S1 of the clock signal, the digital signal processor of the low-frequency RF generator LFGMS transmits the parameter level for state S1 to the parameter controller PRS1 and the frequency for state S1 to the frequency controller FCS1. Similarly, during state S0 of the clock signal, the digital signal processor of the low-frequency RF generator LFGMS transmits the parameter level for state S0 to the parameter controller PRS0 and the frequency for state S0 to the frequency controller FCS0.

[0094] During the clock signal state S1, the parameter controller PRS1 of the low-frequency RF generator LFGMS provides the driver system of the low-frequency RF generator LFGMS with the parameter level for state S1. Also during the clock signal state S1, the frequency controller FCS1 of the low-frequency RF generator LFGMS provides the driver system of the low-frequency RF generator LFGMS with the frequency for state S1. The driver system of the low-frequency RF generator LFGMS generates a current signal based on the parameter level for state S1 received from the parameter controller PRS1 and the frequency for state S1 received from the frequency controller FCS1, and supplies the current signal to the power supply of the low-frequency RF generator LFGMS. Upon receiving the current signal, the power supply of the low-frequency RF generator LFGMS generates a portion of the RF signal 318 having the parameter level for state S1 and the frequency for state S1 received from the processor of the host computer system by the digital signal processor of the low-frequency RF generator LFGMS.

[0095] Similarly, during the clock signal state S0, the parameter controller PRS0 of the low-frequency RF generator LFGMS provides the driver system of the low-frequency RF generator LFGMS with the parameter level for state S0. Also, during the clock signal state S0, the frequency controller FCS0 of the low-frequency RF generator LFGMS provides the driver system of the low-frequency RF generator LFGMS with the frequency for state S0. The driver system of the low-frequency RF generator LFGMS generates a current signal based on the parameter level for state S0 received from the parameter controller PRS0 and the frequency for state S0 received from the frequency controller FCS0, and provides the current signal to the power supply of the low-frequency RF generator LFGMS. Upon receiving the current signal, the power supply of the low-frequency RF generator LFGMS generates a portion of the RF signal 318 having the parameter level for state S0 and the frequency for state S0 received from the processor of the host computer system by the digital signal processor of the low-frequency RF generator LFGMS. An RF signal 318 having a portion for state S1 and a portion for state S0 is supplied to the input I4 of the RF matcher via the RF cable 112.

[0096] In a similar manner, the processor of the host computer system transmits a clock signal to the digital signal processor of the sub-generator HFGf0MS of the high-frequency RF generator HFGMS via the transfer medium TM4, and also transmits a data signal to the digital signal processor of the sub-generator HFGf0MS via the transfer medium TM2. The data signal transmitted to the sub-generator HFGf0MS of the high-frequency RF generator HFGMS includes parameter levels at fundamental frequencies such as frequency f0 for state S1 of the RF signal 308A generated by the sub-generator HFGf0MS, parameter levels at fundamental frequencies such as frequency f0 for state S0 of the RF signal 308A, fundamental frequency for state S1 of the RF signal 308A, fundamental frequency for state S0 of the RF signal 308A, phase at the fundamental frequency for state S1 of the RF signal 308A, and phase at the fundamental frequency for state S0 of the RF signal 308A.

[0097] It should be noted that in some embodiments, the value of the fundamental frequency of the subgenerator for state S0 is different from the fundamental frequency of the subgenerator for state S1. For example, the fundamental frequency for state S1 is at least b% greater or less than the fundamental frequency for state S0, where b is in the range of 5% to 20%. Similarly, the value of the phase at the fundamental frequency of the subgenerator for state S0 is different from the value of the phase at the fundamental frequency of the subgenerator for state S1, and the parameter level at the fundamental frequency of the subgenerator for state S0 is different from the parameter level at the fundamental frequency of the subgenerator for state S1. For example, the phase at the fundamental frequency of state S1 is at least b% greater or less than the phase at the fundamental frequency of state S0, and the parameter level at the fundamental frequency of state S1 is at least b% greater or less than the parameter level at the fundamental frequency of state S0.

[0098] The digital signal processor of the sub-generator HFGf0MS of the high-frequency RF generator HFGMS receives a clock signal and determines whether the state of the clock signal is S1 or S0. The determination of the clock signal state S1 or S0 by the digital signal processor of the sub-generator HFGf0MS is performed in the same way as the determination of the clock signal state 1 or S0 by the digital signal processor of the low-frequency RF generator LFGMS described above.

[0099] During state S1 of the clock signal, the digital signal processor of the sub-generator HFGf0MS of the high-frequency RF generator HFGMS transmits the parameter level at the fundamental frequency for state S1 to the parameter controller PRf0S1, the fundamental frequency for state S1 to the phase controller φf0S1, and the fundamental frequency for state S1 to the frequency controller FCf0S1. Similarly, during state S0 of the clock signal, the digital signal processor of the sub-generator HFGf0MS of the high-frequency RF generator HFGMS transmits the parameter level at the fundamental frequency for state S0 to the parameter controller PRS0, the fundamental frequency for state S0 to the phase controller φf0S0, and the fundamental frequency for state S0 to the frequency controller FCS0.

[0100] Furthermore, during the clock signal state S1, the parameter controller PRf0S1 of the sub-generator HFGf0MS of the high-frequency RF generator HFGMS provides the driver system of the sub-generator HFGf0MS with the parameter level at the fundamental frequency for state S1. Also, during the clock signal state S1, the frequency controller FCf0S1 of the sub-generator HFGf0MS of the high-frequency RF generator HFGMS provides the driver system of the sub-generator HFGf0MS with the fundamental frequency for state S1. During the clock signal state S1, the phase controller φf0S1 of the sub-generator HFGf0MS of the high-frequency RF generator HFGMS provides the driver system of the sub-generator HFGf0MS with the phase at the fundamental frequency for state S1.

[0101] The driver system of the sub-generator HFGf0MS of the high-frequency RF generator HFGMS generates a current signal based on the parameter level at the fundamental frequency for state S1 received from the parameter controller PRf0S1, the fundamental frequency for state S1 received from the frequency controller FCf0S1, and the phase for state S1 received from the phase controller φf0S1, and supplies the current signal to the power supply of the sub-generator HFGf0MS. Upon receiving the current signal, the power supply of the sub-generator HFGf0MS generates a portion of the RF signal 308A having the parameter level at the fundamental frequency for state S1, the phase at the fundamental frequency for state S1, and the fundamental frequency for state S1.

[0102] Similarly, during the clock signal state S0, the parameter controller PRf0S0 of the sub-generator HFGf0MS of the high-frequency RF generator HFGMS provides the driver system of the sub-generator HFGf0MS with the parameter level at the fundamental frequency for state S0. Also, during the clock signal state S0, the frequency controller FCf0S0 of the sub-generator HFGf0MS of the high-frequency RF generator HFGMS provides the driver system of the sub-generator HFGf0MS with the fundamental frequency for state S0. During the clock signal state S0, the phase controller φf0S1 of the sub-generator HFGf0MS of the high-frequency RF generator HFGMS provides the driver system of the sub-generator HFGf0MS with the phase at the fundamental frequency for state S0.

[0103] The driver system of the sub-generator HFGf0MS of the high-frequency RF generator HFGMS generates a current signal based on the parameter level at the fundamental frequency for state S0 received from the parameter controller PRf0S0, the fundamental frequency for state S0 received from the frequency controller FCf0S0, and the phase for state S0 received from the phase controller φf0S0, and supplies the current signal to the power supply of the sub-generator HFGf0MS. Upon receiving the current signal, the power supply of the sub-generator HFGf0MS generates a portion of the RF signal 308A having the parameter level at the fundamental frequency for state S0, the phase at the phenomenal frequency for state S0, and the fundamental frequency for state S0. The RF signal 308A, having portions for state S1 and for state S0, is supplied to the input I1 of the RF matcher via the RF cable 114A.

[0104] The frequency controller FCf(n-1)S1 of the sub-generator HFGf(n-1)MS obtains the fundamental frequency for state S1 of RF signal 308A from the frequency controller FCf0S1 of the sub-generator HFGf0MS, and generates the (n-1)th harmonic frequency for state S1 of RF signal 308B generated by the sub-generator HFGf(n-1)MS. For example, the frequency controller FCf(n-1)S1 obtains the fundamental frequency for state S1 of RF signal 308A, multiplies the fundamental frequency for state S1 by a multiplier such as (n-1), and generates the (n-1)th harmonic frequency for state S1 of RF signal 308B. The frequency controller FCf(n-1)S1 generates the (n-1)th harmonic frequency for state S1 of RF signal 308B, achieves a predetermined frequency difference between the (n-1)th harmonic frequency and the fundamental frequency for state S1 of RF signal 308A, and fixes the (n-1)th harmonic frequency for state S1 of RF signal 308B at the fundamental frequency for state S1 of RF signal 308A. The frequency controller of the sub-generator HFGf(n-1)MS provides the driver system of the sub-generator HFGf(n-1)MS with the (n-1)th harmonic frequency for state S1 of RF signal 308B.

[0105] It should be noted that a predetermined frequency difference for state S1 of RF signals 308A and 308B corresponds to a predetermined uniformity in the etching rate for etching the substrate S for state S1. For example, the frequency controller FCf(n-1)S1 of the sub-generator HFGf(n-1)MS stores a one-to-one correspondence or relationship between the predetermined frequency difference for state S1 of RF signals 308A and 308B and the predetermined uniformity in the etching rate in the memory device of the frequency controller FCf(n-1)S1. The frequency controller FCf(n-1)S1 of the sub-generator HFGf(n-1)MS accesses the predetermined frequency difference for state S1 of RF signals 308A and 308B from the memory device of the frequency controller FCf(n-1)S1 and achieves the predetermined uniformity in the etching rate for state S1 of RF signals 308A and 308B.

[0106] Similarly, the frequency controller FCf(n-1)S0 of the sub-generator HFGf(n-1)MS obtains the fundamental frequency for state S0 of RF signal 308A from the frequency controller FCf0S0 of the sub-generator HFGf0MS, and generates the (n-1)th harmonic frequency for state S0 of RF signal 308B. As an example, the frequency controller FCf(n-1)S0 obtains the fundamental frequency for state S0 of RF signal 308A, multiplies the fundamental frequency for state S0 by a multiplier such as (n-1), and generates the (n-1)th harmonic frequency for state S0 of RF signal 308B. The frequency controller FCf(n-1)S0 generates the (n-1)th harmonic frequency for state S0 of RF signal 308B, achieves a predetermined frequency difference between the (n-1)th harmonic frequency and the fundamental frequency for state S0 of RF signal 308A, and fixes the (n-1)th harmonic frequency for state S0 of RF signal 308B at the fundamental frequency for state S0 of RF signal 308A. The frequency controller FCf(n-1)S0 of the sub-generator HFGf(n-1)MS provides the (n-1)th harmonic frequency for state S0 of RF signal 308B to the driver system of the sub-generator HFGf(n-1)MS.

[0107] It should be noted that a predetermined frequency difference for state S0 of RF signals 308A and 308B corresponds to a predetermined uniformity in the etching rate for etching the substrate S for state S0. For example, the frequency controller FCf(n-1)S0 of the sub-generator HFGf(n-1)MS stores a one-to-one correspondence or relationship between a predetermined frequency difference for state S0 of RF signals 308A and 308B and a predetermined uniformity in the etching rate in the memory device of the frequency controller FCf(n-1)S0. The frequency controller FCf(n-1)S0 of the sub-generator HFGf(n-1)MS accesses the predetermined frequency difference for state S0 of RF signals 308A and 308B from the memory device of the frequency controller FCf(n-1)S0 and achieves the predetermined uniformity in the etching rate for state S0 of RF signals 308A and 308B.

[0108] Furthermore, the parameter controller PRf(n-1)S1 of the sub-generator HFGf(n-1)MS obtains the parameter level at the fundamental frequency for state S1 of RF signal 308A from the parameter controller PRf0S1 of the sub-generator HFGf0MS, and generates the parameter level for state S1 at the (n-1)th harmonic frequency of RF signal 308B. For example, the parameter controller PRf(n-1)S1 of the sub-generator HFGf(n-1)MS obtains the parameter level at the fundamental frequency for state S1 of RF signal 308A, and adds to or subtracts from the parameter level to generate the parameter level at the (n-1)th harmonic frequency for state S1 of RF signal 308B. The parameter controller PRf(n-1)S1 generates the parameter level at the (n-1)th harmonic frequency for state S1 of RF signal 308B, achieves a predetermined parameter level difference between the parameter level at the (n-1)th harmonic frequency for state S1 of RF signal 308B and the parameter level at the fundamental frequency for state S1 of RF signal 308A, and fixes the parameter level at the (n-1)th harmonic frequency for state S1 of RF signal 308B to the parameter level at the fundamental frequency for state S1 of RF signal 308A. The parameter controller PRf(n-1)S1 of the sub-generator HFGf(n-1)MS provides the parameter level at the (n-1)th harmonic frequency for state S1 of RF signal 308B to the driver system of the sub-generator HFGf(n-1)MS.

[0109] It should be noted that a predetermined parameter level difference for state S1 of RF signals 308A and 308B corresponds to a predetermined uniformity in the etching rate for etching the substrate S for state S1. For example, the parameter controller PRf(n-1)S1 of the sub-generator HFGf(n-1)MS stores a one-to-one correspondence or relationship between a predetermined parameter level difference for state S1 of RF signals 308A and 308B and a predetermined uniformity in the etching rate in the memory device of the parameter controller PRf(n-1)S1. The parameter controller PRf(n-1)S1 of the sub-generator HFGf(n-1)MS accesses the predetermined parameter level difference for state S1 of RF signals 308A and 308B from the memory device of the parameter controller PRf(n-1)S1 and achieves the predetermined uniformity in the etching rate for state S1 of RF signals 308A and 308B.

[0110] Similarly, the parameter controller PRf(n-1)S0 of the sub-generator HFGf(n-1)MS obtains the parameter level at the fundamental frequency for state S0 of RF signal 308A from the parameter controller PRf0S0 of the sub-generator HFGf0MS, and generates the parameter level for state S0 at the (n-1)th harmonic frequency of RF signal 308B. For example, the parameter controller PRf(n-1)S0 generates the parameter level at the (n-1)th harmonic frequency for state S0 of RF signal 308B, achieves a predetermined parameter level difference between the parameter level at the (n-1)th harmonic frequency for state S0 of RF signal 308B and the parameter level at the fundamental frequency for state S0 of RF signal 308A, and fixes the parameter level at the (n-1)th harmonic frequency for state S0 of RF signal 308B to the parameter level at the fundamental frequency for state S0 of RF signal 308A. The parameter controller PRf(n-1)S0 of the sub-generator HFGf(n-1)MS provides the parameter level at the (n-1)th harmonic frequency for state S0 of the RF signal 308B to the driver system of the sub-generator HFGf(n-1)MS.

[0111] It should be noted that a predetermined parameter level difference for state S0 of RF signals 308A and 308B corresponds to a predetermined uniformity in the etching rate for etching the substrate S for state S0. For example, the parameter controller PRf(n-1)S0 of the sub-generator HFGf(n-1)MS stores a one-to-one correspondence or relationship between a predetermined parameter level difference for state S0 of RF signals 308A and 308B and a predetermined uniformity in the etching rate in the memory device of the parameter controller PRf(n-1)S0. The parameter controller PRf(n-1)S0 of the sub-generator HFGf(n-1)MS accesses the predetermined parameter level difference for state S0 of RF signals 308A and 308B from the memory device of the parameter controller PRf(n-1)S0 and achieves the predetermined uniformity in the etching rate for state S0 of RF signals 308A and 308B.

[0112] Furthermore, the phase controller φf(n-1)S1 of the sub-generator HFGf(n-1)MS obtains the phase at the fundamental frequency for state S1 of RF signal 308A from the phase controller φf0S1 of the sub-generator HFGf0MS, and generates the phase at the (n-1)th harmonic frequency for state S1 of RF signal 308B. For example, the phase controller φf(n-1)S1 of the sub-generator HFGf(n-1)MS obtains the phase of RF signal 308A, shifts the phase along time t, and generates the phase at the (n-1)th harmonic frequency for state S1 of RF signal 308B. For example, the phase controller φf(n-1)S1 generates the phase at the (n-1)th harmonic frequency for state S1 of RF signal 308B, achieves a predetermined phase difference between the phase at the (n-1)th harmonic frequency for state S1 of RF signal 308B and the phase at the fundamental frequency for state S1 of RF signal 308A, and fixes the phase at the (n-1)th harmonic frequency for state S1 of RF signal 308B with the phase at the fundamental frequency for state S1 of RF signal 308A. The phase controller φf(n-1)S1 of the sub-generator HFGf(n-1)MS provides the phase at the (n-1)th harmonic frequency for state S1 of RF signal 308B to the driver system of the sub-generator HFGf(n-1)MS.

[0113] It should be noted that a predetermined phase difference for state S1 of RF signals 308A and 308B corresponds to a predetermined uniformity in the etching rate for etching the substrate S for state S1. For example, the phase controller φf(n-1)S1 of the sub-generator HFGf(n-1)MS stores a one-to-one correspondence or relationship between a predetermined phase difference for state S1 of RF signals 308A and 308B and a predetermined uniformity in the etching rate in the memory device of the phase controller φf(n-1)S1. The phase controller φf(n-1)S1 of the sub-generator HFGf(n-1)MS accesses the predetermined phase difference for state S1 of RF signals 308A and 308B from the memory device of the phase controller φf(n-1)S1 and achieves the predetermined uniformity in the etching rate for state S1 of RF signals 308A and 308B.

[0114] Similarly, the phase controller φf(n-1)S0 of the sub-generator HFGf(n-1)MS obtains the phase at the fundamental frequency for state S0 of RF signal 308A from the phase controller φf0S0 of the sub-generator HFGf0MS, and generates the phase at the (n-1)th harmonic frequency for state S0 of RF signal 308B. For example, the phase controller φf(n-1)S0 of the sub-generator HFGf(n-1)MS obtains the phase of RF signal 308A, shifts the phase along time t, and generates the phase at the (n-1)th harmonic frequency for state S0 of RF signal 308B. For example, the phase controller φf(n-1)S0 generates the phase at the (n-1)th harmonic frequency for state S0 of RF signal 308B, achieves a predetermined phase difference between the phase at the (n-1)th harmonic frequency for state S0 of RF signal 308B and the phase at the fundamental frequency for state S0 of RF signal 308A, and fixes the phase at the (n-1)th harmonic frequency for state S0 of RF signal 308B with the phase at the fundamental frequency for state S0 of RF signal 308A. The phase controller φf(n-1)S0 of the sub-generator HFGf(n-1)MS provides the phase at the (n-1)th harmonic frequency for state S0 of RF signal 308B to the driver system of the sub-generator HFGf(n-1)MS.

[0115] It should be noted that a predetermined phase difference for state S0 of RF signals 308A and 308B corresponds to a predetermined uniformity in the etching rate for etching the substrate S for state S0. For example, the phase controller φf(n-1)S0 of the sub-generator HFGf(n-1)MS stores a one-to-one correspondence or relationship between a predetermined phase difference for state S0 of RF signals 308A and 308B and a predetermined uniformity in the etching rate in the memory device of the phase controller φf(n-1)S0. The phase controller φf(n-1)S0 of the sub-generator HFGf(n-1)MS accesses the predetermined phase difference for state S0 of RF signals 308A and 308B from the memory device of the phase controller φf(n-1)S0 and achieves the predetermined uniformity in the etching rate for state S0 of RF signals 308A and 308B.

[0116] The driver system of the sub-generator HFGf(n-1)MS receives the frequency at the (n-1)th harmonic frequency for state S1 of RF signal 308B, the phase at the (n-1)th harmonic frequency for state S1 of RF signal 308B, and the parameter level at the (n-1)th harmonic frequency for state S1 of RF signal 308B, and generates a current signal from these frequencies, phases, and parameters. The power supply of the sub-generator HFGf(n-1)MS receives the current signal from the driver system of the sub-generator HFGf(n-1)MS and generates a portion of RF signal 308B having the frequency at the (n-1)th harmonic frequency for state S1, the phase at the (n-1)th harmonic frequency for state S1, and the parameter level at the (n-1)th harmonic frequency for state S1.

[0117] Similarly, the driver system of the sub-generator HFGf(n-1)MS receives the frequency at the (n-1)th harmonic frequency for state S0 of RF signal 308B, the phase at the (n-1)th harmonic frequency for state S0 of RF signal 308B, and the parameter level at the (n-1)th harmonic frequency for state S0 of RF signal 308B, and generates a current signal from these frequencies, phases, and parameters. The power supply of the sub-generator HFGf(n-1)MS receives the current signal from the driver system of the sub-generator HFGf(n-1)MS and generates a portion of RF signal 308B having the frequency at the (n-1)th harmonic frequency for state S0, the phase at the (n-1)th harmonic frequency for state S0, and the parameter level at the (n-1)th harmonic frequency for state S0. The driver system supplies an RF signal 308B, having a portion for state S1 and a portion for state S0, to the input I2 of the RF matcher via the RF cable 114B.

[0118] Furthermore, the frequency controller FCfnS1 of the sub-generator HFGfnMS obtains the fundamental frequency for state S1 of RF signal 308A from the frequency controller FCf0S1 of the sub-generator HFGf0MS, and generates the nth harmonic frequency for state S1 of RF signal 308C generated by the sub-generator HFGfnMS. For example, the frequency controller FCfnS1 obtains the fundamental frequency for state S1 of RF signal 308A, multiplies the fundamental frequency for state S1 by a multiplier such as n, and generates the nth harmonic frequency for state S1 of RF signal 308C. The frequency controller FCfnS1 generates the nth harmonic frequency for state S1 of RF signal 308C, achieves a predetermined frequency difference between the nth harmonic frequency for state S1 of RF signal 308A and the fundamental frequency, and fixes the nth harmonic frequency for state S1 of RF signal 308C at the fundamental frequency for state S1 of RF signal 308A. The frequency controller of the sub-generator HFGfnMS provides the nth harmonic frequency for state S1 of the RF signal 308C to the driver system of the sub-generator HFGfnMS.

[0119] It should be noted that a predetermined frequency difference for state S1 of RF signals 308A and 308C corresponds to a predetermined uniformity in the etching rate for etching the substrate S for state S1. For example, the frequency controller FCfnS1 of the sub-generator HFGfnMS stores a one-to-one correspondence or relationship between the predetermined frequency difference for state S1 of RF signals 308A and 308C and the predetermined uniformity in the etching rate in the memory device of the frequency controller FCfnS1. The frequency controller FCfnS1 of the sub-generator HFGfnMS accesses the predetermined frequency difference for state S1 of RF signals 308A and 308C from the memory device of the frequency controller FCfnS1 and achieves the predetermined uniformity in the etching rate for state S1 of RF signals 308A and 308C.

[0120] Similarly, the frequency controller FCfnS0 of the sub-generator HFGfnMS obtains the fundamental frequency for state S0 of RF signal 308A from the frequency controller FCf0S0 of the sub-generator HFGf0MS and generates the nth harmonic frequency for state S0 of RF signal 308C. As an example, the frequency controller FCfnS0 obtains the fundamental frequency for state S0 of RF signal 308A, multiplies the fundamental frequency for state S0 by a multiplier such as n, and generates the nth harmonic frequency for state S0 of RF signal 308C. The frequency controller FCfnS0 generates the nth harmonic frequency for state S0 of RF signal 308C, achieves a predetermined frequency difference between the nth harmonic frequency for state S0 of RF signal 308A and the fundamental frequency, and fixes the nth harmonic frequency for state S0 of RF signal 308C at the fundamental frequency for state S0 of RF signal 308A. The frequency controller FCfnS0 of the sub-generator HFGfnMS provides the nth harmonic frequency for state S0 of the RF signal 308C to the driver system of the sub-generator HFGfnMS.

[0121] It should be noted that a predetermined frequency difference for state S0 of RF signals 308A and 308C corresponds to a predetermined uniformity in the etching rate for etching the substrate S for state S0. For example, the frequency controller FCfnS0 of the sub-generator HFGfnMS stores a one-to-one correspondence or relationship between the predetermined frequency difference for state S0 of RF signals 308A and 308C and the predetermined uniformity in the etching rate in the memory device of the frequency controller FCfnS0. The frequency controller FCfnS0 of the sub-generator HFGfnMS accesses the predetermined frequency difference for state S0 of RF signals 308A and 308C from the memory device of the frequency controller FCfnS0 and achieves the predetermined uniformity in the etching rate for state S0 of RF signals 308A and 308C.

[0122] Furthermore, the parameter controller PRfnS1 of the sub-generator HFGfnMS obtains the parameter level at the fundamental frequency for state S1 of RF signal 308A from the parameter controller PRf0S1 of the sub-generator HFGf0MS, and generates the parameter level for state S1 at the nth harmonic frequency of RF signal 308C. For example, the parameter controller PRfnS1 of the sub-generator HFGfnMS obtains the parameter level at the fundamental frequency for state S1 of RF signal 308A, adds to or subtracts from the parameter level, and generates the parameter level at the nth harmonic frequency for state S1 of RF signal 308C. For example, the parameter controller PRfnS1 generates the parameter level at the nth harmonic frequency for state S1 of the RF signal 308C, achieves a predetermined parameter level difference between the parameter level at the nth harmonic frequency for state S1 of the RF signal 308C and the parameter level at the fundamental frequency for state S1 of the RF signal 308A, and fixes the parameter level at the nth harmonic frequency for state S1 of the RF signal 308C to the parameter level at the fundamental frequency for state S1 of the RF signal 308A. The parameter controller PRfnS1 of the sub-generator HFGfnMS provides the parameter level at the nth harmonic frequency for state S1 of the RF signal 308C to the driver system of the sub-generator HFGfnMS.

[0123] It should be noted that a predetermined parameter level difference for state S1 of RF signals 308A and 308C corresponds to a predetermined uniformity in the etching rate for etching the substrate S for state S1. For example, the parameter controller PRfnS1 of the sub-generator HFGfnMS stores a one-to-one correspondence or relationship, such as a relationship between a predetermined parameter level difference for state S1 of RF signals 308A and 308C and a predetermined uniformity in the etching rate, in the memory device of the parameter controller PRfnS1. The parameter controller PRfnS1 of the sub-generator HFGfnMS accesses the predetermined parameter level difference for state S1 of RF signals 308A and 308C from the memory device of the parameter controller PRfnS1 and achieves the predetermined uniformity in the etching rate for state S1 of RF signals 308A and 308C.

[0124] Similarly, the parameter controller PRfnS0 of the sub-generator HFGfnMS obtains the parameter level at the fundamental frequency for state S0 of RF signal 308A from the parameter controller PRf0S0 of the sub-generator HFGf0MS, and generates the parameter level for state S0 at the nth harmonic frequency of RF signal 308B. For example, the parameter controller PRfnS0 of the sub-generator HFGfnMS obtains the parameter level at the fundamental frequency for state S0 of RF signal 308A, and adds to or subtracts from the parameter level to generate the parameter level at the nth harmonic frequency for state S0 of RF signal 308C. For example, the parameter controller PRfnS0 generates the parameter level at the nth harmonic frequency for state S0 of RF signal 308C, achieves a predetermined parameter level difference between the parameter level at the nth harmonic frequency for state S0 of RF signal 308C and the parameter level at the fundamental frequency for state S0 of RF signal 308A, and fixes the parameter level at the nth harmonic frequency for state S0 of RF signal 308C to the parameter level at the fundamental frequency for state S0 of RF signal 308A. The parameter controller PRfnS0 of the sub-generator HFGfnMS provides the parameter level at the nth harmonic frequency for state S0 of RF signal 308C to the driver system of the sub-generator HFGfnMS.

[0125] It should be noted that a predetermined parameter level difference for state S0 of RF signals 308A and 308C corresponds to a predetermined uniformity in the etching rate for etching the substrate S for state S0. For example, the parameter controller PRfnS0 of the sub-generator HFGfnMS stores a one-to-one correspondence or relationship, such as a relationship between a predetermined parameter level difference for state S0 of RF signals 308A and 308C and a predetermined uniformity in the etching rate, in the memory device of the parameter controller PRfnS0. The parameter controller PRfnS0 of the sub-generator HFGfnMS accesses the predetermined parameter level difference for state S0 of RF signals 308A and 308C from the memory device of the parameter controller PRfnS0 and achieves the predetermined uniformity in the etching rate for state S0 of RF signals 308A and 308C.

[0126] Furthermore, the phase controller φfnS1 of the sub-generator HFGfnMS obtains the phase at the fundamental frequency for state S1 of RF signal 308A from the phase controller φf0S1 of the sub-generator HFGf0MS, and generates the phase at the nth harmonic frequency for state S1 of RF signal 308C. For example, the phase controller φfnS1 of the sub-generator HFGfnMS obtains the phase of RF signal 308A, shifts the phase along time t, and generates the phase at the nth harmonic frequency for state S1 of RF signal 308C. For example, the phase controller φfnS1 generates the phase at the nth harmonic frequency for state S1 of the RF signal 308C, achieves a predetermined phase difference between the phase at the nth harmonic frequency for state S1 of the RF signal 308C and the phase at the fundamental frequency for state S1 of the RF signal 308A, and fixes the phase at the nth harmonic frequency for state S1 of the RF signal 308C to the phase at the fundamental frequency for state S1 of the RF signal 308A. The phase controller φfnS1 of the sub-generator HFGfnMS provides the phase at the nth harmonic frequency for state S1 of the RF signal 308C to the driver system of the sub-generator HFGfnMS.

[0127] It should be noted that a predetermined phase difference for state S1 of RF signals 308A and 308C corresponds to a predetermined uniformity in the etching rate for etching the substrate S for state S1. For example, the phase controller φfnS1 of the sub-generator HFGfnMS stores a one-to-one correspondence or relationship between a predetermined phase difference for state S1 of RF signals 308A and 308C and a predetermined uniformity in the etching rate in the memory device of the phase controller φfnS1. The phase controller φfnS1 of the sub-generator HFGfnMS accesses the predetermined phase difference for state S1 of RF signals 308A and 308C from the memory device of the phase controller φfnS1 and achieves the predetermined uniformity in the etching rate for state S1 of RF signals 308A and 308C.

[0128] Similarly, the phase controller φfnS0 of the sub-generator HFGfnMS obtains the phase at the fundamental frequency for state S0 of RF signal 308A from the phase controller φf0S0 of the sub-generator HFGf0MS and generates the phase at the nth harmonic frequency for state S0 of RF signal 308C. For example, the phase controller φfnS0 of the sub-generator HFGfnMS obtains the phase of RF signal 308A, shifts the phase along time t, and generates the phase at the nth harmonic frequency for state S0 of RF signal 308C. For example, the phase controller φfnS0 generates the phase at the nth harmonic frequency for state S0 of the RF signal 308C, achieves a predetermined phase difference between the phase at the nth harmonic frequency for state S0 of the RF signal 308C and the phase at the fundamental frequency for state S0 of the RF signal 308A, and fixes the phase at the nth harmonic frequency for state S0 of the RF signal 308C to the phase at the fundamental frequency for state S0 of the RF signal 308A. The phase controller φfnS0 of the sub-generator HFGfnMS provides the phase at the nth harmonic frequency for state S0 of the RF signal 308C to the driver system of the sub-generator HFGfnMS.

[0129] It should be noted that a predetermined phase difference for state S0 of RF signals 308A and 308C corresponds to a predetermined uniformity in the etching rate for etching the substrate S for state S0. For example, the phase controller φfnS0 of the sub-generator HFGfnMS stores a one-to-one correspondence or relationship between a predetermined phase difference for state S0 of RF signals 308A and 308C and a predetermined uniformity in the etching rate in the memory device of the phase controller φfnS0. The phase controller φfnS0 of the sub-generator HFGfnMS accesses the predetermined phase difference for state S0 of RF signals 308A and 308C from the memory device of the phase controller φfnS0 and achieves the predetermined uniformity in the etching rate for state S0 of RF signals 308A and 308C.

[0130] The driver system of the sub-generator HFGfnMS receives the frequency at the nth harmonic frequency for state S1 of the RF signal 308C, the phase at the nth harmonic frequency for state S1 of the RF signal 308C, and the parameter level at the nth harmonic frequency for state S1 of the RF signal 308C, and generates a current signal from these frequencies, phases, and parameters. The power supply of the sub-generator HFGfnMS receives the current signal from the driver system of the sub-generator HFGfnMS and generates a portion of the RF signal 308C having the frequency at the nth harmonic frequency for state S1, the phase at the nth harmonic frequency for state S1, and the parameter level at the nth harmonic frequency for state S1.

[0131] Similarly, the driver system of the sub-generator HFGfnMS receives the frequency at the nth harmonic frequency for state S0 of the RF signal 308C, the phase at the nth harmonic frequency for state S0 of the RF signal 308C, and the parameter level at the nth harmonic frequency for state S0 of the RF signal 308C, and generates a current signal from these frequencies, phases, and parameters. The power supply of the sub-generator HFGfnMS, upon receiving the current signal from the driver system of the sub-generator HFGfnMS, generates a portion of the RF signal 308C having the frequency at the nth harmonic frequency for state S0, the phase at the nth harmonic frequency for state S0, and the parameter level at the nth harmonic frequency for state S0. The driver system supplies the RF signal 308C, having a portion for state S1 and a portion for state S0, to the input I3 of the RF matcher via the RF cable 114C.

[0132] Note that RF signal 318 is an example of RF signal 118 in Figure 1A, RF signal 308A is an example of RF signal 108A in Figure 1A, RF signal 308B is an example of RF signal 108B in Figure 1A, and RF signal 308C is an example of RF signal 108C in Figure 1A. Each of RF signals 318 and 308-308C is a multiple state signal having states S1 and S0.

[0133] The RF matcher, upon receiving RF signals 318, 308A, 308B, and 308C, matches the impedance of the load coupled to output O1 with the impedance of the sources coupled to inputs I1-I4, modifies the modified RF signals 318, 308A, 308B, and 308C, combines the modified RF signals, for example, by adding them together, to generate a modified RF signal 310 at output O1. Examples of sources coupled to inputs I1-I4 include RF generator LGFMS, RF generator HFGMS, and RF cables 112 and 114A to 114C. The modified RF signal 310 is supplied to the chuck 212 of the plasma chamber via the RF transmission line 116. Once one or more processing gases and the modified RF signal 310 are supplied to the plasma chamber, plasma collides or is generated within the plasma chamber to process the substrate S. By controlling the parameter levels, phase, and / or frequency of RF signal 308A during clock signal state S1, the parameter levels, phase, and / or frequency of RF signal 308A during clock signal state S0, the parameter levels, phase, and / or frequency of RF signal 308B during clock signal state S0, the parameter levels, phase, and / or frequency of RF signal 308C during clock signal state S1, and / or the parameter levels, phase, and / or frequency of RF signal 308A during clock signal state S0, the relationship between the RF harmonics of the plasma sheath in the plasma chamber and the fundamental frequency such as f0 of the plasma sheath in the plasma chamber is controlled, thereby achieving radial etching uniformity across the upper surface of the substrate S.

[0134] In some embodiments, the digital signal processor DSP, parameter controller PRS1, and frequency controller FCS1 of the low-frequency RF generator LFGMS are replaced by controllers. For example, the functions performed by the digital signal processor DSP, parameter controller PRS1, and frequency controller FCS1 of the low-frequency RF generator LFGMS as described herein are instead performed by controllers. Similarly, in various embodiments, the digital signal processor DSP, parameter controller PRS0, and frequency controller FCS0 of the low-frequency RF generator LFGMS are replaced by controllers.

[0135] In various embodiments, the digital signal processor, parameter controller PRf0S1, phase controller φf0S1, and frequency controller FCf0S1 of the sub-generator HFGf0MS are replaced by the controller of the sub-generator HFGf0MS. For example, the functions performed by the digital signal processor, parameter controller PRf0S1, phase controller φf0S1, and frequency controller FCf0S1 of the sub-generator HFGf0MS as described herein are performed by the controller. Similarly, in some embodiments, the digital signal processor, parameter controller PRf0S0, phase controller φf0S0, and frequency controller FCf0S0 of the sub-generator HFGf0MS are replaced by the controller of the sub-generator HFGf0MS. For example, the functions performed by the digital signal processor, parameter controller PRf0S0, phase controller φf0S0, and frequency controller FCf0S0 of the sub-generator HFGf0MS as described herein are performed by the controller.

[0136] Furthermore, in some embodiments, the parameter controller PRf(n-1)S1, the phase controller φf(n-1)S1, and the frequency controller FCf(n-1)S1 of the sub-generator HFGf(n-1)MS are replaced with the controller of the sub-generator HFGf(n-1)MS. For example, the functions performed by the parameter controller PRf(n-1)S1, the phase controller φf(n-1)S1, and the frequency controller FCf(n-1)S1 of the sub-generator HFGf(n-1)MS as described herein are performed by the controller. Similarly, in some embodiments, the parameter controller PRf(n-1)S0, the phase controller φf(n-1)S0, and the frequency controller FCf(n-1)S0 of the sub-generator HFGf(n-1)MS are replaced by the controllers of the sub-generator HFGf(n-1)MS. For example, the functions performed by the parameter controller PRf(n-1)S1, the phase controller φf(n-1)S1, and the frequency controller FCf(n-1)S1 of the sub-generator HFGf(n-1)MS as described herein are performed by the controllers.

[0137] In various embodiments, the parameter controller PRfnS1, phase controller φfnS1, and frequency controller FCfnS1 of the sub-generator HFGfnMS are replaced with the controllers of the sub-generator HFGfnMS. For example, the functions performed by the parameter controller PRfnS1, phase controller φfnS1, and frequency controller FCfnS1 of the sub-generator HFGfnMS as described herein are performed by the controllers. Similarly, in some embodiments, the parameter controller PRfnS0, phase controller φfnS0, and frequency controller FCfnS0 of the sub-generator HFGfnMS are replaced with the controllers of the sub-generator HFGfnMS. For example, the functions performed by the parameter controller PRfnS0, the phase controller φfnS0, and the frequency controller FCfnS0 of the sub-generator HFGfnMS, as described herein, are performed by the controllers.

[0138] In some embodiments, the high-frequency RF generator HFGMS includes any number of sub-generators. For example, the high-frequency RF generator HFGMS excludes sub-generators HFGf(n-1)MS or HFGfnMS. As another example, the high-frequency RF generator HFGMS includes one or more additional sub-generators other than those shown in Figure 3A, such as sub-generator HFGf(n+1)MS and sub-generator HFGf(n+2)MS.

[0139] In various embodiments, RF signals having three or more states, such as three, four, or five states with a fundamental frequency f0, rather than just two states, are generated by a sub-generator HFGf0MS of a high-frequency RF generator HFGMS. For example, sub-generators such as HFGf0MS, HFGf(n-1)MS, or HFGfnMS of the high-frequency RF generator HFGMS are modified to include state S2. For example, the sub-generator HFGf0MS includes a parameter controller PRf0S2, a phase controller φf0S2, and a frequency controller FCf0S2, all of which are coupled to the digital signal processor and driver system of the sub-generator HFGf0MS. As another example, the sub-generator HFGf(n-1)MS includes a parameter controller PRf(n-1)S2, a phase controller φf(n-1)S2, and a frequency controller FCf(n-1)S2, all of which are coupled to the driver system of the sub-generator HFGf(n-1)MS. Furthermore, the parameter controller PRf(n-1)S2 is coupled to the parameter controller PRf0S2, the frequency controller FCf(n-1)S2 is coupled to the frequency controller FCf0S2, and the phase controller φf(n-1)S2 is coupled to the phase controller φf0S2. As yet another example, the sub-generator HFGfnMS includes a parameter controller PRfnS2, a phase controller φfnS2, and a frequency controller FCfnS2, all of which are coupled to the driver system of the sub-generator HFGfnMS. Furthermore, the parameter controller PRfnS2 is coupled to the parameter controller PRf0S2, the frequency controller FCfnS2 is coupled to the frequency controller FCf0S2, and the phase controller φfnS2 is coupled to the phase controller φf0S2.

[0140] In these embodiments, the digital signal processor of the sub-generator HFGf0MS controls the parameter controller PRf0S2, the phase controller φf0S2, and the frequency controller FCf0S2 as described above, and the digital signal processor of the sub-generator HFGf0MS controls the parameter controllers PRf0S1 and PRf0S0, the phase controllers φf0S1 and φf0S0, and the frequency controllers FCf0S1 and FCf0S0. Rather than a clock signal, the digital signal processor of the sub-generator HFf0Ms receives a digital pulse signal having three states, such as three different logic levels, from the processor of the host computer system via the transfer medium TM4, and identifies each of the three states S0, S1, and S2. The processor of the host computer system generates a digital pulse signal having three states.

[0141] Furthermore, in the embodiment, the processor of the host computer system transmits a data signal to the digital signal processor of the sub-generator HFGf0MS via the transfer medium TM2. In addition to the parameter level at the fundamental frequency f0 for states S0 and S1, the fundamental frequency for states S0 and S1, and the phase at the fundamental frequency for states S0 and S1, the data signal transmitted to the sub-generator HFGf0MS of the high-frequency RF generator HFGMS includes the parameter level at the fundamental frequency for state S2 of the RF signal generated by the sub-generator HFGf0MS, the phase at the fundamental frequency for state S2 of the same RF signal, and the fundamental frequency for state S2 of the RF signal.

[0142] In these embodiments where four or more states are used, the digital signal processor of the sub-generator HFGf0MS controls the parameter controllers PRf0S1 and PRf0S0, the phase controllers φf0S1 and φf0S0, and the frequency controllers FCf0S1 and FCf0S0 to generate states S0 and S1 of the RF signal generated by the sub-generator HFGf0MS, in the same manner as described above, except that the time period during which at least one of states S0 and S1 occurs is shorter than the time period during which states S0 and S1 of the RF signal 308A occur. Furthermore, during state S2 of the digital pulse signal, the digital signal processor of the sub-generator HFGf0MS of the high-frequency RF generator HFGMS transmits the parameter level at the fundamental frequency for state S2 to the parameter controller PRf0S2, the fundamental frequency for state S2 to the phase controller φf0S2, and the fundamental frequency for state S2 to the frequency controller FCf0S2.

[0143] Furthermore, in these embodiments, during state S2 of the digital pulse signal, the parameter controller PRf0S2 of the sub-generator HFGf0MS of the high-frequency RF generator HFGMS provides the driver system of the sub-generator HFGf0MS with the parameter level at the fundamental frequency for state S2. Also, during state S2 of the digital pulse signal, the frequency controller FCf0S2 of the sub-generator HFGf0MS of the high-frequency RF generator HFGMS provides the driver system of the sub-generator HFGf0MS with the fundamental frequency for state S2. During state S2 of the clock signal, the phase controller φf0S2 of the sub-generator HFGf0MS of the high-frequency RF generator HFGMS provides the driver system of the sub-generator HFGf0MS with the phase at the fundamental frequency for state S2.

[0144] In these embodiments, the driver system of the sub-generator HFGf0MS of the high-frequency RF generator HFGMS generates a current signal based on the parameter level at the fundamental frequency for state S2 received from the parameter controller PRf0S2, the fundamental frequency for state S2 received from the frequency controller FCf0S2, and the phase for state S2 received from the phase controller φf0S2, and provides the current signal to the power supply of the sub-generator HFGf0MS. Upon receiving the current signal, the power supply of the sub-generator HFGf0MS generates a portion of the RF signal having the parameter level at the fundamental frequency for state S2, the phase at the fundamental frequency for state S2, and the fundamental frequency for state S2.

[0145] Continuing with these embodiments, the RF signal states S1 and S0 generated by the sub-generator HFGf(n-1)MS are generated in the same way as the sub-generator HFGf(n-1)MS generates the RF signal states S1 and S0 of 308B. Furthermore, the frequency controller FCf(n-1)S2 of the sub-generator HFGf(n-1)MS obtains the fundamental frequency for the RF signal state S2 generated by the sub-generator HFGf0MS from the frequency controller FCf0S2 of the sub-generator HFGf0MS, and generates the (n-1)th harmonic frequency for the RF signal state S2 generated by the sub-generator HFGf(n-1)MS. For example, the frequency controller FCf(n-1)S2 obtains the fundamental frequency for state S2 of the RF signal generated by the sub-generator HFGf0MS, multiplies the fundamental frequency for state S2 by a multiplier such as (n-1), and generates the (n-1)th harmonic frequency for state S2 of the RF signal generated by the sub-generator HFGf(n-1)MS. The frequency controller FCf(n-1)S2 generates the (n-1)th harmonic frequency for state S2 of the RF signal generated by the sub-generator HFGf(n-1)MS, achieves a predetermined frequency difference between the (n-1)th harmonic frequency for state S2 and the fundamental frequency for state S2 of the RF signal generated by the sub-generator HFGf0MS, and fixes the (n-1)th harmonic frequency for state S2 of the RF signal generated by the sub-generator HFGf(n-1)MS at the fundamental frequency for state S2 of the RF signal generated by the sub-generator HFGf0MS. The frequency controller of the sub-generator HFGf(n-1)MS provides the driver system of the sub-generator HFGf(n-1)MS with the (n-1)th harmonic frequency for state S2 of the RF signal generated by the sub-generator HFGf(n-1)MS.

[0146] It should be noted that a predetermined frequency difference for state S2 of the RF signal generated by the sub-generators HFGf(n-1)MS and HFGf0MS corresponds to a predetermined uniformity in the etching rate for etching the substrate S for state S2. For example, the frequency controller FCf(n-1)S2 of the sub-generator HFGf(n-1)MS stores a one-to-one correspondence or relationship between a predetermined frequency difference for state S2 of the RF signal generated by the sub-generator HFGf(n-1)MS and a predetermined uniformity in the etching rate in the memory device of the frequency controller FCf(n-1)S2. The frequency controller FCf(n-1)S2 of the sub-generator HFGf(n-1)MS accesses the predetermined frequency difference for state S2 of the RF signal generated by the sub-generator HFGf(n-1)MS from the memory device of the frequency controller FCf(n-1)S2 and achieves the predetermined uniformity in the etching rate for state S2 of the RF signal.

[0147] Furthermore, the parameter controller PRf(n-1)S2 of the sub-generator HFGf(n-1)MS obtains the parameter level at the fundamental frequency for state S2 of the RF signal generated by the sub-generator HFGf0MS from the parameter controller PRf0S2 of the sub-generator HFGf0MS, and generates the parameter level for state S2 at the (n-1)th harmonic frequency of the RF signal generated by the sub-generator HFGf(n-1)MS. For example, the parameter controller PRf(n-1)S2 of the sub-generator HFGf(n-1)MS obtains the parameter level at the fundamental frequency for state S2 of the RF signal generated by the sub-generator HFGf0MS, adds to or subtracts from the parameter level, and generates the parameter level at the (n-1)th harmonic frequency for state S2 of the RF signal generated by the sub-generator HFGf(n-1)MS. The parameter controller PRf(n-1)S2 generates the parameter level at the (n-1)th harmonic frequency for state S2 of the RF signal generated by the sub-generator HFGf(n-1)MS, achieves a predetermined parameter level difference between the parameter level at the (n-1)th harmonic frequency for state S2 of the RF signal generated by the sub-generator HFGf(n-1)MS and the parameter level at the fundamental frequency for state S2 of the RF signal generated by the sub-generator HFGf0MS, and fixes the parameter level at the (n-1)th harmonic frequency for state S2 of the RF signal generated by the sub-generator HFGf(n-1)MS to the parameter level at the fundamental frequency for state S2 of the RF signal generated by the sub-generator HFGf0MS. The parameter controller PRf(n-1)S2 of the sub-generator HFGf(n-1)MS provides the driver system of the sub-generator HFGf(n-1)MS with parameter levels at the (n-1)th harmonic frequency for state S2 of the RF signal generated by the sub-generator HFGf(n-1)MS.

[0148] It should be noted that a predetermined parameter level difference for state S2 of the RF signals generated by the sub-generators HFGf0MS and HFGf(n-1)MS corresponds to a predetermined uniformity in the etching rate for etching the substrate S for state S2. For example, the parameter controller PRf(n-1)S2 of the sub-generator HFGf(n-1)MS stores a one-to-one correspondence or relationship, such as a relationship between a predetermined parameter level difference for state S2 of the RF signals generated by the sub-generators HFGf(n-1)MS and HFGf0MS and a predetermined uniformity in the etching rate, in the memory device of the parameter controller PRf(n-1)S2. The parameter controller PRf(n-1)S2 of the sub-generator HFGf(n-1)MS accesses a predetermined parameter level difference for the state S2 of the RF signals generated by the sub-generators HFGf(n-1)MS and HFGf0MS from the memory device of the parameter controller PRf(n-1)S2, and achieves a predetermined uniformity in the etching rate for the state S2 of the RF signals generated by the sub-generators HFGf(n-1)MS and HFGf0MS.

[0149] Furthermore, the phase controller φf(n-1)S2 of the sub-generator HFGf(n-1)MS obtains the phase at the fundamental frequency for state S2 of the RF signal generated by the sub-generator HFGf0MS from the phase controller φf0S2 of the sub-generator HFGf0MS, and generates the phase at the (n-1)th harmonic frequency for state S2 of the RF signal generated by the sub-generator HFGf(n-1)MS. For example, the phase controller φf(n-1)S2 of the sub-generator HFGf(n-1)MS obtains the phase of the RF signal generated by the sub-generator HFGf0MS, shifts the phase along time t, and generates the phase at the (n-1)th harmonic frequency for state S2 of the RF signal generated by the sub-generator HFGf(n-1)MS. For example, the phase controller φf(n-1)S2 generates the phase at the (n-1)th harmonic frequency for state S2 of the RF signal generated by the sub-generator HFGf(n-1)MS, achieves a predetermined phase difference between the phase at the (n-1)th harmonic frequency for state S2 of the RF signal generated by the sub-generator HFGf(n-1)MS and the phase at the fundamental frequency for state S2 of the RF signal generated by the sub-generator HFGf0MS, and fixes the phase at the (n-1)th harmonic frequency for state S2 of the RF signal generated by the sub-generator HFGf(n-1)MS to the phase at the fundamental frequency for state S2 of the RF signal generated by the sub-generator HFGf0MS. The phase controller φf(n-1)S2 of the co-generator HFGf(n-1)MS provides the driver system of the co-generator HFGf(n-1)MS with the phase at the (n-1)th harmonic frequency for the state S2 of the RF signal generated by the co-generator HFGf(n-1)MS.

[0150] It should be noted that a predetermined phase difference for state S2 of the RF signals generated by the sub-generators HFGf(n-1)MS and HFGf0MS corresponds to a predetermined uniformity in the etching rate for etching the substrate S for state S2. For example, the phase controller φf(n-1)S2 of the sub-generator HFGf(n-1)MS stores a one-to-one correspondence or relationship between a predetermined phase difference for state S2 of the RF signals generated by the sub-generators HFGf(n-1)MS and HFGf0MS and a predetermined uniformity in the etching rate within the memory device of the phase controller φf(n-1)S2. The phase controller φf(n-1)S2 of the sub-generator HFGf(n-1)MS accesses a predetermined phase difference for the state S2 of the RF signals generated by the sub-generators HFGf(n-1)MS and HFGf0MS from the memory device of the phase controller φf(n-1)S2, and achieves a predetermined uniformity in the etching rate for the state S2 of the RF signals generated by the sub-generators HFGf(n-1)MS and HFGf0MS.

[0151] The driver system of the sub-generator HFGf(n-1)MS receives the frequency at the (n-1)th harmonic frequency for state S2 of the RF signal generated by the sub-generator HFGf(n-1)MS, the phase at the (n-1)th harmonic frequency for state S2 of the RF signal generated by the sub-generator HFGf(n-1)MS, and the parameter level at the (n-1)th harmonic frequency for state S2 of the RF signal generated by the sub-generator HFGf(n-1)MS, and generates a current signal from these frequencies, phases, and parameters. The power supply of the sub-generator HFGf(n-1)MS receives the current signal from the driver system of the sub-generator HFGf(n-1)MS and generates a portion of the RF signal having the frequency at the (n-1)th harmonic frequency for state S2, the phase at the (n-1)th harmonic frequency for state S2, and the parameter level at the (n-1)th harmonic frequency for state S2.

[0152] It should be noted that during state S2, the parameter level of the RF signal generated by the sub-generator HFGf(n-1)MS is different from the parameter level of the same RF signal during state S0 and during state S1, for example, greater or less. For example, during state S2, the parameter level of the RF signal generated by the sub-generator HFGf(n-1)MS is c% greater or less than the parameter level of the same RF signal during state S1, and the parameter level of the same RF signal during state S1 is d% greater or less than the parameter level of the same RF signal during state S0, where c is in the range of 5% to 20% including both ends, and d is in the range of 5% to 20%. Similarly, during state S2, the phase generated by the sub-generator HFGf(n-1)MS differs from the phase of the same RF signal during state S1 by c%, for example, greater than or less than c%, and during state S1, the phase of the same RF signal differs from the phase of the same RF signal during state S0 by d%, for example, greater than or less than d%. Also, during state S2, the frequency of the RF signal generated by the sub-generator HFGf(n-1)MS differs from the frequency of the same RF signal during state S1 by c%, for example, greater than or less than c%, and during state S1, the frequency of the same RF signal differs from the frequency of the same RF signal during state S0 by d%, for example, greater than or less than d%.

[0153] In these embodiments, the RF signals S1 and S0 generated by the sub-generator HFGfnMS are generated in the same way as the sub-generator HFGfnMS generates the states S1 and S0 of the RF signal 308C. Furthermore, the frequency controller FCfnS2 of the sub-generator HFGfnMS obtains the fundamental frequency for state S2 of the RF signal generated by the sub-generator HFGf0MS from the frequency controller FCf0S2 of the sub-generator HFGf0MS, and generates the nth harmonic frequency for state S2 of the RF signal generated by the sub-generator HFGfnMS. For example, the frequency controller FCfnS2 obtains the fundamental frequency for state S2 of the RF signal generated by the sub-generator HFGf0MS, multiplies the fundamental frequency for state S2 by a multiplier such as n, and generates the nth harmonic frequency for state S2 of the RF signal generated by the sub-generator HFGfnMS. The frequency controller FCfnS2 generates the nth harmonic frequency for state S2 of the RF signal generated by the sub-generator HFGfnMS, achieves a predetermined frequency difference between the nth harmonic frequency and the fundamental frequency for state S2 of the RF signal generated by the sub-generator HFGf0MS, and fixes the nth harmonic frequency for state S2 of the RF signal generated by the sub-generator HFGfnMS at the fundamental frequency for state S2 of the RF signal generated by the sub-generator HFGf0MS. The frequency controller of the sub-generator HFGfnMS provides the driver system of the sub-generator HFGfnMS with the nth harmonic frequency for state S2 of the RF signal generated by the sub-generator HFGfnMS.

[0154] It should be noted that a predetermined frequency difference for state S2 of the RF signal generated by the sub-generators HFGf0MS and HFGfnMS corresponds to a predetermined uniformity in the etching rate for etching the substrate S for state S2. For example, the frequency controller FCfnS2 of the sub-generator HFGfnMS stores a one-to-one correspondence or relationship between the predetermined frequency difference for state S2 of the RF signal generated by the sub-generator HFGfnMS and the predetermined uniformity in the etching rate in the memory device of the frequency controller FCfnS2. The frequency controller FCfnS2 of the sub-generator HFGfnMS accesses the predetermined frequency difference for state S2 of the RF signal generated by the sub-generator HFGfnMS from the memory device of the frequency controller FCfnS2 and achieves the predetermined uniformity in the etching rate for state S2 of the RF signal generated by the sub-generator HFGfnMS.

[0155] Furthermore, the parameter controller PRfnS2 of the sub-generator HFGfnMS obtains the parameter level at the fundamental frequency of the RF signal for state S2 generated by the sub-generator HFGf0MS from the parameter controller PRf0S2 of the sub-generator HFGf0MS, and generates the parameter level for state S2 at the nth harmonic frequency of the RF signal generated by the sub-generator HFGfnMS. For example, the parameter controller PRfnS2 of the sub-generator HFGfnMS obtains the parameter level at the fundamental frequency of the RF signal for state S2 generated by the sub-generator HFGf0MS, adds to or subtracts from the parameter level, and generates the parameter level at the nth harmonic frequency for state S2 of the RF signal generated by the sub-generator HFGfnMS. The parameter controller PRfnS2 generates the parameter level at the nth harmonic frequency for state S2 of the RF signal generated by the sub-generator HFGfnMS, achieves a predetermined parameter level difference between the parameter level at the nth harmonic frequency for state S2 of the RF signal generated by the sub-generator HFGfnMS and the parameter level at the fundamental frequency for state S2 of the RF signal generated by the sub-generator HFGf0MS, and fixes the parameter level at the nth harmonic frequency for state S2 of the RF signal generated by the sub-generator HFGfnMS to the parameter level at the fundamental frequency for state S2 of the RF signal generated by the sub-generator HFGf0MS. The parameter controller PRfnS2 of the sub-generator HFGfnMS provides the driver system of the sub-generator HFGfnMS with the parameter level at the nth harmonic frequency for state S2 of the RF signal generated by the sub-generator HFGfnMS.

[0156] It should be noted that a predetermined parameter level difference for state S2 of the RF signal generated by the sub-generators HFGf0MS and HFGfnMS corresponds to a predetermined uniformity in the etching rate for etching the substrate S for state S2. For example, the parameter controller PRfnS2 of the sub-generator HFGfnMS stores a one-to-one correspondence or relationship between a predetermined parameter level difference for state S2 of the RF signal generated by the sub-generators HFGfnMS and HFGf0MS and a predetermined uniformity in the etching rate in the memory device of the parameter controller PRfnS2. The parameter controller PRfnS2 of the sub-generator HFGfnMS accesses the predetermined parameter level difference for state 2 of the RF signal generated by the sub-generators HFGfnMS and HFGf0MS from the memory device of the parameter controller PRfnS2 and achieves a predetermined uniformity in the etching rate for state S1 of the RF signal generated by the sub-generators HFGfnMS and HFGf0MS.

[0157] Furthermore, the phase controller φfnS2 of the sub-generator HFGfnMS obtains the phase at the fundamental frequency for state S2 of the RF signal generated by the sub-generator HFGf0MS from the phase controller φf0S2 of the sub-generator HFGf0MS, and generates the phase at the nth harmonic frequency for state S2 of the RF signal generated by the sub-generator HFGfnMS. For example, the phase controller φfnS2 of the sub-generator HFGfnMS obtains the phase of the RF signal generated by the sub-generator HFGf0MS, shifts the phase along time t, and generates the phase at the nth harmonic frequency for state S2 of the RF signal generated by the sub-generator HFGfnMS. For example, the phase controller φfnS2 generates the phase at the nth harmonic frequency for state S2 of the RF signal generated by the sub-generator HFGfnMS, achieves a predetermined phase difference between the phase at the nth harmonic frequency for state S2 of the RF signal generated by the sub-generator HFGfnMS and the phase at the fundamental frequency for state S2 of the RF signal generated by the sub-generator HFGf0MS, and fixes the phase at the nth harmonic frequency for state S2 of the RF signal generated by the sub-generator HFGfnMS to the phase at the fundamental frequency for state S2 of the RF signal generated by the sub-generator HFGf0MS. The phase controller φfnS2 of the sub-generator HFGfnMS provides the driver system of the sub-generator HFGfnMS with the phase at the nth harmonic frequency for state S2 of the RF signal generated by the sub-generator HFGfnMS.

[0158] It should be noted that a predetermined phase difference for state S2 of the RF signals generated by the sub-generators HFGfnMS and HFGf0MS corresponds to a predetermined uniformity in the etching rate for etching the substrate S for state S2. For example, the phase controller φfnS2 of the sub-generator HFGfnMS stores a one-to-one correspondence or relationship between a predetermined phase difference for state S2 of the RF signals generated by the sub-generators HFGfnMS and HFGf0MS and a predetermined uniformity in the etching rate in the memory device of the phase controller φfnS2. The phase controller φfnS2 of the sub-generator HFGfnMS accesses the predetermined phase difference for state S2 of the RF signals generated by the sub-generators HFGfnMS and HFGf0MS from the memory device of the phase controller φfnS2 and achieves the predetermined uniformity in the etching rate for state S2 of the RF signals generated by the sub-generators HFGfnMS and HFGf0MS.

[0159] The driver system of the sub-generator HFGfnMS receives the frequency at the nth harmonic frequency for state S2 of the RF signal generated by the sub-generator HFGfnMS, the phase at the nth harmonic frequency for state S2 of the RF signal generated by the sub-generator HFGfnMS, and the parameter level at the nth harmonic frequency for state S2 of the RF signal generated by the sub-generator HFGfnMS, and generates a current signal from these frequencies, phases, and parameters. The power supply of the sub-generator HFGfnMS receives the current signal from the driver system of the sub-generator HFGfnMS and generates a portion of the RF signal having the frequency at the nth harmonic frequency for state S2, the phase at the nth harmonic frequency for state S2, and the parameter level at the nth harmonic frequency for state S2.

[0160] It should be noted that during state S2, the parameter level of the RF signal generated by the sub-generator HFGfnMS differs from the parameter level of the same RF signal during state S0 and during state S1, for example, being greater or less than that of the same RF signal during state S0. For example, during state S2, the parameter level of the RF signal generated by the sub-generator HFGfnMS is c% greater or less than the parameter level of the same RF signal during state S1, and the parameter level of the same RF signal during state S1 is d% greater or less than the parameter level of the same RF signal during state S0, where c is in the range of 5% to 20% and d is in the range of 5% to 20%. Similarly, during state S2, the phase of the RF signal generated by the sub-generator HFGfnMS differs from the phase of the same RF signal during state S1 by c%, for example, being greater or less than c%, and during state S1, the phase of the same RF signal differs from the phase of the same RF signal during state S0 by d%, for example, being greater or less than d%. Furthermore, during state S2, the frequency of the RF signal generated by the sub-generator HFGfnMS differs from the frequency of the same RF signal during state S1 by c%, for example, greater than or less than c%, and during state S1, the frequency of the same RF signal differs from the frequency of the same RF signal during state S0 by d%, for example, greater than or less than d%.

[0161] It should be further noted that more than three states occur during a clock cycle. For example, the three states S0, S1, and S2 occur within the time period between time t2 and time 0, as described below with reference to Figure 3B. For example, each cycle of a digital pulse signal occurs during the corresponding cycle of clock cycle 350, as described below with reference to Figure 3B.

[0162] In some embodiments, the controllers PRf0S1, φf0S1, FCf0S1, PRf0S0, φf0S0, FCf0S0, PRf(n-1)S1, φf(n-1)S1, FCf(n-1)S1, PRf(n-1)S0, φf(n-1)S0, FCf(n-1)S0, PRfnS1, φfnS1, FCfnS1, PRfnS0, φfnS0, and FCfnS0, as well as the digital signal processor DSP of the sub-generator HFGf0MS, are integrated into a single controller. For example, the functions performed by the controllers PRf0S1, φf0S1, FCf0S1, PRf0S0, φf0S0, FCf0S0, PRf(n-1)S1, φf(n-1)S1, FCf(n-1)S1, PRf(n-1)S0, φf(n-1)S0, FCf(n-1)S0, PRfnS1, φfnS1, FCfnS1, PRfnS0, φfnS0, and FCfnS0, as well as the digital signal processor DSP of the sub-generator HFGf0MS, are instead performed by the processor of a single controller. The single controller is coupled to the driver system of the sub-generator HFGf0MS, the driver system of the sub-generator HFGf(n-1)MS, and the driver system of the sub-generator HFGfnMS. A single controller includes a processor and a memory device, the processor being coupled to the memory device. The functions performed by the controllers PRf0S1, φf0S1, FCf0S1, PRf0S0, φf0S0, FCf0S0, PRf(n-1)S1, φf(n-1)S1, FCf(n-1)S1, PRf(n-1)S0, φf(n-1)S0, FCf(n-1)S0, PRfnS1, φfnS1 and FCfnS1, PRfnS0, φfnS0 and FCfnS0, as well as the digital signal processor DSP of the sub-generator HFGf0MS described herein, are computer modules or computer programs executed by the processor of the single controller.

[0163] In various embodiments, the single controllers that perform the functions performed by the controllers PRf0S1, φf0S1, FCf0S1, PRf0S0, φf0S0, FCf0S0, PRf(n-1)S1, φf(n-1)S1, FCf(n-1)S1, PRf(n-1)S0, φf(n-1)S0, FCf(n-1)S0, PRfnS1, φfnS1, FCfnS1, PRfnS0, φfnS0, and FCfnS0, as well as the single controller that performs the functions performed by the digital signal processor DSP of the sub-generator HFGf0MS, are part of the host computer. For example, the processor of the single controller is the same as the processor of the host computer system, and the memory devices of the single controller are the same as the memory devices of the host computer. In some embodiments, the controllers PRf0S1, φf0S1, FCf0S1, PRf0S0, φf0S0, FCf0S0, PRf(n-1)S1, φf(n-1)S1, FCf(n-1)S1, PRf(n-1)S0, φf(n-1)S0, FCf(n-1)S0, PRfnS1, φfnS1, FCfnS1, PRfnS0, φfnS0, and FCfnS0 of the sub-generator HFGf0MS, as described herein, and a single controller that performs the functions performed by the digital signal processor DSP of the sub-generator HFGf0MS, are located within the RF generator HFGMS and coupled to the processor of the host computer.

[0164] In some embodiments, the functions performed by the parameter controllers PRS1 and PRS0 and frequency controllers FCS1 and FCS0 of the low-frequency RF generator LFGMS, as described herein, are performed by the digital signal processor (DSP) of the low-frequency RF generator LFGMS. In these embodiments, the digital signal processor of the low-frequency RF generator LFGMS is coupled to the driver system of the low-frequency RF generator LFGMS.

[0165] Furthermore, in various embodiments, the functions performed by the controllers PRS1, PRS0, FCS1, and FCS0 of the low-frequency RF generator LFGCW and the digital signal processor DSP of the low-frequency RF generator LFGMS, as described herein, are performed by the processor of the host computer system. In these embodiments, the processor of the host computer system is coupled to the driver system of the low-frequency RF generator LFGMS.

[0166] Figure 3B shows embodiments of multiplexed state signals, namely multiplexed RF signals 352A, 352B, and 352C. The multiplexed RF signals 352A, 352B, and 352C alternate parameter levels in synchronization with states S1 and S0 of the clock signal 350, where the clock signal 350 is an example of the above-mentioned clock signal. RF signal 352A is an example of RF signal 308A in Figure 3A, RF signal 352B is an example of RF signal 308B in Figure 3A, and RF signal 352C is an example of RF signal 8C in Figure 3A.

[0167] RF signal 352A has parameter level PL4 while clock signal 350 is in state S1, RF signal 352B has parameter level PL3 while in state S1, and RF signal 352C has parameter level PL2 while in state S1. Furthermore, RF signal 352A has parameter level PL3 while clock signal 350 is in state S0, RF signal 352B has parameter level PL5 while in state S0, and RF signal 352C has parameter level PL1 while in state S0.

[0168] The RF signal 352A transitions between parameter levels PL4 and PL3 in synchronization with the clock signal 350. For example, the RF signal 352A transitions substantially simultaneously from parameter level PL4 to parameter level PL3, for example, at time t1 when the clock signal 350 transitions from logic level 1 to logic level 0, or within a predetermined time period from time t1. The RF signal 352A transitions substantially simultaneously from parameter level PL3 to parameter level PL4, for example, at time t2 when the clock signal 350 transitions from logic level 0 to logic level 1, or within a predetermined time period from time t2.

[0169] Similarly, the RF signal 352B transitions between parameter levels PL3 and PL5 in synchronization with the clock signal 350. For example, the RF signal 352B transitions from parameter level PL3 to parameter level PL5 substantially simultaneously, at time t1, when the clock signal 350 transitions from logic level 1 to logic level 0. The RF signal 352B transitions from parameter level PL5 to parameter level PL3 substantially simultaneously, at time t2, when the clock signal 350 transitions from logic level 0 to logic level 1.

[0170] Furthermore, the RF signal 352C transitions between parameter levels PL2 and PL1 in synchronization with the clock signal 350. For example, the RF signal 352C transitions from parameter level PL2 to parameter level PL1 substantially simultaneously, at a time t1 that the clock signal 350 transitions from logic level 1 to logic level 0. The RF signal 352C transitions from parameter level PL1 to parameter level PL2 substantially simultaneously, at a time t2 that the clock signal 350 transitions from logic level 0 to logic level 1.

[0171] It should be noted that in some embodiments, the parameter level of RF signal 352A is greater than the parameter level of RF signal 352A during state S0 of clock signal 350 and during state S1 of clock signal 350. Furthermore, it should be noted that in various embodiments, the parameter level of RF signal 352B is smaller than the parameter level of RF signal 352B during state S0 of clock signal 350 and during state S1 of clock signal 350. Also, it should be noted that in some embodiments, the parameter level of RF signal 352C is greater than the parameter level of RF signal 352C during state S0 of clock signal 350 and during state S1 of clock signal 350.

[0172] In various embodiments, the RF signal has a different frequency during state S0 and state S1 than the frequency of the RF signal during state S1. For example, RF signal 352A has a first frequency during state S0 and a second frequency during state S1. RF signal 352A periodically transitions between the appearance of the first frequency and the appearance of the second frequency. The first frequency is different from the second frequency. For example, the first frequency is a predetermined amount greater or less than the second frequency. For example, the first frequency is a% greater or less than the second frequency, where a is in the range of 5% to 20%. Similarly, RF signal 352B has a third frequency during state S0 and a fourth frequency during state S1, where the third frequency is a% greater or less than the fourth frequency. RF signal 352B periodically transitions between the appearance of the third frequency and the appearance of the fourth frequency. Furthermore, the RF signal 352C has a fifth frequency during state S0 and a sixth frequency during state S1, with the fifth frequency being a% greater or less than the sixth frequency. The RF signal 352C periodically transitions between the appearance of the fifth frequency and the appearance of the sixth frequency.

[0173] Figure 4 is a diagram of one embodiment of system 400 showing the control of the parameter levels, phase, and fundamental frequency of RF signal 208A, RF signal 208B, and RF signal 208C. System 400 includes a high-frequency RF generator HFGCW and an RF matcher. The RF matcher further includes a parameter sensing unit PS, such as a power sensing unit or a voltage sensing unit. An example of a parameter sensing unit includes a composite current-voltage sensor or a composite voltage sensor. The composite current-voltage sensor measures the magnitude of the current, the magnitude of the voltage, and the phase between the magnitude of the current and the magnitude of the voltage. The voltage sensor measures a composite voltage, including the magnitude and phase of the voltage. The parameter sensing unit is located within the RF matcher.

[0174] Furthermore, the parameter controller PRf(n-1), phase controller φf(n-1), and frequency controller FCf(n-1) of the sub-generator HFGf(n-1)CW are coupled to the digital signal processor of the sub-generator HFGf0CW. In addition, the parameter controller PRfn, phase controller φfn, and frequency controller FCfn of the sub-generator HFGfnCW are coupled to the digital signal processor of the sub-generator HFGf0CW.

[0175] The parameter sensing unit is coupled to the digital signal processor of the sub-generator HFGf0CW via a cable 402 made of a conductor or similar material. The parameter sensing unit senses the magnetic field B generated by the RF signals 208A, 208B, and 208C in Figure 2 in order to generate an electrical signal. The electrical signal generated by the parameter sensing unit is transmitted to the digital signal processor of the sub-generator HFGf0CW via cable 402. The digital signal processor of the sub-generator HFGf0CW analyzes electrical signals by applying a Fourier transform to the data within the electrical signals and identifies the fundamental frequency of RF signal 208A measured by the parameter sensing unit, the phase at the fundamental frequency of RF signal 208A measured by the parameter sensing unit, the parameter level at the fundamental frequency of RF signal 208A measured by the parameter sensing unit, the (n-1)th harmonic frequency of RF signal 208B measured by the parameter sensing unit, the phase at the (n-1)th harmonic frequency of RF signal 208B measured by the parameter sensing unit, the parameter level at the (n-1)th harmonic frequency of RF signal 208B measured by the parameter sensing unit, the nth harmonic frequency of RF signal 208C measured by the parameter sensing unit, the phase at the nth harmonic frequency of RF signal 208C measured by the parameter sensing unit, and the parameter level at the nth harmonic frequency of RF signal 208C measured by the parameter sensing unit.

[0176] The digital signal processor of the sub-generator HFGf0CW determines whether the (n-1)th harmonic frequency of the measured RF signal 208B is fixed at the fundamental frequency of the measured RF signal 208A. For example, the digital signal processor of the sub-generator HFGf0CW determines whether the measured frequency difference between the (n-1)th harmonic frequency of the measured RF signal 208B and the fundamental frequency of the measured RF signal 208A is substantially the same as, for example, equal to, or within a predetermined range of, a predetermined frequency difference between the (n-1)th harmonic frequency of the RF signal 208B and the fundamental frequency of the RF signal 208A. The measured frequency difference between the (n-1)th harmonic frequency of the measured RF signal 208B and the fundamental frequency of the measured RF signal 208A is calculated by the digital signal processor of the sub-generator HFGf0CW and transmitted to the frequency controllers FCf0 and FCf(n-1).

[0177] If the digital signal processor determines that the measured frequency difference is not substantially the same as a predetermined frequency difference between the (n-1)th harmonic frequency of RF signal 208B and the fundamental frequency of RF signal 208A, it controls frequency controller FCf0, or FCf(n-1), or both frequency controllers FCf0 and FCf(n-1), until the measured frequency difference is substantially the same as the predetermined frequency difference. For example, the digital signal processor transmits a signal to frequency controller FCf0, or frequency controller FCf(n-1), or both frequency controllers FCf0 and FCf(n-1). When frequency controller FCf0 receives a signal from the digital signal processor, it modifies the fundamental frequency f0 and changes the fundamental frequency of RF signal 208A until the measured frequency difference is substantially the same as the predetermined frequency difference. Similarly, when frequency controller FCf(n-1) receives a signal from the digital signal processor, it modifies the (n-1)th harmonic frequency of RF signal 208B until the measured frequency difference is substantially the same as the predetermined frequency difference.

[0178] In a similar manner, the digital signal processor of the sub-generator HFGf0CW determines whether the nth harmonic frequency of the measured RF signal 208C is fixed at the fundamental frequency of the measured RF signal 208A. For example, the digital signal processor of the sub-generator HFGf0CW determines whether the measured frequency difference between the nth harmonic frequency of the measured RF signal 208C and the fundamental frequency of the measured RF signal 208A is substantially the same as, for example, equal to, or within a predetermined range of, a predetermined frequency difference between the nth harmonic frequency of the RF signal 208C and the fundamental frequency of the RF signal 208A. The measured frequency difference between the nth harmonic frequency of the measured RF signal 208C and the fundamental frequency of the measured RF signal 208A is calculated by the digital signal processor of the sub-generator HFGf0CW and transmitted to the frequency controllers FCf0 and FCfn.

[0179] If the digital signal processor determines that the measured frequency difference is not substantially the same as a predetermined frequency difference between the nth harmonic frequency of RF signal 208C and the fundamental frequency of RF signal 208A, it controls frequency controller FCf0, FCfn, or both frequency controllers FCf0 and FCfn until the measured frequency difference is substantially the same as the predetermined frequency difference. For example, the digital signal processor transmits a signal to frequency controller FCf0, frequency controller FCfn, or both frequency controllers FCf0 and FCfn. When frequency controller FCf0 receives a signal from the digital signal processor, it modifies the fundamental frequency f0 and changes the fundamental frequency of RF signal 208A until the measured frequency difference is substantially the same as the predetermined frequency difference. Similarly, when frequency controller FCfn receives a signal from the digital signal processor, it modifies the nth harmonic frequency of RF signal 208C until the measured frequency difference is substantially the same as the predetermined frequency difference.

[0180] Furthermore, the digital signal processor of the sub-generator HFGf0CW determines whether the phase of the measured RF signal 208B at the (n-1)th harmonic frequency is fixed to the phase of the measured RF signal 208A at the fundamental frequency. For example, the digital signal processor of the sub-generator HFGf0CW determines whether the phase difference measured between the phase of the measured RF signal 208B at the (n-1)th harmonic frequency and the phase of the measured RF signal 208A at the fundamental frequency is substantially the same as, for example, equal to, or within a predetermined range of, a predetermined phase difference between the phase of the RF signal 208B at the (n-1)th harmonic frequency and the phase of the RF signal 208A at the fundamental frequency. The phase difference measured between the phase of the measured RF signal 208B at the (n-1)th harmonic frequency and the phase of the measured RF signal 208A at the fundamental frequency is calculated by the digital signal processor of the sub-generator HFGf0CW and transmitted to the phase controllers φf0 and φf(n-1).

[0181] If the digital signal processor determines that the measured phase difference is not substantially the same as a predetermined phase difference between the phase at the (n-1)th harmonic frequency of RF signal 208B and the phase at the fundamental frequency of RF signal 208A, it controls the phase controller φf0, or φf(n-1), or both phase controllers φf0 and φf(n-1), until the measured phase difference is substantially the same as the predetermined phase difference. For example, the digital signal processor transmits a signal to the phase controller φf0, or the phase controller φf(n-1), or both phase controllers φf0 and φf(n-1). When the phase controller φf0 receives a signal from the digital signal processor, it corrects the phase at the fundamental frequency f0 and changes the phase at the fundamental frequency f0 of RF signal 208A until the measured phase difference is substantially the same as the predetermined phase difference. Similarly, when the phase controller φf(n-1) receives a signal from the digital signal processor, it corrects the phase at the (n-1)th harmonic frequency of the RF signal 208B until the measured phase difference is substantially the same as a predetermined phase difference.

[0182] Similarly, the digital signal processor of the sub-generator HFGf0CW determines whether the phase of the measured RF signal 208C at its nth harmonic frequency is fixed to the phase of the measured RF signal 208A at its fundamental frequency. For example, the digital signal processor of the sub-generator HFGf0CW determines whether the phase difference measured between the phase of the measured RF signal 208C at its nth harmonic frequency and the phase of the measured RF signal 208A at its fundamental frequency is substantially the same as, for example, equal to, or within a predetermined range of, a predetermined phase difference between the phase of the RF signal 208C at its nth harmonic frequency and the phase of the RF signal 208A at its fundamental frequency. The phase difference measured between the phase of the measured RF signal 208C at its nth harmonic frequency and the phase of the measured RF signal 208A at its fundamental frequency is calculated by the digital signal processor of the sub-generator HFGf0CW and transmitted to the phase controllers φf0 and φfn.

[0183] If the digital signal processor determines that the measured phase difference is not substantially the same as a predetermined phase difference between the phase of RF signal 208C at its nth harmonic frequency and the phase of RF signal 208A at its fundamental frequency, it controls the phase controller φf0, or φfn, or both phase controllers φf0 and φfn, until the measured phase difference is substantially the same as the predetermined phase difference. For example, the digital signal processor transmits a signal to the phase controller φf0, or the phase controller φfn, or both phase controllers φf0 and φfn. When the phase controller φf0 receives a signal from the digital signal processor, it corrects the phase at the fundamental frequency f0 and changes the phase at the fundamental frequency f0 of RF signal 208A until the measured phase difference is substantially the same as the predetermined phase difference. Similarly, when the phase controller φfn receives a signal from the digital signal processor, it corrects the phase at the nth harmonic frequency of RF signal 208C until the measured phase difference is substantially the same as the predetermined phase difference.

[0184] Furthermore, the digital signal processor of the sub-generator HFGf0CW determines whether the parameter level at the (n-1)th harmonic frequency of the measured RF signal 208B is fixed at the parameter level at the fundamental frequency of the measured RF signal 208A. For example, the digital signal processor of the sub-generator HFGf0CW determines whether the measured parameter level difference between the parameter level at the (n-1)th harmonic frequency of the measured RF signal 208B and the parameter level at the fundamental frequency of the measured RF signal 208A is substantially the same as, for example, equal to, or within a predetermined range of, a predetermined parameter level difference between the parameter level at the (n-1)th harmonic frequency of the RF signal 208B and the parameter level at the fundamental frequency of the RF signal 208A. The parameter level difference measured between the parameter level at the (n-1)th harmonic frequency of the measured RF signal 208B and the parameter level at the fundamental frequency of the measured RF signal 208A is calculated by the digital signal processor of the sub-generator HFGf0CW and transmitted to the parameter level controllers PRf0 and PRf(n-1).

[0185] If the digital signal processor determines that the measured parameter level difference is not substantially the same as a predetermined phase difference between the parameter level at the (n-1)th harmonic frequency of RF signal 208B and the parameter level at the fundamental frequency of RF signal 208A, it controls the parameter level controller PRf0, or PRf(n-1), or both parameter level controllers PRf0 and PRf(n-1), until the measured parameter level difference becomes substantially the same as the predetermined parameter level difference. For example, the digital signal processor transmits a signal to the parameter level controller PRf0, or the parameter level controller PRf(n-1), or both parameter level controllers PRf0 and PRf(n-1). When the parameter level controller PRf0 receives a signal from the digital signal processor, it corrects the parameter level at the fundamental frequency f0 and modifies the parameter level at the fundamental frequency f0 of RF signal 208A until the measured parameter level difference becomes substantially the same as the predetermined phase difference. Similarly, the parameter level controller PRf(n-1), upon receiving a signal from the digital signal processor, modifies the parameter level at the (n-1)th harmonic frequency of the RF signal 208B until the measured parameter level difference is substantially the same as a predetermined parameter level difference.

[0186] Similarly, the digital signal processor of the sub-generator HFGf0CW determines whether the parameter level at the nth harmonic frequency of the measured RF signal 208C is fixed at the parameter level at the fundamental frequency of the measured RF signal 208A. For example, the digital signal processor of the sub-generator HFGf0CW determines whether the measured parameter level difference between the parameter level at the nth harmonic frequency of the measured RF signal 208C and the parameter level at the fundamental frequency of the measured RF signal 208A is substantially the same as, for example, equal to, or within a predetermined range of, a predetermined parameter level difference between the parameter level at the (n-1)th harmonic frequency of the RF signal 208C and the parameter level at the fundamental frequency of the RF signal 208A. The measured parameter level difference between the parameter level at the nth harmonic frequency of the measured RF signal 208C and the parameter level at the fundamental frequency of the measured RF signal 208A is calculated by the digital signal processor of the sub-generator HFGf0CW and transmitted to the parameter level controllers PRf0 and PRfn.

[0187] If the digital signal processor determines that the measured parameter level difference is not substantially the same as a predetermined phase difference between the parameter level at the nth harmonic frequency of RF signal 208C and the parameter level at the fundamental frequency of RF signal 208A, it controls the parameter level controller PRf0, PRfn, or both parameter level controllers PRf0 and PRfn until the measured parameter level difference becomes substantially the same as the predetermined parameter level difference. For example, the digital signal processor transmits a signal to the parameter level controller PRf0, the parameter level controller PRfn, or both parameter level controllers PRf0 and PRfn. When the parameter level controller PRf0 receives a signal from the digital signal processor, it modifies the parameter level at the fundamental frequency f0 and changes the parameter level at the fundamental frequency f0 of RF signal 208A until the measured parameter level difference becomes substantially the same as the predetermined phase difference. Similarly, when the parameter level controller PRfn receives a signal from the digital signal processor, it corrects the parameter level at the nth harmonic frequency of the RF signal 208C until the measured parameter level difference is substantially the same as a predetermined parameter level difference.

[0188] Power supply PSUf0 generates RF signal 408A having a corrected fundamental frequency, or a corrected phase at the fundamental frequency, or a corrected parameter level at the fundamental frequency, or a combination thereof, and supplies RF signal 408A to input I1 of the RF matcher via RF cable 114A. Furthermore, power supply PSUf(n-1) generates RF signal 408B having the (n-1)th corrected harmonic frequency, or a corrected phase at the (n-1)th harmonic frequency, or a corrected parameter level at the (n-1)th harmonic frequency, or a combination thereof, and supplies RF signal 408B to input I2 of the RF matcher via RF cable 114B. In addition, power supply PSUfn generates RF signal 408C having the nth corrected harmonic frequency, or a corrected phase at the nth harmonic frequency, or a corrected parameter level at the nth harmonic frequency, or a combination thereof, and supplies RF signal 408C to input I3 of the RF matcher via RF cable 114C.

[0189] When the RF matcher receives RF signals 408A-408C and RF signal 218 from the low-frequency RF generator LFGCW in Figure 2A, it matches the impedance of the load coupled to output O1 with the impedance of the sources coupled to inputs I1-I4, generates a modified RF signal, combines the modified RF signals, for example, by summing them, to generate a modified RF signal 410. The RF matcher supplies the modified RF signal 410 to the chuck 212 (Figure 2A) in the plasma chamber via the RF transmission line 116. When the modified RF signal is supplied to the plasma chamber, the RF harmonics of the plasma sheath in the plasma chamber are controlled to achieve radial etching uniformity.

[0190] Figure 5 is a diagram of one embodiment of system 500 showing the control of the parameter levels, phase, and fundamental frequency of RF signal 308A, RF signal 308B, and RF signal 308C in Figure 3A. System 500 includes a high-frequency RF generator HFGMS and an RF matcher. The parameter controllers PRf(n-1)S1, phase controller φf(n-1)S1, and frequency controller FCf(n-1)S1 of the sub-generator HFGf(n-1)MS are coupled to the digital signal processor of the sub-generator HFGf0MS. Similarly, the parameter controllers PRfnS1, phase controller φfnS1, and frequency controller FCfnS1 of the sub-generator HFGfnMS are coupled to the digital signal processor of the sub-generator HFGf0MS.

[0191] Similarly, the parameter controller PRf(n-1)S0, phase controller φf(n-1)S0, and frequency controller FCf(n-1)S0 of the sub-generator HFGf(n-1)MS are coupled to the digital signal processor of the sub-generator HFGf0MS. Furthermore, the parameter controller PRfnS0, phase controller φfnS0, and frequency controller FCfnS0 of the sub-generator HFGfnMS are coupled to the digital signal processor of the sub-generator HFGf0MS.

[0192] The parameter sensing unit is coupled to the digital signal processor of the sub-generator HFGf0MS via cable 402. The parameter sensing unit senses the magnetic field B generated by the RF signals 308A, 308B, and 308C in Figure 3A in order to generate an electrical signal. The electrical signal generated by the parameter sensing unit is transmitted to the digital signal processor of the sub-generator HFGf0MS via cable 402. The digital signal processor of the sub-generator HFGf0MS analyzes the electrical signal by applying a Fourier transform to the data within the electrical signal and identifies the fundamental frequency for state S1 of the RF signal 308A measured by the parameter sensing unit, the phase at the fundamental frequency for state S1 of the RF signal 308A measured by the parameter sensing unit, the parameter level at the fundamental frequency for state S1 of the RF signal 308A measured by the parameter sensing unit, the fundamental frequency for state S0 of the RF signal 308A measured by the parameter sensing unit, the phase at the fundamental frequency for state S0 of the RF signal 308A measured by the parameter sensing unit, and the parameter level at the fundamental frequency for state S0 of the RF signal 308A measured by the parameter sensing unit.

[0193] The digital signal processor of the sub-generator HFGf0MS further analyzes the electrical signal by applying a Fourier transform to the data within the electrical signal, identifying the (n-1)th harmonic frequency for state S1 of the RF signal 308B measured by the parameter sensing unit, the phase at the (n-1)th harmonic frequency for state S1 of the RF signal 308B measured by the parameter sensing unit, the parameter level at the (n-1)th harmonic frequency for state S1 of the RF signal 308B measured by the parameter sensing unit, the (n-1)th harmonic frequency for state S0 of the RF signal 308B measured by the parameter sensing unit, and the parameter level at the (n-1)th harmonic frequency for state S0 of the RF signal 308B measured by the parameter sensing unit.

[0194] The digital signal processor of the sub-generator HFGf0MS also analyzes the electrical signal by applying a Fourier transform to the data within the electrical signal, and identifies the nth harmonic frequency for state S1 of the RF signal 308C measured by the parameter sensing unit, the phase at the nth harmonic frequency for state S1 of the RF signal 308C measured by the parameter sensing unit, the parameter level at the nth harmonic frequency for state S1 of the RF signal 308C measured by the parameter sensing unit, the nth harmonic frequency for state S0 of the RF signal 308C measured by the parameter sensing unit, and the parameter level at the nth harmonic frequency for state S0 of the RF signal 308C measured by the parameter sensing unit.

[0195] The digital signal processor of the sub-generator HFGf0MS determines whether the (n-1)th harmonic frequency for state S1 of the measured RF signal 308B is fixed at the fundamental frequency for state S1 of the measured RF signal 308A. For example, the digital signal processor of the sub-generator HFGf0MS determines whether the measured frequency difference between the (n-1)th harmonic frequency for state S1 of the measured RF signal 308B and the fundamental frequency for state S1 of the measured RF signal 308A is substantially the same as, for example, equal to, or within a predetermined range of, a predetermined frequency difference between the (n-1)th harmonic frequency for state S1 of the RF signal 308B and the fundamental frequency for state S1 of the RF signal 308A. The measured frequency difference between the (n-1)th harmonic frequency for state S1 of the measured RF signal 308B and the fundamental frequency for state S1 of the measured RF signal 308A is calculated by the digital signal processor of the sub-generator HFGf0MS and transmitted to the frequency controllers FCf0S1 and FCf(n-1)S1.

[0196] When the digital signal processor determines that the measured frequency difference for state S1 of RF signal 308B is not substantially the same as a predetermined frequency difference between the (n-1)th harmonic frequency for state S1 of RF signal 308B and the fundamental frequency for state S1 of RF signal 308A, it controls the frequency controller FCf0S1, or FCf(n-1)S1, or both frequency controllers FCf0S1 and FCf(n-1)S1, until the measured frequency difference for state S1 of RF signal 308B becomes substantially the same as the predetermined frequency difference for state S1 of RF signal 308B. For example, the digital signal processor transmits the signal to the frequency controller FCf0S1, or the frequency controller FCf(n-1)S1, or both frequency controllers FCf0S1 and FCf(n-1)S1. When frequency controller FCf0S1 receives a signal from the digital signal processor, it modifies the fundamental frequency for state S1 of RF signal 308A until the measured frequency difference for state S1 of RF signal 308B is substantially the same as a predetermined frequency difference for state S1 of RF signal 308B. Similarly, when frequency controller FCf(n-1)S1 receives a signal from the digital signal processor, it modifies the (n-1)th harmonic frequency for state S1 of RF signal 308B until the measured frequency difference for state S1 of RF signal 308B is substantially the same as a predetermined frequency difference for state S1 of RF signal 308B.

[0197] The digital signal processor of the sub-generator HFGf0MS also determines whether the (n-1)th harmonic frequency for state S0 of the measured RF signal 308B is fixed at the fundamental frequency for state S0 of the measured RF signal 308A. For example, the digital signal processor of the sub-generator HFGf0MS determines whether the measured frequency difference between the (n-1)th harmonic frequency for state S0 of the measured RF signal 308B and the fundamental frequency for state S0 of the measured RF signal 308A is substantially the same as, for example, equal to, or within a predetermined range of, a predetermined frequency difference between the (n-1)th harmonic frequency for state S0 of the RF signal 308B and the fundamental frequency for state S0 of the RF signal 308A. The measured frequency difference between the (n-1)th harmonic frequency for state S0 of the measured RF signal 308B and the fundamental frequency for state S0 of the measured RF signal 308A is calculated by the digital signal processor of the sub-generator HFGf0MS and transmitted to the frequency controllers FCf0S0 and FCf(n-1)S0.

[0198] If the digital signal processor determines that the measured frequency difference for state S0 of RF signal 308B is not substantially the same as a predetermined frequency difference between the (n-1)th harmonic frequency for state S0 of RF signal 308B and the fundamental frequency for state S0 of RF signal 308A, it controls the frequency controller FCf0S0, or FCf(n-1)S0, or both frequency controllers FCf0S0 and FCf(n-1)S0, until the measured frequency difference for state S0 of RF signal 308B becomes substantially the same as the predetermined frequency difference for state S0 of RF signal 308B. For example, the digital signal processor transmits the signal to the frequency controller FCf0S0, or the frequency controller FCf(n-1)S0, or both frequency controllers FCf0S0 and FCf(n-1)S0. When the frequency controller FCf0S0 receives a signal from the digital signal processor, it modifies the fundamental frequency f0 for state S0 of RF signal 308A until the measured frequency difference for state S0 of RF signal 308B is substantially the same as a predetermined frequency difference for state S0 of RF signal 308B. Similarly, when the frequency controller FCf(n-1)S0 receives a signal from the digital signal processor, it modifies the (n-1)th harmonic frequency for state S0 of RF signal 308B until the measured frequency difference for state S0 of RF signal 308B is substantially the same as a predetermined frequency difference for state S0 of RF signal 308B.

[0199] In a similar manner, the digital signal processor of the sub-generator HFGf0MS determines whether the nth harmonic frequency for state S1 of the measured RF signal 308C is fixed at the fundamental frequency for state S1 of the measured RF signal 308A. For example, the digital signal processor of the sub-generator HFGf0MS determines whether the measured frequency difference between the nth harmonic frequency for state S1 of the measured RF signal 308C and the fundamental frequency for state S1 of the measured RF signal 308A is substantially the same as, for example, equal to, or within a predetermined range of, a predetermined frequency difference between the nth harmonic frequency for state S1 of the RF signal 308C and the fundamental frequency for state S1 of the RF signal 308A. The measured frequency difference between the nth harmonic frequency for state S1 of the measured RF signal 308C and the fundamental frequency for state S1 of the measured RF signal 308A is calculated by the digital signal processor of the sub-generator HFGf0MS and transmitted to the frequency controllers FCf0S1 and FCfnS1.

[0200] If the digital signal processor determines that the measured frequency difference for state S1 of RF signal 308C is not substantially the same as a predetermined frequency difference between the nth harmonic frequency for state S1 of RF signal 308C and the fundamental frequency for state S1 of RF signal 308A, it controls frequency controller FCf0S1, FCfnS1, or both frequency controllers FCf0S1 and FCfnS1 until the measured frequency difference for state S1 of RF signal 308C is substantially the same as the predetermined frequency difference for state S1 of RF signal 308C. For example, the digital signal processor transmits a signal to frequency controller FCf0S1, FCfnS1, or both frequency controllers FCf0S1 and FCfnS1. When frequency controller FCf0S1 receives a signal from the digital signal processor, it modifies the fundamental frequency for state S1 of RF signal 308A until the measured frequency difference for state S1 of RF signal 308C is substantially the same as the predetermined frequency difference for state S1 of RF signal 308C. Similarly, when the frequency controller FCfnS1 receives a signal from the digital signal processor, it modifies the nth harmonic frequency for state S1 of the RF signal 308C until the measured frequency difference for state S1 of the RF signal 308C is substantially the same as a predetermined frequency difference for state S1 of the RF signal 308C.

[0201] The digital signal processor of the sub-generator HFGf0MS also determines whether the nth harmonic frequency for state S0 of the measured RF signal 308C is fixed at the fundamental frequency for state S0 of the measured RF signal 308A. For example, the digital signal processor of the sub-generator HFGf0MS determines whether the measured frequency difference between the nth harmonic frequency for state S0 of the measured RF signal 308C and the fundamental frequency for state S0 of the measured RF signal 308A is substantially the same as, for example, equal to, or within a predetermined range of, a predetermined frequency difference between the nth harmonic frequency for state S0 of the RF signal 308C and the fundamental frequency for state S0 of the RF signal 308A. The measured frequency difference between the nth harmonic frequency for state S0 of the measured RF signal 308C and the fundamental frequency for state S0 of the measured RF signal 308A is calculated by the digital signal processor of the sub-generator HFGf0MS and transmitted to the frequency controllers FCf0S0 and FCfnS0.

[0202] If the digital signal processor determines that the measured frequency difference for state S0 of RF signal 308C is not substantially the same as a predetermined frequency difference between the nth harmonic frequency for state S0 of RF signal 308C and the fundamental frequency for state S0 of RF signal 308A, it controls the frequency controller FCf0S0, or FCfnS0, or both frequency controllers FCf0S0 and FCfnS0, until the measured frequency difference for state S0 of RF signal 308C is substantially the same as the predetermined frequency difference for state S0 of RF signal 308C. For example, the digital signal processor transmits a signal to the frequency controller FCf0S0, or FCfnS0, or both frequency controllers FCf0S0 and FCfnS0. When the frequency controller FCf0S0 receives a signal from the digital signal processor, it modifies the fundamental frequency f0 for state S0 of RF signal 308A until the measured frequency difference for state S0 of RF signal 308C is substantially the same as the predetermined frequency difference for state S0 of RF signal 308C. Similarly, when the frequency controller FCfnS0 receives a signal from the digital signal processor, it modifies the nth harmonic frequency for state S0 of the RF signal 308C until the measured frequency difference for state S0 of the RF signal 308C is substantially the same as a predetermined frequency difference for state S0 of the RF signal 308C.

[0203] Furthermore, the digital signal processor of the sub-generator HFGf0MS determines whether the phase at the (n-1)th harmonic frequency for state S1 of the measured RF signal 308B is fixed to the phase at the fundamental frequency for state S1 of the measured RF signal 308A. For example, the digital signal processor of the sub-generator HFGf0MS determines whether the measured phase difference between the phase at the (n-1)th harmonic frequency for state S1 of the measured RF signal 308B and the phase at the fundamental frequency for state S1 of the measured RF signal 308A is substantially the same as, for example, equal to, or within a predetermined range of, a predetermined phase difference between the phase at the (n-1)th harmonic frequency for state S1 of the RF signal 308B and the phase at the fundamental frequency for state S1 of the RF signal 308A. The phase difference measured between the phase at the (n-1)th harmonic frequency for state S1 of the measured RF signal 308B and the phase at the fundamental frequency for state S1 of the measured RF signal 308A is calculated by the digital signal processor of the sub-generator HFGf0MS and transmitted to the phase controllers φf0S1 and φf(n-1)S1.

[0204] If the digital signal processor determines that the phase difference for state S1 of the measured RF signal 308B is not substantially the same as a predetermined phase difference between the phase at the (n-1)th harmonic frequency for state S1 of the RF signal 308B and the phase at the fundamental frequency for state S1 of the RF signal 308A, it controls the phase controller φf0S1, or φf(n-1)S1, or both phase controllers φf0S1 and φf(n-1)S1, until the measured phase difference for state S1 of the RF signal 308B becomes substantially the same as the predetermined phase difference for state S1 of the RF signal 308B. For example, the digital signal processor transmits the signal to the phase controller φf0S1, or the phase controller φf(n-1)S1, or both phase controllers φf0S1 and φf(n-1)S1. When the phase controller φf0S1 receives a signal from the digital signal processor, it corrects the phase at the fundamental frequency f0 for state S1 of RF signal 308A until the measured phase difference for state S1 of RF signal 308B is substantially the same as a predetermined phase difference for state S1 of RF signal 308B. Similarly, when the phase controller φf(n-1)S1 receives a signal from the digital signal processor, it corrects the phase at the (n-1)th harmonic frequency for state S1 of RF signal 308B until the measured phase difference for state S1 of RF signal 308B is substantially the same as a predetermined phase difference for state S1 of RF signal 308B.

[0205] In a similar manner, the digital signal processor of the sub-generator HFGf0MS determines whether the phase at the (n-1)th harmonic frequency for state S0 of the measured RF signal 308B is fixed to the phase at the fundamental frequency for state S0 of the measured RF signal 308A. For example, the digital signal processor of the sub-generator HFGf0MS determines whether the measured phase difference between the phase at the (n-1)th harmonic frequency for state S0 of the measured RF signal 308B and the phase at the fundamental frequency for state S0 of the measured RF signal 308A is substantially the same as, for example, equal to, or within a predetermined range of, a predetermined phase difference between the phase at the (n-1)th harmonic frequency for state S0 of the RF signal 308B and the phase at the fundamental frequency for state S0 of the RF signal 308A. The measured phase difference between the phase at the (n-1)th harmonic frequency for state S0 of the measured RF signal 308B and the phase at the fundamental frequency for state S0 of the measured RF signal 308A is calculated by the digital signal processor of the sub-generator HFGf0MS and transmitted to the phase controllers φf0S0 and φf(n-1)S0.

[0206] If the digital signal processor determines that the phase difference for state S0 of the measured RF signal 308B is not substantially the same as a predetermined phase difference between the phase at the (n-1)th harmonic frequency for state S0 of the RF signal 308B and the phase at the fundamental frequency for state S0 of the RF signal 308A, it controls the phase controller φf0S0, or f(n-1)S0, or both phase controllers φf0S0 and φf(n-1)S0 until the phase difference for state S0 of the measured RF signal 308B is substantially the same as a predetermined frequency difference for state S0 of the RF signal 308B. For example, the digital signal processor transmits the signal to the phase controller φf0S0, or the phase controller φf(n-1)S0, or both phase controllers φf0S0 and φf(n-1)S0. When the phase controller φf0S0 receives a signal from the digital signal processor, it corrects the phase at the fundamental frequency f0 for state S0 of RF signal 308A until the measured phase difference for state S0 of RF signal 308B is substantially the same as a predetermined phase difference for state S0 of RF signal 308B. Similarly, when the phase controller φf(n-1)S0 receives a signal from the digital signal processor, it corrects the phase at the (n-1)th harmonic frequency for state S0 of RF signal 308B until the measured phase difference for state S0 of RF signal 308B is substantially the same as a predetermined phase difference for state S0 of RF signal 308B.

[0207] In a similar manner, the digital signal processor of the sub-generator HFGf0MS determines whether the phase at the nth harmonic frequency for state S1 of the measured RF signal 308C is fixed to the phase at the fundamental frequency for state S1 of the measured RF signal 308A. For example, the digital signal processor of the sub-generator HFGf0MS determines whether the measured phase difference between the phase at the nth harmonic frequency for state S1 of the measured RF signal 308C and the phase at the fundamental frequency for state S1 of the measured RF signal 308A is substantially the same as, for example, equal to, or within a predetermined range of, a predetermined phase difference between the phase at the nth harmonic frequency for state S1 of the RF signal 308C and the phase at the fundamental frequency for state S1 of the RF signal 308A. The phase difference measured between the phase at the nth harmonic frequency for state S1 of the measured RF signal 308C and the phase at the fundamental frequency for state S1 of the measured RF signal 308A is calculated by the digital signal processor of the sub-generator HFGf0MS and transmitted to the phase controllers φf0S1 and φfnS1.

[0208] If the digital signal processor determines that the phase difference for state S1 of the measured RF signal 308C is not substantially the same as a predetermined phase difference between the phase at the nth harmonic frequency for state S1 of the RF signal 308C and the phase at the fundamental frequency for state S1 of the RF signal 308A, it controls the phase controller φf0S1, or φfnS1, or both phase controllers φf0S1 and φfnS1, until the phase difference for state S1 of the measured RF signal 308C is substantially the same as a predetermined frequency difference for state S1 of the RF signal 308C. For example, the digital signal processor transmits the signal to the phase controller φf0S1, or the phase controller φfnS1, or both phase controllers φf0S1 and φfnS1. When the phase controller φf0S1 receives a signal from the digital signal processor, it corrects the phase at the fundamental frequency f0 for state S1 of the RF signal 308A until the measured phase difference for state S1 of the RF signal 308C is substantially the same as a predetermined phase difference for state S1 of the RF signal 308C. Similarly, when the phase controller φfnS1 receives a signal from the digital signal processor, it corrects the phase at the nth harmonic frequency for state S1 of the RF signal 308C until the measured phase difference for state S1 of the RF signal 308C is substantially the same as a predetermined phase difference for state S1 of the RF signal 308C.

[0209] Furthermore, the digital signal processor of the sub-generator HFGf0MS determines whether the phase at the nth harmonic frequency for state S0 of the measured RF signal 308C is fixed to the phase at the fundamental frequency for state S0 of the measured RF signal 308A. For example, the digital signal processor of the sub-generator HFGf0MS determines whether the measured phase difference between the phase at the nth harmonic frequency for state S0 of the measured RF signal 308C and the phase at the fundamental frequency for state S0 of the measured RF signal 308A is substantially the same as, for example, equal to, or within a predetermined range of, a predetermined phase difference between the phase at the nth harmonic frequency for state S0 of the RF signal 308C and the phase at the fundamental frequency for state S0 of the RF signal 308A. The phase difference measured between the phase at the nth harmonic frequency for state S0 of the measured RF signal 308C and the phase at the fundamental frequency for state S0 of the measured RF signal 308A is calculated by the digital signal processor of the sub-generator HFGf0MS and transmitted to the phase controllers φf0S0 and φfnS0.

[0210] If the digital signal processor determines that the phase difference for state S0 of the measured RF signal 308C is not substantially the same as a predetermined phase difference between the phase at the nth harmonic frequency for state S0 of the RF signal 308C and the phase at the fundamental frequency for state S0 of the RF signal 308A, it controls the phase controller φf0S0, or φfnS0, or both phase controllers φf0S0 and φfnS0, until the phase difference for state S1 of the measured RF signal 308C is substantially the same as a predetermined frequency difference for state S0 of the RF signal 308C. For example, the digital signal processor transmits the signal to the phase controller φf0S0, or the phase controller φfnS0, or both phase controllers φf0S0 and φfnS0. When the phase controller φf0S0 receives a signal from the digital signal processor, it corrects the phase at the fundamental frequency f0 for RF signal 308A in state S0 until the measured phase difference for RF signal 308C in state S0 is substantially the same as a predetermined phase difference for RF signal 308C in state S0. Similarly, when the phase controller φfnS0 receives a signal from the digital signal processor, it corrects the phase at the nth harmonic frequency for RF signal 308C in state S0 until the measured phase difference for RF signal 308C in state S0 is substantially the same as a predetermined phase difference for RF signal 308C in state S0.

[0211] Furthermore, the digital signal processor of the sub-generator HFGf0MS determines whether the parameter level at the (n-1)th harmonic frequency for state S1 of the measured RF signal 308B is fixed at the parameter level at the fundamental frequency for state S1 of the measured RF signal 308A. For example, the digital signal processor of the sub-generator HFGf0MS determines whether the measured parameter level difference between the parameter level at the (n-1)th harmonic frequency for state S1 of the measured RF signal 308B and the parameter level at the fundamental frequency for state S1 of the measured RF signal 308A is substantially the same as, for example, equal to, or within a predetermined range of, a predetermined parameter level difference between the parameter level at the (n-1)th harmonic frequency for state S1 of the RF signal 308B and the parameter level at the fundamental frequency for state S1 of the RF signal 308A. The measured parameter level difference between the parameter level at the (n-1)th harmonic frequency for state S1 of the measured RF signal 308B and the parameter level at the fundamental frequency for state S1 of the measured RF signal 308A is calculated by the digital signal processor of the sub-generator HFGf0MS and transmitted to the parameter level controllers PRf0S1 and PRf(n-1)S1.

[0212] If the digital signal processor determines that the measured parameter level difference for state S1 of RF signal 308B is not substantially the same as a predetermined parameter level difference between the parameter level at the (n-1)th harmonic frequency for state S1 of RF signal 308B and the parameter level at the fundamental frequency for state S1 of RF signal 308A, it controls the parameter level controller PRf0S1, or PRf(n-1)S1, or both parameter level controllers PRf0S1 and PRf(n-1)S1, until the measured parameter level difference for state S1 of RF signal 308B becomes substantially the same as the predetermined parameter level difference for state S1 of RF signal 308B. For example, the digital signal processor transmits the signal to the parameter level controller PRf0S1, or the parameter level controller PRf(n-1)S1, or both parameter level controllers PRf0S1 and PRf(n-1)S1. When the parameter level controller PRf0S1 receives a signal from the digital signal processor, it modifies the parameter level at the fundamental frequency for RF signal 308A in state S1 until the measured parameter level difference for RF signal 308B in state S1 is substantially the same as a predetermined parameter level difference for RF signal 308B in state S1. Similarly, when the parameter level controller PRf(n-1)S1 receives a signal from the digital signal processor, it modifies the parameter level at the (n-1)th harmonic frequency for RF signal 308B in state S1 until the measured parameter level difference for RF signal 308B in state S1 is substantially the same as a predetermined parameter level difference for RF signal 308B in state S1.

[0213] Furthermore, the digital signal processor of the sub-generator HFGf0MS determines whether the parameter level at the (n-1)th harmonic frequency for state S0 of the measured RF signal 308B is fixed at the parameter level at the fundamental frequency for state S0 of the measured RF signal 308A. For example, the digital signal processor of the sub-generator HFGf0MS determines whether the measured parameter level difference between the parameter level at the (n-1)th harmonic frequency for state S0 of the measured RF signal 308B and the parameter level at the fundamental frequency for state S0 of the measured RF signal 308A is substantially the same as, for example, equal to, or within a predetermined range of, a predetermined parameter level difference between the parameter level at the (n-1)th harmonic frequency for state S0 of the RF signal 308B and the parameter level at the fundamental frequency for state S0 of the RF signal 308A. The measured parameter level difference between the parameter level at the (n-1)th harmonic frequency for state S0 of the measured RF signal 308B and the parameter level at the fundamental frequency for state S0 of the measured RF signal 308A is calculated by the digital signal processor of the sub-generator HFGf0MS and transmitted to the parameter level controllers PRf0S0 and PRf(n-1)S0.

[0214] If the digital signal processor determines that the measured parameter level difference for state S0 of RF signal 308B is not substantially the same as a predetermined parameter level difference between the parameter level at the (n-1)th harmonic frequency for state S0 of RF signal 308B and the parameter level at the fundamental frequency for state S0 of RF signal 308A, it controls the parameter level controller PRf0S0, or PRf(n-1)S0, or both parameter level controllers PRf0S0 and PRf(n-1)S0, until the measured parameter level difference for state S0 of RF signal 308B becomes substantially the same as the predetermined parameter level difference for state S0 of RF signal 308B. For example, the digital signal processor transmits the signal to the parameter level controller PRf0S0, or the parameter level controller PRf(n-1)S0, or both parameter level controllers PRf0S0 and PRf(n-1)S0. When the parameter level controller PRf0S0 receives a signal from the digital signal processor, it modifies the parameter level at the fundamental frequency f0 for RF signal 308A in state S0 until the measured parameter level difference for RF signal 308B in state S0 is substantially the same as a predetermined parameter level difference for RF signal 308B in state S0. Similarly, when the parameter level controller PRf(n-1)S0 receives a signal from the digital signal processor, it modifies the parameter level at the (n-1)th harmonic frequency for RF signal 308B in state S0 until the measured parameter level difference for RF signal 308B in state S0 is substantially the same as a predetermined parameter level difference for RF signal 308B in state S0.

[0215] Similarly, the digital signal processor of the sub-generator HFGf0MS determines whether the parameter level at the nth harmonic frequency for state S1 of the measured RF signal 308C is fixed at the parameter level at the fundamental frequency for state S1 of the measured RF signal 308A. For example, the digital signal processor of the sub-generator HFGf0MS determines whether the measured parameter level difference between the parameter level at the nth harmonic frequency for state S1 of the measured RF signal 308C and the parameter level at the fundamental frequency for state S1 of the measured RF signal 308A is substantially the same as, for example, equal to, or within a predetermined range of, a predetermined parameter level difference between the parameter level at the nth harmonic frequency for state S1 of the RF signal 308C and the parameter level at the fundamental frequency for state S1 of the RF signal 308A. The measured parameter level difference between the parameter level at the nth harmonic frequency for state S1 of the measured RF signal 308C and the parameter level at the fundamental frequency for state S1 of the measured RF signal 308A is calculated by the digital signal processor of the sub-generator HFGf0MS and transmitted to the parameter level controller PRf0S1 or PRfnS1.

[0216] If the digital signal processor determines that the measured parameter level difference for state S1 of RF signal 308C is not substantially the same as a predetermined parameter level difference between the parameter level at the nth harmonic frequency for state S1 of RF signal 308C and the parameter level at the fundamental frequency for state S1 of RF signal 308A, it controls the parameter level controller PRf0S1, or PRfnS1, or both parameter level controllers PRf0S1 and PRfnS1, until the measured parameter level difference for state S1 of RF signal 308C becomes substantially the same as the predetermined parameter level difference for state S1 of RF signal 308C. For example, the digital signal processor transmits the signal to the parameter level controller PRf0S1, or the parameter level controller PRfnS1, or both parameter level controllers PRf0S1 and PRfnS1. When the parameter level controller PRf0S1 receives a signal from the digital signal processor, it modifies the parameter level at the fundamental frequency f0 for RF signal 308A in state S1 until the measured parameter level difference for RF signal 308C in state S1 is substantially the same as a predetermined parameter level difference for RF signal 308C in state S1. Similarly, when the parameter level controller PRfnS1 receives a signal from the digital signal processor, it modifies the parameter level at the nth harmonic frequency f0 for RF signal 308C in state S1 until the measured parameter level difference for RF signal 308C in state S1 is substantially the same as a predetermined parameter level difference for RF signal 308C in state S1.

[0217] Furthermore, the digital signal processor of the sub-generator HFGf0MS determines whether the parameter level at the nth harmonic frequency for state S0 of the measured RF signal 308C is fixed at the parameter level at the fundamental frequency for state S0 of the measured RF signal 308A. For example, the digital signal processor of the sub-generator HFGf0MS determines whether the measured parameter level difference between the parameter level at the nth harmonic frequency for state S0 of the measured RF signal 308C and the parameter level at the fundamental frequency for state S0 of the measured RF signal 308A is substantially the same as, for example, equal to, or within a predetermined range of, a predetermined parameter level difference between the parameter level at the nth harmonic frequency for state S0 of the RF signal 308C and the parameter level at the fundamental frequency for state S0 of the RF signal 308A. The measured parameter level difference between the parameter level at the nth harmonic frequency for state S0 of the measured RF signal 308C and the parameter level at the fundamental frequency for state S0 of the measured RF signal 308A is calculated by the digital signal processor of the sub-generator HFGf0MS and transmitted to the parameter level controller PRf0S0 or PRfnS0.

[0218] If the digital signal processor determines that the measured parameter level difference for state S0 of RF signal 308C is not substantially the same as a predetermined parameter level difference between the parameter level at the nth harmonic frequency for state S0 of RF signal 308C and the parameter level at the fundamental frequency for state S0 of RF signal 308A, it controls the parameter level controller PRf0S0, or PRfnS0, or both parameter level controllers PRf0S0 and PRfnS0, until the measured parameter level difference for state S0 of RF signal 308C becomes substantially the same as the predetermined parameter level difference for state S0 of RF signal 308C. For example, the digital signal processor transmits the signal to the parameter level controller PRf0S0, or the parameter level controller PRfnS0, or both parameter level controllers PRf0S0 and PRfnS0. When the parameter level controller PRf0S0 receives a signal from the digital signal processor, it modifies the parameter level at the fundamental frequency f0 for RF signal 308A in state S0 until the measured parameter level difference for RF signal 308C in state S0 is substantially the same as a predetermined parameter level difference for RF signal 308C in state S0. Similarly, when the parameter level controller PRfnS0 receives a signal from the digital signal processor, it modifies the parameter level at the nth harmonic frequency for RF signal 308C in state S0 until the measured parameter level difference for RF signal 308C in state S0 is substantially the same as a predetermined parameter level difference for RF signal 308C in state S0.

[0219] The power supply PSUf0 generates an RF signal 508A having a modified fundamental frequency for state S1 of the clock signal, a modified fundamental frequency for state S0 of the clock signal, or a modified phase at the fundamental frequency for state S1, or a modified phase at the fundamental frequency for state S0, or a modified parameter level at the fundamental frequency for state S1, or a modified parameter level at the fundamental frequency for state S0, or a combination thereof, and supplies the RF signal 508A to the input I1 of the RF matcher via the RF cable 114A. Furthermore, the power supply PSUf(n-1) generates the (n-1)th corrected harmonic frequency for state S1 of the clock signal, the RF signal 508B having the (n-1)th corrected harmonic frequency for state S0 of the clock signal, or the corrected phase at the (n-1)th harmonic frequency for state S1, and the corrected phase at the (n-1)th harmonic frequency for state S0, or the corrected parameter level at the (n-1)th harmonic frequency for state S1, and the corrected parameter level at the (n-1)th harmonic frequency for state S0, or a combination thereof, and supplies the RF signal 508B to the input I2 of the RF matcher via the RF cable 114B. Furthermore, the power supply PSUfn generates an RF signal 508C having the nth corrected harmonic frequency for state S1 of the clock signal and the nth corrected harmonic frequency for state S0 of the clock signal, or the corrected phase at the nth harmonic frequency for state S1 and the corrected phase at the nth harmonic frequency for state S0, or the corrected parameter level at the nth harmonic frequency for state S1 and the corrected parameter level at the nth harmonic frequency for state S0, or a combination thereof, and supplies the RF signal 508C to the input I3 of the RF matcher via the RF cable 114C.

[0220] When the RF matcher receives RF signals 508A-508C and RF signal 318 from the low-frequency RF generator LFGMS in Figure 3A, it matches the impedance of the load coupled to output O1 with the impedance of the source coupled to inputs I1-I4 to generate a modified RF signal. The modified RF signals are then combined, for example, summed, to generate a modified RF signal 510. The RF matcher supplies the modified RF signal 510 to the chuck 212 (Figure 3A) of the plasma chamber via the RF transmission line 116. When the modified RF signal 510 is applied to the plasma chamber, the RF harmonics of the plasma sheath within the plasma chamber are controlled, achieving radial etching uniformity.

[0221] Note that each of the RF signals 308A to 308C has the same state for the same time period. For example, each of the RF signals 308A, 308B, and 308C has state S1 for the time period between time t1 and 0 in Figure 3B, and the clock signal 350 in Figure 3B also has state S1. Also, each of the RF signals 308A, 308B, and 308C has state S0 for the time period between time t1 and t2 in Figure 3B, and the clock signal 350 also has state S0. Similarly, the modified RF signals 508A to 508C have the same state for the same time period.

[0222] In some embodiments, each parameter level of the RF signal described herein is the envelope of the RF signal. For example, the parameter levels of the RF signal described herein include the magnitude from zero to the peak of the RF signal or the magnitude from peak to peak of the RF signal.

[0223] Figure 6 is a diagram of one embodiment of system 600 showing the control of one or more variable components in an RF matcher, one or more of which fix the (n-1)th harmonic frequency of RF signal 208B in Figure 2A and the nth harmonic frequency of RF signal 208C in Figure 2A to the fundamental frequency of RF signal 208A in Figure 2A, fix the phase at the (n-1)th harmonic frequency of RF signal 208B and the phase at the nth harmonic frequency of RF signal 208C to the phase at the fundamental frequency of RF signal 208A, and fix the parameter level at the (n-1)th harmonic frequency of RF signal 208B and the parameter level at the nth harmonic frequency of RF signal 208C to the parameter level at the fundamental frequency of RF signal 208A. System 600 includes a high-frequency RF generator HFGCW and an RF matcher. The RF matcher includes a variable component circuit VCf0, which includes one or more variable components coupled to each other in series, parallel, or as a shunt. Examples of variable components used herein include inductors and condensers. The variable component circuit VFf0 is coupled to input I1 and a motor system MCf0, and the motor system MCf0 is further coupled to a driver system DRVRf0. An example of a motor system used herein includes one or more electric motors, such as direct current (DC) motors or alternating current (AC) motors, which convert electrical energy into mechanical energy. The driver system DRVRf0 is coupled to a parameter controller PRf0, a phase controller φf0, and a frequency controller FCf0.

[0224] The RF matcher further includes another variable component circuit VF(n-1) containing one or more variable components coupled to each other as in the example shown above. The variable component circuit VFf(n-1) is coupled to the input I2 and the motor system MCf(n-1), and the motor system MCf(n-1) is further coupled to the driver system DRVRf(n-1). The driver system DRVRf(n-1) is coupled to the parameter controller PRf(n-1), the phase controller φf(n-1), and the frequency controller FCf(n-1).

[0225] The RF matcher includes another variable component circuit VCfn, which contains one or more variable components coupled together as in the example shown above. The variable component circuit VCfn is coupled to input I3 and motor system MCfn, and the motor system MCfn is further coupled to driver system DRVRfn. The driver system DRVRfn is coupled to parameter controller PRfn, phase controller φfn and frequency controller FCfn.

[0226] The RF matcher includes another variable component circuit Vcf, which contains one or more variable components coupled together as shown in the example above. The variable component circuit Vcf is coupled to input I4.

[0227] The digital signal processor of the sub-generator HFGf0CW determines whether the (n-1)th harmonic frequency of the measured RF signal 208B in Figure 2A is fixed at the fundamental frequency of the measured RF signal 208A in Figure 2A. If the digital signal processor of the sub-generator HFGf0CW determines that the measured frequency difference is not substantially the same as a predetermined frequency difference between the (n-1)th harmonic frequency of RF signal 208B and the fundamental frequency of RF signal 208A, it transmits the signal to the frequency controller FCf0, or the frequency controller fCf(n-1), or to both frequency controllers FCf0 and FCf(n-1). Upon receiving the signal, the frequency controller FCf0 controls the variable component circuit VCf0 via the driver system DRVRf0 and the motor system Mf0 until the measured frequency difference is substantially the same as a predetermined frequency difference. For example, the frequency controller FCf0 transmits the signal to the driver system DRVRf0 to generate a current signal. When the motor system Mf0 receives a current signal from the driver system DRVRf0, it controls the variable component circuit VCf0 until the measured frequency difference is substantially equal to a predetermined frequency difference. For example, the motor system Mf0 changes the distance between plates or the area between plates of a capacitor, which is the variable component circuit VCf0, thereby changing the capacitance of the capacitor. As another example, the motor system Mf0 changes the length or cross-sectional area of ​​an inductor, which is the variable component circuit VCf0, thereby changing the induction coefficient of the inductor. Similarly, when the frequency controller FCf(n-1) receives a signal, it controls the variable component circuit VCf(n-1) via the driver system DRVRf(n-1) and the motor system Mf(n-1) until the measured frequency difference is substantially equal to a predetermined frequency difference.

[0228] Furthermore, the digital signal processor of the sub-generator HFGf0CW determines whether the nth harmonic frequency of the measured RF signal 208C in Figure 2A is fixed at the fundamental frequency of the measured RF signal 208A in Figure 2A. If the digital signal processor of the sub-generator HFGf0CW determines that the measured frequency difference is not substantially the same as a predetermined frequency difference between the nth harmonic frequency of RF signal 208C and the fundamental frequency of RF signal 208A, it transmits the signal to the frequency controller FCf0, or the frequency controller fCfn, or both frequency controllers FCf0 and FCfn. Upon receiving the signal, the frequency controller FCf0 controls the variable component circuit VCf0 via the driver system DRVRf0 and the motor system Mf0 until the measured frequency difference is substantially the same as a predetermined frequency difference. Similarly, upon receiving the signal, the frequency controller FCfn controls the variable component circuit VCfn via the driver system DRVRfn and the motor system Mfn until the measured frequency difference is substantially the same as a predetermined frequency difference.

[0229] Furthermore, the digital signal processor of the sub-generator HFGf0CW determines whether the phase at the (n-1)th harmonic frequency of the measured RF signal 208B is fixed to the phase at the fundamental frequency of the measured RF signal 208A. If the digital signal processor of the sub-generator HFGf0CW determines that the measured phase difference is not substantially the same as a predetermined phase difference between the phase at the (n-1)th harmonic frequency of RF signal 208B and the phase at the fundamental frequency of RF signal 208A, it transmits the signal to the phase controller φf0, or φf(n-1), or to both phase controllers φf0 and φf(n-1). Upon receiving the signal, the phase controller φf0 controls the variable component circuit VCf0 via the driver system DRVRf0 and the motor system Mf0 until the measured phase difference is substantially the same as a predetermined phase difference. Furthermore, upon receiving a signal, the phase controller φf(n-1) controls the variable component circuit VCF(n-1) via the driver system DRVRf(n-1) and the motor system Mf(n-1) until the measured phase difference is substantially the same as a predetermined phase difference, in the same way that the frequency controller FCf(n-1) controls the variable component circuit VCF(n-1).

[0230] Furthermore, the digital signal processor of the sub-generator HFGf0CW determines whether the phase of the measured RF signal 208C at its nth harmonic frequency is fixed to the phase of the measured RF signal 208A at its fundamental frequency. If the digital signal processor determines that the measured phase difference is not substantially the same as a predetermined phase difference between the phase of the RF signal 208C at its nth harmonic frequency and the phase of the RF signal 208A at its fundamental frequency, it transmits the signal to the phase controller φf0, or φfn, or to both phase controllers φf0 and φfn. Upon receiving the signal, the phase controller φf0 controls the variable component circuit VCf0 via the driver system DRVRf0 and the motor system Mf0 until the measured phase difference is substantially the same as the predetermined phase difference. Similarly, upon receiving the signal, the phase controller φfn controls the variable component circuit VCfn via the driver system DRVRfn and the motor system Mfn until the measured phase difference is substantially the same as the frequency controller FCfn controls the variable component circuit VCfn.

[0231] Furthermore, the digital signal processor of the sub-generator HFGf0CW determines whether the parameter level at the (n-1)th harmonic frequency of the measured RF signal 208B is fixed at the parameter level at the fundamental frequency of the measured RF signal 208A. If the digital signal processor determines that the measured parameter level difference is not substantially the same as a predetermined phase difference between the parameter level at the (n-1)th harmonic frequency of RF signal 208B and the parameter level at the fundamental frequency of RF signal 208A, it transmits the signal to the parameter level controller PRf0, or PRf(n-1), or to both parameter level controllers PRf0 and PRf(n-1). Upon receiving the signal, the parameter level controller PRf0 controls the variable component circuit VCf0 via the driver system DRVRf0 and the motor system Mf0, in the same way that the frequency controller FCf0 controls the variable component circuit VCf0, until the measured parameter level difference is substantially the same as a predetermined parameter level difference. Furthermore, upon receiving a signal, the parameter level controller PRf(n-1) controls the variable component circuit VCF(n-1) via the driver system DRVRf(n-1) and the motor system Mf(n-1) until the measured parameter level difference is substantially equal to a predetermined parameter level difference, in the same way that the frequency controller FCf(n-1) controls the variable component circuit VCF(n-1).

[0232] Similarly, the digital signal processor of the sub-generator HFGf0CW determines whether the parameter level at the nth harmonic frequency of the measured RF signal 208C is fixed at the parameter level at the fundamental frequency of the measured RF signal 208A. If the digital signal processor determines that the measured parameter level difference is not substantially the same as a predetermined parameter level difference between the parameter level at the nth harmonic frequency of RF signal 208C and the parameter level at the fundamental frequency of RF signal 208A, it transmits the signal to the parameter level controller PRf0, or PRfn, or to both parameter level controllers PRf0 and PRfn. Upon receiving the signal, the parameter level controller PRf0 controls the variable component circuit VCf0 via the driver system DRVRf0 and the motor system Mf0 until the measured parameter level difference is substantially the same as a predetermined parameter level difference. Furthermore, upon receiving a signal, the parameter level controller PRfn controls the variable component circuit VCfn via the driver system DRVRfn and the motor system Mfn, in the same way that the frequency controller FCfn controls the variable component circuit VCfn, until the measured parameter level difference is substantially equal to a predetermined parameter level difference.

[0233] When the RF matcher receives RF signals 408A~408C and RF signal 218 from the low-frequency RF generator LFGCW in Figure 2A, it matches the impedance of the load coupled to output O1 with the impedance of the source coupled to inputs I1~I4, generating the corresponding RF signals 602A, 602B, 602C, and 602D. It then sums the corresponding RF signals 602A, 602B, 602C, and 602D to generate a modified RF signal, and combines, for example, the modified RF signals to generate a modified RF signal 610 at output O1. The modified RF signal 610 is supplied to the chuck 212 (Figure 2A) of the plasma chamber via the RF transmission line 116. When the modified RF signal 610 is applied to the plasma chamber, the RF harmonics of the plasma sheath in the plasma chamber are controlled, achieving radial etching uniformity.

[0234] Figure 7 is a graph 700 of one embodiment showing the etching rate versus the radius of the substrate S, providing an example of radial etching uniformity along the radius of the substrate S. Graph 700 includes plot 702, another plot 704, and yet another plot 706. Plot 702 is generated when the sub-generators HFGf(n-1)CW and HFGfnCW in Figure 2 are off, e.g., non-operating state, non-powered state, etc., and the sub-generator HFGf0CW is on, e.g., operating state, powered state, etc. Furthermore, plot 704 is generated when the sub-generator HFGf0CW is on and the phase controller φfn controls the phase of the RF signal 208C to achieve etching rate uniformity in or near the center of the substrate S. Furthermore, plot 706 is generated when the sub-generator HFGf0CW is turned on and the phase controller φfn controls the phase of the RF signal 208C, but the uniformity of the etching rate is not well achieved in or near the center of the substrate S. By controlling the phase of the RF signal 208C, the etching rate that etches the substrate S is controlled, further controlling the uniformity of the radial etching rate across the upper surface of the substrate S.

[0235] The embodiments described herein may be run with a variety of computer system configurations, including handheld hardware units, microprocessor systems, microprocessor-based consumer electronics or programmable consumer electronics, minicomputers, general-purpose computers, and the like. The embodiments may also be run in a distributed computing environment, where tasks are performed by remote processing hardware units connected via a network.

[0236] In some embodiments, the controller is part of a system, and the system may be part of the examples described above. Such a system includes semiconductor processing equipment, which includes one or more processing instruments, one or more chambers, one or more platforms for processing and / or specific processing components (wafer stands, gas flow systems, etc.). These systems are integrated with electronic equipment that controls the operation of the system before, during, and after processing semiconductor wafers or substrates. The electronic equipment is referred to as a “controller” that can control various components or sub-components of one or more systems. Depending on the processing requirements and / or the type of system, the controller is programmed to control any of the processes disclosed herein, including the delivery of processing gases, setting of temperature (e.g., heating and / or cooling), setting of pressure, setting of vacuum, setting of power, setting of RF generators, setting of RF matching circuits, setting of frequency, setting of flow rate, setting of fluid delivery, setting of position and operation, wafer loading and unloading equipment, and other loading equipment, and / or load locks coupled to or interfaced with the system.

[0237] Broadly speaking, in various embodiments, a controller is defined as an electronic device having various integrated circuits, logic, memory, and / or software that receives and issues instructions, controls operations, enables cleaning operations, enables endpoint measurement, etc. An integrated circuit includes a chip in the form of firmware that stores program instructions, a chip defined as a digital signal processor (DSP), ASIC, PLD, and / or one or more microprocessors or microcontrollers that execute program instructions (e.g., software). Program instructions are instructions communicated to the controller in the form of various individual settings (or program files) that define parameters, factors, variables, etc., that perform a particular process on or for a semiconductor wafer or for a system. Operating parameters are, in some embodiments, part of a recipe defined by a process engineer to achieve one or more processing steps while fabricating one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and / or wafer dies.

[0238] In some embodiments, the controller is part of a computer or coupled to a computer, the computer being integrated with the system, coupled to the system, networked to the system in other ways, or a combination thereof. For example, the controller may be in the “cloud” or all or part of a manufacturing host computer system, thereby enabling remote access to wafer processing. The computer enables remote access to the system, monitors the current progress of manufacturing operations, investigates the history of past manufacturing operations, investigates trends or performance metrics from multiple manufacturing operations, modifies parameters of the current process, sets processing steps to follow the current process, or initiates a new process.

[0239] In some embodiments, a remote computer (e.g., a server) provides processing recipes to the system over a network including a local network or the Internet. The remote computer includes a user interface that allows input or programming of parameters and / or settings, in which case the parameters and / or settings are transmitted from the remote computer to the system. In some examples, a controller receives instructions in the form of data, which specify parameters, factors and / or variables for each of the processing steps to be performed during one or more operations. It should be understood that the parameters, factors and / or variables may be specific to the type of process to be performed and the type of instrument to which the controller is configured to interface or control. Thus, as described above, the controller is distributed by including, for example, one or more discrete controllers, and one or more discrete controllers are networked together to work toward a common purpose, such as the processes and controls described herein. An example of a distributed controller for such a purpose includes one or more integrated circuits on a processing room that communicate with one or more remotely located integrated circuits (at the platform level or as part of a remote computer, etc.) to combine to control a process on the processing room.

[0240] In various embodiments, exemplary systems to which the method is applied include, but are not limited to, plasma etching chambers or modules, deposition chambers or modules, spin-rinse chambers or modules, metal plating chambers or modules, clean chambers or modules, bevel-edge etching chambers or modules, physical vapor deposition (PVD) chambers or modules, chemical vapor deposition (CVD) chambers or modules, atomic layer deposition (ALD) chambers or modules, atomic layer etching (ALE) chambers or modules, ion implantation chambers or modules, assembly line chambers or modules, and any other semiconductor processing systems associated with or used in the fabrication and / or manufacture of semiconductor wafers.

[0241] It should be further noted that in some embodiments, the above operation applies to several types of plasma chambers, such as inductively coupled plasma (ICP) reactors, transformer-coupled plasma chambers, plasma chambers containing conductive and dielectric devices, and plasma chambers containing electron cyclotron resonance (ECR) reactors. For example, one or more RF generators are coupled to inductors within an ICP reactor. Examples of inductor shapes include solenoids, dome-shaped coils, flat-shaped coils, and the like.

[0242] As described above, depending on the process step or step performed by the equipment, the host computer communicates with one or more of the following: other equipment circuits or modules, other equipment components, cluster equipment, other equipment interfaces, adjacent equipment, neighboring equipment, equipment located throughout the factory, the main computer, another controller, or equipment used for material transport to transport wafer containers between equipment locations within the semiconductor manufacturing plant or between loading and unloading ports.

[0243] With the above embodiments in mind, it should be understood that some embodiments employ various computer operations involving data stored within a computer system. These operations physically manipulate physical quantities. Any operations described herein that form part of the embodiments are useful mechanical operations.

[0244] Some embodiments also relate to hardware units or devices that perform these operations. These devices are specifically configured for dedicated computers. When defining a dedicated computer, a computer can still operate for that dedicated computer while performing other processes, program execution, or routines that are not part of the dedicated computer.

[0245] In some embodiments, the operation may be processed by a computer that is selectively invoked or configured by one or more computer programs stored in computer memory, a cache, or obtained over a computer network. If the data is obtained over a computer network, the data may be processed by other computers on the computer network, for example, a computing resource cloud.

[0246] One or more embodiments may also be manufactured as computer-readable code on a non-temporary computer-readable medium. A non-temporary computer-readable medium is any data storage hardware unit that stores data to be read later by a computer system, such as a memory device. Examples of non-temporary computer-readable media include hard drives, network-attached storage (NAS), ROM, RAM, compact disk ROM (CD-ROM), recordable CD (CD-R), rewritable CD (CD-RW), magnetic tape, and other optical and non-optical data storage hardware units. In some embodiments, the non-temporary computer-readable medium includes computer-readable tangible media distributed on a network-connected computer system to store and execute computer-readable code in a distributed manner.

[0247] Although the above method operations have been described in a specific order, please understand that in various embodiments, other housekeeping operations may be performed between operations, or the method operations may be timed to occur at slightly different intervals, or distributed within a system that allows for the occurrence of method operations at various intervals, or performed in a different order than described above.

[0248] It should be further noted that in one embodiment, one or more features from any of the embodiments described above may be combined with one or more features from any other embodiment without departing from the scope described in the various embodiments described herein.

[0249] While the embodiments described above have been explained in some detail for the purpose of clarity, it will be apparent that certain changes and modifications can be made within the scope of the appended claims. Therefore, these embodiments should be considered illustrative rather than restrictive, and the embodiments should not be limited to the details shown herein. [Application Example 1] A method for controlling radial etching uniformity, A first radio frequency (RF) signal having a fundamental frequency and a first phase is generated, Based on the fundamental frequency and the first phase, a second RF signal having the (n-1)th harmonic frequency and a second phase is generated, where n is an integer of 3 or more. Based on the fundamental frequency and the first phase, a third RF signal having the nth harmonic frequency and a third phase is generated. The RF matching unit receives the first RF signal, the second RF signal, and the third RF signal. During the etching operation, the RF matcher outputs a modified RF signal to the electrodes of the plasma chamber in order to control the radial etching uniformity across the substrate surface. A method for providing this. [Application Example 2] In the method described in Application Example 1, the first RF signal is a high RF signal, and the method further... Generates a low RF signal, The RF matching device receives the low RF signal. A method comprising the above, wherein the modified RF signal is output based on the first RF signal, the second RF signal, the third RF signal, and the low RF signal. [Application Example 3] The method according to Application Example 1, wherein the (n-1)th harmonic frequency is fixed at the fundamental frequency, the nth harmonic frequency is fixed at the fundamental frequency, the second phase is fixed at the first phase, the third phase is fixed at the first phase, the first RF signal has a first parameter level, the second RF signal has a second parameter level, the third RF signal has a third parameter level, the second parameter level is fixed at the first parameter level, and the third parameter level is fixed at the first parameter level. [Application Example 4] In the method described in Application Example 1, further, To generate an electrical signal, the parameters associated with the RF matcher are measured, To identify the measured fundamental frequency, the measured (n-1)th harmonic frequency, and the measured nth harmonic frequency, the data within the electrical signal is analyzed. The first difference between the measured (n-1)th harmonic frequency and the measured fundamental frequency is calculated. The second difference between the measured nth harmonic frequency and the measured fundamental frequency is calculated. The first difference is compared with a first predetermined threshold, and the second difference is compared with a second predetermined threshold. In response to the determination that the first difference is greater than the first predetermined threshold, at least one of the fundamental frequency of the first RF signal and the (n-1)th harmonic frequency of the second RF signal is modified. In response to the determination that the second difference is greater than the second predetermined threshold, modify at least one of the fundamental frequency of the first RF signal and the nth harmonic frequency of the third RF signal. A method for providing this. [Application Example 5] In the method described in Application Example 1, further, To generate an electrical signal, the parameters associated with the RF matcher are measured, In order to identify the phase measured at the fundamental frequency, the phase measured at the (n-1)th harmonic frequency, and the phase measured at the nth harmonic frequency, the data in the electrical signal is analyzed. The first difference between the phase measured at the (n-1)th harmonic frequency and the phase measured at the fundamental frequency is calculated. A second difference is calculated between the phase measured at the nth harmonic frequency and the phase measured at the fundamental frequency. The first difference is compared with a first predetermined threshold, and the second difference is compared with a second predetermined threshold. In response to the determination that the first difference is greater than the first predetermined threshold, at least one of the first phase of the first RF signal and the second phase of the second RF signal is corrected. In response to the determination that the second difference is greater than the second predetermined threshold, modify at least one of the first phase of the first RF signal and the third phase of the third RF signal. A method for providing this. [Application Example 6] In the method described in Application Example 1, the first RF signal has a first parameter level, the second RF signal has a second parameter level, the third RF signal has a third parameter level, and the method further... To generate an electrical signal, the parameters associated with the RF matcher are measured, To identify the parameter level measured at the fundamental frequency, the parameter level measured at the (n-1)th harmonic frequency, and the parameter level measured at the nth harmonic frequency, the data in the electrical signal is analyzed. The first difference between the parameter level measured at the (n-1)th harmonic frequency and the parameter level measured at the fundamental frequency is calculated. A second difference is calculated between the parameter level measured at the nth harmonic frequency and the parameter level measured at the fundamental frequency. The first difference is compared with a first predetermined threshold, and the second difference is compared with a second predetermined threshold. In response to the determination that the first difference is greater than the first predetermined threshold, at least one of the first parameter level of the first RF signal and the second parameter level of the second RF signal is modified. In response to the determination that the second difference is greater than the second predetermined threshold, modify at least one of the first parameter level of the first RF signal and the third parameter level of the third RF signal. A method for providing this. [Example 7] The method according to Example 1, wherein the (n-1)th harmonic frequency is the second harmonic frequency and the nth harmonic frequency is the third harmonic frequency. [Application Example 8] The method according to Application Example 1, wherein at least one of the first RF signal, the second RF signal, and the third RF signal is a continuous wave signal. [Application Example 9] The method according to Application Example 1, wherein at least one of the first RF signal, the second RF signal, and the third RF signal is a multiplexed state RF signal. [Application Example 10] The method according to Application Example 1, wherein the reception of the first RF signal, the second RF signal, and the third RF signal is performed by receiving the first RF signal at the first input of the RF matcher, receiving the second RF signal at the second input of the RF matcher, and receiving the third RF signal at the third input of the RF matcher. [Application Example 11] A system for controlling radial etching uniformity, wherein the system is A first radio frequency (RF) generator configured to generate a first RF signal having a fundamental frequency and a first phase, A second RF generator is configured to generate a second RF signal having an (n-1)th harmonic frequency and a second phase, based on the aforementioned fundamental frequency and the aforementioned first phase, where n is an integer of 3 or more. A third RF generator configured to generate a third RF signal having an nth harmonic frequency and a third phase based on the fundamental frequency and the first phase, respectively, An RF matching unit coupled to the first RF generator, the second RF generator, and the third RF generator receives the first RF signal, the second RF signal, and the third RF signal and outputs a modified RF signal. A system comprising the modified RF signal, which is used to control radial etching uniformity across the substrate surface during etching operations in the plasma chamber. [Application Example 12] In the system described in Application Example 11, each of the first RF generator, the second RF generator, and the third RF generator is a high RF generator, and the system further comprises: A system comprising a low-frequency generator configured to generate a low-RF signal, an RF matcher configured to receive the low-RF signal, and a modified RF signal output based on the first RF signal, the second RF signal, the third RF signal, and the low-RF signal. [Application Example 13] The system described in Application Example 11, wherein the (n-1)th harmonic frequency is fixed at the fundamental frequency, the nth harmonic frequency is fixed at the fundamental frequency, the second phase is fixed at the first phase, the third phase is fixed at the first phase, the first RF signal has a first parameter level, the second RF signal has a second parameter level, the third RF signal has a third parameter level, the second parameter level is fixed at the first parameter level, and the third parameter level is fixed at the first parameter level. [Application Example 14] In the system described in Application Example 11, further, A parameter sensor configured to measure parameters associated with the RF matcher in order to generate an electrical signal, A processor coupled to the parameter sensor analyzes the data within the electrical signal and identifies the measured fundamental frequency, the measured (n-1)th harmonic frequency, and the measured nth harmonic frequency. The processor is equipped with, The first difference between the measured (n-1)th harmonic frequency and the measured fundamental frequency is calculated. The second difference between the measured nth harmonic frequency and the measured fundamental frequency is calculated. To determine whether the first difference is greater than a first predetermined threshold, the first difference is compared with the first predetermined threshold, and in accordance with the determination that the first difference is greater than the first predetermined threshold, at least one of the fundamental frequency of the first RF signal and the (n-1)th harmonic frequency of the second RF signal is modified. To determine whether the second difference is greater than a second predetermined threshold, the system is configured to compare the second difference with the second predetermined threshold, and, in response to the determination that the second difference is greater than the second predetermined threshold, to modify at least one of the fundamental frequency of the first RF signal and the nth harmonic frequency of the third RF signal. system. [Application Example 15] In the system described in Application Example 11, further, A parameter sensor configured to measure parameters associated with the RF matcher in order to generate an electrical signal, A processor coupled to the parameter sensor analyzes the data within the electrical signal and identifies the phase measured at the fundamental frequency, the phase measured at the (n-1)th harmonic frequency, and the phase measured at the nth harmonic frequency. The processor is equipped with, The first difference between the phase measured at the (n-1)th harmonic frequency and the phase measured at the fundamental frequency is calculated. A second difference is calculated between the phase measured at the nth harmonic frequency and the phase measured at the fundamental frequency. In order to determine whether the first difference is greater than the first predetermined threshold, the first difference is compared with the first predetermined threshold, In order to determine whether the second difference is greater than the second predetermined threshold, the second difference is compared with the second predetermined threshold, In response to the determination that the first difference is greater than the first predetermined threshold, at least one of the first phase of the first RF signal and the second phase of the second RF signal is corrected. In response to the determination that the second difference is greater than the second predetermined threshold, the system is configured to correct at least one of the first phase of the first RF signal and the third phase of the third RF signal. system. [Application Example 16] In the system described in Application Example 11, the first RF signal has a first parameter level, the second RF signal has a second parameter level, the third RF signal has a third parameter level, and the system further... A parameter sensor configured to measure parameters associated with the RF matcher in order to generate an electrical signal, A processor coupled to the parameter sensor analyzes the data within the electrical signal and identifies the parameter level measured at the fundamental frequency, the parameter level measured at the (n-1)th harmonic frequency, and the parameter level measured at the nth harmonic frequency. The processor is equipped with, The first difference between the parameter level measured at the (n-1)th harmonic frequency and the parameter level measured at the fundamental frequency is calculated. A second difference is calculated between the parameter level measured at the nth harmonic frequency and the parameter level measured at the fundamental frequency. The first difference is compared with a first predetermined threshold, and the second difference is compared with a second predetermined threshold. In response to the determination that the first difference is greater than the first predetermined threshold, at least one of the first parameter level of the first RF signal and the second parameter level of the second RF signal is modified. In response to the determination that the second difference is greater than the second predetermined threshold, at least one of the first parameter level of the first RF signal and the third parameter level of the third RF signal is modified. A system that is configured in such a way. [Application Example 17] A system in which the (n-1)th harmonic frequency is the second harmonic frequency and the nth harmonic frequency is the third harmonic frequency, in the system described in Application Example 11. [Application Example 18] A system in which, in the system described in Application Example 11, at least one of the first RF signal, the second RF signal, and the third RF signal is a continuous wave signal. [Application Example 19] A system in which, in the system described in Application Example 11, at least one of the first RF signal, the second RF signal, and the third RF signal is a multiplexed state RF signal. [Application Example 20] In the system described in Application Example 11, the RF matching unit has a first input for receiving the first RF signal, a second input for receiving the second RF signal, and a third input for receiving the third RF signal. [Application Example 21] A system in which, A first controller configured to control a first radio frequency (RF) power supply in order to generate a first RF signal having a fundamental frequency and a first phase, A second controller is configured to control a second RF power supply in order to generate a second RF signal having an (n-1)th harmonic frequency and a second phase, based on the aforementioned fundamental frequency and the aforementioned first phase, where n is an integer of 3 or more. A third RF controller configured to control a third RF power supply in order to generate a third RF signal having an nth harmonic frequency and a third phase based on the fundamental frequency and the first phase, respectively. A system comprising, wherein the first RF signal, the second RF signal, and the third RF signal are supplied to an RF matcher and modified to generate a plurality of modified signals that are combined to produce a modified RF signal. [Application Example 22] A system in which the first controller, the second controller and the third controller are integrated into a single controller, in the system described in Application Example 21. [Application Example 23] The system described in Application Example 21, wherein the modified RF signal is configured to be supplied to the electrodes of the plasma chamber to control radial etching uniformity across the substrate surface during the etching operation. [Application Example 24] The system described in Application Example 21, wherein the (n-1)th harmonic frequency is fixed at the fundamental frequency, the nth harmonic frequency is fixed at the fundamental frequency, the second phase is fixed at the first phase, the third phase is fixed at the first phase, the first RF signal has a first parameter level, the second RF signal has a second parameter level, the third RF signal has a third parameter level, the second parameter level is fixed at the first parameter level, and the third parameter level is fixed at the first parameter level. [Application Example 25] In the system described in Application Example 21, further, The system comprises a processor coupled to the parameter sensor to analyze data in the electrical signals received from the parameter sensor, and the processor To identify the measured fundamental frequency, the measured (n-1)th harmonic frequency, and the measured nth harmonic frequency, the data is analyzed. The first difference between the measured (n-1)th harmonic frequency and the measured fundamental frequency is calculated. The second difference between the measured nth harmonic frequency and the measured fundamental frequency is calculated. In order to determine whether the first difference is greater than the first predetermined threshold, the system is configured to compare the first difference with the first predetermined threshold, The processor is coupled to the first controller and the second controller, and the processor further comprises Control at least one of the following: a first controller that modifies the fundamental frequency of the first RF signal in response to a determination that the first difference is greater than a first predetermined threshold, and a second controller that modifies the (n-1)th harmonic frequency of the second RF signal in response to a determination that the first difference is greater than a first predetermined threshold. The system is configured to compare the second difference with the second predetermined threshold in order to determine whether the second difference is greater than the second predetermined threshold. The processor is coupled to the third controller, and the processor is further, A system configured to control at least one of the following: a first controller that modifies the fundamental frequency of the first RF signal in response to a determination that the second difference is greater than a second predetermined threshold; and a third controller that modifies the nth harmonic frequency of the third RF signal in response to a determination that the second difference is greater than a second predetermined threshold. [Application Example 26] In the system described in Application Example 21, further, The system comprises a processor coupled to the parameter sensor to analyze data in the electrical signals received from the parameter sensor, and the processor To identify the phase measured at the aforementioned fundamental frequency, the phase measured at the (n-1)th harmonic frequency, and the phase measured at the aforementioned nth harmonic frequency, the data is analyzed. The first difference between the phase measured at the (n-1)th harmonic frequency and the phase measured at the fundamental frequency is calculated. A second difference is calculated between the phase measured at the nth harmonic frequency and the phase measured at the fundamental frequency. In order to determine whether the first difference is greater than the first predetermined threshold, the first difference is compared with the first predetermined threshold, The system is configured to compare the second difference with the second predetermined threshold in order to determine whether the second difference is greater than the second predetermined threshold. The processor is coupled to the first controller and the second controller, and the processor is further, The system is configured to control at least one of the following: a first controller that modifies the first phase of the first RF signal in response to a determination that the first difference is greater than a first predetermined threshold, and a second controller that modifies the second phase of the second RF signal in response to a determination that the first difference is greater than a first predetermined threshold. The processor is coupled to the third controller, and the processor is further, A system configured to control at least one of the following: a first controller that modifies the first phase of the first RF signal in response to a determination that the second difference is greater than a second predetermined threshold; and a third controller that modifies the third phase of the third RF signal in response to a determination that the second difference is greater than a second predetermined threshold. [Application Example 27] In the system described in Application Example 21, further, The system includes a processor coupled to the parameter sensor to analyze data in the electrical signals received from the parameter sensor, and the processor To identify the parameter level measured at the aforementioned fundamental frequency, the parameter level measured at the aforementioned (n-1)th harmonic frequency, and the parameter level measured at the aforementioned nth harmonic frequency, the data is analyzed. The first difference between the parameter level measured at the (n-1)th harmonic frequency and the parameter level measured at the fundamental frequency is calculated. A second difference is calculated between the parameter level measured at the nth harmonic frequency and the parameter level measured at the fundamental frequency. It is configured to compare at least one of the following: the first difference with a first predetermined threshold, and the second difference with a second predetermined threshold. The processor is coupled to the first controller and the second controller, and the processor is further, The system is configured to control at least one of the following: a first controller that modifies a first parameter level of the first RF signal in response to a determination that the first difference is greater than a first predetermined threshold; and a second controller that modifies a second parameter level of the second RF signal in response to a determination that the first difference is greater than a first predetermined threshold. The processor is coupled to the third controller, and the processor is further, A system configured to control at least one of the following: a first controller that modifies the first parameter level of the first RF signal in response to a determination that the second difference is greater than a second predetermined threshold; and a third controller that modifies the third parameter level of the third RF signal in response to a determination that the second difference is greater than a second predetermined threshold. [Application Example 28] A system in which the (n-1)th harmonic frequency is the second harmonic frequency and the nth harmonic frequency is the third harmonic frequency, in the system described in Application Example 21. [Application Example 29] A system in which, in the system described in Application Example 21, at least one of the first RF signal, the second RF signal, and the third RF signal is a continuous wave signal. [Application Example 30] A system in which, in the system described in Application Example 21, at least one of the first RF signal, the second RF signal, and the third RF signal is a multiplexed state RF signal. [Application Example 31] A system in which, in the system described in Application Example 21, the first RF signal is supplied to the first input of the RF matcher, the second RF signal is supplied to the second input of the RF matcher, and the third RF signal is supplied to the third input of the RF matcher.

Claims

1. A controller for controlling radial etching uniformity, It is a processor, Control the first RF power supply to generate a first radio frequency (RF) signal having a fundamental frequency and a first phase. The second RF power supply is controlled to generate a second RF signal having the (n-1)th harmonic frequency and a second phase, respectively, based on the fundamental frequency and the first phase, where n is an integer greater than 2. A processor configured to control a third RF power supply to generate a third RF signal having an nth harmonic frequency and a third phase based on the fundamental frequency and the first phase, respectively; the first, second, and third RF signals are generated to be supplied to an RF matcher, the first RF signal is modified by the RF matcher to provide a first modification signal, the second RF signal is modified by the RF matcher to provide a second modification signal, the third RF signal is modified by the RF matcher to provide a third modification signal, the first, second, and third modification signals are generated from the first, second, and third signals by matching the impedance of a load coupled to the output of the RF matcher with the impedance of a source coupled to the input of the RF matcher, the first, second, and third modification signals are combined within the RF matcher to output a combined RF signal, the combined RF signal is output to be supplied to electrodes in a plasma chamber to control the radial etching uniformity across the surface of the substrate; A controller comprising a memory device coupled to the aforementioned processor.

2. A controller according to claim 1, A controller in which the first RF signal is generated to be supplied to the first input of the RF matcher, the second RF signal is generated to be supplied to the second input of the RF matcher, and the third RF signal is generated to be supplied to the third input of the RF matcher.

3. A controller according to claim 1, The aforementioned processor, The first measured value of the fundamental frequency of the first RF signal and the second measured value of the (n-1)th harmonic frequency of the second RF signal are received. Determine whether the difference between the first measurement and the second measurement falls within a first predetermined range from a first predetermined frequency difference. The first RF power supply or the second RF power supply is controlled until the difference between the first measured value and the second measured value falls within the first predetermined range from the first predetermined frequency difference. A controller configured in such a way.

4. A controller according to claim 3, The aforementioned processor, The third measurement of the nth harmonic frequency of the third RF signal is received, Determine whether the difference between the first measurement and the third measurement falls within a second predetermined range from a second predetermined frequency difference. The first RF power supply or the third RF power supply is controlled until the difference between the first measurement and the third measurement falls within the second predetermined range from the second predetermined frequency difference. A controller configured in such a way.

5. A controller according to claim 1, The aforementioned processor, The first measured value of the first phase of the first RF signal and the second measured value of the second phase of the second RF signal are received. Determine whether the difference between the first measurement and the second measurement falls within a first predetermined range from a first predetermined phase difference. The first RF power supply or the second RF power supply is controlled until the difference between the first measured value and the second measured value falls within the first predetermined phase difference range. A controller configured in such a way.

6. A controller according to claim 5, The aforementioned processor, The third measured value of the third phase of the third RF signal is received. Determine whether the difference between the first measurement and the third measurement falls within a second predetermined range from a second predetermined phase difference. The first RF power supply or the third RF power supply is controlled until the difference between the first measurement value and the third measurement value falls within the second predetermined phase difference range. A controller configured in such a way.

7. A controller according to claim 1, The aforementioned processor, The first measurement of the first parameter level of the first RF signal and the second measurement of the second parameter level of the second RF signal are received. Determine whether the difference between the first measurement and the second measurement falls within a first predetermined range from a first predetermined parameter level difference. The first RF power supply or the second RF power supply is controlled until the difference between the first measured value and the second measured value falls within the first predetermined range from the first predetermined parameter level difference. A controller configured in such a way.

8. A controller according to claim 7, The aforementioned processor, The third measurement value of the third parameter level of the third RF signal is received. It is determined whether the difference between the first measurement and the third measurement falls within a second predetermined range from a second predetermined parameter level difference. The first RF power supply or the third RF power supply is controlled until the difference between the first measurement and the third measurement falls within the second predetermined range from the second predetermined parameter level difference. A controller configured in such a way.

9. A method for controlling radial etching uniformity, Control the first RF power supply to generate a first radio frequency (RF) signal having a fundamental frequency and a first phase. A second RF power supply is controlled to generate a second RF signal having an (n-1)th harmonic frequency and a second phase, based on the fundamental frequency and the first phase, respectively, where n is an integer greater than 2. The system includes controlling a third RF power supply to generate a third RF signal having an nth harmonic frequency and a third phase, based on the fundamental frequency and the first phase, respectively. A method comprising: generating the first, second, and third RF signals for supply to an RF matcher; modifying the first RF signal by the RF matcher to provide a first modification signal; modifying the second RF signal by the RF matcher to provide a second modification signal; modifying the third RF signal by the RF matcher to provide a third modification signal; generating the first, second, and third modification signals from the first, second, and third signals by matching the impedance of a load coupled to the output of the RF matcher with the impedance of a source coupled to the input of the RF matcher; combining the first, second, and third modification signals within the RF matcher to output a combined RF signal; and outputting the combined RF signal to be supplied to electrodes in a plasma chamber to control the radial etching uniformity across the surface of the substrate.

10. The method according to claim 9, A method wherein the first RF signal is generated to be supplied to the first input of the RF matcher, the second RF signal is generated to be supplied to the second input of the RF matcher, and the third RF signal is generated to be supplied to the third input of the RF matcher.

11. The method according to claim 9, further, The first measured value of the fundamental frequency of the first RF signal and the second measured value of the (n-1)th harmonic frequency of the second RF signal are received. Determine whether the difference between the first measurement and the second measurement falls within a first predetermined range from a first predetermined frequency difference. A method comprising controlling the first RF power supply or the second RF power supply until the difference between the first measured value and the second measured value falls within a first predetermined range from a first predetermined frequency difference.

12. The method according to claim 11, further, The third measurement of the nth harmonic frequency of the third RF signal is received, Determine whether the difference between the first measurement and the third measurement falls within a second predetermined range from a second predetermined frequency difference. A method comprising controlling the first RF power supply or the third RF power supply until the difference between the first measured value and the third measured value falls within a second predetermined range from a second predetermined frequency difference.

13. The method according to claim 9, further, The first measured value of the first phase of the first RF signal and the second measured value of the second phase of the second RF signal are received. Determine whether the difference between the first measurement and the second measurement falls within a first predetermined range from a first predetermined phase difference. A method comprising controlling the first RF power supply or the second RF power supply until the difference between the first measured value and the second measured value falls within a first predetermined range from a first predetermined phase difference.

14. The method according to claim 13, further, The third measured value of the third phase of the third RF signal is received. Determine whether the difference between the first measurement and the third measurement falls within a second predetermined range from a second predetermined phase difference. A method comprising controlling the first RF power supply or the third RF power supply until the difference between the first measured value and the third measured value falls within a second predetermined range from a second predetermined phase difference.

15. The method according to claim 9, further, The first measurement of the first parameter level of the first RF signal and the second measurement of the second parameter level of the second RF signal are received. Determine whether the difference between the first measurement and the second measurement falls within a first predetermined range from a first predetermined parameter level difference. A method comprising controlling the first RF power supply or the second RF power supply until the difference between the first measured value and the second measured value falls within a first predetermined range from a first predetermined parameter level difference.

16. The method according to claim 15, further, The third measurement value of the third parameter level of the third RF signal is received. It is determined whether the difference between the first measurement and the third measurement falls within a second predetermined range from a second predetermined parameter level difference. A method comprising controlling the first RF power supply or the third RF power supply until the difference between the first measured value and the third measured value falls within a second predetermined range from a second predetermined parameter level difference.

17. A plasma system for controlling radial etching uniformity, An RF generator having a first radio frequency (RF) power supply, a second RF power supply, and a third RF power supply, The RF matching unit coupled to the RF generator and Coupled to the RF matching unit, a plasma chamber including electrodes, It is a controller, The first RF power supply is controlled to generate a first RF signal having a fundamental frequency and a first phase, The second RF power supply is controlled to generate a second RF signal having an (n-1)th harmonic frequency and a second phase, based on the fundamental frequency and the first phase, respectively, where n is an integer greater than 2. The third RF power supply is controlled to generate a third RF signal having the nth harmonic frequency and a third phase, respectively, based on the fundamental frequency and the first phase. A controller configured as follows, A plasma system comprising: the first, second, and third RF signals are generated for supply to the RF matcher, the RF matcher is configured to modify the first RF signal to provide a first correction signal, the second RF signal to provide a second correction signal, and the third RF signal to provide a third correction signal, the first, second, and third correction signals are generated from the first, second, and third signals by matching the impedance of a load coupled to the output of the RF matcher with the impedance of a source coupled to the input of the RF matcher, the RF matcher is configured to combine the first, second, and third correction signals to output a combined RF signal, and the RF matcher is configured to supply the combined RF signal to the electrodes of the plasma chamber to control the radial etching uniformity across the surface of the substrate.

18. A plasma system according to claim 17, A plasma system in which the first RF signal is generated to be supplied to the first input of the RF matcher, the second RF signal is generated to be supplied to the second input of the RF matcher, and the third RF signal is generated to be supplied to the third input of the RF matcher.

19. A plasma system according to claim 17, The controller is, The first measured value of the fundamental frequency of the first RF signal and the second measured value of the (n-1)th harmonic frequency of the second RF signal are received. Determine whether the difference between the first measurement and the second measurement falls within a first predetermined range from a first predetermined frequency difference. A plasma system configured to control the first RF power supply or the second RF power supply until the difference between the first measured value and the second measured value falls within a first predetermined range from a first predetermined frequency difference.

20. A plasma system according to claim 19, The controller is, The third measurement of the nth harmonic frequency of the third RF signal is received, Determine whether the difference between the first measurement and the third measurement falls within a second predetermined range from a second predetermined frequency difference. A plasma system configured to control the first RF power supply or the third RF power supply until the difference between the first measured value and the third measured value falls within a second predetermined range from a second predetermined frequency difference.

21. A plasma system according to claim 17, The controller is, The first measured value of the first phase of the first RF signal and the second measured value of the second phase of the second RF signal are received. Determine whether the difference between the first measurement and the second measurement falls within a first predetermined range from a first predetermined phase difference. A plasma system configured to control the first RF power supply or the second RF power supply until the difference between the first measured value and the second measured value falls within a first predetermined range from a first predetermined phase difference.

22. A plasma system according to claim 21, The controller is, The third measured value of the third phase of the third RF signal is received. Determine whether the difference between the first measurement and the third measurement falls within a second predetermined range from a second predetermined phase difference. A plasma system configured to control the first RF power supply or the third RF power supply until the difference between the first measurement and the third measurement falls within a second predetermined range from a second predetermined phase difference.

23. A plasma system according to claim 17, The controller is, The first measurement of the first parameter level of the first RF signal and the second measurement of the second parameter level of the second RF signal are received. Determine whether the difference between the first measurement and the second measurement falls within a first predetermined range from a first predetermined parameter level difference. A plasma system configured to control the first RF power supply or the second RF power supply until the difference between the first measured value and the second measured value falls within a first predetermined range from a first predetermined parameter level difference.

24. A plasma system according to claim 23, The controller is, The third measurement value of the third parameter level of the third RF signal is received. It is determined whether the difference between the first measurement and the third measurement falls within a second predetermined range from a second predetermined parameter level difference. A plasma system configured to control the first RF power supply or the third RF power supply until the difference between the first measurement and the third measurement falls within a second predetermined range from a second predetermined parameter level difference.

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