Mesh decoding device, mesh decoding method, and program
The mesh decoding device and method optimize computational efficiency by omitting unnecessary decoding steps and using bypass arithmetic decoding, addressing the high computational demands of existing mesh decoding techniques.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- KDDI CORP
- Filing Date
- 2022-12-28
- Publication Date
- 2026-05-13
AI Technical Summary
The existing mesh decoding techniques require a large amount of computational resources due to the extensive calculations involved in decoding displacement amounts.
A mesh decoding device and method that includes a displacement decoding unit with components like a decoding omission determination unit, arithmetic decoding unit, multi-leveling unit, inverse quantization unit, and inverse wavelet transform unit, which strategically omit decoding of certain syntax and perform bypass arithmetic decoding to reduce computational load.
This approach significantly reduces the computational requirements for mesh decoding, enhancing efficiency and resource utilization.
Smart Images
Figure 0007857856000001 
Figure 0007857856000002 
Figure 0007857856000003
Abstract
Description
Technical Field
[0001] The present invention relates to a mesh decoding device, a mesh decoding method, and a program.
Background Art
[0002] Non-Patent Document 1 discloses a technique for decoding a mesh by dividing it into a rough basic mesh and a detailed displacement amount, and decoding the displacement amount by a video codec.
Prior Art Documents
Non-Patent Documents
[0003]
Non-Patent Document 1
Summary of the Invention
Problems to be Solved by the Invention
[0004] However, the technique disclosed in Non-Patent Document 1 has a problem that the amount of calculation of the video codec used for decoding the displacement amount is large. Therefore, the present invention has been made in view of the above problems, and an object thereof is to provide a mesh decoding device, a mesh decoding method, and a program capable of reducing the amount of calculation.
Means for Solving the Problems
[0005] The first feature of the present invention is a mesh decoding device comprising a displacement decoding unit configured to decode a displacement bitstream to generate and output a displacement amount, wherein the displacement decoding unit comprises a decoding omission determination unit configured to determine whether to omit the decoding of some syntax and consider it as a predetermined value, an arithmetic decoding unit configured to generate a binarized syntax by performing arithmetic decoding on the displacement bitstream, a multi-leveling unit configured to generate the syntax by multi-leveling the binarized syntax, a coefficient level value decoding unit configured to generate coefficient level values from the syntax, an inverse quantization unit configured to generate conversion coefficients by inverse quantizing the coefficient level values, and an inverse wavelet transform unit configured to generate a displacement amount by applying an inverse wavelet transform to the conversion coefficients.
[0006] A second feature of the present invention is a mesh decoding method comprising the steps of decoding a displacement bitstream to generate and output a displacement amount, wherein the step includes determining whether to omit decoding of some syntax and consider it as a predetermined value; generating a binarized syntax by performing arithmetic decoding on the displacement bitstream; generating the syntax by multi-leveling the binarized syntax; generating coefficient level values from the syntax; generating conversion coefficients by inverse quantizing the coefficient level values; and generating a displacement amount by applying an inverse wavelet transform to the conversion coefficients.
[0007] A third feature of the present invention is a program that causes a computer to function as a mesh decoding device, wherein the mesh decoding device includes a displacement decoding unit configured to decode a displacement bitstream to generate and output a displacement amount, and the displacement decoding unit comprises a decoding omission determination unit configured to determine whether to omit the decoding of some syntax and consider it as a predetermined value, an arithmetic decoding unit configured to generate a binarized syntax by performing arithmetic decoding on the displacement bitstream, a multi-leveling unit configured to generate the syntax by multi-leveling the binarized syntax, a coefficient level value decoding unit configured to generate coefficient level values from the syntax, an inverse quantization unit configured to generate conversion coefficients by inverse quantizing the coefficient level values, and an inverse wavelet transform unit configured to generate a displacement amount by applying an inverse wavelet transform to the conversion coefficients. [Effects of the Invention]
[0008] According to the present invention, it is possible to provide a mesh decoding device, a mesh decoding method, and a program that can reduce the amount of computation required. [Brief explanation of the drawing]
[0009] [Figure 1] Figure 1 shows an example of the configuration of a mesh processing system 1 according to one embodiment. [Figure 2] Figure 2 shows an example of a functional block of a mesh decoding device 200 according to one embodiment. [Figure 3] Figure 3 shows an example of the functional block of the displacement decoding unit 206 of a mesh decoding device 200 according to one embodiment. [Figure 4] Figure 4 shows an example of a syntax configuration. [Figure 5]Figure 5 shows an example of a syntax that can be determined to be decoded by the decodement omission determination unit 206A1, and an example of a coefficient that can be subject to bypass arithmetic decoding by the bypass decoding determination unit 206A2. [Figure 6] Figure 6 is a flowchart illustrating an example of the operation of the displacement decoding unit 206. [Figure 7] Figure 7 is a flowchart illustrating an example of how determination is made using coefficient-level syntax. [Modes for carrying out the invention]
[0010] Embodiments of the present invention will be described below with reference to the drawings. Note that the components in the following embodiments can be replaced with existing components as appropriate, and various variations are possible, including combinations with other existing components. Therefore, the description of the following embodiments does not limit the content of the invention as described in the claims.
[0011] <First Embodiment> The mesh processing system according to this embodiment will be described below with reference to Figures 1 to 7.
[0012] Figure 1 shows an example of the configuration of the mesh processing system 1 according to this embodiment. As shown in Figure 1, the mesh processing system 1 includes a mesh encoding device 100 and a mesh decoding device 200.
[0013] Figure 2 shows an example of the functional block of the mesh decoding device 200 according to this embodiment.
[0014] As shown in Figure 2, the mesh decoding device 200 includes a multiplexing unit 201, a basic mesh decoding unit 202, a subdivision unit 203, a mesh decoding unit 204, a patch integration unit 205, a displacement decoding unit 206, and a video decoding unit 207.
[0015] The multiplex separation unit 201 is configured to separate the multiplexed bit stream into a basic mesh bit stream, a displacement amount bit stream, and a texture bit stream.
[0016] The basic mesh decoding unit 202 is configured to decode the basic mesh bit stream, generate a basic mesh, and output it.
[0017] The subdivision unit 203 is configured to generate and output additional subdivision vertices and their connection information from the basic mesh decoded by the basic mesh decoding unit 202 according to the subdivision method indicated by the control information.
[0018] Here, the basic mesh, the additional subdivision vertices, and their connection information are collectively referred to as the "subdivided mesh".
[0019] The mesh decoding unit 204 is configured to generate and output a decoded mesh using the subdivided mesh generated by the subdivision unit 203 and the displacement amount decoded by the displacement amount decoding unit 206.
[0020] The patch integration unit 205 is configured to integrate and output the decoded mesh generated by the mesh decoding unit 206 by a plurality of patches.
[0021] The displacement amount decoding unit 206 is configured to decode the displacement amount bit stream, generate a displacement amount, and output it.
[0022] The video decoding unit 207 is configured to decode and output a texture by video encoding. For example, the video decoding unit 207 may use HEVC of Non-Patent Document 1.
[0023] (Displacement amount decoding unit 206) As shown in Figure 3, the displacement decoding unit 206 includes a decoding omission determination unit 206A1, a bypass decoding determination unit 206A2, a bypass arithmetic decoding unit 206A3, an arithmetic decoding unit 206B, a context value update unit 206C, a context buffer 206D, a context selection unit 206E, a multi-level conversion unit 206F, a coefficient level value decoding unit F2, an interpretation unit 206G, a frame buffer 206H, an adder 206I, an inverse quantization unit 206J, and an inverse wavelet transform unit 206K.
[0024] The decoding omission determination unit 206A1 is configured to determine whether to partially omit the decoding of some syntax and consider it as a predetermined value.
[0025] The bypass decoding determination unit 206A2 is configured to determine whether to send the received displacement bitstream to the arithmetic decoding unit 206B or the bypass arithmetic decoding unit 206A3.
[0026] The arithmetic decoding unit 206B is configured to generate a binarized syntax by performing arithmetic decoding on the received displacement bitstream. Specifically, the arithmetic decoding unit 206B is configured to output a binarized syntax by performing arithmetic decoding on the received displacement bitstream while updating the context value.
[0027] The context value update unit 206C is configured to update the context value using a binarization syntax and output it to the context buffer 206D.
[0028] The context selection unit 206E is configured to generate and output context values (output context values) using the context values and syntax read from the context buffer 206D.
[0029] The context buffer 206D is configured to acquire and store context values and syntax. The context buffer 206D is configured to output context values and syntax to the context selection unit 206E according to control information (not shown).
[0030] The bypass arithmetic decoding unit 206A3 is configured to generate a binarized syntax by performing arithmetic decoding on the received displacement bitstream with a fixed context value.
[0031] The multi-leveling unit 206F is configured to generate and output syntax by multi-leveling the binarized syntax received from the arithmetic decoding unit 206B or the bypass arithmetic decoding unit 206A3. The generated (calculated) syntax is output to the coefficient level value decoding unit 206F2 and the context buffer 206D.
[0032] The coefficient level value decoding unit 206F2 is configured to generate and output coefficient level values from the syntax received from the multi-level conversion unit 206F.
[0033] The interpretation unit 206G is configured to generate and output predicted displacement amounts using a reference frame read from the frame buffer 206H.
[0034] The frame buffer 206H is configured to acquire and store coefficient level values from the adder 206I. The frame buffer 206H is configured to output coefficient level values at the corresponding vertices in the reference frame according to control information (not shown).
[0035] The adder 206I is configured to acquire coefficient level values (predicted residuals) from the coefficient level value decoding unit 206F2 and coefficient level values from the frame buffer 206H. The adder 206I is configured to add the predicted residuals and coefficient level values to generate and output coefficient level values (decoded displacement). The generated (calculated) coefficient level values (decoded displacement) are output to the inverse quantization unit 206J and the frame buffer 206H.
[0036] The inverse quantization unit 206J is configured to generate and output conversion coefficients by inverse quantizing the received coefficient level value (decoded displacement).
[0037] The inverse wavelet transform unit 206K is configured to generate and output a displacement amount by performing an inverse wavelet transform on the transformation coefficients received from the inverse quantization unit 206J.
[0038] Here, the inverse wavelet transform is the inverse transform of the wavelet transform. The wavelet transform is a technique that uses wavelet functions as a basis, expanding the basis for low-frequency components and contracting it for high-frequency components, thereby enabling simultaneous analysis of spatial and frequency information.
[0039] (Syntax structure) The syntax structure will be explained below with reference to Figures 4 and 5.
[0040] First, the coefficient level value of the decoded displacement is represented by three N-dimensional vectors in each frame. N represents the total number of subdivided vertices. 3 represents the number of basis vectors, which may be set arbitrarily.
[0041] For example, the coefficient level values mentioned above may be set to three values based on each subdivided vertex: the normal direction, the Tanegent direction, and the Bi-Tangent direction. Each vector is divided into blocks or subblocks and encoded on a block-by-block or subblock-by-block basis.
[0042] Each vector may be divided equally so that each block is of the same size. The remaining elements are used to form blocks of the largest possible size. Alternatively, each vector may be divided so that each block is of a different size.
[0043] For example, the block size may be determined by the subdivision level indicated by the control information and the total number of coefficient level values at each level (n1, n2, ...). Here, the subdivision level indicates the number of subdivisions. For example, if the subdivision level is 4, it may consist of four blocks with sizes n1, n2, n3, and n4, respectively.
[0044] Each block is further divided into smaller subblocks. A block may be divided equally so that each subblock is the same size. Any remaining elements are used to form subblocks of the largest possible size. The sizes of the subblocks may differ for each block.
[0045] Figure 4 shows an example of syntax structure. Syntax can be defined at the overall level, block level, subblock level, or coefficient level.
[0046] First, let's describe the syntax defined overall. `last_sig_coeff_prefix` represents the prefix of the first non-zero coefficient coordinate position in the scan order. `last_sig_coeff_suffix` represents the suffix of the first non-zero coefficient coordinate position in the scan order. For example, the prefix is represented by truncated Rice binarization, and the suffix is represented by a fixed length.
[0047] Secondly, we will explain the syntax defined on a block-by-block basis. `coded_block_flag` is a flag that indicates the presence of non-zero coefficients within a block. Only one such flag is defined for each block.
[0048] Thirdly, we will explain the syntax defined at the subblock level. `coded_subblock_flag` is a flag that indicates the presence of non-zero coefficients within a subblock. Only one such flag is defined for each subblock.
[0049] Fourth, we will explain the syntax defined at the coefficient level. sig_coeff_flag is a flag indicating whether the coefficient is non-zero. coeff_abs_level_greater1_flag is a flag indicating whether the absolute value of the coefficient (non-zero coefficient) is 2 or greater. coeff_sign_flag is a flag indicating the sign of the coefficient. coeff_abs_level_remaining represents the value obtained by subtracting the values expressed by sig_coeff_flag and coeff_abs_level_greater1_flag from the absolute value of the coefficient. coeff_abs_level_remaining can be represented, for example, by a k-th exponential Golomb code.
[0050] (Arithmetic decoding unit 206B) The arithmetic decoding unit 206B deals with binary values. The arithmetic decoding unit 206B defines a number line from 0 to 1 and divides and uses its intervals. These intervals are divided according to the probability of occurrence of binary values (hereinafter referred to as context values).
[0051] The arithmetic decoding unit 206B receives a binary decimal number as input and decodes the original value based on which interval on the number line the binary decimal number falls into. The context value is received from the context selection unit 206E for each bit of the input signal and used for decoding.
[0052] (Context value update unit 206C) The context value update unit 206C is configured to update the context value each time a bit is decoded.
[0053] Here, the context value update unit designates symbols with a high probability of occurrence (0 and 1) as MPS (Most Probable Symbol) and symbols with a low probability of occurrence as LPS (Least Probable Symbol).
[0054] The context value update unit 206C may use a probability update table that updates the probability value slightly when MPS occurs and significantly when LPS occurs.
[0055] (Bypass arithmetic decoding unit 206A3) The bypass arithmetic decoding unit 206A3 is configured to perform arithmetic decoding using context values, similar to the arithmetic decoding unit 206B.
[0056] In the bypass arithmetic decoding unit 206A3, the context value is always fixed, eliminating the need for context updates and context selection, thereby reducing computation time.
[0057] (Decryption omission determination unit 206A1) The decryption omission determination unit 206A1 may be configured to determine whether to omit the decryption of coded_block_flag in some blocks and treat it as a predetermined value.
[0058] Furthermore, the decryption omission determination unit 206A1 may be configured to determine whether to omit the decoding of coded_subblock_flag in some subblocks and consider it to be a predetermined value.
[0059] For example, if the decryption omission determination unit 206A1 reaches a predetermined threshold, it may omit decryption for all remaining coded_block_flag values and treat them as 1.
[0060] For example, if the decryption omission determination unit 206A1 determines that the total number of decrypted values that are 1 reaches a predetermined threshold, it may omit decryption for all remaining coded_block_flag values and consider them all to be 1.
[0061] For example, if the decryption omission determination unit 206A1 reaches a predetermined threshold, it may omit decryption for all remaining coded_subblock_flag values and treat them as 1.
[0062] For example, if the decryption omission determination unit 206A1 determines that the total number of decrypted values that are 1 reaches a predetermined threshold, it may omit decryption for all remaining coded_subblock_flag values and consider them all to be 1.
[0063] Figure 5 shows an example of syntax that the decoding omission determination unit 206A1 may determine to omit decoding.
[0064] (Bypass decoding determination unit 206A2) The bypass decoding determination unit 206A2 is configured to determine whether or not to perform bypass arithmetic decoding for some of the coefficients.
[0065] The coefficient-level syntax that the bypass decoding determination unit 206A2 determines to be subject to bypass arithmetic decoding is processed by the bypass arithmetic decoding unit 206A3.
[0066] For example, if the bypass decoding determination unit 206A2 determines that the total number of decoded values in each subblock has reached a predetermined threshold, it may perform bypass arithmetic decoding on all remaining values of sig_coeff_flag.
[0067] For example, if the bypass decoding determination unit 206A2 determines that the total number of decoded values of 1 in each subblock reaches a predetermined threshold, it may perform bypass arithmetic decoding on all remaining sig_coeff_flag.
[0068] For example, if the bypass decoding determination unit 206A2 determines that the total number of decoded values in each subblock has reached a predetermined threshold, it may perform bypass arithmetic decoding on all remaining values of coeff_abs_level_greater1_flag.
[0069] For example, if the bypass decoding determination unit 206A2 determines that the total number of decoded values of 1 in each subblock reaches a predetermined threshold, it may perform bypass arithmetic decoding on all remaining coeff_abs_level_greater1_flag.
[0070] Figure 5 shows an example of coefficients that are subject to bypass arithmetic decoding by the bypass decoding determination unit 206A2.
[0071] (Operation of the displacement decoding unit 206) An example of the operation of the displacement decoding unit 206 will be described below with reference to Figures 6 and 7.
[0072] Firstly, an example of the operation of the displacement decoding unit 206 will be described with reference to Figure 6.
[0073] As shown in Figure 6, in step S101, the arithmetic decoding unit 206B and the multi-leveling unit 206F decode last_sig_coeff_prefix and last_sig_coeff_suffix.
[0074] In step S102, the coefficient level value decoding unit 206F2 determines all coefficients from the position indicated by last_sig_coeff_prefix and last_sig_coeff_suffix onward to be 0.
[0075] In step S103, the arithmetic decoding unit 206B decodes the coded_block_flag.
[0076] In step S104, the coefficient level value decoding unit 206F2 determines whether coded_block_flag is 0 or 1.
[0077] If coded_block_flag=0, this operation proceeds to step S105; if coded_block_flag=1, this operation proceeds to step S109.
[0078] In step S105, the coefficient level value decoding unit 206F2 determines all coefficients in the block currently being processed to be 0.
[0079] In step S106, the coefficient level value decoding unit 206F2 determines whether the block currently being processed is the final block. If yes, this operation ends; if no, this operation proceeds to step S107.
[0080] In step S107, the coefficient level value decoding unit 206F2 proceeds to processing the next block.
[0081] In step S108, the decryption omission determination unit 206A1 determines whether to omit the decryption of coded_block_flag and treat it as 1. If yes, the operation proceeds to step S109; if no, the operation returns to step S103.
[0082] In step S109, the arithmetic decoding unit 206B decodes the coded_subblock_flag.
[0083] In step S110, the coefficient level value decoding unit 206F2 determines whether coded_subblock_flag is 0 or 1. If coded_subblock_flag=0, the operation proceeds to step S111; if coded_subblock_flag=1, the operation proceeds to step S115.
[0084] In step S111, the coefficient level value decoding unit 206F2 determines all coefficients in the currently processed subblock to be 0.
[0085] In step S112, the coefficient level value decoding unit 206F2 determines whether the subblock currently being processed is the final subblock. If yes, the operation proceeds to step S106; if no, the operation proceeds to step S113.
[0086] In step S113, the coefficient level value decoding unit 206F2 proceeds to processing the next subblock.
[0087] In step S114, the decryption omission determination unit 206A1 determines whether to omit the decryption of coded_subblock_flag and treat it as 1. If yes, the operation proceeds to step S115; if no, the operation proceeds to step S109.
[0088] In step S115, the arithmetic decoding unit 206B and the multi-leveling unit 206F perform a determination based on the coefficient unit syntax. Details of this step will be described later with reference to Figure 7.
[0089] In step S116, the coefficient level value decoding unit 206F2 determines whether the coefficient currently being processed is the last one in the subblock. If yes, the operation proceeds to step S112; otherwise, the operation proceeds to step S117.
[0090] Figure 7 shows an example of how the determination is performed using the coefficient unit syntax described above.
[0091] In step S115-01, the bypass decoding determination unit 206A3 determines whether or not to perform bypass arithmetic decoding of sig_coeff_flag. If yes, the operation proceeds to step S115-02; if no, the operation proceeds to step S115-03.
[0092] In step S115-02, the arithmetic decoding unit 206B decodes sig_coeff_flag.
[0093] In step S115-03, the context selection unit 206E selects the context to be used for arithmetic decoding of sig_coeff_flag.
[0094] In step S115-04, the arithmetic decoding unit 206B decodes sig_coeff_flag.
[0095] In step S115-05, the context value update unit 206C updates the context value used for arithmetic decoding of sig_coeff_flag.
[0096] In step S115-06, the coefficient level value decoding unit 206F2 determines whether sig_coeff_flag is 0 or 1. If sig_coeff_flag=0, the operation proceeds to step S115-07; if sig_coeff_flag=1, the operation proceeds to step S115-08.
[0097] In step S115-07, the coefficient level value decoding unit 206F2 determines the coefficient level value to be 0, and this operation ends.
[0098] In step S115-08, the bypass decoding determination unit 206A2 determines whether or not to perform bypass arithmetic decoding of coeff_abs_level_greater1_flag. If yes, the operation proceeds to step S115-09; if no, the operation proceeds to step S115-10.
[0099] In step S115-09, the arithmetic decoding unit 206B decodes coeff_abs_level_greater1_flag.
[0100] In step S115-10, the context selection unit 206E selects the context to be used for decoding coeff_abs_level_greater1_flag.
[0101] In step S115-11, the arithmetic decoding unit 206B decodes coeff_abs_level_greater1_flag.
[0102] In step S115-12, the context value update unit 206C updates the context value used to decode coeff_abs_level_greater1_flag.
[0103] In step S115-13, the coefficient level value decoding unit 206F2 determines whether coeff_abs_level_greater1_flag is 0 or 1. If coeff_abs_level_greater1_flag=0, the operation proceeds to step S115-14; if coeff_abs_level_greater1_flag=1, the operation proceeds to step S115-15.
[0104] In step S115-14, the coefficient level value decoding unit 206F2 determines the coefficient level value to be 1 and proceeds to step S115-16.
[0105] In step S115-15, the arithmetic decoding unit 206B and the multi-leveling unit 206F decode coeff_abs_level_remaining.
[0106] In step S115-16, the arithmetic decoding unit 206B decodes coeff_sign_flag.
[0107] In step S115-17, the coefficient level value decoding unit 206F2 determines whether coeff_sign_flag is 0 or 1. If coeff_sign_flag=0, the operation proceeds to step S115-18; if coeff_sign_flag=1, the operation proceeds to step S115-19.
[0108] In step S115-18, the coefficient level value decoding unit 206F2 determines the coefficient level value to coeff_abs_level_remaining, and this operation ends.
[0109] In step S115-19, the coefficient level value decoding unit determines the coefficient level value to be the negative value of coeff_abs_level_remaining, and this operation ends.
[0110] According to the mesh decoding device 200 of this embodiment, the computational complexity can be reduced by partially omitting the decoding of some syntax and treating it as a predetermined value, or by performing bypass arithmetic decoding for some coefficients.
[0111] The mesh coding device 100 and mesh decoding device 200 described above may be implemented as programs that cause a computer to execute each function (each process). [Industrial applicability]
[0112] Furthermore, according to this embodiment, for example, it is possible to achieve an overall improvement in service quality in video communication, thereby contributing to Goal 9 of the United Nations-led Sustainable Development Goals (SDGs), "Build resilient infrastructure, promote sustainable industrialization and foster innovation." [Explanation of Symbols]
[0113] 1…Mesh processing system 100... Mesh coding device 200... Mesh decoding section 201…Demultiplexer 202...Basic Mesh Decoding Unit 203…Subdivision part 204...Mesh decoding section 205... Patch Integration Department 206...Displacement Decoding Unit 206A1...Decoding omission determination unit 206A2... Bypass Decoding Determination Unit 206A3...Bypass arithmetic decoding unit 206B... Arithmetic Decoding Unit 206C...Context value update section 206D... Context buffer 206E...Context selection section 206F...Multi-level conversion section 206F2... Coefficient level value decoding unit 206G...Interface prediction unit 206H... Frame buffer 206I…Adder 206J…Inverse quantization section 206K...Inverse wavelet transform section 207...Video Decoding Unit
Claims
1. A mesh decoding device, The system includes a displacement decoding unit configured to decode a displacement bitstream, generate a displacement amount, and output it. The displacement amount decoding unit is, A decoding omission determination unit is configured to determine whether to omit decoding of some syntax and treat it as a predetermined value, The arithmetic decoding unit is configured to generate a binarized syntax by performing arithmetic decoding on the displacement bitstream, A multi-leveling unit is configured to generate syntax by multi-leveling the aforementioned binarized syntax, A coefficient level value decoding unit is configured to generate coefficient level values from the syntax generated by the multi-level conversion unit, The inverse quantization unit is configured to generate a conversion coefficient by inverse quantizing the coefficient level value, A mesh decoding device comprising: an inverse wavelet transform unit configured to generate a displacement amount by applying an inverse wavelet transform to the aforementioned transformation coefficients.
2. The arithmetic decoding unit is configured to decode the binarized syntax in subblock units, The multi-leveling unit is configured to generate the syntax in sub-block units, The mesh decoding device according to claim 1, characterized in that the coefficient level value decoding unit is configured to generate the coefficient level value on a subblock basis.
3. The mesh decoding device according to claim 1, characterized in that the decoding omission determination unit is configured to omit decoding for all remaining flags indicating the presence of non-zero coefficients in a block and consider them all to be 1 when the total number of decoded values reaches a predetermined threshold or when the total number of decoded values that are 1 reaches the predetermined threshold.
4. The mesh decoding device according to claim 2, characterized in that the decoding omission determination unit is configured to omit decoding for all remaining flags indicating the presence of non-zero coefficients in a subblock and consider them all to be 1 when the total number of decoded values reaches a predetermined threshold or when the total number of decoded values that are 1 reaches the predetermined threshold.
5. A mesh decoding method, The process includes decoding a displacement bitstream to generate and output the displacement amount. The above process is, A step of determining whether to omit the decoding of some syntax and treat it as a predetermined value, The process involves generating a binarized syntax by performing arithmetic decoding on the displacement bitstream, The process of generating syntax by converting the aforementioned binarized syntax into a multi-level syntax, A step of generating coefficient level values from the generated syntax, The process of generating a transformation coefficient by inverse quantizing the coefficient level value, A mesh decoding method characterized by comprising the step of generating a displacement amount by applying an inverse wavelet transform to the transformation coefficients.
6. A program that makes a computer function as a mesh decoding device, The mesh decoding device includes a displacement decoding unit configured to decode a displacement bitstream, generate a displacement amount, and output it. The displacement amount decoding unit is, A decoding omission determination unit is configured to determine whether to omit decoding of some syntax and treat it as a predetermined value, The arithmetic decoding unit is configured to generate a binarized syntax by performing arithmetic decoding on the displacement bitstream, A multi-leveling unit is configured to generate syntax by multi-leveling the aforementioned binarized syntax, A coefficient level value decoding unit is configured to generate coefficient level values from the syntax generated by the multi-level conversion unit, The inverse quantization unit is configured to generate a conversion coefficient by inverse quantizing the coefficient level value, A program characterized by comprising: an inverse wavelet transform unit configured to generate a displacement amount by applying an inverse wavelet transform to the aforementioned transformation coefficients.