Method for manufacturing ceramic thin-film metallized substrates, method for manufacturing chip-on-submounts, and method for manufacturing semiconductor modules

Abstract

To manufacture a ceramic thin film metalization substrate improved in cost performance.SOLUTION: A method for manufacturing a substrate in which a thin film metalization 4 consists of an adhesive layer, a barrier layer and a surface layer and a ceramic substrate 5 is an aluminum nitride substrate includes the steps of: coating the ceramic substrate with an ultraviolet curable resist 7; performing prebake at a temperature of 60°C or higher to 90°C or lower and for a time of 70 sec or longer to 120 sec or shorter; performing primary exposure with an integrated irradiation amount of 10 mJ / cm2 or more to 50 mJ / cm2 or less; performing inversion bake at a temperature of 110°C or higher to 140°C or lower and for a time of 40 sec or longer to 90 sec or shorter; performing secondary exposure with an integrated irradiation amount of 260 mJ / cm2 or more to 350 mJ / cm2 or less; performing development with a developer; forming the thin film metalization; and peeling the resist with a peeling solution and forming a pattern circuit.SELECTED DRAWING: Figure 5

Description

[Technical Field]

[0001] The embodiments generally include methods for manufacturing ceramic thin-film metallized substrates, and chip-on-substrates. This invention relates to a method for manufacturing a mount and a method for manufacturing a semiconductor module. [Background technology]

[0002] In recent years, laser diodes (LDs) have been used in a wide range of applications, from general lighting LEDs to headlamp technology. iPower LED, a deep ultraviolet LED (germicidal lamp / resin curing lamp) with a strong requirement for high heat dissipation. High-performance optical semiconductor devices capable of emitting light are being developed. Consequently, the demand for ceramic substrates that combine heat dissipation and electrical insulation properties is increasing year by year. Furthermore, as performance increases, the heat generated by optical semiconductor devices also increases, in order to efficiently dissipate heat, Ceramic substrates tend to become smaller and thinner.

[0003] In ceramic substrates, aluminum nitride (AlN) substrates have high heat dissipation properties, and insulating support The component is made of an aluminum nitride sintered body, and has a titanium (Ti) layer and a white coating on the bottom and top surfaces. A package for an optoelectronic semiconductor device in which metal layers are formed by sequentially depositing a gold (Pt) layer and an (Au) layer. A component is disclosed (Patent Document 1). According to Patent Document 1, aluminum nitride sintered The thermal conductivity of the body is 55 to 250 W / m·K, and the heat generated when the optical semiconductor element is in operation is It is dissipated to the outside through the insulating support member and metal substrate. As a result, the thermal conductivity is approximately 20 W / Compared to m·K aluminum oxide sintered bodies, the optoelectronic semiconductor device can be kept at an optimal temperature for a long period of time. It can be driven normally and stably.

[0004] Furthermore, in order to reduce the manufacturing cost of ceramic substrates that combine heat dissipation and electrical insulation properties Large-scale manufacturing is being carried out. Large-scale aluminum nitride substrates are being manufactured in semiconductor One manufacturing method for dividing the body into submounts for laser elements is a method with a thermal conductivity of 200 W / m. A manufacturing method for cutting a 0.5mm thick, 2-inch substrate into 1mm square pieces is disclosed. (Patent Document 2)

[0005] The metal layer formed on these insulating substrates provides insulation between the conductive layer and the area without the metal layer, as needed. Pattern circuits are formed in the area. Pattern circuits are formed using etching and lift-off. A method is disclosed (Patent Document 3). According to Patent Document 3, a thin film material is formed on a substrate. After that, a photoresist material is applied, and primary exposure is performed using ultraviolet light, and the photoresist is A protective film layer resistant to etching is formed, and unwanted parts are selectively removed to complete the pattern cycle. A path can be formed.

[0006] To lower manufacturing costs, it is advantageous to process from larger circuit boards. In contrast, the products that are cut are those that incorporate semiconductor modules, which are becoming smaller and more high-performance, and the products are being cut. The size has decreased and the pattern circuits have become finer (miniature). However, the circuit board As the size increases, the circuit portion consisting of the conductive layer of the divided product and the circuits themselves become insulated from each other. It is necessary to manufacture the non-circuit (board portion) uniformly across the entire board, and the board size before cutting As the size increases, the manufacturing process becomes more difficult.

[0007] One method for forming a circuit pattern on the surface of a ceramic substrate is to apply a resist. The process involves lithography, where a pattern is formed by exposure and then developed. This ensures uniform product manufacturing. To do so, it is necessary to uniformly perform the process from resist coating to development in the lithography process. There is.

[0008] That is, as the substrate becomes larger, the number of products to be cut increases, the working efficiency improves, and the manufacturing cost is reduced. However, differences occur in the resist coated with the pattern between the central part and the peripheral part of the product, and defects due to the resist are likely to occur. Therefore, in order to uniformly form a fine pattern on a large substrate, it has been found that control of the lithography process from resist coating to development is necessary. It has been found.

Prior Art Documents

Patent Documents

[0009]

Patent Document 1

Patent Document 2

Patent Document 3

Summary of the Invention

Problems to be Solved by the Invention

[0010] In recent years, with the development of high-performance light semiconductor devices such as laser diodes and LEDs, the demand for ceramic circuit boards that combine heat dissipation, electrical insulation, and circuit conductivity has been increasing year by year. In particular, with the miniaturization and high-performance of devices, as the heat generation of the devices increases, the high reliability of ceramic circuit boards is required. Therefore, without impairing the high reliability, a ceramic thin film metallized substrate (sub mount) that combines heat dissipation and electrical insulation and forms a conductive circuit is required. There is.

[0011] The embodiment solves these problems, and a large ceramic with a conductive circuit formed on it This technology enables efficient and cost-effective manufacturing of small substrates from thin-film metallized substrates. This invention relates to a method for manufacturing excellent ceramic thin-film metallized substrates. [Means for solving the problem]

[0012] The method for manufacturing a ceramic thin-film metallized substrate according to the embodiment involves a lithography step. In this case, the pre-bake temperature after resist coating is between 60°C and 100°C, and the time is between 70 seconds. The exposure time was less than 120 seconds, and the cumulative primary exposure dose after pre-baking was 10 mJ / cm². 2 Over 50m J / cm 2 The following conditions apply: the temperature of the inversion bake after the primary exposure is between 110°C and 140°C, and the time is... The exposure time was between 40 and 90 seconds, and the integrated secondary exposure dose after inversion baking was 260 mJ / cm². 2 More than 350mJ / cm 2 The following is the process: After secondary exposure and development, thin film metallization is performed. This is a manufacturing method for forming patterned circuits. [Brief explanation of the drawing]

[0013] [Figure 1] A top view showing an example of a ceramic thin-film metallized substrate before cutting according to the embodiment. [Figure 2] A top view showing an example of a ceramic thin-film metallized substrate according to the embodiment. [Figure 3] A side view showing an example of a ceramic thin-film metallized substrate according to the embodiment. [Figure 4] A bottom view showing an example of a ceramic thin-film metallized substrate according to the embodiment. [Figure 5] A cross-sectional view showing an example of the manufacturing process for a patterned circuit on a ceramic thin-film metallized substrate according to the embodiment. [Figure 6]A cross-sectional view showing an example of a chip-on-submount substrate according to an embodiment. [Figure 7] A cross-sectional view showing an example of a semiconductor module according to the embodiment. [Modes for carrying out the invention]

[0014] The following describes the manufacturing method of a ceramic thin-film metallized substrate, with reference to the drawings, and chip-on Details of the manufacturing method for submounts and embodiments of the manufacturing method for semiconductor modules I will explain it to them.

[0015] The pattern circuit provided on the ceramic thin-film metallized substrate according to the embodiment is a ceramic This shows the conductive and insulating parts formed by thin-film metallization on the surface of the mixed substrate, divided by product size. Both the pre-division and post-division versions shall be shown (hereinafter referred to as "pattern circuits"). Also, the pattern Circuit formation refers to the process of creating conductive and insulating parts on the surface of a ceramic substrate by thin-film metallization. This is for forming the pattern, and shows the pattern circuit formed before dividing the ceramic substrate. This shall be done (hereinafter referred to as "pattern circuit formation").

[0016] The method for forming a patterned circuit on a ceramic thin-film metallized substrate according to the embodiment is as follows: In the resist coating process, the pre-baking temperature after resist coating is 60°C to 100°C. Below, the time is between 70 seconds and 120 seconds, and the product of the primary exposure (pattern exposure) after pre-baking. The calculated radiation dose is 10 mJ / cm². 2 More than 50mJ / cm 2 The following applies. Also, the inverted base after the first exposure. The temperature is between 110°C and 140°C, the time is between 40 seconds and 90 seconds, and inverted bake The subsequent secondary exposure (full-surface exposure) integrated radiation dose was 260 mJ / cm². 2 More than 350mJ / cm 2The following The pattern circuit is formed after development following secondary exposure. The embodiments are described below. Method for manufacturing a ceramic thin-film metallized substrate, method for manufacturing a chip-on-submount, Furthermore, the manufacturing method of semiconductor modules will be described in detail.

[0017] Figure 1 shows a top view of an example of a ceramic thin-film metallized substrate before cutting, according to the embodiment. 1 is the ceramic thin film metallized substrate before cutting, and 2 is the ceramic thin film metallized base. Plate 3 is a ceramic thin film metallized substrate after cutting. The rise substrate can be cut (divided) to obtain multiple ceramic thin-film metallized substrates 3. It includes a large ceramic thin film metallized substrate 2. Figure 1 shows the ceramic thin film metallized Although the substrate 3 is roughly rectangular in its plan view, it may also be roughly polygonal in shape.

[0018] Figure 2 shows an example of a top view of the ceramic thin-film metallized substrate 3 according to the embodiment. 4 is Thin film metallization, 5 is a ceramic substrate. Ceramic substrate 5 is aluminum nitride. If it is a substrate, the thermal conductivity must be 160 W / m·K or higher, and even 240 W / m·K or higher. It can be used for thermal conductivity. Other ceramic substrates 5 include aluminum oxide. Examples include beryllium oxide. These ceramic substrates 5 may be single sheets or multiple sheets. It may have a three-dimensional structure, such as a layered structure.

[0019] Figure 3 is a side view of the ceramic thin film metallized substrate shown in Figure 2. 6 is thin film metallization. Figure 4 is a bottom view of the thin-film metallized substrate shown in Figure 2. In Figure 4, the bottom view of the ceramic substrate is shown. Although thin film metallization is formed on the entire surface, circuits may be formed on it in the same way as on the top surface, or thin film It is acceptable if there is no metallization and the ceramic substrate is in its original state. A thin film metallization is formed on the bottom surface. In such cases, the heat sink is joined by brazing or soldering, and a thin film metallization is formed. If not already attached, the heatsink will be bonded to it using an adhesive such as resin.

[0020] Figure 5 shows one of the manufacturing steps for a patterned circuit on a ceramic thin-film metallized substrate according to the embodiment. This is a cross-sectional view illustrating an example. (A) is a cross-sectional view of the ceramic substrate 5 before processing. (B) is (C) shows the ceramic substrate 5 with the resist 7 applied to its surface. Primary exposure is performed on the ceramic substrate 5 via a mask 8, and the masked area is exposed by the primary exposure. This shows the state where ultraviolet light has been irradiated onto the resist 9 in the area that is not exposed. (D) is exposed after primary exposure. The resist 9 is shown in the state after being exposed to light on the ceramic substrate. Inverted baking was performed after this. A secondary exposure is performed later. (E) is the resist exposed by etching the resist surface. 9 is formed on the surface of the ceramic substrate 5. (F) is the exposed resist 9 and (G) shows the state in which a thin metallized film 10 has been deposited on the surface of the ceramic substrate 5. By removing (lifting off) the resist 9, a thin film is formed on the surface of the ceramic substrate 5. This is the state in which Talize 4 has been formed.

[0021] The process for manufacturing ceramic thin-film metallized substrates involves a lithography process, where Regarding pre-baking after applying resist to the Lamix substrate, the temperature should be between 60°C and 100°C. Below, the time is between 70 and 120 seconds. The purpose of pre-baking is to uniformly dry the resist. However, if the temperature drops below 60°C and the time is shorter than 70 seconds, the resist will Liquid or semi-dry areas occur, and pattern exposure by primary exposure cannot be achieved. This and conversely, when the temperature is higher than 100°C and the time exceeds 120 seconds, the resist undergoes excessive thermal cross-linking bridging points, and similarly, pattern exposure becomes impossible. Furthermore, the pre-bake temperature is preferably 70°C or higher and 90°C or lower, and the time is preferably 80 seconds or longer and 110 seconds or shorter.

[0022] Regarding the primary exposure after pre-bake, the integrated exposure dose is 10 mJ / cm 2 or more and 50 mJ / cm 2 or less. The purpose of the primary exposure is to expose the resist through a mask and cause the resist in the exposed part to undergo a change in quality, thereby exposing the pattern shape onto the ceramic substrate by photosensitivity. If the integrated exposure dose is less than 10 mJ / cm , there will be areas where the pattern shape cannot be sufficiently exposed. 2 Conversely, if the integrated exposure dose is greater than 50 mJ / cm , the exposure will progress to the inside of the mask, 2 resulting in areas where the pattern accuracy deteriorates. Furthermore, the integrated exposure dose of the primary exposure after pre-bake is preferably 20 mJ / cm or more and 40 mJ / cm 2 or less. 2 <>

[0023] Regarding the post-primary-exposure reversal bake, the temperature is in the range of 110°C or higher and 140°C or lower, and the time is 40 seconds or longer and 90 seconds or shorter. In the reversal bake, the resist that has been exposed more than in the primary exposure is preferentially cross-linked (cross-linking). If the temperature is lower than 110°C and the time is shorter than <><000040> seconds, the cross-linking will not progress, and areas with non-uniform arbitrary pattern shapes and accuracies will occur. Conversely, if the temperature is higher than 140°C and the time exceeds 90 seconds, the cross-linking will progress to the unexposed parts, resulting in areas where the cross-linking progresses to the unexposed parts, and areas with non-uniform arbitrary pattern shapes and accuracies will occur. Conversely, if the temperature is higher than 140°C and the time exceeds 90 seconds, the cross-linking will progress to the unexposed parts, Furthermore, this results in areas where the pattern shape and precision are not uniform. The temperature should preferably be between 120°C and 130°C, and the time between 50 seconds and 80 seconds.

[0024] For the secondary exposure after inversion baking, the integrated irradiation dose was 260 mJ / cm². 2 More than 350mJ / cm 2 The purpose of secondary exposure is to reverse bake the parts that were not crosslinked after primary exposure. This is because it is photosensitive. The cumulative irradiation dose is 260 mJ / cm². 2 When it is smaller, when it is developed in the post-processing stage... There is a possibility that some areas of the resist may not be removed. The cumulative irradiation dose is 350 mJ / cm². 2 This is because if it is larger than this, crosslinking will progress and the pattern accuracy will deteriorate. Furthermore, inverted baking The cumulative irradiation dose from the subsequent secondary exposure was 270 mJ / cm². 2 More than 340mJ / cm 2 The following is preferred It's nice.

[0025] After the second exposure, development is performed, leaving the exposed areas of the photosensitive resist on the ceramic substrate. (E) The ceramic substrate with the resist exposure area remaining is ashing and then the surface A thin-film metallized film is formed (F). Methods for forming the thin-film metallized film include vapor deposition and sputtering. There are laws and regulations. The metal that forms the thin film metallization consists of, for example, three layers: an adhesion layer, a barrier layer, and a surface layer. This includes layered structures. The adhesion layer is formed to bond metal to the surface of the ceramic substrate. The adhesive layer is made of materials such as titanium (Ti). The barrier layer is located between the adhesion layer and the surface layer and interacts with each other. A metal layer formed to prevent the diffusion of metals, such as platinum (Pt) and palladium (Pd). These are some examples. The surface layer is a metal layer formed to bond with other parts, and is made of gold (Au). Examples include nickel (Ni) and copper (Cu). The resist is removed after thin film metallization. (G) The pattern circuit of the thin film metallization is formed by (lift-off).

[0026] When performing thin-film metallization on the back surface of a patterned circuit, ashing is performed in the same manner as on the front surface. Later, a thin film metallization is formed. If a bonding layer is to be formed on the surface of the thin film metallization, solder A bonding layer is formed by the following: The bonding layer can be, for example, gold-tin (Au-Sn) solder. These thin-film metallized and bonded layers form pattern circuits, which are then cut to the size of the product. To cut (divide). Cutting is done using a dicer or similar tool. Such ceramic thin film metal The substrate 3 is characterized by having semiconductor elements mounted via a junction layer. It is suitable for 11.

[0027] Figure 6 shows an example of a chip-on-submount embodiment. In Figure 6, 5 is a ceramic base. The plate, 6 is thin-film metallization, 12 is solder, and 13 is a semiconductor device. The submount 11 is mounted on the heatsink via a bonding layer. This semiconductor module 14 is characterized by the above.

[0028] Figure 7 shows an example of a semiconductor module (semiconductor device) according to the embodiment. In Figure 7, 15 is Wire bonding, 16 semi-bonds chip-on submount and heatsink. The bonding layer, such as the rice paddy, is 17, which is the lead frame. 18 is the heat sink.

[0029] In Figure 7, the chip-on submount 11 is placed on the heatsink 18 via a bonding layer 16. They are bonded. The semiconductor element 13 and the thin film metallized 4 are electrically connected by wire bonding 15. In addition to the semiconductor element 13, thin film metallization 6 is performed by wire bonding 15. The lead frame 17 is joined. The wire bonding 15 and the lead frame 17 are joined. The semiconductor module is connected to the chip-on-submount 11 by the composite layer 16 and the heatsink 18. It is set to Joule 14. The semiconductor module 14 is not limited to this structure. No. For example, either wire bonding 15 or lead frame 17 is not available. It is also acceptable to include the semiconductor element 13, wire bonding 15 and lead frame 17. Multiple units may be provided on each semiconductor module 14.

[0030] Furthermore, the bonding layers 12 and 16 that bond the semiconductor element 13 and the heat sink 18 are Examples include solder and brazing materials. Lead-free solder is preferred. Also, the solder should have a melting point of 4 This refers to materials with a melting point of 50°C or lower. For brazing materials, this refers to materials with a melting point exceeding 450°C. Also, materials with a melting point of 5 Materials with a temperature of 0°C or higher are called high-temperature brazing materials. Examples of high-temperature brazing materials include those with silver (Ag) as the main component. It can be done.

[0031] While semiconductor elements 13 are becoming smaller, the amount of heat generated from the chip is steadily increasing. Therefore, in the ceramic thin-film metallized substrate 3 on which the semiconductor element 13 is mounted, Improving thermal performance is becoming important. Also, in order to improve the performance of the semiconductor module 14, semiconductor Multiple semiconductor elements 13 are mounted within the body module 14. 3. If even one element exceeds its intrinsic temperature, the resistance changes to a negative temperature coefficient. It transforms into this. As a result, a thermal runaway occurs due to the concentrated flow of electricity, instantly destroying it. This phenomenon occurs. Therefore, improving heat dissipation is effective. Also, semiconductor modules The Ru14 includes laser diodes, as well as general lighting LEDs and high-power LEDs for headlamps. - LEDs, and deep ultraviolet LEDs (germicidal lamps, resin curing lamps) which have a strong requirement for high heat dissipation. It can be used in semiconductor modules. Lasers and LEDs are becoming more powerful, and semiconductor modules Improving the reliability of 14 directly leads to improved reliability of laser devices and LED lighting. Garu.

[0032] Next, among the ceramic thin-film metallized substrates 3 according to the embodiment, the aluminum nitride substrate This document describes a method for forming patterned circuits using thin-film metallization of an aluminum nitride substrate. As long as the turn circuit formation has the aforementioned configuration, the manufacturing method is not particularly limited. However, the following methods can be used to obtain a good yield.

[0033] First, an aluminum nitride substrate is prepared. In particular, considering the overall heat dissipation of the ceramic thin-film metallized substrate 3 produced from the aluminum nitride substrate, it is preferable that the thermal conductivity of the aluminum nitride substrate be 170 W / m·K or higher. Also, when electrical conductivity is required between the thin-film metallized side where the pattern circuit is formed and the thin-film metallized side on the opposite side, an aluminum nitride substrate with through holes or via holes is prepared. If through holes are to be provided in the aluminum nitride substrate, they may be provided in advance at the molding stage. Alternatively, a process for providing through holes in the aluminum nitride substrate may be performed. The process for providing through holes may involve laser processing, Drills, etc. This is done by machining, etc.

[0034] Apply resist 7 to the aluminum nitride substrate. Use a coater or similar tool for application. Examples of resists include phenolic resin-based photoresists. Next, the resist is coated. The aluminum nitride substrate is pre-baked. Pre-baking can be done using a dedicated heating device. Also, if the coater has a baking function, you can pre-bake it as is. 1. Heat at the specified temperature and time, then cool.

[0035] Next, the pre-baked aluminum nitride substrate is placed in the exposure apparatus and primary exposure is performed. Primary exposure involves irradiating the mask with ultraviolet light or the like through a mask 8 that has a pattern formed on it. The unexposed areas are exposed. Next, the aluminum nitride substrate that underwent primary exposure is inverted. Perform the inverted bake. Inverted baking can be done using a dedicated heating device or the heating device of the coater. You may do so. The inverted bake is performed by holding the product at the specified heating temperature and time, and then allowing it to cool.

[0036] Next, the inverted baked aluminum nitride substrate is placed in the exposure apparatus and a secondary exposure is performed. Secondary exposure is performed on the entire substrate without using mask 8. Next, the exposed area is developed. Remove resist 7 other than resist 9. Aluminum nitride substrate with exposed resist 9. Thin film metallization 10 is performed. Thin film metallization can be performed by evaporation, sputtering, etc. The exposed resist 9 is peeled off (lift-off) from the aluminum nitride substrate that underwent tarizing 10. ) and a pattern circuit is formed by thin-film metallization 4.

[0037] When forming a bonding layer 12, such as solder, on the surface of a thin-film metallized surface by lithography, the process is the same as when forming the thin film: resist coating, exposure, development, solder deposition, and peeling (lift-off). Examples of solder include Au-Sn and Au-Si (silicon). In addition to forming the bonding layer by lithography, plating can be applied to the entire surface to improve bonding properties. to doThis is also possible. Examples of plating include nickel (Ni) and palladium (Pd)-based Au plating.

[0038] Next, the aluminum nitride substrate is cut to the product size. A pattern circuit is then formed. The aluminum nitride substrate is cut into the product shape. The cutting is done with a dicer (dicing saw). This is done by [method]. Next, a process of joining semiconductor elements 13 and the like is performed. Semiconductor elements 13 A joining layer is provided at the point where the parts are joined. Solder or brazing material is preferred for the joining layer. Then, a semiconductor element 13 is placed on top of it.

[0039] Next, the aluminum nitride substrate to which the semiconductor elements 13 are bonded is transformed into a semiconductor module. Joining process The following steps are taken: The semiconductor element 13 is bonded to the heat sink 18 via a bonding layer. Additionally, if necessary, the pattern circuit formed by the thin film metallization 4 and the lead frame 17 are bonded by wire bonding 15. Furthermore, the semiconductor element 13 and the pattern circuit formed by the thin film metallization 4 are bonded by wire bonding 15. The semiconductor element 13, lead frame 17, and wire bonding 15 are provided in the required number.

[0040] In the above case, a thin film metallized 6 is formed on the back surface of the pattern circuit of the aluminum nitride substrate. It is described as being manufactured by joining it to the heat sink 18 via a bonding layer such as solder in that state. As I have explained, this is not limited to that case. For example, a thin film metal on the back of a pattern circuit. If there is no rise 6 and it is in the state of an aluminum nitride substrate, then adhesive to heatsink 18 You can join them anywhere.

[0041] (Examples 1-9, Comparative Examples 1-8) The ceramic thin-film metallized substrate has a diameter of 100 mm and a thickness of 0.32 mm, and is made of nitride A luminium substrate (thermal conductivity 200 W / m·K) was prepared. Spin was applied to the aluminum nitride substrate. Using a coating machine, the rotation speed and time were 10 seconds at 200 rpm and 1 second at 1000 rpm. Under the conditions of 5 seconds, 15 seconds at 2000 rpm, and 2 seconds at 200 rpm, 3 cm 3 Drop the resist By doing so, an ultraviolet-curable resist was applied to the entire surface of the substrate.

[0042] After applying the resist, pre-baking was performed using a spin coater at the temperature and time shown in Table 1. Next, as shown in Figures 1 and 2, the product size after cutting is 0.9 mm × 0.9 mm, A circuit pattern with two conductive sections measuring 0.6mm x 0.3mm spaced 0.1mm apart. A glass mask formed to 100 mm was prepared. Exposure machine (parallel light mask aligner) -) The aluminum nitride substrate and glass mask were set up and the exposure operation was performed under the conditions shown in Table 1. Next, the aluminum nitride substrate is placed in the spin coater and inverted baked under the conditions shown in Table 1. Next, the aluminum nitride substrate was set in the exposure machine and secondary exposure was performed under the conditions shown in Table 1. .

[0043] [Table 1]

[0044] As can be seen from Table 1, in Examples 1-9, the pre-bake temperature, pre-bake time, and primary exposure were different. The values ​​for cumulative irradiation dose, inversion bake temperature, inversion bake time, and secondary exposure cumulative irradiation dose are within a preferred range. The values ​​were within the range. On the other hand, in Comparative Examples 1 to 8, those values ​​fell outside the preferred range.

[0045] Next, after secondary exposure, the aluminum nitride substrate is placed in a solvent-resistant cassette and developed in a constant temperature bath. The film was developed by agitating in the solution at 25°C for 150 seconds. The developer was tetramethylammonium hydride. A lithography developer was used, which consisted of roxide and a nonionic surfactant. After washing the aluminum nitride substrate with pure water, dry it in a spin dryer at 3000 rpm for 3 minutes. It was dried by rotating it.

[0046] Next, the aluminum nitride substrate was ashing using an ashing apparatus. This was performed for 1 minute using an RF power of 400W. Next, titanium (Ti) was deposited using an electron beam deposition system. Aluminum nitride groups in the following order: 0.1 μm, platinum (Pt) 0.2 μm, gold (Au) 0.3 μm. Three layers of metal were deposited onto the plate. Next, the aluminum nitride substrate was placed in a solvent-resistant cassette. The resist was removed by agitating it in a resist stripping solution in a constant temperature bath at 50°C for 45 minutes. The stripping solution used was an N-methyl-2-pyrrolidone-based alkaline resist stripping solution. The delaminated aluminum nitride substrate was washed in pure water. Next, the aluminum nitride substrate was dies It was cut by Sir.

[0047] The pattern shape and peeling condition of products cut with a dicing machine were examined using a stereomicroscope. We have confirmed that the product shape does not meet the dimensional standards due to irregularities occurring at the edges of the pattern. Product shape with peeling defects due to poor turn accuracy and pattern circuit formation. It was counted as a defect due to peeling.

[0048] Furthermore, the aluminum nitride thin film metallized substrate 100 after cutting according to the examples and comparative examples. For each individual, the semiconductor element, the laser diode, is soldered to one location on the circuit pattern using Au-Sn solder. The chip-on submount was manufactured by bonding the component elements.

[0049] The heatsink portion of the copper stem component, which has a heatsink section and two lead terminal sections. The chip-on submount was soldered in place. Next, the laser diode element was placed on the pattern. The wires and lead terminals were joined by wire bonding. Next, the window cap was attached. Together, we fabricated semiconductor modules for laser devices.

[0050] The semiconductor module underwent a high-temperature continuous energization test at 100°C for 200 hours. We confirmed the laser characteristics of the module. After 200 hours, we examined the module whose laser characteristics had deteriorated. We investigated the causes. The module had two types of defects: poor electrical connection and thermal runaway. A power supply failure is a defect where a semiconductor is damaged due to an electrical short circuit between pattern circuits. Yes, it happens. Thermal runaway failure occurs when the heat generated by the semiconductor is not sufficiently transferred to the substrate, causing the semiconductor to be damaged. This is a defect that reduces performance. These two defects were counted as module defects. .

[0051] Table 2 shows the substrate defect rate and module defect rate for the examples and comparative examples.

[0052] [Table 2]

[0053] As can be seen from the substrate defects in Table 2, the aluminum nitride thin film metallized substrate in the example is Pattern accuracy defects occurred or the defect rate was low. Pre-baking ensured the resist was suitable. This is precisely because it was dry, and the primary exposure allowed for exposure in the pattern shape. , the photosensitive resist was preferentially crosslinked by inverted baking, and by secondary exposure This is because the areas that were not crosslinked were properly exposed through inversion baking.

[0054] In contrast, the comparative example showed many instances of poor pattern accuracy. The pattern may appear as the material is not sufficiently dry, or if the resist is strong, it may undergo thermal crosslinking. This is because the lighting was not properly controlled. If the primary exposure conditions are weak, the pattern will not be sufficiently exposed. Because it is not possible, and if the exposure is strong, the exposure will progress to the inside of the mask, thus creating a predetermined pattern shape. This was because the precision could not be adequately controlled. If the inversion bake conditions are weak, bridging will progress. First, if the exposure is strong, the crosslinking will progress even to the unexposed areas, resulting in a predetermined pattern shape and precision. This is because it cannot be adequately controlled. If the secondary exposure conditions are weak, the resist will be affected during development. Because it is difficult to remove and crosslinking progresses if the crosslinking is strong, it is not sufficient for the specified pattern shape and precision. Because it is uncontrollable.

[0055] Furthermore, as can be seen from the substrate defects in Table 2, the aluminum nitride thin film metallization according to the example The circuit board had no peeling defects or a low defect rate. Pre-baking ensured the resist was properly applied. This is precisely because it dried out, and the exposed areas were properly altered by the primary exposure. , the photosensitive resist was preferentially crosslinked by inverted baking, and by secondary exposure Inverted baking ensures that areas that are not crosslinked are properly exposed, and the exposed areas are appropriately altered. It is.

[0056] In contrast, the comparative example showed many instances of peeling defects, especially when the pre-baking conditions were weak. Because the drying state is insufficient, the resist cannot be properly exposed to light in subsequent processes, resulting in lift-off. This is because the material is more prone to peeling over time.

[0057] Furthermore, as can be seen from the module defects in Table 2, the aluminum nitride thin film meta in the example... No conductivity failures occurred in the rise substrate. The process from pre-baking to secondary exposure was appropriate. Because of this, the occurrence of pattern accuracy defects was small, the distance between patterns was ensured, and the insulation state was appropriate. This is precisely because it was preserved.

[0058] In contrast, the comparative example resulted in poor conductivity. This was due to poor pattern accuracy. This can be cited as an example. In addition, even if the pattern dimensions are within tolerance, irregularities may occur in the pattern shape. Current leaks from the protruding parts, and the resist layer does not adequately bridge the insulation between patterns. Possible causes include the penetration of some of the thin-film metallization.

[0059] Furthermore, as can be seen from the module defects in Table 2, the aluminum nitride thin film meta in the example... The RISE substrate did not experience any thermal runaway failures. The process from pre-baking to secondary exposure was appropriate. Due to the conditions, the semiconductor elements, solder, thin-film metallization, and aluminum nitride substrates performed well. This was because heat could be dissipated, and the heat generated by the semiconductor elements did not affect its operation.

[0060] In contrast, thermal runaway failure occurred in the comparative example. Upon observation of the defective substrate, semiconductor elements and No abnormalities were observed in the solder junction layer between the thin film metallization layers, but the thin film metallization and nitrogen Vacuum was observed between the aluminum substrates. The thermal runaway failure occurred due to the vacancies that were created. The cause was insufficient heat dissipation. The cause of this void formation was the pre-baking conditions. The resist is weak and does not dry sufficiently, remaining on the aluminum nitride substrate, causing thin-film metallization and nitrogen This was because it inhibited bonding with the aluminum substrate.

[0061] Although several embodiments of the present invention have been illustrated above, these embodiments are presented as examples only. These are novel embodiments and are not intended to limit the scope of the invention. It can be implemented in various other forms, without departing from the spirit of the invention, Various omissions, substitutions, and modifications are possible. These embodiments and their variations are: The scope and gist of the invention, as well as the scope of the invention and its equivalents described in the claims, are included. It is included in the enclosure. Furthermore, each of the embodiments described above can be implemented in combination with one another. [Explanation of Symbols]

[0062] 1…Ceramic thin film metallized substrate before cutting 2…Ceramic thin-film metallized substrate 3…Ceramic thin film metallized substrate after cutting 4, 6…Thin film metallization (pattern circuit) 5…Ceramic substrate 7…Resist 8… Mask 9... Exposed resist 10…Thin film metallization 11…Chip-on-submount 12, 16...Joining layer 13…Semiconductor elements 14…Semiconductor Modules 15…Wire bonding 17… Lead frame 18… Heatsink

Claims

1. In a method for manufacturing a ceramic thin-film metallized substrate in which a pattern circuit having conductive portions and insulating portions is formed on a ceramic substrate by thin-film metallization, The ceramic substrate is an aluminum nitride substrate, The aforementioned thin film metallization is formed from an adhesion layer, a barrier layer, and a surface layer. The process involves applying an ultraviolet-curable resist to a ceramic substrate, A pre-baking process is performed at a temperature of 60°C to 90°C for a duration of 70 seconds to 120 seconds. Cumulative irradiation dose: 10 mJ / cm² ２ More than 50mJ / cm ２ The following steps involve performing primary exposure, A process of performing inversion baking at a temperature of 110°C to 140°C for a time of 40 seconds to 90 seconds, The cumulative irradiation dose was 260 mJ / cm². ２ More than 350mJ / cm ２ The following steps involve performing secondary exposure, The process of developing with a developing solution, The process of forming the thin film metallization, A process of removing the resist with a stripping solution to form a patterned circuit, A method for manufacturing a ceramic thin-film metallized substrate, characterized by comprising the following:

2. The method for manufacturing a ceramic thin film metallized substrate according to claim 1, characterized in that the aluminum nitride substrate in the method for manufacturing the ceramic thin film metallized substrate has a diameter of 100 mm or more and a thermal conductivity of 160 W / m·K or more.

3. The method for manufacturing a ceramic thin film metallized substrate according to claim 1 or 2, characterized in that the thin film metallization in the method for manufacturing the ceramic thin film metallized substrate is a laminated film in which the adhesion layer is titanium, the barrier layer is platinum, and the surface layer is gold.

4. The method for manufacturing a ceramic thin film metallized substrate according to claim 1 or 2, characterized in that the developer in the method for manufacturing the ceramic thin film metallized substrate is a developer obtained by adding a nonionic surfactant to tetramethylammonium hydroxide.

5. A method for manufacturing a chip-on-submount having a bonding layer in a pattern circuit of a ceramic thin-film metallized substrate, characterized in that the method involves forming a bonding layer on a ceramic thin-film metallized substrate obtained by the manufacturing method described in any one of claims 1 to 3.

6. The method for manufacturing a chip-on-submount according to claim 5, characterized in that the bonding layer in the method for manufacturing a chip-on-submount is gold-tin solder.

7. A method for manufacturing a semiconductor module in which a semiconductor element is mounted on a chip-on-submount, characterized in that the step of mounting a semiconductor element on a chip-on-submount obtained by the manufacturing method described in claim 5 or claim 6 is performed.

Images