Method for manufacturing a semiconductor device and a semiconductor device.
The semiconductor device manufacturing method employs a mask shape defined by S(x) = Smax - (Smax - Smin) * (x/XN) 1/2 to reduce the termination region width and suppress electric field concentration, improving device reliability and performance.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- MINEBEA POWER SEMICON DEVICE INC
- Filing Date
- 2022-06-17
- Publication Date
- 2026-07-01
AI Technical Summary
Existing semiconductor device manufacturing methods fail to effectively reduce the width of the termination region and suppress electric field concentration in the termination region, as the shape of the implantation mask defined in prior art does not adequately address these requirements.
A method for manufacturing a semiconductor device where the mask for forming the second semiconductor region is designed with a specific shape, defined by the equation S(x) = Smax - (Smax - Smin) * (x/XN) 1/2, ensuring the depletion layer continuity and reducing the width of the termination region while suppressing electric field concentration.
This approach allows for a reduction in the width of the termination region and minimizes electric field concentration, enhancing the reliability and performance of the semiconductor device under voltage application.
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Abstract
Description
Technical Field
[0001] The present invention relates to a method for manufacturing a semiconductor device and a semiconductor device.
Background Art
[0002] In recent years, price competition has intensified in the field of power semiconductor devices, and cost reduction is required. To reduce costs, it is necessary to increase the diameter of wafers, lower the process temperature, and miniaturize chips. For this purpose, it is necessary to make the junction in the termination region shallower, reduce the width of the termination region, and suppress electric field concentration in the termination region.
[0003] As the structure of the termination region, for example, in Patent Document 1, a termination structure (32) provided on the outer peripheral portion of a semiconductor element includes an N-type drift region formed in a semiconductor substrate (30) (1) and a P-type impurity region (2) formed on the upper surface portion in the N-type drift region (1). The P-type impurity region (2) has, when viewed macroscopically, a P-type impurity concentration that decreases from the inner peripheral portion to the outer peripheral portion of the termination structure (32). The P-type impurity region (2) is, when viewed microscopically, composed of a plurality of P-type high-concentration regions (2b) and low-concentration regions (2a) surrounding them, and has a portion where the low-concentration regions (2a) are separated from each other (abstract, FIG. 2).
[0004] Also, Patent Document 1 describes that the aperture ratio of an implantation mask (20) used in ion implantation for forming such a P-type impurity region (2) is decreased toward the outside of the termination structure (32) (paragraph 0042). Examples of functions for decreasing the aperture ratio include a linear function, etc., but a function with a high decreasing rate such as an exponential function is desirable. For example, when using an exponential function that is convex downward or a function that decreases according to a polynomial when viewed macroscopically, it is described that local concentration of the electric field can be alleviated (paragraph 0043).
Prior Art Documents
Patent Documents
[0005] [Patent Document 1] International Publication No. 2014 / 054319 [Overview of the project] [Problems that the invention aims to solve]
[0006] However, Patent Document 1 states that the function for reducing the aperture ratio of the injection mask (20) is a linear function, a downward-convex exponential function (a x Although a function that decreases according to a polynomial is described, the inventors of this application have found through simulations that the shape of the mask required to reduce the width of the termination region and suppress electric field concentration in the termination region is not the shape defined by the function described in Patent Document 1, but rather a different shape is preferable.
[0007] The problem that the present invention aims to solve is to provide a method for manufacturing a semiconductor device and a semiconductor device that can reduce the width of the termination region and suppress electric field concentration in the termination region. [Means for solving the problem]
[0008] To solve the above problems, the present invention provides a method for manufacturing a semiconductor device, for example, a method for manufacturing a semiconductor device having a termination region in which a plurality of well regions having a second conductivity type are formed on the surface of a first semiconductor region having a first conductivity type around an active region, wherein the mask for forming the second semiconductor region is a reference window, where the depletion layer extending into the first semiconductor region in a thermal equilibrium state is continuous with the active region and the injection window corresponding to the second semiconductor region formed at the position furthest from the active region is a reference window, the position of the reference window on the active region side is X0, the distance between the position of the injection window adjacent to the active region on the active region side and X0 is XN, the distance between the reference window and the injection window one active region side is Smax, the distance between the end of the active region and the injection window adjacent to the active region is Smin, and the distance from X0 is x, then the distance S(x) between the injection window at the distance x and the injection window one active region side is S(x) = Smax - (Smax - Smin) * (x / XN) 1 / 2 The method is characterized by forming the second semiconductor region by implanting impurities of the second conductivity type using a mask that is approximately equal to a value defined by .
[0009] Furthermore, the semiconductor device of the present invention is characterized in that, for example, a semiconductor device having an active region and a termination region formed around the active region, the second semiconductor region formed using the semiconductor device manufacturing method described above is located in the termination region. [Effects of the Invention]
[0010] According to the present invention, it is possible to realize a method for manufacturing a semiconductor device and a semiconductor device that can reduce the width of the termination region and suppress electric field concentration in the termination region. [Brief explanation of the drawing]
[0011] [Figure 1]Cross-sectional view of the semiconductor device of Example 1. [Figure 2] Planar view explaining the shape of the mask of Example 1. [Figure 3] Figure explaining the distance between the implantation window of the mask of Example 1 and the implantation window on one active region side, and the width of the implantation window. [Figure 4] Figure explaining the dose profile of Example 1. [Figure 5] Figure explaining the dose profile of Example 2. [Figure 6] Figure explaining the distance between the implantation window of the mask of Example 3 and the implantation window on one active region side, and the width of the implantation window. [Figure 7] Figure explaining the distance between the implantation window of the mask of Example 4 and the implantation window on one active region side, and the width of the implantation window. [Figure 8] Figure explaining the effect of the present invention. [Figure 9] Figure explaining the effect of the present invention.
Mode for Carrying Out the Invention
[0012] Hereinafter, embodiments of the present invention will be described with reference to the drawings. In each figure and each embodiment, the same or similar components are denoted by the same reference numerals, and duplicate explanations are omitted.
Embodiment
[0013] FIG. 1 is a cross-sectional view of the semiconductor device of Example 1.
[0014] The semiconductor device 10 of Example 1 has a termination region 12 in which a plurality of well regions (second semiconductor regions 2) having a second conductivity type (for example, p-type) are formed on the surface of a first semiconductor region 1 having a first conductivity type (for example, n-type) around an active region 11. Here, the first conductivity type is described as n-type and the second conductivity type is described as p-type, but the first conductivity type may be p-type and the second conductivity type may be n-type.
[0015] In the active region 11, semiconductor elements such as, for example, an IGBT (Insulated Gate Bipolar Transistor), a MOSFET (Metal Oxide Semiconductor Field Effect Transistor), and a diode are formed, but illustration thereof is omitted. As the semiconductor substrate on which the semiconductor device 10 is formed, Si, SiC, or the like can be used, but it is not limited thereto.
[0016] In the active region 11, a first semiconductor region 1 and a second semiconductor region 2 are also formed. Here, the second semiconductor region 2 in the active region 11 is referred to as the second semiconductor region 2a.
[0017] Further, the semiconductor device 10 includes an oxide film 4 formed to cover the first semiconductor region 1 or the second semiconductor region 2, an electrode 5 formed in the active region 11, and a channel stopper 6 formed in the termination region and having a high concentration of a first conductivity type. The electrode 5 is, for example, a gate electrode or an emitter electrode in the case of an IGBT, a gate electrode or a source electrode in the case of a MOSFET, and an anode electrode in the case of a diode. Note that in FIG. 1, only the front surface side of the semiconductor device 10 is illustrated, and illustration of the back surface side is omitted. On the back surface side of the semiconductor device 10, electrodes not illustrated, for example, a collector electrode in the case of an IGBT, a drain electrode in the case of a MOSFET, and a cathode electrode in the case of a diode are provided.
[0018] In the semiconductor device 10 of Example 1, in a thermal equilibrium state, the depletion layer 3 extending into the first semiconductor region 1 is continuous from the active region 11 to each second semiconductor region 2, and each second semiconductor region 2 is substantially a intrinsic region. One of the features is that the depletion (reduction of the intrinsic region) of each second semiconductor region 2 due to application of a voltage starts from the second semiconductor region 2 on the outer peripheral side (the side far from the active region 11).
[0019] In the second semiconductor region 2 of the termination region 12, on the side closer to the active region 11, multiple second semiconductor regions 2 overlap to form a single well region, and are continuous with the second semiconductor region 2a of the active region 11. On the side further from the active region 11, the second semiconductor regions 2 of the termination region 12 form well regions that are separated from each other.
[0020] Here, in a state of thermal equilibrium, the depletion layer 3 extending across the first semiconductor region 1 is formed at the position furthest from the active region 11 among the second semiconductor regions 2 that are continuous with the active region 11. This second semiconductor region 2 is referred to as the outermost second semiconductor region 2b to which the depletion layer 3 is continuous.
[0021] Figure 2 is a plan view illustrating the shape of the mask in Example 1. Figure 3 is a diagram illustrating the distance between the injection window of the mask in Example 1 and the injection window on the active region side, and the width of the injection window. In Figure 3, the horizontal axis represents the position POS, the left vertical axis represents the distance S (corresponding to the width of the shielding portion 21) between the injection window 22 of the mask 20 and the injection window 22 on the active region 11 side, and the right vertical axis represents the width W of the injection window 22.
[0022] Using the mask 20 shown in Figure 2, a second conductivity type impurity is injected to form a second semiconductor region 2. The mask 20 has a shielding portion 21 that shields the impurity and an injection window 22 which is an opening that allows the impurity to pass through. Due to the diffusion of the injected impurity, the size of the second semiconductor region 2 is larger than the size of the injection window 22.
[0023] Here, among the injection windows 22, the injection window 22 corresponding to the second semiconductor region 2a of the active region 11 will be called the active region injection window 22a, and the injection window 22 corresponding to the outermost second semiconductor region 2b where the depletion layer 3 is continuous will be called the reference window 22b.
[0024] The shape of the mask 20 in Example 1 is such that, when the position of the reference window 22b on the active region 11 side is X0, the distance between the position of the injection window 22 adjacent to the active region 11 on the active region 11 side and X0 is XN, the distance between the reference window 22b and the injection window 22 on the one active region 11 side is Smax, the distance between the end of the active region 11 and the injection window 22 adjacent to the active region 11 is Smin, and the distance from X0 is x, the shape of the mask 20 is such that the distance S(x) between the injection window 22 and the injection window 22 on the one active region 11 side at a distance x is approximately equal to the value defined by the following equation (1).
[0025] S(x) = Smax - (Smax - Smin) * (x / XN) 1 / 2 ...(1) This makes it possible to reduce the width of the termination region 12 and suppress electric field concentration in the termination region. Details of this effect will be described later.
[0026] Furthermore, the shape of the mask 20 in Example 1 is such that the width W(x) of the injection window 22 at a distance x decreases as it moves away from the active region 11.
[0027] This allows the width of the second semiconductor region 2 to be reduced compared to the case where the width W(x) of the injection window 22 is constant regardless of the position at distance x, and thus the width of the termination region 12 can be reduced.
[0028] In Example 1, as shown in Figure 3, the width W(x) of the injection window at a distance x was set to decrease linearly as it moved away from the active region 11.
[0029] Figure 4 illustrates the dose profile of Example 1. The horizontal axis of Figure 4 represents the position POS, and the vertical axis represents the dose amount DO.
[0030] In Example 1, when impregnating the second conductivity type impurity using the mask 20, the dose profile was such that the dose amount in the second semiconductor region 2a of the active region 11 and the dose amount in the second semiconductor region 2 of the termination region 12 were approximately equal.
[0031] This makes it possible to form a second semiconductor region 2 by implanting a second conductivity type impurity with a single mask 20.
[0032] Next, we will explain in detail the effects of the shape of the mask 20 in Example 1, specifically how it reduces the width of the termination region 12 and suppresses electric field concentration in the termination region 12.
[0033] Figure 8 illustrates the effects of the present invention. The horizontal axis of Figure 8 indicates the position POS, and the vertical axis indicates the distance S (corresponding to the width of the shielding portion 21) between the injection window 22 of the mask 20 and the injection window 22 on the active region 11 side.
[0034] Assume that the distance S(x) between injection window 22 at a distance x from X0 and the injection window 22 on the active region 11 side can be expressed by the following equation (2).
[0035] S(x) = Smax - (Smax - Smin)·(x / Lx) α ...(2) When α = 1 / 2, the result is the same as equation (1). Here, assuming the number of injection windows 22 is 15, and Lx(α) is the distance between the position of the injection window 22 adjacent to the active region 11 on the active region 11 side and X0, the interval S(x) and Lx(1 / 4), Lx(1 / 2), Lx(1.0), and Lx(2.0) for α = 1 / 4, 1 / 2, 1.0, and 2.0 are calculated and shown in Figure 8.
[0036] As a result, it can be seen that the smaller α is, the smaller Lx(α) is, that is, the width of the termination region 12 can be reduced.
[0037] Here, α=1.0 corresponds to a case where the spacing S(x) increases linearly as it approaches the outer edge of the termination region 12 (as x approaches 0). While not exactly the same, it roughly corresponds to the case in Patent Document 1 where the aperture ratio of the injection mask (20) decreases linearly toward the outside of the termination structure (32). Similarly, α=2.0 roughly corresponds to the case in Patent Document 1 where the aperture ratio of the injection mask (20) decreases polynomially toward the outside of the termination structure (32). However, it was found that in the cases of α=1.0 and α=2.0, Lx(1.0) and Lx(2.0) become larger than Lx(1 / 2), making them unsuitable for reducing the width of the termination region 12.
[0038] Also, although not shown in Figure 8, an example of an exponential function is when the interval S(x) is e x We also calculated the case where it changes depending on (roughly corresponding to the case in Patent Document 1 where the aperture ratio of the injection mask (20) decreases exponentially toward the outside of the termination structure (32)), but it was roughly close to the case where α = 2.0. Therefore, it was found that this case is also not suitable for reducing the width of the termination region 12.
[0039] Furthermore, upon investigating the voltage resistance, it was found that for α = 1 / 4, 1 / 2, 1.0, and 2.0, the voltage resistance was approximately 900V, which is sufficient for use as a device with a voltage resistance of 750V.
[0040] Figure 9 illustrates the effects of the present invention. The horizontal axis of Figure 9 represents α, and the vertical axis represents the maximum electric field strength Emax (kV / cm) in the termination region 12 when 750V is applied.
[0041] As shown in Figure 9, it was found that the maximum electric field strength Emax is smallest when α = 1 / 2. A small maximum electric field strength Emax means that electric field concentration in the termination region 12 can be suppressed.
[0042] Avalanche breakdown is a phenomenon in which electrons accelerated by an electric field collide with atoms, tearing them away from the atoms in an avalanche-like manner. When the electric field strength that causes breakdown is Ec and the electric field strength is E, the current I increases rapidly in the form of equation (3) below.
[0043] I = I0 / [1 - (E / Ec)] k ] ···(3) Here, I0 and k are constants. Also, when the electric field strength E becomes the electric field strength Ec that causes breakdown, avalanche breakdown occurs, so E <Ecである。
[0044] From equation (3), the smaller the electric field strength E, the larger the denominator in equation (3), and the smaller the current I. This makes avalanche breakdown less likely, and the smaller current is advantageous for ensuring long-term reliability when voltage is applied for a long time. As shown in Figure 9, when α = 1 / 2, the maximum electric field strength Emax is smallest, so both the electric field strength E and the current I are small, and it was found to be the most suitable case.
[0045] From Figures 8 and 9, it can be seen that when α = 1 / 2 in equation (2), that is, when equation (1) is the most suitable, it is found to be the most appropriate.
[0046] As explained above, according to Embodiment 1, by making the mask 20 such that the distance S(x) between the injection window 22 at a distance x and the injection window 22 on the active region 11 side is approximately equal to the value defined by equation (1), it is possible to reduce the width of the termination region 12 and suppress electric field concentration in the termination region 12. [Examples]
[0047] Figure 5 illustrates the dose profile of Example 2. Figure 5 corresponds to Figure 4 of Example 1.
[0048] Example 2 has a different dose profile than Example 1.
[0049] In Example 2, as shown in Figure 5, the dose profile was such that in the termination region 12, the dose amount of the second semiconductor region 2 in the termination region 12a closer to the active region 11 was greater than the dose amount of the second semiconductor region 2 in the termination region 12b further from the active region 11.
[0050] This has the effect of suppressing the decrease in breakdown voltage caused by positive interfacial charge.
[0051] However, in Example 2, it is necessary to use two masks 20 to inject the second type of conductive impurity in order to vary the dose amount depending on the region, which is another difference from Example 1.
[0052] Except as stated above, this is the same as Example 1, so redundant explanations will be omitted. [Examples]
[0053] Figure 6 illustrates the distance between the injection window and the injection window on the active region side of the mask in Example 3, as well as the width of the injection windows. Figure 6 corresponds to Figure 3 of Example 1.
[0054] In Example 3, the width W(x) of the injection window 22 at a distance x is different from that in Example 1.
[0055] In Example 3, the shape of the mask 20 is such that the width W(x) of the injection window 22 at a distance x decreases linearly as it moves away from the active region 11, and the slope of the decrease is greater on the side closer to the active region 11 (x>XN') than on the side further away from the active region 11 (x≦XN'). In Figure 6, Wmax' is the value of the width W(x) of the injection window 22 at a distance x of XN'.
[0056] Next, we will explain the reason for changing the slope of the decrease in the width W(x) of the injection window 22. Due to the heat treatment after injection of the second conductivity type impurity, the width of the second semiconductor region 2 expands and the peak concentration also decreases. The amount of this decrease in peak concentration is greater the narrower the width W(x) of the injection window 22 is, and less the wider it is. In contrast, the width of the injection window 22 in the second semiconductor region 2a of the active region 11 is orders of magnitude wider than the width W(x) of the injection window in the termination region 12, so the decrease in peak concentration in the second semiconductor region 2a of the active region 11 is less than in the case of the second semiconductor region 2 in the termination 12. Therefore, there is a difference in peak concentration between the active region 11 and the adjacent second semiconductor region 2. If a large concentration difference exists, there is a concern that electric field concentration will occur at the edge of the active region 11, leading to a decrease in breakdown voltage. For this reason, it is preferable for the width W(x) of the injection window 22 to be wider in the vicinity of the active region 11. On the other hand, if the width W(x) of the injection window 22 is wide, the overall width of the termination region 12 will increase, so it is better to make it as narrow as possible. As a countermeasure against electric field concentration at the edge of the active region 11, it is sufficient to do so only in the vicinity of the active region 11. Therefore, as shown in Figure 6, by making the slope of decrease on the side closer to the active region 11 (x>XN') greater than the slope of decrease on the side farther from the active region 11 (x≦XN'), it is possible to counteract electric field concentration at the edge of the active region 11 while making the overall width of the termination region 12 narrower compared to the case in Figure 3. This is the reason for changing the slope of decrease of the width W(x) of the injection window 22.
[0057] Furthermore, this also has the effect of suppressing the breakdown voltage reduction due to positive interfacial charge, similar to Example 2, even when using a single mask 20 to inject a second conductivity type impurity with the same dose profile as in Figure 4 of Example 1 to form the second semiconductor region 2.
[0058] Except as stated above, this is the same as Example 1, so redundant explanations will be omitted. [Examples]
[0059] Figure 7 illustrates the distance between the injection window and the injection window on the active region side of the mask in Example 4, as well as the width of the injection windows. Figure 7 corresponds to Figure 3 of Example 1.
[0060] In Example 4, the width W(x) of the injection window 22 at a distance x is different from that of Examples 1 and 3.
[0061] In Example 4, the shape of the mask 20 was such that, when the width of the injection window 22 at a distance x is Wmax and the width of the injection window 22 of the reference window 22b is Wmin, the width of the injection window 22 at a distance x, W(x), is approximately equal to the value defined by the following equation (4).
[0062] W(x)=Wmax-(Wmax-Wmin)·(1-x / XN) 1 / 2 ...(4) In Example 4, the change in the width W(x) of the injection window 22 can be made smooth rather than linear, and the decrease in breakdown pressure due to positive interfacial charge can be suppressed.
[0063] Except as stated above, this is the same as Example 1 and Example 3, so redundant explanations will be omitted.
[0064] Although embodiments of the present invention have been described above, the present invention is not limited to the configurations described in the embodiments, and various modifications are possible within the scope of the technical idea of the present invention. Furthermore, some or all of the configurations described in each embodiment may be combined and applied. [Explanation of Symbols]
[0065] 1. First Semiconductor Area 2. Second Semiconductor Area 3. Scarcity Layer 4. Oxide film 5 electrodes 6. Channel Stopper 10 Semiconductor Devices 11 Active Area 12, 12a, 12b Termination regions 20 masks 21 Shield part 22 Injection window 22a Active region injection window 22b Reference window S Distance between injection window and injection window on the active region side W width of injection window x distance DO dose POS location
Claims
1. In a method for manufacturing a semiconductor device having a termination region in which a second semiconductor region, which is a plurality of well regions having a second conductivity type, is formed on the surface of a first semiconductor region having a first conductivity type around the active region, A mask for forming the second semiconductor region, wherein, in a thermal equilibrium state, the depletion layer extending into the first semiconductor region is continuous with the active region, and the injection window corresponding to the second semiconductor region formed at the position furthest from the active region is a reference window, the position of the reference window on the active region side is X0, the distance between the position of the injection window adjacent to the active region on the active region side and X0 is XN, the distance between the reference window and the injection window one active region side is Smax, the distance between the edge of the active region and the injection window adjacent to the active region is Smin, and the distance from X0 is x, then the distance S(x) between the injection window and the injection window one active region side at a distance x is, S(x) = Smax-(Smax-Smin)・(x / XN) 1/2 A method for manufacturing a semiconductor device, characterized by forming the second semiconductor region by injecting the second conductivity type impurity using a mask that is approximately equal to a value defined by .
2. In claim 1, The method for manufacturing a semiconductor device is characterized in that the mask has a width W(x) of the injection window at the distance x that decreases as it moves away from the active region.
3. In claim 2, The method for manufacturing a semiconductor device is characterized in that the mask has a width W(x) of the injection window at the distance x that decreases linearly as it moves away from the active region.
4. In claim 2, The method for manufacturing a semiconductor device, characterized in that the mask has a width W(x) of the injection window at the distance x that decreases linearly as it moves away from the active region, and the slope of the decrease closer to the active region is greater than the slope of the decrease further away from the active region.
5. In claim 2, The mask is such that when the width of the injection window at the distance XN is Wmax and the width of the injection window of the reference window is Wmin, the width of the injection window at the distance x is W(x). W(x)=Wmax-(Wmax-Wmin)・(1-x / XN) 1/2 A method for manufacturing a semiconductor device, characterized in that the mask is approximately equal to a value defined by .
6. In claim 1, A method for manufacturing a semiconductor device, characterized in that, when injecting the second conductivity type impurity using the mask, the dose amount in the second semiconductor region of the active region and the dose amount in the second semiconductor region of the termination region are substantially equal.
7. In claim 1, A method for manufacturing a semiconductor device, characterized in that, when impregnating the second conductivity type impurity using the mask, the dose amount of the second semiconductor region on the side closer to the active region in the termination region is greater than the dose amount of the second semiconductor region on the side farther from the active region.
8. A semiconductor device having an active region and a termination region formed around the active region, A semiconductor device characterized in that the termination region includes the second semiconductor region formed using the method for manufacturing a semiconductor device according to any one of claims 1 to 7.
9. In claim 8, A semiconductor device characterized in that, in the second semiconductor region, the region from the second semiconductor region formed by the injection window adjacent to the active region to the second semiconductor region formed by the reference window, in a thermal equilibrium state, the depletion layer extending to the first semiconductor region is continuous with the active region, and each second semiconductor region is substantially an intrinsic region, and the depletion of each second semiconductor region due to the application of voltage begins from the second semiconductor region formed by the reference window.
10. In claim 8, A semiconductor device characterized in that, of the second semiconductor region, the region from the second semiconductor region formed by the injection window adjacent to the active region to the second semiconductor region formed by the reference window is such that, on the side closer to the active region, multiple second semiconductor regions overlap to form a single well region, and on the side farther from the active region, the second semiconductor regions are separated from each other to form a well region.