Semiconductor equipment
A semiconductor device with a layered oxide semiconductor film structure addresses normal-on characteristics and reliability issues by reducing oxygen vacancies and impurities, enhancing mobility and reliability while minimizing power consumption.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- SEMICON ENERGY LAB CO LTD
- Filing Date
- 2026-05-01
- Publication Date
- 2026-07-01
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Figure 0007883686000001_ABST
Abstract
Description
[Technical Field]
[0001] One aspect of the present invention relates to a semiconductor device having an oxide semiconductor film. Or, one aspect of the present invention The embodiment relates to a display device having the above-mentioned semiconductor device.
[0002] Furthermore, one aspect of the present invention is not limited to the above-mentioned technical field. One aspect of the technical field relates to a product, method, or method of manufacture. Or, one aspect of the present invention. This refers to a process, machine, manufacture, or composition. Regarding (the device). In particular, one aspect of the present invention relates to a semiconductor device, a display device, a light-emitting device, and an energy storage device. The present invention relates to memory devices, methods for driving them, or methods for manufacturing them.
[0003] In this specification, a semiconductor device is defined as a device that can function by utilizing semiconductor properties. This refers to all types of devices, including semiconductor elements such as transistors, semiconductor circuits, computing devices, and memory devices. The device is a form of semiconductor device. Examples include imaging devices, display devices, liquid crystal display devices, light-emitting devices, and electric devices. Optical devices, power generation devices (including thin-film solar cells, organic thin-film solar cells, etc.), and electronic equipment are subject to the following regulations: It may have a semiconductor device. [Background technology]
[0004] Oxide semiconductors are attracting attention as semiconductor materials applicable to transistors. For example, In Patent Document 1, multiple oxide semiconductor layers are stacked, and among the multiple oxide semiconductor layers, The oxide semiconductor layer forming the channel contains indium and gallium, and the proportion of indium is By making the proportion of gallium greater than the proportion of gallium, the field-effect mobility (simply mobility, or μFE) can be increased. A semiconductor device that enhances (in some cases) has been disclosed.
[0005] Furthermore, Non-Patent Document 1 describes an oxide semiconductor having indium, gallium, and zinc. In 1-x Ga 1+x O3(ZnO) m (x is a number satisfying -1 ≤ x ≤ 1, and m is a natural number) It is disclosed that it has a homologous phase represented by [formula]. Furthermore, Non-Patent Document 1 discloses [formula]. The solid solution range of the homologous phase is disclosed. For example, the solid solution region of the homologous phase when m=1 is x from -0.33 to 0.0 The range is 8, and the solid solution region of the homologous phase when m=2 is x from -0.68 to 0.32 It is within the range of [Prior art documents] [Patent Documents]
[0006] [Patent Document 1] Japanese Patent Publication No. 2014-7399 [Non-patent literature]
[0007] [Non-Patent Document 1] M. Nakamura, N. Kimizuka, and T. Mohri, "The Phase Relations in the In2O3-Ga2ZnO4-ZnO System at 1350℃", J. Solid State Chem., 1991, Vol.93, pp.298-315 [Overview of the Initiative] [Problems that the invention aims to solve]
[0008] As a transistor that uses an oxide semiconductor film in the channel region, it has high field-effect mobility. This is preferable. However, if the field-effect mobility of the transistor is increased, the transistor There is a problem in that the characteristics of Normalion tend to become the characteristics of Normalion. This means that a channel exists even without applying voltage to the gate electrode, and current flows through the transistor. This refers to a state in which something ends up happening.
[0009] Furthermore, in a transistor that uses an oxide semiconductor film in the channel region, The oxygen deficiencies that form within the transistor are problematic because they affect its characteristics. For example, When oxygen vacancies are formed in an oxide semiconductor film, hydrogen binds to these vacancies, supplying carriers. It becomes a source. When a carrier source is generated in an oxide semiconductor film, the oxide semiconductor film has The electrical characteristics of a transistor can fluctuate, typically resulting in a shift in the threshold voltage.
[0010] For example, if there are too many oxygen vacancies in an oxide semiconductor film, the threshold voltage of the transistor will be too high. It shifts to the negative side, resulting in normally-on characteristics. Therefore, in an oxide semiconductor film... In particular, in the channel region, there is little oxygen deficiency, or the characteristics are normal-on. It is preferable that the oxygen deficiency is such that it does not cause any problems.
[0011] In view of the above problems, one aspect of the present invention relates to a transistor having an oxide semiconductor film, One of the challenges is to improve field-effect mobility and reliability. One aspect of the present invention relates to a transistor having an oxide semiconductor film, wherein fluctuations in electrical characteristics are reduced. One of the challenges is to suppress it while also improving reliability. Alternatively, one aspect of the present invention One of the challenges is to provide a semiconductor device with reduced power consumption. One aspect of the present invention aims to provide a novel semiconductor device. One embodiment aims to provide a novel display device.
[0012] Furthermore, the description of the above problems does not preclude the existence of other problems. The approach does not necessarily need to solve all of these problems. Other problems are addressed in the details. This will become clear from the descriptions in the documents, etc., and it is not possible to extract any issues other than those mentioned above from the descriptions in the specifications, etc. It is possible to release it. [Means for solving the problem]
[0013] A first aspect of the present invention is a semiconductor device having an oxide semiconductor film, wherein the semiconductor device is A gate electrode, an insulating film on the gate electrode, an oxide semiconductor film on the insulating film, and an oxide semiconductor film The device has a pair of electrodes on top, and the oxide semiconductor film comprises a first oxide semiconductor film and a first oxide A semiconductor film comprising a second oxide semiconductor film on a semiconductor film, the first oxide semiconductor film and the second oxide Each semiconductor film has the same element, and the first oxide semiconductor film is the second oxide semiconductor film. This is a semiconductor device that has regions with lower crystallinity than the film.
[0014] In the first embodiment described above, the first oxide semiconductor film and the second oxide semiconductor film are each It is preferable that the elements be In, M (where M is Al, Ga, Y, or Sn), and Zn, independently. It's nice.
[0015] Furthermore, in the first embodiment described above, with respect to the sum of the number of atoms of In, M, and Zn, In When the atomic ratio is 4, the atomic ratio of M is between 1.5 and 2.5, and the atomic ratio of Zn is It is preferable that the ratio is between 2 and 4. Also, in the above embodiment, the atoms of In, M, and Zn The numerical ratio is preferably in the vicinity of In:M:Zn = 4:2:3.
[0016] Furthermore, in the first embodiment described above, with respect to the sum of the number of atoms of In, M, and Zn, In When the atomic ratio is 5, the atomic ratio of M is between 0.5 and 1.5, and the atomic ratio of Zn is It is preferable that the ratio is between 5 and 7. Furthermore, in the above embodiment, the atoms of In, M, and Zn The numerical ratio is preferably in the vicinity of In:M:Zn = 5:1:6.
[0017] Alternatively, a second aspect of the present invention is a semiconductor device having an oxide semiconductor film, the semiconductor The device comprises a gate electrode, an insulating film on the gate electrode, an oxide semiconductor film on the insulating film, and an oxide The semiconductor film has a pair of electrodes on a semiconductor film, and the oxide semiconductor film comprises a first oxide semiconductor film and a first A second oxide semiconductor film is provided on the oxide semiconductor film, and the first oxide semiconductor film and the second oxide semiconductor film are provided on the oxide semiconductor film. The oxide semiconductor films each have the same element, and the first oxide semiconductor film is the second oxide It has a greater electron affinity than a monocrystalline semiconductor film, and the electron affinity of the first oxide semiconductor film and the second oxide The difference from the electron affinity of the material semiconductor film is 0.15 eV to 2.0 eV, and the first oxide The semiconductor film is a semiconductor device that has regions with lower crystallinity than the second oxide semiconductor film. .
[0018] Alternatively, a third aspect of the present invention is a semiconductor device having an oxide semiconductor film, the semiconductor The device comprises a gate electrode, an insulating film on the gate electrode, an oxide semiconductor film on the insulating film, and an oxide The semiconductor film has a pair of electrodes on a semiconductor film, and the oxide semiconductor film comprises a first oxide semiconductor film and a first A second oxide semiconductor film is provided on the oxide semiconductor film, and the first oxide semiconductor film and the second oxide semiconductor film are provided on the oxide semiconductor film. These oxide semiconductor films are, independently, composed of In and M (where M is Al, Ga, Y, or Sn). The first oxide semiconductor film has Zn and the atomic ratio of In to the atomic number of Zn is, The ratio of the number of In atoms to the number of Zn atoms in the second oxide semiconductor film is greater than that of the first oxide The semiconductor film is a semiconductor device that has regions with lower crystallinity than the second oxide semiconductor film. .
[0019] In the second and third embodiments described above, the first oxide semiconductor film and the second oxide semiconductor film Body membranes are composed of In, M (where M is Al, Ga, Y, or Sn), and Zn, respectively, independently. It is preferable to have it.
[0020] In the second and third embodiments described above, the first oxide semiconductor film contains In, M, and Zn When the atomic ratio of In is 4 relative to the total number of atoms of M, the atomic ratio of M must be between 1.5 and 2.5. The following is preferable, and the atomic ratio of Zn is 2 or more and 4 or less. Also, the above embodiment In this case, the atomic ratio of In, M, and Zn is In:M:Zn = 4:2:3 It is preferable that they be in the vicinity. Also, the total number of In, M, and Zn atoms in the second oxide semiconductor film. With respect to the sum, if the atomic ratio of In is 1, then the atomic ratio of M is between 0.5 and 1.5. Furthermore, it is preferable that the atomic ratio of Zn is 0.1 or more and 2 or less. Also, in the above embodiment, The atomic ratio of n, M, and Zn is preferably in the vicinity of In:M:Zn = 1:1:1.
[0021] Furthermore, in the second and third embodiments described above, the In, M, and of the first oxide semiconductor film If the ratio of In atoms to the total number of Zn atoms is 4, then the ratio of M atoms must be 1.5 or greater. It is preferable that the ratio is 2.5 or less, and the atomic ratio of Zn is between 2 and 4. In this case, the atomic ratio of In, M, and Zn is approximately In:M:Zn = 4:2:3. This is preferable. Also, with respect to the sum of the number of In, M, and Zn atoms in the second oxide semiconductor film When the atomic ratio of In is 5, the atomic ratio of M is 0.5 or more and 1.5 or less, and Zn It is preferable that the atomic ratio is between 5 and 7. Also, in the above embodiment, In, M, and Z The atomic ratio of n is preferably in the vicinity of In:M:Zn = 5:1:6.
[0022] Furthermore, in each of the first to third embodiments described above, the first oxide semiconductor film is the The material has a composite oxide semiconductor in which a region 1 and a region 2 are mixed, and the first region is indicative of Multiple components, one or more selected from um, zinc, and oxygen, as the main components. It has one cluster, and the second region is indium, element M (where M is Al, Ga, Y, or Multiple compounds, primarily composed of one or more selected from Sn, zinc, and oxygen. It has a second cluster, and multiple first clusters each have parts that are connected to each other, The second cluster of numbers preferably has parts that are connected to each other.
[0023] Furthermore, in each of the first to third embodiments described above, the second oxide semiconductor film is connected It is preferable that the material has crystalline parts, and that the crystalline parts have c-axis orientation.
[0024] Another aspect of the present invention is a semiconductor device described in any one of the above aspects, and a display A display device having an element. Another aspect of the present invention is a display device having a touch sensor. This is a display module having a sensor. Another aspect of the present invention is any of the above aspects. A semiconductor device described in one of the above, the display device, or the display module, and an operation key or It is an electronic device that has a battery. [Effects of the Invention]
[0025] According to one aspect of the present invention, in a transistor having an oxide semiconductor film, the field effect transfer The degree can be improved and reliability can be improved. Alternatively, according to one aspect of the present invention In transistors having an oxide semiconductor film, the fluctuation of electrical characteristics is suppressed, and the reliability Reliability can be improved. Alternatively, according to one aspect of the present invention, power consumption can be reduced. A semiconductor device can be provided. Or, according to one aspect of the present invention, a novel semiconductor device can be provided. It is possible to provide a novel display device according to one aspect of the present invention. It is possible.
[0026] Furthermore, the description of these effects does not preclude the existence of other effects. One embodiment does not necessarily have to possess all of these effects. Furthermore, other effects may be considered. This will become clear from the description in the specification, drawings, claims, etc., and the specification, drawings It is possible to extract effects other than those mentioned above from the descriptions in the surfaces, claims, etc. [Brief explanation of the drawing]
[0027] [Figure 1] Top view and cross-sectional view illustrating a semiconductor device. [Figure 2] Top view and cross-sectional view illustrating a semiconductor device. [Figure 3] Top view and cross-sectional view illustrating a semiconductor device. [Figure 4] Top view and cross-sectional view illustrating a semiconductor device. [Figure 5] Top view and cross-sectional view illustrating a semiconductor device. [Figure 6] Top view and cross-sectional view illustrating a semiconductor device. [Figure 7] A cross-sectional diagram illustrating the method for manufacturing semiconductor devices. [Figure 8] A cross-sectional diagram illustrating the method for manufacturing semiconductor devices. [Figure 9] A cross-sectional diagram illustrating the method for manufacturing semiconductor devices. [Figure 10] A cross-sectional diagram illustrating the method for manufacturing semiconductor devices. [Figure 11] A conceptual diagram illustrating the diffusion pathways of oxygen or excess oxygen diffusing into an oxide semiconductor film. [Figure 12] Schematic top view and cross-sectional view illustrating a composite oxide semiconductor. [Figure 13] Schematic top view and cross-sectional view illustrating a composite oxide semiconductor. [Figure 14] Schematic top view and cross-sectional view illustrating a composite oxide semiconductor. [Figure 15] A diagram illustrating the atomic ratio of composite oxide semiconductors. [Figure 16] A diagram illustrating a sputtering apparatus. [Figure 17] A process flow diagram illustrating the method for fabricating composite oxide semiconductors. [Figure 18] A diagram illustrating a cross-section near the target. [Figure 19] A top view showing one embodiment of a display device. [Figure 20] A cross-sectional view showing one embodiment of a display device. [Figure 21] A cross-sectional view showing one embodiment of a display device. [Figure 22] A cross-sectional view showing one embodiment of a display device. [Figure 23] A cross-sectional view showing one embodiment of a display device. [Figure 24] A cross-sectional view showing one embodiment of a display device. [Figure 25] A cross-sectional view showing one embodiment of a display device. [Figure 26] A diagram illustrating the top surface and cross-section of a semiconductor device. [Figure 27] A diagram illustrating the cross-section of a semiconductor device. [Figure 28] A diagram illustrating an example of a display panel configuration. [Figure 29] A diagram illustrating an example of a display panel configuration. [Figure 30] Block diagrams and circuit diagrams illustrating the display device. [Figure 31] A diagram illustrating the display module. [Figure 32] A diagram illustrating electronic devices. [Figure 33] A diagram illustrating electronic devices. [Figure 34] A perspective view illustrating the display device. [Figure 35] A diagram illustrating the Id-Vg characteristics of a transistor. [Figure 36] A diagram illustrating the GBT test results of a transistor. [Figure 37] A diagram illustrating the Id-Vg characteristics of a transistor. [Figure 38] A diagram illustrating the GBT test results of a transistor. [Modes for carrying out the invention]
[0028] The embodiments will be described below with reference to the drawings. However, many embodiments are described. It can be implemented in different ways, without deviating from its purpose and scope. Those skilled in the art will readily understand that the form and details can be modified in various ways. Therefore, the present invention This shall not be interpreted as being limited to the contents described in the following embodiments.
[0029] Furthermore, in the drawings, the size, layer thickness, or area is exaggerated for clarity. There are cases where this is not the case. Therefore, it is not necessarily limited to that scale. Note that the drawing is an ideal example. This is a schematic representation and is not limited to the shapes or values shown in the drawings.
[0030] Furthermore, the ordinal numbers "1st," "2nd," and "3rd" used in this specification refer to the constituent elements. This note is added to avoid confusion and does not imply any numerical limitation.
[0031] Furthermore, in this specification, phrases indicating placement such as "above" and "below" refer to the relative positions of the components. The positional relationships are used for convenience in explaining them by referring to the drawings. The relationship changes as appropriate depending on the direction in which each component is described. Therefore, as explained in the specification... It is not limited to the same words or phrases, and can be appropriately rephrased depending on the situation.
[0032] Furthermore, in this specification, the term "transistor" includes a gate, a drain, and a source. It is an element having at least three terminals. And, drain (drain terminal, drain Between the drain region (or drain electrode) and the source (source terminal, source region, or source electrode) It has a channel region, and current is transmitted between the source and drain through the channel region. It is capable of carrying current. In this specification, the channel region is defined as a region where current is the primary current. This refers to the region in which something flows.
[0033] Furthermore, the source and drain functions may differ when using transistors with different polarities, or when the circuit The direction of the current may change during operation, which can cause the current to switch positions. In detailed documents, the terms "source" and "drain" may be used interchangeably. ru.
[0034] Furthermore, in this specification, etc., "electrically connected" means "having some kind of electrical effect." This includes cases where the connection is made via ". Here, "has some electrical effect The term "of" is not particularly limited as long as it enables the exchange of electrical signals between connected objects. For example, "things that have some kind of electrical effect" include electrodes and wiring, as well as transistors. Switching elements such as resistors, inductors, capacitors, and other various functional elements are available. This includes elements such as [specific components].
[0035] Furthermore, in this specification, "parallel" means that two straight lines have an angle of -10° or more and 10° or less. This refers to a state where objects are arranged in degrees. Therefore, it also includes cases where the angle is between -5° and 5°. Furthermore, "perpendicular" refers to a state in which two straight lines are positioned at an angle of 80° to 100°. Therefore, this includes cases where the angle is between 85° and 95°.
[0036] Furthermore, in this specification, the terms "membrane" and "layer" are interchangeable. It is possible to change the term. For example, the term "conductive layer" can be changed to the term "conductive film." It may be possible to change it. Or, for example, change the term "insulating film" to "insulating layer". In some cases, it may be possible to change the terminology to this.
[0037] Furthermore, unless otherwise specified in this specification, off-current refers to the current when the transistor is turned off. This refers to the drain current when the device is in a state (also called a non-conductive state or an interrupted state). Unless otherwise specified, in an n-channel transistor, the voltage between the gate and source is V When gs is lower than the threshold voltage Vth, in a p-channel transistor, the gate and socket are... This refers to a state where the voltage Vgs between channels is higher than the threshold voltage Vth. For example, n channels. The off-current of a transistor is defined as the voltage between the gate and source (Vgs) and the threshold voltage (Vt). Sometimes, this refers to the drain current when it is lower than h.
[0038] The off-current of a transistor may depend on Vgs. Therefore, when it is said that the off-current of the transistor is I or less, it may mean that there exists a value of Vgs for which the off-current of the transistor becomes I or less. The off-current of a transistor may refer to the off-current in the off-state at a given Vgs, in the off-state at Vgs within a given range, or in the off-state at Vgs where a sufficiently reduced off-current is obtained, etc. That is, there exists a value of Vgs for which the off-current of the transistor becomes I or less. The off-current of a transistor may refer to the off-current in the off-state at a given Vgs, in the off-state at Vgs within a given range, or in the off-state at Vgs where a sufficiently reduced off-current is obtained, etc. That is, there exists a value of Vgs for which the off-current of the transistor becomes I or less. The off-current of a transistor may refer to the off-current in the off-state at a given Vgs, in the off-state at Vgs within a given range, or in the off-state at Vgs where a sufficiently reduced off-current is obtained, etc.
[0039] As an example, assume an n-channel transistor with a threshold voltage Vth of 0.5V, a drain current of 1×10 A at Vgs = 0.5V, a drain current of 1×10 -9 A at Vgs = 0.1V, a drain current of 1×10 -1 3 A at Vgs = -0.5V, and a drain current of 1×10 -19 A at Vgs = -0.8V. Since the drain current of this transistor is 1×10 A or less at Vgs = -0.5V or in the range of Vgs from -0.5V to -0.8V, it may be said that the off-current of this transistor is 1×10 -22 A or less. Since there exists a Vgs for which the drain current of this transistor becomes 1×10 A or less, it may be said that the off-current of this transistor is 1×10 A or less. -19 Since there exists a Vgs for which the drain current of this transistor becomes 1×10 A or less, it may be said that the off-current of this transistor is 1×10 -19 A or less. Since there exists a Vgs for which the drain current of this transistor becomes 1×10 -22 A or less, it may be said that the off-current of this transistor is 1×10 A or less. -22 Since there exists a Vgs for which the drain current of this transistor becomes 1×10
[0040] Also, in this specification, etc., the off-current of a transistor having a channel width W may be expressed as the current value flowing per channel width W. Also, for a given channel width (e.g., 1μm), etc. It is sometimes expressed as the value of the current flowing through it. In the latter case, the unit of off-current is the second of current / length. It may be expressed in units that have an element (for example, A / μm).
[0041] The off-current of a transistor may be temperature-dependent. In this specification, the off-current Unless otherwise specified, the device is turned off at room temperature, 60°C, 85°C, 95°C, or 125°C. It may represent electric current. Alternatively, it may indicate that the reliability of the semiconductor device containing the transistor is maintained. The temperature at which the transistor is proven, or the temperature at which the semiconductor device containing the transistor is used (e.g.) For example, it may represent the off-current at any one temperature between 5°C and 35°C. The off-current of the inverter is less than or equal to I, meaning that at room temperature, 60°C, 85°C, 95°C, and 125°C, The temperature at which the reliability of the semiconductor device containing the transistor is guaranteed, or the transistor The temperature at which semiconductor devices containing DISTROs are used (for example, any one temperature between 5°C and 35°C) At a given temperature, there exists a value of Vgs such that the transistor's off-current is less than or equal to I. It may refer to something.
[0042] The off-current of a transistor may depend on the voltage Vds between the drain and source. In this specification, unless otherwise specified, the off-current is defined as Vds = 0.1V, 0.8V, 1V, 1.2V, 1.8V, 2.5V, 3V, 3.3V, 10V, 12V, 16V, and This may represent the off-current at 20V. Or, the semiconductor containing the transistor in question. The reliability of the device, etc., is guaranteed by Vds, or the semiconductor device containing the transistor in question. It may represent the off-current at Vds used in applications such as transistor off-voltage. The current is less than or equal to I, meaning that Vds is 0.1V, 0.8V, 1V, 1.2V, 1.8V, 2.5V, 3V, 3.3V, 10V, 12V, 16V, 20V, the transistor in question The reliability of the semiconductor device is guaranteed by Vds, or the semiconductor device containing the transistor. In devices such as body equipment, the off-current of the transistor at Vds is less than or equal to I. This can sometimes refer to the existence of a value for gs.
[0043] In the above explanation of off-current, drain may be read as source. The term "current" can also refer to the current flowing through the source of a transistor when it is in the off state.
[0044] Furthermore, in this specification, the term "leakage current" may be used interchangeably with "off-current." Furthermore, in this specification, off-current refers to, for example, when a transistor is in the off state. It can also refer to the current flowing between the source and the drain.
[0045] Furthermore, in this specification, the threshold voltage of a transistor refers to the channel of a transistor. This refers to the gate voltage (Vg) when the threshold voltage is formed. Specifically, it is the threshold voltage of the transistor. Voltage is plotted with the gate voltage (Vg) on the horizontal axis and the square root of the drain current (Id) on the vertical axis. In the curve (Vg-√Id characteristic), the straight line obtained by extrapolating the tangent line with the maximum slope is The gate voltage (Vg) at the intersection of the square root of the drain current (Id) and 0 (Id is 0A) is... ) may refer to the threshold voltage of a transistor, where the channel length is L and the channel length is L. Let W be the channel width, and the value of Id[A]×L[μm] / W[μm] is 1×10 -9 [A] It may refer to the gate voltage (Vg).
[0046] Furthermore, even when the term "semiconductor" is used in this specification, for example, if the conductivity is If the value is sufficiently low, it may have the properties of an "insulator". Also, "semiconductor" and " The term "insulator" has an ambiguous boundary and may not be strictly distinguishable in some cases. Therefore, this specification... The term "semiconductor" as used in this document may sometimes be replaced with "insulator." Similarly, this In some cases, the term "insulator" as used in specifications, etc., can be replaced with "semiconductor." In some cases, the term "insulator" as used in this specification may be replaced with "semi-insulator." .
[0047] Furthermore, even when the term "semiconductor" is used in this specification, for example, if the conductivity is If the value is sufficiently high, it may possess the properties of a "conductor." Also, "semiconductor" and " The term "conductor" has an ambiguous boundary and may not be strictly distinguishable in some cases. Therefore, this specification... The term "semiconductor" as used in this document may sometimes be replaced with "conductor." Similarly, this In some cases, the term "conductor" as used in specifications, etc., can be replaced with "semiconductor."
[0048] Furthermore, in this specification, semiconductor impurities refer to components other than the main components that constitute the semiconductor film. For example, elements with a concentration of less than 0.1 atomic percent are considered impurities. Furthermore, DOS (Density of States) is formed in semiconductors, and In some cases, the rear mobility may decrease, or the crystallinity may decrease. When an oxide semiconductor is present, impurities that alter the properties of the semiconductor include, for example, Group 1 impurities. Elements, Group 2 elements, Group 13 elements, Group 14 elements, Group 15 elements, and transition metals other than the main component. These include hydrogen (also found in water), lithium, sodium, silicon, and boron. These include phosphorus, carbon, and nitrogen. In the case of oxide semiconductors, for example, impurities such as hydrogen can be mixed in. Therefore, oxygen vacancies may form. Also, if the semiconductor contains silicon, the semiconductor Impurities that alter properties include, for example, Group 1 elements and Group 2 elements excluding oxygen and hydrogen. These include elements from Group 13 and Group 15.
[0049] (Embodiment 1) In this embodiment, a semiconductor device and a method for manufacturing a semiconductor device according to one aspect of the present invention are described below. This will be explained with reference to Figures 1 through 11.
[0050] <1-1. Example of Semiconductor Device Configuration 1> Figure 1(A) is a top view of a transistor 100, which is a semiconductor device according to one aspect of the present invention. Figure 1(B) corresponds to a cross-sectional view of the section between the dashed-dotted line X1 and X2 shown in Figure 1(A). Furthermore, Figure 1(C) is a cross-sectional view of the section between the dashed line Y1-Y2 shown in Figure 1(A). This applies. Note that in Figure 1(A), to avoid complexity, transistor 100 Some of the components (such as the insulating film that functions as a gate insulating film) are omitted from the diagram. Furthermore, the direction of the dashed line X1-X2 is the channel length direction, and the direction of the dashed line Y1-Y2 is the channel width direction. It is sometimes referred to as "direction." Note that in the top view of the transistor, in subsequent drawings... Similar to Figure 1(A), some components may be omitted in the illustration.
[0051] The transistor 100 consists of a conductive film 104 on a substrate 102 and the substrate 102 and the conductive film 104 The insulating film 106 above, the oxide semiconductor film 108 on the insulating film 106, and the oxide semiconductor film 108 It has an upper conductive film 112a and a conductive film 112b on the oxide semiconductor film 108. Specifically, on transistor 100, there is an oxide semiconductor film 108, a conductive film 112a, and a conductive On film 112b, there is an insulating film 114, an insulating film 116 on insulating film 114, and on insulating film 116 An insulating film 118 is formed.
[0052] Transistor 100 is a so-called channel-etch type transistor.
[0053] Furthermore, the oxide semiconductor film 108 is oxide semiconductor film 108_1 on the insulating film 106, It has an oxide semiconductor film 108_2 on a monocrystalline semiconductor film 108_1. Film 108_1 and oxide semiconductor film 108_2 each contain the same element. For example, Oxide semiconductor film 108_1 and oxide semiconductor film 108_2 are each independently of In and Preferably, it contains M (where M is Al, Ga, Y, or Sn) and Zn.
[0054] Furthermore, oxide semiconductor film 108_1 and oxide semiconductor film 108_2 are independently It is preferable that there is a region in which the atomic ratio of In is greater than the atomic ratio of M. For example, oxidation The ratio of the number of In, M, and Zn atoms in the semiconductor film 108_1 is In:M:Zn=4:2: 3 is preferable. Also, the atoms of In, M, and Zn in the oxide semiconductor film 108_2 It is preferable to set the ratio of the numbers to In:M:Zn = 4:2:3 neighborhood. Here, neighborhood means In If the value is 4, then M is between 1.5 and 2.5, and Zn is between 2 and 4. The oxide semiconductor film 108_1 and oxide semiconductor film 108_2 have approximately the same composition. This allows the same sputtering target to be used for formation, thus reducing manufacturing costs. It is possible. Also, when using the same sputtering target, the same chamber In a vacuum, oxide semiconductor films 108_1 and 108_2 are continuously deposited. Therefore, the interface between oxide semiconductor film 108_1 and oxide semiconductor film 108_2 This can suppress the incorporation of impurities.
[0055] Oxide semiconductor film 108_1 and oxide semiconductor film 108_2 are independently, In The region in which the atomic ratio of is greater than that of M results in the field effect of transistor 100. The mobility can be increased. Specifically, the field-effect mobility of transistor 100 is 5 0cm 2 The field-effect mobility of transistor 100 is greater than / Vs, and more preferably 10 0cm 2 It becomes possible to exceed / Vs.
[0056] For example, a transistor with high field-effect mobility as described above can be used to generate a gate signal. By using it in the driver, it is possible to provide a display device with a narrow bezel (also called a narrow bezel). Furthermore, the transistors with high field-effect mobility mentioned above are connected to the signal lines of the display device. The source driver that supplies the signal (especially the shift register that the source driver has) By using it in a demultiplexer connected to the power terminal, the number of wires connected to the display device can be increased. It can provide a small number of display devices.
[0057] On the other hand, oxide semiconductor film 108_1 and oxide semiconductor film 108_2 are independent of each other. Furthermore, even if the region has an atomic ratio of In greater than that of M, the oxide semiconductor film 108 When the crystallinity of _1 and the oxide semiconductor film 108_2 is high, the field effect mobility is low. This can happen.
[0058] However, in a semiconductor device according to one aspect of the present invention, the oxide semiconductor film 108_1 is , it has regions with lower crystallinity than the oxide semiconductor film 108_2. As for the crystallinity of 08, for example, X-ray diffraction (XRD: X-Ray Diffractio n) can be used for analysis, or a transmission electron microscope (TEM) can be used for analysis. This can be analyzed using an Electron Microscope.
[0059] When the oxide semiconductor film 108_1 has regions with low crystallinity, it has the following excellent effects: ru.
[0060] First, we will explain the oxygen vacancies that can be formed in the oxide semiconductor film 108.
[0061] Oxygen vacancies formed in the oxide semiconductor film 108 affect transistor characteristics. This becomes a problem. For example, when an oxygen vacancy is formed in the oxide semiconductor film 108, the oxygen vacancy Hydrogen combines and becomes a carrier source. A carrier source is generated in the oxide semiconductor film 108. As a result, the electrical characteristics of the transistor 100 having the oxide semiconductor film 108 change, and a typical... A threshold voltage shift occurs. Therefore, in the oxide semiconductor film 108, acid The fewer prime defects there are, the better.
[0062] Therefore, in one embodiment of the present invention, an insulating film near the oxide semiconductor film 108, specifically, The insulating films 114 and 116 formed on top of the oxide semiconductor film 108 contain excess oxygen. This is the configuration. Oxygen or excess oxygen is transferred from insulating films 114 and 116 to oxide semiconductor film 108. By moving the film, it becomes possible to reduce oxygen vacancies in the oxide semiconductor film.
[0063] Here, using Figures 11(A) and 11(B), the oxygen or The pathway of excess oxygen will be explained. Figures 11(A) and 11(B) show the expansion of oxygen in the oxide semiconductor film 108. This is a conceptual diagram representing the diffusion pathway of dispersed oxygen or excess oxygen, and Figure 11(A) shows the channel length. This is a conceptual diagram of the direction, and Figure 11(B) is a conceptual diagram of the channel width direction.
[0064] Oxygen or excess oxygen present in insulating films 114 and 116 is released from above, i.e., from the oxide semiconductor. It diffuses through the conductive film 108_2 into the oxide semiconductor film 108_1 (Figure 11(A)(B) Route 1) shown in ).
[0065] Alternatively, the oxygen or excess oxygen present in the insulating films 114 and 116 is absorbed by the oxide semiconductor film 10 Spread from the sides of 8_1 and oxide semiconductor film 108_2 into oxide semiconductor film 108 They disperse (Route 2 shown in Figure 11(B)).
[0066] For example, in the case of Route 1 shown in Figures 11(A)(B), the oxide semiconductor film 108_2 If the crystallinity is high, it may inhibit the diffusion of oxygen or excess oxygen. On the other hand, Figure 11 In the case of Route 2 shown in (B), oxide semiconductor film 108_1 and oxide semiconductor film 1 08_2 From each side, oxide semiconductor film 108_1 and oxide semiconductor film 108_ 2. This allows for the diffusion of oxygen or excess oxygen.
[0067] Furthermore, in the case of Route 2 shown in Figure 11(B), the crystallinity of the oxide semiconductor film 108_1 However, because it has regions with lower crystallinity than the oxide semiconductor film 108_2, these regions have excess acid This becomes the primary diffusion pathway, and the oxide semiconductor film 10 has higher crystallinity than the oxide semiconductor film 108_1. Excess oxygen can also be diffused into 8_2. Note that in Figures 11(A) and (B), However, if the insulating film 106 contains oxygen or excess oxygen, oxides will also be released from the insulating film 106. Oxygen or excess oxygen can diffuse into the semiconductor film 108.
[0068] Thus, in a semiconductor device according to one aspect of the present invention, oxide semiconductors with different crystal structures are used. By using a layered film structure and designating the low-crystallinity regions as the diffusion pathway for excess oxygen, a highly reliable solution is achieved. We can provide semiconductor devices.
[0069] Furthermore, if the oxide semiconductor film 108 is composed only of oxide semiconductor films with low crystallinity, Impurities (for example, water) are present in the channel side, i.e., the region corresponding to the oxide semiconductor film 108_2. Reliability may be compromised due to the adhesion of substances (such as water or other impurities) or the inclusion of contaminants. There is.
[0070] Impurities such as hydrogen or water mixed into the oxide semiconductor film 108 affect the transistor characteristics. This is problematic because it has an impact. Therefore, in the oxide semiconductor film 108, hydrogen and The less impurities such as water the product contains, the better.
[0071] Therefore, in one embodiment of the present invention, the crystallinity of the oxide semiconductor film on top of the oxide semiconductor film By increasing this, it is possible to suppress impurities that may be mixed into the oxide semiconductor film 108. By increasing the crystallinity of the oxide semiconductor film 108_2, conductive films 112a and 112b are processed. Damage during this process can be suppressed. The surface of the oxide semiconductor film 108, i.e., oxidation The surface of the semiconductor film 108_2 is etched during the processing of the conductive films 112a and 112b. or it is exposed to etching gas. However, the oxide semiconductor film 108_2 has crystalline properties Because it has a high region, compared to the oxide semiconductor film 108_1 with low crystallinity, it has etching resistance It has excellent properties. Therefore, the oxide semiconductor film 108_2 functions as an etching stopper. do.
[0072] Furthermore, the oxide semiconductor film 108 is an oxide with a low impurity concentration and a low defect level density. By using semiconductor films, transistors with excellent electrical properties can be fabricated. It seems that here, the impurity concentration is low and the defect level density is low (there are few oxygen vacancies). This is called high-purity intrinsic or substantially high-purity intrinsic. Note that impurities in oxide semiconductor films include... Typical examples include water and hydrogen. In this specification, water is extracted from an oxide semiconductor film. The reduction or removal of hydrogen is sometimes referred to as dehydration or dehydrogenation. The addition of oxygen to a semiconductor film or oxide insulating film is sometimes referred to as oxygenation. A state in which oxygen is added and has an excess of oxygen compared to the stoichiometric composition is called a hyperoxygenated state. There are cases where this is the case.
[0073] High-purity intrinsic or substantially high-purity intrinsic oxide semiconductor films have fewer carrier sources. Therefore, the carrier density can be lowered. Consequently, the oxide semiconductor film can form channel regions. A transistor in which a region is formed has an electrical characteristic (normally negative) where the threshold voltage is negative. It is also called n.) It rarely becomes ). Also, it is high-purity genuine or substantially high-purity genuine. Oxide semiconductor films have a low defect level density, which can sometimes result in a low trap level density. Furthermore, oxide semiconductor films that are high-purity intrinsic or substantially high-purity intrinsic exhibit significant off-current. Small, with a channel width of 1 x 10 6 Even if the element has a channel length L of 10 μm in μm, When the voltage between the drain electrode and the drain electrode (drain voltage) is in the range of 1V to 10V, the switch is off. The current is below the measurement limit of the semiconductor parameter analyzer, i.e., 1 × 10⁻⁶ -13 A or less and This characteristic can be obtained.
[0074] Furthermore, the oxide semiconductor film 108_1 has lower crystallinity than the oxide semiconductor film 108_2. Having a region can sometimes lead to higher carrier density.
[0075] Furthermore, when the carrier density of the oxide semiconductor film 108_1 increases, the oxide semiconductor film 108 In some cases, the Fermi level may be relatively higher than the conduction band of _1. This can lead to oxides The lower end of the conduction band of the semiconductor film 108_1 becomes lower, and the lower end of the conduction band of the oxide semiconductor film 108_1 and the energy between the gate insulating film (in this case, insulating film 106) and the trap levels that may be formed in the gate insulating film. The energy difference may become large. This large energy difference can cause the gate insulating film to... This reduces the amount of charge trapped inside, thereby minimizing fluctuations in the transistor's threshold voltage. In some cases, this may occur. Also, when the carrier density of the oxide semiconductor film 108_1 increases, The field-effect mobility of the conductive film 108 can be increased.
[0076] Furthermore, the oxide semiconductor film 108_1 is preferably a composite oxide semiconductor. Oxide semiconductors will be described in detail in Embodiment 2.
[0077] Furthermore, in the transistor 100 shown in Figures 1(A), 1(B), and 1(C), the insulating film 106 is It functions as a gate insulating film for transistor 100, and insulating films 114, 116, and 118 It functions as a protective insulating film for transistor 100. Also, transistor 100 In this configuration, conductive film 104 functions as a gate electrode, and conductive film 112a functions as a source electrode. The conductive film 112b functions as an electrode, and the conductive film 112b functions as a drain electrode. In this specification, etc., insulating film 106 is referred to as the first insulating film, and insulating films 114, 116 as the second insulating film. The insulating film and insulating film 118 are sometimes referred to as the third insulating film.
[0078] <1-2. Components of Semiconductor Devices> Next, the components included in the semiconductor device of this embodiment will be described in detail.
[0079] [substrate] There are no major restrictions on the material of the substrate 102, but it should at least be able to withstand subsequent heat treatment. It must have heat resistance. For example, glass substrates, ceramic substrates, quartz substrates, etc. A fire substrate or the like may be used as the substrate 102. Alternatively, silicon or silicon carbide may be used as the material. Single-crystal semiconductor substrates, polycrystalline semiconductor substrates, and compound semiconductors such as silicon germanium are used as materials. It is also possible to apply substrates, SOI substrates, etc., and semiconductor elements are provided on these substrates. The prepared material may be used as the substrate 102. Note that a glass substrate may be used as the substrate 102. If available, 6th generation (1500mm x 1850mm), 7th generation (1870mm x 220 0mm), 8th generation (2200mm x 2400mm), 9th generation (2400mm x 280 By using large-area substrates such as 0mm, 10th generation (2950mm x 3400mm), Large-scale display devices can be manufactured.
[0080] Furthermore, a flexible substrate is used as the substrate 102, and the transistor 10 is directly mounted on the flexible substrate. A 0 may be formed. Alternatively, a release layer may be provided between the substrate 102 and the transistor 100. Good. The delamination layer is applied to the substrate 102 after the semiconductor device has been partially or completely completed on it. It can be separated and transferred to another substrate. In this case, transistor 100 has a low resistance It can be transferred to substrates with poor thermal resistance or flexible substrates.
[0081] [Conductive film] A conductive film 104 functions as a gate electrode, and a conductive film 112a functions as a source electrode. The conductive film 112b that functions as a drain electrode is made of chromium (Cr), copper (Cu), and Aluminum (Al), gold (Au), silver (Ag), zinc (Zn), molybdenum (Mo), t Tal (Ta), Titanium (Ti), Tungsten (W), Manganese (Mn), Nickel ( A metallic element selected from Ni (ni), iron (Fe), and cobalt (Co), or the aforementioned metallic elements They are formed using alloys composed of the above-mentioned metal elements, or alloys combining the aforementioned metal elements. It is possible.
[0082] Furthermore, conductive films 104, 112a, and 112b contain an oxide (I) having indium and tin. n-Sn oxide, an oxide containing indium and tungsten (In-W oxide), Indium, tungsten, and zinc oxide (In-W-Zn oxide), indium Oxides containing indium and titanium (In-Ti oxide), acids containing indium, titanium and tin Indium oxides (In-Ti-Sn oxide), oxides containing indium and zinc (In-Zn oxide) Indium, tin, and silicon oxide (In-Sn-Si oxide), indium Oxide conductors such as oxides containing um, gallium, and zinc (In-Ga-Zn oxide) Alternatively, oxide semiconductors can be used.
[0083] Here, we will explain oxide conductors. In this specification and elsewhere, oxide conductors are referred to as OC. It may also be called an Oxide Conductor. Examples of oxide conductors include When an oxygen vacancy is formed in an oxide semiconductor and hydrogen is added to the oxygen vacancy, a donor is formed near the conduction band. - A level is formed. As a result, the oxide semiconductor becomes highly conductive and turns into a conductor. An integrated oxide semiconductor can be called an oxide conductor. Generally, oxide semiconductors are Due to its large energy gap, it is transparent to visible light. On the other hand, oxide conductive The material is an oxide semiconductor having a donor level near the conduction band. Therefore, it is an oxide conductor. The absorption effect due to the donor level is small, and the light transmission for visible light is similar to that of oxide semiconductors. It has a sexual nature.
[0084] Furthermore, conductive films 104, 112a, and 112b contain Cu-X alloy films (where X is Mn, Ni, Cr, Fe, Co, Mo, Ta, or Ti may be used. A Cu-X alloy film is used. This allows for processing using a wet etching process, thus reducing manufacturing costs. It becomes possible.
[0085] Furthermore, the conductive films 112a and 112b contain, among the above-mentioned metallic elements, copper, titanium, and t It contains one or more of the following selected from sten, tantalum, and molybdenum. It is preferable to use tantalum nitride films as conductive films 112a and 112b. It is suitable. The tantalum nitride film has conductivity and high resistance to copper or hydrogen. It has barrier properties. Furthermore, tantalum nitride films release very little hydrogen from themselves. , a conductive film in contact with the oxide semiconductor film 108, or a conductive film in the vicinity of the oxide semiconductor film 108 Therefore, it can be used most preferably. Also, as conductive films 112a and 112b, copper films are used. Using this method is preferable because it can lower the resistance of the conductive films 112a and 112b.
[0086] Furthermore, the conductive films 112a and 112b can be formed by electroless plating. Examples of materials that can be formed by this electroless plating method include Cu, Ni, Al, Au, and S. It is possible to use one or more of the following: n, Co, Ag, and Pd. In particular, using Cu or Ag can lower the resistance of the conductive film, It is suitable.
[0087] [Insulating film that functions as a gate insulating film] The insulating film 106 that functions as the gate insulating film of transistor 100 is plasma-activated. PECVD:(Plasma Enhanced Chemical Va By methods such as the deposition method and sputtering method, silicon oxide film, acid Silicon nitride film, silicon nitride oxide film, silicon nitride film, aluminum oxide film, aluminum oxide Phenium film, yttrium oxide film, zirconium oxide film, gallium oxide film, tantalum oxide One type of film: magnesium oxide film, lanthanum oxide film, cerium oxide film, and neodymium oxide film. An insulating layer containing the above can be used. Furthermore, the insulating film 106 can be arranged in a multilayer structure or in a 3-layer or less configuration. The above layered structure may also be used.
[0088] Furthermore, the oxide semiconductor film 108, which functions as the channel region of transistor 100, is in contact with the The insulating film 106 is preferably an oxide insulating film, and is preferably composed of an excess of acid in a stoichiometric composition. It is more preferable to have a region containing an element (excess oxygen region). In other words, insulating film 1 06 is an insulating film capable of releasing oxygen. Furthermore, the insulating film 106 has an excess oxygen region. To provide this, for example, an insulating film 106 may be formed under an oxygen atmosphere, or an insulating film may be formed after film formation. The border film 106 can be heat-treated in an oxygen atmosphere.
[0089] Furthermore, when hafnium oxide is used as the insulating film 106, the following effects are obtained. Hafnium has a higher dielectric constant than silicon oxide or silicon oxide / nitride. Therefore, Compared to the case using silicon oxide, the thickness of the insulating film 106 can be increased, thus tunnel This can reduce leakage current caused by current. In other words, a transistor with a small off-current It is possible to achieve this. Furthermore, hafnium oxide having a crystalline structure has an amorphous structure It has a higher dielectric constant compared to hafnium oxide, which has a low off-current. For use as a transistor, it is preferable to use hafnium oxide having a crystalline structure. Examples of crystal structures include monoclinic and cubic systems. However, one aspect of the present invention is... The term "sama" is not limited to these examples.
[0090] In this embodiment, the insulating film 106 is made of a silicon nitride film and a silicon oxide film. It forms a multilayer film. Compared to silicon oxide films, silicon nitride films have a higher dielectric constant and oxidation Because the required film thickness to obtain capacitance equivalent to that of a silicon film is large, transistor 100 By including a silicon nitride film as the gate insulating film, the insulating film can be made thicker. This suppresses the decrease in dielectric breakdown voltage of transistor 100, and further improves the dielectric breakdown voltage, The electrostatic breakdown of the transistor 100 can be suppressed.
[0091] [Oxide semiconductor film] As the oxide semiconductor film 108, the materials shown above can be used.
[0092] When the oxide semiconductor film 108 is an In-M-Zn oxide, the atomic ratio of the metal elements of the sputtering target used to form the In-M-Zn oxide preferably satisfies In>M. For such an atomic ratio of the metal elements of the sputtering target, examples of the atomic ratio of In:M:Zn include 2:1:3, In:M:Zn = 3:1:2, In:M:Zn = 4:2:4, 1, In:M:Zn = 5:1:6, In:M:Zn = 5:1:7, In:M:Zn = 5, 1:8, In:M:Zn = 6:1:6, In:M:Zn = 5:2:5, etc.
[0093] Also, in the <1-1-2. Configuration Example 2 of the Semiconductor Device> shown above, when the oxide semiconductor film 108_2 is an In-M-Zn oxide, the atomic ratio of the metal elements of the sputtering target used to form the In-M-Zn oxide preferably satisfies In≤M or Zn≤M.
[0094] For such an atomic ratio of the metal elements of the sputtering target, examples of the atomic ratio of In:M:Zn include 1:1:1, In:M:Zn = 1:1:1.2, In:M:Zn = 1:3, 2, In:M:Zn = 1:3:4, In:M:Zn = 1:3:6, etc.
[0094] Also, when the oxide semiconductor film 108 is an In-M-Zn oxide, it is preferable to use a target containing polycrystalline In-M-Zn oxide as the sputtering target. By using a target containing polycrystalline In-M-Zn oxide, an oxide semiconductor having crystallinity can be obtained. film can be obtained. This facilitates the formation of the conductive film 108. The atomic ratio of the oxide semiconductor film 108 to be formed is , ±40 of the atomic ratio of the metal elements contained in the above sputtering target Includes % variation. For example, the set of sputtering targets used for the oxide semiconductor film 108 When the composition is In:Ga:Zn=4:2:4.1 [atomic ratio], the oxide semiconductor film that is deposited is... The composition of 10⁸ can be close to In:Ga:Zn = 4:2:3 [atomic ratio].
[0095] Furthermore, the oxide semiconductor film 108 has an energy gap of 2 eV or more, preferably 2.5 eV. It is above eV. In this way, by using oxide semiconductors with a wide energy gap, The off-current of transistor 100 can be reduced.
[0096] Furthermore, the oxide semiconductor film 108 is preferably a non-single-crystal structure. Examples of non-single-crystal structures include... For example, CAAC-OS (C Axis Aligned Crystallin), which will be discussed later. e Oxide Semiconductor), polycrystalline structure, microcrystalline structure, or amorphous structure. It includes a crystalline structure. In non-single crystal structures, the amorphous structure has the highest defect level density, CAAC -OS has the lowest defect level density.
[0097] [Insulating film that functions as a protective insulating film 1] The insulating films 114 and 116 function as protective insulating films for the transistor 100. Furthermore, the insulating films 114 and 116 have the function of supplying oxygen to the oxide semiconductor film 108. In other words, insulating films 114 and 116 contain oxygen. Also, insulating film 114 is permeable to oxygen. It is an insulating film that can form. Note that insulating film 114 will form insulating film 116 which will be formed later. It also functions as a damage mitigation film for the oxide semiconductor film 108 during this process.
[0098] The insulating film 114 has a thickness of 5 nm to 150 nm, preferably 5 nm to 50 nm. Silicon oxide, silicon oxide, silicon nitride, etc., with a size of nm or smaller can be used.
[0099] Furthermore, the insulating film 114 preferably has a low defect count, and typically, ESR measurement is used to determine its defect count. Furthermore, the spin density of the signal appearing at g=2.001 originates from the dangling bond of silicon. 3 x 10 17 spins / cm 3 The following is preferable. This is because the insulating film 114 If the defect density is high, oxygen will bond to the defects, and oxygen in the insulating film 114 will be lost. The transparency decreases.
[0100] Furthermore, in the insulating film 114, all of the oxygen that enters the insulating film 114 from the outside is absorbed by the insulating film 11 Some oxygen does not move to the outside of 4 and remains in the insulating film 114. Also, oxygen in the insulating film 114 As it enters, the oxygen contained in the insulating film 114 moves to the outside of the insulating film 114, thus insulating Oxygen migration may occur in the film 114. The insulating film 114 is permeable to oxygen. When an oxide insulating film is formed that can be made, the insulating film 116 provided on the insulating film 114 The desorbed oxygen can be transferred to the oxide semiconductor film 108 via the insulating film 114. .
[0101] Furthermore, the insulating film 114 is formed using an oxide insulating film with a low energy level density due to nitrogen oxides. This can be achieved. Furthermore, the level density caused by the nitrogen oxide is the value of the oxide semiconductor film. The energy at the top of the electron band (Ev_os) and the energy at the bottom of the conduction band of an oxide semiconductor film. It may be formed between (Ec_os). As the above oxide insulating film, a silicon oxynitride film with a small amount of nitrogen oxide release, or an aluminum oxynitride film with a small amount of nitrogen oxide release, etc. can be used. A silicon oxynitride film with a small amount of nitrogen oxide release, or an aluminum oxynitride film with a small amount of nitrogen oxide release, etc. can be used. For example, a silicon oxynitride film with a small amount of nitrogen oxide release, or an aluminum oxynitride film with a small amount of nitrogen oxide release, etc. can be used.
[0102] In addition, a silicon oxynitride film with a small amount of nitrogen oxide release is a film in which the ammonia release amount is larger than the nitrogen oxide release amount in temperature-programmed desorption gas analysis (TD S: Thermal Desorption Spectroscopy). Typically, the ammonia release amount is more than 1×10 / cm 18 and less than or equal to 5×10 3 / cm 19 . Here, the ammonia release amount is the release amount due to heat treatment when the surface temperature of the film is 50°C or higher and 650°C or lower, preferably 50°C or higher and 550°C or lower. 3 Here, the ammonia release amount is the release amount due to heat treatment when the surface temperature of the film is 50°C or higher and 650°C or lower, preferably 50°C or higher and 550°C or lower. Here, the ammonia release amount is the release amount due to heat treatment when the surface temperature of the film is 50°C or higher and 650°C or lower, preferably 50°C or higher and 550°C or lower. Here, the ammonia release amount is the release amount due to heat treatment when the surface temperature of the film is 50°C or higher and 650°C or lower, preferably 50°C or higher and 550°C or lower.
[0103] Nitrogen oxides (NO x , where x is greater than 0 and less than or equal to 2, preferably 1 or more and 2 or less), typically NO2 or NO, form levels in the insulating film 114, etc. These levels are located within the energy gap of the oxide semiconductor film 108. Therefore, when nitrogen oxides diffuse to the interface between the insulating film 114 and the oxide semiconductor film 108, these levels may trap electrons on the insulating film 114 side. As a result, the trapped electrons stay near the interface between the insulating film 114 and the oxide semiconductor film 108, causing the threshold voltage of the transistor to shift in the positive direction. As a result, the trapped electrons stay near the interface between the insulating film 114 and the oxide semiconductor film 108, causing the threshold voltage of the transistor to shift in the positive direction. As a result, the trapped electrons stay near the interface between the insulating film 114 and the oxide semiconductor film 108, causing the threshold voltage of the transistor to shift in the positive direction. As a result, the trapped electrons stay near the interface between the insulating film 114 and the oxide semiconductor film 108, causing the threshold voltage of the transistor to shift in the positive direction.
[0104] In addition, nitrogen oxides react with ammonia and oxygen during heat treatment. The nitrogen oxides contained in the insulating film 114 react with the ammonia contained in the insulating film 116 during heat treatment. The nitrogen oxides contained in the insulating film 114 react with the ammonia contained in the insulating film 116 during heat treatment. Therefore, nitrogen oxides contained in the insulating film 114 are reduced. At the interface of the oxide semiconductor film 108, electrons are less likely to be trapped.
[0105] By using the above oxide insulating film as the insulating film 114, the threshold voltage of the transistor can be adjusted. This makes it possible to reduce the shift and reduce fluctuations in the electrical characteristics of the transistor. can.
[0106] Furthermore, the heat treatment in the transistor manufacturing process typically involves heating to temperatures between 300°C and 350°C. Due to the heat treatment, the insulating film 114 has a spectrum obtained by measuring at an ESR of 100K or less. In this case, the first signal is when the g value is 2.037 or higher and 2.039 or lower, and the second signal is when the g value is 2.001 or higher. A second signal of 0.003 or less, and a third signal with a g value of 1.964 or more and 1.966 or less. Null is observed. Note that the split width of the first signal and the second signal, and the The split width of the second signal and the third signal is approximately 5 in the X-band ESR measurement. It is mT. Also, the first signal is when the g value is between 2.037 and 2.039, and the g value is 2. A second signal between 0.001 and 2.003, and a g value between 1.964 and 1.966. The sum of the spin densities of the third signal is 1 × 10 18 spins / cm 3 Less than For example, 1 x 10 17 spins / cm 3 The above 1 x 10 18 spins / cm 3 Not yet It is full.
[0107] Furthermore, in ESR spectra below 100K, the g value is between 2.037 and 2.039. Below are the first signal, the second signal with a g value between 2.001 and 2.003, and the g value The sum of the spin densities of the third signal, where is between 1.964 and 1.966, is nitrogen acid Monster (NO x (where x is greater than 0 and less than or equal to 2, preferably between 1 and 2) the signal caused This corresponds to the sum of the pin densities. Typical examples of nitrogen oxides include nitric oxide and nitrogen dioxide. Yes. That is, the first signal is when the g value is between 2.037 and 2.039, and the g value is between 2.001 The second signal is 2.003 or less, and the g value is between 1.964 and 1.966. The lower the sum of the spin densities of the third signal, the more nitrogen oxides contained in the oxide dielectric film are present. It can be said that the content is low.
[0108] Furthermore, the above oxide insulating film has a nitrogen concentration of 6 × 10 as measured by SIMS. 20 atoms / cm 3 The following applies:
[0109] The substrate temperature is between 220°C and 350°C, and PEC is performed using silane and nitrous oxide. By forming the above oxide insulating film using the VD method, a dense and hard film is obtained. It can be formed.
[0110] The insulating film 116 is an oxide insulating film containing more oxygen than satisfies the stoichiometric composition. Yes. The above oxide insulating film undergoes partial oxygen desorption upon heating. Note that in TDS The above oxide insulating film has an oxygen release rate of 1.0 × 10 19 atoms / cm 3 That's all good Mashikuha 3.0 × 10 20 atoms / cm 3 It has the above region. Also, the above oxygen The amount released is when the heat treatment temperature in TDS is between 50°C and 650°C, or above 50°C. This is the total amount in the range below 550°C. Furthermore, the oxygen release amount mentioned above is the oxygen in TDS. This is the total amount when converted to atoms.
[0111] The insulating film 116 has a thickness of 30 nm to 500 nm, preferably 50 nm or more. Silicon oxide, silicon oxide nitride, etc., with a wavelength of 400 nm or less can be used.
[0112] Furthermore, it is preferable that the insulating film 116 has a low defect count, and typically, ESR measurement is used to determine this. Furthermore, the spin density of the signal appearing at g=2.001 originates from the dangling bond of silicon. is 1.5 × 10 18 spins / cm 3 Less than, and even 1 × 10 18 spins / cm 3 The following is preferable. Note that the insulating film 116 is an oxide semiconductor compared to the insulating film 114. Because it is separated from the body film 108, it can have a higher defect density than the insulating film 114.
[0113] Furthermore, insulating films 114 and 116 can be made of the same type of insulating material, thus providing insulation. In some cases, the interface between film 114 and insulating film 116 cannot be clearly identified. Therefore, in this implementation... In the diagram, the interface between insulating film 114 and insulating film 116 is shown with a dashed line. In the embodiment, a two-layer structure of insulating film 114 and insulating film 116 was described, but It is not limited to this, but for example, a single-layer structure of the insulating film 114, or a stacked structure of three or more layers That's good too.
[0114] [Insulating film functioning as a protective insulating film 2] The insulating film 118 functions as a protective insulating film for the transistor 100.
[0115] The insulating film 118 contains either hydrogen or nitrogen, or both. 18 contains nitrogen and silicon. The insulating film 118 contains oxygen, hydrogen, water, and alkali. It has the function of blocking metals, alkaline earth metals, etc. By providing an insulating film 118 Therefore, the diffusion of oxygen from the oxide semiconductor film 108 to the outside and the insulating films 114 and 116 The diffusion of oxygen to the outside and the intrusion of hydrogen, water, etc. from the outside into the oxide semiconductor film 108. It can be prevented.
[0116] For example, a nitride insulating film can be used as the insulating film 118. Examples include silicon nitride, silicon oxide nitride, aluminum nitride, and aluminum oxide nitride. These include:
[0117] The various films mentioned above, such as conductive films, insulating films, oxide semiconductor films, and metal films, are... It can be formed by sputtering or PECVD, but other methods, for example, Even if formed by the thermal CVD (Chemical Vapor Deposition) method Good. MOCVD (Metal Organic Chemical) is an example of a thermal CVD method. (Vapor Deposition) method, or ALD (Atomic Layer Deposition) method. Examples include the deposition method.
[0118] Thermal CVD is a film deposition method that does not use plasma, so defects can occur due to plasma damage. It has the advantage that it does not occur. Also, as a thermal CVD method, the raw material gas is channeled The film can be deposited into a bar, the chamber can be cooled to atmospheric pressure or reduced pressure, and the film can be deposited onto the substrate. .
[0119] Furthermore, in the ALD method, the raw material gas is sent into a chamber, and the pressure inside the chamber is reduced to atmospheric pressure or The process can be carried out under reduced pressure, and the film can be deposited on the substrate.
[0120] <1-3. Semiconductor device configuration example 2> Next, regarding modified versions of the transistor 100 shown in Figures 1(A), 1(B), and 1(C), see Figures 2 through This will be explained using Figure 6.
[0121] Figure 2(A) is a top view of transistor 100A, which is a semiconductor device according to one embodiment of the present invention. Figure 2(B) is a cross-sectional view of the section between the dashed-dotted line X1-X2 shown in Figure 2(A). Figure 2(C) is a cross-sectional view of the section between the dashed line Y1 and Y2 shown in Figure 2(A). It corresponds to.
[0122] The transistor 100A shown in Figures 2(A) and 2(B) is a so-called channel-protected transistor. This is the structure. Thus, one aspect of the present invention provides a semiconductor device that is channel etched and channel etched. Both transistor structures with Nell protection can be used.
[0123] In transistor 100A, insulating films 114 and 116 are located at the opening 141a. It has 141b. Furthermore, it has connections with the oxide semiconductor film 108 through the openings 141a and 141b. The conductive films 112a and 112b are connected. In addition, an insulating layer is placed on the conductive films 112a and 112b. Film 118 is formed. In addition, insulating films 114 and 116 are so-called channel protective films. It has the following functions. Note that the other components of transistor 100A are as shown in the transistors above. It is the same as 100 and produces the same effect.
[0124] Furthermore, Figure 3(A) shows the top surface of transistor 100B, which is a semiconductor device according to one embodiment of the present invention. Figure 3(B) shows a cross-section of the section between the dashed-dotted line X1 and X2 shown in Figure 3(A). This corresponds to the figure, and Figure 3(C) shows the cross section of the cross-section between the dashed line Y1-Y2 shown in Figure 3(A). This corresponds to a surface drawing.
[0125] Transistor 100B consists of a conductive film 104 on substrate 102 and substrate 102 and conductive film 10 4 insulating film 106, oxide semiconductor film 108 on insulating film 106, oxide semiconductor film 10 The conductive film 112a on 8, the conductive film 112b on the oxide semiconductor film 108, and the oxide semiconductor film 108, conductive film 112a, and insulating film 114 on conductive film 112b, and insulating film 114 on insulating film 114 The edge film 116, the conductive film 120a on the insulating film 116, and the conductive film 120b on the insulating film 116 It comprises an insulating film 116, a conductive film 120a, and an insulating film 118 on the conductive film 120b.
[0126] Furthermore, insulating films 114 and 116 have openings 142a. Also, insulating films 106 and 11 4, 116 has an opening 142b. The conductive film 120a is through the opening 142b, The conductive film 104 is electrically connected. Also, the conductive film 120b is connected through the opening 142a. It is electrically connected to the conductive film 112b.
[0127] Furthermore, in transistor 100B, the insulating film 106 is the first The insulating films 114 and 116 function as gate insulating films for transistor 100B. The insulating film 118 functions as a second gate insulating film, protecting transistor 100B. It functions as an insulating film. Furthermore, in transistor 100B, the conductive film 104 is... The conductive film 112a has the function of a first gate electrode and the function of a source electrode. Furthermore, the conductive film 112b functions as a drain electrode. Also, transistor 100 In B, the conductive film 120a functions as a second gate electrode, and the conductive film 120b It functions as a pixel electrode in a display device.
[0128] As shown in Figure 3(C), the conductive film 120a is connected to the conductive film 1 through the opening 142b. It is electrically connected to 04. Therefore, conductive film 104 and conductive film 120a are at the same potential. It is given.
[0129] Furthermore, as shown in Figure 3(C), the oxide semiconductor film 108 is a conductive film 104, and the conductive film It is positioned opposite 120a and sandwiched between two conductive films that function as gate electrodes. The length of the conductive film 120a in the channel length direction, and the length of the conductive film 120a in the channel width direction. The length of the oxide semiconductor film 108 in the channel length direction, and the channel of the oxide semiconductor film 108 Each length is longer than the width of the film, and the entire oxide semiconductor film 108 is the insulating film 114, It is covered with a conductive film 120a via 116.
[0130] In other words, conductive film 104 and conductive film 120a are provided on insulating films 106, 114, and 116. It is connected at the opening and located outside the side edge of the oxide semiconductor film 108. It has a region that does so.
[0131] With this configuration, the oxide semiconductor film 10 included in the transistor 100B Point 8 can be electrically surrounded by the electric fields of conductive film 104 and conductive film 120a. Like the 100B transistor, the electric fields of the first and second gate electrodes create a ch The device structure of a transistor electrically surrounds an oxide semiconductor film in which a channel region is formed. This can be called a Surrounded Channel (S-Channel) structure. .
[0132] Since transistor 100B has an S-channel structure, the first gate electrode and The conductive film 104 functions in such a way that it effectively induces an electric field to create a channel in the oxide semiconductor. Since it can be applied to the conductive film 108, the current driving capability of transistor 100B is improved. This makes it possible to obtain high on-current characteristics. Furthermore, it is possible to increase the on-current. Therefore, it is possible to miniaturize transistor 100B. Also, transistor 1 00B is an oxide semiconductor film 108 which functions as a first gate electrode conductive film 104 and Because it has a structure surrounded by a conductive film 120a that functions as a second gate electrode, This can increase the mechanical strength of the Rangista 100B.
[0133] Note that conductive films 120a and 120b are the conductive films 104, 112a, and 112 shown above. Materials similar to those listed in b can be used. In particular, conductive films 120a and 120b For this purpose, an oxide conductive film (OC) is preferred. By using this method, oxygen can be added to the insulating films 114 and 116.
[0134] The other configurations of transistor 100B are the same as those of transistor 100 shown above. Yes, and it produces a similar effect.
[0135] Furthermore, Figure 4(A) shows the top surface of transistor 100C, which is a semiconductor device according to one embodiment of the present invention. Figure 4(B) shows a cross-section of the section between the dashed-dotted line X1 and X2 shown in Figure 4(A). This corresponds to the figure, and Figure 4(C) shows the cross section of the cross-section between the dashed line Y1-Y2 shown in Figure 4(A). This corresponds to a surface drawing.
[0136] Transistor 100C has the conductive film 112a, 1 of the transistor 100B shown above. 12b is configured as a three-layer laminated structure.
[0137] The conductive film 112a of transistor 100C consists of conductive film 112a_1 and conductive film 11 The conductive film 112a_2 on 2a_1 and the conductive film 112a_3 on conductive film 112a_2, It has. Also, the conductive film 112b of transistor 100C is conductive film 112b_1 and , conductive film 112b_2 on conductive film 112b_1, and conductive film 112 on conductive film 112b_2 It has b_3 and
[0138] For example, conductive film 112a_1, conductive film 112b_1, conductive film 112a_3, and conductive film 112b_3 includes titanium, tungsten, tantalum, molybdenum, indium, and Preferably, it has one or more selected from lium, tin, and zinc. Furthermore, the conductive films 112a_2 and 112b_2 are copper, aluminum, and silver. It is preferable to have one or more of the following selected from among them.
[0139] More specifically, conductive film 112a_1, conductive film 112b_1, conductive film 112a_3, and And the conductive film 112b_3 uses In-Sn oxide or In-Zn oxide, and the conductive film 112 Copper can be used for a_2 and the conductive film 112b_2.
[0140] By adopting the above configuration, the wiring resistance of the conductive films 112a and 112b is reduced, and the oxide semi-semi This is preferable because it can suppress the diffusion of copper into the conductive film 108. Furthermore, by adopting the above configuration, This is preferable because it can lower the connection resistance between the conductive film 112b and the conductive film 120b. The other configurations of transistor 100C are the same as those of transistor 100 shown above. Yes, and it produces a similar effect.
[0141] Furthermore, Figure 5(A) shows the top surface of transistor 100D, which is a semiconductor device according to one embodiment of the present invention. Figure 5(B) shows a cross-section of the section between the dashed-dotted line X1 and X2 shown in Figure 5(A). This corresponds to the figure, and Figure 5(C) shows the cross section of the cross-section between the dashed line Y1-Y2 shown in Figure 5(A). This corresponds to a surface drawing.
[0142] Transistor 100D has the conductive film 112a, 1 of the transistor 100B shown above. The 12b is configured as a three-layer stacked structure. Also, transistor 100D is as shown above. The conductive films 112a and 112b present in the lampistor 100C and the shape of the conductive films 112a and 112b The condition is different.
[0143] The conductive film 112a of transistor 100D consists of conductive film 112a_1 and conductive film 11 The conductive film 112a_2 on 2a_1 and the conductive film 112a_3 on conductive film 112a_2, It has. Also, the conductive film 112b of transistor 100C is conductive film 112b_1 and , conductive film 112b_2 on conductive film 112b_1, and conductive film 112 on conductive film 112b_2 b_3 and have. Note that conductive film 112a_1, conductive film 112a_2, conductive film 112a _3, conductive film 112b_1, conductive film 112b_2, and conductive film 112b_3 are, first The materials shown can be used.
[0144] Furthermore, the edge of conductive film 112a_1 is located further out than the edge of conductive film 112a_2. The conductive film 112a_3 has a region and covers the upper and side surfaces of the conductive film 112a_2, and conducts It has a region that is in contact with the conductive film 112a_1. Also, the edge of the conductive film 112b_1 is connected to the conductive film 1 Having a region located outside the edge of 12b_2, the conductive film 112b_3 is the conductive film 11 It covers the top and side surfaces of 2b_2 and has a region that is in contact with the conductive film 112b_1.
[0145] By adopting the above configuration, the wiring resistance of the conductive films 112a and 112b is reduced, and the oxide semi-semi This is preferable because it can suppress the diffusion of copper into the conductive film 108. The structure shown in transistor 100D is preferable to that of transistor 00C in that it effectively suppresses copper diffusion. This can be achieved. Furthermore, the above configuration allows for the connection between the conductive film 112b and the conductive film 120b. It is suitable because the resistance can be lowered. Furthermore, other structures of transistor 100D The result is the same as that of transistor 100 shown earlier, and it produces the same effect.
[0146] Furthermore, Figure 6(A) shows the top surface of transistor 100E, which is a semiconductor device according to one embodiment of the present invention. Figure 6(B) shows a cross-section of the section between the dashed-dotted line X1 and X2 shown in Figure 6(A). This corresponds to the figure, and Figure 6(C) shows the cross section of the cross-section between the dashed line Y1-Y2 shown in Figure 6(A). This corresponds to a surface drawing.
[0147] Transistor 100E is the same as transistor 100D shown above, and conductive films 120a and 120 The position of b is different. Specifically, the conductive films 120a and 120b of transistor 100E are, It is located on the insulating film 118. The other components of transistor 100E are as shown above. It is similar to the Rangista 100D and produces the same effect.
[0148] Furthermore, the transistor according to this embodiment comprises transistors having the above structure, each of which is It can be freely combined.
[0149] <1-4. Example of Semiconductor Device Configuration 3> Transistors 100, 100A, 100B, 100C, 100D, shown in Figures 1 to 6. And another form of 100E will be described.
[0150] The transistors 100, 100A, 100B, 100C, 100D, and 100 mentioned above In E, the ratio of the number of In atoms to the number of Zn atoms in the oxide semiconductor film 108_1 is, This ratio of the number of In atoms to the number of Zn atoms in the semiconductor film 10⁸⁻² may be greater than the ratio of the number of In atoms to the number of Zn atoms in this semiconductor film 10⁸⁻². Metal elements of oxide semiconductor film 108_1 and oxide semiconductor film 108_2 that satisfy such conditions The atomic ratios are explained below.
[0151] For example, the ratio of the number of atoms of In, M, and Zn in an oxide semiconductor film 108_1 is In It is preferable to have a ratio of :M:Zn = 4:2:3. In, M of oxide semiconductor film 108_2 It is preferable that the ratio of the number of atoms of In and Zn be in the vicinity of In:M:Zn = 1:1:1. Here, A neighborhood is defined as a state where, if In is 1, M is between 0.5 and 1.5, and Zn is between 0.1 and 2. This includes the following: or the ratio of the number of In, M, and Zn atoms in the oxide semiconductor film 108_2. It is preferable to have a neighborhood of In:M:Zn = 5:1:6. Here, a neighborhood is defined as the case where In is 5. M is between 0.5 and 1.5, and Zn is between 5 and 7.
[0152] Furthermore, oxide semiconductor film 108_1 has a greater electron affinity than oxide semiconductor film 108_2. The electron affinity of oxide semiconductor film 108_1 and the electron affinity of oxide semiconductor film 108_2 The difference is 0.15 eV or more, or 0.5 eV or more and 2 eV or less, or 1 eV or less. It is preferable that the oxide semiconductor film 108_2 is the oxide semiconductor film 108 The energy level at the lower end of the conduction band is closer to the vacuum level than in _1, and typically, oxide semiconductor films... The energy levels at the lower end of the conduction band of 108_1 and the energy levels at the lower end of the conduction band of the oxide semiconductor film 108_2 The difference from the energy level is 0.15 eV or greater, or 0.5 eV or greater and 2 eV or less. Alternatively, it is preferable that the voltage is 1 eV or less.
[0153] With this configuration, the oxide semiconductor film 108 in transistor 100 1 is the main current path. That is, the oxide semiconductor film 108_1 is the channel region. It has the function of [this function]. In addition, the oxide semiconductor film 108_2 is an oxide in which a channel region is formed An oxide semiconductor film composed of the same metal elements as the metal elements that make up the semiconductor film 108_1 This configuration is formed. At the interface with 10⁸⁺², interfacial scattering is less likely to occur. Therefore, carriers at this interface Because the movement of A is not hindered, the field-effect mobility of the transistor increases.
[0154] Furthermore, having such a configuration allows for a large drain voltage in transistor 100. It is possible to suppress threshold voltage fluctuations that depend on the size, and the reliability of the transistor. It can improve.
[0155] Oxide semiconductor film 108_1 and oxide semiconductor film 108_2 are independently, In The region in which the atomic ratio of is greater than that of M results in the field effect of transistor 100. The mobility can be increased. Specifically, the field-effect mobility of transistor 100 is 5 0cm 2 The field-effect mobility of transistor 100 is greater than / Vs, and more preferably 10 0cm 2 It becomes possible to exceed / Vs. Also, compared to oxide semiconductor film 108_2 Oxide semiconductors with a large ratio of In atoms to Zn atoms are used to create oxide semiconductor films 108_ By using it in 1, the oxide semiconductor film 108_1 functions as a channel, and the main current path and Yes. Because it is possible to separate the current path from the back channel, in the channel region It is possible to reduce electron traps. As a result, the variation in the electrical characteristics of the transistor can be reduced. It can be reduced.
[0156] By increasing the atomic ratio of Zn to the sum of In, M, and Zn, the bonding of oxide semiconductor films is improved. Crystallinity can be improved. Highly crystalline oxide semiconductor films can be free of impurities, such as hydrogen. This means that water, or the constituent elements used in the conductive films 112a and 112b, do not easily diffuse into the film. (See below) CAAC-OS excels in these functions. It is contained in the oxide semiconductor film 108_2. By setting the atomic ratio of the metal elements within the above range, the oxide semiconductor film 108_1 and the oxide semiconductor film The amount of impurities in the conductive film 108_2 can be reduced. Also, the oxide semiconductor film 108_2 Because it can function as an etching stopper, different transistors In this case, the thickness of the oxide semiconductor film 108 varies due to etching of the conductive films 122a and 112b. Adhesion can be reduced. Thus, the oxide semiconductor film 108_1 and the oxide semiconductor By changing the atomic ratio of the metal elements contained in each of the films 108_2, at least In and Zn... This improves the field-effect mobility of transistor 100, and also improves the field-effect mobility of transistor 100 This can increase reliability.
[0157] <1-5-1. Method for Manufacturing Semiconductor Devices 1> Next, regarding the method for manufacturing a transistor 100B, which is a semiconductor device according to one aspect of the present invention, This will be explained using Figures 7 through 10.
[0158] Note that Figures 7(A) to 7(C), 8(A) to 8(C), and 9(A) to 9( Figures C), and 10(A) to 10(C) are cross-sectional views illustrating a method for manufacturing a semiconductor device. Yes. Also, see Figures 7(A) to 7(C), Figures 8(A) to 8(C), Figures 9(A) to 9(C). In 9(C) and Figures 10(A) to 10(C), the left side is a cross-sectional view in the direction of the channel length. The right side is a cross-sectional view in the channel width direction.
[0159] First, a conductive film is formed on the substrate 102, and the conductive film is subjected to a lithography process and an etching process. The process is carried out to form a conductive film 104 that functions as the first gate electrode. An insulating film 106, which functions as a first gate insulating film, is formed on the film 104 (Figure 7(A)). reference).
[0160] In this embodiment, a glass substrate is used as the substrate 102 and functions as the first gate electrode. As the conductive film 104, a titanium film with a thickness of 50 nm and a copper film with a thickness of 200 nm are used. These are formed by sputtering. In addition, a nitriding film with a thickness of 400 nm is used as the insulating film 106. A silicon film and a silicon oxidizride film with a thickness of 50 nm are formed by the PECVD method.
[0161] The silicon nitride film described above comprises a first silicon nitride film, a second silicon nitride film, and a third silicon nitride film. It is a three-layer laminated structure having three silicon nitride films. An example of this three-layer laminated structure is: It can be formed as follows:
[0162] For example, the first silicon nitride film is silane at a flow rate of 200 sccm, and silane at a flow rate of 2000 sccm. PE-CV uses sccm of nitrogen and ammonia gas at a flow rate of 100 sccm as raw material gases. It supplies power to the reaction chamber of apparatus D, controls the pressure inside the reaction chamber to 100 Pa, and uses a high frequency of 27.12 MHz. If you supply 2000W of power using a frequency power supply and form it to a thickness of 50nm, good.
[0163] The second silicon nitride film was a silane at a flow rate of 200 sccm, and a flow rate of 2000 sccm Nitrogen and ammonia gas at a flow rate of 2000 sccm are used as raw material gases in a PECVD apparatus. A 27.12 MHz high-frequency power supply is supplied to the reaction chamber, controlling the pressure inside the chamber to 100 Pa. By supplying 2000W of power using this method, the material can be formed to a thickness of 300nm.
[0164] The third silicon nitride film is a silane at a flow rate of 200 sccm, and a silane at a flow rate of 5000 sccm. A nitrogen atom at a concentration of 1 cm is supplied as a raw material gas to the reaction chamber of the PECVD apparatus, and the pressure inside the reaction chamber is set to 100. It is controlled to Pa and supplied with 2000W of power using a 27.12MHz high-frequency power supply, It should be formed so that the depth is 50 nm.
[0165] Furthermore, the first silicon nitride film, the second silicon nitride film, and the third silicon nitride film The substrate temperature during formation can be kept below 350°C.
[0166] By making the silicon nitride film a three-layer laminated structure as described above, for example, the conductive film 104 contains copper. When a conductive film is used, the following effects are achieved.
[0167] The first silicon nitride film can suppress the diffusion of copper elements from the conductive film 104. The second silicon nitride film has the function of releasing hydrogen and acts as an insulator, functioning as a gate insulating film. The pressure resistance of the film can be improved. The third silicon nitride film is the third silicon nitride film or This reduces hydrogen release and suppresses the diffusion of hydrogen released from the second silicon nitride film. It is possible.
[0168] Next, an oxide semiconductor film 108_1_0 and an oxide semiconductor film 108_ It forms 2_0 (see Figures 7(B) and 7(C)).
[0169] Figure 7(B) shows an oxide semiconductor film 108_1_0 on an insulating film 106, and an oxide semiconductor film 108_1_0 on an insulating film 106. This is a schematic cross-sectional view of the inside of the film deposition apparatus used when forming the conductive film 108_2_0. , a sputtering apparatus is used as the film deposition apparatus, and installed inside the sputtering apparatus Target 191 and plasma 192 formed below target 191 are schematically This is shown.
[0170] In Figure 7(B), the oxygen or excess oxygen added to the insulating film 106 is schematically represented. This is represented by a dashed arrow. For example, when oxygen gas is used during the deposition of an oxide semiconductor film 108_1_0 When used, oxygen can be suitably added to the insulating film 106.
[0171] First, an oxide semiconductor film 108_1_0 is formed on the insulating film 106. The thickness of 08_1_0 is 1 nm to 25 nm, preferably 5 nm to 20 nm. The following is acceptable. Also, the oxide semiconductor film 108_1_0 is an inert gas (typically A It is formed using either or both of the following gases: r gas and oxygen gas. The proportion of oxygen gas in the total film-forming gas when forming the body membrane 108_1_0 (hereinafter referred to as oxygen flow) The ratio (also called the quantity ratio) is 0% or more and less than 30%, preferably 5% or more and 15% or less.
[0172] By forming an oxide semiconductor film 108_1_0 with an oxygen flow rate ratio within the above range, The crystallinity of the body film 108_1_0 can be made lower than that of the oxide semiconductor film 108_2_0. ru.
[0173] Next, an oxide semiconductor film 108_2_0 is formed on the oxide semiconductor film 108_1_0. Furthermore, when forming the oxide semiconductor film 108_2_0, the atmosphere containing oxygen gas is used. The Zuma is discharged. At that time, the oxide semiconductor film 108_2_0 that is to be formed on the oxide semiconductor film Oxygen is added to the conductive film 108_1_0. Furthermore, the oxide semiconductor film 108_2_0 is formed The oxygen flow rate ratio during this process should be 30% to 100%, preferably 50% to 100%. It is less than or equal to % and more preferably between 70% and 100%.
[0174] Furthermore, the thickness of the oxide semiconductor film 108_2_0 is between 20 nm and 100 nm. Preferably, the wavelength should be between 20 nm and 50 nm.
[0175] As mentioned above, the conditions for forming the oxide semiconductor film 108_2_0 are as follows: It is preferable to increase the oxygen flow rate ratio compared to the body membrane 10⁸⁰. In other words, oxide semiconductor film 108_1_0 is formed at a lower oxygen partial pressure than the oxide semiconductor film 108_2_0. preferable.
[0176] Furthermore, during the formation of oxide semiconductor film 108_1_0 and oxide semiconductor film 108_2_0 The substrate temperature should be between room temperature (25°C) and 200°C, preferably between room temperature and 130°C. This is how it should be done. By setting the substrate temperature within the above range, a large-area glass substrate (for example, as described above) This is particularly suitable when using the 8th to 10th generation glass substrates listed above. The substrate temperature during the deposition of the conductive film 108_1_0 and the oxide semiconductor film 108_2_0 is Maintaining room temperature can suppress the bending or distortion of the substrate. Furthermore, oxide semiconductors... If you want to improve the crystallinity of the film 108_2_0, the oxide semiconductor film 108_2_0 It is preferable to increase the substrate temperature during formation.
[0177] Furthermore, the oxide semiconductor film 108_1_0 and the oxide semiconductor film 108_2_0 were in a vacuum. Forming them continuously is preferable because it prevents impurities from being incorporated into each interface.
[0178] Furthermore, it is necessary to increase the purity of the sputtering gas. For example, as a sputtering gas The oxygen gas or argon gas used has a dew point of -40°C or lower, preferably -80°C or lower. A gas that has been purified to a temperature of -100°C or lower, more preferably -120°C or lower. By using this method, it is possible to prevent moisture and other substances from being incorporated into the oxide semiconductor film as much as possible. .
[0179] Furthermore, when depositing an oxide semiconductor film by sputtering, in the sputtering apparatus... The chamber is designed to remove as much water and other impurities as possible from the oxide semiconductor film. Using an adsorption-type vacuum pump such as an IO pump, a high vacuum (5 × 10) can be achieved. -7 From Pa 1 ×10 -4 It is preferable to exhaust the air to approximately Pa. In particular, during the standby time of the sputtering equipment. At that time, gas molecules equivalent to H2O in the chamber (gas molecules equivalent to m / z=18) The partial pressure of the child is 1 × 10 -4 Pa or less, preferably 5 × 10 -5 It is preferable to keep it below Pa. stomach.
[0180] In this embodiment, the formation conditions for the oxide semiconductor film 108_1_0 are In-Ga- Using a Zn metal oxide target (In:Ga:Zn = 4:2:4.1 [atomic ratio]) It is formed by sputtering. Also, the base when forming the oxide semiconductor film 108_1_0 The plate temperature was set to room temperature, and argon gas was used as the film deposition gas at a flow rate of 180 sccm, and argon gas at a flow rate of 20 sccm. Use a cm of oxygen gas (oxygen flow rate ratio of 10%).
[0181] Furthermore, the formation conditions for the oxide semiconductor film 108_2_0 include In-Ga-Zn metal oxidation Using a material target (In:Ga:Zn=4:2:4.1 [atomic ratio]), sputtering It is formed by a sizing method. Furthermore, the substrate temperature during the formation of the oxide semiconductor film 108_2_0 is set to room temperature. Furthermore, oxygen gas at a flow rate of 200 sccm is used as the film-forming gas (oxygen flow rate ratio of 100%).
[0182] Oxygen flow during film formation of oxide semiconductor film 108_1_0 and oxide semiconductor film 108_2_0 By changing the ratio of materials, it is possible to form laminated films with different crystalline properties.
[0183] Next, oxide semiconductor film 108_1_0 and oxide semiconductor film 108_2_0 are formed into the desired shape. By processing it into this shape, island-shaped oxide semiconductor film 108_1 and island-shaped oxide semiconductor film 10 8_2 is formed. In this embodiment, the oxide semiconductor film 108_1 and acid The oxide semiconductor film 108_2 forms island-like oxide semiconductor films 108 (Figure 8(A)). reference).
[0184] Furthermore, after forming the oxide semiconductor film 108, a heat treatment (hereinafter referred to as the first heat treatment) is performed. It is preferable to perform the following. The first heat treatment removes the hydrogen contained in the oxide semiconductor film 108. Water and other elements can be reduced. Note that heat treatment aimed at reducing hydrogen, water, etc., is an oxide treatment. This may be performed before processing the semiconductor film 108 into island shapes. Note that the first heat treatment is performed on an oxide semiconductor. This is one of the processes used to improve the purity of conductive films.
[0185] The first heat treatment is, for example, 150°C or higher, but below the strain point of the substrate, preferably 200°C. The temperature should be between ℃ and 450℃, and more preferably between 250℃ and 350℃.
[0186] Furthermore, the first heat treatment can be carried out using an electric furnace, an RTA device, etc. By using this method, heat treatment can be performed at a temperature above the strain point of the substrate for a short period of time. Therefore, the heating time can be shortened. In addition, the first heat treatment involves nitrogen, oxygen, and superoxide. Dry air (water content of 20 ppm or less, preferably 1 ppm or less, preferably 10 ppm) The procedure can be carried out under an atmosphere of air (below b) or a noble gas (argon, helium, etc.). Preferably, the above nitrogen, oxygen, ultra-dry air, or noble gas does not contain hydrogen, water, etc. Furthermore, after heat treatment in a nitrogen or noble gas atmosphere, heating in an oxygen or ultra-dry air atmosphere. This may be done. As a result, hydrogen, water, etc. contained in the oxide semiconductor film are removed, and acid This allows oxygen to be supplied into the oxide semiconductor film. As a result, the oxygen contained in the oxide semiconductor film It can reduce oxygen deficiency.
[0187] Next, a conductive film 112 is formed on the insulating film 106 and the oxide semiconductor film 108 (Figure 8( See B).
[0188] In this embodiment, the conductive film 112 consists of a titanium film with a thickness of 30 nm and a titanium film with a thickness of 200 nm A copper film and a 10 nm thick titanium film are deposited sequentially by sputtering. ru.
[0189] Next, the conductive film 112 is processed into a desired shape, resulting in island-shaped conductive films 112a and island-shaped A conductive film 112b is formed (see Figure 8(C)).
[0190] In this embodiment, a wet etching apparatus is used to process the conductive film 112. However, the processing method for the conductive film 112 is not limited to this, for example, dryer A tuning device may be used.
[0191] Furthermore, after the formation of conductive films 112a and 112b, the oxide semiconductor film 108 (more specifically) The surface (back channel side) of the oxide semiconductor film 108_2) may be cleaned. Examples of methods include cleaning using chemical solutions such as phosphoric acid. By performing this cleaning, impurities (for example, conductive) attached to the surface of the oxide semiconductor film 108_2 can be removed. It is possible to remove elements, etc., contained in films 112a and 112b. It is not necessary to sushi, and in some cases, washing may not even be necessary.
[0192] Furthermore, either the step of forming conductive films 112a and 112b, or the cleaning step described above, In both cases, the region exposed from the conductive film 112a, 112b of the oxide semiconductor film 108. However, it may become thinner.
[0193] In addition, in a semiconductor device according to one aspect of the present invention, exposed from the conductive films 112a and 112b The region, namely the oxide semiconductor film 108_2, is an oxide semiconductor film with enhanced crystallinity. Highly crystalline oxide semiconductor films are free of impurities, especially those used in the conductive films 112a and 112b. The structure is designed to prevent the diffusion of constituent elements into the film. Therefore, it provides a highly reliable semiconductor device. It is possible.
[0194] Furthermore, in Figure 8(C), the oxide semiconductor film 1 exposed from the conductive films 112a and 112b Regarding the case where a recess is formed on the surface of 08, that is, on the surface of the oxide semiconductor film 108_2 Although illustrated as an example, the examples are not limited to oxide semiconductor films exposed from conductive films 112a and 112b. The surface of 108 does not need to have any recesses.
[0195] Next, an insulating film 114 is applied to the oxide semiconductor film 108 and the conductive films 112a and 112b, and An insulating film 116 is formed (see Figure 9(A)).
[0196] Furthermore, after forming the insulating film 114, the insulating film 116 is formed continuously without exposure to the atmosphere. It is preferable to do so. After forming the insulating film 114, do not open it to the atmosphere, and control the flow rate, pressure, and high of the raw material gas. By adjusting the frequency power and substrate temperature to one or more units, the insulating film 116 is formed continuously, The concentration of impurities originating from atmospheric components at the interface between the edge film 114 and the insulating film 116 is reduced. can.
[0197] For example, a silicon oxide nitride film is formed as the insulating film 114 using the PECVD method. This is possible. In this case, the raw material gases include a silicon-containing sedimentary gas and an oxidizing gas. It is preferable to use [a specific type of gas]. Typical examples of silicon-containing sedimentary gases include silane and disila. Examples include nitrates, trisilanes, and silane fluorides. Oxidizing gases include nitrous oxide and nitrogen dioxide. There are elements such as [unclear]. Also, the flow rate of the oxidizing gas is 20 times or more than the flow rate of the sedimentary gas mentioned above. The ratio should be 0 times or less, preferably between 40 times and 100 times.
[0198] In this embodiment, the insulating film 114 is set to a temperature of 220°C for holding the substrate 102. The raw materials are silane at a flow rate of 50 sccm and nitrous oxide at a flow rate of 2000 sccm. The pressure inside the processing chamber is set to 20 Pa, and the high-frequency power supplied to the parallel plate electrodes is 13.56 MHz. Hz, 100W (power density is 1.6 × 10⁻⁶) -2 W / cm 2 The PECVD method is used as follows: A silicon oxide nitride film is formed using this method.
[0199] As the insulating film 116, the substrate placed in the vacuum-evacuated processing chamber of the PECVD apparatus Maintain the temperature between 180°C and 350°C, introduce the raw material gas into the processing chamber, and adjust the pressure within the processing chamber. The pressure is set to 100 Pa or more and 250 Pa or less, more preferably 100 Pa or more and 200 Pa or less. , 0.17 W / cm² is applied to the electrode installed in the processing chamber. 2 More than 0.5W / cm 2 Below, further good The current level is 0.25 W / cm². 2 More than 0.35W / cm 2 The following conditions apply to supplying high-frequency power: This then forms a silicon oxide film or a silicon oxide-nitride film.
[0200] As for the film deposition conditions for the insulating film 116, the above pressure is used in the reaction chamber and the above power density is used in the high-frequency current By supplying power, the decomposition efficiency of the raw material gas in the plasma increases, and the amount of oxygen radicals increases. As the oxidation of the raw material gas progresses, the oxygen content in the insulating film 116 becomes less than the stoichiometric composition. The number also increases. On the other hand, in films formed at the above temperature, the bonding force between silicon and oxygen Because the bond is weak, some of the oxygen in the film is removed by the subsequent heat treatment. As a result, stoichiometric An oxide containing more oxygen than the theoretically required oxygen composition, with some of the oxygen being removed upon heating. An insulating film can be formed.
[0201] Furthermore, in the process of forming the insulating film 116, the insulating film 114 protects the oxide semiconductor film 108. It forms a film. Therefore, while reducing damage to the oxide semiconductor film 108, the power density is The insulating film 116 can be formed using high-frequency power.
[0202] Furthermore, in the film formation conditions for the insulating film 116, silicon-containing deposition gas against oxidizing gas By increasing the flow rate of the material, it is possible to reduce the amount of defects in the insulating film 116. ESR measurement revealed that g=2.001 originates from the dangling bond of silicon. The spin density of the signal is 6 × 10 17 spins / cm 3 Less than 3 × 10 17 spins / cm 3 The following is preferably 1.5 × 10 17 spins / cm 3 The following is missing It is possible to form an oxide insulating film with fewer depressions. As a result, the signal of transistor 100 It can enhance reliability.
[0203] Furthermore, after forming the insulating films 114 and 116, a heat treatment (hereinafter referred to as the second heat treatment) is performed. It is preferable to perform the following: The second heat treatment removes nitrogen acid contained in the insulating films 114 and 116. The amount of oxidized material can be reduced by a second heat treatment. Some of the oxygen contained in the oxide semiconductor film 108 is transferred to the oxide semiconductor film 108. This can reduce oxygen deficiency.
[0204] The temperature of the second heat treatment is typically less than 400°C, preferably less than 375°C, and Preferably, the temperature is between 150°C and 350°C. The second heat treatment involves nitrogen, oxygen, and superdry Dry air (water content of 20 ppm or less, preferably 1 ppm or less, preferably 10 ppb) The procedure can be carried out under the atmosphere of air or a noble gas (argon, helium, etc.). Preferably, the above nitrogen, oxygen, ultra-dry air, or noble gas does not contain hydrogen, water, etc. For heat treatment, an electric furnace, RTA, or the like can be used.
[0205] Next, openings 142a and 142b are formed in desired regions of the insulating films 114 and 116 (Figure 9(B)).
[0206] In this embodiment, the openings 142a and 142b are etched using a dry etching apparatus. It is formed by [doing this]. Note that the opening 142a reaches the conductive film 112b, and the opening 142b is conductive It reaches membrane 104.
[0207] Next, a conductive film 120 is formed on the insulating film 116 (see Figures 9(C) and 10(A)). .
[0208] Figure 9(C) shows a cross-section of the inside of the film deposition apparatus when forming a conductive film 120 on the insulating film 116. This is a schematic diagram of the surface. In Figure 9(C), a sputtering apparatus is used as the film deposition apparatus, and the sputtering A target 193 installed inside the tarring device, and a formation below the target 193 A schematic representation of the plasma 194 is shown.
[0209] First, when forming the conductive film 120, a plasma discharge is performed in an atmosphere containing oxygen gas. At that time, oxygen is added to the insulating film 116 which will be the surface on which the conductive film 120 is formed. When forming the conductive film 120, in addition to oxygen gas, an inert gas (for example, helium gas) is used. (Argon gas, xenon gas, etc.) may be mixed in.
[0210] As for oxygen gas, it is sufficient that it is present at least when the conductive film 120 is formed. The proportion of oxygen gas in the total film deposition gas when forming film 120 is greater than 0%. 100% or less, preferably 10% to 100%, more preferably 30% to 100% It is less than %.
[0211] In Figure 9(C), the oxygen or excess oxygen added to the insulating film 116 is schematically represented. This is represented by a dashed arrow.
[0212] In this embodiment, an In-Ga-Zn metal oxide target (In:Ga:Zn=4: A conductive film 120 is formed by sputtering using a 2:4.1 (atomic ratio).
[0213] In this embodiment, when forming the conductive film 120, oxygen is added to the insulating film 116. The methods described are examples, but are not limited to these. For example, after forming the conductive film 120, Oxygen may be added to the insulating film 116.
[0214] Methods for adding oxygen to the insulating film 116 include, for example, indium, tin, and silicon. Oxides having (In-Sn-Si oxide, also called ITSO) target (In2O Using 3:SnO2:SiO2=85:10:5 [weight%], a 5nm film thickness of ITSO was created. A film should be formed. In this case, the thickness of the ITSO film should be between 1 nm and 20 nm. Alternatively, if the wavelength is between 2 nm and 10 nm, it is possible to suitably allow oxygen to permeate while suppressing oxygen release. Therefore, it is preferable. After that, oxygen is added to the insulating film 116 by passing it through the ITSO film. Methods for adding the element include ion doping, ion implantation, and plasma treatment. Furthermore, when adding oxygen, applying a bias voltage to the substrate side allows for more effective oxygenation. The above bias voltage can be added to the insulating film 116. Using a grafting device, the power density of the bias voltage applied to the substrate side of the ashing device is set to 1 W / c m 2 More than 5W / cm 2 The following is appropriate. Furthermore, the substrate temperature when adding oxygen should be: The insulating film 1 is formed at a temperature of room temperature or higher and 300°C or lower, preferably 100°C or higher and 250°C or lower. Oxygen can be efficiently added to 16.
[0215] Next, the conductive film 120 is processed into a desired shape, resulting in island-shaped conductive films 120a and island-shaped A conductive film 120b is formed (see Figure 10(B)).
[0216] In this embodiment, a wet etching apparatus is used to process the conductive film 120.
[0217] Next, an insulating film 118 is formed on the insulating film 116 and the conductive films 120a and 120b (Figure 10(C)).
[0218] The insulating film 118 contains either hydrogen or nitrogen, or both. For example, a silicon nitride film is preferable. Also, as the insulating film 118, for example For example, it can be formed using the sputtering method or the PECVD method. When depositing the edge film 118 by PECVD, the substrate temperature should be less than 400°C, preferably 375°C. The temperature is less than ℃, more preferably 180℃ or higher and 350℃ or lower. It is preferable to set the substrate temperature within the above-mentioned range, as this allows for the formation of a dense film. By setting the substrate temperature when depositing the insulating film 118 to the above range, the insulating film 114, 1 This makes it possible to transfer oxygen or excess oxygen from 16 to the oxide semiconductor film 108.
[0219] Furthermore, when forming a silicon nitride film as the insulating film 118 by the PECVD method, It is preferable to use a sedimentary gas containing nitrogen, nitrogen, and ammonia as raw material gases. By using a small amount of ammonia compared to the original, the ammonia dissociates in the plasma and becomes active. Seeds are generated. These active species bond silicon and hydrogen contained in the silicon-containing sedimentary gas. It breaks the triple bond between silicon and nitrogen. As a result, the bonding between silicon and nitrogen is promoted, It forms a dense silicon nitride film with fewer silicon and hydrogen bonds and fewer defects. Yes, it is possible. On the other hand, if the amount of ammonia relative to nitrogen is high, the sedimentary gas containing silicon and nitrogen The decomposition of the elements did not proceed, and silicon and hydrogen bonds remained, resulting in an increase in defects and a rough texture. A silicon nitride film is formed. For these reasons, in the raw material gas, ammonia It is preferable to set the nitrogen flow rate ratio to 5 to 50 times, or 10 to 50 times.
[0220] In this embodiment, the insulating film 118 is made using a PECVD apparatus, and silane and nitrogen A silicon nitride film with a thickness of 50 nm is formed using silicon dioxide and ammonia as raw material gases. The flow rates were 50 sccm for silane, 5000 sccm for nitrogen, and 100 sccm for ammonia. The process is in sccm. The pressure in the processing chamber is 100 Pa, the substrate temperature is 350°C, and the process is 27.12 MHz. A high-frequency power supply of z is used to supply 1000W of high-frequency power to the parallel plate electrodes. PECVD The device has an electrode area of 6000 cm². 2 It is a parallel plate type PECVD apparatus, and the supplied electricity Converting force to power per unit area (power density) gives 1.7 × 10⁻⁶. -1 W / cm 2 That is .
[0221] Note that conductive films 120a and 120b are made of an In-Ga-Zn metal oxide target (I When a conductive film is formed using n:Ga:Zn=4:2:4.1 (atomic ratio), the insulating film is formed. The formation of 118 means that the insulating film 118 contains either one or both hydrogen and nitrogen. In some cases, the material may penetrate into the conductive films 120a and 120b. In this case, conductive film 120a, The oxygen deficiency in 120b, combined with either hydrogen or nitrogen, or both, allows for the development of a derivative. The resistance of film 120a and 120b may be lower in some cases.
[0222] Furthermore, after forming the insulating film 118, the same heat treatment as the first and second heat treatments described above is performed. Heat treatment (hereinafter referred to as the third heat treatment) may be performed.
[0223] By performing the third heat treatment, the oxygen contained in the insulating film 116 is released into the oxide semiconductor film 108. It moves to fill the oxygen vacancies in the oxide semiconductor film 108.
[0224] By following the above steps, the transistor 100B shown in Figures 3(A), 3(B), and 3(C) can be fabricated. Cut.
[0225] Note that the transistor 100 shown in Figures 1(A), 1(B), and 1(C) is the same as the one shown in Figure 9(A). The material can be fabricated by forming an insulating film 118 after the process is completed. Also, see Figure 2. The transistor 100A shown in (A), (B), and (C) consists of conductive films 112a and 112b. , by changing the formation order of insulating films 114 and 116, and by creating openings 141a in insulating films 114 and 116 It can be manufactured by adding a step to form 141b.
[0226] <1-5-2. Method for Manufacturing Semiconductor Devices 2> This section describes another method for fabricating transistor 100B, which is a semiconductor device according to one aspect of the present invention. Here, the structure and fabrication method of the oxide semiconductor film are different. Here, the above <1 -4. Example of semiconductor device configuration 3>, number of Zn atoms in oxide semiconductor film 108_1 The atomic ratio of In to Zn in the oxide semiconductor film 10⁸⁻² is the same as the atomic ratio of In to Zn. This section describes the manufacturing process for the 100B transistor, which has a larger number of transistors than specified.
[0227] The formation conditions for the oxide semiconductor film 108_1_0 are as follows: In-Ga-Zn metal oxide Using GET (In:Ga:Zn=4:2:4.1 [atomic ratio]), sputtering method It is formed by the following. Also, the substrate temperature during the formation of the oxide semiconductor film 108_1_0 is set to room temperature. Argon gas at a flow rate of 180 sccm and oxygen gas at a flow rate of 20 sccm were used as the film-forming gases. (Oxygen flow rate ratio 10%).
[0228] Furthermore, the formation conditions for the oxide semiconductor film 108_2_0 include In-Ga-Zn metal oxidation Sputtering using a material target (In:Ga:Zn=1:1:1 [atomic ratio]) It is formed by the method. Also, the substrate temperature during the formation of the oxide semiconductor film 108_2_0 is 170°C. The film-forming gases used were argon gas at a flow rate of 100 sccm and oxygen at a flow rate of 100 sccm. Use gas (oxygen flow rate ratio 50%).
[0229] Oxygen flow during film formation of oxide semiconductor film 108_1_0 and oxide semiconductor film 108_2_0 By changing the ratio of these materials, it is possible to form multilayer films with different crystalline properties. By changing the temperature during film formation of the body film 108_1_0 and the oxide semiconductor film 108_2_0 This allows for the formation of multilayer films with different crystalline properties.
[0230] Furthermore, the crystallinity of the oxide semiconductor film 108_2_0 is improved compared to the oxide semiconductor film 108_1_0. If you wish to do so, use oxide semiconductor film 108_2_ rather than oxide semiconductor film 108_1_0. It is preferable to increase the substrate temperature during 0 formation.
[0231] Other steps may be carried out using the method described in <1-5-1. Method for Manufacturing Semiconductor Devices 1> above as appropriate.
[0232] The transistor shown in <1-4. Example of Semiconductor Device Configuration 3> is fabricated through the above process. It is possible.
[0233] This embodiment may be appropriately combined with other embodiments described herein, at least in part. They can be implemented in combination.
[0234] (Embodiment 2) In this embodiment, an oxide semiconductor film according to one aspect of the present invention is shown in Figures 12 to 1. We will use number 8 to explain.
[0235] <2-1. Oxide Semiconductor Films> The oxide semiconductor film preferably contains at least indium. In particular, it is preferable that it contains indium It is preferable to include zinc. In addition to these, aluminum, gallium, and t It is preferable that it contains elements such as lium or tin. Also, boron, silicon, and titanium are preferable. Iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neo One of the following: gymite, hafnium, tantalum, tungsten, or magnesium. , or may include multiple types.
[0236] Here, we consider the case where the oxide semiconductor film contains indium, element M, and zinc. Element M may be aluminum, gallium, yttrium, or tin, etc. Elements applicable to element M include boron, silicon, titanium, iron, nickel, and germanium. Umium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum Examples include tungsten and magnesium. However, as element M, multiple of the aforementioned elements may be used. They can be combined. Note that in the following explanation, the indiu of oxide semiconductor films The terms representing the atomic ratios of element M and zinc are [In], [M], and [Zn] respectively. It may happen.
[0237] <2-2. Structure of oxide semiconductor films> Oxide semiconductors are divided into single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. It is possible. As a non-single-crystal oxide semiconductor, for example, CAAC-OS (c-axis al igned crystalline oxide semiconductor), Crystalline oxide semiconductor, nc-OS (nanocrystalline oxide sem iconductor), pseudo-amorphous oxide semiconductor (a-like OS: amorph (Amorphous-like oxide semiconductor) and amorphous oxide semiconductor It has a body, etc.
[0238] CAAC-OS has c-axis orientation and multiple nanocrystals are linked in the ab-plane direction. It has a crystal structure that is both connected and distorted. Note that distortion refers to the lattice arrangement of CAAC-OS. The orientation of the grid arrangement changes between a region with aligned grids and another region with aligned grids. It refers to a place.
[0239] Nanocrystals are based on a hexagonal shape, but they are not necessarily regular hexagons; they can also be non-regular hexagonal. There are also fields with polygonal nanocrystals such as pentagons and heptagons in the strain. There is a match. Furthermore, in CAAC-OS, clear grain boundaries were confirmed even near the strain. It is not possible to do so. In other words, by distorting the lattice arrangement, the formation of grain boundaries is suppressed. It can be seen that the arrangement of oxygen atoms in CAAC-OS in the ab plane is Due to factors such as the lack of density and the change in interatomic bond distances caused by the substitution of metallic elements, This is thought to be because it allows for some distortion.
[0240] Furthermore, CAAC-OS consists of a layer containing indium and oxygen (hereinafter referred to as the In layer), and A layered crystal in which layers containing element M, zinc, and oxygen (hereinafter referred to as (M,Zn) layers) are stacked. It tends to have a structure (also called a layered structure). Note that indium and element M are relative to each other. It is interchangeable, and the element M in the (M,Zn) layer is replaced with indium, and the (In,M,Zn) layer It can also be represented as an (In,M) layer when the indium in the In layer is substituted with element M. It is also possible.
[0241] nc-OS is used in minute regions (for example, regions between 1 nm and 10 nm, especially regions larger than 1 nm). It has periodicity in the atomic arrangement in the region of 3 nm or less. Also, nc-OS has different na No regularity is observed in the crystal orientation between the crystals. Therefore, no orientation is observed throughout the entire film. Therefore, depending on the analytical method, nc-OS may be a-like OS or amorphous oxide semiconductor. It can sometimes be indistinguishable from the body.
[0242] a-like OS is an oxide having a structure between nc-OS and amorphous oxide semiconductors. It is a semiconductor. an a-like OS has porous or low-density regions. That is, a-lik e OS has a less stable structure compared to nc-OS and CAAC-OS.
[0243] Oxide semiconductors can take on diverse structures, each possessing different properties. One embodiment of the present invention Oxide semiconductors include amorphous oxide semiconductors, polycrystalline oxide semiconductors, a-like OS, and n It may have two or more types of c-OS and CAAC-OS.
[0244] Furthermore, the oxide semiconductor film in one aspect of the present invention has a composite oxide semiconductor. In the following explanation, oxide semiconductor films may sometimes be referred to as composite oxide semiconductors. By using oxide semiconductors, transistors with high field-effect mobility can be obtained. Conceptual diagrams of oxide semiconductor films containing composite oxide semiconductors are shown in Figures 12 to 14.
[0245] Figure 12(A) is a conceptual diagram of the top surface of an oxide semiconductor film (referred to here as the ab-plane direction). Yes, Figure 12(B) shows a cross-section of an oxide semiconductor film formed on a substrate Sub. (here, This is a conceptual diagram of the c-axis direction.
[0246] Figure 12 illustrates the case where an oxide semiconductor film is formed on a substrate. However, it is not limited to this, and includes insulating films such as undercoats or interlayer films between the substrate and the oxide semiconductor film. Alternatively, other semiconductor films, such as oxide semiconductor films, may be formed.
[0247] An oxide semiconductor film according to one aspect of the present invention is shown in Figures 12(A) and 12(B), This is a composite oxide semiconductor having a structure in which region A1 and region B1 are mixed.
[0248] The region A1 shown in Figures 12(A) and 12(B) is [In]:[M]:[Zn]=x:y:z(x This is a region where there are many In (>0, y≧0, z≧0). On the other hand, region B1 is [In]:[ This is a region where there is little In such that M]:[Zn]=a:b:c (a>0, b>0, c>0). .
[0249] In this specification, the atomic ratio of In to element M in region A1 is defined as the atomic ratio of element M in region B1. Region A1 is greater than the atomic ratio of In to elementary M, compared to region B1, Assume that the concentration of n is high. Therefore, in this specification, region A1 is defined as an in-rich region. Region B1 is also referred to as the "in-poor" region.
[0250] For example, region A1 has an In concentration 1.1 times or more, preferably 2 times or more, than region B1. It is preferable that the ratio is 10 times or less. Also, region A1 is an oxide containing at least In. Often, elements M and Zn are not necessarily included.
[0251] In an oxide semiconductor film according to one aspect of the present invention, region A1 and region B1 form a composite. In other words, in region A1, carrier migration is likely to occur, and in region B1, carrier Movement is less likely to occur. Therefore, the oxide semiconductor according to one aspect of the present invention has high carrier mobility. Furthermore, it can be used as a material with high switching characteristics and good semiconductor properties.
[0252] In other words, region A1 is a region with lower semiconductivity and higher conductivity than region B1. It can also be said that it exists. On the other hand, region B1 has higher semiconductivity and conductivity than region A1. It can also be said that this is a region with low semiconductivity. Here, high semiconductivity refers to the band gap. This can be rephrased as having a wide bandwidth, good switching characteristics, and being similar to an i-type semiconductor.
[0253] As an example, as shown in Figures 12(A) and 12(B), region A1 is in the direction of the ab plane, Furthermore, multiple clusters exist in a granular manner (also called clusters) along the c-axis. They may be irregularly and unevenly distributed. Also, multiple clusters may be superimposed or connected. This can occur. For example, one cluster may overlap with another cluster, creating a chain of clusters. In some cases, region A1 may appear to spread out in a cloud-like manner.
[0254] In other words, the clusters included in region A1 (also called the first clusters) are included in region B1. It has lower semiconductivity and higher conductivity than the clusters it contains (also called the second cluster). It can also be said that the clusters included in region B1 are the same as the clusters included in region A1. It can also be said that this region has higher semiconductivity and lower conductivity than the standard. In this case, region B1 has multiple second clusters, and these multiple second clusters interact with each other. It has a part that connects to it. In other words, the multiple first clusters that region A1 has are clusters Each of the parts connected to one another in a spiral shape, the multiple second clusters in region B1 are, Each has parts that connect to the others.
[0255] Thus, in one aspect of the present invention, the composite oxide semiconductor has a first region (region) in which In is highly concentrated. A1) and a second region (region B1) where In is present in a low concentration, and the first region and the second region and are connected in a cloud-like manner. Alternatively, the composite oxide semiconductor according to one aspect of the present invention is In A first region where is spread at a high concentration, and a second region where In is not spread at a high concentration, Furthermore, the first and second domains are connected in a cloud-like manner.
[0256] As shown in Figures 12(A) and 12(B), the regions A1 are connected to each other in the ab-plane direction, Region A1 can become a current path. This can improve the conductivity of the oxide semiconductor film. This allows us to increase the field-effect mobility of transistors using this method.
[0257] Furthermore, the region B1 shown in Figures 12(A) and 12(B) can be said to be scattered within region A1. Therefore, region B1 can exist in a state where it is three-dimensionally sandwiched between region A1. In other words... And so, region B1 can exist surrounded by region A1. In other words, region B1 is region This structure is contained within A1.
[0258] The proportion of scattered regions A1 depends on the fabrication conditions or composition of the composite oxide semiconductor. It can be adjusted. For example, a composite oxide semiconductor with a small proportion of region A1, or region A composite oxide semiconductor with a high proportion of region A1 can be formed. Furthermore, in one aspect of the present invention... In composite oxide semiconductors, the proportion of region A1 is not necessarily small compared to region B1. Region A1 In composite oxide semiconductors where the proportion is very large, depending on the area being observed, region B may be present within region A1. In some cases, 1 may be formed. Also, for example, the size of the granular region formed by region A1. This can be appropriately adjusted depending on the fabrication conditions or composition of the composite oxide semiconductor.
[0259] Figures 13(A) and 13(B) show that the proportion of region A1 is smaller compared to Figures 12(A) and 13(B), This shows a composite oxide semiconductor with a high proportion of region B1.
[0260] Furthermore, depending on the fabrication conditions or composition of the composite oxide semiconductor, the region may differ from that shown in Figures 12(A) and (B). It is also possible to form composite oxide semiconductors with a high proportion of region A1 and a low proportion of region B1.
[0261] Here, if all regions A1 are connected in the ab-plane direction, the transistor switching The characteristics may deteriorate, for example, the off-current of the transistor may increase. Therefore, as shown in Figures 13(A) and 13(B), it is preferable for region A1 to be scattered within region B1. Therefore, region A1 can exist in a state where it is three-dimensionally sandwiched between region B1. In other words, region A1 can exist surrounded by region B1. That is, region A1 is This structure is contained within region B1. This affects the switching characteristics of the transistor. In particular, it can reduce the off-current.
[0262] Furthermore, a clear boundary may not be observed between region A1 and region B1. The sizes of A1 and region B1 were determined by energy-dispersive X-ray spectroscopy (EDX). EDX mapping using ispersive X-ray spectroscopy It can be evaluated using a 3D view. For example, the cluster in region A1 can be evaluated using a cross-sectional or planar view. In EDX mapping of the image, clusters with a diameter between 0.1 nm and 2.5 nm are observed. It may be possible to detect this. Preferably, the cluster diameter is 0.5 nm or more and 1.5 nm or less. Let's assume that.
[0263] Thus, in one aspect of the present invention, the oxide semiconductor is a mixture of region A1 and region B1. It is a composite oxide semiconductor, and the functions of region A1 and region B1 are different. Regions A1 and B1 function complementaryly. For example, In-Ga, where element M is Ga. -In the case of Zn oxide (hereinafter referred to as IGZO), an oxide semiconductor according to one aspect of the present invention is Co It can be referred to as simple IGZO (abbreviated as C / IGZO).
[0264] On the other hand, for example, in a configuration where region A1 and region B1 are stacked in layers, region A1 and region Because there is no interaction with region B1, or interaction is unlikely to occur, the function of region A1 and The functions of region B1 and the other may function independently. In this case, in the layered region A1... Therefore, even if the carrier mobility can be increased, the transistor's off-current is high. This may be the case. Therefore, the above-mentioned composite oxide semiconductor or C / IGZO is used. This allows for the simultaneous implementation of features with high carrier mobility and good switching characteristics. It can combine these qualities. This is an excellent result obtained with a composite oxide semiconductor according to one embodiment of the present invention. This is the effect.
[0265] Region B1 may also be a crystalline region. For example, region B1 is CAA It has C-OS or multiple nanocrystals.
[0266] Figure 14(A) schematically shows multiple nanocrystals contained in region B1 with dashed lines. Nanocrystals are based on a hexagonal structure, but they are not necessarily regular hexagons; they can also be non-regular hexagonal. There are also distortions in the hexagonal crystals, forming polygonal nano-nuclei such as pentagons and heptagons. It may contain crystals.
[0267] Furthermore, Figure 14(B) shows that the nanocrystals have c-axis orientation, and the c-axis forms the CAAC-OS film. The surface that forms the structure (also called the surface to be formed), or the upper surface, is schematically oriented in a direction approximately perpendicular to it. As shown, CAAC-OS has a layered crystalline structure with orientation along the c axis (also known as a layered structure). (referred to as) a layer containing indium and oxygen (hereinafter referred to as the In layer), and element M, zinc, It has a structure in which an oxygen-containing layer (hereinafter referred to as the (M,Zn) layer) is stacked.
[0268] Furthermore, indium and element M can be substituted for each other. Therefore, the (M,Zn) layer... The element M is substituted with indium, and it can also be represented as an (In,M,Zn) layer. In that case, The structure consists of layers of In and (In,M,Zn).
[0269] <2-3. Atomic ratio of composite oxide semiconductors> Next, the atomic ratio of elements in a composite oxide semiconductor according to one aspect of the present invention will be described.
[0270] In a composite oxide semiconductor, for example, region A1 has In, element M, and Zn. In some cases, the atomic ratio of each element can be shown using the phase diagram shown in Figure 15. In, element M The atomic ratio of , and Zn is expressed as x:y:z, where x, y, and z are atoms. Numerical ratios can be represented in the figure as coordinates (x:y:z). Note that Figure 15 shows the oxygen source. The ratio of children will not be mentioned.
[0271] In Figure 15, the dashed line represents [In]:[M]:[Zn]=(1+α):(1-α):1 The line where the atomic ratio (-1≦α≦1) is [In]:[M]:[Zn]=(1+α): The line with an atomic ratio of (1-α):2, [In]:[M]:[Zn]=(1+α):( The line with an atomic ratio of 1-α):3, [In]:[M]:[Zn]=(1+α):(1 -α):4 is the atomic ratio line, and [In]:[M]:[Zn]=(1+α): This represents the line where the atomic ratio is (1-α):5.
[0272] Furthermore, the dashed line represents the atomic ratio of [In]:[M]:[Zn]=1:1:β (β≧0) The line where the atomic ratio is [In]:[M]:[Zn]=1:2:β, [In [In]:[M]:[Zn] = 1:3:β is the atomic ratio line, [In]:[M]:[Zn The line where the atomic ratio of [In]:[M]:[Zn]=1:7:β Line representing the atom ratio, line representing the atomic ratio of [In]:[M]:[Zn]=2:1:β This represents a line where the atomic ratio is [In]:[M]:[Zn]=5:1:β.
[0273] Also, as shown in Figure 15, the atomic ratio of [In]:[M]:[Zn]=0:2:1 or Oxide semiconductors in the same range tend to have a spinel-type crystal structure.
[0274] Region A2 shown in Figure 15 represents the atomic ratio of indium, element M, and zinc present in region A1. An example of a preferred range is shown. Note that region A2 is [In]:[M]:[Z n]=(1+γ):0:(1-γ) also includes the line where the atomic ratio (-1≦γ≦1) is (-1≦γ≦1) Let's assume that.
[0275] Region B2 shown in Figure 15 represents the atomic ratio of indium, element M, and zinc present in region B1. An example of a preferred range is shown. Note that region B2 is [In]:[M]:[Z n] = 4:2:3 to 4.1, and its neighboring values. Neighboring values include, for example, the atomic ratio. This includes [In]:[M]:[Zn]=5:3:4. Also, region B2 is [In]: [M]:[Zn] = 5:1:6, and its neighboring values.
[0276] Region A2 has a higher concentration of In, resulting in higher conductivity than region B2, and carrier transfer occurs. It has the function of increasing mobility (field-effect mobility). Therefore, oxide semiconductors having region A1 This method can increase the on-current and carrier mobility of transistors using conductive films.
[0277] On the other hand, region B2 has a lower concentration of In, so its conductivity is lower than region A2, and leakage current is lower. It has the function of reducing flow. Therefore, a tracer using an oxide semiconductor film having region B1 The off-current of the inverter can be reduced.
[0278] For example, region A1 is preferably non-single crystal. In this case, region A1 tends to be tetragonal in indium. Also, region A1, In indium oxide ([In]:[M]:[Zn]=x:0:0 (x>0)), Bix It tends to have a bite-type crystal structure. Also, region A1 is In-Zn oxide ([In] In the case of :[M]:[Zn]=x:0:z(x>0, z>0), there is a tendency for a layered crystal structure to be formed. There is.
[0279] Furthermore, for example, region B1 is preferably non-single crystal. Also, region B1 is CAAC- It is preferable to have an OS. However, region B1 does not need to consist solely of CAAC-OS. Furthermore, it may have regions of polycrystalline oxide semiconductors and nc-OS, etc.
[0280] CAAC-OS is a highly crystalline oxide semiconductor. On the other hand, CAAC-OS has a clear Since grain boundaries cannot be identified, a decrease in electron mobility caused by grain boundaries occurs. It can be said that it is difficult. Also, the crystallinity of oxide semiconductors is affected by the inclusion of impurities and the formation of defects. Because it may decrease, CAAC-OS is an oxidation product with fewer impurities and defects (such as oxygen deficiencies). It can also be called a material semiconductor. Therefore, by having CAAC-OS, it functions as a composite oxide semiconductor. The physical properties of the composite oxide semiconductor are stable, making it heat-resistant and highly reliable. It is possible.
[0281] Furthermore, when depositing oxide semiconductors using a sputtering apparatus, the atomic ratio of the target is... A film with a shifted atomic ratio is formed. In particular, depending on the substrate temperature during film formation, [Zn] In some cases, the atomic ratio of the film may be smaller than the atomic ratio of the target.
[0282] Furthermore, the properties of a composite oxide semiconductor according to one aspect of the present invention can be uniquely determined by the atomic ratio. Therefore, the regions shown are region A1 and region B, which are part of the composite oxide semiconductor. This region exhibits a favorable atomic ratio for element 1, and its boundaries are not strictly defined.
[0283] <2-4. Methods for Fabricating Composite Oxide Semiconductors> Here, we will explain an example of a method for fabricating composite oxide semiconductors, as shown in Figures 12(A) and 12(B), etc. A composite oxide semiconductor according to one aspect of the present invention is formed using a sputtering apparatus. It is possible.
[0284] [Sputtering equipment] Figure 16(A) is a cross-sectional view illustrating the deposition chamber 2501 of the sputtering apparatus. Figure 16(B) shows the magnet unit 2530a and the sputtering apparatus. This is a plan view of the Gnet unit 2530b.
[0285] The deposition chamber 2501 shown in Figure 16(A) consists of a target holder 2520a and a target holder Ruda 2520b, backing plate 2510a, backing plate 2510b , target 2502a, target 2502b, component 2542, substrate holder 25 It has 70 and, . The target 2502a is on the backing plate 2510a It is positioned. Also, the backing plate 2510a is placed on the target holder 2520a. It is positioned. Also, the magnet unit 2530a is positioned on the backing plate 2510a. It is positioned below target 2502a via the backing. Also, target 2502b is backed It is placed on the backing plate 2510b. Also, the backing plate 2510b is the target It is placed on the back holder 2520b. Also, the magnet unit 2530b is back It is positioned below target 2502b via mounting plate 2510b.
[0286] As shown in Figures 16(A) and 16(B), the magnet unit 2530a is Magnet 2530N1, Magnet 2530N2, Magnet 2530S, Mag It has a net holder 2532 and, in the magnet unit 2530a, Magnet 2530N1, Magnet 2530N2, and Magnet 2530S are magnets It is placed on holder 2532. Also, magnet 2530N1 and magnet 253 0N2 is positioned with a gap between it and magnet 2530S. Unit 2530b has the same structure as the magnet unit 2530a. Note that the film deposition chamber 25 When loading circuit board 2560 into 01, circuit board 2560 is positioned in contact with circuit board holder 2570. It can be done.
[0287] Target 2502a, backing plate 2510a, and target holder 2520 a, target 2502b, backing plate 2510b, and target holder 25 20b is isolated by member 2542. Member 2542 is an insulator. This is preferable. However, member 2542 may be a conductor or a semiconductor. The component 2542 may be one in which the surface of a conductor or semiconductor is covered with an insulator. .
[0288] The target holder 2520a and the backing plate 2510a are connected by screws (bolts, etc.). It is fixed using ) and is at equipotential. Also, the target holder 2520a is battery It has the function of supporting the target 2502a via the king plate 2510a. The target holder 2520b and the backing plate 2510b are connected by screws (bolts, etc.). It is fixed using ) and is at equipotential. Also, the target holder 2520b is battery It has the function of supporting target 2502b via king plate 2510b.
[0289] The backing plate 2510a has the function of fixing the target 2502a. Furthermore, the backing plate 2510b has the function of fixing the target 2502b.
[0290] Figure 16(A) shows the magnetic field lines 2 formed by the magnet unit 2530a. 580a and 2580b are explicitly mentioned.
[0291] Furthermore, as shown in Figure 16(B), the magnet unit 2530a is rectangular or approximately Rectangular magnet 2530N1 and rectangular or nearly rectangular magnet 2530N2 A rectangular or nearly rectangular magnet 2530S is fixed to a magnet holder 2532. It has the configuration shown in Figure 16(B). The magnet unit 2530a is shown in Figure 16(B). It can be swung from side to side as shown by the arrow. For example, magnet unit 2530a This should be made to vibrate with a beat between 0.1Hz and 1kHz.
[0292] The magnetic field on target 2502a changes with the oscillation of magnet unit 2530a. Therefore, in the vicinity of the region with a strong magnetic field, the high-density plasma region will be affected. The sputtering phenomenon is prone to occur with 502a. This is due to the magnet unit 2530b The same applies to this matter.
[0293] <2-5. Fabrication Flow of Composite Oxide Semiconductors> Next, we will explain the method for fabricating composite oxide semiconductors. Figure 17 shows the fabrication method of composite oxide semiconductors. This is a process flow chart explaining the manufacturing method.
[0294] The composite oxide semiconductors shown in Figures 12(A) and 12(B), etc., include at least the first to the first shown in Figure 17. It is manufactured through four steps.
[0295] [Step 1: Placing the substrate in the film deposition chamber] The first step involves placing the substrate in the film deposition chamber (see step S101 in Figure 17). .
[0296] The first step is, for example, the substrate holder in the deposition chamber 2501 shown in Figure 16(A) Place the circuit board 2560 on 2570.
[0297] The temperature of the substrate 2560 during film deposition affects the electrical properties of the composite oxide semiconductor. The higher the degree, the greater the crystallinity of the composite oxide semiconductor and the higher the reliability. On the other hand, Lower substrate temperatures reduce the crystallinity of the composite oxide semiconductor and increase carrier mobility. This is possible. In particular, the lower the substrate temperature during film deposition, the more transistors with composite oxide semiconductors can be formed. In this case, the field effect mobility at low gate voltages (e.g., greater than 0V and less than or equal to 2V) The improvement will be remarkable.
[0298] The temperature of the substrate 2560 should be between room temperature (25°C) and 200°C, preferably above room temperature. The substrate temperature should be 170°C or lower, more preferably between room temperature and 130°C. This allows for the use of large-area glass substrates (for example, the 8th to 10th generation glass mentioned earlier). This is particularly suitable when using a substrate. In particular, the substrate temperature during film formation of composite oxide semiconductors. By keeping the circuit board at room temperature, or in other words, in a state where it is not intentionally heated, the bending or distortion of the circuit board can be suppressed. It is preferable because it can be controlled.
[0299] Furthermore, the substrate holder 2570 may be equipped with a cooling mechanism to cool the substrate 2560. good.
[0300] Furthermore, by setting the temperature of the substrate 2560 to between 100°C and 130°C, the composite oxide Water can be removed from semiconductors. By removing water, which is an impurity, electricity can be removed. This allows for improved reliability while simultaneously increasing the mobility of the field effects.
[0301] Furthermore, by keeping the temperature of the substrate 2560 between 100°C and 130°C, water can be removed. This prevents excessive heat-induced distortion in the sputtering apparatus. This allows for improved productivity of semiconductor devices. Therefore, productivity becomes more stable, Because it is easy to introduce large-scale production equipment, it is easy to manufacture large-scale display devices using large-area substrates. It is possible.
[0302] Furthermore, increasing the temperature of the substrate 2560 allows for more effective water removal in the composite oxide semiconductor. Not only can it remove the material, but it can also improve the crystallinity of the composite oxide semiconductor. Example For example, the temperature of the substrate 2560 should be between 80°C and 200°C, preferably between 100°C and 170°C. By using the following temperature, highly crystalline composite oxide semiconductor films can be deposited.
[0303] [Second step: Introducing gas into the deposition chamber] The second step involves introducing gas into the film deposition chamber (see step S201 in Figure 17). .
[0304] The second step involves introducing gas into the deposition chamber 2501, as shown in Figure 16(A). The gas in question may be either argon gas or oxygen gas, or both. In addition, inert gases such as helium, xenon, and krypton can be used instead of argon gas. That's fine.
[0305] The following trends are observed regarding the oxygen flow rate ratio when depositing composite oxide semiconductor films using oxygen gas. This demonstrates that a higher oxygen flow rate ratio improves the crystallinity and reliability of composite oxide semiconductors. This can be achieved. On the other hand, the smaller the oxygen flow rate ratio, the lower the crystallinity of the composite oxide semiconductor, and the carrier The mobility can be increased. In particular, the smaller the oxygen flow rate ratio, the more the composite oxide semiconductor can In a transistor, when the gate voltage is low (for example, in the range greater than 0V and less than or equal to 2V) The improvement in field effect mobility is remarkable.
[0306] The oxygen flow rate ratio should be 0% or higher to obtain desirable properties according to the application of the composite oxide semiconductor. It can be set appropriately within a range of 100% or less.
[0307] For example, when used in the semiconductor layer of a transistor with high field-effect mobility, composite oxides are used. The oxygen flow rate ratio during semiconductor film deposition is preferably 0% to 30%, more preferably 5% to 3%. The amount should be 0% or less, and more preferably 7% to 15%.
[0308] Furthermore, in order to obtain a transistor that achieves both high field-effect mobility and high reliability, multiple The oxygen flow rate ratio during the deposition of the composite oxide semiconductor film is preferably greater than 30% and less than 70%. The oxygen flow rate during the deposition of composite oxide semiconductor films should be greater than 30% and less than or equal to 50%. The quantity ratio should be between 10% and 50%, preferably between 30% and 50%.
[0309] Furthermore, in order to obtain a transistor with high reliability, when depositing a composite oxide semiconductor film... The oxygen flow rate ratio shall be between 70% and 100%.
[0310] In this way, by controlling the substrate temperature and oxygen flow rate ratio during film formation, the desired electrical characteristics can be achieved. It is possible to deposit composite oxide semiconductor films. For example, lowering (raising) the substrate temperature. The contributions of lowering (increasing) the oxygen flow rate ratio to the field effect mobility are as follows: In some cases, they may be equivalent. Therefore, for example, due to equipment limitations, the substrate temperature may not be raised sufficiently. Even if this is not possible, increasing the oxygen flow rate ratio can achieve an equivalent field effect mobility. It is also possible to realize a transistor that possesses these properties.
[0311] Furthermore, the method shown in Embodiment 1 can be used to remove oxygen vacancies in oxide semiconductor films, or oxide semiconductor films. By reducing impurities in the film, it is possible to realize highly reliable transistors. Cut.
[0312] Furthermore, it is necessary to purify the gas used during film formation. For example, oxygen gas and other gases used Lugon gas has a dew point of -40°C or lower, preferably -80°C or lower, more preferably -100°C. By using gas purified to below ℃, more preferably below -120℃, composite oxidation can be achieved. This makes it possible to prevent moisture and other substances from being absorbed into the semiconductor material as much as possible.
[0313] Furthermore, the deposition chamber 2501 removes as much water and other impurities as possible from the composite oxide semiconductor. To achieve a high vacuum (5 × 10⁻¹⁰), use an adsorption-type vacuum pump such as a cryopump. - 7 Pa to 1 × 10 -4 It is preferable to exhaust to a pressure of approximately Pa. In particular, sputtering During standby of the deposition apparatus, gas molecules equivalent to H2O in the deposition chamber 2501 (m / z=1 The partial pressure of the gas molecules corresponding to 8 is 1 × 10 -4 Pa or less, preferably 5 × 10 -5 Pa or less It is preferable to do so.
[0314] [Third step: Applying voltage to the target] The third step involves applying a voltage to the target (see step S301 in Figure 17). see).
[0315] The third step is, for example, the target holder 2520a and the t Apply voltage to the target holder 2520b. For example, the target holder 2520 The potential applied to terminal V1 connected to a is marked on terminal V2 connected to the substrate holder 2570. The potential should be lower than the applied potential. Also, the terminals connected to the target holder 2520b. The potential applied to V4 is set to be lower than the potential of terminal V2 connected to the substrate holder 2570. Furthermore, the potential applied to terminal V2 connected to the substrate holder 2570 is defined as the ground potential. Furthermore, the potential applied to terminal V3 connected to the magnet holder 2532 is set to the ground potential. ru.
[0316] The potential applied to terminals V1, V2, V3, and V4 is the same as the potential described above. Not limited. Also, target holder 2520, substrate holder 2570, magnet holder It is not necessary for a potential to be applied to all of the 2532. For example, if the substrate holder 2570 is electrically charged... It may be in a floating state. Furthermore, the potential applied to terminal V1 is controlled. It is assumed that a power supply is electrically connected. The power supply may be a DC power supply, an AC power supply, or An RF power supply can be used for this.
[0317] Furthermore, indium, element, is used as target 2502a and target 2502b. Using a target containing M (where M is Al, Ga, Y, or Sn), zinc, and oxygen, Preferred. Examples of target 2502a and target 2502b include In-G α-Zn metal oxide target (In:Ga:Zn = 4:2:4.1 [atomic ratio]), I n-Ga-Zn metal oxide target (In:Ga:Zn=5:1:7 [atomic ratio]) These can be used. Below, we will discuss In-Ga-Zn metal oxide targets (In:G We will explain the case where a:Zn = 4:2:4.1 [atomic ratio] is used.
[0318] [Fourth step: Depositing a composite oxide semiconductor onto the substrate] The fourth step involves depositing a composite oxide semiconductor onto a substrate from a target (Figure (See step S401).
[0319] The fourth step is, for example, in the deposition chamber 2501 shown in Figure 16(A), argon gas Alternatively, oxygen gas ionizes, separating into positive ions and electrons to form a plasma. Then, The cations in the rasma are affected by the potential applied to the target holders 2520a and 2520b. Then, it is accelerated towards targets 2502a and 2502b. The cations are In-Ga- By colliding with the Zn metal oxide target, sputtered particles are generated and then placed on the substrate 2560. Sputtered particles are deposited.
[0320] Furthermore, for targets 2502a and 2502b, the atomic ratio is In:Ga:Zn=4: In-Ga-Zn metal oxides with an atomic ratio of 2:4.1 or In:Ga:Zn=5:1:7 When using a physical target, the target may contain multiple crystal grains with different compositions. Yes. For example, the multiple crystal grains in question often have a diameter of 10 μm or less. Also, for example, When the In-Ga-Zn metal oxide target contains crystal grains with a high proportion of In, The proportion of region A1, as explained earlier, that is formed may increase.
[0321] <2-6. Film Deposition Model> Next, in the fourth step, we consider the film deposition model shown in Figures 18(A), (B), and (C). can.
[0322] Figures 18(A), (B), and (C) show a cross-sectional model near target 2502a shown in Figure 16(A). This is a diagram. Figure 18(A) shows the state of the target before use, and Figure 18(B) shows the result. Figure 18(C) shows the state of the target before film formation, and Figure 18(C) shows the state of the target during film formation. Figures 18(A), (B), and (C) show target 2502a, plasma 2190, and positive ions. Particles such as n2192, sputtered particles 2504a, 2506a, etc., are explicitly identified.
[0323] In Figure 18(A), the surface of target 2502a is relatively flat, and the composition (For example, the composition of In, Ga, and Zn) is uniform. On the other hand, in Figure 18(B), The surface of target 2502a is made uneven by a prior sputtering treatment, etc. Furthermore, segregation occurs in the composition. The irregularities and segregation are due to the sputtering performed prior to the process. This can be caused by plasma (e.g., Ar plasma) during ring processing. See Figure 18. B) shows segregation regions 2504 and 2506. Here, segregation region Region 2504 is defined as a region rich in Ga and Zn (Ga,Zn-Rich region), and segregation region 2 Region 506 is defined as the In-Rich region, which contains a large amount of In. The reason why segregation region 2504 is formed is that Ga is a material with a lower melting point than In. Therefore, due to the heat that target 2502a receives during plasma treatment, a portion of it melts and aggregates. This is thought to be because it forms segregation region 2504.
[0324] [Step 1] In Figure 18(C), argon gas or oxygen gas is ionized, and cation 2192 and electrons ( (Not shown) It separates into two parts to form plasma 2190. Then, in plasma 2190 Cation 2192 targets target 2502a (in this case, In-Ga-Zn oxide target) It accelerates towards the target. The cation 2192 collides with the In-Ga-Zn oxide target. This process generates sputtered particles 2504a and 2506a, which are then used to create In-Ga-Zn oxide. Sputtered particles 2504a and 2506a are ejected from the -get. Sub-subscription 2504a is ejected from segregation region 2504, thus forming a Ga,Zn-rich crystal. In some cases, staves may be formed. Also, sputtered particles 2506a may be in segregation region 2506. Because they are pushed out, they sometimes form in-rich clusters.
[0325] Furthermore, in the In-Ga-Zn oxide target, the segregation region 2504 is the first to appear. It is thought that putter particles 2504a are preferentially sputtered. This is because they are positive ions. When 2192 collides with the In-Ga-Zn oxide target, the relative atomic mass is In Because Ga and Zn are lighter than In-Ga-Zn oxide targets, projectiles preferentially target In-Ga-Zn oxide targets. This is because the ejected sputtered particles 2504a are deposited on the substrate. As a result, region B1, as shown in Figures 12(A) and 12(B), is formed.
[0326] [Step 2] Next, as shown in Figure 18(C), sputtered particles 2506a emerge from the segregation region 2506. Sputtering is performed. Sputtered particles 2506a are deposited on region B1 which was previously deposited on the substrate. A collision occurs, and region A1, as shown in Figures 12(A) and 12(B), is formed.
[0327] Furthermore, as shown in Figure 18(C), target 2502a is sputtered during film deposition. To continue, the formation and disappearance of segregation regions 2504 occur intermittently. ru.
[0328] By repeating the film deposition model of the first step and the second step described above, Figure 12(A A composite oxide semiconductor according to one embodiment of the present invention, as shown in (B), can be obtained.
[0329] In other words, an in-rich segregation region 2506 and a Ga,Zn-rich segregation region 2 From 504, sputtered particles (2504a and 2506a) are individually ejected. It deposits on the substrate. On the substrate, in-rich regions connect to each other in a cloud-like manner. A composite oxide semiconductor according to one embodiment of the present invention can be formed, as shown in Figures 12(A) and 12(B). In a composite oxide semiconductor film, in-rich regions connect to each other in a cloud-like manner, The transistor using this composite oxide semiconductor exhibits high on-current (Ion) and high field effect. It has fruit mobility (μFE).
[0330] Thus, a trap that satisfies high on-current (Ion) and high field-effect mobility (μFE) In an inverter, In is important, and other metals (e.g., Ga) are not necessarily important. It's not necessary.
[0331] In the above, argon gas is used to produce a composite oxide semiconductor according to one aspect of the present invention. This illustrates a model for film deposition. In this case, there are many oxygen vacancies in the composite oxide semiconductor. It may be included. If a complex oxide semiconductor contains many oxygen vacancies, then the complex oxide semiconductor may contain Shallow defect levels (also called sDOS) may form in composite oxide semiconductors. When a DOS is formed, it becomes a carrier trap, and the on-current and field effect Mobility will decrease.
[0332] Therefore, when a composite oxide semiconductor is formed using argon gas, After the formation of the oxide semiconductor, oxygen is supplied into the composite oxide semiconductor, thereby causing the composite oxidation It is preferable to fill in oxygen vacancies in the semiconductor material and reduce sDOS.
[0333] As for the method of supplying oxygen as described above, for example, after the composite oxide semiconductor, in an atmosphere containing oxygen Examples include heat treatment methods or plasma treatment methods in an oxygen-containing atmosphere. Alternatively, an insulating film in contact with a composite oxide semiconductor according to one aspect of the present invention, or a composite oxide semiconductor The insulating film near the conductor may have excess oxygen. For details on the configuration, please refer to Embodiment 1.
[0334] Although this explanation describes the sputtering method, it is not limited to this method. Pulsed laser deposition (PLD), plasma chemical vapor deposition (PECVD), and thermal CV are also used. D (Chemical Vapor Deposition) method, ALD (Atomic Layer deposition (CVD) or vacuum deposition methods may also be used. An example is MOCVD (Metal Organic Chemical Vapor One example is the Deposition method.
[0335] <2-7. Transistors having oxide semiconductor films> Next, we will explain the case where oxide semiconductor films are used in transistors.
[0336] Furthermore, by using the above composite oxide semiconductor in a transistor, carrier mobility is increased. Furthermore, it is possible to realize transistors with high switching characteristics. In addition, high reliability This allows for the realization of a transistor.
[0337] Furthermore, it is preferable to use an oxide semiconductor film with a low carrier density for the transistor. For example, an oxide semiconductor film has a carrier density of 8 × 10⁻¹⁶. 11 / cm 3 Less than 1 ×10 11 / cm 3 Less than 1 × 10 10 / cm 3 It is less than 1 × 10 -9 / cm 3 That should suffice.
[0338] When lowering the carrier density of an oxide semiconductor film, impurities in the oxide semiconductor film The solution is to lower the concentration and thus the defect level density. In this specification, the impurity concentration is low. A low defect level density is referred to as high-purity intrinsic or substantially high-purity intrinsic. Furthermore, oxide semiconductor films that are essentially high-purity intrinsic have few carrier sources, so carrier The density can be reduced. Also, high-purity intrinsic or substantially high-purity intrinsic oxidation Because monocrystalline semiconductor films have a low defect level density, their trap level density can also be low.
[0339] Furthermore, the time required for charges trapped in the trap levels of an oxide semiconductor film to disappear. The trap level density is long and can behave as if it were a fixed charge. Transistors in which the channel region is formed on a highly oxide semiconductor exhibit unstable electrical properties. There are cases where this is the case.
[0340] Therefore, in order to stabilize the electrical characteristics of a transistor, the impurity concentration in the oxide semiconductor film must be reduced. Reducing the degree is effective. Also, to reduce the impurity concentration in the oxide semiconductor film It is preferable to also reduce the concentration of impurities in the adjacent membrane. Examples of impurities include hydrogen and nitrogen. These include alkali metals, alkaline earth metals, iron, nickel, silicon, etc.
[0341] Here, we will explain the effects of various impurities in oxide semiconductor films.
[0342] In oxide semiconductor films, if silicon or carbon, which are among the Group 14 elements, are present, acid Defect levels are formed in oxide semiconductors. Therefore, silicon and oxide semiconductors The concentration of carbon and the concentration of silicon and carbon near the interface with the oxide semiconductor (secondary ion mass spectrometry) In the law (SIMS: Secondary Ion Mass Spectrometry) The concentration obtained is 2 × 10 18 atoms / cm 3 The following is preferably 2 × 10 17 atoms / cm 3 The following applies:
[0343] Furthermore, if the oxide semiconductor film contains alkali metals or alkaline earth metals, defect levels They may form and generate carriers. Therefore, alkali metals or alkaline earth metals Transistors using an oxide semiconductor film containing a genus tend to have normally-on characteristics. Therefore, it is preferable to reduce the concentration of alkali metals or alkaline earth metals in the oxide semiconductor film. Specifically, the concentration of alkali metals or alkaline earth metals in the oxide semiconductor film obtained by SIMS is 1×10 atoms / cm 18 or less, preferably 3 2×10 atoms / cm 16 or less. 3
[0344] In addition, in the oxide semiconductor film, when nitrogen is contained, electrons as carriers are generated, the carrier density increases, and it tends to be n-type. As a result, a transistor using an oxide semiconductor containing nitrogen as a semiconductor tends to have normally-on characteristics. Therefore, in the oxide semiconductor, it is preferable that nitrogen is reduced as much as possible. For example, the nitrogen concentration in the oxide semiconductor is less than 5×10 atoms / cm in SIMS, preferably 5×1 0 atoms / cm 19 or less, more preferably 1×10 3 atoms / cm 0 18 or less, 3 even more preferably 5×10 18 atoms / cm 3 or less, even more preferably 5×10 17 atoms / cm 3 or less.
[0345] In addition, hydrogen contained in the oxide semiconductor film reacts with oxygen bonded to metal atoms to form water, so oxygen vacancies (V o ) may be formed. When hydrogen enters the oxygen vacancies (V o ), electrons as carriers may be generated. In addition, part of the hydrogen binds to metal atoms. It may combine with oxygen to generate electrons as carriers. Therefore, a transistor using an oxide semiconductor containing hydrogen tends to have normally-on characteristics. For this reason, it is preferable that hydrogen in the oxide semiconductor is reduced as much as possible. Specifically, in the oxide semiconductor, the hydrogen concentration obtained by SIMS is less than 1×10 atoms / cm , preferably less than 1×10 atoms / cm 20 , more preferably less than 5×10 3 not filled, preferably less than 1×10 19 atoms / cm 3 , still more preferably less than 1×10 18 at oms / cm 3 , and even more preferably less than 1×10 18 atoms / cm 3 .
[0346] Incidentally, oxygen vacancies (V o ) in the oxide semiconductor film can be reduced by introducing oxygen into the oxide semiconductor film. That is, oxygen vacancies (V ) in the oxide semiconductor film disappear when oxygen is filled in them. Therefore, by diffusing oxygen in the oxide semiconductor film, oxygen vacancies (V o ) of the transistor can be reduced and the reliability can be improved. By filling oxygen vacancies (V o ), oxygen vacancies (V ) disappear. Therefore, by diffusing oxygen in the oxide semiconductor film, oxygen vacancies (V o ) of the transistor can be reduced and the reliability can be improved. .
[0347] Incidentally, as a method of introducing oxygen into the oxide semiconductor film, for example, an oxide containing more oxygen than oxygen satisfying the stoichiometric composition can be provided in contact with the oxide semiconductor. That is, it is preferable that the oxide has a region where oxygen is present in excess of the stoichiometric composition (hereinafter also referred to as an excess oxygen region ). In particular, when an oxide semiconductor film is used for a transistor, an oxide having an excess oxygen region is provided in a base film near the transistor, an interlayer film, or the like. ). In particular, when an oxide semiconductor film is used for a transistor, an oxide having an excess oxygen region is provided in a base film near the transistor, an interlayer film, or the like. In particular, when an oxide semiconductor film is used for a transistor, an oxide having an excess oxygen region is provided in a base film near the transistor, an interlayer film, or the like. By implementing this feature, oxygen deficiency in transistors can be reduced, thereby improving reliability.
[0348] An oxide semiconductor film with sufficiently reduced impurities is used in the channel formation region of the transistor. This allows for the provision of stable electrical characteristics.
[0349] This embodiment may be appropriately combined with other embodiments described herein, at least in part. They can be implemented in combination.
[0350] (Embodiment 3) In this embodiment, the display device having a transistor as illustrated in the previous embodiment An example will be explained below using Figures 19 to 25.
[0351] Figure 19 is a top view showing an example of a display device. The display device 700 shown in Figure 19 is the first A pixel section 702 provided on the substrate 701 and a source drive provided on the first substrate 701 The Pixel circuit section 704 and the gate driver circuit section 706, and the pixel section 702 and the source driver circuit A sealing material 712 is arranged to surround the path section 704 and the gate driver circuit section 706. It includes a second substrate 705 provided opposite the first substrate 701. The first substrate 701 and the second substrate 705 are sealed by a sealing material 712. The pixel section 702, the source driver circuit section 704, and the gate driver circuit section 706 are It is sealed by the first substrate 701, the sealing material 712, and the second substrate 705. Although not shown in Figure 19, a display element is provided between the first substrate 701 and the second substrate 705. It gets kicked.
[0352] Furthermore, the display device 700 is surrounded by a sealing material 712 on the first substrate 701. In a region different from the region, there is a pixel section 702, a source driver circuit section 704, and a gate driver circuit. FPC terminals electrically connected to the path section 706 and the gate driver circuit section 706, respectively. A sub-unit 708 (FPC: Flexible printed circuit) is provided. Furthermore, FPC716 is connected to FPC terminal 708, and FPC716 controls the drawing. Various signals are sent to the element section 702, the source driver circuit section 704, and the gate driver circuit section 706. These are supplied. Also, the pixel unit 702, source driver circuit unit 704, gate driver circuit Signal lines 710 are connected to the path section 706 and the FPC terminal section 708, respectively. The various signals supplied by 716 are transmitted via the signal line 710 to the pixel unit 702 and sourced Provided to the driver circuit section 704, the gate driver circuit section 706, and the FPC terminal section 708 ru.
[0353] Furthermore, the display device 700 may be provided with multiple gate driver circuit units 706. The device 700 includes a source driver circuit section 704 and a gate driver circuit section 706. Although an example is shown in which the pixel portion 702 is formed on the same first substrate 701, this configuration is not limited to this example. It is not necessary. For example, the gate driver circuit section 706 may be formed on the first substrate 701. Alternatively, only the source driver circuit section 704 may be formed on the first substrate 701. In this case, a substrate on which a source driver circuit or gate driver circuit, etc., is formed (for example, a single-wired board) A drive circuit substrate (formed from a crystalline semiconductor film or a polycrystalline semiconductor film) is formed on the first substrate 701. This configuration is also acceptable. Furthermore, the method of connecting the separately formed drive circuit board is not particularly limited. Instead, methods such as COG (Chip On Glass) and wire bonding are used. You can use it.
[0354] Furthermore, the display device 700 includes a pixel section 702, a source driver circuit section 704, and a gate The driver circuit section 706 has a plurality of transistors, and is a semiconductor device according to one aspect of the present invention. A transistor can be applied to this.
[0355] Furthermore, the display device 700 can have various elements. An example of such elements is: For example, electroluminescent (EL) elements (EL elements including organic and inorganic materials, (Mechanical EL elements, inorganic EL elements, LEDs, etc.), light-emitting transistor elements (light-emitting depending on the current) Transistors, electron emission elements, liquid crystal elements, electron ink elements, electrophoretic elements, electro Lowwetting element, plasma display panel (PDP), MEMS (micro-electromechanical systems) Electro-mechanical systems) displays (e.g., grating light bulbs) GLV (Global Micromirror Device), Digital Micromirror Device (DMD), Digital Micro-Shatter DMS (Dynamic Modulation System) element, Interferometric Modulation (IMOD) element Examples include piezoelectric ceramic displays.
[0356] Another example of a display device using EL elements is an EL display. An example of a display device using emission elements is a field emission display (FE D) or SED type flat display (SED: Surface-conductivity Examples include (n Electron-emitter Display), which uses liquid crystal elements. Examples of such display devices include liquid crystal displays (transmissive liquid crystal displays, semi-transmissive liquid crystal displays). Display, reflective liquid crystal display, direct-view liquid crystal display, projection liquid crystal display Examples include (Ray). An example of a display device using an electronic ink element or electrophoretic element is: Examples include electronic paper. Furthermore, there are semi-transmissive liquid crystal displays and reflective liquid crystal displays. If implemented, some or all of the pixel electrodes would function as reflective electrodes. This is how it should be done. For example, some or all of the pixel electrodes could be made of aluminum, silver, etc. It would be good to have it. Furthermore, in that case, a memory circuit such as SRAM should be placed below the reflective electrode. It is also possible to implement this feature. This will further reduce power consumption.
[0357] The display method used in the display device 700 is either progressive or interlaced. These can be used. Also, when displaying in color, the color elements controlled by pixels include R It is not limited to the three colors GB (R stands for red, G for green, and B for blue). For example, if the pixels have R and G It may consist of four pixels: a pixel, a B pixel, and a W (white) pixel. Alternatively, a pentile arrangement. As shown in the column, two of the RGB colors make up one color element, and different two colors are used depending on the color element. You can select and configure colors. Alternatively, you can use RGB with one or more colors such as yellow, cyan, and magenta. You may add more above. Note that the size of the display area for each dot of the color element may differ. However, the disclosed invention is not limited to a color display device, but also includes monochrome displays. It can also be applied to display devices.
[0358] In addition, the backlight (organic EL elements, inorganic EL elements, LEDs, fluorescent lamps, etc.) emits white light. (W) is used to enable the display device to display in full color, and the coloring layer (also called a color filter) You may also use ( ). The colored layer may be, for example, red (R), green (G), blue (B ), yellow (Y), etc. can be used in appropriate combinations. By using a colored layer This allows for higher color reproduction compared to cases where a colored layer is not used. By arranging a region having a colored layer and a region without a colored layer, a region without a colored layer is created. White light in the area may be used directly for display. A portion of the area may be placed without a colored layer. By placing it in this position, the reduction in brightness caused by the colored layer during bright displays can be minimized, and power consumption is reduced by 2 In some cases, the emission can be reduced by 10% to 30%. However, this is due to the spontaneous generation of organic EL elements and inorganic EL elements. When using optical elements for full-color display, R, G, B, Y, and W are used, each with its own emitted color. It is also acceptable to emit light from the element itself. By using a self-luminescent element, it is possible to achieve better results than when using a colored layer. Furthermore, it may be possible to reduce power consumption even further.
[0359] Furthermore, the colorization method involves passing a portion of the light emitted from the white light source through a color filter. In addition to the method of converting to red, green, and blue (color filter method), red, green, blue A method that uses each color of light emission separately (three-color method), or a method that uses red or a portion of the light emitted from blue light emission. A method for converting to green (color conversion method, quantum dot method) may also be applied.
[0360] In this embodiment, regarding the configuration in which liquid crystal elements and EL elements are used as display elements: This will be explained using Figures 20 and 22. Note that Figure 20 is shown in Figure 19, where the dashed line QR is located. Figure 22 is a cross-sectional view of the device, which uses a liquid crystal element as the display element. This is a cross-sectional view of the dashed-dotted line QR shown in 19, and it is a configuration using an EL element as the display element. That is the case.
[0361] First, we will explain the common parts shown in Figures 20 and 22, and then we will discuss the different parts. I will explain below.
[0362] <3-1. Explanation of Common Parts of Display Devices> The display device 700 shown in Figures 20 and 22 includes a wiring section 711 and a pixel section 702. It has a source driver circuit section 704 and an FPC terminal section 708. The line section 711 has a signal line 710. The pixel section 702 has a transistor 750 and It has a capacitive element 790. The source driver circuit section 704 also has a transistor 752. To possess.
[0363] Transistors 750 and 752 are similar to transistor 100D shown above. This is the configuration. Note that the configurations of transistors 750 and 752 are described previously. Other transistors shown in the embodiment may also be used.
[0364] The transistor used in this embodiment is made of an oxide that has been purified to suppress the formation of oxygen vacancies. It has a semiconductor film. The transistor can reduce the off-current. Therefore, the image The holding time of electrical signals such as signals can be extended, and the writing interval is also extended when the power is on. It can be set to a certain value. Therefore, the frequency of refresh operations can be reduced, thus reducing power consumption. It has the effect of suppressing force.
[0365] Furthermore, the transistor used in this embodiment is capable of obtaining a relatively high field-effect mobility. Therefore, high-speed operation is possible. For example, a transistor capable of such high-speed operation can be used in a liquid crystal display. By using it in a display device, the switching transistors in the pixel section and the drive circuit section are used. Driver transistors can be formed on the same substrate. That is, they can be used as a separate drive circuit. Therefore, since there is no need to use semiconductor devices formed from silicon wafers, etc., This reduces the number of parts. In addition, the pixel section also has a transistor that can be driven at high speed. By using ZISTA, high-quality images can be provided.
[0366] Capacitive element 790 has a conductive film that functions with the first gate electrode of transistor 750. The lower electrode is formed through a process of processing the same conductive film, and the transistor 750 has A conductive film that functions as a source electrode and a drain electrode, or functions as a second gate electrode. It has an upper electrode formed through a process of processing the same conductive film as the conductive film. Between the lower electrode and the upper electrode is the first gate insulating film of transistor 750. An insulating film formed through a process of forming an insulating film identical to an insulating film that functions as an insulating film, and a transient The process involves forming an insulating film identical to the insulating film that functions as a protective insulating film on the sta750. An insulating film is provided. That is, the capacitive element 790 has a dielectric film between a pair of electrodes. It is a multilayer structure in which insulating films that function as such are sandwiched together.
[0367] Furthermore, in Figures 20 and 22, transistor 750, transistor 752, and A planarizing insulating film 770 is provided on the quantitative element 790.
[0368] The planarizing insulating film 770 can be polyimide resin, acrylic resin, or polyimideamide resin. , heat-resistant organic materials such as benzocyclobutene resin, polyamide resin, and epoxy resin These can be used. Furthermore, by stacking multiple insulating films formed from these materials... A planarizing insulating film 770 may be formed. Alternatively, a configuration without a planarizing insulating film 770 may be provided. That's fine.
[0369] Furthermore, in Figures 20 and 22, the transistor 750 of the pixel unit 702 and - The transistor 752 in the driver circuit section 704 and a transistor with the same structure While examples of configurations have been given, the system is not limited to these. For example, a pixel unit 702 and a source Different transistors may be used for the driver circuit section 704. Specifically, the pixel section 7 A staggered transistor is used in 02, and the source driver circuit section 704 is shown in Embodiment 1. A configuration using an inverse staggered transistor, or the pixel section 702 as shown in Embodiment 1. An inverse staggered transistor is used, and a staggered transistor is used in the source driver circuit section 704. Configurations using a gate are one example. Note that the above source driver circuit section 704 is gate This can also be interpreted as the driver circuit section.
[0370] Furthermore, signal line 710 is connected to the source and drain electrodes of transistors 750 and 752. It is formed through the same process as a conductive film that functions as a signal line 710, for example, a copper element When using materials containing [specific material], signal delays caused by wiring resistance are reduced, and large-screen displays are possible. It becomes Noh.
[0371] Furthermore, the FPC terminal section 708 includes a connecting electrode 760, an anisotropic conductive film 780, and FPC 71 It has 6. The connecting electrode 760 is the source electrode of transistors 750 and 752 and It is formed through the same process as the conductive film that functions as a rain electrode. Also, the connecting electrode 760 is The terminals of the FPC716 are electrically connected via the anisotropic conductive film 780.
[0372] Furthermore, for example, glass substrates can be used as the first substrate 701 and the second substrate 705. This is possible. Also, the first substrate 701 and the second substrate 705 are flexible substrates. A flexible substrate may be used. Examples of such flexible substrates include plastic substrates. ru.
[0373] Furthermore, a structure 778 is provided between the first substrate 701 and the second substrate 705. The fabricated body 778 is a columnar spacer obtained by selectively etching an insulating film. It is provided to control the distance (cell gap) between the first substrate 701 and the second substrate 705. It is possible to use a spherical spacer as the structure 778.
[0374] Furthermore, the second substrate 705 side has a light-shielding film 738 that functions as a black matrix, A colored film 736 that functions as a color filter, and a light-shielding film 738 and a film in contact with the colored film 736 An insulating film 734 is provided.
[0375] <3-2. Example of a display device configuration using liquid crystal elements> The display device 700 shown in Figure 20 has a liquid crystal element 775. The liquid crystal element 775 is a conductive film It has 772, a conductive film 774, and a liquid crystal layer 776. The conductive film 774 is on the second substrate 705 It is provided on the side and functions as a counter electrode. The display device 700 shown in Figure 20 has a conductive film The orientation state of the liquid crystal layer 776 changes depending on the voltage applied to 772 and the conductive film 774. By controlling the transmission and opacity of light, an image can be displayed.
[0376] Furthermore, the conductive film 772 serves as the source electrode and drain electrode of the transistor 750. It is electrically connected to a conductive film that functions as a conductive film. The conductive film 772 is formed on the planar insulating film 770. It functions as a pixel electrode, that is, one of the electrodes of the display element. Furthermore, the conductive film 772, It functions as a reflective electrode. The display device 700 shown in Figure 20 utilizes ambient light and the conductive film 7 This is a so-called reflective type color liquid crystal display device that reflects light with 72 and displays it through a colored film 736. be.
[0377] The conductive film 772 is a conductive film that is transparent in visible light, or a conductive film that is transparent in visible light. A conductive film with light-transmitting properties can be used. Examples of conductive films that are transparent in visible light include: For example, a material containing one element selected from indium (In), zinc (Zn), and tin (Sn). It is advisable to use a material. Examples of conductive films that are reflective in visible light include aluminum. Alternatively, a material containing silver may be used. In this embodiment, the conductive film 772 is, A reflective conductive film is used in the visible light spectrum.
[0378] In Figure 20, the conductive film 772 is used as the drain electrode of the transistor 750. The examples given illustrate configurations for connecting to a conductive film, but the model is not limited to these. For example, see Figure 21. As shown, conductive film 772 is sandwiched between conductive film 777, which functions as a connecting electrode. It can also be configured to electrically connect to a conductive film that functions as the drain electrode of the ZISTA 750. Furthermore, the conductive film 777 functions as the second gate electrode of the transistor 750. Because it is formed through a process that processes the same conductive film as the conductive film, it does not increase the manufacturing process. It can be formed.
[0379] Furthermore, the display device 700 shown in Figure 20 is an example of a reflective color liquid crystal display device. However, it is not limited to this; for example, a conductive film 772 that is transparent in visible light By using this, it can be used as a transmissive color liquid crystal display device. Alternatively, a reflective color liquid crystal display device can be used. A so-called semi-transmissive color liquid crystal display combining a crystal display device and a transmissive color liquid crystal display device. It may also be used as a crystal display device.
[0380] Here, an example of a transmissive color liquid crystal display device is shown in Figure 23. Figure 23 is shown in Figure 19. This is a cross-sectional view of the dashed-dotted QR code, and it is a configuration using liquid crystal elements as display elements. Furthermore, the display device 700 shown in Figure 23 uses a transverse electric field method (for example, F) as the driving method for the liquid crystal elements. This is an example of a configuration using FS mode. In the configuration shown in Figure 23, the pixel electrode functions An insulating film 773 is provided on the conductive film 772, and a conductive film 774 is provided on the insulating film 773. In this case, the conductive film 774 has the function of a common electrode. The electric field generated between the conductive film 772 and the conductive film 774 via the insulating film 773 causes the liquid The orientation state of the crystal layer 776 can be controlled.
[0381] Also, although not shown in Figures 20 and 23, conductive film 772 or conductive film 774 The configuration includes providing an alignment film on one or both sides of the offset, on the side that is in contact with the liquid crystal layer 776. It is also possible to use polarizing members, phase difference members, and reflectors, although these are not shown in Figures 20 and 23. Optical components (optical substrates) such as protective members may be provided as appropriate. For example, polarizing substrates and position Circular polarization using a phase-difference substrate may also be used. Furthermore, backlights and sidelights may be used as light sources. You may use any of these.
[0382] When using liquid crystal elements as display elements, thermotropic liquid crystals, low molecular weight liquid crystals, and polymer liquid crystals are used. Crystals, polymer-dispersed liquid crystals, ferroelectric liquid crystals, antiferroelectric liquid crystals, etc. can be used. Depending on the conditions, the liquid crystal material can be classified into cholesteric phase, smectic phase, cubic phase, and chi. It exhibits the ranematic phase, isotropic phase, etc.
[0383] Furthermore, when employing a transverse electric field method, it is also possible to use a liquid crystal that exhibits a blue phase without using an alignment layer. The blue phase is one of the liquid crystal phases, and as the temperature of cholesteric liquid crystal is increased, the cholesteric phase This phase appears just before the transition from the blue phase to the isotropic phase. The blue phase only appears within a narrow temperature range. To improve the temperature range, a liquid crystal assembly containing several weight percent or more of chiral agent was mixed in. The resulting material is used in the liquid crystal layer. The liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral agent provides a fast response. Because the degree of polarization is short and the optical properties are isotropic, orientation treatment is unnecessary. Furthermore, an orientation film is not required. Therefore, rubbing is unnecessary, thus eliminating the electrostatic discharge damage caused by rubbing. This can prevent defects and reduce damage to liquid crystal displays during the manufacturing process. Furthermore, liquid crystal materials exhibiting a blue phase have low dependence on viewing angle.
[0384] Furthermore, when using liquid crystal elements as display elements, TN (Twisted Nematic) ) mode, IPS (In-Plane-Switching) mode, FFS (Frin (Field Switching) mode, ASM (Axially Symmetry) tric aligned Micro-cell) mode, OCB(Optical Compensated Birefringence mode, FLC (Ferroe) lectric Liquid Crystal) mode, AFLC (AntiFerr Features such as the (electric Liquid Crystal) mode can be used. .
[0385] Furthermore, a normally black type liquid crystal display device, for example, one that employs vertical alignment (VA) mode, It may also be used as a transmissive liquid crystal display device. Several vertical orientation modes can be listed. For example, MVA (Multi-Domain Vertical Alignment) ) Mode, PVA (Patterned Vertical Alignment) Mode You can use modes such as ASV mode.
[0386] <3-3. Display devices using light-emitting elements> The display device 700 shown in Figure 22 has a light-emitting element 782. The light-emitting element 782 is made of a conductive film It has 772, an EL layer 786, and a conductive film 788. The display device 700 shown in Figure 22 is The EL layer 786 of the optical element 782 emits light, allowing an image to be displayed. Furthermore, the EL layer 786 contains organic compounds or inorganic compounds such as quantum dots.
[0387] Examples of materials that can be used with organic compounds include fluorescent materials or phosphorescent materials. It can be made. Also, as a material that can be used for quantum dots, colloidal quantum dots Materials, alloy-type quantum dot materials, core-shell type quantum dot materials, core-type quantum dot materials, These are some examples. Also, the origins of groups 12 and 16, 13 and 15, or 14 and 16. Materials containing elementary groups may be used. Alternatively, cadmium (Cd), selenium (Se), Zinc (Zn), sulfur (S), phosphorus (P), indium (In), tellurium (Te), lead (P) b) Quantum having elements such as gallium (Ga), arsenic (As), and aluminum (Al). Dot material may also be used.
[0388] Furthermore, the display device 700 shown in Figure 22 has an insulating film 770 and a conductive film 772 on which an insulating film is applied. A border film 730 is provided. The insulating film 730 covers a portion of the conductive film 772. 782 is a top emission structure. Therefore, the conductive film 788 is translucent, E It transmits the light emitted by the L layer 786. In this embodiment, top emission The structure is illustrated as an example, but is not limited to this. For example, light is emitted towards the conductive film 772 side. The bottom emission structure and the dual emission of light to both conductive film 772 and conductive film 788 It can also be applied to ammonium emission structures.
[0389] Furthermore, a colored film 736 is provided in a position that overlaps with the light-emitting element 782, and overlaps with the insulating film 730. A light-shielding film 738 is provided at the location, the routing wiring section 711, and the source driver circuit section 704. Furthermore, the colored film 736 and the light-shielding film 738 are covered with an insulating film 734. Furthermore, the space between the light-emitting element 782 and the insulating film 734 is filled with a sealing film 732. (See Figure 22) In the display device 700 shown, an example was given of a configuration in which a colored film 736 is provided, It is not limited to this. For example, when the EL layer 786 is formed by coloring, A configuration without the film 736 is also possible.
[0390] <3-4. Example of a configuration in which an input / output device is provided to the display device> Furthermore, an input / output device may be provided to the display device 700 shown in Figures 22 and 23. Examples of power devices include touch panels.
[0391] Figure 24 shows a configuration in which a touch panel 791 is provided to the display device 700 shown in Figure 22. Figure 25 shows a configuration in which a touch panel 791 is provided to the display device 700 shown in 3.
[0392] Figure 24 is a cross-sectional view of a configuration in which a touch panel 791 is provided to the display device 700 shown in Figure 22. Figure 25 is a cross-sectional view of a configuration in which a touch panel 791 is provided on the display device 700 shown in Figure 23. be.
[0393] First, the touch panel 791 shown in Figures 24 and 25 will be explained below.
[0394] The touch panel 791 shown in Figures 24 and 25 is a second substrate 705 and a colored film 736. It is a so-called in-cell type touch panel that is placed in between. The touch panel 791 is a colored film Before forming 736, it is sufficient to form it on the second substrate 705 side.
[0395] The touch panel 791 consists of a light-shielding film 738, an insulating film 792, an electrode 793, and an electrode. It has 794, an insulating film 795, an electrode 796, and an insulating film 797. For example, a finger or When a detected object such as a tyrus comes into close proximity, the capacitance between electrode 793 and electrode 794 changes. It can detect transformation.
[0396] Furthermore, above the transistor 750 shown in Figures 24 and 25, there is an electrode 793 and The intersection with electrode 794 is clearly indicated. Electrode 796 is an opening provided in the insulating film 795. Through this, electrode 794 is electrically connected to the two electrodes 793 that sandwich it. (See Figure 24) Figure 25 illustrates a configuration in which the region where the electrode 796 is provided is located in the pixel section 702. However, it is not limited to this, and for example, it may be formed in the source driver circuit section 704.
[0397] Electrodes 793 and 794 are provided in the region overlapping with the light-shielding film 738. Also, see Figure 24. As shown, it is preferable that the electrode 793 is provided so as not to overlap with the light-emitting element 782. Furthermore, as shown in Figure 25, the electrode 793 is provided so as not to overlap with the liquid crystal element 775. It is preferable that the electrode 793 overlaps with the light-emitting element 782 and the liquid crystal element 775. It has an opening in the region. That is, the electrode 793 has a mesh shape. By doing so, the electrode 793 is configured not to block the light emitted by the light-emitting element 782. This is possible. Alternatively, the electrode 793 can be configured not to block the light transmitted through the liquid crystal element 775. This is possible. Therefore, the reduction in brightness due to the placement of the touch panel 791 is extremely small. Because it is small, it is possible to realize a display device that has high visibility and reduced power consumption. The same configuration should be used for the Extreme 794.
[0398] Furthermore, since electrodes 793 and 794 do not overlap with the light-emitting element 782, electrodes 793 and A metal material with low visible light transmittance can be used for electrode 794. Alternatively, electrode 7 Since electrode 93 and electrode 794 do not overlap with liquid crystal element 775, electrodes 793 and 794 This allows the use of metal materials with low visible light transmittance.
[0399] Therefore, compared to electrodes using oxide materials with high visible light transmittance, electrode 793 and This makes it possible to lower the resistance of electrode 794, improving the sensor sensitivity of the touch panel. It is possible.
[0400] For example, conductive nanowires may be used for electrodes 793, 794, and 796. The nanowires have an average diameter of 1 nm to 100 nm, preferably 5 nm to 50 nm. The size should be less than or equal to m, more preferably between 5 nm and 25 nm. The wires include metal nanowires such as Ag nanowires, Cu nanowires, or Al nanowires. A wire or carbon nanotube can be used. For example, electrodes 793, 7 When using Ag nanowires for either 94 or 796, or all of them, in visible light The light transmittance must be 89% or higher, and the sheet resistance must be between 40Ω / □ and 100Ω / □. can.
[0401] Furthermore, Figures 24 and 25 illustrate the configuration of an in-cell type touch panel. However, it is not limited to this. For example, a so-called on-cell type tactile paving can be formed on the display device 700. A so-called out-cell type touch panel, used by being attached to a touch panel or display device 700. That is also acceptable.
[0402] Thus, the display device according to one aspect of the present invention can be combined with various forms of touch panels. It can be used.
[0403] This embodiment may be appropriately combined with other embodiments described herein, at least in part. They can be implemented in combination.
[0404] (Embodiment 4) In this embodiment, a semiconductor device according to one aspect of the present invention is described with reference to Figures 26 and 27. I will explain.
[0405] <4-1. Example of semiconductor device configuration> Figure 26(A) is a top view of a semiconductor device 190 according to one embodiment of the present invention, and Figure 26(B) is This corresponds to the cross-sectional view of the section between the dashed line A1 and A2 shown in Figure 26(A). Figure 26(B) shows a cross-section of transistor Tr1 in the direction of the channel length (L), and the transistor This includes a cross-section of Tr2 in the direction of the channel length (L). Also, Figure 27 is a single point shown in Figure 26(A). This corresponds to a cross-sectional view of the cross-section between the dashed lines B1 and B2. Figure 27 shows the transistor T Includes a cross-section of the channel in the channel width (W) direction of r1.
[0406] Furthermore, in Figure 26(A), to avoid complexity, the configuration of the semiconductor device 190 is shown. Some elements (such as insulating films that function as gate insulating films) and some of the symbols of the components have been omitted. This is illustrated in the diagram. Note that in the top view of the semiconductor device, Figure 26 is also used in subsequent drawings. (A) is similar to the case where some of the components and some of the reference numerals of the components are omitted in the illustration. ru.
[0407] The semiconductor device 190 shown in Figure 26(A)(B) includes transistor Tr1 and transistor It has transistor Tr1 and transistor Tr2, which overlap at least a portion of each other. Both transistor Tr1 and transistor Tr2 are bottom-gate transistors. ru.
[0408] The region in which transistors Tr1 and Tr2 overlap at least partially is By incorporating this feature, the area required for transistor placement can be reduced.
[0409] Transistor Tr1 is connected to a conductive film 104 on a substrate 102, and the substrate 102 and conductive film 104 The insulating film 106 above, the oxide semiconductor film 108 on the insulating film 106, and the oxide semiconductor film 108 The conductive film 112a on top, the conductive film 112b on the oxide semiconductor film 108, and the oxide semiconductor film 1 08, insulating film 114 on conductive film 112a and conductive film 112b, and insulating film 114 on insulating film 114 It comprises a film 116 and a conductive film 122c on the insulating film 116.
[0410] Furthermore, transistor Tr2 has a conductive film 112b and an insulating film 114 on the conductive film 112b. , an insulating film 116 on insulating film 114, an oxide semiconductor film 128 on insulating film 116, and an oxide A conductive film 122a on the semiconductor film 128, a conductive film 122b on the oxide semiconductor film 128, and acid An insulating film 124 on a ion semiconductor film 128, a conductive film 122a, and a conductive film 122b, and an insulating film It has an insulating film 126 on 124 and a conductive film 130 on the insulating film 126. 130 is in contact with the conductive film 122a through the openings 182 provided in the insulating films 124 and 126. It will continue.
[0411] As shown in Figures 26(A)(B), oxide semiconductor film 108 and oxide semiconductor film 1 28 has overlapping regions. Note that as shown in Figures 26(A)(B), the transition The channel region formed in the oxide semiconductor film 108 of transistor Tr1, and the channel region formed in the oxide semiconductor film 108 of transistor Tr2 It is preferable that the channel regions formed in the oxide semiconductor film 128 do not overlap with each other. .
[0412] The channel region of transistor Tr1 and the channel region of transistor Tr2 are relative to each other. When they overlap, one transistor operating can affect the other. There is an effect. To avoid this effect, between transistor Tr1 and transistor Tr2 A configuration that increases the spacing, or a conductive film between transistors Tr1 and Tr2. One example is a configuration that includes [a certain feature]. However, in the former configuration, the semiconductor device becomes thicker. Therefore, for example, when forming a semiconductor device 190 on a flexible substrate, flexibility and other properties are important. This can sometimes become a problem. Also, in the case of the latter configuration, the number of steps for forming the conductive film increases, and the former Similar to the previous configuration, the increased thickness of the semiconductor device can sometimes cause problems.
[0413] On the other hand, in a semiconductor device 190 according to one aspect of the present invention, a transistor Tr1 and a transistor The transistor Tr2 is placed on top of each other, and the channel regions of each transistor are provided without overlapping. Furthermore, by overlapping a portion of the oxide semiconductor film in which the channel region is formed, The placement area of the ZISTA can be suitably reduced.
[0414] Furthermore, oxide semiconductor film 108 and oxide semiconductor film 128 are composed of In and M(M) respectively. It has Al, Ga, Y, or Sn, and Zn. For example, oxide semiconductor film 108 In the oxide semiconductor film 128, the atomic ratio of In is greater than the atomic ratio of M. It is preferable to have a region. However, the semiconductor device according to one aspect of the present invention is not limited thereto. A configuration having a region where the atomic ratio of In is less than the atomic ratio of M, or the atomic ratio of In The configuration may have the same region as the atomic ratio of M.
[0415] Furthermore, oxide semiconductor film 108 and oxide semiconductor film 128 have the same composition, or composition It is preferable that they are roughly the same. Composition of oxide semiconductor film 108 and oxide semiconductor film 128 By making them the same, it becomes possible to reduce manufacturing costs. However, this is one aspect of the present invention. The semiconductor device is not limited to this, and includes an oxide semiconductor film 108 and an oxide semiconductor film 128. The composition may be varied.
[0416] In oxide semiconductor film 108 and oxide semiconductor film 128, the atomic ratio of In is greater than the atomic ratio of M. Having a larger region allows for the field effect transfer of transistors Tr1 and Tr2. The degree can be increased.
[0417] Furthermore, the semiconductor device 190 shown in Figures 26(A) and 26(B) is suitably used in the pixel circuit of a display device. This allows for the arrangement shown in Figures 26(A) and 26(B), which improves the pixel density of the display device. It becomes possible to increase the pixel density. For example, if the pixel density of a display device is 1000 ppi (pixels If the pixel density exceeds 1 per inch, or if the pixel density of the display device exceeds 2000 ppi, Even in this case, by using the arrangement shown in Figures 26(A) and 26(B), the aperture ratio of the pixels can be increased. It can be done. Note that ppi is a unit that represents the number of pixels per inch.
[0418] Furthermore, when the semiconductor device 190 shown in Figures 26(A) and 26(B) is applied to the pixels of a display device, For example, the channel length (L) and channel width (W) of a transistor, or the transistor The wiring and electrode widths connected to the transistor can be made relatively large. Compared to the case where transistors Tr1 and Tr2 are placed on the same plane, Figure 26(A As shown in (B), at least a portion of transistor Tr1 and transistor Tr2 By overlapping the pieces, the line width and other dimensions can be increased, thus reducing variations in processing dimensions. It becomes possible to reduce this.
[0419] Furthermore, in transistor Tr1 and transistor Tr2, either the conductive film or the insulating film is used. Since one or both can be used in common, the number of masks or the number of processes can be reduced. It is possible.
[0420] For example, in transistor Tr1, the conductive film 104 functions as the first gate electrode. Conductive film 112a functions as the source electrode, and conductive film 112b functions as the drain electrode. Furthermore, the conductive film 122c functions as a second gate electrode. Also, in transistor Tr1 And insulating film 106 functions as the first gate insulating film, and insulating films 114, 116 are the second It functions as a gate insulating film. Also, in transistor Tr2, the conductive film 112b is One electrode functions as the gate electrode, and the conductive film 122a functions as the source electrode, and the conductive film 122 b functions as the drain electrode, and the conductive film 130 functions as the second gate electrode. In transistor Tr2, insulating films 114 and 116 function as the first gate insulating film. Furthermore, insulating films 124 and 126 function as second gate insulating films.
[0421] In this specification, etc., insulating film 106 is referred to as the first insulating film, and insulating films 114, 116 are referred to as The second insulating film and insulating films 124 and 126 are sometimes referred to as the third insulating film. .
[0422] Furthermore, an insulating film 134 and an insulating film 136 on the insulating film 134 are provided on the conductive film 130. Furthermore, the insulating films 134 and 136 are provided with openings 184 that reach the conductive film 130. Furthermore, a conductive film 138 is provided on the insulating film 136. Note that the conductive film 138 is It is connected to the conductive film 130 through the opening 184.
[0423] Furthermore, an insulating film 140, an EL layer 150, and a conductive film 144 are provided on the conductive film 138. The insulating film 140 covers a portion of the side edge of the conductive film 138, and conducts between adjacent pixels. The film 138 has a function to prevent short circuits. Furthermore, the EL layer 150 has a light-emitting function. Furthermore, the conductive film 138, the EL layer 150, and the conductive film 144 constitute the light-emitting element 160. The conductive film 138 functions as one electrode of the light-emitting element 160, and the conductive film 144 is It functions as the other electrode of the light-emitting element 160.
[0424] As described above, a semiconductor device according to one aspect of the present invention has a stacked structure of multiple transistors, To reduce the footprint of the transistor. Also, in multiple transistors, the insulating film and By using one or both of the conductive films in common, the number of masks or process steps can be reduced. It can be reduced.
[0425] Also, as shown in Figures 26(A) and (B), transistor Tr1 and transistor Tr2 Each of these has a configuration with two gate electrodes.
[0426] Here, the effect of a configuration with two gate electrodes is shown in Figures 26(A)(B) and 2 We will use number 7 to explain.
[0427] As shown in Figure 27, the conductive film 122c, which functions as the second gate electrode, is located at the opening 18 It is electrically connected to the conductive film 104 which functions as the first gate electrode via 1. The same potential is applied to conductive film 104 and conductive film 122c. Also, as shown in Figure 27 Furthermore, the oxide semiconductor film 108 is positioned to face the conductive film 104 and the conductive film 122c. It is sandwiched between two conductive films that function as two gate electrodes. Conductive film 104 and conductive film 1 The length of 22c in the channel width direction is the length of the oxide semiconductor film 108 in the channel width direction. The entire oxide semiconductor film 108 is longer than that, and the insulating films 106, 114, and 116 are connected. It is covered with conductive film 104 and conductive film 122c.
[0428] In other words, conductive film 104 and conductive film 122c are provided on insulating films 106, 114, and 116. It is connected at the opening 181 and is located outside the side edge of the oxide semiconductor film 108. It has a region located at such a position. With this configuration, the transistor Tr1 is included The oxide semiconductor film 108 is electrically surrounded by the electric fields of the conductive film 104 and the conductive film 122c. This is possible. In other words, transistor Tr1 has an S-Channel structure.
[0429] In the above explanation, the first gate electrode and the second gate electrode are connected. The configuration is illustrated with an example, but it is not limited to this. For example, the transistor shown in Figure 26(B) The conductive film 130, which functions as a second gate electrode like Tr2, is located at the base of transistor Tr2. A configuration that electrically connects to a conductive film 122a that functions as a drain electrode or drain electrode. You may do so.
[0430] <4-2. Components of Semiconductor Devices> Next, the components included in the semiconductor device of this embodiment will be described in detail. Components similar to those shown in Embodiment 1 are denoted by the same reference numerals and are described in detail below. I will omit further details.
[0431] [Conductive film] Conductive film 122a, conductive film 122b, conductive film 122c, conductive film 130, conductive film 138, and The conductive film 144 is a conductive film 104, conductive films 112a, 112b, and conductive film 120 The same materials as in a and 120b can be used.
[0432] Also, conductive film 122a, conductive film 122b, conductive film 122c, conductive film 130, conductive film 13 8, and the conductive film 144 contains an oxide having indium and tin, tungsten and indium Oxides containing tungsten, indium, and zinc, titanium and zinc Oxides containing zinc, oxides containing titanium, indium, and tin, and oxides containing indium and zinc Oxides having silicon, indium and tin, indium and gallium Oxide conductors (OCs), such as oxides containing zinc, can also be used.
[0433] In particular, the above-mentioned oxide conductor (OC) can be suitably used for the conductive film 130.
[0434] [Insulated film] Insulating film 124, insulating film 126, and insulating film 134 are insulating film 106, insulating film 11 4. Materials similar to those used for insulating film 116 can be used.
[0435] Furthermore, contact with either or both of the oxide semiconductor film 108 and the oxide semiconductor film 128. The insulating film is preferably an oxide insulating film, and is applied in excess of the stoichiometric composition. It is more preferable to have a region containing oxygen (excess oxygen region). In other words, excess oxygen Oxide insulating films having elementary regions are insulating films that can release oxygen.
[0436] Furthermore, as an oxide insulating film having the above-mentioned excess oxygen region, for example, under an oxygen atmosphere Forming an insulating film, heat-treating the insulating film after deposition in an oxygen atmosphere, or insulating film after deposition The film can be formed by adding oxygen to the film. Another method involves adding oxygen to the insulating film after it has been formed. Plasma treatment is preferred for this purpose.
[0437] Furthermore, it functions as an insulating film for the gates of transistors Tr1 and Tr2. Silicon nitride may be used for the film. When using silicon nitride, the following effects are achieved. Compared to silicon oxide, silicon nitride has a higher dielectric constant. The efficiency is high, and the thickness required to obtain capacitance equivalent to silicon oxide is large, therefore the insulating film is Thick film formation is possible. Therefore, the dielectric strength of transistors Tr1 and Tr2 By suppressing the pressure drop and further improving the dielectric strength, transistor Tr1 and transistor This can suppress electrostatic discharge breakdown of Tr2.
[0438] Furthermore, insulating films 114, 116, 124, and 126 are oxide semiconductor films 108 or oxide It has the function of supplying oxygen to one or both of the semiconductor films 128. The edge films 114, 116, 124, and 126 contain oxygen. Also, the insulating films 114 and 124 are It is an insulating film that can permeate oxygen. The insulating film 114 is an insulating film that will be formed later. It also functions as a damage mitigation film for the oxide semiconductor film 108 when forming film 116, and The edge film 124 is a barrier to the oxide semiconductor film 128 when forming the insulating film 126 which will be formed later. It also functions as an image relaxation membrane.
[0439] The insulating films 114 and 124 have a thickness of 5 nm to 150 nm, preferably 5 nm. Silicon oxide, silicon oxide, silicon nitride, etc., with a wavelength of 50 nm or less can be used.
[0440] Furthermore, the insulating films 114 and 124 preferably have a low defect rate, and typically, ESR Measurement revealed that the signal appearing at g=2.001 originates from the silicon dangling bond. Pin density is 3 × 10 17spins / cm 3 The following is preferable. This is an insulating film. If the defect density in 114 and 124 is high, oxygen will bond to the defects, and the insulating film 11 The amount of oxygen permeable at point 4 decreases.
[0441] Furthermore, insulating films 114 and 124 have low energy level density due to nitrogen oxides. It can be formed using this. Furthermore, the level density due to the nitrogen oxide is the oxide semiconductor. The energy at the upper end of the valence band of a body membrane (Ev_os) and the energy at the lower end of the conduction band of an oxide semiconductor film It may be formed between the energy (Ec_os). As the oxide insulating film, nitrogen Silicon oxide nitride film with low oxide emission, or silicon oxide nitride film with low nitrogen oxide emission. Aluminum oxide films and the like can be used.
[0442] Furthermore, silicon oxidnitride films with low nitrogen oxide emissions can be analyzed using the temperature-controlled desorption gas analysis method (TD). In S), the membrane releases more ammonia than nitrogen oxides, and typically, Ammonia release amount is 1 × 10 18 / cm 3 The above 5 x 10 19 / cm 3 The following applies. The amount of ammonia released above is when the heat treatment temperature in TDS is between 50°C and 650°C. The total amount is below, or in the range of 50°C to 550°C. Also, the above ammonia emissions The output is the total amount converted to ammonia molecules in TDS.
[0443] The insulating film 134 serves as a protective insulating film for transistors Tr1 and Tr2. To have the ability.
[0444] The insulating film 134 has either hydrogen or nitrogen, or both. 34 contains nitrogen and silicon. The insulating film 134 contains oxygen, hydrogen, water, and alkali. It has the function of blocking metals, alkaline earth metals, etc. By providing an insulating film 134 Therefore, the diffusion of oxygen from the oxide semiconductor film 108 and the oxide semiconductor film 128 to the outside, and Diffusion of oxygen contained in the border films 114, 116, 124, and 126 to the outside, and oxidation from the outside This prevents hydrogen, water, and other substances from entering the semiconductor films 108 and 128.
[0445] For example, a nitride insulating film can be used as the insulating film 134. Examples include silicon nitride, silicon oxide nitride, aluminum nitride, and aluminum oxide nitride. These include:
[0446] The insulating film 136 and insulating film 140 are designed to flatten irregularities caused by transistors, etc. It has the ability. The insulating film 136 and insulating film 140 can be any material that is insulating, and can be an inorganic material. Alternatively, it is formed using organic materials. The inorganic material may be a silicon oxide film or silicon oxidnitridation film. Condenser film, silicon nitride film, silicon nitride film, aluminum oxide film, aluminum nitride film Examples include films and the like. Examples of organic materials include acrylic resins or polyimide resins. Examples of photosensitive resin materials include the following.
[0447] [Oxide semiconductor film] The oxide semiconductor film 128 can be made from the same material as the oxide semiconductor film 108. Cut.
[0448] [EL layer] The EL layer 150 has a light-emitting function and has at least a light-emitting layer. 0 is a component that, in addition to the light-emitting layer, includes a hole injection layer, a hole transport layer, an electron transport layer, and an electron injection layer. It has a functional layer. Low molecular weight compounds and high molecular weight compounds can be used in the EL layer 150. ru.
[0449] This embodiment may be appropriately combined with other embodiments described herein, at least in part. They can be implemented in combination.
[0450] (Embodiment 5) In this embodiment, the display unit of a display device using a semiconductor device according to one aspect of the present invention is used An example of a display panel that can perform this function will be explained using Figures 28 and 29. The display panel shown has both a reflective liquid crystal element and a light-emitting element, and exhibits both transmission and reflection modes. This is a display panel that can show both modes.
[0451] <5-1. Example of display panel configuration> Figure 28 is a schematic perspective view of a display panel 600 according to one embodiment of the present invention. Display panel 600 It has a configuration in which substrate 651 and substrate 661 are bonded together. In Figure 28, substrate 661 This is indicated by a dashed line.
[0452] The display panel 600 includes a display unit 662, a circuit 659, wiring 666, etc. Circuit board 651 For example, it includes a circuit 659, wiring 666, and a conductive film 663 that functions as a pixel electrode. It can be kicked. Also, Figure 28 shows an example where IC673 and FPC672 are mounted on substrate 651. This indicates that the configuration shown in Figure 28 consists of the display panel 600, the FPC672 and I It can also be described as a display module that has C673.
[0453] Circuit 659 can be a circuit that functions, for example, as a scan line driving circuit.
[0454] Wiring 666 has the function of supplying signals and power to the display unit and circuit 659. Power is supplied externally via FPC672 or from IC673 to wiring 666.
[0455] Furthermore, in Figure 28, the substrate 665 is formed using the COG (Chip On Glass) method, etc. This shows an example where IC673 is provided in 1. IC673 is, for example, in a scan line driving circuit. Alternatively, an IC that functions as a signal line drive circuit or the like can be applied. If 00 includes a circuit that functions as a scan line drive circuit and a signal line drive circuit, External circuits are provided to function as drive circuits and signal line drive circuits, and the display is connected via FPC672. When inputting signals to drive the NEL600, for example, a configuration without IC673 is used. It is also permissible to use IC673 with COF (Chip On Film) or the like. It can also be implemented in FPC672.
[0456] Figure 28 shows a magnified view of a part of the display unit 662. The display unit 662 has multiple tables The conductive film 663 of the element is arranged in a matrix. It has the function of reflecting light and functions as a reflective electrode for the liquid crystal element 640, which will be described later.
[0457] Furthermore, as shown in Figure 28, the conductive film 663 has an opening. The substrate 651 side has a light-emitting element 660. Light from the light-emitting element 660 is directed to the conductive film 663. It is injected towards the substrate 661 through the opening.
[0458] <5-2. Examples of Cross-Sectional Configurations> Figure 29 shows a portion of the area including the FPC672 and circuit 65 of the display panel illustrated in Figure 28. Cross-sections obtained by cutting a portion of the area including 9 and a portion of the area including the display unit 662. Here is an example.
[0459] The display panel has an insulating film 620 between substrate 651 and substrate 661. Between 1 and the insulating film 620 are the light-emitting element 660, transistor 601, transistor 605, It has a transistor 606, a colored layer 634, etc. Also, between the insulating film 620 and the substrate 661, It has liquid crystal elements 640, a colored layer 631, etc. Also, the substrate 661 and the insulating film 620 are bonded together by an adhesive layer 64 The substrate 651 and the insulating film 620 are bonded via adhesive layer 642. .
[0460] Transistor 606 is electrically connected to liquid crystal element 640, and transistor 605 is generated It is electrically connected to the optical element 660. Transistors 605 and 606 are either Since these are also formed on the substrate 651 side surface of the insulating film 620, they can be formed using the same process. It can be manufactured by [this method].
[0461] The substrate 661 has a colored layer 631, a light-shielding film 632, an insulating film 621, and a liquid crystal element 640. A conductive film 613, an alignment film 633b, an insulating film 617, etc., which function as a common electrode are provided. The insulating film 617 is used as a spacer to maintain the cell gap of the liquid crystal element 640. To be able to.
[0462] On the substrate 651 side of insulating film 620, there are insulating films 681, 682, 683, and insulation An insulating layer such as film 684 and insulating film 685 is provided. A portion of the insulating film 681 is each It functions as a gate insulating layer for the transistor. Insulating film 682, insulating film 683, and insulating film 6 84 is provided covering each transistor. Also, insulating film 684 is covered by insulating film 68 5 is provided. The insulating film 684 and insulating film 685 have the function of a planarization layer. Here, insulating films 682, 683, and an insulating film are used as insulating layers covering transistors, etc. This example shows the case where there are three layers of the border film 684, but it is not limited to this and can include cases with four or more layers. It may also be a single layer or two layers. Furthermore, an insulating film 684 that functions as a planarizing layer. If it is not needed, it does not need to be provided.
[0463] Furthermore, transistors 601, 605, and 606 are partially A conductive film 654 that functions as a gate, and a conductive film 6 that partially functions as a source or drain. 52. It has a semiconductor film 653. Here, multiple layers obtained by processing the same conductive film are They all feature the same hatching pattern.
[0464] The liquid crystal element 640 is a reflective liquid crystal element. The liquid crystal element 640 consists of a conductive film 635 and a liquid crystal layer. It has a laminated structure in which conductive films 612 and 613 are stacked. Also, conductive film 635 on the substrate 651 side A conductive film 663 that reflects visible light is provided in contact with the opening 655. It has the following properties. Furthermore, conductive films 635 and 613 contain a material that transmits visible light. An alignment film 633a is provided between the liquid crystal layer 612 and the conductive film 635, and the liquid crystal layer 612 and the conductive film 613 An alignment film 633b is provided between them. Also, a polarizing plate 65 is provided on the outer surface of the substrate 661. It has 6.
[0465] In the liquid crystal element 640, the conductive film 663 has the function of reflecting visible light, and the conductive film 613 It has the function of transmitting visible light. Light incident from the substrate 661 side is filtered by the polarizing plate 656. It is polarized, passes through the conductive film 613 and the liquid crystal layer 612, and is reflected by the conductive film 663. It passes through layer 612 and conductive film 613 again and reaches polarizing plate 656. At this time, conductive film 6 The orientation of the liquid crystal is controlled by the voltage applied between 63 and the conductive film 613, thereby controlling the optical modulation of light. This is possible. In other words, it is possible to control the intensity of the light emitted through the polarizing plate 656. This is possible. Also, light is absorbed by the colored layer 631, which absorbs light outside of a specific wavelength range. The resulting light will, for example, be red in color.
[0466] The light-emitting element 660 is a bottom-emission type light-emitting element. The light-emitting element 660 is an insulating The laminate is stacked in the following order from the film 620 side: conductive film 643, EL layer 644, and conductive film 645b. It has a structure. Furthermore, a conductive film 645a is provided covering the conductive film 645b. Conductive film 6 45b contains a material that reflects visible light, and conductive films 643 and 645a transmit visible light. Includes materials that light the light-emitting element 660 emits light from the colored layer 634, insulating film 620, and aperture 65 5. It is injected towards the substrate 661 via the conductive film 613, etc.
[0467] Here, as shown in Figure 29, a conductive film 635 that transmits visible light is provided in the aperture 655. It is preferable that this is done so that even in the area overlapping with the opening 655, the other areas Because the liquid crystals align in the same way as in other regions, liquid crystal alignment defects occur at the boundaries of these regions, resulting in unintended results. This can suppress the leakage of light that is not present.
[0468] Here, a linear polarizing plate may be used as the polarizing plate 656 placed on the outer surface of the substrate 661. However, circular polarizers can also be used. Examples of circular polarizers include linear polarizers and quarter-wave polarizers. A stack of long phase difference plates can be used. This suppresses external light reflection. This can be done. Also, depending on the type of polarizing plate, the cell gasket of the liquid crystal element used in the liquid crystal element 640 By adjusting the prism, orientation, drive voltage, etc., the desired contrast can be achieved. good.
[0469] Furthermore, an insulating film 647 is provided on the insulating film 646 that covers the edge of the conductive film 643. The insulating film 647 provides space to prevent the insulating film 620 and the substrate 651 from coming into excessively close proximity. It also functions as a shielding mask (metal mask) for the EL layer 644 and conductive film 645a. When forming using (k), a mechanism is used to prevent the shielding mask from coming into contact with the surface to be formed. It may have the function. Furthermore, the insulating film 647 may be omitted if it is not needed.
[0470] Either the source or drain of transistor 605 is connected to the light-emitting element 6 via the conductive film 648. It is electrically connected to the conductive film 643 of 60.
[0471] Either the source or drain of transistor 606 is connected to the conductive film 66 via the connector 607. It is electrically connected to 3. The conductive film 663 and the conductive film 635 are provided in contact with each other, and these They are electrically connected. Here, the connection part 607 is connected via an opening provided in the insulating film 620. This is the portion that connects the conductive films provided on both sides of the insulating film 620.
[0472] A connection portion 604 is provided in the area where substrates 651 and 661 do not overlap. Part 604 is electrically connected to the FPC 672 via the connecting layer 649. Connecting part 60 4 has the same configuration as connection part 607. The upper surface of connection part 604 is the same as the conductive film 635. A conductive film obtained by processing one conductive film is exposed. As a result, the connection part 604 and FP C672 can be electrically connected via the connecting layer 649.
[0473] A connecting portion 687 is provided in a part of the area where the adhesive layer 641 is provided. In 87, a conductive film obtained by processing the same conductive film as conductive film 635, and conductive film 613 A portion of it is electrically connected by connector 686. Therefore, the shape on the substrate 661 side The conductive film 613 is then subjected to signals input from the FPC 672 connected to the substrate 651. Alternatively, the electric potential can be supplied via the connection part 687.
[0474] For example, conductive particles can be used as the connector 686. In this case, a material is used in which the surface of particles such as organic resin or silica is coated with a metal material. Yes, it is possible. Using nickel or gold as the metallic material is preferable because it reduces contact resistance. Particles coated in layers of two or more metal materials, such as nickel further coated with gold. It is preferable to use a material that undergoes elastic or plastic deformation as the connecting body 686. It is preferable to use it. In this case, the conductive particle connector 686 is as shown in Figure 29. In some cases, it may take on a shape that is flattened in the vertical direction. This allows the connector 686 and the electric The contact area with the conductive film that is connected via gas increases, reducing contact resistance and preventing connection failures. This can suppress the occurrence of malfunctions.
[0475] It is preferable that the connecting body 686 be positioned so as to be covered by the adhesive layer 641. For example, The connecting elements 686 should be dispersed in the adhesive layer 641 before the transformation process.
[0476] Figure 29 shows an example of circuit 659 in which transistor 601 is provided. ru.
[0477] In Figure 29, as an example of transistors 601 and 605, channels are formed. A configuration is applied in which the semiconductor film 653 to be made is sandwiched between two gates. One of the gates is The conductive film 654 allows the other gate to overlap with the semiconductor film 653 via the insulating film 682. It is composed of film 623. With this configuration, the threshold of the transistor The voltage can be controlled. In this case, two gates are connected and the same signal is applied to them. The transistor may be driven by supplying power. Such a transistor may be driven by other transistors. Compared to a conventional inverter, it is possible to increase the field-effect mobility and increase the on-current. This makes it possible to create circuits that can be driven at high speeds. Furthermore, the circuit This makes it possible to reduce the occupied area of the part. By applying transistors with a large on-current... Therefore, even if the number of wires increases when the display panel is made larger or higher resolution, each wire This makes it possible to reduce signal delay in lines and suppress display inconsistencies.
[0478] Furthermore, the transistor in circuit 659 and the transistor in display unit 662 are the same They may have the same structure. Also, the multiple transistors in circuit 659 may all have the same structure. It may be present, or a combination of transistors with different structures may be used. Also, the display unit The multiple transistors in the 662 may all have the same structure, or they may have different structures. Rangista may be used in combination.
[0479] At least one of the insulating films 682 and 683 covering each transistor is protected from water and hydrogen It is preferable to use a material that does not easily allow impurities such as the insulating film 682 to diffuse. The insulating film 683 can function as a barrier film. This makes it possible to effectively suppress the diffusion of impurities from the outside into the transistor. This enables the creation of highly reliable display panels.
[0480] On the substrate 661 side, an insulating film 621 is provided covering the colored layer 631 and the light-shielding film 632. The insulating film 621 may also function as a planarization layer. Therefore, the surface of the conductive film 613 can be made approximately flat, and the orientation state of the liquid crystal layer 612 can be made uniform. ru.
[0481] An example of a method for manufacturing the display panel 600 will be described. For example, a support having a release layer A conductive film 635, a conductive film 663, and an insulating film 620 are formed sequentially on the substrate, and then a transient After forming the sta 605, transistor 606, light-emitting element 660, etc., an adhesive layer 642 is used Then the substrate 651 and the support substrate are bonded together. After that, the release layer and the insulating film 620, and the release layer and the guide The support substrate and the release layer are removed by peeling at each interface of the electrode film 635. Separately, a base on which a colored layer 631, a light-shielding film 632, a conductive film 613, etc., have been formed in advance. Prepare board 661. Then, drop liquid crystal onto substrate 651 or substrate 661 and bond adhesive layer 641 By bonding substrates 651 and 661 together, the display panel 600 can be manufactured. can.
[0482] As the release layer, a material that exhibits delamination at the interface between the insulating film 620 and the conductive film 635 is appropriately selected. It is possible to select a layer containing a high-melting-point metal material such as tungsten as the release layer. Layers containing the oxide of the metal material are laminated and used, and the insulating film 620 on the release layer is nitride. It is preferable to use layers made of multiple layers of silicon dioxide, silicon oxide nitride, silicon nitride oxide, etc. Using a high-melting-point metal material for the delamination layer will raise the formation temperature of subsequent layers. This makes it possible to reduce the concentration of impurities and realize a highly reliable display panel.
[0483] As the conductive film 635, an oxide or nitride such as a metal oxide or metal nitride may be used. This is preferable. When using metal oxides, hydrogen, boron, phosphorus, nitrogen, and other ions are preferable. At least one of the concentration of the pure substance and the amount of oxygen deficiency is compared to the semiconductor layer used in the transistor. The improved material can then be used for the conductive film 635.
[0484] <5-3. About each component> The following describes each of the components shown above. Note that the functions shown in the previous embodiment are not included. A description of configurations with similar functionality will be omitted.
[0485] [Adhesive layer] The adhesive layer can be a photocuring adhesive such as an UV-curing type, a reaction-curing adhesive, or a thermosetting adhesive. Various types of curing adhesives, such as anaerobic adhesives, can be used. Epoxy resin, acrylic resin, silicone resin, phenolic resin, polyimide resin, imi Plastic resin, PVC (polyvinyl chloride) resin, PVB (polyvinyl butyral) resin, E Examples include VA (ethylene vinyl acetate) resin. In particular, the moisture permeability of epoxy resins, etc. Materials with low properties are preferred. A two-part resin mixture may also be used. Furthermore, adhesive sheets, etc. You may use it.
[0486] Furthermore, the above resin may contain a desiccant. For example, an alkaline earth metal oxide (acid Using substances that adsorb moisture by chemical adsorption, such as calcium carbonate or barium oxide. It is possible to remove moisture through physical adsorption, such as with zeolite or silica gel. Adsorbent substances may be used. If a desiccant is included, impurities such as moisture may enter the element. This is preferable because it can suppress the process and improve the reliability of the display panel.
[0487] Furthermore, by mixing a filler or light scattering material with a high refractive index into the above resin, light can be extracted. This can improve efficiency. For example, titanium dioxide, barium oxide, zeolite, and Aquatic plants such as ruconium can be used.
[0488] [Connection layer] As a connecting layer, an anisotropic conductive film (ACF) is used. (Active Film) and anisotropic conductive paste (ACP: Anisotropic C) You can use inductive pastels, etc.
[0489] [Colored layer] Materials that can be used for the colored layer include metal materials, resin materials, pigments, or dyes. Examples include resin materials.
[0490] [Light blocking layer] Materials that can be used as a light-shielding layer include carbon black, titanium black, Examples include metals, metal oxides, and composite oxides containing solid solutions of multiple metal oxides. Light-shielding layer This may be a film containing a resin material, or a thin film of an inorganic material such as a metal. Furthermore, a laminated film containing the material for the colored layer can be used as the light-shielding layer. For example, a film of a certain color A film containing a material used for a light-transmitting colored layer, and a material used for a colored layer that transmits light of other colors. A laminated structure with a film containing can be used. By using the same material for the colored layer and the light-shielding layer, This is preferable because it allows for the standardization of equipment and simplifies the process.
[0491] The above is a description of each component.
[0492] <5-4. Example of manufacturing method> This section describes an example of a method for manufacturing a display panel using a flexible substrate.
[0493] Here, we have display elements, circuits, wiring, electrodes, optical components such as colored layers and light-shielding layers, and insulating layers. Layers containing such elements will be collectively referred to as element layers. For example, an element layer includes display elements, In addition to the display elements, there are also the wiring that electrically connects to the display elements, and transistors used in pixels and circuits. It may also be equipped with such elements.
[0494] Furthermore, at the stage when the display element is completed (the manufacturing process is finished), the element layer is A supporting and flexible component will be called a substrate. For example, a substrate has a thickness This also includes extremely thin films, etc., with a thickness of 10 nm to 300 μm.
[0495] Typical methods for forming an element layer on a substrate that is flexible and has an insulating surface include There are two methods, as listed below. One is to form the element layer directly on the substrate. Another method involves forming an element layer on a support substrate different from the substrate, and then peeling the element layer from the support substrate. This is a method of transferring the element layer onto the substrate. Although not explained in detail here, the two above... In addition to the above method, an element layer is formed on a non-flexible substrate, and the substrate is thinned by polishing or the like. Another method is to make it flexible by doing so.
[0496] If the materials constituting the substrate have heat resistance to the heat generated during the device layer formation process, Forming the element layer directly on the substrate is preferable because it simplifies the process. When the element layer is formed with the plate fixed to the support substrate, transport within and between devices is It is preferable because it makes things easier.
[0497] Furthermore, when using a method in which the element layer is formed on a support substrate and then transferred to a substrate, first the support A release layer and an insulating layer are laminated onto a support base, and an element layer is formed on the insulating layer. Subsequently, a support base The material and the element layer are separated, and the element layer is transferred to the substrate. At this time, the interface between the support substrate and the delamination layer. Therefore, a material should be selected that causes delamination at the interface between the release layer and the insulating layer, or within the release layer itself. In this method, the element layer is formed by using heat-resistant materials for the support substrate and release layer. This allows for an increase in the upper limit of the temperature applied during the process, resulting in the formation of an element layer with more reliable components. This is preferable because it allows for this.
[0498] For example, as a release layer, a layer containing a high melting point metal material such as tungsten, and the metal material Layers containing oxides are stacked and used, with silicon oxide and silicon nitride as the insulating layer on the release layer. It is preferable to use a layer made by stacking multiple silicon oxide nitride, silicon nitride oxide, etc.
[0499] Methods for separating the element layer from the support substrate include applying mechanical force and removing the delamination layer. Examples include chipping or penetrating the peeling interface with a liquid. Alternatively, the difference in thermal expansion between the two layers forming the delamination interface can be used for heating or cooling. The peeling may be performed by this method.
[0500] Furthermore, if peeling is possible at the interface between the support substrate and the insulating layer, a peeling layer may not be necessary.
[0501] For example, glass is used as the support substrate and an organic resin such as polyimide is used as the insulating layer. This can be done by locally heating a portion of the organic resin using a laser beam or the like. Alternatively, the organic resin may peel off due to physical cutting or piercing of a portion of it by a sharp object. A starting point may be formed, and peeling may be performed at the interface between the glass and the organic resin. As such, using a photosensitive material is preferable because it makes it easy to create shapes such as openings. Yes. Furthermore, the laser light mentioned above is, for example, light in the wavelength range from visible light to ultraviolet light. It is preferable that the light has a wavelength of 200 nm or more and 400 nm or less, preferably with a wavelength of Light with a wavelength of 250 nm to 350 nm can be used. In particular, an emission of 308 nm light. Using a sima laser is preferable because it offers superior productivity. Furthermore, the third Nd:YAG laser is also preferable. Solid-state UV lasers, such as UV lasers with a wavelength of 355 nm (also known as semiconductor UV lasers), produce high-harmonics. You may also use (iu).
[0502] Alternatively, a heating layer is provided between the support substrate and an insulating layer made of organic resin, and the heating layer is heated. By doing so, delamination may occur at the interface between the heating layer and the insulating layer. The heating layer is a current Materials that generate heat when a fluid is passed through them, materials that generate heat when light is absorbed, and materials to which a magnetic field is applied. Various materials can be used, such as materials that generate heat. For example, the heating layer can be Semiconductors, metals, and insulators can be selected and used.
[0503] In the method described above, the insulating layer made of organic resin is used as a substrate after peeling. It is possible.
[0504] The above describes the method for manufacturing a flexible display panel.
[0505] This embodiment may be appropriately combined with other embodiments described herein, at least in part. They can be implemented in combination.
[0506] (Embodiment 6) In this embodiment, Figure 30 shows a display device having a semiconductor device according to one aspect of the present invention. We will use this to provide an explanation.
[0507] <6. Circuit configuration of the display device> The display device shown in Figure 30(A) has a region having pixels of the display element (hereinafter referred to as the pixel portion 502 and ( ) and a circuit section ( ) which is located outside the pixel section 502 and has a circuit for driving the pixels. Hereinafter referred to as the drive circuit section 504, and a circuit having a function to protect the element (hereinafter referred to as the protection circuit 504) It has a (6) and a terminal section 507. Note that the protection circuit 506 is not provided. That's fine.
[0508] Part or all of the drive circuit section 504 is formed on the same substrate as the pixel section 502. This is desirable. This allows for a reduction in the number of components and terminals. Drive circuit section 504 If part or all of it is not formed on the same substrate as the pixel section 502, the drive cycle Part or all of road section 504 is COG or TAB (Tape Automated B It can be implemented by (onding).
[0509] The pixel section 502 is arranged in X rows (where X is a natural number greater than or equal to 2) and Y columns (where Y is a natural number greater than or equal to 2). It has a circuit for driving multiple display elements (hereinafter referred to as the pixel circuit 501), and the drive cycle The path section 504 is a circuit that outputs a signal (scan signal) for selecting pixels (hereinafter referred to as a gate driver). 504a) is used to supply signals (data signals) for driving the pixel display elements. It has a drive circuit such as the circuit (hereinafter referred to as source driver 504b).
[0510] The gate driver 504a has a shift register, etc. The gate driver 504a is A signal to drive the shift register is input via terminal 507, and the signal is output. For example, the gate driver 504a receives input such as a start pulse signal and a clock signal. The gate driver 504a outputs a pulse signal. The scanning signal is applied to the wiring (and It has the function of controlling the potential of the scan lines (referred to as GL_1 to GL_X) below. Multiple drivers 504a are provided, and multiple gate drivers 504a are used to control the scan line GL_1 The path to GL_X may be divided and controlled. Alternatively, the gate driver 504a may use an initialization signal. It has the function of supplying, however, the gate driver 50 4a can also supply another signal.
[0511] The source driver 504b has a shift register, etc. The source driver 504b Through terminal 507, in addition to signals for driving the shift register, the data signals are generated. A signal (image signal) is input. The source driver 504b uses the image signal to create a pixel circuit. It has the function of generating data signals to write to 501. Also, source driver 504b The data signal is transmitted according to the pulse signal obtained by inputting the start pulse, clock signal, etc. It has the function of controlling the output of the number. In addition, the source driver 504b is given a data signal. It has the function of controlling the potential of the wiring (hereinafter referred to as data lines DL_1 to DL_Y). Alternatively, source driver 504b may have the ability to supply initialization signals. However, this is not limited to the source driver 504b, which may also supply other signals. It is possible.
[0512] The source driver 504b is configured using, for example, multiple analog switches. The source driver 504b sequentially turns on multiple analog switches, The image signal can be time-divided and output as a data signal. It can also use shift registers, etc. You may use this to configure source driver 504b.
[0513] Each of the multiple pixel circuits 501 receives a scan signal from one of the multiple scan lines GL. A pulse signal is input via one of several data lines DL to which a data signal is supplied. A data signal is input. In addition, each of the multiple pixel circuits 501 is a gate driver. 504a controls the writing and retention of data in the data signal. For example, m rows and n columns. The pixel circuit 501 of the eye is connected to the gate driver via the scan line GL_m (where m is a natural number less than or equal to X). A pulse signal is input from 504a, and the data line DL_n( A data signal is input from the source driver 504b via n (where n is a natural number less than or equal to Y).
[0514] The protection circuit 506 shown in Figure 30(A) is, for example, a gate driver 504a and a pixel circuit 5 It is connected to scan line GL, which is the wiring between 01. Alternatively, the protection circuit 506 is connected to source driver It is connected to the data line DL, which is the wiring between the light bar 504b and the pixel circuit 501. Alternatively, The protection circuit 506 is connected to the wiring between the gate driver 504a and the terminal section 507. Yes, it is possible. Alternatively, the protection circuit 506 provides a connection between the source driver 504b and the terminal section 507. It can be connected to a wire. The terminal 507 is used to supply power and to the display device from an external circuit. This refers to the part equipped with terminals for inputting control signals and image signals.
[0515] The protection circuit 506, when a potential outside a certain range is applied to the wiring to which it is connected, This is a circuit that creates a conductive state between two wires.
[0516] As shown in Figure 30(A), the pixel section 502 and the drive circuit section 504 each have a protection circuit 50 By providing 6, ESD (Electrostatic Discharge: This can improve the resistance of display devices to overcurrents generated by electrostatic discharge, etc. However, the configuration of the protection circuit 506 is not limited to this, for example, the gate driver 504a Configuration with protection circuit 506 connected, or with protection circuit 506 connected to source driver 504b. This configuration is also possible. Alternatively, a configuration in which the protection circuit 506 is connected to the terminal 507. It can also be done this way.
[0517] Furthermore, in Figure 30(A), the gate driver 504a and the source driver 504b are Therefore, although an example is shown in which the drive circuit section 504 is formed, the configuration is not limited to this. For example, only the gate driver 504a is formed, and a separately prepared source driver circuit is formed. A substrate (for example, a drive circuit substrate formed from a single-crystal semiconductor film or a polycrystalline semiconductor film) is put into practice. It can also be used as a mounting configuration.
[0518] Furthermore, the multiple pixel circuits 501 shown in Figure 30(A) have, for example, the configuration shown in Figure 30(B). It can be done this way.
[0519] The pixel circuit 501 shown in Figure 30(B) consists of a liquid crystal element 570, a transistor 550, and It has a quantitative element 560 and a transistor 550 as shown in the previous embodiment. It can be applied.
[0520] The potential of one of the pair of electrodes of the liquid crystal element 570 is set appropriately according to the specifications of the pixel circuit 501. The orientation state of the liquid crystal element 570 is set according to the data being written to it. A common potential is set on one of the pairs of electrodes of the liquid crystal element 570 that each of the pixel circuits 501 possesses. (Common potential) may be applied. Also, a pair of liquid crystal elements 570 of the pixel circuit 501 in each row One of the electrodes may be given a different potential.
[0521] For example, the driving method for a display device equipped with a liquid crystal element 570 is TN mode, STN mode Code, VA mode, ASM (Axially Symmetric Aligned Motor) icro-cell) mode, OCB (Optically Compensated Birefringence mode, FLC (Ferroelectric Liqu id Crystal) mode, AFLC (AntiFerroelectric Li) quid Crystal) mode, MVA mode, PVA (Patterned Ve (Critical Alignment) mode, IPS mode, FFS mode, or TBA You may also use modes such as (Transverse Bend Alignment). In addition, as a method of driving the display device, there is also ECB (Electric Ally Controlled Birefringence) mode, PDLC (P Olymer Dispersed Liquid Crystal (PNLC) mode, (Polymer Network Liquid Crystal) mode, guest host There are modes such as St Mode. However, this is not limited to these, and various types of liquid crystal elements and their driving methods exist. Various materials can be used.
[0522] In the pixel circuit 501 of row m, column n, the source electrode or drain electrode of transistor 550 One electrode is electrically connected to the data line DL_n, and the other is connected to a pair of liquid crystal elements 570. It is electrically connected to the other electrode. Also, the gate electrode of transistor 550 is connected to the scan line G It is electrically connected to L_m. Transistor 550 writes data to the data signal. It has a control function.
[0523] One of the pair of electrodes of the capacitive element 560 is connected to a wiring to which a potential is supplied (hereinafter referred to as the potential supply line VL). ) is electrically connected to the other end, and the other end is electrically connected to the other of the pair of electrodes of the liquid crystal element 570. The potential value of the potential supply line VL is set appropriately according to the specifications of the pixel circuit 501. The capacitive element 560 functions as a holding capacitor to retain the written data.
[0524] For example, in a display device having the pixel circuit 501 shown in Figure 30(B), for example, Figure 30(A) The gate driver 504a shown in the diagram sequentially selects the pixel circuit 501 for each row, and the transistor Turn on 550 to write the data signal.
[0525] When data is written to the pixel circuit 501, the transistor 550 turns off. The image is then held. By performing this process row by row, the image can be displayed.
[0526] Furthermore, the multiple pixel circuits 501 shown in Figure 30(A) can be configured, for example, as shown in Figure 30(C). It can be done this way.
[0527] Furthermore, the pixel circuit 501 shown in Figure 30(C) consists of transistors 552 and 554, and a capacitance element It has a child 562 and a light-emitting element 572. Transistor 552 and transistor 554 The transistors shown in the previous embodiment can be applied to either one or both of them. .
[0528] One of the source and drain electrodes of transistor 552 is supplied with a data signal. It is electrically connected to the wiring (hereinafter referred to as the signal line DL_n). Furthermore, transistor 55 The gate electrode of 2 supplies electrical signals to the wiring to which the gate signal is supplied (hereinafter referred to as scan line GL_m). It connects to the target.
[0529] Transistor 552 has the function of controlling the writing of data to the data signal.
[0530] One of the pair of electrodes of the capacitive element 562 is connected to a wiring to which a potential is supplied (hereinafter referred to as the potential supply line VL). It is electrically connected to (a), and the other is the source electrode and drain of transistor 552. It is electrically connected to the other electrode.
[0531] The capacitive element 562 functions as a holding capacitor to retain the written data.
[0532] One of the source and drain electrodes of transistor 554 is connected to the potential supply line VL_a. They are electrically connected. Furthermore, the gate electrode of transistor 554 is connected to the gate electrode of transistor 552. It is electrically connected to the other of the source electrode and drain electrode.
[0533] One of the anodes and cathodes of the light-emitting element 572 is electrically connected to the potential supply line VL_b. The other end is electrically connected to the source and drain electrodes of transistor 554. It will be done.
[0534] Examples of light-emitting elements 572 include organic electroluminescent elements (also known as organic EL elements). (For example) can be used. However, the light-emitting element 572 is not limited to this. Inorganic EL elements made of inorganic materials may also be used.
[0535] Furthermore, a high power supply potential VDD is supplied to one of the potential supply lines VL_a and VL_b. On the other hand, a low power supply potential VSS is applied.
[0536] In a display device having the pixel circuit 501 shown in Figure 30(C), for example, the ge shown in Figure 30(A) The driver 504a sequentially selects the pixel circuit 501 for each row, and the transistor 552 Turn it on and write the data signal.
[0537] When data is written to the pixel circuit 501, the transistor 552 turns off. It enters a holding state. Furthermore, in accordance with the potential of the written data signal, transistor 554 The amount of current flowing between the source electrode and the drain electrode is controlled, and the light-emitting element 572 controls the amount of current flowing through it. It emits light with brightness corresponding to the flow rate. By performing this sequentially for each row, an image can be displayed.
[0538] This embodiment may be appropriately combined with other embodiments described herein, at least in part. They can be implemented in combination.
[0539] (Embodiment 7) In this embodiment, a display module and electronic device having a semiconductor device according to one aspect of the present invention are provided. This will be explained using Figures 31 to 34.
[0540] <7-1. Display Module> The display module 7000 shown in Figure 31 consists of an upper cover 7001 and a lower cover 7002. In between, the touch panel 7004 connected to FPC7003 and the FPC7005 are connected Display panel 7006, backlight 7007, frame 7009, printed circuit board 701 0, has battery 7011.
[0541] A semiconductor device according to one aspect of the present invention can be used, for example, as a display panel 7006.
[0542] The upper cover 7001 and the lower cover 7002 are the touch panel 7004 and the display panel. The shape and dimensions can be appropriately modified to match the size of the 7006.
[0543] The 7004 touch panel is a display panel using either a resistive or capacitive touch panel. It can be used superimposed on 7006. Also, the opposing substrate (sealing substrate) of the display panel 7006 It is also possible to give the board a touch panel function. It is also possible to install a light sensor in each pixel of 006 to create an optical touch panel.
[0544] The backlight 7007 has a light source 7008. Note that in Figure 31, the backlight The example given shows a configuration in which the light source 7008 is placed on the T7007, but it is not limited to this. For example, a light source 7008 is placed at the edge of the backlight 7007, and a light diffuser plate is also used. It may also be made into a component. Furthermore, when using self-emissive light-emitting elements such as organic EL elements, or when using reflection In the case of type panels, etc., a configuration without backlight 7007 is also acceptable.
[0545] Frame 7009 provides protection for the display panel 7006, as well as the movement of the printed circuit board 7010. It has the function of an electromagnetic shield to block electromagnetic waves generated by the operation. The 7009 may also function as a heat sink.
[0546] The printed circuit board 7010 contains power supply circuits and signals for outputting video and clock signals. It has a power processing circuit. The power supply that provides power to the power supply circuit is an external commercial power supply. Alternatively, a separate power source, battery 7011, may be used. This can be omitted when using commercial power.
[0547] Furthermore, the display module 7000 includes components such as polarizing plates, phase difference plates, and prism sheets. They may also be provided.
[0548] <7-2.Electronic equipment 1> Next, Figures 32(A) to 32(E) show examples of electronic devices.
[0549] Figure 32(A) shows the appearance of the camera 8000 with the viewfinder 8100 attached. This is a diagram.
[0550] The camera 8000 consists of a housing 8001, a display unit 8002, operation buttons 8003, and a shutter. It has buttons 8004, etc. The camera 8000 also has a detachable lens 8006. It is attached.
[0551] Here, we'll use camera 8000 and replace lens 8006 by removing it from housing 8001. The configuration allows for this, but the lens 8006 and the housing may be integrated.
[0552] Camera 8000 can take an image by pressing the shutter button 8004. Furthermore, the display unit 8002 also functions as a touch panel, and touching the display unit 8002... This also makes it possible to take images.
[0553] The camera 8000's housing 8001 has a mount with electrodes, and the viewfinder 810 In addition to the above, a strobe device and other equipment can be connected.
[0554] The viewfinder 8100 has a housing 8101, a display unit 8102, buttons 8103, etc. .
[0555] The housing 8101 has a mount that engages with the mount of the camera 8000, and The mount 8100 can be attached to the camera 8000. The mount also has electrodes. The electrode has the ability to display images and other data received from the camera 8000 on the display unit 8102. It can be done.
[0556] Button 8103 functions as a power button. Button 8103 controls the display. You can switch the display of 8102 on or off.
[0557] The display unit 8002 of the camera 8000 and the display unit 8102 of the viewfinder 8100 are equipped with this A display device according to one embodiment of the invention can be applied.
[0558] Note that in Figure 32(A), the camera 8000 and the viewfinder 8100 are treated as separate electronic devices. These components are designed to be detachable, and the camera 8000's housing 8001 is equipped with a display device. It may also have a built-in viewfinder.
[0559] Figure 32(B) shows the external appearance of the head-mounted display 8200.
[0560] The head-mounted display 8200 consists of a mounting part 8201, lenses 8202, and a main body 82 03, it has a display unit 8204, a cable 8205, etc. Also, the mounting part 8201 has It has a built-in 8206 battery.
[0561] Cable 8205 supplies power from battery 8206 to main unit 8203. Main unit 82 03 is equipped with a wireless receiver and displays video information such as received image data on the display unit 8204. It can also detect the movement of the user's eyeballs and eyelids using a camera located on the main unit 8203. By capturing the user's perspective and calculating the coordinates of their viewpoint based on that information, the user's viewpoint is determined. It can be used as an input method.
[0562] Furthermore, the attachment portion 8201 may be provided with multiple electrodes in positions that come into contact with the user. The main unit 8203 detects the current flowing through the electrodes in response to the user's eye movements, It may also have a function to recognize the user's viewpoint. Furthermore, it may detect the current flowing through the electrode. By doing so, it may have a function to monitor the user's pulse. Also, the attachment part 820 1 may have various sensors such as a temperature sensor, a pressure sensor, and an acceleration sensor. The display unit 8204 may also have a function to display the user's biometric information. The movement of the unit is detected, and the image displayed on the display unit 8204 is changed in accordance with that movement. That's good too.
[0563] A display device according to one aspect of the present invention can be applied to the display unit 8204.
[0564] Figures 32(C),(D), and(E) show the external appearance of the head-mounted display 8300. Yes. The head-mounted display 8300 consists of a housing 8301, a display unit 8302, and It comprises a band-shaped fixing device 8304 and a pair of lenses 8305.
[0565] The user can view the display on the display unit 8302 through the lens 8305. Furthermore, it is preferable to arrange the display unit 8302 in a curved shape. This allows the user to experience a high level of realism. Although an example has been given of a configuration in which one display unit 8302 is provided, the example is not limited to this, for example, The display unit 8302 may be configured to have two units. In this case, one display unit is shown to one eye of the user. By arranging the parts in such a configuration, it becomes possible to perform 3D displays using parallax, etc. .
[0566] Furthermore, a display device according to one embodiment of the present invention can be applied to the display unit 8302. A display device having a semiconductor device according to one embodiment has extremely high resolution, as shown in Figure 32(E). Even when magnified using the Uni lens 8305, the pixels are not visible to the user. It can display highly realistic images.
[0567] <7-3.Electronic equipment 2> Next, Figure 32(A) to Figure 32(E) shows electronic equipment, and Figure 32(E) shows an example of a different electronic equipment. This is shown in Figures 3(A) through 33(G).
[0568] The electronic device shown in Figures 33(A) to 33(G) consists of a housing 9000, a display unit 9001, and Speaker 9003, operation key 9005 (including power switch or operation switch), connection terminal Child 9006, Sensor 9007 (force, displacement, position, velocity, acceleration, angular velocity, rotational speed, distance, Light, liquid, magnetism, temperature, chemicals, sound, time, hardness, electric field, electric current, voltage, power, radiation, (Including functions for measuring flow rate, humidity, gradient, vibration, odor, or infrared radiation), Microphone It has n9008, etc.
[0569] The electronic devices shown in Figures 33(A) to 33(G) have various functions. For example, various Functions to display various information (still images, videos, text images, etc.) on the display unit, touch panel function Features that display a calendar, date or time, and various software (programs). Functions to control processing, wireless communication functions, and various computers using wireless communication functions It has the ability to connect to a network and transmit or receive various types of data using wireless communication. The function reads programs or data recorded on the recording medium and displays them on the display unit. It can have functions such as the above. Furthermore, the electronic devices shown in Figures 33(A) to 33(G) The functions it can possess are not limited to these, and it can have a variety of functions. Although not shown in Figures 33(A) to 33(G), the electronic device has multiple display units. The configuration may also include a camera or the like to capture still images. The camera has a function to record videos and save the captured images to a recording medium (external or built into the camera). It may also have functions such as displaying captured images on a display unit.
[0570] Details of the electronic equipment shown in Figures 33(A) to 33(G) will be explained below.
[0571] Figure 33(A) is a perspective view showing the television equipment 9100. 100 means the display unit 9001 is a large screen, for example, 50 inches or more, or 100 inches or more. It is possible to incorporate the display unit 9001.
[0572] Figure 33(B) is a perspective view showing the personal digital assistant 9101. The personal digital assistant 9101 is It has one or more functions selected from, for example, a telephone, a notebook, or an information viewing device. Physically, it can be used as a smartphone. Furthermore, the mobile information terminal 9101 is... Speakers, connection terminals, sensors, etc. may be provided. Also, the portable information terminal 9101 may display text and Image information can be displayed on multiple surfaces. For example, three operation buttons 9050( An operation icon (also called simply an icon) may be displayed on one side of the display unit 9001. Yes, it is possible. Furthermore, the information 9051, indicated by the dashed rectangle, can be displayed on another surface of the display unit 9001. This is possible. For example, information 9051 can be transmitted via email or SNS (Social Networking Services). A display that notifies you of incoming calls (such as twerking services) and phone calls, as well as emails and social media messages. Subject, sender name (email, social media, etc.), date, time, battery level, antenna reception. This includes the strength of the information. Alternatively, in the position where information 9051 is displayed, a substitute for information 9051 may be displayed. Alternatively, you may display operation buttons such as 9050.
[0573] Figure 33(C) is a perspective view showing the personal digital assistant 9102. The personal digital assistant 9102 is The display unit 9001 has the function of displaying information on three or more sides. Here, information 9052, This shows an example where information 9053 and information 9054 are displayed on different sides. For example, The user of the mobile information terminal 9102 stores the mobile information terminal 9102 in the breast pocket of their clothing. In this state, you can check the display (information 9053 in this case). Specifically, when an incoming call is received... The phone number or name of the caller can be observed from above the mobile information terminal 9102. The information is displayed on the device. The user can view the information without taking the portable information terminal 9102 out of their pocket. This allows you to check and decide whether or not to answer the call.
[0574] Figure 33(D) is a perspective view showing the wristwatch-type personal information terminal 9200. Personal information terminal The 9200 is a mobile phone, email, document viewing and creation, music playback, and internet communication. It can run various applications such as computer games. The display unit 9001 has a curved display surface, and displays are performed along the curved display surface. It can do this. Furthermore, the personal information terminal 9200 can perform standardized short-range wireless communication. This is possible. For example, by communicating with a wireless headset, It is also possible to make calls using the free-call function. In addition, the mobile information terminal 9200 has a connection terminal 9006. It has the capability to directly exchange data with other information terminals via a connector. Charging can also be performed via connection terminal 9006. Note that the charging operation is performed via connection terminal 900 This may also be done by wireless power transfer without using 6.
[0575] Figures 33(E), (F), and (G) are perspective views showing a foldable portable information terminal 9201. Furthermore, Figure 33(E) is a perspective view of the mobile information terminal 9201 in an unfolded state, and Figure 33 (F) changes the mobile information terminal 9201 from one state to the other, either unfolded or folded. This is a perspective view of the device in the process of being folded, with Figure 33(G) showing the portable information terminal 9201 in its folded state. This is a perspective view of the device. The 9201 portable information terminal offers excellent portability when folded, and when unfolded... In this configuration, the seamless, wide display area provides excellent readability. (Portable Information Terminal 92) The display unit 9001 of 01 is connected by three housings 9000 via a hinge 9055. It is supported by bending the two housings 9000 via the hinge 9055. Furthermore, the mobile information terminal 9201 can be reversibly transformed from an unfolded state to a folded state. This is possible. For example, the mobile information terminal 9201 can bend with a radius of curvature of 1 mm or more and 150 mm or less. It is possible to do so.
[0576] Next, the electronic equipment shown in Figures 32(A) to 32(E), and Figures 33(A) to 33( Figure 34(A)(B) shows an example of an electronic device different from the one shown in G). Figure 34(A) (B) is a perspective view of a display device having multiple display panels. Note that Figure 34(A) is Figure 34(B) is a perspective view of a configuration in which multiple display panels are rolled up. This is a perspective view of the unit in its unfolded state.
[0577] The display device 9500 shown in Figures 34(A) and 34(B) consists of multiple display panels 9501 and a shaft portion 9 It has 511 and a bearing portion 9512. In addition, the multiple display panels 9501 have a display area It has a region 9502 and a translucent region 9503.
[0578] Furthermore, the multiple display panels 9501 are flexible. Also, two adjacent display panels The 9501 is provided such that parts of them overlap each other. For example, two adjacent The translucent areas 9503 of the display panel 9501 can be superimposed. By using the display panel 9501, a large-screen display device can be created. Depending on the situation, the display panel 9501 can be rolled up, making it a highly versatile display. It can be used as a display device.
[0579] Furthermore, in Figures 34(A)(B), the display area 9502 is adjacent to the display panel 950 The diagram illustrates the isolation state in 1, but it is not limited to this; for example, adjacent display panel 9 By overlapping the 501 display area 9502 without any gaps, a continuous display area 9502 and You may do so.
[0580] The electronic device described in this embodiment has a display unit for displaying some kind of information. It is characterized by having the following characteristics. However, one embodiment of the present invention is an electronic device that does not have a display unit. It can also be applied to containers.
[0581] This embodiment may be appropriately combined with other embodiments described herein, at least in part. They can be implemented in combination. [Examples]
[0582] In this embodiment, a transistor according to one embodiment of the present invention was fabricated. Furthermore, the transistor's Id -Vg characteristics were measured and a GBT test was performed.
[0583] [Transistor fabrication] A transistor equivalent to the transistor 100E described above is manufactured, and the transistor The electrical characteristics of the material were evaluated. In this example, samples A1 and A2, as shown below, were prepared. .
[0584] Note that samples A1 and A2 are samples on which transistors have been formed. The channel lengths L are 3 μm and 6 μm, respectively, and the channel width W is 50 μm for all channels. That is the case.
[0585] [Method for preparing samples A1 and A2] First, a 100 nm thick tungsten film is applied to a glass substrate using a sputtering apparatus. The conductive film was then processed by photolithography to form the first gate electric A conductive film 104 that functions as an electrode was formed.
[0586] Next, four insulating films are laminated onto the substrate and conductive film to form the first gate insulating film. A functional insulating film 106 was formed (see Figure 7(A)). The insulating film 106 is a plasma chemical The insulating film 106 was formed continuously in a vacuum using a phase deposition (PECVD) apparatus. A silicon nitride film with a thickness of 50 nm, a silicon nitride film with a thickness of 300 nm, and a silicon nitride film with a thickness of 50 nm. A silicon oxide film and a silicon oxidizide film with a thickness of 50 nm were used, respectively.
[0587] Next, oxide semiconductor film 108_1_0 and oxide semiconductor film 108_2 are placed on the insulating film 106. _0 was formed sequentially (see Figure 7(C)). Next, the stacked oxide semiconductor film was formed into island shapes. By processing, an oxide semiconductor film 108 was formed (see Figure 8(A)). Oxide semiconductor Film 108_1_0 uses an In-Ga-Zn film with a thickness of 20 nm, and oxide semiconductor film 108 _2_0 used an In-Ga-Zn film with a thickness of 25 nm.
[0588] The oxide semiconductor film 108_1_0 was prepared with a substrate temperature of 130°C and a flow rate of 180 sccm. Argon gas and oxygen gas at a flow rate of 20 sccm are placed inside the sputtering apparatus chamber. A metal oxide containing indium, gallium, and zinc is introduced and the pressure is set to 0.6 Pa. A 2.5kW AC current is applied to the target (In:Ga:Zn=4:2:4.1 [atomic ratio]). It was formed by applying force. Furthermore, the "oxygen flow rate" was calculated from the proportion of oxygen in the total film-forming gas. The term "ratio" may be used. Oxygen flow rate ratio during film formation of oxide semiconductor film 108_1_0 It is 10%.
[0589] The oxide semiconductor film 108_2_0 is formed under the deposition conditions of the oxide semiconductor film 108_1_0. The film was deposited by changing the flow rate of the sputtering gas. Specifically, the flow rate of oxygen gas into the chamber was changed. The supply is stopped, and oxygen gas at a flow rate of 200 sccm is introduced into the sputtering apparatus chamber. It was formed by the following. Note that the oxygen flow rate ratio during the deposition of the oxide semiconductor film 108_2_0 It is 100%.
[0590] Next, heat treatment was performed. For this heat treatment, the heating temperature was set to 350°C and the material was heated in a nitrogen atmosphere for 1 After the initial heat treatment, the patient underwent another heat treatment for 1 hour in a mixed gas atmosphere of nitrogen and oxygen.
[0591] Next, a conductive film is formed on the insulating film 106 and the oxide semiconductor film 108, and the conductive film is processed. By doing so, conductive films 112a and 112b were formed. Here, the conductive film was made with a thickness of 3 A first titanium film with a thickness of 0 nm and a copper film with a thickness of 200 nm are sequentially applied using a sputtering apparatus. Formed. (See Figure 8(C)). Next, the copper film was etched by photolithography. Next, a second titanium film with a thickness of 50 nm was formed using a sputtering apparatus. The first and second titanium films were etched using photolithography, as shown in Figure 8. Conductive films 112a and 112b with the shape shown in (C) were formed.
[0592] Next, the surface (back channel side) of the oxide semiconductor film 108 was cleaned using phosphoric acid.
[0593] Next, on the insulating film 106, the oxide semiconductor film 108, and the conductive films 112a and 112b, An edge film 114 was formed, and an insulating film 116 was formed on the insulating film 114 (see Figure 9(A)). The border film 114 and insulating film 116 are deposited using a plasma chemical vapor deposition (PECVD) apparatus. It was formed continuously in the air. The insulating film 114 is a silicon oxide nitride film with a thickness of 30 nm. For example 116, a silicon oxide-nitride film with a thickness of 400 nm was used.
[0594] Next, heat treatment was performed. For this heat treatment, the heating temperature was 350°C, and the material was heated in a nitrogen atmosphere for 1 Time-based heat treatment was performed.
[0595] Next, a conductive film (not shown) was formed on the insulating film 116. The conductive film was formed by sputtering. An ITSO film with a thickness of 6 nm was formed using a 3D apparatus.
[0596] Next, oxygen is passed through the conductive film using a plasma treatment method to add oxygen to the insulating film 116. As a plasma treatment method, plasma was discharged in an atmosphere containing oxygen gas.
[0597] Next, the conductive film was etched.
[0598] Next, an insulating film was formed on the insulating film 116. The insulating film was deposited using plasma chemical vapor deposition (PEC). A silicon nitride film with a thickness of 100 nm was formed using a VD (Variable Deposition) apparatus.
[0599] Next, an opening was formed in a desired region of the insulating film. The method for forming the opening was dryer The etching method was used.
[0600] Next, a conductive film is formed to fill the opening, and the conductive film is processed into an island shape. A conductive film was formed that functions as a second gate electrode. The conductive film had a thickness of 100 An ITSO film with a thickness of nm was formed using a sputtering apparatus.
[0601] Next, an insulating film and an insulating film were formed on the conductive film. The insulating film was 1.5 μm thick. An acrylic-based photosensitive resin was used.
[0602] Samples A1 and A2 were prepared in the manner described above.
[0603] [Transistor Id-Vg characteristics] Next, the Id-Vg characteristics of the transistors of the prepared samples A1 and A2 were measured. Furthermore, the measurement conditions for the Id-Vg characteristics of the transistor are as follows: The voltage applied to the conductive film (hereinafter also called the gate voltage (Vg)), and the second gate The voltage applied to the conductive film that functions as an electrode (also called Vbg) is changed from -10V to +10V. The voltage was applied in 0.25V steps up to V. It was also applied to a conductive film that functioned as a source electrode. The voltage (hereinafter also called the source voltage (Vs)) is set to 0V (comm), and the drain electrode The voltage applied to the conductive film that functions as such (hereinafter also called the drain voltage (Vd)) is 0. The voltages were set to 1V and 20V.
[0604] Figures 35(A) and 35(B) show the Id-Vg characteristic results for sample A1 and sample A2, respectively. In Figures 35(A) and 35(B), the first vertical axis represents Id(A), and the second vertical axis represents the field effect transfer. degree(μFE(cm 2 The horizontal axis represents Vs(V), and the horizontal axis represents Vg(V). Note that this is related to the field effect. The mobility values are those obtained when Vd was measured at 20V.
[0605] As shown in Figures 35(A) and 35(B), the field-effect mobility is high and the switching characteristics are excellent. This indicates that a transistor possessing this characteristic was successfully fabricated.
[0606] [Gate Bias - Thermal Stress Test (GBT Test)] Next, the reliability of sample A2 prepared as described above was evaluated. The reliability evaluation was performed using the GBT test. That's what I decided.
[0607] The GBT test conditions in this embodiment are a conductive film functioning as the first gate electrode and The voltage applied to the conductive film that functions as the gate electrode of 2, (hereinafter referred to as the gate voltage (Vg) and The voltage is set to ±30V and applied to the conductive film that functions as the source electrode and drain electrode. The voltages (hereinafter referred to as drain voltage (Vd) and source voltage (Vs), respectively) are set to 0V. (COMMON) was defined as having a stress temperature of 60°C and a stress application time of 1 hour, and measurements were taken. The environment was divided into two parts: a dark environment and a light-illuminated environment (illuminated with approximately 10,000 lux of light from a white LED). The experiment was conducted in two different environments. That is, the source and drain electrodes of the transistor were the same. The potential is set, and the first gate electrode and the second gate electrode have a source electrode and a drain electrode. Different potentials were applied for a certain period of time (1 hour in this case).
[0608] Furthermore, the potential applied to the first gate electrode and the second gate electrode is the source electrode and the drain electrode. A positive stress is defined as a case where the potential is higher than that of the electrodes, and the first gate electrode and the second gate electrode Negative stress occurs when the potential applied to the electrode is lower than the potentials of the source and drain electrodes. Therefore, in conjunction with the measurement environment, positive GBT (dark), negative GBT ( The results were obtained under a total of four conditions: dark, positive GBT (light irradiation), and negative GBT (light irradiation). A reliability assessment was conducted. Note that plus GBT (dark) was replaced with PBTS (Positive B Set ias Temperature Stress to negative GBT (dark), NBTS (Negative Bias Temperature Stress) , plus GBT (light irradiation) to PBITS (Positive Bias Illumination) (Temperature Temperature Stress) a...
Claims
1. A semiconductor device having an oxide semiconductor film, The oxide semiconductor film includes a composite oxide semiconductor having a first region and a second region. The first region has a plurality of first clusters containing In, element M, Zn, and O, The second region has a plurality of second clusters containing In, element M, Zn, and O, The element M is Ga, The first region has a higher atomic ratio of In to element M than the second region. The first region has a portion where the plurality of first clusters are connected to each other. The second region has a portion where the plurality of second clusters are connected to each other. The aforementioned semiconductor device is Terminal gate and, The first insulating film on the gate electrode, The oxide semiconductor film on the first insulating film, A pair of electrodes on the oxide semiconductor film, A second insulating film having a region located above the oxide semiconductor film and above the pair of electrodes, and a region in contact with the upper surface of the oxide semiconductor film, The oxide semiconductor film comprises a first oxide semiconductor film and a second oxide semiconductor film on the first oxide semiconductor film. Each of the first oxide semiconductor film and the second oxide semiconductor film has In, Ga, and Zn. Each of the first insulating film and the second insulating film is an oxide insulating film. The first oxide semiconductor film has regions with lower crystallinity than the second oxide semiconductor film. The first oxide semiconductor film is not an amorphous oxide semiconductor, The second insulating film has a region that is in contact with the upper surface of the second oxide semiconductor film. Off-current is 1 x 10 -19 Semiconductor device that is A or less.
2. A semiconductor device having an oxide semiconductor film, The oxide semiconductor film includes a composite oxide semiconductor having a first region and a second region. The first region has a plurality of first clusters containing In, element M, Zn, and O, The second region has a plurality of second clusters containing In, element M, Zn, and O, The element M is Ga, The first region has a higher atomic ratio of In to element M than the second region. The first region has a portion where the plurality of first clusters are connected to each other. The second region has a portion where the plurality of second clusters are connected to each other. The aforementioned semiconductor device is Terminal gate and, The first insulating film on the gate electrode, The oxide semiconductor film on the first insulating film, A pair of electrodes on the oxide semiconductor film, A second insulating film having a region located above the oxide semiconductor film and above the pair of electrodes, and a region in contact with the upper surface of the oxide semiconductor film, The oxide semiconductor film comprises a first oxide semiconductor film having a region in contact with the upper surface of the first insulating film, and a second oxide semiconductor film having a region in contact with the upper surface of the first oxide semiconductor film. Each of the first oxide semiconductor film and the second oxide semiconductor film has In, Ga, and Zn. Each of the first insulating film and the second insulating film is an oxide insulating film. The first oxide semiconductor film has regions with lower crystallinity than the second oxide semiconductor film. The first oxide semiconductor film is not an amorphous oxide semiconductor, The second insulating film has a region that is in contact with the upper surface of the second oxide semiconductor film. Off-current is 1 x 10 -19 Semiconductor device that is A or less.
3. A semiconductor device having an oxide semiconductor film, The oxide semiconductor film includes a composite oxide semiconductor having a first region and a second region. The first region has a plurality of first clusters containing In, element M, Zn, and O, The second region has a plurality of second clusters containing In, element M, Zn, and O, The element M is Ga, The first region has a higher atomic ratio of In to element M than the second region. The first region has a portion where the plurality of first clusters are connected to each other. The second region has a portion where the plurality of second clusters are connected to each other. The aforementioned semiconductor device is Terminal gate and, The first insulating film on the gate electrode, The oxide semiconductor film on the first insulating film, A pair of electrodes on the oxide semiconductor film, A second insulating film having a region located above the oxide semiconductor film and above the pair of electrodes, and a region in contact with the upper surface of the oxide semiconductor film, The oxide semiconductor film comprises a first oxide semiconductor film having a region in contact with the upper surface of the first insulating film, and a second oxide semiconductor film having a region in contact with the upper surface of the first oxide semiconductor film. Each of the first oxide semiconductor film and the second oxide semiconductor film has In, Ga, and Zn. The ratio of the number of In atoms to the number of Zn atoms in the first oxide semiconductor film is greater than the ratio of the number of In atoms to the number of Zn atoms in the second oxide semiconductor film. Each of the first insulating film and the second insulating film is an oxide insulating film. The first oxide semiconductor film has regions with lower crystallinity than the second oxide semiconductor film. The first oxide semiconductor film is not an amorphous oxide semiconductor, The second insulating film has a region that is in contact with the upper surface of the second oxide semiconductor film. Off-current is 1 x 10 -19 Semiconductor device that is A or less.
4. In any one of claims 1 to 3, The pair of electrodes has a laminated structure comprising a first conductive layer and a second conductive layer on the first conductive layer. The first conductive layer has one or more selected from Ti, W, Ta, Mo, In, Ga, Sn, and Zn. A semiconductor device wherein the second conductive layer has one or more selected from Cu, Al, and Ag.
5. In claim 4, In a cross-sectional view, the first conductive layer has a portion that protrudes from the edge of the second conductive layer, wherein the semiconductor device is characterized by this configuration.
6. In any one of claims 1 to 5, The second region is a semiconductor device that is surrounded by the first region.