Display device, display panel, and method for manufacturing the same

Abstract

To provide a display device, a display panel, and a manufacturing method for the display panel.SOLUTION: A display panel includes a substrate 1, a first insulating layer 2, a first electrode layer 3, a pixel defining layer 4, a light-emitting functioning layer 5, and a second electrode 6. The first insulating layer 2 on the substrate 1 includes a plurality of pixel regions 202 distributed in an array form, and a separation region 201 that separates the pixel regions. The first electrode layer 3 includes a plurality of first electrodes 31 provided on the surface of the first insulating layer 2 on the substrate 1. The orthogonal projection of each first electrode 31 on the first insulating layer 2 exists in each pixel region 202. The pixel defining layer 4 is provided on the first insulating layer 2 on the substrate 1 and exposes each first electrode 31. In the pixel defining layer 4, a pixel defining groove 41 is formed in the separation region 201. The central part of the pixel defining groove 41 includes a first projection 42, and a sub-groove 40 is formed between the side wall of the first projection 42 and the side wall of the pixel defining groove 41. The light-emitting functioning layer 5 covers the pixel defining layer 4, and the first electrode 31 and the first insulating layer 2 that are exposed by the pixel defining layer 4. The second electrode 6 covers the light-emitting functioning layer 5.SELECTED DRAWING: Figure 10

Description

Technical Field

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[0001] (Cross - reference to related applications) This application claims priority based on a PCT application with an application date of April 21, 2020, an application number of PCT / CN2020 / 085955, and an invention title of "Display Device, Display Panel, and Manufacturing Method Thereof", and incorporates all the contents of the PCT application herein by reference.

[0002] The present invention relates to the field of display technology, and in particular, to a display device, a display panel, and a manufacturing method of the display panel.

Background Art

[0003] Currently, OLED (Organic Light - Emitting Diode) display panels are being used more and more widely. In an OLED display panel, the light - emitting elements usually include a plurality of OLED light - emitting elements distributed in an array. Each light - emitting element can emit light independently to display an image. However, due to reasons in the manufacturing process, it is necessary to improve the light - emitting stability of the OLED light - emitting elements.

[0004] It should be noted that the information disclosed in the above background art is only used to enhance the understanding of the background of the present invention, and thus may include information that does not constitute the prior art known to those skilled in the art.

Summary of the Invention

Problems to be Solved by the Invention

[0005] The present invention is for overcoming the above - mentioned drawbacks of the prior art, and aims to provide a display device, a display panel, and a manufacturing method of the display panel.

Means for Solving the Problems

[0006] According to one aspect of the present invention, a display panel is provided. The display panel includes a substrate, and A first insulating layer provided on one side of the substrate, A first electrode layer is provided on the surface of the first insulating layer, which is separated from the substrate, and includes a plurality of first electrodes. A pixel definition layer provided on the surface of the first insulating layer, which is separated from the substrate, and which exposes each of the first electrodes, A light-emitting functional layer covering the pixel definition layer and the first electrode exposed by the pixel definition layer, The first insulating layer includes a second electrode covering the light-emitting functional layer, wherein the first insulating layer has a plurality of pixel regions distributed in an array and separation regions that separate the pixel regions, the orthographic projection of each first electrode on the first insulating layer is located within each pixel region, and the pixel definition layer has a pixel definition groove formed in the region corresponding to the separation region, the central part of the pixel definition groove has a first projection that protrudes toward the direction away from the substrate, and a sub-groove is formed between the side wall of the first projection and the side wall of the pixel definition groove.

[0007] In one exemplary embodiment of the present invention, the two side walls of the first projection are inclined surfaces that extend toward the substrate, and the two side walls of the pixel definition groove are inclined surfaces that contract toward the substrate.

[0008] In one exemplary embodiment of the present invention, the slope of the side wall of the first projection is different from the slope of the side wall of the pixel definition groove.

[0009] In one exemplary embodiment of the present invention, the thickness of the first projection is less than the depth of the pixel definition groove.

[0010] In one exemplary embodiment of the present invention, the orthographic projection of the central portion of the pixel definition groove on the first insulating layer is located within the separation region.

[0011] In one exemplary embodiment of the present invention, the pixel definition layer includes a separation portion and an extension portion, the separation portion being located in a region other than the first electrode, the pixel definition groove being provided in at least a portion of the separation portion, and the extension portion being connected to the separation portion, extending to the surface of the first electrode away from the substrate, and not completely covering the first electrode.

[0012] In one exemplary embodiment of the present invention, the width of the extension covering any one of the first electrodes is smaller than the width of the separation portion located between two adjacent first electrodes.

[0013] In one exemplary embodiment of the present invention, the thicknesses of at least two of the first electrodes are different.

[0014] In one exemplary embodiment of the present invention, the maximum depth of the pixel definition groove is 60% or less of the sum of the thickness of the light-emitting functional layer and the first electrode.

[0015] According to one aspect of the present invention, a display panel is provided. The display panel is circuit board and A first insulating layer provided on one side of the substrate, A first electrode layer is provided on the surface of the first insulating layer, which is separated from the substrate, and includes a plurality of first electrodes. A pixel definition layer provided on the surface of the first insulating layer, which is separated from the substrate, and which exposes each of the first electrodes, A light-emitting functional layer covering the pixel definition layer and the first electrode exposed by the pixel definition layer, The first insulating layer includes a second electrode that covers the light-emitting functional layer and includes a recess and a plurality of smooth portions separated by the recess, wherein the orthographic projection of each smooth portion on the first insulating layer is located within each first electrode, at least a portion of the recess is recessed toward one side of the smooth portion that approaches the substrate, at least a portion of the orthographic projection of the recess on the first insulating layer is located outside the first electrode, the central portion of the recess has a second projection, and a sub-recess is formed between the side surface of the second projection and the side surface of the recess.

[0016] In one exemplary embodiment of the present invention, the first insulating layer has a plurality of pixel regions distributed in an array and separation regions that separate the pixel regions, and the orthographic projection of each of the first electrodes on the first insulating layer is located within each of the first electrodes. The pixel definition layer exposes each of the first electrodes, and a pixel definition groove is formed in the region corresponding to the separation region, the central part of the pixel definition groove has a first projection that protrudes toward the direction away from the substrate, and a sub-groove is formed between the side wall of the first projection and the side wall of the pixel definition groove. The orthographic projection of the recess on the first insulating layer is at least partially located within the pixel definition groove.

[0017] In one exemplary embodiment of the present invention, the point of the sub-recess closest to the substrate is located within the sub-groove in orthographic projection on the first insulating layer.

[0018] In one exemplary embodiment of the present invention, the recess includes a first side surface and a second side surface, the first side surface and the second side surface are connected to the second projection on both sides so as to be opposite each other, and the first side surface and the second side surface taper toward the substrate.

[0019] In one exemplary embodiment of the present invention, the second projection includes a first inclined surface, a second inclined surface, and a connecting surface connected between the first inclined surface and the second inclined surface, wherein the connecting surface is located on one side away from the substrate at the bottom edges of the first and second sides, the first inclined surface is connected to the bottom edge of the first side, and the second inclined surface is connected to the bottom edge of the second side.

[0020] In one exemplary embodiment of the present invention, the minimum thickness of the region of the second electrode corresponding to the first side surface and the second side surface is greater than the minimum thickness of the region of the second electrode corresponding to the first inclined surface and the second inclined surface.

[0021] In one exemplary embodiment of the present invention, the pixel definition layer includes a separation portion and an extension portion, the separation portion being located in a region other than the first electrode, the pixel definition groove being provided in the separation portion, and the extension portion being connected to the separation portion and extending to the surface of the first electrode away from the substrate, and not completely covering the first electrode. The second electrode further has a protrusion protruding in a direction away from the substrate, the smooth portion is connected to the concave portion via the protrusion, and the orthographic projection of the protrusion on the substrate and the orthographic projection of the extension portion on the substrate at least partially overlap.

[0022] In an exemplary embodiment of the present invention, among the two protrusions connected to both sides of the concave portion, the distance between one point of the protrusion farthest from the substrate and the substrate is different from the distance between one point of the other protrusion farthest from the substrate and the substrate.

[0023] In an exemplary embodiment of the present invention, the display panel further includes a first encapsulation layer that covers the second electrode and forms pits in a region corresponding to the concave portion.

[0024] In an exemplary embodiment of the present invention, the two side walls of the pit are reduced and connected in a direction approaching the substrate.

[0025] According to one aspect of the present invention, a method for manufacturing a display panel is provided. The manufacturing method includes forming a first insulating layer on one side of a substrate; forming a first electrode layer including a plurality of first electrodes on the surface of the first insulating layer away from the substrate; forming a pixel definition layer on the surface of the first insulating layer away from the substrate and exposing each first electrode; forming a light-emitting functional layer; The process includes the step of forming a second electrode covering the light-emitting functional layer, wherein the first insulating layer has a plurality of pixel regions distributed in an array and separation regions that separate the pixel regions, the orthographic projection of each of the first electrodes on the first insulating layer is located within each of the pixel regions, a pixel definition groove is formed in the region of the pixel definition layer corresponding to the separation region, the central part of the pixel definition groove has a first projection that protrudes toward the direction away from the substrate, a sub-groove is formed between the side wall of the first projection and the side wall of the pixel definition groove, and the light-emitting functional layer covers the pixel definition layer and the first electrode exposed by the pixel definition layer.

[0026] According to one aspect of the present invention, a method for manufacturing a display panel is provided. The manufacturing method is as follows: The steps include forming a first insulating layer on one side of the substrate, The steps include forming a first electrode layer on the surface of the first insulating layer, which is separated from the substrate, The steps include forming a pixel definition layer on the surface of the first insulating layer, which is separated from the substrate, The steps include forming a light-emitting functional layer, The process includes the step of forming a second electrode covering the light-emitting functional layer, wherein the first electrode layer includes a plurality of first electrodes, the pixel definition layer exposes each of the first electrodes, the light-emitting functional layer covers the pixel definition layer and the first electrodes exposed by the pixel definition layer, the second electrode includes a recess and a plurality of smooth portions separated by the recess, the orthographic projection of each smooth portion on the first insulating layer is located within each of the first electrodes, at least a portion of the recess is recessed toward one side of the smooth portion closer to the substrate, at least a portion of the orthographic projection of the recess on the first insulating layer is located outside the first electrodes, the central portion of the recess has a second projection, and a sub-recess is formed between the side surface of the second projection and the side surface of the recess.

[0027] According to one aspect of the present invention, a display device including the display panel described in any of the above is provided.

[0028] The general descriptions above and the detailed descriptions below are merely illustrative and interpretive and do not limit the present invention. [Brief explanation of the drawing]

[0029] The following drawings, incorporated into the specification, constitute a part of this specification, illustrating embodiments of the present invention and interpreting the principles of the present invention together with the specification. Note that the drawings in the following description represent only some embodiments of the present invention, and those skilled in the art can obtain other drawings from these drawings without requiring any creative work.

[0030] [Figure 1] This is a schematic diagram of the first display panel of one embodiment of the present invention. [Figure 2] This is a partial electron microscope image of the first display panel of one embodiment of the present invention. [Figure 3] This is a schematic diagram of a first display panel according to another embodiment of the present invention. [Figure 4] This is a schematic diagram of a first display panel according to yet another embodiment of the present invention. [Figure 5] This is a top view of the pixel definition layer of the first display panel of one embodiment of the present invention. [Figure 6] This is a top view of the pixel definition layer and the first electrode of a first display panel according to one embodiment of the present invention. [Figure 7] This is a schematic diagram of the second display panel of one embodiment of the present invention. [Figure 8] This is an enlarged view of section A in Figure 7. [Figure 9] This is a partial electron microscope image of the second display panel of one embodiment of the present invention. [Figure 10] This is a schematic diagram of the third display panel of one embodiment of the present invention. [Figure 11] This is a schematic diagram of a third display panel according to another embodiment of the present invention. [Figure 12] This is a schematic diagram of a fourth display panel according to another embodiment of the present invention. [Figure 13] This is an enlarged view of section B in Figure 12. [Figure 14] This is a schematic diagram of a method for manufacturing a first display panel according to one embodiment of the present invention. [Figure 15] This is a schematic diagram of a method for manufacturing a first display panel according to another embodiment of the present invention. [Figure 16] This is a schematic diagram of a method for manufacturing a second display panel according to one embodiment of the present invention. [Figure 17] This is a schematic diagram of a method for manufacturing a third display panel according to one embodiment of the present invention. [Figure 18] This is a schematic diagram of a method for manufacturing the fourth display panel of one embodiment of the present invention. [Modes for carrying out the invention]

[0031] The exemplary embodiments will be described in more detail below with reference to the accompanying drawings. However, the exemplary embodiments can be carried out in various forms and should not be construed as being limited to the embodiments described herein. On the contrary, these embodiments are provided so as to fully convey to those skilled in the art the comprehensive and complete nature of the invention and the concepts of the exemplary embodiments. The same reference numerals in the figures indicate the same or similar structures, and therefore their detailed description is omitted. Also, the drawings are merely schematic diagrams of the invention and are not necessarily drawn to a specific scale.

[0032] The terms “one,” “this,” “the aforementioned,” and “at least one” are used to indicate the presence of one or more elements / components, etc. The terms “includes” and “have” are used to mean unrestricted inclusion, meaning that there may be other elements / components, etc. in addition to the listed elements / components, etc. The terms “first,” “second,” and “third” are used only as symbols and do not limit the number of objects.

[0033] In related technologies, an OLED display panel includes a drive backplane, a plurality of first electrodes, a pixel definition layer, a light-emitting functional layer, a second electrode, and a color filter layer. Here, the first electrodes are distributed in an array on the drive backplane, the pixel definition layer is provided on the surface of the drive backplane on which the first electrodes are provided and exposes each first electrode, the light-emitting functional layer covers the pixel definition layer and the surface of the first electrodes away from the drive backplane, and the second electrode covers the surface of the light-emitting functional layer away from the drive backplane, so that a plurality of light-emitting elements can be defined by the pixel definition layer. Driven by a drive signal, holes injected by the first electrode and electrons injected by the second electrode enter the light-emitting functional layer to form excitons, and the emission transition of the excitons emits photons to form electroluminescence. The color filter layer is provided on one side of the second electrode away from the drive backplane and has a plurality of filter regions that correspond one-to-one with each light-emitting element, and each filter region and its corresponding light-emitting element can be used as a subpixel.

[0034] Since the thickness of the pixel definition layer is greater than the thickness of the first electrode, when the light-emitting functional layer is formed by a vapor deposition process, the light-emitting functional layer is recessed at the junction between the first electrode and the pixel definition layer, i.e., at the edge of the light-emitting element. Accordingly, a recessed region is formed on the second electrode, and the distance between the recessed region of the second electrode and the first electrode becomes shorter, making tip discharge more likely and even short circuits more likely, affecting the stability of the light-emitting element, and making it difficult for the display panel to emit light stably. At the same time, the recessed region of the second electrode corresponds to the first electrode and emits light in the same way, but the shape of the recessed region is not a planar structure but a structure that is recessed toward the drive backplane, so the light emitted within the range of this recessed region becomes scattered, and at least some of the light is biased toward adjacent subpixels, so the light emission of adjacent subpixels interferes with each other and affects the display effect.

[0035] The light-emitting functional layer is recessed at the junction between the first electrode and the pixel-defining layer. As a result, the second electrode forms a recessed region in the area corresponding to this recess, and this recessed region directly faces the first electrode. That is, the orthographic projection of the recessed region on the drive backplane is located within the first electrode, which can cause tip discharge and even short circuits between them. Simultaneously, the recessed region emits light, and because the shape of the recessed region is curved, the light emitted from it forms a scattering state. Therefore, it interferes with the light emission of adjacent subpixels.

[0036] Furthermore, since the light-emitting functional layer is a continuous film layer overall, the subpixels are connected to each other, and at least a portion of the film layer of the light-emitting functional layer (including, but not limited to, the hole injection layer) causes crosstalk between adjacent subpixels. In particular, in the case of a series-type OLED display panel, the light-emitting functional layer includes multiple light-emitting unit layers, and two adjacent light-emitting unit layers are connected in series via a charge generation layer. However, since the charge generation layer has excellent charge conductivity characteristics, it causes crosstalk between adjacent subpixels and affects the light-emitting effect.

[0037] To solve at least one technical problem in the above-mentioned related technologies, embodiments of the present invention provide various display panels.

[0038] Display Panel 1 As shown in Figures 1 and 2, the display panel may include a substrate 1, a first insulating layer 2, a first electrode layer 3, a pixel definition layer 4, a light-emitting functional layer 5, and a second electrode 6.

[0039] Here, the first insulating layer 2 is provided on one side of the substrate 1, and on the surface of the first insulating layer 2 away from the substrate 1, a plurality of separation grooves 201 are provided for dividing a plurality of pixel regions 202 on the first insulating layer 2, and each pixel region 202 is distributed in an array.

[0040] The first electrode layer 3 is provided on the surface of the first insulating layer 2, which is separated from the substrate 1, and includes a plurality of first electrodes 31 distributed in an array. The orthographic projection of each first electrode 31 on the first insulating layer 2 is located in each pixel region 202 in a one-to-one correspondence. The first electrode 31 includes a flat intermediate portion 310 and an edge portion 311 surrounding the intermediate portion 310. The edge portion 311 includes a flat portion 3110 surrounding the intermediate portion 310 and an inclined portion 3111 connected between the intermediate portion 310 and the flat portion 3110. The thickness of the flat portion 3110 is less than the thickness of the intermediate portion 310.

[0041] The pixel definition layer 4 is provided on the surface of the first insulating layer 2, away from the substrate 1, and exposes at least a portion of the intermediate portion 310.

[0042] The light-emitting functional layer 5 covers the pixel definition layer 4, the intermediate portion 310 exposed by the pixel definition layer 4, and the first insulating layer 2.

[0043] The second electrode 6 covers the light-emitting functional layer 5.

[0044] In the display panel of the embodiment of the present invention, the intermediate portion 310 of each first electrode 31 exposed by the pixel definition layer 4, and the corresponding light-emitting functional layer 5 and second electrode 6 can constitute a light-emitting element for emitting light.

[0045] The orthographic projection of the first electrode 31 on the first insulating layer 2 is located within each pixel region 202 in a one-to-one correspondence, so the separation groove 201 is located outside the first electrode 31. When the light-emitting functional layer 5 is formed, the light-emitting functional layer 5 can be recessed toward the substrate 1 at the location of the separation groove 201, so the second electrode 6 forms a recess 61 in this recessed portion. Furthermore, the orthographic projection of the recess 61 on the first insulating layer 2 is located at least partially outside the intermediate portion 310 of the first electrode 31, i.e., outside the light-emitting element. Therefore, since the location of the recess 61 of the second electrode 6 is restricted by the separation groove 201, not only tip discharge between the recess 61 and the intermediate portion 310 but even short circuits can be prevented, which is advantageous in ensuring stable light emission of the light-emitting element. At the same time, light emission within the range of the recess 61 can be reduced, and even avoided, reducing mutual interference of light emission from adjacent light-emitting elements.

[0046] As shown in Figure 2, Figure 2 is a partial electron microscope image of one embodiment of the first display panel of the present invention. The orthographic projection of the recess 61 on the first insulating layer 2 shows that at least a portion of it is located outside the range of the first electrode 31, thus reducing the risk of tip discharge between it and the first electrode 31. At the same time, the emission of light from the recess 61 can be reduced, and even avoided, and interference with adjacent subpixels can be prevented.

[0047] The following describes in detail each part of the first display panel of the embodiment of the present invention.

[0048] As shown in Figure 1, the material of the substrate 1 may be a semiconductor material such as single-crystal silicon or polysilicon, or it may be another hard or soft material such as glass.

[0049] In some embodiments of the present invention, a plurality of drive transistors for displaying an image by driving each light-emitting element to emit light may be provided on the substrate 1. Taking one drive transistor with a top gate structure as an example, the display panel further includes a gate insulating layer 7, a gate electrode 8, a second insulating layer 9, and a first wiring layer 10. Here, the material of the substrate 1 may be a semiconductor material such as single-crystal silicon or polysilicon. The substrate 1 also includes an active region 101 and source electrodes 1011 and drain electrodes 1012 located at both ends of the active region 101. The gate insulating layer 7 covers the active region 101, and the gate electrode 8 is provided on the surface of the gate insulating layer 7 away from the substrate 1, and the material of the gate electrode 8 may include polysilicon. The second insulating layer 9 covers the gate electrode 8 and the substrate 1, and its material may include at least one of silicon oxide and silicon nitride. The first wiring layer 10 is provided on the surface of the second insulating layer 9, which is separated from the substrate 1, and the gate electrode 8, source electrode 1011, and drain electrode 1012 are all connected to the first wiring layer 10 via via holes filled with tungsten or other metals.

[0050] The display panel may further include a third insulating layer 11 and a second wiring layer 12. The third insulating layer 11 covers the first wiring layer 10 and the second insulating layer 9. The second wiring layer 12 is provided on the surface of the third insulating layer 11, away from the substrate 1. The specific pattern of the second wiring layer 12 may, but is not limited here, be connected to the first wiring layer 10 via via holes filled with tungsten or other metals.

[0051] As shown in Figure 1, the first insulating layer 2 is provided on one side of the substrate 1. In some embodiments of the present invention, the first insulating layer 2 can cover the second wiring layer 12. The first electrode 31 may be connected to the second wiring layer 12 via via holes filled with tungsten or other metals. The material of the first insulating layer 2 may include at least one of silicon nitride and silicon oxide, and of course, may further include other insulating materials. For example, the first insulating layer 2 can be planarized by a polishing process.

[0052] Multiple separation grooves 201 may be opened on the surface of the first insulating layer 2, which is separated from the substrate 1. The depth of the separation grooves 201 is less than the thickness of the first insulating layer 2. That is, the separation grooves 201 do not penetrate the first insulating layer 2 in the depth direction. Multiple pixel regions 202 can be divided on the first insulating layer 2 by the separation grooves 201. Furthermore, each pixel region 202 is distributed in an array-like manner.

[0053] The orthographic shape of the pixel region 202 on the substrate 1 may be a rectangle, a pentagon, a hexagon, or other polygon. Of course, it may also be circular or other shapes, and there are no particular limitations here. At the same time, the shapes and sizes of different pixel regions 202 may differ.

[0054] In some embodiments of the present invention, for example, the separation groove 201 may include a first separation groove and a second separation groove. Here, there are multiple first separation grooves, and each first separation groove extends linearly along a first direction and is distributed spaced apart along a second direction. There are also multiple second separation grooves, and each second separation groove extends linearly along a second direction and is distributed spaced apart along the first direction. The first and second directions are intersecting directions. For example, the first and second directions are perpendicular to each other. Therefore, the intersecting first and second separation grooves can divide a plurality of pixel regions 202 distributed in an array on the first insulating layer 2.

[0055] In other embodiments of the present invention, the first and second separation grooves may extend along curved or dashed trajectories, thereby enabling the division of pixel regions 202 of other shapes.

[0056] Each separation groove 201 may include two opposing side walls 2011 and a bottom wall 2012 connected between the two side walls 2011. Here, the two side walls 2011 may be installed parallel to each other, that is, in a direction perpendicular to the substrate 1, the two side walls 2011 and their extended surfaces do not intersect. Alternatively, the two side walls 2011 may be installed at a predetermined angle.

[0057] As shown in Figure 3, the bottom wall 2012 can be substantially parallel to the surface of the first insulating layer 2, which is separated from the substrate 1. Alternatively, as shown in Figure 1, the bottom wall 2012 may be a curved surface projecting away from the substrate 1, and the curvature and shape of this surface are not particularly limited here. Furthermore, in a cross-section perpendicular to the substrate 1, the contour of the bottom wall 2012 may be substantially arc-shaped, parabolic, or wavy. Of course, it may also be any other regular or irregular shape, as long as it projects away from the substrate 1.

[0058] In some embodiments of the present invention, the two side walls 2011 narrow in the direction toward the bottom wall 2012. That is, the distance between the two side walls 2011 gradually decreases toward the bottom wall 2012. As a result, the side walls 2011 form a slope with respect to the surface of the first insulating layer 2 away from the substrate 1. This slope is the angle between the side walls 2011 and the surface of the first insulating layer 2 away from the substrate 1. Furthermore, this slope is between 70° and 90°. For example, this slope may be 70°, 80°, and 90°, etc.

[0059] In some embodiments of the present invention, the maximum distance S between the two side walls 2011 of the separation groove 201 may be 0.2 μm to 0.7 μm, for example, 0.2 μm, 0.3 μm, 0.5 μm, or 0.7 μm.

[0060] As shown in Figure 1, the first electrode layer 3 is provided on the surface of the first insulating layer 2, which is separated from the substrate 1, and includes a plurality of first electrodes 31 distributed in an array. The orthogonal projection of each first electrode 31 on the first insulating layer 2 is located within each pixel region 202 in a one-to-one correspondence. That is, the boundary of the orthogonal projection of each first electrode 31 on the substrate 1 is located within the boundary of the orthogonal projection of each pixel region 202 on the substrate 1 in a one-to-one correspondence. Only one first electrode 31 is installed on each pixel region 202. The pixel regions 202 are separated by separation grooves 201, and since the first electrodes 31 are located on the pixel regions 202, the separation grooves 201 are located outside the first electrodes 31. The shape of the orthogonal projection of each first electrode 31 on the first insulating layer 2 may be the same as the shape of the pixel region 202 on which it is located. The boundary of the first electrode 31 is located within the pixel region 202 on which it is located.

[0061] In a direction parallel to the substrate 1, at least one first electrode 31 may include an intermediate portion 310 and an edge portion 311 surrounding the intermediate portion 310. Here, the intermediate portion 310 has a flat structure. That is, the intermediate portion 310 is substantially parallel to the surface of the first insulating layer 2 away from the substrate 1.

[0062] In some embodiments of the present invention, the orthographic boundary of the intermediate portion 310 of each first electrode 31 on the substrate 1 may be located within the orthographic boundary of the pixel region 202 on the substrate 1 in which the intermediate portion 310 is located. That is, there is a non-zero gap L between the orthographic boundary of the intermediate portion 310 on the substrate 1 and the orthographic boundary of the pixel region 202 on the substrate 1 in which the intermediate portion 310 is located. Furthermore, this gap L is 0.15 μm or more. For example, this gap may be 0.15 μm, 0.2 μm, 0.25 μm, etc.

[0063] The edge portion 311 may include a flat portion 3110 and an inclined portion 3111. Here, the flat portion 3110 is located on the surface of the first insulating layer 2 away from the substrate 1 and is positioned to surround the intermediate portion 310. The flat portion 3110 is also substantially parallel to the surface of the first insulating layer 2 away from the substrate 1. At the same time, the thickness of the flat portion 3110 is less than the thickness of the intermediate portion 310. In some embodiments of the present invention, there is a non-zero gap between the orthographic boundary of the flat portion 3110 on the substrate 1 and the orthographic boundary of the pixel region 202 on the substrate 1 where the flat portion 3110 is located. Of course, the orthographic boundary of the flat portion 3110 on the substrate 1 and the orthographic boundary of the pixel region 202 on the substrate 1 where the flat portion 3110 is located overlap.

[0064] The inclined portion 3111 is connected between the intermediate portion 310 and the flat portion 3110. That is, the inclined portion 3111 surrounds the intermediate portion 310, and the flat portion 3110 surrounds the inclined portion 3111. In some embodiments of the present invention, the gradient of the inclined portion 3111 with respect to the surface of the first insulating layer 2 away from the substrate 1 is 30° or more. This gradient is the angle between the surface of the inclined portion 3111 and the surface of the first insulating layer 2 away from the substrate 1.

[0065] The first electrode 31 includes a first conductive layer 320, a second conductive layer 321, and a third conductive layer 322. The first conductive layer 320 is provided on the surface of the first insulating layer 2, away from the substrate 1. The second conductive layer 321 is provided on the surface of the first conductive layer 320, away from the substrate 1. The third conductive layer 322 is provided on the surface of the second conductive layer 321, away from the substrate 1, and extends to the first insulating layer 2 with a predetermined gradient. This covers the first conductive layer 320 and the second conductive layer 321, thereby protecting the first conductive layer 320 and the second conductive layer 321.

[0066] The intermediate portion 310 of the first electrode 31 includes the first conductive layer 320 and the second conductive layer 321, a region for positioning the third conductive layer 322 on the surface of the second conductive layer 321 away from the substrate 1, and the edge portion 311 includes a region where the edges of the first conductive layer 320 and the second conductive layer 321 are covered by the third conductive layer 322, i.e., a region extending toward the first insulating layer 2. Exemplarily, the material of the first conductive layer 320 may include titanium (Ti), the material of the second conductive layer 321 may include silver (Ag), and the material of the third conductive layer 322 may include indium tin oxide (ITO), and of course, other materials may be used.

[0067] As shown in Figure 1, the pixel definition layer 4 is made of an insulating material and is provided on the surface of the first insulating layer 2, which is separated from the substrate 1, together with the first electrode layer 3. At the same time, the pixel definition layer 4 exposes at least a portion of the intermediate portion 310 of the first electrode 31. The intermediate portion 310 exposed by the pixel definition layer 4 can constitute a light-emitting element together with the corresponding light-emitting functional layer 5 and the second electrode 6.

[0068] In some embodiments of the present invention, each first electrode 31 does not completely cover the pixel region 202 in which it is located. Furthermore, there is a predetermined gap between the orthographic boundary of the flat portion 3110 of the first electrode 31 on the substrate 1 and the orthographic boundary of the pixel region 202 in which the flat portion 3110 is located on the substrate 1. The pixel definition layer 4 extends to the side walls 2011 and bottom wall 2012 of the separation groove 201. That is, the pixel definition layer 4 is tightly coupled to the pixel region 202 not covered by the first electrode 31. As a result, the pixel definition layer 4 is recessed in the region corresponding to the separation groove 201. The pixel definition layer 4 is provided with a plurality of openings 401 that expose at least a portion of each intermediate portion 310 in a one-to-one correspondence. Therefore, the pixel definition layer 4 can limit the light emission range of the light-emitting element.

[0069] As shown in Figures 5 and 6, in some embodiments of the present invention, the aperture 401 of the pixel definition layer 4 may have a hexagonal or other polygonal structure. The first electrode 31 may also have a polygonal structure and may have the same shape as the aperture 401. Of course, the first electrode 31 may have other shapes.

[0070] As shown in Figure 1, the light-emitting functional layer 5 is a continuous film layer, and at least a portion of it can cover the intermediate portion 310 of each first electrode 31. That is, it covers the area exposed by the opening 401. At the same time, the light-emitting functional layer 5 further covers the pixel definition layer 4 and the area of ​​the first insulating layer 2 that is not covered by the pixel definition layer 4 and the first electrode 31. When the light-emitting functional layer 5 is formed by vapor deposition or other process, the light-emitting functional layer 5 is recessed toward the substrate 1 in the area corresponding to the separation groove 201.

[0071] In one embodiment of the present invention, as shown in Figure 4, the light-emitting functional layer 5 includes a plurality of light-emitting unit layers 501. The distribution of the hole injection layer, hole transport layer, light-emitting layer, electron transport layer, and electron injection layer of each light-emitting unit layer 501 is the same. At the same time, a charge generation layer 502 is provided between two adjacent light-emitting unit layers 501. Therefore, the charge generation layer 502 connects each light-emitting unit layer 501 in series, making it possible to form a series-type OLED light-emitting element.

[0072] In some other embodiments of the present invention, the light-emitting functional layer 5 includes one light-emitting unit layer. The light-emitting unit layer includes a hole injection layer, a hole transport layer, a light-emitting layer, an electron transport layer, and an electron injection layer, which are sequentially stacked from the first electrode 31 along the direction away from the substrate 1.

[0073] The charge generation layer 502 cannot cover the side wall 2011 of the separation groove 201. Therefore, by blocking the charge generation layer 502 of the light-emitting element with the separation groove 201, crosstalk between two adjacent light-emitting elements can be avoided. Of course, the separation groove 201 can also block the hole injection layer or other film layers, thereby preventing crosstalk in the same way.

[0074] As shown in Figure 1, the second electrode 6 covers the light-emitting functional layer 5, and a drive signal can be applied to the first electrode 31 and the second electrode 6. As a result, the portion of the light-emitting functional layer 5 located between the first electrode 31 and the second electrode 6 emits light.

[0075] The shape of the second electrode 6 is consistent with that of the light-emitting functional layer 5. By recessing in the recessed portion of the light-emitting functional layer 5, a recess 61 is formed, and a smooth portion 62 is formed in the region corresponding to the intermediate portion 310 of the first electrode 31. Therefore, the orthographic projection of the recess 61 on the first insulating layer 2 is such that at least a portion is located outside the intermediate portion 310 of the first electrode 31, thereby reducing or avoiding tip discharge between the first electrode 31 and the recess 61 of the second electrode 6. The material of the second electrode 6 may be an alloy. For example, the material of the second electrode 6 may contain Mg and Ag, or the second electrode 6 may be an alloy of Al and Li. Of course, the second electrode 6 may be made of other alloys or elemental metals, which will not be listed here.

[0076] Furthermore, if the pixel definition layer 4 covers the edge of the intermediate portion 310, the region of the smoothing portion 62 corresponding to the pixel definition layer 4 covering the intermediate portion 310 may protrude in a direction away from the substrate 1. However, the height of the protrusion is formed to be smaller than the thickness of the first intermediate portion 310, thereby maintaining a state in which the smoothing portion 62 is substantially smooth.

[0077] Furthermore, as shown in Figures 1 and 2, in some embodiments of the present invention, the lowest point of the recess 61 of the second electrode 6 in a cross-section perpendicular to the substrate 1 is located entirely within the separation groove 201 in orthographic projection on the first insulating layer 2, i.e., entirely outside the intermediate portion 310.

[0078] To ensure that the isolation groove 201 can block the hole injection layer, charge generation layer 502, or other film layers, the isolation groove 201 should have a predetermined depth, but it is also necessary to prevent the isolation groove 201 from being too deep, penetrating the first insulating layer 2 and affecting the driving element. Therefore, in some embodiments of the present invention, the maximum depth H of the isolation groove 201 in the direction perpendicular to the substrate 1 is 30% or more of the sum of the thicknesses of the light-emitting functional layer 5 and the first electrode 31. At the same time, the maximum depth H of the isolation groove 201 is 60% or less of the sum of the thicknesses of the light-emitting functional layer 5 and the first electrode 31. Here, the maximum depth H of the isolation groove 201 is the distance between the point on the bottom wall 2012 of the isolation groove 201 that is furthest from the surface of the first insulating layer 2 away from the substrate 1, and the surface of the first insulating layer 2 furthest from the substrate 1, in the direction perpendicular to the substrate 1. For example, in some embodiments of the present invention, the maximum depth H of the isolation groove 201 is 1000 Å to 3000 Å.

[0079] Furthermore, in some embodiments of the present invention, as shown in Figure 1, the first display panel may further include a first sealing layer 13, a color filter layer 14, a second sealing layer 15, and a transparent cover plate 16.

[0080] Here, the first sealing layer 13 can cover the second electrode 6. For example, the first sealing layer 13 may include two inorganic layers and an organic layer located between the two inorganic layers.

[0081] In some embodiments of the present invention, the region of the first sealing layer 13 corresponding to the recess 61 can form a pit 1301 by being recessed. Of course, if the thickness of the first sealing layer 13 is thick, the surface of the first sealing layer 13 away from the substrate 1 can remain substantially flat.

[0082] The color filter layer 14 is provided on one side of the first sealing layer 13, away from the second electrode 6. The color filter layer 14 also includes a filter region that corresponds one-to-one with each first electrode 31. The color of the filter region may be, for example, red, blue, and green.

[0083] The second sealing layer 15 can cover the color filter layer 14, and its structure may be the same as that of the first sealing layer 13.

[0084] The transparent cover plate 16 can cover the second sealing layer 15, and its material may be glass or another material.

[0085] Furthermore, in some embodiments of the present invention, as shown in Figure 1, the first display panel may further include a light extraction layer 17. The light extraction layer 17 covers the surface of the second electrode 6, which is away from the substrate 1, and is recessed in the region corresponding to the recess 61. The first sealing layer 13 is provided on one side of the light extraction layer 17, which is away from the substrate 1. The refractive index of the light extraction layer 17 is formed to be greater than that of the second electrode 6, so that the light emission efficiency can be improved. Also, the higher the refractive index of the light extraction layer 17, the higher the light emission efficiency.

[0086] Second display panel As shown in Figures 7 to 9, the second display panel of the present invention may include a substrate 1, a first insulating layer 2, a first electrode layer 3, a light-emitting functional layer 5, and a second electrode 6.

[0087] Here, the first insulating layer 2 is provided on one side of the substrate 1. The first electrode layer 3 is provided on the surface of the first insulating layer 2, away from the substrate 1, and includes a plurality of first electrodes 31. Each first electrode 31 includes a flat intermediate portion 310 and an edge portion 311 surrounding the intermediate portion 310. The edge portion 311 includes a flat portion 3110 surrounding the intermediate portion 310 and an inclined portion 3111 connected between the intermediate portion 310 and the flat portion 3110. The thickness of the flat portion 3110 is less than the thickness of the intermediate portion 310.

[0088] The light-emitting functional layer 5 covers at least a portion of the intermediate portion 310.

[0089] The second electrode 6 covers the light-emitting functional layer 5 and includes a recess 61 and a plurality of smooth portions 62 separated by the recess 61. The orthographic projection of each smooth portion 62 on the first insulating layer 2 is located within each first electrode 31 in a one-to-one correspondence. The recess 61 is recessed toward the side of the smooth portion 62 that is closer to the substrate 1. The orthographic projection of the recess 61 on the first insulating layer 2 is located at least partially outside the intermediate portion 310.

[0090] In the display panel of the embodiment of the present invention, each first electrode 31 and its corresponding light-emitting functional layer 5 and second electrode 6 can constitute a light-emitting element. The orthographic projection of the recess 61 of the second electrode 6 on the first insulating layer 2 is such that at least a portion of it is located outside the thicker intermediate portion 310 and does not directly face the intermediate portion 310, thereby reducing the risk of tip discharge between the recess 61 and the first electrode 31, which is advantageous for ensuring stable light emission of the light-emitting element. At the same time, since the light emission within the range of the recess 61 can be reduced, mutual interference of light emission from adjacent light-emitting elements can be reduced.

[0091] The following describes in detail each part of the second display panel of the present invention.

[0092] In some embodiments of the present invention, as shown in Figure 7, a plurality of drive transistors for displaying an image by driving each light-emitting element to emit light may be provided on the substrate 1. Taking one drive transistor with a top gate structure as an example, the display panel further includes a gate insulating layer 7, a gate electrode 8, a second insulating layer 9, and a first wiring layer 10. Here, the material of the substrate 1 may be a semiconductor material such as single crystal silicon or polysilicon, and the substrate 1 may also include an active region 101 and source electrodes 1011 and drain electrodes 1012 located at both ends of the active region 101. The gate insulating layer 7 covers the active region 101, and the gate electrode 8 is provided on the surface of the gate insulating layer 7 away from the substrate 1. The second insulating layer 9 covers the gate electrode 8 and the substrate 1, and its material may include at least one of silicon oxide and silicon nitride. The first wiring layer 10 is provided on the surface of the second insulating layer 9 away from the substrate 1. Furthermore, the gate electrode 8, source electrode 1011, and drain electrode 1012 are all connected to the first wiring layer 10 via via holes filled with tungsten or other metals.

[0093] The display panel may further include a third insulating layer 11 and a second wiring layer 12. The third insulating layer 11 covers the first wiring layer 10 and the second insulating layer 9. The second wiring layer 12 is provided on the surface of the third insulating layer 11 away from the substrate 1, and the specific pattern of the second wiring layer 12 may, but is not limited thereto, be connected to the first wiring layer 10 via via holes filled with tungsten or other metals.

[0094] As shown in Figure 7, the first insulating layer 2 is provided on one side of the substrate 1. In some embodiments of the present invention, the first insulating layer 2 can cover the second wiring layer 12, and the first electrode 31 may be connected to the second wiring layer 12 via via holes filled with tungsten or other metals. The material of the first insulating layer 2 may include at least one of silicon nitride and silicon oxide. Of course, it may also include other insulating materials.

[0095] As shown in Figure 7, the first electrode layer 3 is provided on the surface of the first insulating layer 2, away from the substrate 1, and includes a plurality of first electrodes 31. The first electrodes 31 are distributed in an array, and adjacent first electrodes 31 are spaced apart.

[0096] In a direction parallel to the substrate 1, each first electrode 31 may include an intermediate portion 310 and an edge portion 311 surrounding the intermediate portion 310. Here, the intermediate portion 310 has a flat structure. That is, the intermediate portion 310 is substantially parallel to the surface of the first insulating layer 2, which is away from the substrate 1.

[0097] The edge portion 311 may include a flat portion 3110 and an inclined portion 3111. Here, the flat portion 3110 is located on the surface of the first insulating layer 2 away from the substrate 1 and is positioned to surround the intermediate portion 310. Also, the flat portion 3110 is substantially parallel to the surface of the first insulating layer 2 away from the substrate 1. At the same time, the thickness of the flat portion 3110 is less than the thickness of the intermediate portion 310. In some embodiments of the present invention, there is a non-zero gap between the flat portion 3110 and the boundary of the pixel region 202 in which it is located. Of course, the boundary of the flat portion 3110 can overlap with the boundary of the pixel region 202.

[0098] The inclined portion 3111 is connected between the intermediate portion 310 and the flat portion 3110. That is, the inclined portion 3111 surrounds the intermediate portion 310, and the flat portion 3110 surrounds the inclined portion 3111. In some embodiments of the present invention, the gradient of the inclined portion 3111 with respect to the surface of the first insulating layer 2 away from the substrate 1 is 30° or more. This gradient is the angle between the surface of the inclined portion 3111 and the surface of the first insulating layer 2 away from the substrate 1.

[0099] The first electrode 31 includes a first conductive layer 320, a second conductive layer 321, and a third conductive layer 322. The first conductive layer 320 is provided on the surface of the first insulating layer 2, away from the substrate 1. The second conductive layer 321 is provided on the surface of the first conductive layer 320, away from the substrate 1. The third conductive layer 322 is provided on the surface of the second conductive layer 321, away from the substrate 1, and extends with a predetermined gradient to the surface of the pixel region 202 where it is located, away from the substrate 1. This covers the first conductive layer 320 and the second conductive layer 321, thereby protecting the first conductive layer 320 and the second conductive layer 321.

[0100] The intermediate portion 310 of the first electrode 31 includes the first conductive layer 320 and the second conductive layer 321, a region for positioning the third conductive layer 322 on the surface of the second conductive layer 321 away from the substrate 1, and the edge portion 311 includes a region where the edges of the first conductive layer 320 and the second conductive layer 321 are covered by the third conductive layer 322, i.e., a region extending toward the first insulating layer 2. Exemplarily, the material of the first conductive layer 320 may include titanium (Ti), the material of the second conductive layer 321 may include silver (Ag), and the material of the third conductive layer 322 may include indium tin oxide (ITO), and of course, other materials may be used.

[0101] As shown in Figure 7, the light-emitting functional layer 5 is a continuous film layer that can simultaneously cover at least a portion of each first electrode 31. In some embodiments of the present invention, the light-emitting functional layer 5 includes a single light-emitting unit layer. The light-emitting unit layer includes a hole injection layer, a hole transport layer, a light-emitting layer, an electron transport layer, and an electron injection layer, which are sequentially stacked from the first electrode 31 along the direction away from the substrate 1.

[0102] In another embodiment of the present invention, the light-emitting functional layer 5 includes a plurality of light-emitting unit layers. The distribution of hole injection layers, hole transport layers, light-emitting layers, electron transport layers, and electron injection layers is the same in each light-emitting unit layer. At the same time, a charge generation layer is provided between two adjacent light-emitting unit layers, so that each light-emitting unit layer is connected in series by the charge generation layer, forming a series-type OLED light-emitting element.

[0103] As shown in Figure 7, the second electrode 6 covers the light-emitting functional layer 5, and by applying a drive signal to the first electrode 31 and the second electrode 6, the portion of the light-emitting functional layer 5 located between the first electrode 31 and the second electrode 6 can emit light. The second electrode 6 includes a plurality of recesses 61 and a plurality of smooth portions 62.

[0104] Here, each smoothing portion 62 is distributed in an array and is positioned to correspond one-to-one with the intermediate portion 310 of each first electrode 31. That is, the orthographic projection of each smoothing portion 62 on the first insulating layer 2 is located within each first electrode 31 in a one-to-one correspondence. The smoothing portions 62 are parallel or approximately parallel to the intermediate portion 310.

[0105] The recesses 61 correspond to the regions of the first insulating layer 2 that are not covered by the intermediate portion 310 and are used to separate the smooth portions 62. The recesses 61 are recessed toward one side of the smooth portion 62 that is closer to the substrate 1. The recesses 61 are ring-shaped and there are multiple recesses. Each recess 61 surrounds each smooth portion 62 in a one-to-one correspondence. In other words, the recesses 61 are transition regions between two adjacent smooth portions 62.

[0106] The orthographic projection of the recess 61 on the substrate 1 is such that at least a portion of it is located outside the intermediate portion 310 of the first electrode 31. Therefore, it does not directly face the thick intermediate portion 310, but directly faces areas other than the first electrode 31 or the thin edge portion 311. This reduces the risk of tip discharge and short circuits between the recess 61 and the first electrode 31, thereby improving the light emission stability of the light-emitting element.

[0107] In some embodiments of the present invention, in a cross-section perpendicular to the substrate 1, the orthographic projection of the lowest point of the recess 61 on the first insulating layer 2 is located outside the intermediate portion 310. For example, this lowest point corresponds to one of the inclined portion 3111 and the flat portion 3110 in order to avoid tip discharge between it and the intermediate portion 310. The lowest point of the recess 61 in a cross-section perpendicular to the substrate 1 is the point closest to the first electrode 31 in a cross-section perpendicular to the substrate 1, i.e., the point furthest from the smooth portion 62.

[0108] The number of recesses 61 in a cross-section perpendicular to the substrate 1 may be multiple, and the lowest point in different cross-sections may be different. For example, this lowest point may be the point closest to the intermediate portion 310 of the first electrode 31 in the depth direction, or it may be another point in the depth direction, and is specifically determined by the position in the cross-section perpendicular to the substrate 1.

[0109] As shown in Figures 7 to 9, in some embodiments of the present invention, the recess 61 has two sides, including a first side 611, a second side 612, and a bottom surface 613. Here, the first side 611 and the second side 612 are positioned opposite each other and connected to both sides of the bottom surface 613. At the same time, the first side 611 and the second side 612 can be extended so as to contract toward the substrate 1. The first side 611 and the second side 612 may be curved or flat, but are not particularly limited thereto.

[0110] The bottom surface 613 may be a curved surface that protrudes away from the substrate 1. In some embodiments of the present invention, the bottom surface 613 of the recess 61 includes a first inclined surface 6131, a second inclined surface 6132, and a connecting surface 6133. Here, both the first inclined surface 6131 and the second inclined surface 6132 may be curved or flat. The connecting surface 6133 is located on one side of the bottom edge of the first side surface 611 and the second side surface 612 away from the substrate 1. The connecting surface 6133 is connected between the first inclined surface 6131 and the second inclined surface 6132. The first inclined surface 6131 is connected to the bottom edge of the first side surface 611, and the second inclined surface 6132 is connected to the bottom edge of the second side surface 612.

[0111] In some embodiments of the present invention, the gradient of the first inclined surface 6131 relative to the intermediate portion 310 is not less than the gradient of the first side surface 611 relative to the intermediate portion 310. At the same time, the gradient of the second inclined surface 6132 relative to the intermediate portion 310 is not less than the gradient of the second side surface 612 relative to the intermediate portion 310.

[0112] Furthermore, the first inclined surface 6131 and the second inclined surface 6132 are symmetric with respect to the connection surface 6133 in a cross-section perpendicular to the substrate 1. That is, the cross-section of the first inclined surface 6131 and the cross-section of the second inclined surface 6132 in a direction perpendicular to the substrate 1 are symmetric with respect to the cross-section of the connection surface 6133 in a direction perpendicular to the substrate 1. At the same time, the first side surface 611 and the second side surface 612 are symmetric with respect to the bottom surface 613 in a cross-section perpendicular to the substrate 1. That is, the cross-section of the first side surface 611 and the cross-section of the second side surface 612 in a direction perpendicular to the substrate 1 are symmetric with respect to the cross-section of the bottom surface 613 in a direction perpendicular to the substrate 1.

[0113] In some embodiments of the present invention, the minimum thickness of the region of the second electrode 6 corresponding to the first side surface 611 and the second side surface 612 is greater than the minimum thickness of the region of the second electrode 6 corresponding to the first inclined surface 6131 and the second inclined surface 6132.

[0114] Furthermore, as shown in Figure 7, in some embodiments of the present invention, the depth of the recess 61 is less than twice the maximum thickness of the second electrode 6. For example, the maximum thickness of the second electrode 6 is 90 nm, and the depth of the recess 61 is less than 180 nm, such as 120 nm, 100 nm, 80 nm, 70 nm, 60 nm, 50 nm, 40 nm, etc. The depth of the recess 61 refers to the maximum depth of the recess 61. That is, in a direction perpendicular to the substrate 1, it refers to the distance between the point of the recess 61 closest to the substrate 1 and the surface of the smooth portion 62 away from the substrate 1.

[0115] In some embodiments of the present invention, as shown in Figures 7 and 8, the orthographic projection of each recess 61 on the first insulating layer 2 surrounds the outside of the intermediate portion 310 of one first electrode 31. The minimum distance between the bottom surface 613 of a recess 61 and the intermediate portion 310 of an adjacent first electrode 31 (the distance between the point of the recess 61 closest to the intermediate portion 310 and the intermediate portion 310 in a direction perpendicular to the substrate 1) is 70% or more of the sum of the thicknesses of the smooth portion 62 and the light-emitting functional layer 5. The sum of the thicknesses of the smooth portion 62 and the light-emitting functional layer 5 is the sum of the thicknesses of the smooth portion 62 and the light-emitting functional layer 5. For example, if the sum of the thicknesses of the smooth portion 62 and the light-emitting functional layer 5 is approximately 365 nm, the minimum distance between the intermediate portion 310 of an adjacent first electrode 31 and the bottom surface of the recess 61 in a direction perpendicular to the substrate 1 is approximately 255 nm.

[0116] Furthermore, the maximum distance between the bottom of the recess 61 and the adjacent intermediate portion 310 of the first electrode 31 (the distance between the intermediate portion 310 and the point of the recess 61 closest to the intermediate portion 310 in a direction perpendicular to the substrate 1) is at most 400 nm, and this maximum value is 450 nm or less.

[0117] As shown in Figure 7, in some embodiments of the present invention, in order to easily form the second electrode 6, a plurality of separation grooves 201 can be formed on the surface of the first insulating layer 2 away from the substrate 1. The depth of the separation grooves 201 is less than the thickness of the first insulating layer 2. That is, the separation grooves 201 do not penetrate the first insulating layer 2 in the depth direction. Multiple pixel regions 202 can be divided on the first insulating layer 2 using the separation grooves 201. Furthermore, each pixel region 202 is distributed in an array. For the specific structure of the separation grooves 201, refer to the embodiment of the first display panel described above, and a detailed explanation will be omitted here. At the same time, the second display panel of the present invention further includes a pixel definition layer 4. The pixel definition layer 4 is made of an insulating material and is provided on the surface of the first insulating layer 2 away from the substrate 1 together with the first electrode layer 3. At the same time, the pixel definition layer 4 exposes at least a portion of the intermediate portion 310 of the first electrode 31 and is recessed in the region corresponding to the separation grooves 201. The intermediate portion 310 exposed by the pixel definition layer 4 can constitute a light-emitting element together with the corresponding light-emitting functional layer 5 and the second electrode 6. The structure of the pixel definition layer 4 can be described by referring to the embodiment of the first display panel described above, so a detailed explanation is omitted here.

[0118] The light-emitting functional layer 5 further covers the pixel definition layer 4 and the region of the first insulating layer 2 that is not covered by the pixel definition layer 4 and the first electrode 31. When the light-emitting functional layer 5 is formed by vapor deposition or other process, the light-emitting functional layer 5 is recessed toward the substrate 1 in the region corresponding to the separation groove 201. The orthographic projection of the recess 61 of the second electrode 6 on the first insulating layer 2 is at least partially located within the range of the separation groove 201.

[0119] Furthermore, as shown in Figure 7, the first display panel of the present invention may further include a first sealing layer 13. The first sealing layer 13 can cover the second electrode 6. For example, the first sealing layer 13 may include two inorganic layers and an organic layer located between the two inorganic layers. The first sealing layer 13 forms a pit 1301 in the region corresponding to the recess 61. The two side walls of the pit 1301 extend so as to contract toward the substrate 1, and the two side walls are connected.

[0120] Furthermore, this display panel may further include a color filter layer 14, a second sealing layer 15, and a transparent cover plate 16.

[0121] Here, the color filter layer 14 is provided on one side of the first sealing layer 13 away from the second electrode 6. The color filter layer 14 also includes a filter region that corresponds one-to-one with each first electrode 31. The color of the filter region may be, for example, red, blue, and green.

[0122] The second sealing layer 15 can cover the color filter layer 14, and its structure may be the same as that of the first sealing layer 13.

[0123] The transparent cover plate 16 can cover the second sealing layer 15, and its material may be glass or another material.

[0124] Furthermore, in some embodiments of the present invention, as shown in Figure 7, the second display panel may further include a light extraction layer 17. The light extraction layer 17 covers the surface of the second electrode 6, which is away from the substrate 1, and is recessed in the region corresponding to the recess 61. The first sealing layer 13 is provided on one side of the light extraction layer 17, which is away from the substrate 1. Since the refractive index of the light extraction layer 17 is greater than that of the second electrode 6, the light emission efficiency can be improved. Also, the higher the refractive index of the light extraction layer 17, the higher the light emission efficiency.

[0125] Third display panel As shown in Figures 10 and 11, the display panel may include a substrate 1, a first insulating layer 2, a first electrode layer 3, a pixel definition layer 4, a light-emitting functional layer 5, and a second electrode 6.

[0126] Here, the first insulating layer 2 is provided on one side of the substrate 1. The first insulating layer 2 also has a plurality of pixel regions 202 distributed in an array-like manner and separation regions 201 that separate the pixel regions 202.

[0127] The first electrode layer 3 is provided on the surface of the first insulating layer 2, which is separated from the substrate 1, and includes a plurality of first electrodes 31 distributed in an array. The orthographic projection of each first electrode 31 on the first insulating layer 2 is located within each pixel region 202.

[0128] The pixel definition layer 4 is provided on the surface of the first insulating layer 2, away from the substrate 1, and exposes each first electrode 31. A pixel definition groove 41 is formed in the region of the pixel definition layer 4 corresponding to the isolation region 201. The central part of the pixel definition groove 41 has a first projection 42 that protrudes away from the substrate 1. A sub-groove 40 is formed between the side wall of the first projection 42 and the side wall of the pixel definition groove 41.

[0129] The light-emitting functional layer 5 covers the pixel definition layer 4 and the first electrode 31 exposed by the pixel definition layer 4.

[0130] The second electrode 6 covers the light-emitting functional layer 5.

[0131] In this specification, the central portion of the pixel definition groove 41 refers to any region on the bottom surface between the two side walls of the pixel definition groove 41, and is not limited to a region between the two side walls of the pixel definition groove 41 where the distance to these two side walls is equal.

[0132] In the display panel of the embodiment of the present invention, the regions of each first electrode 31 exposed by the pixel definition layer 4, and the corresponding light-emitting functional layer 5 and second electrode 6, can be used to constitute a light-emitting element so that it can emit light.

[0133] The orthographic projection of the first electrode 31 on the first insulating layer 2 is located within each pixel region 202, so the pixel definition groove 41 is located outside the first electrode 31. When the light-emitting functional layer 5 is formed, the light-emitting functional layer 5 can be recessed toward the substrate 1 at the location of the pixel definition groove 41. As a result, the second electrode 6 forms a recess 61 in this recessed portion. Furthermore, the orthographic projection of the recess 61 on the first insulating layer 2 is located at least partially within the range of the pixel definition layer 4, and at least another part is located outside the light-emitting element. Therefore, since the location of the recess 61 of the second electrode 6 is restricted by the pixel definition groove 41, not only tip discharge between the recess 61 and the first electrode 31 but even short circuits can be prevented, which is advantageous in ensuring stable light emission of the light-emitting element. At the same time, light emission within the range of the recess 61 can be reduced, and even avoided, reducing mutual interference of light emission from adjacent light-emitting elements.

[0134] Furthermore, since a sub-groove 40 is formed between the first projection 42 in the center of the pixel definition groove 41 and the side wall of the pixel definition groove 41, the central part of the pixel definition groove 41 has an uneven shape. When the light-emitting functional layer 5 includes a charge generation layer, it is difficult to form the charge generation layer on the side walls of the two sub-grooves 40, which is advantageous for blocking the charge generation layer within the pixel definition groove 41, thus avoiding the formation of crosstalk between two adjacent light-emitting elements. Of course, the sub-grooves 40 of the pixel definition groove 41 can also block the hole injection layer or other film layers, and similarly prevent crosstalk.

[0135] The following describes in detail each part of the third display panel according to the embodiment of the present invention.

[0136] As shown in Figure 10, the material of the substrate 1 may be a semiconductor material such as single-crystal silicon or polysilicon, or it may be another hard or soft material such as glass.

[0137] In some embodiments of the present invention, a plurality of drive transistors for displaying an image by driving each light-emitting element to emit light may be provided on the substrate 1. Taking one drive transistor with a top gate structure as an example, the display panel further includes a gate insulating layer 7, a gate electrode 8, a second insulating layer 9, and a first wiring layer 10. Here, the material of the substrate 1 may be a semiconductor material such as single-crystal silicon or polysilicon. The substrate 1 also includes an active region 101 and source electrodes 1011 and drain electrodes 1012 located at both ends of the active region 101. The gate insulating layer 7 covers the active region 101, and the gate electrode 8 is provided on the surface of the gate insulating layer 7 away from the substrate 1. The material of the gate electrode 8 may include polysilicon. The second insulating layer 9 covers the gate electrode 8 and the substrate 1, and its material may include at least one of silicon oxide and silicon nitride. The first wiring layer 10 is provided on the surface of the second insulating layer 9 away from the substrate 1. Furthermore, the gate electrode 8, source electrode 1011, and drain electrode 1012 are all connected to the first wiring layer 10 via via holes filled with tungsten or other metals.

[0138] The display panel may further include a third insulating layer 11 and a second wiring layer 12. The third insulating layer 11 covers the first wiring layer 10 and the second insulating layer 9. The second wiring layer 12 is provided on the surface of the third insulating layer 11, away from the substrate 1. The specific pattern of the second wiring layer 12 can be connected to the first wiring layer 10 via via holes filled with tungsten or other metals, but is not particularly limited here.

[0139] As shown in Figure 10, the first insulating layer 2 is provided on one side of the substrate 1. In some embodiments of the present invention, the first insulating layer 2 can cover the second wiring layer 12. The first electrode 31 may be connected to the second wiring layer 12 via via holes filled with tungsten or other metals. The material of the first insulating layer 2 may include at least one of silicon nitride and silicon oxide. Of course, it may further include other insulating materials. For example, the first insulating layer 2 can be planarized by a polishing process.

[0140] The first insulating layer 2 can be divided into multiple pixel regions 202. Each pixel region 202 is distributed in an array and spaced apart. The regions other than the driving region 201 are isolation regions 201, and the pixel regions 202 are separated by the isolation regions 201.

[0141] The orthographic shape of the pixel region 202 on the substrate 1 may be a rectangle, a pentagon, a hexagon, or other polygon. Of course, it may also be circular or other shapes, but is not particularly limited here. At the same time, the shapes and sizes of different pixel regions 202 may differ.

[0142] In some embodiments of the present invention, for example, the isolation region 201 may include a first isolation region and a second isolation region. Here, there are multiple first isolation regions, and each first isolation region extends linearly along a first direction and is distributed spaced apart along a second direction. There are also multiple second isolation regions, and each second isolation region extends linearly along a second direction and is distributed spaced apart along the first direction. The first and second directions are intersecting directions. For example, the first and second directions are perpendicular to each other. Therefore, the intersecting first and second isolation regions can divide a plurality of pixel regions 202 distributed in an array on the first insulating layer 2.

[0143] In other embodiments of the present invention, the first and second separation regions can also extend along curved or dashed trajectories, so that pixel regions 202 of other shapes can be divided.

[0144] As shown in Figure 10, the first electrode layer 3 is provided on the surface of the first insulating layer 2, which is separated from the substrate 1, and includes a plurality of first electrodes 31 distributed in an array. The orthogonal projection of each first electrode 31 on the first insulating layer 2 is located within each pixel region 202 in a one-to-one correspondence. That is, the boundary of the orthogonal projection of each first electrode 31 on the substrate 1 is located within the boundary of the orthogonal projection of each pixel region 202 on the substrate 1 in a one-to-one correspondence. Only one first electrode 31 is placed on each pixel region 202. The pixel region 202 is separated by a separation region 201, and since the first electrode 31 is located on the pixel region 202, the separation region 201 is located outside the first electrode 31. The shape of the orthogonal projection of each first electrode 31 on the first insulating layer 2 may be the same as the shape of the pixel region 202 on which it is located, and the boundary of the first electrode 31 is located within the pixel region 202 on which it is located.

[0145] In a direction parallel to the substrate 1, at least one first electrode 31 may include an intermediate portion 310 and an edge portion 311 surrounding the intermediate portion 310. Here, the intermediate portion 310 has a flat structure. That is, the intermediate portion 310 is substantially parallel to the surface of the first insulating layer 2 away from the substrate 1.

[0146] In some embodiments of the present invention, the orthographic boundary of the intermediate portion 310 of each first electrode 31 on the substrate 1 can be located within the orthographic boundary of the pixel region 202 on the substrate 1 in which the intermediate portion 310 is located. That is, there is a non-zero gap L between the orthographic boundary of the intermediate portion 310 on the substrate 1 and the orthographic boundary of the pixel region 202 on the substrate 1 in which the intermediate portion 310 is located. Furthermore, this gap L is 0.15 μm or more. For example, this gap L may be 0.15 μm, 0.2 μm, 0.25 μm, etc.

[0147] The edge portion 311 may include a flat portion 3110 and an inclined portion 3111. Here, the flat portion 3110 is located on the surface of the first insulating layer 2 away from the substrate 1 and is positioned to surround the intermediate portion 310. The flat portion 3110 is also substantially parallel to the surface of the first insulating layer 2 away from the substrate 1. At the same time, the thickness of the flat portion 3110 is less than the thickness of the intermediate portion 310. In some embodiments of the present invention, there is a non-zero gap between the orthographic boundary of the flat portion 3110 on the substrate 1 and the orthographic boundary of the pixel region 202 on the substrate 1 where the flat portion 3110 is located. Of course, the orthographic boundary of the flat portion 3110 on the substrate 1 and the orthographic boundary of the pixel region 202 on the substrate 1 where the flat portion 3110 is located may overlap.

[0148] The inclined portion 3111 is connected between the intermediate portion 310 and the flat portion 3110. That is, the inclined portion 3111 surrounds the intermediate portion 310. The flat portion 3110 is positioned to surround the inclined portion 3111. In some embodiments of the present invention, the gradient of the inclined portion 3111 with respect to the surface of the first insulating layer 2 away from the substrate 1 is 30° or more. This gradient is the angle between the surface of the inclined portion 3111 and the surface of the first insulating layer 2 away from the substrate 1.

[0149] The first electrode 31 may include a first conductive layer 320, a second conductive layer 321, and a third conductive layer 322. The first conductive layer 320 is provided on the surface of the first insulating layer 2, away from the substrate 1. The second conductive layer 321 is provided on the surface of the first conductive layer 320, away from the substrate 1. The third conductive layer 322 is provided on the surface of the second conductive layer 321, away from the substrate 1, and extends to the first insulating layer 2 with a predetermined gradient. This allows the first conductive layer 320 and the second conductive layer 321 to be covered and protected.

[0150] The intermediate portion 310 of the first electrode 31 includes the first conductive layer 320 and the second conductive layer 321, a region for positioning the third conductive layer 322 on the surface of the second conductive layer 321 away from the substrate 1, and the edge portion 311 includes a region where the edges of the first conductive layer 320 and the second conductive layer 321 are covered by the third conductive layer 322, i.e., a region extending toward the first insulating layer 2. Exemplarily, the material of the first conductive layer 320 may include titanium (Ti), the material of the second conductive layer 321 may include silver (Ag), and the material of the third conductive layer 322 may include indium tin oxide (ITO), and of course, other materials may be used.

[0151] As shown in Figure 10, the pixel definition layer 4 is made of an insulating material and is provided on the surface of the first insulating layer 2, which is separated from the substrate 1, together with the first electrode layer 3, and exposes at least a portion of the first electrode 31.

[0152] For example, the pixel definition layer 4 is provided with a plurality of apertures 401 that expose at least a portion of each intermediate portion 310 in a one-to-one ratio. The first electrode 31 exposed by the pixel definition layer 4 can constitute a light-emitting element together with the corresponding light-emitting functional layer 5 and second electrode 6. In some embodiments of the present invention, the apertures 401 of the pixel definition layer 4 may be hexagonal or other polygonal structures. The first electrode 31 may also be polygonal in shape, the same as the shape of the apertures 401. Of course, the first electrode 31 may also be of other shapes. Specifically, embodiments of the first display panel in Figures 5 and 6 can be referenced.

[0153] As shown in Figure 10, the pixel definition layer 4 has pixel definition grooves 41 formed in the region corresponding to the isolation region 201. The pixel definition grooves 41 can be formed by a photolithography process during the formation of the pixel definition layer 4. Of course, the pixel definition grooves 41 can also be formed by placing isolation grooves in the isolation region 201 of the first insulating layer 2, thereby indenting the pixel definition layer 4 in the isolation grooves.

[0154] In some embodiments of the present invention, the pixel definition layer 4 may include a separation portion 400 and an extension portion 410. Here, the separation portion 400 is located in a region of the first insulating layer 2 that is not covered by the first electrode 31, i.e., in a region other than the first electrode 31. The pixel definition groove 41 is provided in the separation portion 400. The extension portion 410 is connected to the separation portion 400 and extends to the surface of the first electrode 31 away from the substrate 1, but does not completely cover the first electrode 31. For example, the extension portion 410 extends along the circumferential direction of the first electrode 31 to the circumferential surface of the intermediate portion 310 away from the substrate 1, and does not completely cover the intermediate portion 310 so that an opening 401 is formed.

[0155] Furthermore, the width of the extension 410 covering any one first electrode 31 is smaller than the width of the separation portion 400 located between two adjacent first electrodes 31. In other words, for any one first electrode 31, the region of the extension 410 located on the surface of the first electrode 31 away from the substrate 1 forms a ring structure. The width of the ring structure is smaller than the width of the separation portion 400 adjacent to the first electrode 31. The width of the ring structure is the distance between the two side walls.

[0156] In the pixel definition layer 4 described above, the central portion of the pixel definition groove 41 may have a first projection 42 that protrudes toward the direction away from the substrate 1. A sub-groove 40 is formed between the side wall of the first projection 42 and the side wall of the pixel definition groove 41. Compared to the case where the central portion of the pixel definition groove 41 is flat, the first projection 42 can make the shape of the central portion of the pixel definition groove 41 more complex, which is advantageous for blocking the charge generation layer or other film layers of the upper light-emitting functional layer 5, thereby preventing crosstalk between adjacent light-emitting elements.

[0157] In this specification, the central portion of the sub-groove 40 refers to any region on the bottom surface between the two side walls of the sub-groove 40, and is not limited to a region between the two side walls of the sub-groove 40 where the distance to these two side walls is equal.

[0158] In some embodiments of the present invention, the two side walls of the first projection 42 are inclined surfaces that expand toward the substrate 1, and the two side walls of the pixel definition groove 41 are inclined surfaces that contract toward the substrate 1. That is, the distance between the two side walls of the first projection 42 gradually increases toward the substrate 1, and the distance between the two side walls of the pixel definition groove 41 gradually decreases toward the substrate 1. Thus, the sub-groove 40 is a groove in which the two side walls contract toward the substrate 1.

[0159] Furthermore, the slope of the side wall of the first projection 42 is different from the slope of the side wall of the pixel definition groove 41. The slope of the side wall of the first projection 42 is the angle between the side wall of the first projection 42 and the surface of the first insulating layer 2 away from the substrate 1. The slope of the side wall of the pixel definition groove 41 is the angle between the side wall of the pixel definition groove 41 and the surface of the first insulating layer 2 away from the substrate 1. Here, if the side wall of the first projection 42 and the side wall of the pixel definition groove 41 form an arcuate surface, the slopes of both are the maximum or average value of the angle between each cross-section of the arcuate surface and the surface of the first insulating layer 2 away from the substrate 1.

[0160] Furthermore, the thickness of the first projection 42 may be less than the depth of the pixel definition groove 41. As a result, the first projection 42 does not protrude from the surface of the first insulating layer 2 away from the substrate 1, but is located entirely within the pixel definition groove 41.

[0161] As shown in Figure 10, the light-emitting functional layer 5 is a continuous film layer, and at least a portion of it covers the intermediate portion 310 of each first electrode 31. That is, the light-emitting functional layer 5 covers the region exposed by the opening 401 and may further cover at least a portion of the pixel definition layer 4. When the light-emitting functional layer 5 is formed by vapor deposition or other process, the light-emitting functional layer 5 is recessed in the region corresponding to the pixel definition groove 41 in the direction toward the substrate 1.

[0162] In one embodiment of the present invention, as shown in Figure 11, the light-emitting functional layer 5 includes a plurality of light-emitting unit layers 501. In each light-emitting unit layer 501, the distribution of the hole injection layer, hole transport layer, light-emitting layer, electron transport layer, and electron injection layer is the same. At the same time, a charge generation layer 502 is provided between two adjacent light-emitting unit layers 501, so that each light-emitting unit layer 501 is connected in series by the charge generation layer 502 to form a series-type OLED light-emitting element.

[0163] In some other embodiments of the present invention, the light-emitting functional layer 5 includes one light-emitting unit layer. The light-emitting unit layer includes a hole injection layer, a hole transport layer, a light-emitting layer, an electron transport layer, and an electron injection layer, which are sequentially stacked from the first electrode 31 along the direction away from the substrate 1.

[0164] Since the charge generation layer 502 does not easily cover the sidewalls of the sub-grooves 40 of the pixel definition groove 41, the charge generation layer 502 of the light-emitting element can be blocked by the pixel definition groove 41, thereby avoiding crosstalk between two adjacent light-emitting elements. Of course, the pixel definition groove 41 can also block the hole injection layer or other film layers, thus preventing crosstalk in the same way.

[0165] The light-emitting functional layer 5 is a continuous film layer, but not all of its film layers are continuous. For example, in some embodiments of the present invention, the light-emitting layer of the light-emitting functional layer 5 may include a plurality of spaced-apart light-emitting parts. Each light-emitting part is located within a single opening 401, so that each light-emitting element has an independent light-emitting part. The materials of the different light-emitting parts may be different, so that the light-emitting colors of different light-emitting elements are different. The other film layers of the light-emitting functional layer 5 may be the continuous film layers described above. That is, each light-emitting element can share these continuous film layers.

[0166] As shown in Figure 10, the second electrode 6 covers the light-emitting functional layer 5, and a drive signal can be applied to the first electrode 31 and the second electrode 6. As a result, the portion of the light-emitting functional layer 5 located between the first electrode 31 and the second electrode 6 can emit light.

[0167] Since there is a predetermined distance between the second electrode 6 and the first electrode 31, a microcavity can be formed. The light emitted by the light-emitting functional layer 5 is reflected to some extent by the first electrode 31 and the second electrode 6. When the wavelength of the light and the depth of the microcavity satisfy the resonance conditions, the light is enhanced according to the principle of expansion interference, which is advantageous for improving the brightness of the light-emitting element. However, since the wavelengths of light of different colors are different, the depth of the microcavity of light-emitting elements with different emission colors may also differ.

[0168] In some embodiments of the present invention, the light-emitting layers of different light-emitting elements may have different light-emitting colors. The thickness of the first electrode 31 of light-emitting elements with different light-emitting colors can be made different so that the microcavity has the same enhancement effect for light of different colors. This allows the depth of the microcavity to match the wavelength of light, and the longer the wavelength of emission, the greater the depth of the microcavity. Furthermore, the first electrode 31 includes a first conductive layer 320, a second conductive layer 321, and a third conductive layer 322. The first conductive layer 320 may be a reflective material. The depth of the microcavity may be the distance between the first conductive layer 320 and the second electrode 6. The two first electrodes 31 can have different thicknesses by making the thickness of the first conductive layer 320 different, the thickness of the second conductive layer 321 the same, and the thickness of the third conductive layer 322 the same.

[0169] The shape of the second electrode 6 coincides with that of the light-emitting functional layer 5, and by being recessed in the recessed portion of the light-emitting functional layer 5, a recess 61 is formed, and a smooth portion 62 is formed in the region corresponding to the intermediate portion 310 of the first electrode 31. As a result, at least a portion of the orthographic projection of the recess 61 on the first insulating layer 2 is located outside the intermediate portion 310 of the first electrode 31, thus reducing or avoiding tip discharge between the first electrode 31 and the recess 61 of the second electrode 6. The material of the second electrode 6 may be an alloy. For example, the material of the second electrode 6 may contain Mg and Ag. Alternatively, the second electrode 6 may use an alloy of Al and Li. Of course, the second electrode 6 may use other alloys or elemental metals, which will not be listed here.

[0170] In some embodiments of the present invention, the extension 410 of the pixel definition layer 4 covers the edge of the intermediate portion 310. The second electrode 6 may protrude away from the substrate 1 in the region corresponding to the extension 410. However, the protruding height of the second electrode 6 is formed to be less than the thickness of the intermediate portion 310 so that the junction between the smooth portion 62 and the recess 61 remains substantially smooth.

[0171] Furthermore, as shown in Figures 10 and 11, in some embodiments of the present invention, the lowest point of the recess 61 of the second electrode 6 in a cross-section perpendicular to the substrate 1 is located entirely within the pixel definition groove 41 in the orthographic projection on the first insulating layer 2, i.e., entirely outside the intermediate portion 310.

[0172] Furthermore, in some embodiments of the present invention, as shown in Figures 10 and 11, the first display panel may further include a first sealing layer 13, a color filter layer 14, a second sealing layer 15, and a transparent cover plate 16.

[0173] Here, the first sealing layer 13 can cover the second electrode 6. For example, the first sealing layer 13 may include two inorganic layers and an organic layer located between the two inorganic layers.

[0174] In some embodiments of the present invention, the first sealing layer 13 may form a pit 1301 by being recessed in a region corresponding to the recess 61. Of course, if the thickness of the first sealing layer 13 is thick, the surface of the first sealing layer 13 away from the substrate 1 can be kept substantially flat.

[0175] Furthermore, the color filter layer 14 is provided on one side of the first sealing layer 13, away from the second electrode 6. The color filter layer 14 also includes a filter region that corresponds one-to-one with each first electrode 31. The color of the filter region may be, for example, red, blue, and green.

[0176] The second sealing layer 15 can cover the color filter layer 14, and its structure may be the same as that of the first sealing layer 13.

[0177] The transparent cover plate 16 can cover the second sealing layer 15, and its material may be glass or another material.

[0178] Furthermore, in some embodiments of the present invention, as shown in Figures 10 and 11, the third display panel may further include a light extraction layer 17. The light extraction layer 17 covers the surface of the second electrode 6, which is away from the substrate 1, and is recessed in the region corresponding to the recess 61. The first sealing layer 13 is provided on one side of the light extraction layer 17, which is away from the substrate 1. Since the refractive index of the light extraction layer 17 is greater than that of the second electrode 6, the light emission efficiency can be improved. Also, the higher the refractive index of the light extraction layer 17, the higher the light emission efficiency.

[0179] Fourth display panel As shown in Figures 12 and 13, the display panel may include a substrate 1, a first insulating layer 2, a first electrode layer 3, a pixel definition layer 4, a light-emitting functional layer 5, and a second electrode 6.

[0180] Here, the first insulating layer 2 is provided on one side of the substrate 1.

[0181] The first electrode layer 3 is provided on the surface of the first insulating layer 2, which is separated from the substrate 1, and includes a plurality of first electrodes 31 distributed in an array.

[0182] The pixel definition layer 4 is provided on the surface of the first insulating layer 2, which is separated from the substrate 1, and exposes each of the first electrodes 31.

[0183] The light-emitting functional layer 5 covers the pixel definition layer 4, the first electrode 31 exposed by the pixel definition layer 4, and the first insulating layer 2.

[0184] The second electrode 6 covers the light-emitting functional layer 5 and includes a recess 61 and a plurality of smooth portions 62 separated by the recess 61. The orthographic projection of each smooth portion 62 on the first insulating layer 2 is located within each first electrode 31, and at least a portion of the recess 61 is recessed toward the side of the smooth portion 62 that is closer to the substrate 1. At least a portion of the orthographic projection of the recess 61 on the first insulating layer 2 is located within the pixel definition groove 41. The central portion of the recess 61 corresponding to the first projection 42 has a second projection 600. A sub-recess 610 is formed between the side surface of the second projection 600 and the side surface of the recess 61.

[0185] In this specification, the central portion of the recess 61 refers to any region on the bottom surface between the two side walls of the recess 61, and is not limited to a region between the two side walls of the recess 61 where the distance to these two side walls is equal.

[0186] In the display panel of the embodiment of the present invention, the regions of each first electrode 31 exposed by the pixel definition layer 4 and the corresponding light-emitting functional layer 5 and second electrode 6 can constitute light-emitting elements. The orthographic projection of the recess 61 of the second electrode 6 on the first insulating layer 2 is such that at least a portion is located outside the first electrode, thus preventing tip discharge between the recess 61 and the first electrode 31, and even preventing short circuits, which is advantageous in ensuring stable light emission of the light-emitting element. At the same time, light emission within the range of the recess 61 can be reduced, or even avoided, thereby reducing mutual interference of light emission from adjacent light-emitting elements.

[0187] The following describes in detail each part of the fourth display panel according to the embodiment of the present invention.

[0188] As shown in Figures 12 and 13, in some embodiments of the present invention, a plurality of drive transistors for displaying an image by driving each light-emitting element to emit light may be provided on the substrate 1. Taking one drive transistor with a top gate structure as an example, the display panel further includes a gate insulating layer 7, a gate electrode 8, a second insulating layer 9, and a first wiring layer 10. Here, the material of the substrate 1 may be a semiconductor material such as single-crystal silicon or polysilicon. The substrate 1 also includes an active region 101 and source electrodes 1011 and drain electrodes 1012 located at both ends of the active region 101. The gate insulating layer 7 covers the active region 101. The gate electrode 8 is provided on the surface of the gate insulating layer 7 away from the substrate 1. The material of the gate electrode 8 may include polysilicon. The second insulating layer 9 covers the gate electrode 8 and the substrate 1, and its material may include at least one of silicon oxide and silicon nitride. The first wiring layer 10 is provided on the surface of the second insulating layer 9 away from the substrate 1. Furthermore, the gate electrode 8, source electrode 1011, and drain electrode 1012 are all connected to the first wiring layer 10 via via holes filled with tungsten or other metals.

[0189] The display panel may further include a third insulating layer 11 and a second wiring layer 12. The third insulating layer 11 covers the first wiring layer 10 and the second insulating layer 9. The second wiring layer 12 is provided on the surface of the third insulating layer 11, away from the substrate 1. The specific pattern of the second wiring layer 12 may, but is not limited here, be connected to the first wiring layer 10 via via holes filled with tungsten or other metals.

[0190] As shown in Figures 12 and 13, the first insulating layer 2 is provided on one side of the substrate 1. In some embodiments of the present invention, the first insulating layer 2 can cover the second wiring layer 12. The first electrode 31 may be connected to the second wiring layer 12 via via holes filled with tungsten or other metals. The material of the first insulating layer 2 may include at least one of silicon nitride and silicon oxide, and of course, may further include other insulating materials. For example, the first insulating layer 2 can be planarized by a polishing process.

[0191] The first insulating layer 2 has a separation region 201. The separation region 201 allows for the division of multiple pixel regions 202 on the first insulating layer 2, and enables the distribution of each pixel region 202 in an array-like manner.

[0192] As shown in Figures 12 and 13, the first electrode layer 3 is provided on the surface of the first insulating layer 2, which is separated from the substrate 1, and includes a plurality of first electrodes 31 distributed in an array.

[0193] In some embodiments of the present invention, the orthographic projection of each first electrode 31 on the first insulating layer 2 is located within each pixel region 202 in a one-to-one correspondence. That is, the boundary of the orthographic projection of each first electrode 31 on the substrate 1 is located within the boundary of the orthographic projection of each pixel region 202 on the substrate 1 in a one-to-one correspondence. Only one first electrode 31 is installed on each pixel region 202. The pixel region 202 is separated by a separation region 201, and since the first electrode 31 is located on the pixel region 202, the separation region 201 is located outside the first electrode 31. The shape of the orthographic projection of each first electrode 31 on the first insulating layer 2 may be the same as the shape of the pixel region 202 on which it is located. The boundary of the first electrode 31 is located within the pixel region 202 on which it is located.

[0194] In a direction parallel to the substrate 1, at least one first electrode 31 may include an intermediate portion 310 and an edge portion 311 surrounding the intermediate portion 310. Here, the intermediate portion 310 has a flat structure. That is, the intermediate portion 310 is substantially parallel to the surface of the first insulating layer 2 away from the substrate 1.

[0195] In some embodiments of the present invention, the orthographic boundary of the intermediate portion 310 of each first electrode 31 on the substrate 1 may be located within the orthographic boundary of the pixel region 202 on the substrate 1 in which the intermediate portion 310 is located. That is, there is a non-zero gap L between the orthographic boundary of the intermediate portion 310 on the substrate 1 and the orthographic boundary of the pixel region 202 on the substrate 1 in which the intermediate portion 310 is located. Furthermore, this gap L is 0.15 μm or more. For example, this gap L may be 0.15 μm, 0.2 μm, 0.25 μm, etc.

[0196] The edge portion 311 may include a flat portion 3110 and an inclined portion 3111. Here, the flat portion 3110 is located on the surface of the first insulating layer 2 away from the substrate 1 and is positioned to surround the intermediate portion 310. The flat portion 3110 is also substantially parallel to the surface of the first insulating layer 2 away from the substrate 1. At the same time, the thickness of the flat portion 3110 is less than the thickness of the intermediate portion 310. In some embodiments of the present invention, there is a non-zero gap between the orthographic boundary of the flat portion 3110 on the substrate 1 and the orthographic boundary of the pixel region 202 on the substrate 1 where the flat portion 3110 is located. Of course, the orthographic boundary of the flat portion 3110 on the substrate 1 and the orthographic boundary of the pixel region 202 on the substrate 1 where the flat portion 3110 is located can overlap.

[0197] The inclined portion 3111 is connected between the intermediate portion 310 and the flat portion 3110. That is, the inclined portion 3111 surrounds the intermediate portion 310, and the flat portion 3110 surrounds the inclined portion 3111. In some embodiments of the present invention, the gradient of the inclined portion 3111 with respect to the surface of the first insulating layer 2 away from the substrate 1 is 30° or more. This gradient is the angle between the surface of the inclined portion 3111 and the surface of the first insulating layer 2 away from the substrate 1.

[0198] As shown in Figures 12 and 13, the first electrode 31 may include a first conductive layer 320, a second conductive layer 321, and a third conductive layer 322. The first conductive layer 320 is provided on the surface of the first insulating layer 2, away from the substrate 1. The second conductive layer 321 is provided on the surface of the first conductive layer 320, away from the substrate 1. The third conductive layer 322 is provided on the surface of the second conductive layer 321, away from the substrate 1, and extends to the first insulating layer 2 at a predetermined incline. This allows the first conductive layer 320 and the second conductive layer 321 to be covered and protected.

[0199] The intermediate portion 310 of the first electrode 31 includes the first conductive layer 320 and the second conductive layer 321, a region for positioning the third conductive layer 322 on the surface of the second conductive layer 321 away from the substrate 1, and the edge portion 311 includes a region where the edges of the first conductive layer 320 and the second conductive layer 321 are covered by the third conductive layer 322, i.e., a region extending toward the first insulating layer 2. Exemplarily, the material of the first conductive layer 320 may include titanium (Ti), the material of the second conductive layer 321 may include silver (Ag), and the material of the third conductive layer 322 may include indium tin oxide (ITO), and of course, other materials may be used.

[0200] As shown in Figures 12 and 13, the pixel definition layer 4 is made of an insulating material and is provided on the surface of the first insulating layer 2, which is separated from the substrate 1, together with the first electrode layer 3, and exposes at least a portion of the first electrode 31.

[0201] For example, the pixel definition layer 4 is provided with a plurality of apertures 401 that expose at least a portion of each intermediate portion 310 in a one-to-one correspondence. The first electrode 31 exposed by the pixel definition layer 4 can constitute a light-emitting element together with the corresponding light-emitting functional layer 5 and second electrode 6. In some embodiments of the present invention, the apertures 401 of the pixel definition layer 4 may be hexagonal or other polygonal structures. The first electrode 31 may also be polygonal in shape and may have the same shape as the apertures 401, and of course, the first electrode 31 may have other shapes. Specifically, refer to the first display panel shown in Figures 5 and 6.

[0202] As shown in Figures 12 and 13, the pixel definition layer 4 has pixel definition grooves 41 formed in the region corresponding to the separation region 201.

[0203] In the pixel definition layer 4 described above, the central part of the pixel definition groove 41 may have a first projection 42 that protrudes toward the direction away from the substrate 1. A sub-groove 40 is formed between the side wall of the first projection 42 and the side wall of the pixel definition groove 41. Compared to the case where the central part of the pixel definition groove 41 is flat, the first projection 42 can make the shape of the central part of the pixel definition groove 41 more complex, which is advantageous for blocking the charge generation layer or other film layers of the upper light-emitting functional layer 5, thereby preventing crosstalk between adjacent light-emitting elements. Furthermore, in order to block a part of the upper film layer by ensuring sufficient depth of the pixel definition groove 41, the central part of the pixel definition groove 41 can be located within the isolation region 201, that is, one or more points of the pixel definition groove 41 closest to the substrate 1 can be located on one side of the surface of the first insulating layer 2 away from the substrate 1 that is closer to the substrate 1. Correspondingly, the central part of the sub-groove 40 is located within the isolation region 201.

[0204] The detailed structure of the pixel definition layer 4 and its pixel definition groove 41 can be found in the embodiment of the third display panel described above, so a detailed explanation is omitted here.

[0205] As shown in Figures 12 and 13, the light-emitting functional layer 5 may be a continuous film layer, and at least a portion of it covers the intermediate portion 310 of each first electrode 31, that is, it covers the region exposed by the opening 401. At the same time, the light-emitting functional layer 5 also covers the pixel definition layer 4 and the region of the first insulating layer 2 that is not covered by the pixel definition layer 4 and the first electrode 31. When the light-emitting functional layer 5 is formed by vapor deposition or other process, the light-emitting functional layer 5 is recessed in the region corresponding to the pixel definition groove 41 in the direction toward the substrate 1.

[0206] In one embodiment of the present invention, referring to the light-emitting functional layer 5 of the third display panel, as shown in Figure 10, the light-emitting functional layer 5 includes a plurality of light-emitting unit layers 501, and the distribution method of the hole injection layer, hole transport layer, light-emitting layer, electron transport layer, and electron injection layer in each light-emitting unit layer 501 is the same. At the same time, a charge generation layer 502 is provided between two adjacent light-emitting unit layers 501, so that each light-emitting unit layer 501 is connected in series by the charge generation layer 502 to form a series-type OLED light-emitting element.

[0207] In some other embodiments of the present invention, the light-emitting functional layer 5 includes one light-emitting unit layer. The light-emitting unit layer includes a hole injection layer, a hole transport layer, a light-emitting layer, an electron transport layer, and an electron injection layer, which are sequentially stacked from the first electrode 31 along the direction away from the substrate 1.

[0208] Since the charge generation layer 502 does not easily cover the sidewalls of the sub-grooves 40 of the pixel definition groove 41, the charge generation layer 502 of the light-emitting element can be blocked by the pixel definition groove 41, thereby avoiding crosstalk between two adjacent light-emitting elements. Of course, the pixel definition groove 41 can also block the hole injection layer or other film layers, similarly preventing crosstalk.

[0209] As shown in Figures 12 and 13, the second electrode 6 covers the light-emitting functional layer 5 and includes a recess 61 and a plurality of smooth portions 62 separated by the recess 61. The orthographic projection of each smooth portion 62 on the first insulating layer 2 is located within each first electrode 31 in a one-to-one correspondence. The recess 61 is recessed toward the side of the smooth portion 62 that is closer to the substrate 1. The orthographic projection of the recess 61 on the first insulating layer 2 is located at least partially outside the first electrode 31. The central part of the recess 61 has a second projection 600. A sub-recess 610 is formed between the side surface of the second projection 600 and the side surface of the recess 61.

[0210] In some embodiments of the present invention, the orthographic projection of the recess 61 on the first insulating layer 2 is such that at least a portion of it is located within the pixel definition groove 41. Furthermore, the central portion of the recess 61 corresponding to the first projection 42 has a second projection 600. A sub-recess 610 is formed between the side surface of the second projection 600 and the side surface of the recess 61. The point of the sub-recess 610 closest to the substrate 1 is located within the sub-groove 40 in the orthographic projection on the first insulating layer 2.

[0211] Each smoothing portion 62 is distributed in an array and is positioned to correspond one-to-one with the intermediate portion 310 of each first electrode 31. That is, the orthographic projection of each smoothing portion 62 on the first insulating layer 2 is located within each first electrode 31 in a one-to-one correspondence. The smoothing portions 62 are parallel or approximately parallel to the intermediate portion 310.

[0212] The recesses 61 correspond to the regions of the first insulating layer 2 that are not covered by the intermediate portion 310 and are used to separate the smooth portions 62. The recesses 61 are recessed toward one side of the smooth portion 62 that is closer to the substrate 1. The recesses 61 are ring-shaped and there are multiple recesses. Each recess 61 surrounds each smooth portion 62 in a one-to-one correspondence. In other words, the recesses 61 are transition regions between two adjacent smooth portions 62.

[0213] The orthographic projection of the recess 61 on the substrate 1 is such that at least a portion of it is located outside the intermediate portion 310 of the first electrode 31. As a result, it does not directly face the thick intermediate portion 310, but directly faces areas other than the first electrode 31 or the thin edge portion 311. This reduces the risk of tip discharge and short circuits between the recess 61 and the first electrode 31, thereby improving the light emission stability of the light-emitting element.

[0214] In some embodiments of the present invention, in a cross-section perpendicular to the substrate 1, the orthographic projection of the lowest point of the recess 61 on the first insulating layer 2 is located outside the intermediate portion 310. For example, this lowest point corresponds to one of the inclined portion 3111 and the flat portion 3110 in order to avoid tip discharge between it and the intermediate portion 310. The lowest point of the recess 61 in a cross-section perpendicular to the substrate 1 is the point of the recess 61 closest to the first electrode 31 in a cross-section perpendicular to the substrate 1, i.e., the point furthest from the smooth portion 62.

[0215] The number of recesses 61 in a cross-section perpendicular to the substrate 1 may be multiple, and the lowest point in different cross-sections may be different. For example, this lowest point may be the point closest to the intermediate portion 310 of the first electrode 31 in the depth direction, or it may be another point in the depth direction, and is specifically determined by the position in the cross-section perpendicular to the substrate 1.

[0216] As shown in Figures 12 and 13, in some embodiments of the present invention, the recess 61 has two sides and includes a first side 611, a second side 612, and a second projection 600. Here, the first side 611 and the second side 612 are positioned opposite each other and connected to both sides of the second projection 600. At the same time, the first side 611 and the second side 612 can extend so as to contract toward the substrate 1. The first side 611 and the second side 612 may be curved or planar, but are not particularly limited thereto.

[0217] The second projection 600 may be a curved surface that protrudes away from the substrate 1. In some embodiments of the present invention, the second projection 600 of the recess 61 includes a first inclined surface 6131, a second inclined surface 6132, and a connecting surface 6133. Here, both the first inclined surface 6131 and the second inclined surface 6132 may be curved or flat. The connecting surface 6133 is located on one side away from the substrate 1 at the bottom edges of the first side surface 611 and the second side surface 612. The connecting surface 6133 is connected between the first inclined surface 6131 and the second inclined surface 6132. The first inclined surface 6131 is connected to the bottom edge of the first side surface 611 and forms one sub-recess 610. The second inclined surface 6132 is connected to the bottom edge of the second side surface 612 and forms another sub-recess 610.

[0218] In some embodiments of the present invention, the gradient of the first inclined surface 6131 relative to the intermediate portion 310 is not less than the gradient of the first side surface 611 relative to the intermediate portion 310. At the same time, the gradient of the second inclined surface 6132 relative to the intermediate portion 310 is not less than the gradient of the second side surface 612 relative to the intermediate portion 310.

[0219] In some embodiments of the present invention, the minimum thickness of the region of the second electrode 6 corresponding to the first side surface 611 and the second side surface 612 is greater than the minimum thickness of the region of the second electrode 6 corresponding to the first inclined surface 6131 and the second inclined surface 6132.

[0220] Furthermore, as shown in Figures 12 and 13, in some embodiments of the present invention, the depth of the recess 61 is less than twice the maximum thickness of the second electrode 6. For example, the maximum thickness of the second electrode 6 is 90 nm, and the depth of the recess 61 is less than 180 nm, such as 120 nm, 100 nm, 80 nm, 70 nm, 60 nm, 50 nm, 40 nm, etc. The depth of the recess 61 refers to the maximum depth of the recess 61. That is, in a direction perpendicular to the substrate 1, it refers to the distance between the point of the recess 61 closest to the substrate 1 and the surface of the smooth portion 62 away from the substrate 1.

[0221] In some embodiments of the present invention, as shown in Figures 12 and 13, the orthographic projection of each recess 61 on the first insulating layer 2 surrounds the outside of the intermediate portion 310 of one first electrode 31. The minimum distance between the second projection 600 of the recess 61 and the adjacent intermediate portion 310 of the first electrode 31 (the distance between the point of the recess 61 closest to the intermediate portion 310 and the intermediate portion 310 in a direction perpendicular to the substrate 1) is 70% or more of the combined thickness of the smooth portion 62 and the light-emitting functional layer 5. The combined thickness of the smooth portion 62 and the light-emitting functional layer 5 is the sum of the thicknesses of the smooth portion 62 and the light-emitting functional layer 5. For example, if the combined thickness of the smooth portion 62 and the light-emitting functional layer 5 is approximately 365 nm, the minimum distance between the center of the recess 61 and the adjacent intermediate portion 310 of the first electrode 31 in a direction perpendicular to the substrate 1 is approximately 255 nm.

[0222] Furthermore, the maximum distance between the central part of the recess 61 and the intermediate part 310 of the adjacent first electrode 31 (the distance between the point of the recess 61 closest to the intermediate part 310 and the intermediate part 310 in a direction perpendicular to the substrate 1) is at most 400 nm, and this maximum value is 450 nm or less.

[0223] As shown in Figures 12 and 13, in some embodiments of the present invention, the pixel definition layer 4 may include a separation portion 400 and an extension portion 410. Here, the separation portion 400 is located in a region of the first insulating layer 2 that is not covered by the first electrode 31, i.e., in a region other than the first electrode 31. The pixel definition groove 41 is provided in the separation portion 400. The extension portion 410 is connected to the separation portion 400 and extends to the surface of the first electrode 31 away from the substrate 1, but does not completely cover the first electrode 31. For example, the extension portion 410 extends along the circumferential direction of the first electrode 31 to the circumferential surface of the intermediate portion 310 away from the substrate 1, but does not completely cover the intermediate portion 310.

[0224] Since the extension 410 covers the boundary of the first electrode 31, the region of the second electrode 6 corresponding to the extension 410 further has a projection 63 that protrudes away from the substrate 1. The smooth portion 62 is connected to the recess 61 via the projection 63. The orthographic projection of the projection 63 on the substrate 1 and the orthographic projection of the extension 410 on the substrate 1 overlap at least partially.

[0225] If the thicknesses of two adjacent first electrodes 31 are different, the distance between the surface of the extension 410 on the two first electrodes 31 that are farther from the substrate 1 and the substrate 1 will be different. In the two protrusions 63 connected on both sides of the recess 61, the distance between the point of the one protrusion 63 furthest from the substrate 1 and the substrate 1 is different from the distance between the point of the other protrusion 63 furthest from the substrate 1 and the substrate 1.

[0226] Furthermore, as shown in Figures 12 and 13, this display panel may further include a first sealing layer 13, a color filter layer 14, a second sealing layer 15, and a transparent cover plate 16.

[0227] Here, the first sealing layer 13 can cover the second electrode 6. For example, the first sealing layer 13 may include two inorganic layers and an organic layer located between the two inorganic layers.

[0228] In some embodiments of the present invention, the first sealing layer 13 can form a pit 1301 by recessing the region corresponding to the recess 61. Of course, if the thickness of the first sealing layer 13 is thick, the surface of the first sealing layer 13 away from the substrate 1 can remain substantially flat.

[0229] The color filter layer 14 is provided on one side of the first sealing layer 13, away from the second electrode 6. The color filter layer 14 also includes a filter region that corresponds one-to-one with each first electrode 31. The color of the filter region may be, for example, red, blue, and green.

[0230] The second sealing layer 15 can cover the color filter layer 14, and its structure may be the same as that of the first sealing layer 13.

[0231] The transparent cover plate 16 can cover the second sealing layer 15, and its material may be glass or another material.

[0232] Furthermore, in some embodiments of the present invention, as shown in Figures 12 and 13, the fourth display panel may further include a light extraction layer 17. The light extraction layer 17 covers the surface of the second electrode 6, which is away from the substrate 1, and is recessed in the region corresponding to the recess 61. The first sealing layer 13 is provided on one side of the light extraction layer 17, which is away from the substrate 1. The refractive index of the light extraction layer 17 is formed to be greater than that of the second electrode 6, so that the light emission efficiency can be improved. Also, the higher the refractive index of the light extraction layer 17, the higher the light emission efficiency. In the display panel described in any one of the above items, the two side walls of the pit are extended and connected so as to shrink in the direction toward the substrate.

[0233] According to embodiments of the present invention, a method for manufacturing a display panel is further provided. This display panel may be the first display panel described above. As shown in Figure 14, this manufacturing method includes steps S110 to S160.

[0234] In step S110, a first insulating layer is formed on one side of the substrate.

[0235] In step S120, a plurality of separation grooves are formed on the surface of the first insulating layer, which is separated from the substrate, so as to divide the plurality of pixel regions that are distributed in an array.

[0236] In step S130, a first electrode layer including a plurality of first electrodes is formed on the surface of the first insulating layer away from the substrate, the orthographic projection of each of the first electrodes on the first insulating layer is located within each pixel region in a one-to-one correspondence, the first electrode includes a flat intermediate portion and an edge portion surrounding the intermediate portion, the edge portion includes a flat portion surrounding the intermediate portion and an inclined portion connected between the intermediate portion and the flat portion, and the thickness of the flat portion is less than the thickness of the intermediate portion.

[0237] In step S140, a pixel definition layer is formed on the surface of the first insulating layer away from the substrate, and the pixel definition layer exposes at least a portion of the intermediate area.

[0238] In step S150, a light-emitting functional layer is formed, and the light-emitting functional layer covers the pixel definition layer, the intermediate portion exposed by the pixel definition layer, and the first insulating layer.

[0239] In step S160, a second electrode covering the light-emitting functional layer is formed.

[0240] Details of each layer structure and beneficial effects of the manufacturing method according to the embodiments of the present invention have been described in the above-described embodiment of the first display panel, so a detailed explanation is omitted here.

[0241] According to embodiments of the present invention, a method for manufacturing a display panel is further provided. The display panel may be the first display panel described above. As shown in Figure 15, the manufacturing method includes steps S210 to S250.

[0242] In step S210, a first insulating layer is formed on one side of the substrate.

[0243] In step S220, a first electrode layer including a plurality of first electrodes and a separation groove are formed on the surface of the first insulating layer away from the substrate, the first electrode includes a flat intermediate portion and an edge portion surrounding the intermediate portion, the edge portion includes a flat portion surrounding the intermediate portion and an inclined portion connected between the intermediate portion and the flat portion, the thickness of the flat portion is less than the thickness of the intermediate portion, the separation groove divides a plurality of pixel regions distributed in an array on the first insulating layer, and the orthogonal projection of each first electrode on the first insulating layer is located within each pixel region in a one-to-one correspondence.

[0244] In step S230, a pixel definition layer is formed on the surface of the first insulating layer away from the substrate, and the pixel definition layer exposes at least a portion of the intermediate area.

[0245] In step S240, a light-emitting functional layer is formed, and the light-emitting functional layer covers the pixel definition layer, the intermediate portion exposed by the pixel definition layer, and the first insulating layer.

[0246] In step S250, a second electrode covering the light-emitting functional layer is formed.

[0247] In the manufacturing method of this embodiment, a conductive layer can be formed first on the surface of a first insulating layer away from the substrate. The conductive layer is then patterned using a single grayscale masking process to obtain the first electrode layer. Simultaneously, separation grooves can also be formed using this single grayscale masking process. Compared to a method in which the first electrode layer and separation grooves are formed separately using two masking processes, the manufacturing process for the display panel can be simplified.

[0248] According to embodiments of the present invention, a method for manufacturing a display panel is further provided. The display panel may be the second display panel described above. As shown in Figure 16, the manufacturing method includes steps S310 to S340.

[0249] In step S310, a first insulating layer is formed on one side of the substrate.

[0250] In step S320, a first electrode layer including a plurality of first electrodes is formed on the surface of the first insulating layer away from the substrate, the first electrode includes a flat intermediate portion and an edge portion surrounding the intermediate portion, the edge portion includes a flat portion surrounding the intermediate portion and an inclined portion connected between the intermediate portion and the flat portion, and the thickness of the flat portion is less than the thickness of the intermediate portion.

[0251] In step S330, a light-emitting functional layer is formed that covers at least a portion of the intermediate portion.

[0252] In step S340, a second electrode is formed covering the light-emitting functional layer, the second electrode includes a recess and a plurality of smooth portions separated by the recess, the orthographic projection of each smooth portion on the first insulating layer is located within each first electrode in a one-to-one correspondence, the recess is recessed toward one side of the smooth portion closer to the substrate, and the orthographic projection of the recess on the first insulating layer is located at least partially outside the intermediate portion.

[0253] The details of each layer structure and beneficial effects of the manufacturing method according to the embodiments of the present invention have been described in the above-described embodiment of the second display panel, so a detailed explanation is omitted here.

[0254] According to embodiments of the present invention, a method for manufacturing a display panel is further provided. The display panel may be the third display panel described above. As shown in Figure 17, the method for manufacturing a display panel includes steps S410 to S450.

[0255] In step S410, a first insulating layer is formed on one side of the substrate, and the first insulating layer has a plurality of pixel regions distributed in an array and a separation region that separates the pixel regions.

[0256] In step S420, a first electrode layer including a plurality of first electrodes is formed on the surface of the first insulating layer away from the substrate, and the orthographic projection of each of the first electrodes on the first insulating layer is located within each of the pixel regions.

[0257] In step S430, a pixel definition layer is formed on the surface of the first insulating layer away from the substrate, and each of the first electrodes is exposed. The pixel definition layer has a pixel definition groove formed in the region corresponding to the separation region, and the central part of the pixel definition groove has a first projection that protrudes toward the direction away from the substrate, and a sub-groove is formed between the side wall of the first projection and the side wall of the pixel definition groove.

[0258] In step S440, a light-emitting functional layer is formed, and the light-emitting functional layer covers the pixel definition layer and the first electrode exposed by the pixel definition layer.

[0259] In step S450, a second electrode covering the light-emitting functional layer is formed.

[0260] The details of each layer structure and beneficial effects of the manufacturing method according to the embodiments of the present invention have been described in the above-described embodiment of the third display panel, so a detailed explanation is omitted here.

[0261] According to embodiments of the present invention, a method for manufacturing a display panel is further provided. The display panel may be the fourth display panel described above. As shown in Figure 18, the method for manufacturing a display panel includes steps S510 to S550.

[0262] In step S510, a first insulating layer is formed on one side of the substrate.

[0263] In step S520, a first electrode layer is formed on the surface of the first insulating layer, which is separated from the substrate, and the first electrode layer includes a plurality of first electrodes.

[0264] In step S530, a pixel definition layer is formed on the surface of the first insulating layer away from the substrate, and the pixel definition exposes each of the first electrodes.

[0265] In step S540, a light-emitting functional layer is formed, and the light-emitting functional layer covers the pixel definition layer and the first electrode exposed by the pixel definition layer.

[0266] In step S550, a second electrode covering the light-emitting functional layer is formed, the second electrode including a recess and a plurality of smooth portions separated by the recess, the orthographic projection of each smooth portion on the first insulating layer is located within each first electrode, at least a portion of the recess is recessed toward the side of the smooth portion toward the substrate, at least a portion of the orthographic projection of the recess on the first insulating layer is located outside the first electrode, the central portion of the recess has a second projection, and a sub-recess is formed between the side surface of the second projection and the side surface of the recess.

[0267] The details of each layer structure and beneficial effects of the manufacturing method according to the embodiments of the present invention have been described in the above-described embodiment of the fourth display panel, so a detailed description is omitted here.

[0268] Although the various steps of the manufacturing method in the present invention are described in a specific order in the drawings, this does not require or imply that these steps must be performed in this specific order, or that all the steps shown must be performed, in order to achieve the desired results. Additionally or alternatively, some steps may be omitted, multiple steps may be combined into one step, and / or one step may be broken down into multiple steps.

[0269] According to embodiments of the present invention, a display device is further provided. The display device may include any one of the various embodiments of the first, second, third, and fourth display panels described above, and a detailed description of the specific structure and beneficial effects can be found in the embodiments described above, so a detailed description is omitted here. The display device of the present invention can be used in electronic devices such as mobile phones, tablet PCs, and televisions, which are not listed here.

[0270] Those skilled in the art can readily obtain other embodiments of the present invention through understanding the specification and practicing the inventions described herein. The present invention includes any modifications, uses, or adaptive variations of the present invention, such modifications, uses, or adaptive variations, in accordance with the general principles of the present invention, and include prior art knowledge or common technical means not disclosed herein. The specification and examples are merely illustrative, and the true scope and spirit of the present invention are indicated by the following claims.

[0271] Furthermore, the present invention may also preferably include the following examples. [Section 1] It is a display panel, circuit board and A first insulating layer provided on one side of the substrate; A first electrode layer provided on the surface of the first insulating layer away from the substrate and including a plurality of first electrodes; A pixel definition layer provided on the surface of the first insulating layer away from the substrate and exposing each of the first electrodes; A light-emitting functional layer covering the pixel definition layer and the first electrode exposed by the pixel definition layer; A second electrode covering the light-emitting functional layer, comprising: The first insulating layer has a plurality of pixel regions distributed in an array and a separation region separating the pixel regions; The orthographic projection of each first electrode on the first insulating layer is located within each pixel region; In the pixel definition layer, pixel definition grooves are formed in the region corresponding to the separation region; The central portion of the pixel definition groove has a first protrusion protruding in a direction away from the substrate; Sub-grooves are formed between the side wall of the first protrusion and the side wall of the pixel definition groove A display panel. [Item 2] The two side walls of the first protrusion are inclined surfaces expanding toward the substrate; The two side walls of the pixel definition groove are inclined surfaces shrinking toward the substrate The display panel according to Item 1. [Item 3] The gradient of the side wall of the first protrusion is different from the gradient of the side wall of the pixel definition groove The display panel according to Item 1. [Item 4] The thickness of the first protrusion is smaller than the depth of the pixel definition groove The display panel according to Item 1. [Item 5] The orthographic projection of the central portion of the pixel definition groove on the first insulating layer is located within the separation region The display panel according to Item 1. [Item 6] The pixel definition layer includes a separation portion and an extension portion; The separation portion is located in a region other than the first electrode, and the pixel definition groove is provided in the separation portion The extension is connected to the separation portion and extends to the surface of the first electrode, which is separated from the substrate, but does not completely cover the first electrode. The display panel described in item 1. [Section 7] The width of the extension covering any one of the first electrodes is smaller than the width of the separation portion located between two adjacent first electrodes. The display panel described in item 6. [Section 8] At least two of the sequential first electrodes have different thicknesses. The display panel described in item 1. [Section 9] The maximum depth of the pixel definition groove is not greater than 60% of the sum of the thicknesses of the light-emitting functional layer and the first electrode. The display panel described in item 1. [Section 10] It is a display panel, circuit board and A first insulating layer provided on one side of the substrate, A first electrode layer is provided on the surface of the first insulating layer, which is separated from the substrate, and includes a plurality of first electrodes. A pixel definition layer is provided on the surface of the first insulating layer, which is separated from the substrate, and which exposes each of the first electrodes. A light-emitting functional layer covering the pixel definition layer and the first electrode exposed by the pixel definition layer, A second electrode covering the light-emitting functional layer and including a recess and a plurality of smooth portions separated by the recess, The orthographic projection of each smooth portion on the first insulating layer is located within each first electrode. At least a portion of the recess is recessed toward one side of the smooth portion that is closer to the substrate, The orthographic projection of the recess on the first insulating layer is such that at least a portion of it is located outside the first electrode. The central part of the recess has a second projection, A sub-recess is formed between the side surface of the second projection and the side surface of the recess. Display panel. [Section 11] The first insulating layer is A plurality of pixel regions distributed in an array, and a separation region for separating the pixel regions. The orthographic projection of each first electrode on the first insulating layer is located within each first electrode. The pixel definition layer exposes each first electrode, and pixel definition grooves are formed in a region corresponding to the separation region. A central portion of the pixel definition groove has a first protrusion protruding in a direction away from the substrate. A sub-groove is formed between a side wall of the first protrusion and a side wall of the pixel definition groove. The orthographic projection of the recess on the first insulating layer is at least partially located within the pixel definition groove. The display panel according to item 10. [Item No. 12] The point of the sub-recess closest to the substrate is located within the sub-groove in the orthographic projection on the first insulating layer. The display panel according to item 11. [Item No. 13] The recess includes a first side surface and a second side surface. The first side surface and the second side surface are oppositely connected to both sides of the second protrusion. The first side surface and the second side surface shrink toward the substrate. The display panel according to item 11. [Item No. 14] The second protrusion includes a first inclined surface, a second inclined surface, and a connection surface connected between the first inclined surface and the second inclined surface. The connection surface is located on a side away from the substrate at the bottom edges of the first side surface and the second side surface. The first inclined surface is connected to the bottom edge of the first side surface. The second inclined surface is connected to the bottom edge of the second side surface. The display panel according to item 13. [Item No. 15] The minimum thickness of the region of the second electrode corresponding to the first side surface and the second side surface is greater than the minimum thickness of the region of the second electrode corresponding to the first inclined surface and the second inclined surface. The display panel according to item 14. [Section 16] The pixel definition layer includes a separation portion and an extension portion, The separation portion is located in a region other than the first electrode, and at least a portion of the pixel definition groove is provided in the separation portion. The extension is connected to the separation portion and extends to the surface of the first electrode, which is separated from the substrate, and does not completely cover the first electrode. The second electrode further has a projection that protrudes in a direction away from the substrate, The smooth portion is connected to the recess via the projection, The orthographic projection of the protrusion on the substrate and the orthographic projection of the extension on the substrate overlap at least partially. The display panel described in item 11. [Section 17] In the two protrusions connected to both sides of the recess, the distance between the point of the protrusion furthest from the substrate and the substrate is different from the distance between the point of the other protrusion furthest from the substrate and the substrate. The display panel described in item 16. [Section 18] The aforementioned display panel is The first sealing layer further includes covering the second electrode and forming a pit in the region corresponding to the recess. The display panel described in item 10. [Section 19] The two side walls of the pit are connected and contract in the direction toward the substrate. The display panel described in item 18. [Section 20] A method for manufacturing a display panel, The steps include forming a first insulating layer on one side of the substrate, The steps include forming a first electrode layer including a plurality of first electrodes on the surface of the first insulating layer, which is separated from the substrate, The steps include forming a pixel definition layer on the surface of the first insulating layer, which is separated from the substrate, and exposing each of the first electrodes, The steps include forming a light-emitting functional layer, The step includes forming a second electrode that covers the light-emitting functional layer, The first insulating layer has a plurality of pixel regions distributed in an array and a separation region that separates the pixel regions. The orthographic projection of each of the first electrodes on the first insulating layer is located within each of the pixel regions. The aforementioned pixel definition layer has pixel definition grooves formed in the region corresponding to the separation region. The central portion of the pixel definition groove has a first projection that protrudes toward the direction away from the substrate, A sub-groove is formed between the side wall of the first projection and the side wall of the pixel definition groove. The light-emitting functional layer covers the pixel definition layer and the first electrode exposed by the pixel definition layer. A method for manufacturing a display panel. [Section 21] A method for manufacturing a display panel, The steps include forming a first insulating layer on one side of the substrate, The steps include forming a first electrode layer including a plurality of first electrodes on the surface of the first insulating layer, which is separated from the substrate, The steps include forming a pixel definition layer on the surface of the first insulating layer, away from the substrate, that exposes each of the first electrodes, The steps include forming a light-emitting functional layer, The step includes forming a second electrode that covers the light-emitting functional layer, The light-emitting functional layer covers the pixel definition layer and the first electrode exposed by the pixel definition layer. The second electrode includes a recess and a plurality of smooth portions separated by the recess. The orthographic projection of each smooth portion on the first insulating layer is located within each first electrode. At least a portion of the recess is recessed toward one side of the smooth portion that is closer to the substrate, The orthographic projection of the recess on the first insulating layer is such that at least a portion of it is located outside the first electrode. The central part of the recess has a second projection, A sub-recess is formed between the side surface of the second projection and the side surface of the recess. A method for manufacturing a display panel. [Section 22] Includes a display panel as described in any one of items 1 to 19. Display device. [Explanation of Symbols]

[0272] 1 circuit board 10 1st wiring layer 11. Third insulating layer 12 2nd wiring layer 13. First sealing layer 1301 Pit 14 Color Filter Layers 15. Second sealing layer 16 Transparent cover plates 17 Light extraction layer 101 Active region 1011 Source electrode 1012 Drain electrode 2 flat layer 201 Separation groove 2011 side wall 2012 Bottom Wall 202 pixel area 3 First electrode layer 31 1st electrode 310 Middle section 311 Edge section 3110 Flat area 3111 Inclined section 320 First conductive layer 321 Second conductive layer 322 Third conductive layer 4 Pixel Definition Layer 401 Aperture 41 Pixel Definition Grooves 42 1st protrusion 40 Sub-grooves 400 Separation part 410 Extension 5. Light-emitting functional layer 501 Light-emitting unit layer 502 Charge generation layer 6 Second electrode 61 recess 611 1st side 612 Second side 613 Bottom 6131 1st slope 6132 2nd slope 6133 Connection surface 600 2nd protrusion 62 Smooth section 63 Protrusion 7. Gate Insulation Layer 8 gates 9. Second insulating layer

Claims

1. It is a display panel, circuit board and A first insulating layer provided on one side of the substrate, A first electrode layer is provided on the surface of the first insulating layer away from the substrate, and includes a plurality of first electrodes, A pixel definition layer is provided on the surface of the first insulating layer away from the substrate, exposing each of the first electrodes, A light-emitting functional layer covering the pixel definition layer and the first electrode exposed by the pixel definition layer, It includes a second electrode covering the light-emitting functional layer, The surface of the first insulating layer away from the substrate is provided with a plurality of separation grooves for dividing a plurality of pixel regions, each of which is distributed in an array, and the separation groove includes two opposing side walls and a bottom wall connected between the two side walls, and the contour of the bottom wall is a curved surface that protrudes away from the substrate. The orthographic projection of each of the first electrodes onto the first insulating layer is located within each of the pixel regions, The height to which the bottom wall protrudes is less than the depth of the separation groove. Display panel.

2. The contour of the bottom wall is in the shape of an arc, a parabola, or a wavy line. The display panel according to claim 1.

3. The light-emitting functional layer is recessed in the region corresponding to the separation groove in the direction approaching the substrate, and the second electrode is recessed in the recessed portion of the light-emitting functional layer to form a recess, the recess includes a first side surface, a second side surface and a bottom surface, the first side surface and the second side surface are set opposite each other and connected to both sides of the bottom surface, the bottom surface is a curved surface that protrudes in the direction away from the substrate The display panel according to claim 1.

4. The contour of the bottom surface of the recess is in the shape of an arc, a parabola, or a wavy line. The display panel according to claim 3.

5. The height to which the bottom wall protrudes is smaller than the height to which the bottom surface protrudes. The display panel according to claim 3.

6. The curvature of the bottom surface is greater than the curvature of the bottom wall. The display panel according to claim 3.

7. The substrate is provided with a plurality of drive transistors, and the region of the substrate corresponding to the drive transistors includes an active region and source electrodes and drain electrodes located at both ends of the active region, and there exists an overlapping region between the orthographic projection of the bottom wall or bottom surface onto the substrate and the orthographic projection of the source electrodes onto the substrate. The display panel according to claim 1.

8. The maximum depth of the separation groove is 30% or more of the sum of the thickness of the light-emitting functional layer and the first electrode. The display panel according to claim 1.

9. The maximum depth of the separation groove is 60% or less of the sum of the thicknesses of the light-emitting functional layer and the first electrode. The display panel according to claim 1.

10. The maximum distance between the two side walls is 0.2 μm to 0.7 μm. The display panel according to claim 1.

11. The distance between the two side walls gradually decreases in the direction toward the bottom wall. The display panel according to claim 3.

12. The slope of the two side walls is 70° or greater. The display panel according to claim 10.

13. The maximum depth of the separation groove is 1000 to 3000 Å. The display panel according to claim 1.

14. The height to which the bottom wall protrudes is greater than the thickness of the pixel definition layer. The display panel according to claim 1.

15. The depth of the separation groove is smaller than the thickness of the first electrode. The display panel according to claim 1.

16. The recess is provided on the side of the first electrode that is away from the substrate. The display panel according to claim 3.

17. Includes a display panel according to any one of claims 1 to 16 Display device.

Images