Processing device for piezoelecric element and ultrasonic sensor

Abstract

According to the present invention, a reflection wave signal obtained by the reflection, by an object, of a transmission wave signal from a piezoelectric element is received and a reception intensity signal is generated. A signal for comparison is generated of which the signal value changes over time from a transmission start time point of the transmission wave signal. A signal output circuit operates in any among a plurality of output modes. The plurality of output modes include: a first output mode in which a signal based on a comparison result of the reception intensity signal and the signal for comparison is output from a communication terminal; and a second output mode in which a plurality of output target signals are output from the communication terminal while being switched. The plurality of output target signals include, as two output target signals, a signal indicating the waveform of the reception intensity signal, and a signal indicating the waveform of the signal for comparison.

Description

Piezoelectric element processing device and ultrasonic sensor

[0001] The present disclosure relates to a processing device for a piezoelectric element and an ultrasonic sensor.

[0002] 2. Description of the Related Art A technique is widely used in which a piezoelectric element transmits a transmission wave signal and receives a reflected wave signal from the object, thereby detecting the distance to the object.

[0003] JP 2018-96752 A

[0004] In a device equipped with a receiving circuit that receives a reflected wave signal, it is possible to accurately detect the distance to an object by performing appropriate signal processing on the received signal. In order to accurately detect the distance to an object, work including parameter adjustment is required at the development or evaluation stage of the device. Technology is needed to make the development or evaluation work of the device more efficient.

[0005] The present disclosure aims to provide a processing device for piezoelectric elements and an ultrasonic sensor that contribute to improving the efficiency of development or evaluation.

[0006] The processing device for piezoelectric elements according to the present disclosure comprises a transmitting circuit configured to drive a piezoelectric element to transmit a transmission wave signal from the piezoelectric element; a receiving circuit configured to receive a reflected wave signal of the transmission wave signal by an object using the piezoelectric element or another piezoelectric element; a receiving intensity signal generating circuit configured to generate a receiving intensity signal representing the strength of the signal received by the receiving circuit; a comparison signal generating circuit configured to generate a comparison signal whose signal value changes over time from the start time of transmission of the transmission wave signal; a comparison circuit configured to compare the receiving intensity signal with the comparison signal; and a signal output circuit configured to be able to output a signal from a communication terminal, wherein the signal output circuit operates in one of a plurality of output modes, the plurality of output modes including a first output mode in which a signal based on the comparison result of the comparison circuit is output from the communication terminal, and a second output mode in which a plurality of output target signals are output from the communication terminal while switching between them, and the plurality of output target signals include, as two output target signals, a signal representing the waveform of the receiving intensity signal and a signal representing the waveform of the comparison signal.

[0007] According to the present disclosure, it is possible to provide a processing device for a piezoelectric element and an ultrasonic sensor that contribute to improving the efficiency of development or evaluation.

[0008] FIG. 1 is an overall configuration diagram of an ultrasonic sensor according to an embodiment of the present disclosure. FIG. 2 is an external perspective view of a piezoelectric element control IC according to an embodiment of the present disclosure. FIG. 3 is a diagram for explaining an overview of the operation of an ultrasonic sensor according to an embodiment of the present disclosure. FIG. 4 is an overall configuration diagram of an ultrasonic sonar system according to an embodiment of the present disclosure. FIG. 5 is a diagram showing the relationship between the operating state of the piezoelectric element control IC and the communication state of the piezoelectric element control IC and an upper device according to an embodiment of the present disclosure. FIG. 6 is an explanatory diagram of transmission and reception operations by an ultrasonic sensor according to an embodiment of the present disclosure. FIG. 7 is a diagram showing the internal configuration of a transmission circuit according to an embodiment of the present disclosure. FIG. 8 is a diagram showing the internal configuration of a reception processing block according to an embodiment of the present disclosure. FIG. 9 is a diagram showing multiple signal waveforms in the reception processing block during measurement operation according to an embodiment of the present disclosure. FIG. 10 is a diagram showing an example of the relationship between a filter circuit, a DAC, and a switching output circuit according to an embodiment of the present disclosure. FIG. 11 is an explanatory diagram of a first reference configuration. FIG. 12 is an explanatory diagram of a second reference configuration. FIG. 13 is a diagram showing how two types of output target signals are alternately switched and output according to an embodiment of the present disclosure. FIG. 14 is a schematic waveform diagram of an IC output signal during the execution of a measurement operation according to a first example belonging to an embodiment of the present disclosure. FIG. 15 is an enlarged waveform diagram of an IC output signal during the execution of a measurement operation according to a first example belonging to an embodiment of the present disclosure. FIG. 16 is a waveform diagram of a selection designation signal according to a first example belonging to an embodiment of the present disclosure. FIG. 17 is a schematic waveform diagram of an IC output signal during the execution of multiple measurement operations according to a second example belonging to an embodiment of the present disclosure. FIG. 18 is a diagram showing an example waveform that can be displayed on an oscilloscope according to a second example belonging to an embodiment of the present disclosure. FIG. 19 is a waveform diagram of a selection designation signal according to a second example belonging to an embodiment of the present disclosure. FIG. 20 is a diagram showing how three types of output target signals are alternately switched and output according to a third example belonging to an embodiment of the present disclosure. FIG. 21 is a diagram showing how a receive-only piezoelectric element is connected to a receiving circuit according to a sixth example belonging to an embodiment of the present disclosure.

[0009] Hereinafter, examples of embodiments of the present disclosure will be described in detail with reference to the drawings. In each of the drawings, the same parts are designated by the same reference numerals, and duplicate descriptions of the same parts will be omitted as a general rule. In this specification, for the sake of simplicity, symbols or signs referring to information, signals, physical quantities, functional units, circuits, elements, or components may be used, and the names of the information, signals, physical quantities, functional units, circuits, elements, or components corresponding to the symbols or signs may be omitted or abbreviated.

[0010] First, some terms used in describing the embodiments of the present disclosure will be explained. IC is an abbreviation for Integrated Circuit. Ground refers to a reference conductive part having a reference potential of 0 V (zero volts), or refers to the potential of 0 V itself. The reference conductive part may be formed using a conductor such as metal. The potential of 0 V is sometimes referred to as ground potential. In the embodiments of the present disclosure, a voltage indicated without a particular reference represents a potential seen from ground.

[0011] A level refers to the level of potential, and for any given signal or voltage, a high level has a higher potential than a low level. For any given signal or voltage, when the signal or voltage is at a high level, strictly speaking, the signal or voltage level is at a high level, and when the signal or voltage is at a low level, strictly speaking, the signal or voltage level is at a low level. A level for a signal may be expressed as a signal level, and a level for a voltage may be expressed as a voltage level.

[0012] Unless otherwise specified, the connection between a plurality of parts forming a circuit, such as any circuit element, wiring, or node, may be understood to refer to an electrical connection.

[0013] 1 shows the overall configuration of an ultrasonic sensor 1 according to an embodiment of the present disclosure. The ultrasonic sensor 1 includes a piezoelectric element control IC 2 (hereinafter, referred to as IC2), a piezoelectric element 3, a transformer TR, and a resistor R T and capacitor C T, C1 and C2. IC2 is an example of a piezoelectric element processing device (or piezoelectric element control device). IC2 includes a transmitting circuit 10, a receiving processing block 30 including a receiving circuit 31, and a control circuit 50. A ceramic vibrator (ceramic piezoelectric element) formed from ceramic can be used as the piezoelectric element 3, but other types of piezoelectric elements may also be used.

[0014] FIG. 2 is a perspective view of IC2. IC2 is an electronic component including a semiconductor chip having a semiconductor integrated circuit formed on a semiconductor substrate, a housing (package) that houses the semiconductor chip, and multiple external terminals exposed to the outside of IC2 from the housing. IC2 is formed by encapsulating the semiconductor chip in a housing (package) made of resin. Note that the number of external terminals of IC2 and the type of housing of IC2 shown in FIG. 2 are merely examples and can be designed as desired. FIG. 1 shows the multiple external terminals, including a power supply terminal PW, a ground terminal PGND, output terminals DRV1 and DRV2, input terminals IN1 and IN2, and a communication terminal CM. Other external terminals are also provided on IC2.

[0015] A power supply voltage VCC is supplied to the power supply terminal PW. Each circuit within IC2 is driven by the power supply voltage VCC. The power supply voltage VCC has a predetermined positive DC voltage value. An internal power supply circuit (not shown) that generates another internal power supply voltage from the power supply voltage VCC may be provided within IC2. The ground terminal PGND is connected to ground.

[0016] The transformer TR has a primary coil L1 and a secondary coil L2, which are magnetically coupled while being electrically insulated from each other. A first end of the primary coil L1 is connected to the output terminal DRV1, and a second end of the primary coil L1 is connected to the output terminal DRV2. A power supply terminal PW is connected to the midpoint (center tap) of the primary coil L1 via a resistor R0. More specifically, the power supply terminal PW is connected to one end of the resistor R0, and the other end of the resistor R0 is connected to the midpoint of the primary coil L1 and to ground via a capacitor C0.

[0017] The piezoelectric element 3 is connected in parallel to the secondary coil L2. That is, a first end of the secondary coil L2 is connected to a first end of the piezoelectric element 3, and a second end of the secondary coil L2 is connected to a second end of the piezoelectric element 3 and is also connected to ground. In addition, a capacitor C T and resistor R T are connected to the input terminal IN1. Furthermore, a first end of the secondary coil L2 and a first end of the piezoelectric element 3 are connected to the input terminal IN1 via a capacitor C1. That is, the first end of the secondary coil L2 and the first end of the piezoelectric element 3 are connected to the first end of the capacitor C1, and the second end of the capacitor C1 is connected to the input terminal IN1. Furthermore, a second end of the secondary coil L2 and a second end of the piezoelectric element 3 are connected to the input terminal IN2 via a capacitor C2. That is, the second end of the secondary coil L2 and the second end of the piezoelectric element 3 are connected to the first end of the capacitor C2, and the second end of the capacitor C2 is connected to the input terminal IN2. Note that the capacitors C1 and C2 may be built into IC2.

[0018] An overview of the operation of the ultrasonic sensor 1 will be described with reference to Figure 3. Note that Figure 3 shows only the piezoelectric element 3 out of the components of the ultrasonic sensor 1. The ultrasonic sensor 1 uses the piezoelectric element 3 to transmit a transmission wave signal W1 in the ultrasonic band toward the space outside the ultrasonic sensor 1 (in a direction away from the ultrasonic sensor 1). The transmission wave signal W1 is reflected by the detection object OBJ, generating a reflected wave signal W2. The reflected wave signal W2 is received by the ultrasonic sensor 1 using the piezoelectric element 3.

[0019] The ultrasonic band refers to a frequency band that is higher than the frequency band of sound waves that can be heard by the human ear but is inaudible to the human ear, and generally refers to a band of 20 kHz or higher. For example, the transmitted wave signal W1 has a frequency in the range of 30 kHz to 80 kHz. Both the transmitted wave signal W1 and the reflected wave signal W2 belong to the ultrasonic signal category.

[0020] The piezoelectric element 3 generates a mechanical displacement (vibration) in response to a voltage signal applied between its first and second ends, and generates a transmission wave signal W1 through its own mechanical displacement. Therefore, the piezoelectric element 3 functions as a transmitter of the transmission wave signal W1. The piezoelectric element 3 also has the property of generating an electromotive force between its first and second ends in response to the mechanical displacement (vibration) applied to itself, and functions as a receiver of the reflected wave signal W2.

[0021] The IC2 transmits the transmission wave signal W1 and receives the reflected wave signal W2 using the piezoelectric element 3. Hereinafter, the combined operation of transmitting the transmission wave signal W1 and receiving the reflected wave signal W2 may be referred to as a transmission / reception operation.

[0022] The transmission circuit 10 is connected to output terminals DRV1 and DRV2. The transmission circuit 10 transmits a transmission wave signal W1 under the control of the control circuit 50. In transmitting the transmission wave signal W1, the transmission circuit 10 drives the piezoelectric element 3 by supplying an AC drive current to the primary coil L1. More specifically, in transmitting the transmission wave signal W1, the transmission circuit 10 supplies an AC drive current to the primary coil L1 via the output terminals DRV1 and DRV2, thereby generating an AC voltage in the secondary coil L2. The AC voltage generated in the secondary coil L2 is applied to the piezoelectric element 3, generating the transmission wave signal W1 in the piezoelectric element 3, and the transmission wave signal W1 is transmitted from the piezoelectric element 3. The number of turns of the secondary coil L2 is greater than the number of turns of the primary coil L1, and an AC voltage having an amplitude greater than the amplitude of the AC voltage applied across the primary coil L1 is generated across the secondary coil L2.

[0023] The receiving circuit 31 is connected to the input terminals IN1 and IN2 and receives the reflected wave signal W2. In receiving the reflected wave signal W2, the receiving circuit 31 receives the reflected wave signal W2 in the ultrasonic band using the piezoelectric element 3. That is, the receiving circuit 31 receives the reflected wave signal W2 by receiving the voltage signal applied across the piezoelectric element 3 via capacitors C1 and C2. The capacitors C1 and C2 remove the DC component of the voltage signal applied across the piezoelectric element 3, and only the AC component of the voltage signal applied across the piezoelectric element 3 is input to the receiving circuit 31 as the input signal Sin. The input signal Sin corresponds to the reflected wave signal W2 received by the receiving circuit 31. However, in addition to the reflected wave signal W2, the input signal Sin also includes the voltage signal applied across the piezoelectric element 3 during the transmission operation of the transmission wave signal W1.

[0024] The reception processing block 30 performs necessary signal processing on the reflected wave signal W2 received by the reception circuit 31. Details of the reception processing block 30 will be described later. The operation of each component of the reception processing block 30 is controlled by a control circuit 50.

[0025] An ultrasonic sonar system as shown in Fig. 4 can be formed. The ultrasonic sonar system of Fig. 4 includes a sensor module 5 formed by modularizing the components that make up the ultrasonic sensor 1, and a host device 4. The ultrasonic sensor 1 is housed in the sensor module 5. A connector 6 connected to the ultrasonic sensor 1 within the sensor module 5 is provided on the sensor module 5. The host device 4 and the connector 6 are connected to each other via a harness 7.

[0026] The harness 7 includes at least a power supply wiring to which the power supply voltage VCC is applied, a ground wiring to which a ground potential is applied, and a communication wiring. The power supply voltage VCC is supplied from the upper device 4 to the ultrasonic sensor 1 (IC2) through the power supply wiring. By connecting the ground wiring to the upper device 4 and the ultrasonic sensor 1, the ground potential of the upper device 4 and the ground potential of the ultrasonic sensor 1 are common. The communication wiring is connected to the upper device 4 and also to the communication terminal CM of the IC2 via the connector 6.

[0027] The IC2 and the upper device 4 communicate bidirectionally via the communication terminal CM and the above-mentioned communication wiring, with the ground potential as the reference. The communication between the IC2 and the upper device 4 is half-duplex, with the upper device 4 functioning as the master device and the IC2 functioning as the slave device. Any command shown below is transmitted from the upper device 4 to the IC2 via the above-mentioned communication wiring and received by the communication terminal CM. In the following description, any signal output (transmitted) from the IC2 to the upper device 4 is input to the upper device 4 via the communication terminal CM and the above-mentioned communication wiring.

[0028] The control circuit 50 executes a measurement operation when a predetermined measurement start condition is met. The upper device 4 can send a measurement instruction command to IC2. When IC2 receives the measurement instruction command, the measurement start condition is met and the control circuit 50 executes a measurement operation. As shown in Figure 5, basically, a measurement operation is executed only once in response to the reception of one measurement instruction command. However, the measurement operation may be executed multiple times in response to the reception of one measurement instruction command.

[0029] The states of the upper device 4 and IC2 are a first communication state and a second communication state. In the first communication state, the upper device 4 functions as a transmitting device and IC2 functions as a receiving device. In the first communication state, a signal is transmitted from the upper device 4 to IC2 via the communication wiring and communication terminal CM. In the second communication state, the upper device 4 functions as a receiving device and IC2 functions as a transmitting device. In the second communication state, a signal is transmitted from IC2 to the upper device 4 via the communication wiring and communication terminal CM. In principle, the states of the upper device 4 and IC2 are the first communication state. When IC2 receives a measurement instruction command from the upper device 4, the states of the upper device 4 and IC2 enter the second communication state only during the measurement operation, and return to the first communication state when the measurement operation is completed.

[0030] In each measurement operation, a transmission operation of a transmission wave signal W1 is performed, followed by a reception operation of a reflected wave signal W2. In one measurement operation, the length of the execution period of the measurement operation is longer than the length of the execution period of the transmission operation. The lengths of the execution periods of the measurement operation and the transmission operation are determined in advance prior to the execution of the measurement operation.

[0031] FIG. 6 illustrates the transmission and reception operations of the ultrasonic sensor 1. The control circuit 50 controls the transmission circuit 10 to transmit the transmission wave signal W1, and in response to this transmission operation, transmits a signal 610 obtained by receiving the reflected wave signal W2 to the upper device 4. The signal 610 is a binary signal having a high or low signal level, corresponding to signals S35 and S36 described below (see FIG. 8 ). The reception processing block 30 generates a reception intensity signal (corresponding to reception intensity signal S33 described below) having a signal value proportional to the strength (amplitude) of the input signal Sin. If the value of the reception intensity signal is below the determination threshold, the signal 610 is high, and if the value of the reception intensity signal is equal to or greater than the determination threshold, the signal 610 is low. The upper device 4 can perform object detection processing based on the signal 610. The proportional constant between the strength of the input signal Sin and the reception intensity signal may vary depending on the time elapsed since the start of transmission of the transmission wave signal W1.

[0032] The object detection process may be a distance detection process that detects the distance between the ultrasonic sensor 1 and the detection object OBJ (in other words, the distance between the piezoelectric element 3 and the detection object OBJ). The distance between the ultrasonic sensor 1 and the detection object OBJ can be derived by measuring the length of time from when the transmission wave signal W1 is transmitted at time t1 to when the reflected wave signal W2 is received at time t3 (i.e., the length between times t1 and t3). Time t1 represents the start time of transmission of the transmission wave signal W1 using the transmission circuit 10 and the piezoelectric element 3, and time t3 represents the start time of reception of the reflected wave signal W2 using the reception circuit 31 and the piezoelectric element 3. Time t2 represents the end time of transmission of the transmission wave signal W1 using the transmission circuit 10 and the piezoelectric element 3. Time t2 is a time before time t3. Before time t1, the signal 610 is at a high level. Between times t1 and t2, an AC voltage of sufficiently large amplitude is applied to the piezoelectric element 3, causing the signal 610 to go low, and then returning to high at time t2. Thereafter, the reflected wave signal W2 from the object detection unit OBJ is received at time t3, causing the signal 610 to switch from high to low. The signal 610 is maintained at low level as the reflected wave signal W2 continues to be received from time t3 to time t4, and then switches from low to high at time t4. Ideally, the length between times t3 and t4 is equal to the length between times t1 and t2.

[0033] The object detection process may be an approach detection process. In the approach detection process, if the upper device 4 receives the reflected wave signal W2 within a predetermined time period after transmitting the transmission wave signal W1 at time t1, it determines that the detection object OBJ is approaching the ultrasonic sensor 1; otherwise, it determines that the detection object OBJ is not approaching the ultrasonic sensor 1. If the signal 610 switches from high level to low level within a predetermined time period from time t1 after time t2, the upper device 4 can determine that the detection object OBJ is approaching the ultrasonic sensor 1; otherwise, it can determine that the detection object OBJ is not approaching the ultrasonic sensor 1.

[0034] The ultrasonic sensor 1 is mounted on any device. For convenience, a device equipped with the ultrasonic sensor 1 is referred to as a sensor-mounted device. An ultrasonic sonar system (see FIG. 4) having a higher-level device 4 and a sensor module 5 may be mounted on the sensor-mounted device. A typical example of a sensor-mounted device is a vehicle such as an automobile. It can also be said that the distance between the ultrasonic sensor 1 and the detection object OBJ corresponds to the distance between the sensor-mounted device and the detection object OBJ. It can also be said that the approach of the detection object OBJ to the ultrasonic sensor 1 corresponds to the approach of the detection object OBJ to the sensor-mounted device.

[0035] Even after the supply of drive current to the primary coil L1 is stopped after the start of supplying the drive current, the piezoelectric element 3 continues to vibrate for a while based on the mechanical energy accumulated during the supply of the drive current. The vibration of the piezoelectric element 3 after the supply of the drive current is stopped is called reverberation. If the reverberation continues for a long time, it becomes difficult to detect an object at close range. Capacitor C T and resistor R T is provided to reduce reverberation. Furthermore, for the purpose of improving EMC (electromagnetic compatibility) characteristics, a resistor may be inserted between the capacitor C1 and the input terminal IN1, a resistor may be inserted between the capacitor C2 and the input terminal IN2, and a capacitor may be inserted between the input terminals IN1 and IN2.

[0036] 7 shows the internal configuration of the transmission circuit 10 and the relationship between the transmission circuit 10 and the control circuit 50. The transmission circuit 10 includes switching elements 11 and 12 and a current source 13. A first end (first electrode) of the switching element 11 is connected to the output terminal DRV1, and therefore to the first end of the primary coil L1. A second end (second electrode) of the switching element 11 is connected to the input end of the current source 13. A first end (first electrode) of the switching element 12 is connected to the output terminal DRV2, and therefore to the second end of the primary coil L1. A second end (second electrode) of the switching element 12 is connected to the input end of the current source 13. The current source 13 is a constant current source having an input end and an output end, and outputs a drive current I from its input end to its output end. DRV The output terminal of the current source 13 is connected to the ground.DRV flows from the input terminal of the current source 13 to the output terminal (and therefore to ground).

[0037] The control circuit 50 can individually control the on / off states of the switching elements 11 and 12. In the transmission operation of the transmission wave signal W1, the control circuit 50 supplies an AC drive current to the primary coil L1 by alternately turning on and off the switching elements 11 and 12. More specifically, in the transmission operation, the control circuit 50 alternately switches the state of the transmission circuit 10 between a first drive state and a second drive state.

[0038] In the first driving state, the switching elements 11 and 12 are on and off, respectively. Therefore, in the first driving state, the first end of the primary coil L1 is electrically connected to the current source 13 through the output terminal DRV1 and the switching element 11, and a driving current I flows from the first end of the primary coil L1 to the current source 13 through the output terminal DRV1 and the switching element 11 due to the action of the current source 13. DRV In the first driving state, the driving current I DRV flows through a current path passing through the capacitor C0, the midpoint (center tap) of the primary coil L1, and the first end of the primary coil L1 (see also FIG. 1).

[0039] In the second driving state, the switching elements 11 and 12 are turned off and on, respectively. Therefore, in the second driving state, the second end of the primary coil L1 is electrically connected to the current source 13 through the output terminal DRV2 and the switching element 12, and a driving current I flows from the second end of the primary coil L1 to the current source 13 through the output terminal DRV2 and the switching element 12 due to the action of the current source 13. DRV In the second driving state, the driving current I DRV flows through a current path passing through the capacitor C0, the midpoint (center tap) of the primary coil L1, and the second end of the primary coil L1 (see also FIG. 1).

[0040] Each of the switching elements 11 and 12 is configured, for example, by a P-channel MOSFET (metal-oxide-semiconductor field-effect transistor). In this case, the sources of the switching elements 11 and 12 are connected to the output terminals DRV1 and DRV2, respectively, while the drains of the switching elements 11 and 12 are connected to the input terminal of the current source 13. The control circuit 50 then controls the gate potentials of the switching elements 11 and 12 to individually control the on / off states of the switching elements 11 and 12. However, the switching elements 11 and 12 may also be configured by an N-channel MOSFET. The current source 13 also supplies a drive current I DRV The control circuit 50 may be a variable current source configured to be able to change the value of the drive current I DRV It's good to be able to adjust the value.

[0041] 8 shows an internal block diagram of the reception processing block 30. The reception processing block 30 includes a reception circuit 31, an ADC 32, a signal processing circuit 33, a comparison signal generation circuit 34, a comparison circuit 35, a filter circuit 36, a signal selection circuit 37, a DAC 38, a switching output circuit 39, and a selection designation circuit 40. The operations of the components (31 to 40) of the reception processing block 30 are controlled by a control circuit 50.

[0042] As described above, the receiving circuit 31 is connected to the input terminals IN1 and IN2. The signal between the input terminals IN1 and IN2 represents the AC component of the voltage signal applied across the piezoelectric element 3, and is input to the receiving circuit 31 as the input signal Sin. The receiving circuit 31 performs signal amplification processing to amplify the input signal Sin, and generates and outputs the amplified input signal Sin as an amplified receiving signal S31. The amplified receiving signal S31 is an analog signal having an amplitude proportional to the amplitude of the input signal Sin. The amplified receiving signal S31 is input to the ADC 32.

[0043] The ADC 32 is an A / D converter (analog / digital converter) that converts the amplified received signal S31 into a digital signal to generate and output the signal S32. Because the signal S32 is obtained by converting the amplified received signal S31, which is expressed in the analog domain, into a signal expressed in the digital domain, the signal S32 can also be referred to as an amplified received signal. The digital amplified received signal S32 is input to the signal processing circuit 33.

[0044] The signal processing circuit 33 performs predetermined signal processing on the amplified reception signal S32 to generate and output a reception intensity signal S33. The reception intensity signal S33 is a signal indicating the intensity of the input signal Sin (i.e., a signal indicating the intensity of the reception signal at the reception circuit 31). The reception intensity signal S33 is a digital signal (a signal in the digital domain), and the greater the intensity of the input signal Sin at a given time, the greater the value of the reception intensity signal S33 at that time. The signal processing in the signal processing circuit 33 includes envelope detection, which detects the envelope of the amplified reception signal S32. Because the amplitude of the amplified reception signal S32 is proportional to the amplitude of the input signal Sin, detecting the envelope of the amplified reception signal S32 can determine the intensity (amplitude) of the input signal Sin. The signal processing in the signal processing circuit 33 may also include processing other than envelope detection (e.g., digital filtering). Note that the signal processing in the signal processing circuit 33 may be arbitrary as long as it is possible to generate a signal indicating the intensity of the input signal Sin (i.e., a signal indicating the intensity of the signal received by the receiving circuit 31) as the reception intensity signal S33. The signal processing circuit 33 is an example of a reception intensity signal generation circuit. It may be considered that the ADC 32 and the signal processing circuit 33 form a reception intensity signal generation circuit.

[0045] The comparison signal generating circuit 34 generates and outputs a comparison signal S34, which is a signal to be compared with the reception intensity signal S33. The comparison signal S34 is a digital signal (a signal in the digital domain), and the value of the comparison signal S34 is sometimes referred to as a decision threshold. In each measurement operation, the decision threshold (i.e., the value of the comparison signal S34) changes with the passage of time from the start of transmission of the transmission wave signal W1.

[0046] The comparison circuit 35 receives the reception intensity signal S33 and the comparison signal S34. The comparison circuit 35 compares the reception intensity signal S33 with the comparison signal S34 and outputs a signal S35 indicating the comparison result. The signal S35 and a signal S36 (described later) are binary signals having a value of "1" or "0." Here, the signals S35 and S36 of "1" have a low level, and the signals S35 and S36 of "0" have a high level. The comparison circuit 35 outputs a signal S35 of "1" if the value of the reception intensity signal S33 is equal to or greater than the value of the comparison signal S34, and outputs a signal S35 of "0" if the value of the reception intensity signal S33 is less than the value of the comparison signal S34. The signals S35 and S36 are sometimes referred to as comparison result signals. The comparison result signal S35 is input to the filter circuit 36.

[0047] The filter circuit 36 ​​performs filtering on the comparison result signal S35, primarily to reduce noise contained in the comparison result signal S35, and outputs the filtered comparison result signal S35 as a comparison result signal S36. Note that in the reception processing block 30, the function of the filter circuit 36 ​​may be disabled or the filter circuit 36 ​​may not be provided. In such cases, the comparison result signal S36 is exactly the same as the comparison result signal S35.

[0048] The signal selection circuit 37 receives the reception intensity signal S33 and the comparison signal S34. The selection designation signal S40 from the selection designation circuit 40 is also received by the signal selection circuit 37. The selection designation signal S40 is a binary signal having a value of "1" or "0." The signal selection circuit 37 selects either the reception intensity signal S33 or the comparison signal S34 in response to the selection designation signal S40 and outputs the selected signal as a signal S37. Hereinafter, when the selection designation signal S40 has a value of "1," the reception intensity signal S33 is selected as the signal S37, and when the selection designation signal S40 has a value of "0," the comparison signal S34 is selected as the signal S37. Hereinafter, the signal S37 may be referred to as the selection signal S37. The selection signal S37 is input to the DAC 38.

[0049] The DAC 38 is a D / A converter (digital / analog converter) that converts the selection signal S37 into an analog signal to generate and output a signal S38. The signal S38 may hereinafter be referred to as a DAC output signal S38. The analog DAC output signal S38 is input to a switching output circuit 39.

[0050] During the execution period of the measurement operation, the switching output circuit 39 outputs either the comparison result signal S36 or the DAC output signal S38 as an IC output signal S39 from the communication terminal CM under the control of the control circuit 50. During the execution period of the measurement operation, the IC output signal S39 output from the communication terminal CM is transmitted to the upper device 4 via the communication wiring.

[0051] The output operation of the selection specification signal S40 by the selection specification circuit 40 will be described in detail later. The signal selection circuit 37, the DAC 38, the switching output circuit 39 and the selection specification circuit 40 form a signal output circuit 41.

[0052] FIG. 9 shows example waveforms of signals S33, S34, and S35 in one measurement operation. In FIG. 9, the reception intensity signal S33 is shown by a dashed waveform, and the comparison signal S34 and comparison result signal S35 are shown by solid waveforms. Ignoring noise and the like, the waveform of the comparison result signal S35 and the waveform of the comparison result signal S36 shown in FIG. 9 are substantially the same. One measurement operation starts at time t1 and ends at time t10. The control circuit 50 performs the measurement operation using the transmission circuit 10 and the components (31-40) of the reception processing block 30. It can also be considered that the transmission circuit 10 and the components (31-40) of the reception processing block 30 cooperate to perform the measurement operation under the control of the control circuit 50.

[0053] Under the control of the control circuit 50, the transmission circuit 10 starts transmitting the transmission wave signal W1 at time t1, and ends the transmission operation of the transmission wave signal W1 at time t2. Time t2 is a time before time t10, which corresponds to the end of the execution period of the measurement operation. The transmission wave signal W1 is transmitted from the piezoelectric element 3 between times t1 and t2. The transmission of the transmission wave signal W1 stops at time t2. However, in reality, the effects of reverberation remain for a while after time t2. Note that times t1 and t2 described here correspond to times t1 and t2 described above with reference to FIG. 6, and times t3 and t4 described above are times before time t10.

[0054] The length of the transmission operation execution period is the transmission setting time T O The length of the measurement operation execution period is the measurement set time T M The transmission setting time T O and measurement setting time T M is determined in advance before the measurement operation is performed. O and measurement setting time T M The transmission setting time T O and measurement setting time T M can be changed based on a setting command sent from the upper device 4 and received by the IC 2.

[0055] Between times t1 and t2, an AC voltage of sufficiently large amplitude is applied to the piezoelectric element 3, so the comparison result signal S35 goes low, and at time t2 the comparison result signal S35 returns to high. After that, the comparison result signal S35 goes low only during the period when the value of the reception intensity signal S33 is equal to or greater than the value of the comparison signal S34.

[0056] To improve the detection accuracy of the detection object OBJ and reduce false detections, during the measurement operation, the comparison signal generation circuit 34 changes the judgment threshold (i.e., the value of the comparison signal S34) over time from the start time t1 of transmission of the transmission wave signal W1. For example, when an ultrasonic sonar system is installed in a vehicle that travels on a road, the road surface is excluded from the detection object OBJ. In this case, to avoid false detection of the road surface as the detection object OBJ based on waves reflected from the road surface, the judgment threshold is set relatively high during the time period when the receiving circuit 31 receives waves reflected from the road surface. Furthermore, the comparison signal S34 is set taking into consideration that the intensity of the reflected wave signal W2 received by the receiving circuit 31 decreases as the distance between the detection object OBJ and the ultrasonic sensor 1 increases.

[0057] For example, judgment threshold data specifying how the value of the comparison signal S34 is changed from time t1 to time t10 may be stored in the control circuit 50 or the comparison signal generation circuit 34, and the comparison signal generation circuit 34 may generate and output the comparison signal S34 based on the judgment threshold data. The judgment threshold data may be changeable based on a setting command transmitted from the upper device 4 and received by the IC2. The comparison signal generation circuit 34 may change the judgment threshold depending on the gain of signal amplification in the receiving circuit 31 or the signal processing circuit 33.

[0058] The signal output circuit 41 operates in one of a plurality of output modes. The output mode in which the signal output circuit 41 operates is specified and controlled by the control circuit 50. The control circuit 50 sets one of the plurality of output modes as the target output mode in accordance with a mode specification command received from the upper device 4, and the signal output circuit 41 operates in the target output mode. The plurality of output modes are output modes MD A and M.D. B Includes.

[0059] [Output mode MD A ] Output mode MD A In the initial state of IC2, the target output mode is output mode MD AIn the actual operation stage where an ultrasonic sonar system is mounted on a sensor-mounted device (such as a vehicle) and performs object detection processing, the output mode MD A is used. Output mode MD A In (i.e., output mode MD A In the measurement operation, the comparison result signal S36 is output from the communication terminal CM as the IC output signal S39 throughout the entire execution period of the measurement operation. A In the measurement operation at , the signal output circuit 41 starts transmitting the transmission wave signal W1 at a time (t1) for a measurement set time T M The upper device 4 outputs a signal based on the comparison result of the comparison circuit 35 from the communication terminal CM until the time has elapsed (i.e., until the measurement operation is completed). A The above-mentioned object detection process can be performed based on the IC output signal S39 in the image forming apparatus.

[0060] The control circuit 50 operates the signal selection circuit 37, the DAC 38, and the selection specification circuit 40 during the period when the DAC output signal S38 is output as the IC output signal S39, and stops the operation of the signal selection circuit 37, the DAC 38, and the selection specification circuit 40 during the other periods. A In (i.e., output mode MD A is set to the target output mode), the control circuit 50 stops the operations of the signal selection circuit 37, the DAC 38 and the selection designation circuit 40.

[0061] For example, the switching output circuit 39 may have a configuration as shown in Fig. 10. The switching output circuit 39 in Fig. 10 has an I / F circuit 39a. The comparison result signal S36 is input to the input terminal of the I / F circuit 39a. The output terminal of the I / F circuit 39a is connected to the communication terminal CM. The I / F circuit 39a operates effectively during the period in which the comparison result signal S36 should be output as the IC output signal S39, and outputs the comparison result signal S36 from the communication terminal CM as the IC output signal S39 during that period. At this time, any necessary level shifting processing, etc., is performed as appropriate.

[0062] The output terminal of the DAC 38 is connected to the communication terminal CM together with the output terminal of the I / F circuit 39a. However, when the operation of the DAC 38 is stopped, the input impedance of the output terminal of the DAC 38 is sufficiently high when viewed from the communication terminal CM. Therefore, in the output mode MD A In the measurement operation in , an IC output signal S39 corresponding to the comparison result signal S36 can be output from the communication terminal CM through the I / F circuit 39a.

[0063] During the period when the DAC output signal S38 should be output as the IC output signal S39, the operation of the I / F circuit 39a stops, and the input impedance of the output terminal of the I / F circuit 39a becomes sufficiently high as viewed from the communication terminal CM, so that the DAC output signal S38 can be output from the communication terminal CM as the IC output signal S39.

[0064] Meanwhile, during the development or evaluation stage of IC2 alone or the entire ultrasonic sonar system, work including adjustment of the judgment threshold value, etc. (hereinafter referred to as debugging work) is performed. During debugging work, the worker in charge of debugging wants to refer to various internal signals within IC2. However, providing dedicated wiring for reading out various internal signals to the ultrasonic sonar system is not or is difficult to allow due to the constraints on the number of wiring. Under such circumstances, in order to facilitate debugging work, IC2 is configured as shown in FIG. 8 and has an output mode MD B In order to demonstrate the advantages of the IC2 according to this embodiment, several reference configurations will be shown below.

[0065] In the first reference configuration, the components 37 to 40 shown in FIG. 8 are not provided, and only the comparison result signal S36 can be output from the communication terminal CM. When debugging in the first reference configuration, as shown in FIG. 11, a wire WR is drawn out from the IC specifically for debugging, and the signal on the wire WR (e.g., signal S33 or S34) is observed using a dedicated jig or the like. In the first reference configuration, the process of drawing out the wire WR from the IC specifically for debugging is necessary, which is inconvenient. Furthermore, drawing out the wire WR is difficult or impossible when the IC is modularized as a sensor module.

[0066] The second reference configuration does not include the components 37 and 40 shown in FIG. 8. In the second reference configuration, as shown in FIG. 12, the comparison result signal S36 or the reception intensity signal S33 can be switched and output from the communication terminal CM. Therefore, during debugging work related to the second reference configuration, the operator can easily observe the reception intensity signal S33. However, with the second reference configuration, only the reception intensity signal S33 can be observed during debugging work, which makes it difficult to proceed with the debugging work.

[0067] [Output mode MD B ] Configuration and output mode MD shown in FIG. B This facilitates debugging. B In (i.e., output mode MD B When "m=2" is set to the target output mode, the signal output circuit 41 outputs m types of output target signals from the communication terminal CM while switching between them. m is an arbitrary integer of 2 or more. The m types of output target signals consist of output target signals S[1] to S[m]. In FIG. 13, when "m=2", the output mode MD B 13A and 13B show a waveform of the signal (IC output signal S39) output from the communication terminal CM (assuming that the switching period is quite short).

[0068] Here, let i be any two different natural numbers less than m. A and i B The output target signal S[i A ] is a signal representing the waveform of the reception intensity signal S33, and the output target signal S[i B ] is a signal representing the waveform of the comparison signal S34. That is, any two of the output target signals S[1] to S[m] are a signal representing the waveform of the reception intensity signal S33 and a signal representing the waveform of the comparison signal S34.

[0069] In this embodiment, the output target signal S[i A ] is the DAC output signal S38 when the reception intensity signal S33 is the selection signal S37, that is, the reception intensity signal S33 is converted into an analog signal. A] is any signal that represents the waveform of the reception intensity signal S33. B ] is the DAC output signal S38 when the comparison signal S34 is the selection signal S37, that is, the comparison signal S34 is converted into an analog signal. B ] is any signal that represents the waveform of the comparison signal S34.

[0070] In the following, for the sake of concreteness of explanation, unless otherwise specified, "(i A , i B )=(1, 2)" In other words, hereinafter, unless otherwise specified, the output target signal S[1] is the DAC output signal S38 when the reception intensity signal S33 is the selection signal S37, and the output target signal S[2] is the DAC output signal S38 when the comparison signal S34 is the selection signal S37.

[0071] Output mode MD B By using this, the debugging worker can easily observe the waveform of the reception intensity signal S33 and the waveform of the comparison signal S34 based on the signal output from the communication terminal CM, and can efficiently perform debugging work including adjusting the judgment threshold value, etc.

[0072] Among the various embodiments, the output mode MD B Several specific examples, applied techniques, modified techniques, etc. related to the above will be described. The matters described above in this embodiment are applied to the following examples unless otherwise specified and unless there is a contradiction. In the cases where there are matters in each example that contradict the matters described above, the description in each example may take precedence. Furthermore, unless there is a contradiction, matters described in any of the following multiple examples can also be applied to any other example (i.e., any two or more of the multiple examples can also be combined).

[0073] <<First Example>> A first example will be described. In the first example, the output mode MD B is output mode MD B1 In the first embodiment, "m=2".

[0074] Output mode MDB1 In the measurement operation according to the present invention, the signal output circuit 41 outputs the signal W1 from the transmission start time (t1) to the measurement set time T M The output target signals S[1] and S[2] are output from the communication terminal CM while being switched sequentially until time elapses (i.e., until the measurement operation is completed). Outputting the output target signals S[1] and S[2] from the communication terminal CM while being switched sequentially corresponds to outputting the output target signals S[1] and S[2] from the communication terminal CM while being switched alternately.

[0075] Output mode MD B1 The switching period of the signal output from the communication terminal CM is represented by the symbol "P SW ". Output mode MD B1 In one measurement operation in SW Every time the switching period P passes, the signal output from the communication terminal CM switches between the output target signals S[1] and S[2]. SW is the measurement setting time T M Therefore, the output mode MD B1 In the measurement operation according to the present invention, the signal output circuit 41 measures the measurement set time T M The output target signals S[1] and S[2] are output from the communication terminal CM while being switched periodically in sequence (alternately) at a cycle shorter than the cycle (i.e., a cycle shorter than the execution period of the measurement operation).

[0076] A more detailed numerical example will be given. The sensor drive frequency is assumed to be 50 to 60 kHz (kilohertz). The sensor drive frequency represents the frequency of the AC voltage applied to the piezoelectric element 3 in the transmission operation of the transmission wave signal W1, and is equal to the frequency of the AC current supplied to the primary coil L1 in the configuration of FIG. 1. The reciprocal of the sensor drive frequency is called the sensor drive period. In this case, for example, the measurement setting time T M is 10 to 40 milliseconds, while the switching period P SW The update period of any digital signal in the reception processing block 30 may be the same as the sensor drive period. In this case, for example, the switching period P SW may be 1 / 2 of the sensor drive period (however, 1 / 2 is merely an example and can be changed in various ways).

[0077] Output mode MD B1 The waveform of the IC output signal S39 during the execution of the measurement operation according to the output mode MD is shown in FIG. B1 When the waveform of IC output signal S39 is observed on an oscilloscope during the execution of the measurement operation related to (1), waveforms 711 and 712 are shown on the display screen of the oscilloscope. For convenience, in Fig. 14, waveform 711 is shown as a dashed waveform and waveform 712 is shown as a solid waveform. Waveform 711 is the waveform of output target signal S[1] and therefore represents the waveform of reception intensity signal S33. Waveform 712 is the waveform of output target signal S[2] and therefore represents the waveform of comparison signal S34.

[0078] 15 is an enlarged view (enlarged view in the time direction) of the waveforms 711 and 712 around time t2. SW It can be seen that the IC output signal S39 switches between the output target signals S[1] and S[2] every time the measurement setting time T M For the switching period P SW is sufficiently short, so the measurement setting time T M When the waveform of IC output signal S39 is observed on an oscilloscope on the entire scale of 711, 712, the waveforms 711 and 712 are observed simultaneously in an overlapping state. In other words, the person performing the debugging work can simultaneously observe the waveform of reception intensity signal S33 and the waveform of comparison signal S34, thereby enabling the debugging work to be performed efficiently.

[0079] In FIG. 16, the output mode MD B1 1 shows the waveform of the selection designation signal S40 in the output mode MD. B1 In the measurement operation according to the present invention, the value of the selection designation signal S40 is set to a switching period P SW The selection signal S37 alternates between "1" and "0" as time passes. The selection signal S37 is the reception intensity signal S33 when the selection designation signal S40 has a value of "1", and is the comparison signal S34 when the selection designation signal S40 has a value of "0". The value of the selection designation signal S40 during the period when the measurement operation is not being performed is arbitrary, but is fixed at "0" in the example of FIG.

[0080] <<Second Example>> A second example will be described. In the second example, the output mode MD B is output mode MD B2 In the second embodiment, "m=2".

[0081] Output mode MD shown in the first embodiment B1 In the second embodiment, the output mode MD B2 In the , every time one measurement operation is performed, the signal output from the communication terminal CM is switched between the output target signals S[1] and S[2].

[0082] That is, output mode MD B2 In one measurement operation according to the present invention, the signal output circuit 41 measures the time from the transmission start time (t1) of the transmission wave signal W1 to the measurement set time T M Until the time t1 has elapsed (i.e., until the measurement operation is completed), only one of the output target signals S[1] and S[2] is output from the communication terminal CM. B2 When the measurement operation is repeatedly performed multiple times in the above, the signal output circuit 41 alternately switches the signal output from the communication terminal CM between the output target signals S[1] and S[2] each time a measurement operation is performed.

[0083] Output mode MD B2 The waveform of the IC output signal S39 according to the output mode MD is shown in FIG. B2Assume that the i-th measurement operation is performed between times t21 and t22, then the (i+1)-th measurement operation is performed between times t23 and t24, then the (i+2)-th measurement operation is performed between times t25 and t26, and then the (i+3)-th measurement operation is performed between times t27 and t28. (i) is an arbitrary natural number. The signal output circuit 41 outputs the output target signal S[1] from the communication terminal CM in the i-th measurement operation, outputs the output target signal S[2] from the communication terminal CM in the (i+1)-th measurement operation, outputs the output target signal S[1] from the communication terminal CM in the (i+2)-th measurement operation, and outputs the output target signal S[2] from the communication terminal CM in the (i+3)-th measurement operation.

[0084] The waveform of the IC output signal S39 in Figure 17 includes a waveform 721 between times t21 and t22, a waveform 722 between times t23 and t24, a waveform 723 between times t25 and t26, and a waveform 724 between times t27 and t28. The waveform 721 is the waveform of the output target signal S[1] between times t21 and t22, and therefore represents the waveform of the reception intensity signal S33 between times t21 and t22. The waveform 722 is the waveform of the output target signal S[2] between times t23 and t24, and therefore represents the waveform of the comparison signal S34 between times t23 and t24. The waveform 723 is the waveform of the output target signal S[1] between times t25 and t26, and therefore represents the waveform of the reception intensity signal S33 between times t25 and t26. A waveform 724 is the waveform of the output signal S[2] between times t27 and t28, and therefore represents the waveform of the comparison signal S34 between times t27 and t27.

[0085] Therefore, when the waveform of IC output signal S39 between times t21 and t28 is observed with an oscilloscope, a waveform in which waveforms 721 to 724 are arranged along the time axis direction, as shown in FIG. 17, is observed. Many oscilloscopes are equipped with an afterimage display function that displays a waveform once displayed on the display screen as an afterimage. Using the afterimage display function, waveforms 721' and 722' can be displayed superimposed on the oscilloscope's display screen, as shown in FIG. 18. In FIG. 18, waveform 722' shown by the solid line corresponds to waveform 722 in FIG. 17, and waveform 721' shown by the dashed line corresponds to waveform 721 in FIG. 17. However, waveform 721' is displayed superimposed on waveform 722' by the afterimage display function.

[0086] Output mode MD B2 This also allows the debugging worker to observe the waveform of the reception intensity signal S33 and the waveform of the comparison signal S34, and by using an afterimage display function, these waveforms can also be observed simultaneously, which allows the debugging work to be carried out efficiently.

[0087] In FIG. 19, the output mode MD B2 1 shows the waveform of the selection designation signal S40 in the output mode MD. B2 When measurement operations are performed sequentially multiple times, the value of the selection designation signal S40 is kept at "1" during the execution period of odd-numbered measurement operations, and the value of the selection designation signal S40 is kept at "0" during the execution period of even-numbered measurement operations (or vice versa). The value of the selection designation signal S40 is fixed at "0" (or may be fixed at "1") during periods when measurement operations are not being performed. The selection signal S37 is the reception intensity signal S33 when the selection designation signal S40 has a value of "1", and is the comparison signal S34 when the selection designation signal S40 has a value of "0".

[0088] Here, the output mode MD according to the first embodiment B1 and the output mode MD according to the second embodiment B2 Contrast with.

[0089] Output mode MD B1In this case, the waveforms of the reception intensity signal S33 and the comparison signal S34 acquired during the same measurement operation can be simultaneously observed, which has the advantage that no mismatch occurs between these waveforms. However, a CR filter or slew rate control is often applied to signals transmitted through communication wiring as a countermeasure against EMI or malfunction. For this reason, the output mode MD B1 In this case, high-speed switching is required, and there is a concern that the output tracking may not be able to keep up, and the waveform observed as the IC output signal S39 may not accurately represent the waveform of the signal S33 or S34. SW It may be necessary to take measures such as setting a longer value for the pull-up resistor connected to the communication wiring (assuming that a method of transmitting signals is adopted in which current is passed through the pull-up resistor).

[0090] Output mode MD B2 In output mode MD, the signal switching period is quite long, so there is no concern about output tracking. B2 Since the reception intensity signal S33 and the comparison signal S34 observed in are not signals acquired during the same measurement operation, there is a possibility that inconsistencies may occur between their waveforms (a deviation may occur in the relationship between the judgment threshold and the reception signal intensity). However, in reality, under evaluation conditions such as those used in debugging, it is rare that the distance between the ultrasonic sensor 1 and the detection object OBJ is changed at high speed. For this reason, in multiple consecutive measurement operations, the reception intensity signal S33 or the comparison signal S34 is expected to have substantially the same waveform each time, and therefore problems in practical use will hardly occur.

[0091] <<Third Example>> A third example will be described. B (i.e. output mode MD B1 ) can be modified to meet the condition "m≧3". The output mode MD B Output mode MD B3 The output mode MD according to the third embodiment is called B is output mode MD B3 In the third embodiment, m≧3. When m≧3, the configuration of the signal output circuit 41 can be appropriately modified from the configuration of FIG.

[0092] Output mode MD B3 In the measurement operation according to the present invention, the signal output circuit 41 outputs the signal W1 from the transmission start time (t1) to the measurement set time T M The output target signals S[1] to S[m] are sequentially switched and output from the communication terminal CM until time t has elapsed (i.e., until the measurement operation is completed). B3 In one measurement operation in SW As described above, the signal output from the communication terminal CM is switched in order among the output target signals S[1] to S[m] every time the switching period P SW is the measurement setting time T M Therefore, the output mode MD B3 In the measurement operation according to the present invention, the signal output circuit 41 measures the measurement set time T M The output target signals S[1] to S[m] are output from the communication terminal CM while being switched periodically in sequence at a cycle shorter than the cycle (i.e., a cycle shorter than the execution period of the measurement operation).

[0093] More specifically, the output mode MD B3 In one measurement operation according to the present invention, the signal output from the communication terminal CM is changed over a switching period P SW The output target signal S[1] is switched to the output target signal S[m] in the order of S[1], S[2], S[3], ..., S[m], as the switching period P SW When time has elapsed, the signal output from the communication terminal CM returns to the output target signal S[1], and thereafter, the same switching output is performed. B3 10 shows a waveform of the signal (IC output signal S39) output from the communication terminal CM.

[0094] As described above, of the output target signals S[1] to S[m], the output target signal S[1] is a signal that represents the waveform of the reception intensity signal S33, and the output target signal S[2] is a signal that represents the waveform of the comparison signal S34. Any signal within IC2 can be set as the output target signals S[3] to S[m].

[0095] Specifically, a lower limit analog signal representing the lower limit potential of the DAC output signal S38 or an upper limit analog signal representing the upper limit potential of the DAC output signal S38 may be set to any of the output target signals S[3] to S[m]. The DAC output signal S38 is an analog signal having a potential ranging from a lower limit signal level (zero scale level) to an upper limit signal level (full scale level). Therefore, in the configuration of Figure 8, when the DAC output signal S38 becomes the IC output signal S39, the output target signals S[1] to S[m] all have a potential ranging from the lower limit signal level to the upper limit signal level. The potential of the upper limit signal level is higher than the potential of the lower limit signal level.

[0096] When observing waveforms 711 and 712 in Figure 14, waveforms 721 to 724 in Figure 17, or waveforms 721' and 722' in Figure 18 on an oscilloscope, it is difficult for the observer to recognize the lower limit signal level (zero-scale level) and the upper limit signal level (full-scale level). When the waveform of the signal to be observed (e.g., waveforms 711 and 712 in Figure 14) is displayed on the display screen of the oscilloscope, if the lower limit signal level cannot be clearly recognized, it is difficult to determine whether noise is superimposed on the signal to be observed and the degree of superposition, etc. When the waveform of the signal to be observed (e.g., waveforms 711 and 712 in Figure 14) is displayed on the display screen of the oscilloscope, if the upper limit signal level cannot be clearly recognized, it is difficult to determine whether the signal to be observed has reached the upper limit signal level or the difference between the level of the signal to be observed and the upper limit signal level.

[0097] Therefore, the output mode MD B3 In the case where "m=3", the lower limit analog signal may be set to the output target signal S[3] (in this case, the output mode MD B3 For convenience, the output mode is MD B3_1 This allows the debugging operator to clearly recognize the lower limit signal level and observe the waveforms of the reception intensity signal S33 and the comparison signal S34.

[0098] Or for example, output mode MD B3 In the case where "m=3", the upper limit analog signal may be set to the output target signal S[3] (in this case, the output mode MDB3 For convenience, the output mode is MD B3_2 This allows the debugging operator to clearly recognize the upper limit signal level and observe the waveforms of the reception intensity signal S33 and the comparison signal S34.

[0099] Or for example, output mode MD B3 In the case where "m=4", the lower limit analog signal and the upper limit analog signal may be set to the output target signals S[3] and S[4] (in this case, the output mode MD B3 For convenience, the output mode is MD B3_3 This allows the operator performing the debugging work to clearly recognize the lower and upper limit signal levels and then observe the waveforms of the reception intensity signal S33 and the comparison signal S34.

[0100] <<Fourth Example>> A fourth example will be described. Output mode MD according to the second example B (i.e. output mode MD B2 ) can be modified to meet the condition "m≧3". The output mode MD B Output mode MD B4 The output mode MD according to the fourth embodiment B is output mode MD B4 In the fourth embodiment, m≧3. When m≧3, the configuration of the signal output circuit 41 can be appropriately modified from the configuration of FIG.

[0101] Output mode MD B4 In the measurement operation according to the present invention, the signal output circuit 41 outputs the signal W1 from the transmission start time (t1) to the measurement set time T M Until the time t1 has elapsed (i.e., until the measurement operation is completed), any one of the output target signals S[1] to S[m] is continuously output from the communication terminal CM. B4 When the measurement operation is repeatedly performed multiple times in the above, the signal output circuit 41 sequentially switches the signal output from the communication terminal CM between the output target signals S[1] to S[m] each time a measurement operation is performed.

[0102] That is, the output mode MD B4When the measurement operation is repeatedly performed multiple times in the above example, the signal output from the communication terminal CM is switched in sequence from the output target signal S[1] to the output target signal S[m], that is, S[1], S[2], S[3], ... S[m], each time a measurement operation is performed. After the measurement operation in which the output target signal S[m] is output from the communication terminal CM, the signal output from the communication terminal CM returns to the output target signal S[1] in the next measurement operation. Thereafter, similar switching outputs are performed.

[0103] As described above, of the output target signals S[1] to S[m], the output target signal S[1] is a signal representing the waveform of the reception intensity signal S33, and the output target signal S[2] is a signal representing the waveform of the comparison signal S34. Any signal within IC2 can be set as the output target signals S[3] to S[m]. Specifically, for example, as in the third embodiment, a lower limit analog signal or an upper limit analog signal may be set as one output target signal.

[0104] That is, output mode MD B4 In the case where "m=3", the lower limit analog signal may be set to the output target signal S[3] (in this case, the output mode MD B4 For convenience, the output mode is MD B4_1 This allows the debugging operator to clearly recognize the lower limit signal level and observe the waveforms of the reception intensity signal S33 and the comparison signal S34.

[0105] Or for example, output mode MD B4 In the case where "m=3", the upper limit analog signal may be set to the output target signal S[3] (in this case, the output mode MD B4 For convenience, the output mode is MD B4_2 This allows the debugging operator to clearly recognize the upper limit signal level and observe the waveforms of the reception intensity signal S33 and the comparison signal S34.

[0106] Or for example, output mode MD B4 In the case where "m=4", the lower limit analog signal and the upper limit analog signal may be set to the output target signals S[3] and S[4] (in this case, the output mode MD B4For convenience, the output mode is MD B4_3 This allows the operator performing the debugging work to clearly recognize the lower and upper limit signal levels and then observe the waveforms of the reception intensity signal S33 and the comparison signal S34.

[0107] <<Fifth Embodiment>> A fifth embodiment will be described. The signal output circuit 41 may operate in any of the first to n-th output modes, where n is an arbitrary integer equal to or greater than 2. First, the output mode MD A is the first output mode. In each of the first to fourth embodiments described above, it is basically assumed that "n=2", but "n≧3" may also be used. Specifically, the above-mentioned output mode MD B1 , M.D. B2 , M.D. B3_1 , M.D. B3_2 , M.D. B3_3 , M.D. B4_1 , M.D. B4_2 and M.D. B4_3 Any one or more of the output modes may be included in the second to n-th output modes. B1 , M.D. B2 , M.D. B3_1 , M.D. B3_2 , M.D. B3_3 , M.D. B4_1 , M.D. B4_2 and M.D. B4_3 However, they may be the second to ninth output modes, respectively.

[0108] The output mode in which the signal output circuit 41 operates is specified and controlled by the control circuit 50. The control circuit 50 sets one of the first to nth output modes as the target output mode in accordance with a mode specification command received from the upper device 4, and the signal output circuit 41 operates in the target output mode.

[0109] <<Sixth Embodiment>> A sixth embodiment will now be described. In the ultrasonic sensor 1 of FIG. 1 , a single piezoelectric element 3 functions as a transmitter of the transmitted wave signal W1 and as a receiver of the reflected wave signal W2. However, in addition to the piezoelectric element 3 functioning as a transmitter, the ultrasonic sensor 1 may also be provided with a separate piezoelectric element 3R functioning as a receiver, as shown in FIG. 21 . In this case, the piezoelectric element 3 is not connected to capacitors C1 and C2. Instead, the first end of the piezoelectric element 3R is connected to the first end of the capacitor C1, the second end of the capacitor C1 is connected to the input terminal IN1, the second end of the piezoelectric element 3R is connected to the first end of the capacitor C2, and the second end of the capacitor C2 is connected to the input terminal IN2. The piezoelectric element 3R is positioned at a distance from the piezoelectric element 3 and receives the reflected wave signal W2 to generate a voltage signal across its ends.

[0110] The receiving circuit 31 is connected to input terminals IN1 and IN2 and receives the reflected wave signal W2. In receiving the reflected wave signal W2, the receiving circuit 31 according to the sixth embodiment receives the reflected wave signal W2 in the ultrasonic band using the piezoelectric element 3R. That is, the receiving circuit 31 receives the reflected wave signal W2 by receiving the voltage signal applied across the piezoelectric element 3R via capacitors C1 and C2. The capacitors C1 and C2 remove the DC component of the voltage signal applied across the piezoelectric element 3R, and only the AC component of the voltage signal applied across the piezoelectric element 3R is input to the receiving circuit 31 as the input signal Sin. The input signal Sin corresponds to the signal received by the receiving circuit 31 as the reflected wave signal W2. The same is true as described above, except that the piezoelectric element that generates the input signal Sin is the piezoelectric element 3R.

[0111] <<Seventh Example>> A seventh example will be described.

[0112] A configuration without the transformer TR may be adopted in the ultrasonic sensor 1. In this case, the output terminals DRV1 and DRV2 are directly connected to the first end and the second end of the piezoelectric element 3, respectively, and the transmission circuit 10 drives the piezoelectric element 3 by supplying an AC voltage of a predetermined amplitude between both ends of the piezoelectric element 3 in a transmission operation.

[0113] When the ultrasonic sonar system (FIG. 4) according to this embodiment is mounted on a vehicle, the upper device 4 is, for example, an ECU (Electronic Control Unit) mounted on the vehicle. With the ultrasonic sensor 1 connected to the ECU, the IC 2 is set to the output mode MD. A By operating the ultrasonic sensor 1 in this mode, the ECU can perform object detection processing. B In this case, debugging can be performed using the ECU. Alternatively, when debugging is performed, a device dedicated to debugging can be used as the upper device 4.

[0114] With respect to any signal or voltage, the relationship between the high level and the low level thereof may be reversed without prejudice to the above-mentioned gist.

[0115] The embodiments of the present disclosure can be modified in various ways as appropriate within the scope of the technical ideas set forth in the claims. The above-described embodiments are merely examples of the present disclosure, and the meanings of the terms of the present disclosure and each constituent element are not limited to those described in the above-described embodiments. The specific numerical values ​​shown in the above description are merely examples, and as a matter of course, they can be changed to various numerical values.

[0116] <<Supplementary Notes>> Supplementary notes are provided for the present disclosure, the specific configuration examples of which have been shown in the above-described embodiments.

[0117] A processing device (2) for a piezoelectric element according to one aspect of the present disclosure includes a transmitting circuit (10) configured to drive a piezoelectric element (3) to transmit a transmission wave signal (W1) from the piezoelectric element, a receiving circuit (31) configured to receive a reflected wave signal (W2) of the transmission wave signal by an object using the piezoelectric element or another piezoelectric element (3R), a receiving intensity signal generating circuit (33) configured to generate a receiving intensity signal (S33) representing the intensity of the signal received by the receiving circuit, a comparison signal generating circuit (34) configured to generate a comparison signal (S34) whose signal value changes with the lapse of time from a transmission start time of the transmission wave signal, a comparison circuit (35) configured to compare the receiving intensity signal with the comparison signal, and a signal output circuit (41) configured to be able to output a signal from a communication terminal (CM), the signal output circuit operating in any of a plurality of output modes, the plurality of output modes including a first output mode (MD) for outputting a signal based on a comparison result of the comparison circuit from the communication terminal. A ), and a second output mode (MD) in which a plurality of output target signals (S[1] to S[m]) are output from the communication terminal while being switched. B ), and the plurality of output target signals include a signal representing the waveform of the reception intensity signal and a signal representing the waveform of the comparison signal as two output target signals (S[1] and S[2]) (first configuration).

[0118] During the development or evaluation stage of a piezoelectric element processing device or a system including a piezoelectric element processing device, tasks such as parameter adjustment are necessary. By using the second output mode, it becomes possible to observe the waveforms of the reception intensity signal and the comparison signal through the communication terminal that is also used in the first output mode. As a result, it is expected that tasks such as parameter adjustment will become more efficient.

[0119] The processing device for piezoelectric elements according to the first configuration may further include a control circuit (50) configured to perform a measurement operation using the transmitting circuit, the receiving circuit, the receiving intensity signal generating circuit, the comparison signal generating circuit, the comparison circuit, and the signal output circuit, wherein the measurement operation includes a transmission operation that causes the transmitting circuit to transmit the transmission wave signal for a transmission setting time, and in the measurement operation in the first output mode, the signal output circuit outputs a signal based on the comparison result of the comparison circuit from the communication terminal, and in the measurement operation in the second output mode, the signal output circuit outputs the plurality of output target signals from the communication terminal while sequentially switching between them (second configuration).

[0120] This makes it possible to observe the waveforms of the reception intensity signal and the comparison signal during the same measurement operation, which is expected to improve the efficiency of parameter adjustment and other tasks.

[0121] In the processing apparatus for piezoelectric elements according to the second configuration, in the measurement operation in the second output mode, the signal output circuit outputs a signal at a period (P SW ) and outputting the plurality of output target signals from the communication terminal while periodically switching them in sequence (third configuration).

[0122] The processing device for piezoelectric elements according to the first configuration may further include a control circuit (50) configured to perform a measurement operation using the transmitting circuit, the receiving circuit, the receiving intensity signal generating circuit, the comparison signal generating circuit, the comparison circuit, and the signal output circuit, wherein the measurement operation includes a transmission operation in which the transmitting circuit transmits the transmission wave signal for a transmission setting time, and in the measurement operation in the first output mode, the signal output circuit outputs a signal based on the comparison result of the comparison circuit from the communication terminal, and in the measurement operation in the second output mode, the signal output circuit outputs any one of the plurality of output target signals from the communication terminal, and when the measurement operation is repeatedly performed a plurality of times in the second output mode, the signal output circuit may be configured to sequentially switch the signal output from the communication terminal between the plurality of output target signals each time the measurement operation is performed (fourth configuration).

[0123] This makes it possible to observe the waveforms of the reception strength signal and the comparison signal. As a result, it is expected that the efficiency of tasks such as parameter adjustment will be improved. Since the switching period of the output signal from the communication terminal is relatively long, there are fewer concerns about output tracking, etc.

[0124] In the processing device for piezoelectric elements according to the fourth configuration, when the measurement operation is repeatedly executed multiple times in the second output mode, the signal output circuit may be configured to output any one of the multiple output target signals from the communication terminal in the i-th measurement operation, and to output any other one of the multiple output target signals from the communication terminal in the (i+1)-th measurement operation, where i represents a natural number (fifth configuration).

[0125] In the processing device for piezoelectric elements according to any of the first to fifth configurations, each output target signal may be an analog signal having a potential ranging from a lower limit signal level to an upper limit signal level, and one of the plurality of output target signals may be a lower limit analog signal having the lower limit signal level or an upper limit analog signal having the upper limit signal level (sixth configuration).

[0126] This makes it possible to observe the waveforms of the reception intensity signal and the comparison signal after clearly recognizing the lower limit signal level or the upper limit signal level.

[0127] An ultrasonic sensor according to one aspect of the present disclosure is an ultrasonic sensor comprising a processing device for a piezoelectric element according to any of the first to sixth configurations described above, and the piezoelectric element, and the receiving circuit is configured to receive the reflected wave signal using the piezoelectric element (seventh configuration).

[0128] An ultrasonic sensor according to one aspect of the present disclosure is an ultrasonic sensor comprising a processing device for a piezoelectric element according to any one of the first to sixth configurations above, the piezoelectric element, and the other piezoelectric element, and the receiving circuit is configured to receive the reflected wave signal using the other piezoelectric element (eighth configuration).

[0129] REFERENCE SIGNS LIST 1 ultrasonic sensor 2 piezoelectric element control IC 3, 3R piezoelectric element 4 upper device 10 transmission circuit 11, 12 switching element 13 current source 30 reception processing block 31 reception circuit 32 ADC 33 signal processing circuit 34 comparison signal generation circuit 35 comparison circuit 36 ​​filter circuit 37 signal selection circuit 38 DAC 39 switching output circuit 40 selection designation circuit 41 signal output circuit 50 control circuit TR transformer L1 primary side coil L2 secondary side coil C0, C1, C2, C T Capacitor R0, R T Resistor OBJ Object to be detected W1 Transmitted wave signal W2 Reflected wave signal VCC Power supply voltage Sin Input signal PW Power supply terminal DRV1, DRV2 Output terminal IN1, IN2 Input terminal PGND Ground terminal CM Communication terminal S31, S32 Amplified received signal S33 Receiving strength signal S34 Comparison signal S35, S36 Comparison result signal S37 Selection signal S38 DAC output signal S39 IC output signal S40 Selection specification signal

Claims

1. A transmission circuit configured to drive a piezoelectric element to transmit a transmission wave signal from the piezoelectric element; a receiving circuit configured to receive a reflected wave signal of the transmitted wave signal by an object using the piezoelectric element or another piezoelectric element; a reception intensity signal generating circuit configured to generate a reception intensity signal representative of the intensity of a received signal at the receiving circuit; a comparison signal generating circuit configured to generate a comparison signal whose signal value changes with the passage of time from the transmission start time of the transmission wave signal; a comparison circuit configured to compare the received intensity signal with the comparison signal; A signal output circuit configured to be able to output a signal from the communication terminal, the signal output circuit operates in any one of a plurality of output modes; the plurality of output modes include a first output mode in which a signal based on a comparison result of the comparison circuit is output from the communication terminal, and a second output mode in which a plurality of output target signals are output from the communication terminal while being switched; The plurality of output target signals include a signal representing a waveform of the reception intensity signal and a signal representing a waveform of the comparison signal as two output target signals. , Processing equipment for piezoelectric elements.

2. a control circuit configured to execute a measurement operation using the transmission circuit, the reception circuit, the reception intensity signal generation circuit, the comparison signal generation circuit, the comparison circuit, and the signal output circuit, the measurement operation including a transmission operation for transmitting the transmission wave signal from the transmission circuit for a transmission setting time, In the measurement operation in the first output mode, the signal output circuit outputs a signal based on a comparison result of the comparison circuit from the communication terminal; In the measurement operation in the second output mode, the signal output circuit outputs the plurality of output target signals from the communication terminal while sequentially switching between the plurality of output target signals. The treatment device for piezoelectric elements according to claim 1 .

3. In the measurement operation in the second output mode, the signal output circuit outputs the plurality of output target signals from the communication terminal while periodically and sequentially switching the plurality of output target signals in a cycle shorter than an execution period of the measurement operation. The treatment device for piezoelectric elements according to claim 2 .

4. a control circuit configured to execute a measurement operation using the transmission circuit, the reception circuit, the reception intensity signal generation circuit, the comparison signal generation circuit, the comparison circuit, and the signal output circuit, the measurement operation including a transmission operation for transmitting the transmission wave signal from the transmission circuit for a transmission setting time, In the measurement operation in the first output mode, the signal output circuit outputs a signal based on a comparison result of the comparison circuit from the communication terminal; In the measurement operation in the second output mode, the signal output circuit outputs any one of the plurality of output target signals from the communication terminal; When the measurement operation is repeatedly performed a plurality of times in the second output mode, the signal output circuit sequentially switches the signal output from the communication terminal among the plurality of output target signals each time the measurement operation is performed. The treatment device for piezoelectric elements according to claim 1 .

5. When the measurement operation is repeatedly executed a plurality of times in the second output mode, the signal output circuit outputs one of the plurality of output target signals from the communication terminal in an i-th measurement operation, and outputs another one of the plurality of output target signals from the communication terminal in an (i+1)-th measurement operation, where i represents a natural number. The treatment device for piezoelectric elements according to claim 4 .

6. Each output target signal is an analog signal having a potential ranging from a lower limit signal level to an upper limit signal level, One of the plurality of output target signals is a lower limit analog signal having the lower limit signal level or an upper limit analog signal having the upper limit signal level.

6. The processing apparatus for a piezoelectric element according to claim 1.

7. A processing apparatus for a piezoelectric element according to any one of claims 1 to 5, An ultrasonic sensor comprising the piezoelectric element, The receiving circuit receives the reflected wave signal using the piezoelectric element. , ultrasonic sensors.

8. A processing apparatus for a piezoelectric element according to any one of claims 1 to 5, An ultrasonic sensor including the piezoelectric element and the other piezoelectric element, The receiving circuit receives the reflected wave signal using the other piezoelectric element. , ultrasonic sensors.