Laminated ceramic capacitor

JPWO2024075428A5Active Publication Date: 2025-04-22MURATA MFG CO LTD
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Patent Information

Application Number
JP2024555660
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2025-02-10
Publication Date
2025-04-22
Estimated Expiration
2043-08-27

AI Technical Summary

Technical Problem

The miniaturization of electronic devices has led to increased fragility of multilayer ceramic capacitors, making them prone to cracks during the reflow soldering process due to collisions with substrates or electrodes, as their mechanical strength against external forces is compromised.

Method used

A multilayer ceramic capacitor design featuring a ceramic body with a specific ridgeline geometry and embossed holes on the mounting surface, where the ridgelines are engineered to be thicker and the embossed holes provide impact resistance, reducing the likelihood of cracks during mounting.

Benefits of technology

The enhanced ridgeline geometry and embossed holes effectively mitigate the occurrence of cracks in the ceramic body during the mounting process, ensuring the capacitors' mechanical integrity and reliability in miniaturized electronic devices.

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Abstract

Provided is a laminated ceramic capacitor whereby cracking or the like is less likely to occur in a ceramic body. Provided is a laminated ceramic capacitor comprising: a ceramic body, in which a plurality of ceramic layers, a plurality of first internal electrodes, and a plurality of second internal electrodes are laminated in the height direction, and which has a first principal surface and a second principal surface that face one another in the height direction, a first end surface and a second end surface that face one another in the length direction orthogonal to the height direction, and a first side surface and a second side surface that face one another in the width direction orthogonal to the height direction and to the length direction; and a first external electrode and a second external electrode that are formed on an outer surface of the ceramic body. The first internal electrodes are drawn out to the first end surface and electrically connected with the first external electrode; and the second internal electrodes are drawn out to the second end surface and electrically connected with the second external electrode. When a cross-section parallel to the first side surface and the second side surface is viewed, the first external electrode is formed in an L-shape on the first end surface and the first principal surface, and the second external electrode is formed in an L-shape on the second end surface and the first principal surface; and an R-dimension of a ridge line where the first principal surface and the first end surface, the first side surface, the second end surface, and the second side surface are in contact is greater than an R-dimension of a ridge line where the second principal surface and the first end surface, the first side surface, the second end surface, and the second side surface are in contact.
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Description

Multilayer ceramic capacitors

[0001] The present invention relates to a multilayer ceramic capacitor.

[0002] Multilayer ceramic capacitors are widely used in various devices such as electronic devices and electric devices (hereinafter referred to as "electronic devices, etc.") For example, Patent Document 1 (Japanese Patent Laid-Open Publication No. 2000-100647) discloses a multilayer ceramic capacitor having a typical structure.

[0003] Recently, electronic devices have been rapidly becoming smaller and more functional. As a result of the miniaturization of electronic devices, the internal volume (spatial volume) of electronic devices that house electronic circuits made up of electronic components has become extremely small. Furthermore, as electronic devices become more functional, the number of electronic components required to configure an electronic circuit has increased rapidly.

[0004] Therefore, as electronic devices become smaller and more functional, there is a demand for smaller electronic components that make up electronic circuits. For example, in the case of multilayer ceramic capacitors, extremely thin products with ceramic bodies only a few tens of micrometers thick have been put into practical use.

[0005] Japanese Patent Application Laid-Open No. 2000-100647

[0006] As described above, as electronic devices and the like become smaller and more functional, there is a demand for smaller electronic components, particularly thinner ones. However, in the case of multilayer ceramic capacitors, as the components become thinner, a decrease in mechanical strength against external forces becomes a problem.

[0007] On the other hand, multilayer ceramic capacitors are often mounted on a substrate or a substrate-like device (hereinafter, both are collectively referred to as "substrate") by, for example, the following reflow soldering process.

[0008] First, a substrate to be mounted is prepared. Electrodes are formed on the main surfaces of the substrate, and cream solder is applied to the surfaces of the electrodes in advance. Next, a mounter device equipped with a nozzle is prepared. The top surface (second main surface) of the multilayer ceramic capacitor is then attracted to the nozzle, and the nozzle is then moved to place (place) the bottom surface (first main surface) of the multilayer ceramic capacitor on the pair of electrodes of the substrate that have been coated with the cream solder. Next, the substrate on which the multilayer ceramic capacitor is mounted is heated to melt the cream solder, and then the entire substrate is cooled to solidify the cream solder again, thereby mounting the multilayer ceramic capacitor to the electrodes of the substrate.

[0009] In this reflow soldering process, when a multilayer ceramic capacitor is placed on an electrode of a substrate using a nozzle, the ridges that form the outer edges of the bottom surface (first main surface) of the ceramic element collide with the substrate or the electrodes formed on the substrate, causing cracks and the like (hereinafter, "cracking," "breaking," "chipping," etc. are collectively referred to as "cracks and the like") in the ceramic element, which has become a problem. In particular, in multilayer ceramic capacitors that have been made thinner and have reduced mechanical strength against external forces, cracks and the like that occur in the ceramic element during mounting and the like have become an extremely serious problem.

[0010] Therefore, an object of the present invention is to provide a multilayer ceramic capacitor in which cracks or the like are unlikely to occur in the ceramic body even if the ridge line, which is the outer edge of the bottom surface (first main surface) of the ceramic body, collides with the substrate or an electrode formed on the substrate, for example, during mounting.

[0011] In order to solve the above-mentioned problems of the related art, a multilayer ceramic capacitor according to one embodiment of the present invention comprises a ceramic body in which a plurality of ceramic layers, a plurality of first internal electrodes, and a plurality of second internal electrodes are stacked in a height direction, the ceramic body having a first main surface and a second main surface opposing each other in the height direction, a first end surface and a second end surface opposing each other in a length direction perpendicular to the height direction, and a first side surface and a second side surface opposing each other in a width direction perpendicular to the height direction and the length direction, and a first external electrode and a second external electrode formed on an outer surface of the ceramic body, wherein the first internal electrode is extended to the first end surface. a first external electrode extended to a second end face and electrically connected to the first external electrode, and a second internal electrode extended to a second end face and electrically connected to the second external electrode, wherein, when viewed in a cross section parallel to the first side face and the second side face, the first external electrode is formed in an L-shape on the first end face and the first main face, and the second external electrode is formed in an L-shape on the second end face and the first main face, and the R dimension of the ridge line where the first main face meets the first end face, first side face, second end face, and second side face is larger than the R dimension of the ridge line where the second main face meets the first end face, first side face, second end face, and second side face.

[0012] In a multilayer ceramic capacitor according to one embodiment of the present invention, the R dimension of the ridges where the first main surface (bottom surface; mounting surface) meets the first end surface, the first side surface, the second end surface, and the second side surface is large, so that even if these ridges collide with the substrate or electrodes formed on the substrate during mounting, cracks are unlikely to occur in the ceramic body.

[0013] 1A is a perspective view of a multilayer ceramic capacitor 100 according to a first embodiment, showing the multilayer ceramic capacitor 100 from the first main surface 1A side. FIG. 1B is a perspective view of the multilayer ceramic capacitor 100, showing the multilayer ceramic capacitor 100 from the second main surface 1B side. FIG. 1C is a cross-sectional view of the multilayer ceramic capacitor 100, showing a cross section of the X-X portion indicated by the dashed-dotted arrow in FIG. 1A. FIG. 1D is a cross-sectional view of a main portion of the multilayer ceramic capacitor 100. FIG. 5A to FIG. 5D are explanatory diagrams showing steps in an example of a method for manufacturing the multilayer ceramic capacitor 100. FIG. 6E to FIG. 6J are continuations of FIG. 5D and are explanatory diagrams showing steps in an example of a method for manufacturing the multilayer ceramic capacitor 100. FIG. 8A to FIG. 8D are explanatory diagrams showing steps in an example of a method for manufacturing the multilayer ceramic capacitor 200. FIG. 9E to FIG. 9J are continuations of FIG. 8D and are explanatory diagrams showing steps in an example of a method for manufacturing the multilayer ceramic capacitor 200.

[0014] Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

[0015] It should be noted that each embodiment exemplifies an embodiment of the present invention, and the present invention is not limited to the content of the embodiment. Furthermore, it is possible to combine the contents described in different embodiments, and such combinations are also included in the present invention. Furthermore, the drawings are intended to facilitate understanding of the specification and may be drawn schematically, and the dimensional ratios of the depicted components or between the components may not match the dimensional ratios of those components described in the specification. Furthermore, components described in the specification may be omitted in the drawings, or the number of components may be omitted.

[0016] [First Embodiment] Figures 1, 2, 3, and 4 each show a multilayer ceramic capacitor 100 according to a first embodiment. However, Figure 1 is a perspective view of the multilayer ceramic capacitor 100, showing the multilayer ceramic capacitor 100 from the first main surface 1A side. Figure 2 is also a perspective view of the multilayer ceramic capacitor 100, showing the multilayer ceramic capacitor 100 from the second main surface 1B side. Figure 3 is a cross-sectional view of the multilayer ceramic capacitor 100, showing the cross section of the X-X portion indicated by the dashed-dotted arrow in Figure 1(A). Figure 4 is a cross-sectional view of a main portion of the multilayer ceramic capacitor 100.

[0017] The drawings show the height direction T, length direction L, and width direction W of the multilayer ceramic capacitor 100, and these directions may be referred to in the following description. In this embodiment, the stacking direction of ceramic layers 1 a, which will be described later, is the height direction T of the multilayer ceramic capacitor 100.

[0018] The multilayer ceramic capacitor 100 includes a ceramic body 1. The ceramic body 1 is a rectangular parallelepiped and has a first main surface 1A and a second main surface 1B that face each other in a height direction T, a first end surface 1C and a second end surface 1D that face each other in a length direction L, and a first side surface 1E and a second side surface 1F that face each other in a width direction W.

[0019] The dimensions of the ceramic body 1 are arbitrary, but for example, it is preferable that one of the dimensions in the length direction L and the width direction W is 1.0 mm or less and the other is 0.5 mm or less. It is also preferable that the dimension in the height direction T is 0.1 mm or less. When the present invention is implemented, even in such a miniaturized and thin-layered multilayer ceramic capacitor 100, as described below, the R dimensions of the ridgelines where the first main surface 1A, which is the mounting surface, meets the first end surface 1C, the first side surface 1E, the second end surface 1D, and the second side surface 1F are large. Therefore, even if the first main surface of the ceramic body 1 collides with the substrate or an electrode formed on the substrate during mounting, the occurrence of cracks or the like in the ceramic body 1 is suppressed.

[0020] The ceramic body 1 is formed by laminating ceramic layers 1a, first internal electrodes 2, second internal electrodes 3, and dummy internal electrodes 4. The ceramic layers 1a, the first internal electrodes 2, the second internal electrodes 3, and the dummy internal electrodes 4 are laminated in the height direction T of the ceramic body 1.

[0021] As will be described later, the dummy internal electrodes 4 are electrodes provided not primarily for forming capacitance but as underlying external electrodes for the first external electrodes 5 and second external electrodes 6 .

[0022] The ceramic body 1 (ceramic layer 1a) may be made of any material, for example, BaTiO 3 However, dielectric ceramics containing BaTiO as the main component can be used. 3 Instead of CaTiO 3 , SrTiO 3 , CaZrO 3 Dielectric ceramics containing other materials as main components may also be used.

[0023] The thickness of the ceramic layer 1a is arbitrary, but can be, for example, about 0.3 μm to 2.0 μm in the effective capacitance formation region where the first internal electrode 2 and the second internal electrode 3 are formed.

[0024] The number of ceramic layers 1a is arbitrary, but may be, for example, about 1 to 6000 layers in the effective capacitance forming region where the first internal electrode 2 and the second internal electrode 3 are formed.

[0025] On both the top and bottom of the ceramic body 1, protective layers (outer layers) are provided, each consisting of only ceramic layers 1a, without the first internal electrodes 2 and second internal electrodes 3. However, in this embodiment, dummy internal electrodes 4 are formed in the protective layers. The thickness of the protective layers is arbitrary, but may be, for example, approximately 5 μm to 150 μm. The thickness of the ceramic layers 1a of the protective layers may be greater than the thickness of the ceramic layers 1a in the effective region for capacitance formation, where the first internal electrodes 2 and second internal electrodes 3 are formed. The material of the ceramic layers 1a of the protective layers may be different from the material of the ceramic layers 1a in the effective region.

[0026] 3 , the first internal electrode 2 extends in the length direction L of the ceramic body 1, with one end extending to a first end face 1C of the ceramic body 1. The second internal electrode 3 extends in the length direction L of the ceramic body 1, with one end extending to a second end face 1D of the ceramic body 1. In principle, it is preferable that the first internal electrodes 2 and the second internal electrodes 3 be stacked alternately.

[0027] The dummy internal electrodes 4 provided as base external electrodes for the first external electrodes 5 and the second external electrodes 6 have a smaller dimension in the length direction L than the first internal electrodes 2 and the second internal electrodes 3. One end of the dummy internal electrodes 4 is extended to either the first end face 1C or the second end face 1D of the ceramic body 1. The dummy internal electrode 4 arranged closest to the first main surface 1A of the ceramic body 1 is exposed to the first main surface 1A of the ceramic body 1.

[0028] In addition, the dummy internal electrode 4 is arranged at least in the first external electrode 5 and the second external electrode 6, respectively, closest to the first main surface 1A of the ceramic body 1, and it is sufficient that there is one layer exposed on the first main surface of the ceramic body 1.

[0029] The material of the main component (metal component) of the first internal electrode 2, the second internal electrode 3, and the dummy internal electrode 4 may be any material, but in this embodiment, Ni is used. However, other metals such as Cu, Ag, Pd, and Au may be used instead of Ni. Furthermore, Ni, Cu, Ag, Pd, and Au may be alloyed with other metals. The first internal electrode 2, the second internal electrode 3, and the dummy internal electrode 4 may contain other components such as ceramic in addition to the metal component.

[0030] The thickness of the first internal electrode 2, the second internal electrode 3 and the dummy internal electrode 4 is arbitrary, but can be, for example, about 0.3 μm to 1.5 μm.

[0031] A first external electrode 5 and a second external electrode 6 are formed on the outer surfaces of the ceramic body 1. When viewed in a cross section parallel to the first side surface 1E and the second side surface 1F, the first external electrode 5 is formed in an L-shape on the first end surface 1C and the first main surface 1A, and the second external electrode 6 is formed in an L-shape on the second end surface 1D and the first main surface 1A. The first external electrode 5 is electrically connected to the first internal electrode 2 at the first end surface 1C. The second external electrode 6 is electrically connected to the second internal electrode 3 at the second end surface 1D.

[0032] The first external electrode 5 and the second external electrode 6 have the same multilayer structure. In this embodiment, the first external electrode 5 and the second external electrode 6 include, in order from the bottom, a base external electrode, a Cu-plated external electrode layer 7 formed on the outside of the base external electrode, a Ni-plated external electrode layer 8 formed on the outside of the Cu-plated external electrode layer 7, and an Au-plated external electrode layer 9 formed on the outside of the Ni-plated external electrode layer 8. However, the structure, materials, etc. of the first external electrode 5 and the second external electrode 6 are arbitrary and are not limited to these structures and materials. Furthermore, the dimensions such as thickness, width, and length of the first external electrode 5 and the second external electrode 6 are also arbitrary and can be freely set. In particular, various variations can be adopted for the number of layers, materials, dimensions, etc. of the plated external electrode layers.

[0033] Next, a description will be given of the underlying external electrodes of the first external electrode 5 and the second external electrode 6. The underlying external electrode is an electrode that serves as an underlying layer when a plated external electrode layer is formed on the outside thereof.

[0034] The base external electrode of the first external electrode 5 is composed of the ends of the first internal electrodes 2 and dummy internal electrodes 4 drawn to the first end face 1C, and the main surfaces of the dummy internal electrodes 4 exposed to the first main surface 1A. Fig. 3 illustrates a structure in which the first external electrode 5 includes four layers of dummy internal electrodes 4 as the base external electrode, the upper main surfaces of the dummy internal electrodes 4 arranged closest to the first main surface 1A being exposed to the first main surface 1A, and the ends of the remaining three layers of dummy internal electrodes 4 being drawn to the first end face 1C. However, the number of layers of the dummy internal electrodes 4 of the first external electrode 5 is arbitrary, and it is sufficient that the first external electrode 5 includes at least one layer arranged closest to the first main surface 1A of the ceramic body 1, the upper main surface of which is exposed from the first main surface 1A of the ceramic body 1 to the outside.

[0035] Similarly, the base external electrode of the second external electrode 6 is composed of ends of the second internal electrodes 3 and dummy internal electrodes 4 drawn to the second end surface 1D, and main surfaces of the dummy internal electrodes 4 exposed to the first main surface 1A. Figures 3 and 4 show an example of a structure in which the second external electrode 6 includes four layers of dummy internal electrodes 4 as base external electrodes, the upper main surfaces of the dummy internal electrodes 4 arranged closest to the first main surface 1A being exposed to the first main surface 1A, and the ends of the remaining three layers of dummy internal electrodes 4 being drawn to the second end surface 1D. However, the number of layers of the dummy internal electrodes 4 of the second external electrode 6 is arbitrary, and it is sufficient that the second external electrode 6 includes at least one layer arranged closest to the first main surface 1A of the ceramic body 1, the upper main surface of which is exposed from the first main surface 1A of the ceramic body 1 to the outside.

[0036] As described above, the end of the first internal electrode 2 extended to the first end face 1C of the ceramic body 1 and the end of the second internal electrode 3 extended to the second end face 1D of the ceramic body 1 are also part of the base external electrodes of the first external electrode 5 and the second external electrode 6. In order to avoid complicating the drawings, the end of the first internal electrode 2 and the end of the second internal electrode 3 are not shown as part of the first external electrode 5 and the second external electrode 6 in Figures 3 and 4 (lead lines from the reference numeral "5" in the figures indicating the first external electrode 5 and the reference numeral "6" in the figures indicating the second external electrode 6 are omitted).

[0037] The base external electrodes of the first external electrode 5 and the second external electrode 6 function as a base for forming, on the outside thereof, a Cu-plated external electrode layer 7. As described above, in this embodiment, the end of the first internal electrode 2 drawn out to the first end face 1C, the end of the dummy internal electrode 4, and the end of the second internal electrode 3 drawn out to the second end face 1D, and the end of the dummy internal electrode 4 are also part of the base external electrodes of the first external electrode 5 and the second external electrode 6. The ends of the plurality of linear first internal electrodes 2 extending in the width direction W and the ends of the dummy internal electrodes 4 are exposed on the first end face 1C, and the ends of the plurality of linear second internal electrodes 3 extending in the width direction W and the ends of the dummy internal electrodes 4 are exposed on the second end face 1D, respectively, at intervals (with the ends of the linear ceramic layers 1a extending in the width direction W sandwiched between them). However, even though the ends of the first internal electrodes 2, the ends of the second internal electrodes 3, and the ends of the dummy internal electrodes 4 are arranged at intervals, they function as a base when forming a plated external electrode layer.

[0038] The first external electrode 5 and the second external electrode 6 each have a Cu-plated external electrode layer 7 on the outside of the base external electrode. The Cu-plated external electrode layer 7 mainly functions to improve moisture resistance. It is also preferable that the Cu-plated external electrode layer 7 contains Ni. In this case, dissolution of the external electrode layer into the solder can be suppressed.

[0039] The first external electrode 5 and the second external electrode 6 each have a Ni-plated external electrode layer 8 on the outside of a Cu-plated external electrode layer 7. The Ni-plated external electrode layer 8 mainly functions to improve solder heat resistance and bondability. It is also preferable that the Ni-plated external electrode layer 8 contains P. In this case, the mechanical strength of the external electrode layer can be improved.

[0040] The first external electrode 5 and the second external electrode 6 each have an Au-plated external electrode layer 9 on the outside of the Ni-plated external electrode layer 8. The Au-plated external electrode layer 9 mainly serves to improve the wettability of the external electrode layer to solder.

[0041] As can be seen from Figures 1 and 2, in the multilayer ceramic capacitor 100 of this embodiment, the R dimensions of the ridge line E11 where the first main surface 1A and the first end surface 1C contact, the ridge line E12 where the first main surface 1A and the first side surface 1E contact, the ridge line E13 where the first main surface 1A and the second end surface 1D contact, and the ridge line E14 where the first main surface 1A and the second side surface 1F contact are larger than the R dimensions of the ridge line E21 where the second main surface 1B and the first end surface 1C contact, the ridge line E22 where the second main surface 1B and the first side surface 1E contact, the ridge line E23 where the second main surface 1B and the second end surface 1D contact, and the ridge line E24 where the second main surface 1B and the second side surface 1F contact.

[0042] In this embodiment, the manufacturing process includes an additional step of increasing the R dimension for ridgeline E11 where first main surface 1A and first end surface 1C meet, ridgeline E12 where first main surface 1A and first side surface 1E meet, ridgeline E13 where first main surface 1A and second end surface 1D meet, and ridgeline E14 where first main surface 1A and second side surface 1F meet. On the other hand, the manufacturing process does not include a step of increasing the R dimension for ridgeline E21 where second main surface 1B and first end surface 1C meet, ridgeline E22 where second main surface 1B and first side surface 1E meet, ridgeline E23 where second main surface 1B and second end surface 1D meet, and ridgeline E24 where second main surface 1B and second side surface 1F meet.

[0043] In the multilayer ceramic capacitor 100, the first main surface 1A of the ceramic body 1, which is provided with the first external electrode 5 and the second external electrode 6, is a mounting surface for a substrate (as described above, the term "substrate" includes "substrate-like objects"). The multilayer ceramic capacitor 100 has a large R dimension (large roundness) for each of the ridge lines E11 where the first main surface 1A and the first end surface 1C meet, the ridge line E12 where the first main surface 1A and the first side surface 1E meet, the ridge line E13 where the first main surface 1A and the second end surface 1D meet, and the ridge line E14 where the first main surface 1A and the second side surface 1F meet, which are provided on the mounting surface side. Therefore, when the multilayer ceramic capacitor 100 is placed (placed) on a substrate or the like for mounting, even if these ridge lines collide with the substrate or electrodes formed on the substrate, the impact is absorbed, and therefore the occurrence of cracks or the like in the ceramic body 1 is suppressed.

[0044] The R dimensions of the ridgeline E11 where the first main surface 1A and the first end surface 1C meet, the ridgeline E12 where the first main surface 1A and the first side surface 1E meet, the ridgeline E13 where the first main surface 1A and the second end surface 1D meet, and the ridgeline E14 where the first main surface 1A and the second side surface 1F meet are preferably, for example, approximately 1 μm or more and 10 μm or less. This is because if they are less than 1 μm, they are less effective in suppressing the occurrence of cracks and the like in the ceramic body 1. Furthermore, if they exceed 10 μm, the process of increasing the R dimensions of these ridgelines takes time, reducing the productivity of the multilayer ceramic capacitor. On the other hand, it is preferable that the R dimensions of each of ridgeline E21 where second main surface 1B and first end surface 1C meet, ridgeline E22 where second main surface 1B and first side surface 1E meet, ridgeline E23 where second main surface 1B and second end surface 1D meet, and ridgeline E24 where second main surface 1B and second side surface 1F meet are less than 1 μm, for example, because in this case, there is no need to provide a separate process for increasing the R dimensions of each of these ridgelines.

[0045] 1 and 2, the multilayer ceramic capacitor 100 of this embodiment has a corner C11 where the first main surface 1A, the first end surface 1C, and the first side surface 1E meet, a corner C12 where the first main surface 1A, the first side surface 1E, and the second end surface 1D meet, a corner C13 where the first main surface 1A, the second end surface 1D, and the second side surface 1F meet, a corner C14 where the first main surface 1A, the second side surface 1F, and the first end surface 1D meet, and a corner C15 where the first main surface 1A, the second side surface 1F, and the first end surface 1E meet. The R dimension of corner C14 where second main surface 1B, first end face 1C and first side face 1E meet is larger than the R dimensions of corner C21 where second main surface 1B, first side face 1E and second end face 1D meet, corner C22 where second main surface 1B, first side face 1E and second end face 1D meet, corner C23 where second main surface 1B, second end face 1D and second side face 1F meet, and corner C24 where second main surface 1B, second side face 1F and first end face 1C meet. This is because the R dimensions of each of the ridge lines E11 where first main surface 1A and first end surface 1C meet, the ridge line E12 where first main surface 1A and first side surface 1E meet, the ridge line E13 where first main surface 1A and second end surface 1D meet, and the ridge line E14 where first main surface 1A and second side surface 1F meet are larger than the R dimensions of each of the ridge lines E21 where second main surface 1B and first end surface 1C meet, the ridge line E22 where second main surface 1B and first side surface 1E meet, the ridge line E23 where second main surface 1B and second end surface 1D meet, and the ridge line E24 where second main surface 1B and second side surface 1F meet. In other words, the R dimension of the corner where two ridge lines with a larger R dimension intersect is larger than the R dimension of the corner where two ridge lines with a smaller R dimension intersect.

[0046] The multilayer ceramic capacitor 100 has large R dimensions at corners C11 on the mounting surface where the first main surface 1A, the first end surface 1C, and the first side surface 1E meet, corner C12 where the first main surface 1A, the first end surface 1E, and the second end surface 1D meet, corner C13 where the first main surface 1A, the second end surface 1D, and the second side surface 1F meet, and corner C14 where the first main surface 1A, the second side surface 1F, and the first end surface 1C meet. Therefore, when the multilayer ceramic capacitor 100 is placed on a substrate or the like for mounting, even if these corners collide with the substrate or an electrode formed on the substrate, the impact is mitigated, and the occurrence of cracks or the like in the ceramic body 1 is suppressed.

[0047] The multilayer ceramic capacitor 100 of this embodiment has a plurality of embossed holes 10 formed in the second main surface 1B of the ceramic body 1. In this embodiment, the plurality of embossed holes 10 having the same shape and the same dimensions are formed in the second main surface 1B of the ceramic body 1 in a state aligned in the length direction L and the width direction W.

[0048] In the present application, the term "embossed holes" refers to bottomed holes having a concave surface. The concave surface may be hemispherical or non-hemispherical. The dimensions, number, arrangement, spacing, and area of ​​the embossed holes 10 are arbitrary and can be set as appropriate. The method for forming the embossed holes 10 is also arbitrary. Whether or not the embossed holes 10 are formed in the second main surface 1B can be easily confirmed by comparing them with other surfaces of the ceramic body 1 (for example, the first main surface 1A).

[0049] In the multilayer ceramic capacitor 100, the second main surface 1B of the ceramic body 1 is the surface that is sucked by, for example, a nozzle of a mounter during mounting, and is therefore likely to be subjected to impact from the nozzle. The multilayer ceramic capacitor 100 of this embodiment has multiple embossed holes 10 formed in the second main surface 1B of the ceramic body 1, making it resistant to impacts from a nozzle or the like, and suppressing the occurrence of cracks or the like in the ceramic body 1. Note that the embossed holes 10 can effectively improve the impact resistance of the ceramic body 1 if their depths are small enough to fit within one to several dozen ceramic layers 1a. However, if the embossed holes 10 are too deep, this can adversely reduce the overall strength of the ceramic body 1, so it is necessary to avoid making the depth of the embossed holes 10 too large.

[0050] The multilayer ceramic capacitor 100 of this embodiment can be manufactured, for example, by the method shown in FIGS.

[0051] 5(A) is prepared. The ceramic green sheets 11a are used to form the ceramic layers 1a of the ceramic body 1. The ceramic green sheets 11a are prepared as mother ceramic green sheets 50, in which a large number of the ceramic green sheets 11a are arranged in a matrix, in order to collectively manufacture a large number of multilayer ceramic capacitors 100.

[0052] Although not shown in the drawings, first, a dielectric ceramic powder, a binder resin, a solvent, etc. are prepared and wet-mixed to prepare a ceramic slurry.

[0053] Next, the ceramic slurry is applied in a sheet form onto a carrier film using a die coater, gravure coater, microgravure coater, or the like, and dried to prepare a mother ceramic green sheet 50 .

[0054] 5(A), a conductive paste 12 for forming the first internal electrodes 2, a conductive paste 13 for forming the second internal electrodes 3, and a conductive paste 14 for forming the dummy internal electrodes 4, which have been prepared in advance, are applied (for example, printed) in a desired pattern shape to the main surface of a predetermined ceramic green sheet 11a in the mother ceramic green sheet 50. The conductive paste may be, for example, a mixture of a solvent, a binder resin, a metal powder (for example, Ni powder), etc.

[0055] Next, as shown in FIG. 5(B), the mother ceramic green sheets 50 are stacked in a predetermined order and pressed together to produce a mother green ceramic body 60 in which a large number of green ceramic bodies 11 are arranged in a matrix.

[0056] Next, as shown in Fig. 5(C), a jig 70 is prepared, which has a plurality of protrusions 70a formed on its upper main surface. Subsequently, the lower main surface of the mother green ceramic body 60 is pressed against the protrusions 70a of the jig 70. As a result, as shown in Fig. 4(D), a plurality of embossed holes 10 are formed in the second main surface 1B of each green ceramic body 11 of the mother green ceramic body 60.

[0057] Next, as shown in FIG. 6(E), the mother green ceramic body 60 is cut into individual green ceramic bodies 11.

[0058] Next, the unsintered ceramic body 11 is fired according to a predetermined profile to produce the ceramic body 1 shown in Fig. 6(F) . At this time, inside the ceramic body 1, a conductive paste 12 is simultaneously fired to form a first internal electrode 2, a conductive paste 13 is simultaneously fired to form a second internal electrode 3, and a conductive paste 14 is simultaneously fired to form a dummy internal electrode 4.

[0059] 6(G), a jig 80 is prepared. The second main surface 1B of the ceramic body 1 is fixed to the upper main surface of the jig 80. Subsequently, the first main surface 1A of the ceramic body 1 is scraped by, for example, sandblasting, so that the upper main surfaces of the dummy internal electrodes 4 arranged closest to the first main surface 1A of the ceramic body 1 are exposed at the first main surface 1A of the ceramic body 1.

[0060] At the same time, the ridgeline E11 where the first main surface 1A and the first end surface 1C meet, the ridgeline E12 where the first main surface 1A and the first side surface 1E meet, the ridgeline E13 where the first main surface 1A and the second end surface 1D meet, and the ridgeline E14 where the first main surface 1A and the second side surface 1F meet are each cut away, and the ridgeline E11 where the first main surface 1A and the first end surface 1C meet, the ridgeline E12 where the first main surface 1A and the first side surface 1E meet, and the ridgeline E14 where the first main surface 1A and the first end surface 1C meet The R dimensions of the ridge line E13 where the first main surface 1A and the second end surface 1D meet, and the ridge line E14 where the first main surface 1A and the second side surface 1F meet, are larger (more rounded) than the R dimensions of the ridge line E21 where the second main surface 1B and the first end surface 1C meet, the ridge line E22 where the second main surface 1B and the first side surface 1E meet, the ridge line E23 where the second main surface 1B and the second end surface 1D meet, and the ridge line E24 where the second main surface 1B and the second side surface 1F meet.

[0061] Next, as shown in FIG. 6(H), the ends of the first internal electrodes 2, the second internal electrodes 3, and the dummy internal electrodes 4 drawn out to the first end face 1C and the second end face 1D, and the upper main surfaces of the dummy internal electrodes 4 exposed to the first main surface 1A are used as base external electrodes, and a predetermined catalyst is applied to the surfaces of these base external electrodes as necessary, and then electroless plating is performed to form a Cu-plated external electrode layer 7.

[0062] Next, as shown in FIG. 6(I), a predetermined catalyst is applied to the outside of the Cu-plated external electrode layer 7 as needed, and then electroless plating is performed to form a Ni-plated external electrode layer 8.

[0063] 6(J), a predetermined catalyst is applied, if necessary, to the outside of the Ni-plated external electrode layer 8, and then electroless plating is performed to form an Au-plated external electrode layer 9. As a result, an L-shaped first external electrode 5 is formed on the first end face 1C and first main surface 1A of the ceramic body 1, and an L-shaped second external electrode 6 is formed on the second end face 1D and first main surface 1A of the ceramic body 1, thereby completing the multilayer ceramic capacitor 100 according to the first embodiment.

[0064] Second Embodiment A multilayer ceramic capacitor 200 according to a second embodiment is shown in FIG.

[0065] The multilayer ceramic capacitor 200 according to the second embodiment is obtained by adding some modifications to the configuration of the multilayer ceramic capacitor 100 according to the first embodiment described above.

[0066] Specifically, in the multilayer ceramic capacitor 100, dummy internal electrodes 4 were used as part of the underlying external electrodes of the first external electrodes 5 and the second external electrodes 6. This is changed in the multilayer ceramic capacitor 200, and the dummy internal electrodes 4 are omitted. Instead, in the multilayer ceramic capacitor 200, NiCr thin film layers 27 are formed by sputtering as underlying external electrodes for the first external electrodes 25 and the second external electrodes 26. The NiCr thin film layers 27 have high adhesion to the ceramic body 1 and serve as excellent underlying external electrodes for the first external electrodes 25 and the second external electrodes 26.

[0067] Furthermore, in the multilayer ceramic capacitor 100, a Cu-plated external electrode layer 7, a Ni-plated external electrode layer 8, and an Au-plated external electrode layer 9 were provided in this order on the outside of the base external electrodes as the plated external electrode layers of the first external electrode 5 and the second external electrode 6. However, in the multilayer ceramic capacitor 200, this is changed, and a Ni-plated external electrode layer 28 and an Au-plated external electrode layer 29 are formed in this order on the outside of the NiCr thin film layer 27, which is the base external electrode, as the plated external electrode layers of the first external electrode 25 and the second external electrode 26.

[0068] The other configurations of the multilayer ceramic capacitor 200 were the same as those of the multilayer ceramic capacitor 100 .

[0069] As with the multilayer ceramic capacitor 100, the R dimensions of the ridge line E11 where the first main surface 1A and the first end surface 1C meet, the ridge line E12 where the first main surface 1A and the first side surface 1E meet, the ridge line E13 where the first main surface 1A and the second end surface 1D meet, and the ridge line E14 where the first main surface 1A and the second side surface 1F meet are larger than the R dimensions of the ridge line E21 where the second main surface 1B and the first end surface 1C meet, the ridge line E22 where the second main surface 1B and the first side surface 1E meet, the ridge line E23 where the second main surface 1B and the second end surface 1D meet, and the ridge line E24 where the second main surface 1B and the second side surface 1F meet. Therefore, when the multilayer ceramic capacitor 200 is placed on a substrate or the like for mounting, even if these ridges collide with the substrate or electrodes formed on the substrate, the impact is mitigated, thereby preventing cracks from occurring in the ceramic body 1.

[0070] The multilayer ceramic capacitor 200 of this embodiment can be manufactured, for example, by the method shown in FIGS.

[0071] 8(A) is prepared. The ceramic green sheet 11a is used to produce the ceramic layers 1a of the ceramic body 1. The ceramic green sheet 11a is prepared as a mother ceramic green sheet 50 for collectively manufacturing a large number of multilayer ceramic capacitors 100.

[0072] 8(A), a conductive paste 12 for forming the first internal electrodes 2 and a conductive paste 13 for forming the second internal electrodes 3, which have been prepared in advance, are applied in desired patterns to the main surfaces of predetermined ceramic green sheets 11a in the mother ceramic green sheet 50. Note that, since the multilayer ceramic capacitor 200 does not include dummy internal electrodes, the conductive paste for forming dummy internal electrodes is not applied.

[0073] Next, as shown in FIG. 8B, the mother ceramic green sheets 50 are stacked in a predetermined order and pressed together to produce a mother unfired ceramic body 60.

[0074] Next, as shown in Figure 8(C), the lower main surface of the mother unsintered ceramic body 60 is pressed against a jig 70 having multiple protrusions 70a formed on its upper main surface, and as shown in Figure 8(D), multiple embossed holes 10 are formed in the second main surface 1B of each unsintered ceramic body 11.

[0075] Next, as shown in FIG. 9(E), the mother green ceramic body 60 is cut into individual green ceramic bodies 11.

[0076] Next, the green ceramic body 11 is fired according to a predetermined profile to produce the ceramic body 1 shown in FIG. 9(F).

[0077] 9(G), a jig 80 is prepared. The second main surface 1B of the ceramic body 1 is fixed to the upper main surface of the jig 80. Subsequently, for example, sandblasting is performed to remove the ridge line E11 where the first main surface 1A and the first end surface 1C meet, the ridge line E12 where the first main surface 1A and the first side surface 1E meet, the ridge line E13 where the first main surface 1A and the second end surface 1D meet, and the ridge line E14 where the first main surface 1A and the second side surface 1F meet, thereby increasing the R dimensions of these ridge lines.

[0078] Next, as shown in FIG. 9H, a NiCr thin film layer 27 is formed by sputtering as an underlying external electrode for the first external electrode 25 and the second external electrode 26 .

[0079] Next, as shown in FIG. 9(I), a predetermined catalyst is applied to the outside of the NiCr thin film layer 27, which is the base external electrode of the first external electrode 25 and the second external electrode 26, if necessary, and then electroless plating is performed to form a Ni-plated external electrode layer 28.

[0080] 9(J), a predetermined catalyst is applied, if necessary, to the outside of the Ni-plated external electrode layer 28, and then electroless plating is performed to form an Au-plated external electrode layer 29. As a result, an L-shaped first external electrode 25 is formed on the first end face 1C and first main surface 1A of the ceramic body 1, and an L-shaped second external electrode 26 is formed on the second end face 1D and first main surface 1A of the ceramic body 1, thereby completing the multilayer ceramic capacitor 200 according to the second embodiment.

[0081] The multilayer ceramic capacitors 100 and 200 according to the embodiments have been described above. However, the present invention is not limited to the above-described content, and various modifications can be made in accordance with the spirit of the invention.

[0082] For example, in the above embodiment, a process was provided to increase the R dimensions of the ridge line E11 where the first main surface 1A and the first end surface 1C meet, the ridge line E12 where the first main surface 1A and the first side surface 1E meet, the ridge line E13 where the first main surface 1A and the second end surface 1D meet, and the ridge line E14 where the first main surface 1A and the second side surface 1F meet, but no process was provided to increase the R dimensions of the ridge line E21 where the second main surface 1B and the first end surface 1C meet, the ridge line E22 where the second main surface 1B and the first side surface 1E meet, the ridge line E23 where the second main surface 1B and the second end surface 1D meet, and the ridge line E24 where the second main surface 1B and the second side surface 1F meet. However, this has been modified by adding a step of increasing the R dimensions of the ridgeline E21 where the second main surface 1B and the first end surface 1C meet, the ridgeline E22 where the second main surface 1B and the first side surface 1E meet, the ridgeline E23 where the second main surface 1B and the second end surface 1D meet, and the ridgeline E24 where the second main surface 1B and the second side surface 1F meet. By varying the degree to which the R dimensions are increased in the two steps, the ridgeline E11 where the first main surface 1A and the first end surface 1C meet, the ridgeline E22 where the second main surface 1B and the first side surface 1E meet, the ridgeline E23 where the second main surface 1B and the second end surface 1D meet, and the ridgeline E24 where the second main surface 1B and the second side surface 1F meet can be increased. The R dimensions of the ridge line E12 where the surface 1A and the first side surface 1E meet, the ridge line E13 where the first main surface 1A and the second end surface 1D meet, and the ridge line E14 where the first main surface 1A and the second side surface 1F meet may be larger than the R dimensions of the ridge line E21 where the second main surface 1B and the first end surface 1C meet, the ridge line E22 where the second main surface 1B and the first side surface 1E meet, the ridge line E23 where the second main surface 1B and the second end surface 1D meet, and the ridge line E24 where the second main surface 1B and the second side surface 1F meet.

[0083] Furthermore, in the above embodiment, the embossed holes 10 are formed in the second main surface 1B of the ceramic body 1, but in the multilayer ceramic capacitor of the present invention, the embossed holes 10 are not essential components and can be omitted.

[0084] A multilayer ceramic capacitor according to one embodiment of the present invention is as described in the section "Means for Solving the Problems."

[0085] In this multilayer ceramic capacitor, it is also preferable that the R dimension of the ridge lines where the first main surface meets the first end face, the second end face, the first side face, and the second side face is 1 μm or more and 10 μm or less. If it is less than 1 μm, the effect of suppressing the occurrence of cracks in the ceramic body when these ridge lines collide with a substrate or the like is small. Also, if it exceeds 10 μm, the process of increasing the R dimension of each of these ridge lines takes time, which reduces the productivity of the multilayer ceramic capacitor.

[0086] It is also preferable that the R dimensions of the corners where the first main surface, the first end face, and the first side face meet, the corners where the first main surface, the first side face, and the second end face meet, the corners where the first main surface, the second end face, and the second side face meet, and the corners where the first main surface, the second side face, and the first end face meet are larger than the R dimensions of the corners where the second main surface, the first end face, and the first side face meet, the corners where the second main surface, the first side face, and the second end face meet, the corners where the second main surface, the second end face, and the second side face meet, and the corners where the second main surface, the second side face, and the first end face meet. In this case, the corners on the mounting surface where the first main surface, the first end face, and the first side face meet, the corners where the first main surface, the first side face, and the second end face meet, the corners where the first main surface, the second end face, and the second side face meet, and the corners where the first main surface, the second side face, and the first end face meet have large R dimensions. Therefore, when the multilayer ceramic capacitor is placed on a substrate or the like for mounting, even if these corners collide with the substrate or an electrode formed on the substrate, the impact is mitigated, and the occurrence of cracks or the like in the ceramic element is suppressed.

[0087] It is also preferable that a plurality of embossed holes be formed in the second main surface of the ceramic body, which makes the ceramic body more resistant to impacts, for example, when the nozzle of a mounter device is used to suck the second main surface, and thus reduces the occurrence of cracks in the ceramic body.

[0088] It is also preferable that the first external electrode and the second external electrode each include a base external electrode and at least one plated external electrode layer formed on the outside of the base external electrode. In this case, the plated external electrode layer can be easily formed on the outside of the base external electrode by, for example, electroless plating.

[0089] Furthermore, it is also preferable that the base external electrode includes a dummy internal electrode that is smaller in length than the first internal electrode and the second internal electrode and that is exposed on the first main surface of the ceramic body. In this case, it is possible to easily form the first external electrode and the second external electrode that have a relatively large area on the first main surface of the ceramic body.

[0090] It is also preferable that the dummy internal electrodes, the first internal electrodes, and the second external electrodes are formed from the same material. In this case, there is no need to prepare a separate material for forming the dummy internal electrodes, which are base external electrodes, and productivity of the multilayer ceramic capacitor is improved.

[0091] It is also preferable that the dummy internal electrodes contain Ni as a main component. In this case, the ceramic body, the first internal electrodes, the second external electrodes, and the dummy internal electrodes can be easily produced by so-called co-firing.

[0092] It is also preferable that the underlying external electrodes are thin films, in which case the underlying external electrodes can be easily formed by, for example, sputtering.

[0093] In this case, it is also preferable that the thin film contains NiCr as its main component, which provides high adhesion to the ceramic body and serves as an excellent base external electrode for the first and second external electrodes.

[0094] It is also preferable that the plated external electrode layer includes at least one selected from a Cu-plated external electrode layer, a Ni-plated external electrode layer, and an Au-plated external electrode layer. In this case, various functions are exerted in each plated external electrode layer, and excellent first and second external electrodes can be formed.

[0095] It is also preferable that the plated external electrode layer includes a Ni-plated external electrode layer formed on the outside of the base external electrode and an Au-plated external electrode layer formed on the outside of the Ni-plated external electrode layer. In this case, the Ni-plated external electrode layer can mainly function to improve solder heat resistance and bondability, and the Au-plated external electrode layer 9 can mainly function to improve the wettability of the external electrode layer to solder.

[0096] It is also preferable that the plated external electrode layer includes a Cu-plated external electrode layer formed on the outside of the base external electrode, a Ni-plated external electrode layer formed on the outside of the Cu-plated external electrode layer, and an Au-plated external electrode layer formed on the outside of the Ni-plated external electrode layer. In this case, the Cu-plated external electrode layer 7 can mainly function to improve moisture resistance, the Ni-plated external electrode layer can mainly function to improve solder heat resistance and bondability, and the Au-plated external electrode layer 9 can mainly function to improve the wettability of the external electrode layer to solder.

[0097] It is also preferable that the Ni-plated external electrode layers contain P. In this case, the mechanical strength of the external electrode layers is improved.

[0098] It is also preferable that the Cu-plated external electrode layers contain Ni, which can suppress dissolution of the external electrode layers into the solder.

[0099] It is also preferable that one of the lengthwise dimension and the widthwise dimension is 1.0 mm or less, and the other is 0.5 mm or less. It is also preferable that the heightwise dimension is 0.1 mm or less. Even when the present invention is applied to a miniaturized and thin-layered multilayer ceramic capacitor, the large R dimensions of the ridgelines where the first main surface (mounting surface) meets the first end face, first side face, second end face, and second side face are large. Therefore, even if these ridgelines collide with the substrate or electrodes formed on the substrate during mounting, the occurrence of cracks or the like in the ceramic body is suppressed.

[0100] DESCRIPTION OF SYMBOLS 1: Ceramic element body 1a: Ceramic layer 1A: First main surface 1B: Second main surface 1C: First end surface 1D: Second end surface 1E: First side surface 1F: Second side surface 2: First internal electrode 3: Second internal electrode 4: Dummy internal electrode 5: First external electrode 6: Second external electrode 7: Cu-plated external electrode layer 8, 28: Ni-plated external electrode layer 9, 29: Au-plated external electrode layer 27: NiCr thin film layer (base external electrode) 10: Embossed hole

Claims

1. a ceramic body in which a plurality of ceramic layers, a plurality of first internal electrodes, and a plurality of second internal electrodes are stacked in a height direction, the ceramic body having a first main surface and a second main surface opposed to each other in the height direction, a first end surface and a second end surface opposed to each other in a length direction perpendicular to the height direction, and a first side surface and a second side surface opposed to each other in a width direction perpendicular to the height direction and the length direction; a first external electrode and a second external electrode formed on an outer surface of the ceramic body, the first internal electrode is extended to the first end surface and electrically connected to the first external electrode; the second internal electrode is extended to the second end surface and electrically connected to the second external electrode, When viewed in a cross section parallel to the first side surface and the second side surface, the first external electrode is formed in an L-shape on the first end surface and the first main surface; the second external electrode is formed in an L-shape on the second end surface and the first main surface, The R dimension of a ridge line where the first main surface contacts the first end surface, the first side surface, the second end surface, and the second side surface is the second main surface is larger than the R dimension of a ridge line where the second main surface is in contact with the first end surface, the first side surface, the second end surface, and the second side surface; Multilayer ceramic capacitor.

2. The R dimension of a ridge line where the first main surface contacts the first end surface, the first side surface, the second end surface, and the second side surface is 1 μm or more and 10 μm or less; 2. The multilayer ceramic capacitor according to claim 1.

3. R dimensions of a corner where the first main surface, the first end surface, and the first side surface contact, a corner where the first main surface, the first side surface, and the second end surface contact, a corner where the first main surface, the second end surface, and the second side surface contact, and a corner where the first main surface, the second side surface, and the first end surface contact are is larger than the R dimensions of a corner where the second main surface, the first end surface, and the first side surface contact, a corner where the second main surface, the first side surface, and the second end surface contact, a corner where the second main surface, the second end surface, and the second side surface contact, and a corner where the second main surface, the second side surface, and the first end surface contact.

3. A multilayer ceramic capacitor according to claim 1 or 2.

4. A plurality of embossed holes are formed on the second main surface.

3. A multilayer ceramic capacitor according to claim 1 or 2.

5. The first external electrode and the second external electrode each have A base external electrode; At least one plated external electrode layer formed on the outside of the base external electrode.

3. A multilayer ceramic capacitor according to claim 1 or 2.

6. The base external electrode is a dummy internal electrode having a dimension in the longitudinal direction smaller than the first internal electrode and the second internal electrode and exposed to the first main surface of the ceramic body; 6. A multilayer ceramic capacitor according to claim 5.

7. The dummy internal electrode, the first internal electrode, and the second internal electrode are formed of the same material.

7. A multilayer ceramic capacitor according to claim 6.

8. The dummy internal electrode is mainly composed of Ni.

7. A multilayer ceramic capacitor according to claim 6.

9. The base external electrode is a thin film.

6. A multilayer ceramic capacitor according to claim 5.

10. The thin film is mainly composed of NiCr.

10. The multilayer ceramic capacitor according to claim 9.

11. The plated external electrode layer is At least one selected from a Cu-plated external electrode layer, a Ni-plated external electrode layer, and an Au-plated external electrode layer is included.

6. A multilayer ceramic capacitor according to claim 5.

12. The plated external electrode layer is a Ni-plated external electrode layer formed on the outside of the base external electrode; and an Au-plated external electrode layer formed on the outside of the Ni-plated external electrode layer. The multilayer ceramic capacitor according to claim 11.

13. The plated external electrode layer is a Cu-plated external electrode layer formed on the outside of the base external electrode; a Ni-plated external electrode layer formed on the outside of the Cu-plated external electrode layer; and an Au-plated external electrode layer formed on the outside of the Ni-plated external electrode layer. The multilayer ceramic capacitor according to claim 11.

14. The Ni-plated external electrode layer contains P. The multilayer ceramic capacitor according to claim 11.

15. The Cu-plated external electrode layer contains Ni. The multilayer ceramic capacitor according to claim 11.

16. One of the length direction dimension and the width direction dimension is 1.0 mm or less, and the other is 0.5 mm or less.

3. A multilayer ceramic capacitor according to claim 1 or 2.

17. The dimension in the height direction is 0.1 mm or less.

3. A multilayer ceramic capacitor according to claim 1 or 2.