Semiconductor device, power conversion device, and semiconductor device production method

Abstract

The present invention provides a highly reliable semiconductor device by suppressing damage to a semiconductor element and changes in the properties thereof and suppressing the occurrence of insulation defects between conductor patterns of a substrate. A semiconductor device according to the present disclosure comprises: a substrate 20; a semiconductor element 4 that is joined to the substrate 20; a power lead 3 that has an adhesion part 30 in which is formed an adhesion surface 30a facing the substrate 20; an insulating adhesive 40 that is provided between the substrate 20 and the adhesion surface 30a formed in the adhesion part 30 of the power lead 3, and that adheres the substrate 20 and the adhesion surface 30a formed in the adhesion part 30 of the power lead 3; a conductive wire 8a that connects the substrate 20 and the power lead 3; and a resin sealing body 7 that seals the substrate 20, the semiconductor element 4, at least part of the power lead 3, the adhesive 40, and the wire 8a.

Description

Semiconductor device, power conversion device, and method of manufacturing the semiconductor device

[0001] The present disclosure relates to a semiconductor device, a power conversion device, and a method for manufacturing a semiconductor device.

[0002] In semiconductor devices, a substrate on which a semiconductor element is mounted and leads constituting a lead frame are attached to a case, and the case is then filled with resin to seal the device. Another known sealing structure, which does not use a case, involves placing the substrate on which a semiconductor element is mounted and the leads in a mold, filling the mold with resin, and sealing the device by transfer molding. This structure, which does not use a case, allows for a reduction in the overall dimensions of the semiconductor device (see, for example, Patent Document 1).

[0003] Japanese Patent Application Publication No. 7-45765

[0004] In the conventional semiconductor device described in Patent Document 1, the substrate and leads are not attached to a case, so the relative positions of the substrate and leads must be accurately defined. However, due to manufacturing variations during the manufacture of semiconductor devices, it is difficult to maintain the distance between the substrate and the leads as designed. Therefore, if the distance between the substrate and the leads is greater than the specified distance, unjoined portions due to soldering between the substrate and the leads occur, resulting in reduced current-carrying capacity and damage or changes in the characteristics of the semiconductor element. Furthermore, if the distance between the substrate and the leads is smaller than the specified distance, solder may leak out from the lead joint surface to the surrounding area when the substrate and the leads are soldered, resulting in poor insulation between the conductor patterns on the substrate. Damage or changes in the characteristics of the semiconductor element or poor insulation between the conductor patterns on the substrate can lead to problems such as reduced reliability of the semiconductor device.

[0005] The present disclosure has been made to solve the above problems, and aims to obtain a highly reliable semiconductor device by suppressing damage and changes in characteristics of semiconductor elements, as well as the occurrence of poor insulation between conductor patterns on a substrate.

[0006] The semiconductor device of the present disclosure comprises a substrate, a semiconductor element bonded to the substrate, a power lead having an adhesive portion formed with an adhesive surface facing the substrate, an insulating adhesive provided between the substrate and the adhesive surface formed on the adhesive portion of the power lead and bonding the substrate and the adhesive surface formed on the adhesive portion of the power lead, a conductive wire connecting the substrate and the power lead, and a resin sealant that seals the substrate, the semiconductor element, at least a portion of the power lead, the adhesive, and the wire.

[0007] A power conversion device according to the present disclosure includes a main conversion circuit that has the semiconductor device described above and converts and outputs input power, and a control circuit that outputs a control signal to the main conversion circuit to control the main conversion circuit.

[0008] The method for manufacturing a semiconductor device in the present disclosure includes a lead bonding process in which an insulating adhesive is sandwiched between a substrate, the power lead is positioned so that the adhesive surface formed on the adhesive portion of the power lead faces the substrate, and the substrate and the adhesive surface formed on the adhesive portion of the power lead are bonded together; a semiconductor element bonding process in which a semiconductor element is bonded to the substrate; a wire wiring process in which the substrate to which the semiconductor element is bonded and the power lead bonded to the substrate are connected by a conductive wire; and after the wire wiring process, a sealing process in which the substrate, the semiconductor element, at least a portion of the power lead bonded to the substrate, and the wire are resin-sealed.

[0009] According to the present disclosure, by suppressing damage and characteristic changes of semiconductor elements and the occurrence of insulation defects between conductor patterns on a substrate, a highly reliable semiconductor device, a power conversion device, and a method for manufacturing the semiconductor device can be obtained. Furthermore, objects, features, aspects, and advantages related to the technology disclosed in the present specification will become more apparent from the detailed description provided below and the accompanying drawings.

[0010] FIG. 1 is a plan view showing a semiconductor device in a first embodiment of the present disclosure. FIG. 2 is a schematic cross-sectional view showing a semiconductor device in a first embodiment of the present disclosure. FIG. 3 is a plan view of a main portion showing a semiconductor device in a first embodiment of the present disclosure. FIG. 4 is a flowchart showing a method for manufacturing a semiconductor device in a first embodiment of the present disclosure. FIG. 5 is a schematic cross-sectional view showing a modified example of a semiconductor device in a first embodiment of the present disclosure. FIG. 6 is a schematic cross-sectional view showing a main portion showing a modified example of a semiconductor device in a first embodiment of the present disclosure. FIG. 7 is a schematic cross-sectional view showing a semiconductor device in a second embodiment of the present disclosure. FIG. 8 is a schematic cross-sectional view showing a semiconductor device in a third embodiment of the present disclosure. FIG. 9 is a partial schematic plan view showing a semiconductor device in a third embodiment of the present disclosure. FIG. 10 is a plan view of a main portion showing a semiconductor device in a fourth embodiment of the present disclosure. FIG. 11 is a block diagram showing a configuration of a power conversion system in a fifth embodiment of the present disclosure.

[0011] Each embodiment will be described below with reference to the drawings. In the following drawings, identical or corresponding parts are designated by the same reference numerals, and their description will not be repeated. Furthermore, an XYZ Cartesian coordinate system is defined so that the Z direction is the vertical direction and the XY plane is the horizontal plane. Furthermore, when a positive or negative sign is assigned to a direction, the following description will be given assuming that the +X, +Y, and +Z directions indicate the arrow directions of the Cartesian coordinate system shown in each drawing.

[0012] Embodiment 1. The configuration of a semiconductor device according to embodiment 1 of the present disclosure will be described with reference to Figures 1 to 3. Figure 1 is a plan view showing the semiconductor device according to embodiment 1 of the present disclosure. Figure 2 is a schematic cross-sectional view showing the semiconductor device according to embodiment 1 of the present disclosure. Figure 3 is a plan view of a main portion of the semiconductor device according to embodiment 1 of the present disclosure. Figure 3 shows the positional relationship between a substrate 20 and power leads 3, which are leads.

[0013] 1, semiconductor device 100 is transfer molded with a resin encapsulant 7, with a heat sink 1 exposed on one side as a heat dissipation surface, and has a plurality of power leads 3 and a plurality of control leads 5 protruding from resin encapsulant 7. Power leads 3 are main terminals, and control leads 5 are signal terminals. Note that power leads 3 and control leads 5 are collectively referred to as leads.

[0014] 2 and 3, the semiconductor device 100 includes a flat heat sink 1 arranged parallel to the XY plane, a substrate 20 having an insulating sheet 2 that is an insulating substrate provided on the heat sink 1 and an electrically conductive conductor layer 11 arranged on the surface of the insulating sheet 2, a semiconductor element 4 joined to the conductor layer 11 via solder as a joining member, power leads 3 and control leads 5 that are bonded to the conductor layer 11 via an insulating adhesive 40, a control element 6 joined to the control lead 5 via solder as a joining member, a first power wire 8a that is a wire electrically connecting the conductor layer 11 and the power lead 3, a second power wire 8b that is a wire electrically connecting the semiconductor element 4 and the power lead 3, a signal wire 9 that electrically connects the semiconductor element 4 and the control element 6, and a control wire 10 that electrically connects the control element 6 and the control lead 5, and a resin sealing body 7 that seals the substrate 20, the semiconductor element 4, at least a portion of the power leads 3 and the control lead 5, the first power wire 8a, the second power wire 8b, and the signal wire 9. The power lead 3 is bonded to the conductive layer 11 of the substrate 20 via an adhesive portion 30. The configuration of the adhesive portion 30 will be described later. The power lead 3 is disposed on an end portion of the substrate 20. The control lead 5 is disposed near the end portion of the substrate 20 opposite to the end portion where the power lead 3 is disposed. The first power wire 8a and the second power wire 8b are collectively referred to as the power wire 8.

[0015] The heat sink 1 can radiate heat generated inside the semiconductor device 100 to the outside by attaching, for example, heat dissipation fins (not shown). The heat sink 1 is made of, for example, an alloy of aluminum (Al) with added magnesium (Mg) or manganese (Mn). The material of the heat sink 1 may be other metals, or may be an inorganic or organic material with high thermal conductivity.

[0016] The insulating sheet 2 is a sheet made of insulating filler and resin, and is bonded to the heat sink 1. Instead of the insulating sheet 2, a ceramic substrate, a metal substrate with an insulating member sandwiched between layers, or a glass epoxy substrate may be used.

[0017] The power lead 3 is made of copper (Cu) and has a bent structure. The power lead 3 includes an adhesive portion 30 that is bonded to the conductive layer 11 via an adhesive 40, and a lead portion 33. The adhesive portion 30 has a flat plate shape and has an adhesive surface 30a that faces the conductive layer 11 of the substrate 20. That is, the conductive layer 11 of the substrate 20 and the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3 are bonded to each other via the adhesive 40. The lead portion 33 is connected to the adhesive portion 30. In FIG. 2, L indicates the distance between the conductive layer 11 of the substrate 20 and the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3. The lead portion 33, whose boundary is indicated by line A-A in FIG. 2, is composed of an internal power lead 31 sealed within the resin sealing body 7 and an external power lead 32 that protrudes from the resin sealing body 7 in the +X direction.

[0018] The internal power lead 31 includes an inclined portion 31a and a flat portion 31b. The flat portion 31b is spaced apart from the conductive layer 11 and has a flat plate shape extending parallel to the surface of the conductive layer 11. The adhesive portion 30 and the flat portion 31b of the internal power lead 31 are connected by the inclined portion 31a. This inclined portion 31a also has the effect of absorbing variations in the distance L between the substrate 20 and the adhesive surface 30a. Line CC in FIG. 2 indicates the boundary between the inclined portion 31a and the flat portion 31b of the internal power lead 31. Line DD in FIG. 2 indicates the boundary between the inclined portion 31a and the adhesive portion 30. In other words, in the power lead 3, a step portion including the inclined portion 31a is formed in the internal power lead 31 connected to the adhesive portion 30.

[0019] The external power lead 32 is bent in the +Z direction, which is the side opposite to the side where the heat sink 1 is provided in the semiconductor device 100, and its surface is plated with tin (Sn).

[0020] The first power wire 8a electrically connects the flat portion 31b of the internal power lead 31 to the conductive layer 11 so as to straddle the step portion including the inclined portion 31a. The number of first power wires 8a is not particularly limited. Furthermore, since the first power wire 8a is arranged so as to straddle the step portion including the inclined portion 31a, the first power wire 8a can function as a reinforcing member for the step portion including the inclined portion 31a between the substrate 20 and the power lead 3. Note that the first power wire 8a electrically connects the flat portion 31b of the internal power lead 31 to the conductive layer 11, but this is not a limitation. The first power wire 8a may also electrically connect the inclined portion 31a of the internal power lead 31 to the conductive layer 11. Even when provided in this manner, the first power wire 8a can function as a reinforcing member for the step portion including the inclined portion 31a. Furthermore, the first power wire 8a is bent so that the central portion of the first power wire 8a is away from the step portion including the inclined portion 31a, but the first power wire 8a may also be linear.

[0021] The first power wire 8a and the second power wire 8b are made of, for example, aluminum (Al), which is a metal with high electrical conductivity. However, the material of the first power wire 8a and the second power wire 8b is not limited to aluminum. The material of the first power wire 8a and the second power wire 8b may be, for example, an aluminum alloy containing a small amount of an additive such as iron (Fe) or copper (Cu) as long as it is a metal with high electrical conductivity.

[0022] The adhesive 40 is provided between the conductive layer 11 of the substrate 20 and the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3, and bonds the conductive layer 11 of the substrate 20 and the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3. As shown in Figures 2 and 3, the adhesive 40 may be provided over the entire area of ​​the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3, or may be provided over a partial area of ​​the adhesive surface 30a.

[0023] The adhesive 40 is liquid at room temperature and is made of a material containing an insulating thermosetting resin with a curing temperature of 100 to 240°C, and is preferably made of a material containing at least one of silicone-based resin, epoxy-based resin, and acrylic-based resin. The adhesive 40 made of a material containing a thermosetting resin may be made liquid using a solvent. In this embodiment, an adhesive containing a silicone-based resin is used. The curing time of the adhesive 40 can be adjusted to a desired time by adjusting the ratio of the thermosetting resin contained in the adhesive 40; for example, the curing time can be adjusted to within 60 to 120 seconds.

[0024] Furthermore, the adhesive 40 is not limited to a material containing a thermosetting resin, but may also be made of a material containing a UV-curable resin, which is an insulating photo-curable resin. The adhesive 40 made of a material containing a UV-curable resin is liquid at room temperature. The material containing a UV-curable resin is preferably made of a material containing at least one of a silicone-based resin, a cationic polymerization epoxy-based resin, and a radical polymerization acrylic-based resin. The curing time of the adhesive 40 can be adjusted to a desired time by adjusting the ratio of the UV-curable resin contained in the adhesive 40 and the cumulative amount of UV light irradiated. For example, the curing time can be adjusted to within a range of 5 to 120 seconds.

[0025] The adhesive 40 may be made of an insulating composite material in which the above-mentioned thermosetting resin or photocurable resin is used as a main component and a filler, etc. In this case, as in the above, the curing time can be adjusted to a desired time by adjusting the ratio of the thermosetting resin contained in the adhesive 40 and the temperature at which the adhesive 40 is heated, or by adjusting the ratio of the UV-curable resin contained in the adhesive 40 and the integrated amount of UV light irradiated onto the adhesive 40.

[0026] The semiconductor element 4 is an IGBT (Insulated Gate Bipolar Transistor) using silicon (Si) as a semiconductor material. The semiconductor element 4 is bonded to a conductive layer 11 of a substrate 20 using solder as a bonding material. A gate electrode (not shown) of the semiconductor element 4 is electrically connected to an internal power lead 31 via a second power wire 8b and to a control element 6 (described later) via a signal wire 9. The control element 6 and the semiconductor element 4 transmit and receive signals to and from each other via the signal wire 9. The signal wire 9 is made of a metal such as gold (Au), copper (Cu), or a copper alloy.

[0027] In this embodiment, a semiconductor device including an IGBT as the semiconductor element 4 will be described, but the present invention is not limited thereto and may include a semiconductor element such as a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) or a diode. In addition, in this embodiment, an example will be described in which the semiconductor element 4 uses Si as the semiconductor material, but the present invention is not limited thereto and may use a wide bandgap semiconductor material such as silicon carbide (SiC), gallium nitride (GaN), or diamond (C).

[0028] The control lead 5 is made of copper (Cu) and has a bent structure. As the boundary line of the control lead 5 is shown by line B-B in Figure 2, the control lead 5 is composed of an internal control lead 51 provided inside the resin sealing body 7 and an external control lead 52 protruding from the resin sealing body 7 in the -X direction. The internal control lead 51 has a planar structure, and is equipped with a control element 6. The external control lead 52 is bent in the +Z direction, and its surface is tin (Sn) plated.

[0029] The control element 6 is soldered onto the internal control lead 51. The control element 6 is electrically connected to the control lead 5 by a control wire 10. The material for joining the control element 6 and the internal control lead 51 is not limited to solder, and a die-bonding material such as silver paste may also be used.

[0030] The resin encapsulant 7 encapsulates at least the substrate 20, the semiconductor element 4, at least a portion of the power lead 3, the adhesive 40, and the first power wire 8a. The resin encapsulant 7 is formed by transfer molding. A portion of the power lead 3 and a portion of the control lead 5 include portions that protrude outside the resin encapsulant 7. That is, the external power lead 32 and the external control lead 52 are exposed outside the resin encapsulant 7. The back surface of the heat sink 1, which is the heat dissipation surface of the heat sink 1 and is opposite to the surface to which the insulating sheet 2 is connected, is exposed from the resin encapsulant 7. The resin encapsulant 7 is formed of an insulating resin such as an epoxy resin, a silicone resin, a urethane resin, a polyimide resin, a polyamide resin, or an acrylic resin, or an insulating composite material in which a filler is dispersed in any of these resins.

[0031] Next, a method for manufacturing a semiconductor device having a semiconductor element will be described. Fig. 4 is a flowchart showing the method for manufacturing a semiconductor device according to the first embodiment of the present disclosure.

[0032] 4 , the lead bonding process involves first sandwiching an insulating adhesive 40 between the conductive layer 11 of the substrate 20 and placing the power lead 3 so that the adhesive surface 30a formed on the adhesive portion 30 on the power lead 3 faces the conductive layer 11 of the substrate 20. That is, the adhesive 40 is placed at a specified position on the conductive layer 11 of the substrate 20, and the adhesive surface 30a formed on the adhesive portion 30 on the power lead 3 is placed on the adhesive 40.

[0033] When the adhesive 40 is made of a material containing a thermosetting resin, the liquid adhesive 40 wets and spreads over the entire area of ​​the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3. When the entire area of ​​the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3 is covered with the adhesive 40, the substrate 20 is heated to increase the temperature of the substrate 20, and the heat of the substrate 20 is transferred to the adhesive 40, accelerating the hardening of the adhesive 40 and completing the hardening of the adhesive 40.

[0034] Furthermore, when the adhesive 40 is made of a material containing a UV-curable resin, the liquid UV-curable resin wets and spreads over the entire area of ​​the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3. When the entire area of ​​the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3 is covered with the adhesive 40, the adhesive 40 is irradiated with UV light containing light in a wavelength range of 400 nm or less, thereby accelerating the hardening of the adhesive 40 and completing the hardening of the adhesive 40.

[0035] As a result, the conductive layer 11 of the substrate 20 and the adhesive surface 30 a formed on the adhesive portion 30 provided on the power lead 3 are bonded together by the adhesive 40 .

[0036] Next, in the semiconductor element bonding step of step S12 in Figure 4, first, the semiconductor element 4 is placed on the conductive layer 11 of the substrate 20 with solder, which is a bonding material, sandwiched therebetween. That is, solder is placed at a predetermined position on the conductive layer 11 of the substrate 20, and the semiconductor element 4 is placed on the solder. Similarly, solder is placed at a predetermined position on the internal control lead 51 of the control lead 5, and the control element 6 is placed on the solder. Then, an electrode (not shown) on the back surface of the semiconductor element 4 is bonded to the conductive layer 11 of the substrate 20 by heating the solder. Similarly, an electrode (not shown) on the back surface of the control element 6 is bonded to the internal control lead 51 of the control lead 5 by heating the solder.

[0037] In the method for manufacturing a semiconductor device, the lead bonding process of step S11 is followed by the semiconductor element bonding process of step S12, but the lead bonding process of step S11 may also be performed after the semiconductor element bonding process of step S12.

[0038] 4 , the conductive layer 11 of the substrate 20 to which the semiconductor element 4 is bonded is connected to the flat portion 31b of the internal power lead 31 provided on the power lead 3 by ultrasonic wire bonding using a first power wire 8a. That is, the conductive layer 11 of the substrate 20 is electrically connected to the internal power lead 31 provided on the power lead 3 bonded to the substrate 20 by the first power wire 8a. Similarly, the semiconductor element 4 is electrically connected to the power lead 3 bonded to the substrate 20 by a second power wire 8b. Similarly, the semiconductor element 4 is electrically connected to the control element 6 by a signal wire 9. Similarly, the control element 6 is electrically connected to the control lead 5 by a control wire 10.

[0039] Furthermore, in the sealing process of step S14 in FIG. 4 , the heat sink 1, the substrate 20 provided on the heat sink 1, the semiconductor element 4 bonded to the substrate 20, the power lead 3 (which is a lead bonded to the substrate 20), the control lead 5, the control element 6 bonded to the control lead 5, the first power wire 8a (which is a wire connecting the substrate 20 to the power lead 3), the second power wire 8b (which is a wire connecting the semiconductor element 4 to the power lead 3), the signal wire 9 (which connects the semiconductor element 4 to the control element 6), and the control wire 10 (which connects the control element 6 to the control lead 5) are placed in a mold (not shown). The substrate 20, the semiconductor element 4, at least a portion of the power lead 3 bonded to the substrate 20, the first power wire 8a, etc. are sealed in a pressurized and heated resin sealant 7 by transfer molding using a tablet-shaped molding resin. As a result, the outer shape of the semiconductor device 100 is formed by the resin sealant 7. One surface of the heat sink 1 is exposed from the resin sealant 7.

[0040] As described above, according to the first embodiment of the present disclosure, the semiconductor device 100 includes an insulating adhesive 40 provided between the substrate 20 and the adhesive surface 30 a formed on the adhesive portion 30 of the power lead 3, which bonds the substrate 20 and the adhesive surface 30 a formed on the adhesive portion 30 of the power lead 3, and a conductive first power wire 8 a which connects the substrate 20 and the power lead 3.

[0041] Furthermore, the substrate 20 has an insulating sheet 2 which is an insulating substrate and a conductive conductor layer 11 arranged on the surface of the insulating sheet 2, and the adhesive 40 is provided between the conductor layer 11 of the substrate 20 and the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3, and bonds the conductor layer 11 to the adhesive surface 30a formed on the adhesive portion 30.

[0042] The effects of the semiconductor device 100 according to the present disclosure are described below. In a semiconductor device 100 having a structure sealed by transfer molding, manufacturing variations during the manufacture of the semiconductor device 100 make it difficult to maintain the distance L between the substrate 20 and the adhesive surface 30 a formed on the adhesive portion 30 of the power lead 3 within the designed specification during the lead bonding process in step S11. Therefore, if the distance L between the substrate 20 and the adhesive surface 30 a exceeds the specified value, a solder-free portion will be formed between the substrate 20 and the adhesive surface 30 a when the substrate 20 and the adhesive surface 30 a are soldered together, resulting in a decrease in current-carrying capacity and damage or changes in the characteristics of the semiconductor element 4. Furthermore, if the distance L between the substrate 20 and the adhesive surface 30 a is smaller than the specified value, the solder will flow out of the adhesive surface 30 a and cause poor insulation between the conductor patterns of the substrate 20 when the substrate 20 and the adhesive surface 30 a are soldered together. If damage or changes in the characteristics of the semiconductor element 4 or poor insulation between the conductor patterns on the substrate 20 occurs, the reliability of the semiconductor device may be reduced.

[0043] By providing insulating adhesive 40 that bonds substrate 20 to bonding surface 30a formed on bonding portion 30 of power lead 3, and conductive first power wire 8a that connects substrate 20 to power lead 3, even if a portion not bonded by adhesive 40 occurs between substrate 20 and bonding surface 30a when distance L between substrate 20 and bonding surface 30a becomes larger than specified, current can flow without reducing current-carrying capacity because substrate 20 and power lead 3 are electrically connected by conductive first power wire 8a. As a result, damage or characteristic changes to semiconductor element 4 can be suppressed, and a highly reliable semiconductor device can be obtained.

[0044] Similarly, by providing an insulating adhesive 40 that bonds the substrate 20 to the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3, and a conductive first power wire 8a that connects the substrate 20 to the power lead 3, even if the adhesive 40 flows out from the adhesive surface 30a to the surrounding area when the distance L between the substrate 20 and the adhesive surface 30a becomes smaller than specified, the adhesive 40 is made of an insulating material, so that poor insulation between the conductor patterns of the substrate 20 can be prevented. As a result, damage or changes in characteristics of the semiconductor element 4 can be suppressed, and a highly reliable semiconductor device can be obtained.

[0045] In the semiconductor device 100 of this embodiment, of the power leads 3 and the control leads 5, which are leads, the adhesive surface 30a formed on the adhesive portion 30 provided on the power lead 3 is bonded to the conductive layer 11 of the substrate 20 by an insulating adhesive 40. In particular, when the substrate 20 and the adhesive portion 30 provided on the power lead 3 are joined by solder, unjoined portions by solder or the solder is likely to flow out of the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3 to the surrounding area.

[0046] A modified example of the semiconductor device according to the first embodiment of the present disclosure will be described. Fig. 5 is a schematic cross-sectional view showing a modified example of the semiconductor device according to the first embodiment of the present disclosure. Fig. 6 is a plan view of a main part showing a modified example of the semiconductor device according to the first embodiment of the present disclosure.

[0047] Semiconductor device 101 according to the modification of the first embodiment of the present disclosure differs from semiconductor device 100 in the shape of conductive layer 11 disposed on the surface of insulating sheet 2 constituting substrate 20. Also, the location where adhesive 40 is provided on substrate 20 differs from that of semiconductor device 100 according to the first embodiment of the present disclosure. The other configurations of semiconductor device 101 according to the modification of the first embodiment of the present disclosure are the same as the configurations of semiconductor device 100 according to the first embodiment of the present disclosure.

[0048] 5 and 6 , the semiconductor device 101 differs from the semiconductor device 100 in the shape of the conductive layer 11 disposed on the surface of the insulating sheet 2 constituting the substrate 20, and the insulating sheet 2 of the substrate 20, rather than the conductive layer 11 of the substrate 20, is provided at a position facing the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3. An adhesive 40 is provided between the insulating sheet 2 of the substrate 20 and the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3. In other words, the substrate 20 has the insulating sheet 2, which is an insulating substrate, and the conductive conductive layer 11 disposed on the surface of the insulating sheet 2, and the adhesive 40 is provided between the insulating sheet 2 of the substrate 20 and the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3, and bonds the insulating sheet 2 to the adhesive surface 30a formed on the adhesive portion 30.

[0049] Next, a method for manufacturing a semiconductor device according to a modification of the first embodiment of the present disclosure will be described. Note that the flowchart corresponding to the method for manufacturing a semiconductor device according to the modification of the first embodiment of the present disclosure corresponds to the flowchart illustrating the method for manufacturing a semiconductor device according to the first embodiment of the present disclosure shown in FIG. 4 . Furthermore, the semiconductor element bonding step, wire wiring step, and encapsulation step according to the modification of the first embodiment of the present disclosure are similar to the semiconductor element bonding step, wire wiring step, and encapsulation step according to the first embodiment of the present disclosure. Therefore, in the modification of the first embodiment of the present disclosure, a description of the steps similar to those of the first embodiment of the present disclosure will be omitted.

[0050] 4 , in the manufacturing method of a semiconductor device according to the modified example of the first embodiment of the present disclosure, first, as the lead bonding step of step S11 in Fig. 4 , adhesive 40 is sandwiched between insulating sheet 2 of substrate 20, and power leads 3 are arranged so that adhesive surfaces 30a formed on adhesive portions 30 thereof face insulating sheet 2 of substrate 20, as shown in Fig. 5 and Fig. 6 . That is, adhesive 40 is arranged at a specified position on insulating sheet 2 of substrate 20, and power leads 3 are arranged so that adhesive surfaces 30a formed on adhesive portions 30 thereof come into contact with adhesive 40.

[0051] Next, by hardening the adhesive 40 in the same manner as in the first embodiment of the present disclosure, the insulating sheet 2 of the substrate 20 and the adhesive surface 30a formed on the adhesive portion 30 provided on the power lead 3 are bonded together by the adhesive 40.

[0052] 2 and 3 can be obtained with the semiconductor device 101 configured in this manner. Furthermore, because the adhesive 40 bonds the insulating sheet 2 of the substrate 20 to the bonding surface 30a of the power lead 3, the conductive layer 11 facing the bonding surface 30a of the power lead 3 is not required, and the material for the conductive layer 11 can be reduced. Furthermore, there is no need to consider the position of the adhesive 40 on the conductive layer 11 of the substrate 20, and this improves the degree of freedom in designing the layout of the semiconductor elements and wiring on the conductive layer 11.

[0053] Second Embodiment The configuration of a semiconductor device according to a second embodiment of the present disclosure will be described with reference to Fig. 7. Fig. 7 is a cross-sectional schematic diagram showing the semiconductor device according to the second embodiment of the present disclosure.

[0054] The semiconductor device 200 according to the second embodiment of the present disclosure differs from the semiconductor device 100 according to the first embodiment of the present disclosure in the shape of the power leads 3. The semiconductor device 200 according to the second embodiment of the present disclosure also differs from the semiconductor device 100 according to the first embodiment of the present disclosure in that a support member 41 is provided between the substrate 20 and the power leads 3. The other configurations of the semiconductor device 200 according to the second embodiment of the present disclosure are the same as those of the semiconductor device 100 according to the first embodiment of the present disclosure. The following description will be limited to the case where the adhesive 40 is provided between the conductive layer 11 of the substrate 20 and the adhesive portion 30 of the power leads 3 to bond the conductive layer 11 to the adhesive portion 30. However, it goes without saying that the following description also applies to the case where the adhesive 40 is provided between the insulating sheet 2 of the substrate 20 and the adhesive portion 30 of the power leads 3 to bond the insulating sheet 2 to the adhesive portion 30.

[0055] 7, the semiconductor device 200 differs from the semiconductor device 100 in the shape of the power leads 3, and the internal power leads 31 do not include inclined portions 31a but include flat portions 31b. The flat portions 31b are spaced apart from the conductive layer 11 and the insulating sheet 2 and have a flat plate shape extending parallel to the surfaces of the conductive layer 11 and the insulating sheet 2. The adhesive portion 30 and the flat portions 31b of the internal power leads 31 are connected. Line E-E in FIG. 7 indicates the boundary between the adhesive portion 30 and the flat portions 31b of the internal power leads 31.

[0056] The semiconductor device 200 includes a support member 41 between the conductive layer 11 of the substrate 20 and the adhesive surface 30 a formed on the adhesive portion 30 of the power lead 3. The support member 41 is a spacer member formed of a silicone-based resin and has a rectangular prism shape having a front surface and a back surface. Although the second embodiment of the present disclosure describes a case in which the support member 41 is formed of a silicone-based resin, the present disclosure is not limited to this. The support member 41 may be formed of any resin having heat resistance and insulating properties, such as a polyimide-based resin or an epoxy-based resin. Although the second embodiment of the present disclosure describes the support member 41 as having a rectangular prism shape, the support member 41 does not necessarily have to have a strict rectangular prism shape. For example, the support member 41 may have a cylindrical or polygonal prism shape having a front surface and a back surface, depending on the shape of the adhesive surface 30 a formed on the adhesive portion 30 of the power lead 3.

[0057] The semiconductor device 200 also includes an adhesive 40 composed of a first adhesive 40a and a second adhesive 40b. The first adhesive 40a is provided between the conductive layer 11 of the substrate 20 and the rear surface of the support member 41, and bonds the conductive layer 11 of the substrate 20 to the rear surface of the support member 41. The second adhesive 40b is provided between the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3 and the surface of the support member 41, and bonds the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3 to the surface of the support member 41.

[0058] Next, a method for manufacturing a semiconductor device according to a second embodiment of the present disclosure will be described. Note that the flowchart corresponding to the method for manufacturing a semiconductor device according to the second embodiment of the present disclosure corresponds to the flowchart illustrating the method for manufacturing a semiconductor device according to the first embodiment of the present disclosure shown in FIG. 4 . Furthermore, the semiconductor element bonding step, the wire wiring step, and the encapsulation step according to the second embodiment of the present disclosure are similar to the semiconductor element bonding step, the wire wiring step, and the encapsulation step according to the first embodiment of the present disclosure. Therefore, in the second embodiment of the present disclosure, a description of the steps similar to those in the first embodiment of the present disclosure will be omitted.

[0059] 4, in the manufacturing method of the semiconductor device according to the second embodiment of the present disclosure, first, as shown in Fig. 7, in the lead bonding step of step S11, a first adhesive 40a is placed at a specified position on the conductive layer 11 of the substrate 20, and the back surface of the support member 41 is placed so as to contact the first adhesive 40a. Next, a second adhesive 40b is placed so as to contact the front surface of the support member 41, and the adhesive surface 30a formed on the adhesive portion 30 provided on the power lead 3 is placed so as to contact the second adhesive 40b.

[0060] Next, by hardening the first adhesive 40a and the second adhesive 40b in the same manner as the hardening method of the adhesive 40 in embodiment 1 of the present disclosure, the conductive layer 11 of the substrate 20 and the rear surface of the support member 41 are bonded together by the first adhesive 40a, and the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3 and the surface of the support member 41 are bonded together by the second adhesive 40b.

[0061] As described above, according to the second embodiment of the present disclosure, the semiconductor device 200 further includes a support member 41 having a front surface and a back surface, and is disposed between the substrate 20 and the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3, and the adhesive 40 is composed of a first adhesive 40a and a second adhesive 40b, the first adhesive 40a being provided between the substrate 20 and the back surface of the support member 41 and bonding the substrate 20 to the back surface of the support member 41, and the second adhesive 40b being provided between the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3 and the surface of the support member 41 and bonding the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3 to the surface of the support member 41.

[0062] Because the support member 41 is a spacer member made of resin, the shape of the support member 41 can be easily adjusted. Therefore, the support member 41 functions as a spacer member supporting the power leads 3 so that the adhesive surfaces 30a formed on the adhesive portions 30 of the power leads 3 are positioned at a desired distance from the conductive layer 11 of the substrate 20. This eliminates the need to form inclined portions in the power leads 3 according to the distance between the substrate 20 and the power leads 3, making the manufacture of the power leads 3 easier. Furthermore, because the support member 41 is less likely to be significantly deformed by the weight of the power leads 3 or the like, the distance between the substrate 20 and the adhesive surfaces 30a formed on the adhesive portions 30 of the power leads 3 can be adjusted with high precision, resulting in a highly reliable semiconductor device.

[0063] Furthermore, by forming the support member 41 from a resin with high insulating properties, the influence on the electrical characteristics of the entire semiconductor device 200 can be suppressed, and a semiconductor device with improved reliability can be obtained.

[0064] Embodiment 3. The configuration of a semiconductor device according to embodiment 3 of the present disclosure will be described with reference to Figures 8 and 9. Figure 8 is a schematic cross-sectional view showing the semiconductor device according to embodiment 3 of the present disclosure. Figure 9 is a partial schematic plan view showing the semiconductor device according to embodiment 3 of the present disclosure, and is a partial plan view showing the adhesive surface 30a within the dotted line frame as viewed in the direction of adhesive surface 30a formed in adhesive portion 30 of power lead 3 facing from the surface of conductive layer 11 of substrate 20, as indicated by arrow Z1 in Figure 8.

[0065] In the semiconductor device 300 according to the third embodiment of the present disclosure, the shape of the power leads 3 is different from that of the semiconductor device 100 according to the first embodiment of the present disclosure. The other configurations of the semiconductor device 300 according to the third embodiment of the present disclosure are the same as those of the semiconductor device 100 according to the first embodiment of the present disclosure. Also, although only a case where the adhesive 40 is provided between the conductive layer 11 of the substrate 20 and the adhesive portion 30 of the power lead 3 to bond the conductive layer 11 to the adhesive portion 30 will be described here, it goes without saying that the following description also applies to a case where the adhesive 40 is provided between the insulating sheet 2 of the substrate 20 and the adhesive portion 30 of the power lead 3 to bond the insulating sheet 2 to the adhesive portion 30.

[0066] As shown in Fig. 8, the semiconductor device 300 further has a recess 34a formed on the bonding surface 30a formed on the bonding portion 30 of the power lead 3. The recess 34a, as viewed from the direction of arrow Z1 in Fig. 8, has a circular shape in plan view, as shown in Fig. 9A, a partial plan view within the dotted line frame in Fig. 8. The adhesive 40 is held by the recess 34a.

[0067] As described above, according to the third embodiment of the present disclosure, the semiconductor device 300 has the depression 34 a on the adhesive surface 30 a formed on the adhesive portion 30 of the power lead 3 .

[0068] In this way, by further providing a recess 34a on the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3, when the adhesive 40 is provided between the conductive layer 11 of the substrate 20 and the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3, the adhesive portion 30 can stably hold the liquid adhesive 40, thereby obtaining a highly reliable semiconductor device.

[0069] According to the third embodiment of the present disclosure, as shown in Fig. 9(A), the depression 34a formed on the bonding surface 30a of the bonding portion 30 of the power lead 3 is circular in plan view. However, this is not limiting. Regarding the shape of the depression, for example, as shown in Fig. 9(B), depression 34b may be elliptical in plan view, and as shown in Fig. 9(C), depression 34c may be rectangular in plan view. The depression 34b shown in Fig. 9(B) and depression 34c shown in Fig. 9(C) thus formed can also achieve the same effect as depression 34a shown in Fig. 9(A).

[0070] Fourth Embodiment The configuration of a semiconductor device according to a fourth embodiment of the present disclosure will be described with reference to Fig. 10. Fig. 10 is a plan view of a main part showing a semiconductor device according to the fourth embodiment of the present disclosure.

[0071] In the semiconductor device 400 according to the fourth embodiment of the present disclosure, the shape of the internal power lead 131 is different from that of the internal power lead 31 in the semiconductor device 100 according to the first embodiment of the present disclosure. The other configurations of the semiconductor device 400 according to the fourth embodiment of the present disclosure are the same as those of the semiconductor device 100 according to the first embodiment of the present disclosure.

[0072] 10 , the semiconductor device 400 has a plurality of adhesive portions 30 connected to the inclined portions 131 a of the internal power leads 131. The adhesives 40 are disposed at predetermined positions on the conductive layer 11 of the substrate 20.

[0073] In the semiconductor device disclosed herein, due to manufacturing variations when manufacturing the semiconductor device, it may be difficult to maintain the distance L between the substrate 20 and the adhesive surface 30a formed on the adhesive portion 30 of the power lead 3 at a designed standard in the lead bonding process of step S11. Therefore, by providing a plurality of adhesive portions 30 connected to the inclined portions 131a of the internal power leads 131, even if part of the distance L between the substrate 20 and the adhesive surface 30a becomes larger than the standard, the total adhesive area between the substrate 20 and the adhesive surface 30a can be increased, and stability against manufacturing variations can be improved.

[0074] Furthermore, by providing multiple adhesive portions 30 connected to the inclined portions 131a of the internal power leads 131, the total adhesive area between the substrate 20 and the adhesive surface 30a increases, thereby avoiding problems such as peeling between the substrate 20 and the adhesive surface 30a in processes after lead bonding.

[0075] Fifth Embodiment In a fifth embodiment of the present disclosure, the semiconductor device according to any one of the first to third embodiments is applied to a power conversion device. Although the present disclosure is not limited to a specific power conversion device, the following will describe a case where the present disclosure is applied to a three-phase inverter as the fifth embodiment of the present disclosure.

[0076] FIG. 11 is a block diagram illustrating a configuration of a power conversion system to which a power conversion device according to a fifth embodiment of the present disclosure is applied.

[0077] The power conversion system shown in Fig. 11 is composed of a power supply 500, a power conversion device 600, and a load 700. The power supply 500 is a DC power supply and supplies DC power to the power conversion device 600. The power supply 500 can be composed of various elements, such as a DC system, a solar cell, or a storage battery, or it can be composed of a rectifier circuit connected to an AC system or an AC / DC converter. The power supply 500 can also be composed of a DC / DC converter that converts DC power output from the DC system into a predetermined power.

[0078] The power conversion device 600 is a three-phase inverter connected between the power supply 500 and the load 700, and converts DC power supplied from the power supply 500 into AC power and supplies the AC power to the load 700. As shown in Fig. 11 , the power conversion device 600 includes a main conversion circuit 601 that converts DC power into AC power and outputs it, and a control circuit 603 that outputs a control signal to the main conversion circuit 601 to control the main conversion circuit 601.

[0079] The load 700 is a three-phase electric motor driven by AC power supplied from the power conversion device 600. The load 700 is not limited to a specific application, but is an electric motor mounted on various electrical devices, and is used as an electric motor for, for example, a hybrid vehicle, an electric vehicle, a railroad car, an elevator, or an air conditioning device.

[0080] The power conversion device 600 will be described in detail below. The main conversion circuit 601 includes switching elements and freewheel diodes (not shown). The switching elements convert DC power supplied from the power supply 500 into AC power, which is supplied to the load 700. The main conversion circuit 601 can have a variety of specific circuit configurations. The main conversion circuit 601 according to the fifth embodiment of the present disclosure is a two-level, three-phase full-bridge circuit, which can be configured with six switching elements and six freewheel diodes connected in anti-parallel to each switching element. Each switching element and freewheel diode of the main conversion circuit 601 is configured by a semiconductor device 602 corresponding to any one of the first, second, third, or fourth embodiments. Two of the six switching elements are connected in series to form upper and lower arms, which constitute a respective phase (U phase, V phase, and W phase) of the full-bridge circuit. The output terminals of each upper and lower arm, i.e., the three output terminals of the main conversion circuit 601, are connected to the load 700.

[0081] The main conversion circuit 601 also includes a drive circuit (not shown) that drives each switching element. The drive circuit may be built into the semiconductor device 602, or may be provided separately from the semiconductor device 602. The drive circuit generates drive signals that drive the switching elements of the main conversion circuit 601 and supplies them to the control electrodes of the switching elements of the main conversion circuit 601. Specifically, in accordance with control signals from a control circuit 603 (described later), the drive circuit outputs to the control electrodes of each switching element a drive signal that turns the switching element on and a drive signal that turns the switching element off. When maintaining a switching element in the on state, the drive signal is a voltage signal (on signal) that is equal to or greater than the threshold voltage of the switching element. When maintaining a switching element in the off state, the drive signal is a voltage signal (off signal) that is equal to or less than the threshold voltage of the switching element.

[0082] The control circuit 603 controls the switching elements of the main conversion circuit 601 so that the desired power is supplied to the load 700. Specifically, the control circuit 603 calculates the time (ON time) that each switching element of the main conversion circuit 601 should be in the ON state based on the power to be supplied to the load 700. For example, the main conversion circuit 601 can be controlled by PWM (Pulse Width Modulation) control, which modulates the ON time of the switching elements according to the voltage to be output. The control circuit 603 then outputs a control command (control signal) to a drive circuit included in the main conversion circuit 601 so that an ON signal is output to a switching element that should be in the ON state at each time point, and an OFF signal is output to a switching element that should be in the OFF state at each time point. In accordance with this control signal, the drive circuit outputs an ON signal or an OFF signal as a drive signal to the control electrode of each switching element.

[0083] In the power conversion device according to the fifth embodiment of the present disclosure, the semiconductor device according to any one of the first to fourth embodiments is applied as the switching element and the freewheeling diode of the main conversion circuit 601, thereby achieving improved reliability.

[0084] In the fifth embodiment of the present disclosure, an example in which the present disclosure is applied to a two-level three-phase inverter has been described, but the present disclosure is not limited thereto and can be applied to various power conversion devices. In the fifth embodiment of the present disclosure, a two-level power conversion device is described, but a three-level or multilevel power conversion device may also be used. Furthermore, when supplying power to a single-phase load, the present disclosure may also be applied to a single-phase inverter. Furthermore, when supplying power to a DC load, the present disclosure may also be applied to a DC / DC converter or an AC / DC converter.

[0085] Furthermore, the power conversion device to which the present disclosure is applied is not limited to cases in which the above-mentioned load is an electric motor, but can also be used, for example, as a power supply device for an electric discharge machine, a laser processing machine, an induction heating cooker, or a contactless power supply system, and can also be used as a power conditioner for a solar power generation system, a power storage system, etc.

[0086] The above describes in detail preferred embodiments, but the present invention is not limited to the above-described embodiments, and various modifications and substitutions can be made to the above-described embodiments without departing from the scope of the claims.

[0087] Various aspects of the present disclosure are summarized below as appendices.

[0088] (Supplementary Note 1) A semiconductor device comprising: a substrate; a semiconductor element bonded to the substrate; a power lead having an adhesive portion formed with an adhesive surface facing the substrate; an insulating adhesive provided between the substrate and the adhesive surface formed on the adhesive portion of the power lead, bonding the substrate and the adhesive surface formed on the adhesive portion of the power lead; a conductive wire connecting the substrate and the power lead; and a resin encapsulant encapsulating the substrate, the semiconductor element, at least a portion of the power lead, the adhesive, and the wire. (Supplementary Note 2) The semiconductor device according to Supplementary Note 1, wherein the power lead includes an internal power lead encapsulated with the resin encapsulant, the internal power lead having the adhesive portion, a flat portion, and an inclined portion connecting the adhesive portion and the flat portion. (Supplementary Note 3) The semiconductor device according to Supplementary Note 1 or 2, wherein the material of the adhesive includes at least one of a silicone-based resin, an epoxy-based resin, and an acrylic-based resin. (Supplementary Note 4) The semiconductor device according to any one of Supplements 1 to 3, wherein the material of the wire includes at least one of Al and Cu. (Supplementary Note 5) The semiconductor device according to any one of Supplementary Notes 1 to 4, wherein the substrate has an insulating substrate and a conductive conductor layer arranged on a surface of the insulating substrate, and the adhesive is provided between the conductive layer of the substrate and the adhesive surface formed in the adhesive portion of the power lead, bonding the conductive layer of the substrate to the adhesive surface formed in the adhesive portion of the power lead. (Supplementary Note 6) The semiconductor device according to any one of Supplementary Notes 1 to 4, wherein the substrate has an insulating substrate and a conductive conductor layer arranged on a surface of the insulating substrate, and the adhesive is provided between the insulating substrate of the substrate and the adhesive surface formed in the adhesive portion of the power lead, bonding the insulating substrate of the substrate to the adhesive surface formed in the adhesive portion of the power lead.(Supplementary Note 7) The semiconductor device according to any one of Supplementary Notes 1 to 6, further comprising a support member arranged between the substrate and the adhesive surface formed in the adhesive portion of the power lead, the support member having a front surface and a back surface, wherein the adhesive is composed of a first adhesive and a second adhesive, the first adhesive being provided between the substrate and the back surface of the support member and bonding the substrate to the back surface of the support member, and the second adhesive being provided between the adhesive surface formed in the adhesive portion of the power lead and the front surface of the support member and bonding the adhesive surface formed in the adhesive portion of the power lead to the front surface of the support member. (Supplementary Note 8) The semiconductor device according to any one of Supplementary Notes 1 to 7, wherein the power lead has a recess in the adhesive surface formed in the adhesive portion. (Supplementary Note 9) The semiconductor device according to Supplementary Note 2, wherein a plurality of the adhesive portions connecting to the inclined portions of the internal power leads are provided. (Supplementary Note 10) A power conversion device comprising: a main conversion circuit having the semiconductor device according to any one of Supplementary Notes 1 to 9, which converts and outputs input power; and a control circuit which outputs a control signal for controlling the main conversion circuit to the main conversion circuit. (Supplementary Note 11) A method for manufacturing a semiconductor device, comprising: a lead bonding step of sandwiching an insulating adhesive between a substrate and a power lead, arranging the power lead so that an adhesive surface formed in an adhesive portion of the power lead faces the substrate, and bonding the substrate and the adhesive surface formed in the adhesive portion of the power lead; a semiconductor element bonding step of bonding a semiconductor element to the substrate; a wire wiring step of connecting the substrate to which the semiconductor element is bonded and the power lead bonded to the substrate by a conductive wire; and a sealing step of, after the wire wiring step, sealing the substrate, the semiconductor element, at least a portion of the power lead, and the wire with resin.

[0089] 1 Heat sink, 2 Insulating sheet (insulating substrate), 3 Power lead (lead), 4 Semiconductor element, 5 Control lead (lead), 6 Control element, 7 Resin encapsulant, 8 Power wire (wire), 8a First power wire (wire), 8b Second power wire (wire), 9 Signal wire, 10 Control wire, 11 Conductor layer, 20 Substrate, 30 Adhesive portion, 30a Adhesive surface, 31, 131 Internal power lead, 31a, 131a Inclined portion, 31b Flat portion, 32 External power lead, 33 Lead portion, 34a, 34b, 34c Depression, 40 Adhesive, 40a First adhesive, 40b Second adhesive, 41 Support member, 51 Internal control lead, 52 External control lead, 100, 101, 200, 300, 400, 602 Semiconductor device, 500 Power supply, 600 Power conversion device, 601 main conversion circuit, 603 control circuit, 700 load.

Claims

1. A substrate; A semiconductor element bonded to the substrate; a power lead having an adhesive part formed with an adhesive surface facing the substrate; an insulating adhesive provided between the substrate and the adhesive surface formed on the adhesive portion of the power lead, the insulating adhesive bonding the substrate and the adhesive surface formed on the adhesive portion of the power lead; a conductive wire connecting the substrate and the power lead; a resin encapsulant that encapsulates the substrate, the semiconductor element, at least a portion of the power leads, the adhesive, and the wires; Equipped with the power lead has an inner power lead sealed with the resin sealant, the internal power lead has the adhesive portion, a flat portion, and an inclined portion connecting the adhesive portion and the flat portion; the wire connects the substrate and the planar portion; Semiconductor device.

2. The adhesive material includes at least one of a silicone resin, an epoxy resin, and an acrylic resin. The semiconductor device according to claim 1 .

3. 3. The semiconductor device according to claim 1, wherein the material of the wires includes at least one of Al and Cu.

4. The substrate includes an insulating substrate and a conductive layer disposed on a surface of the insulating substrate. The adhesive is provided between the conductive layer of the substrate and the adhesive surface formed on the adhesive portion of the power lead, and bonds the conductive layer of the substrate to the adhesive surface formed on the adhesive portion of the power lead.

3. The semiconductor device according to claim 1 or 2.

5. The substrate includes an insulating substrate and a conductive layer disposed on a surface of the insulating substrate. The adhesive is provided between the insulating substrate of the board and the adhesive surface formed in the adhesive portion of the power lead, and bonds the insulating substrate of the board and the adhesive surface formed in the adhesive portion of the power lead.

3. The semiconductor device according to claim 1 or 2.

6. a support member disposed between the substrate and the adhesive surface formed on the adhesive portion of the power lead, the support member having a front surface and a back surface; The adhesive is composed of a first adhesive and a second adhesive, the first adhesive being provided between the substrate and the rear surface of the support member and bonding the substrate and the rear surface of the support member, and the second adhesive being provided between the adhesive surface formed in the adhesive portion of the power lead and the front surface of the support member and bonding the adhesive surface formed in the adhesive portion of the power lead and the front surface of the support member.

3. The semiconductor device according to claim 1 or 2.

7. 3. The semiconductor device according to claim 1, wherein the power lead has a recess formed on the adhesive surface of the adhesive portion.

8. A plurality of the adhesive portions are provided to connect with the inclined portions of the internal power leads. The semiconductor device according to claim 1 .

9. a main conversion circuit including the semiconductor device according to claim 1 or 2, which converts input power and outputs the converted power; a control circuit that outputs a control signal for controlling the main conversion circuit to the main conversion circuit.

10. a lead bonding process for sandwiching an insulating adhesive between a substrate and a power lead such that a bonding surface formed on a bonding portion provided on an internal power lead of the power lead faces the substrate, and bonding the substrate and the bonding surface formed on the bonding portion of the internal power lead; a semiconductor element bonding step of bonding a semiconductor element to the substrate; a wiring step of connecting the substrate to which the semiconductor element is bonded and a flat portion of the internal power lead adhered to the substrate by a conductive wire; a sealing step of sealing, with a resin, the substrate, the semiconductor element, at least a portion of the power lead bonded to the substrate, and the wires after the wire wiring step; A method for manufacturing a semiconductor device comprising the steps of: