Semiconductor device

JPWO2024147302A5Pending Publication Date: 2025-09-16
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Patent Information

Application Number
JP2024568904
Authority / Receiving Office
JP · JP
Patent Type
Applications
Filing Date
2025-06-27
Publication Date
2025-09-16

AI Technical Summary

Technical Problem

Conventional semiconductor devices with multiple power semiconductor elements connected in parallel often experience oscillation phenomena during switching operations, leading to potential malfunctions or damage.

Method used

The semiconductor device incorporates a configuration with a first electrode, a second electrode, and a third electrode, along with capacitor elements connecting the conduction paths between these electrodes, to reduce oscillation by acting as a passive low-pass filter, effectively mitigating the oscillation frequency while allowing the drive signal to pass through.

Benefits of technology

This configuration significantly reduces oscillation phenomena during parallel operation of semiconductor elements, ensuring stable operation and extending the lifespan of the semiconductor device.

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Abstract

In the present invention, a semiconductor device comprises a plurality of parallel-connected semiconductor elements, a second terminal, a third terminal, a second continuity path, a third continuity path, and a capacitor element. Each semiconductor element has a first electrode, a second electrode, and a third electrode into which is inputted a drive signal that controls the state of continuity of the first electrode and the second electrode. The second electrode and second terminal of each of the semiconductor elements are caused to have continuity with each other on the second continuity path. The third electrode and third terminal of each of the semiconductor elements are caused to have continuity with each other on the third continuity path. The second continuity path and the third continuity path are interconnected by the capacitor element.
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Description

Semiconductor Devices

[0001] The present disclosure relates to semiconductor devices.

[0002] Conventionally, semiconductor devices including power semiconductor elements such as MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) and IGBTs (Insulated Gate Bipolar Transistors) have been known. In such semiconductor devices, a configuration in which multiple power semiconductor elements are connected in parallel to ensure the allowable current of the semiconductor device is known (see, for example, Patent Document 1). The power module described in Patent Document 1 includes multiple first semiconductor elements, multiple first connection wirings, a wiring layer, and a signal terminal. The multiple first semiconductor elements are, for example, MOSFETs. Each first semiconductor element is turned on and off in response to a drive signal input to its gate terminal. The multiple first semiconductor elements are connected in parallel. The multiple first connection wirings are, for example, wires, and connect the gate terminals of the multiple first semiconductor elements to the wiring layer. The wiring layer is connected to a signal terminal. The signal terminal is connected to the gate terminal of each first semiconductor element via the wiring layer and each first connection wiring. The signal terminal supplies a drive signal for driving each first semiconductor element to the gate terminal of each first semiconductor element.

[0003] JP 2016-225493 A

[0004] When multiple semiconductor elements are connected in parallel and used, as in the device disclosed in Patent Document 1, an oscillation phenomenon may occur when each semiconductor element is switched (on / off driven). This oscillation phenomenon may cause the drive signals of the multiple semiconductor elements to vibrate, which may cause each semiconductor element to malfunction or be destroyed.

[0005] An object of the present disclosure is to provide an improved semiconductor device compared to conventional semiconductor devices. In particular, in view of the above circumstances, an object of the present disclosure is to provide a semiconductor device that can reduce oscillations that occur when multiple semiconductor elements are operated in parallel.

[0006] A semiconductor device provided by a first aspect of the present disclosure comprises a plurality of semiconductor elements connected in parallel, each having a first electrode, a second electrode, and a third electrode to which a drive signal that controls the conduction state of the first electrode and the second electrode is input, a second terminal, a third terminal, a second conduction path that mutually connects the second electrode and the second terminal of each semiconductor element, a third conduction path that mutually connects the third electrode and the third terminal of each semiconductor element, and at least one capacitor element that mutually connects the second conduction path and the third conduction path.

[0007] According to the above configuration, it is possible to reduce the oscillation phenomenon that occurs when a plurality of semiconductor elements are operated in parallel in a semiconductor device.

[0008] FIG. 1 is a perspective view showing a semiconductor device according to a first embodiment. FIG. 2 is a plan view showing the semiconductor device according to the first embodiment, with the sealing member indicated by an imaginary line. FIG. 3 is a cross-sectional view taken along line III-III in FIG. 2. FIG. 4 is a cross-sectional view taken along line IV-IV in FIG. 2. FIG. 5 is a cross-sectional view taken along line V-V in FIG. 2. FIG. 6 is a diagram showing an example of a circuit configuration of a semiconductor device according to the first embodiment. FIG. 7 is a plan view showing a first modified example of the semiconductor device according to the first embodiment, with the sealing member indicated by an imaginary line. FIG. 8 is a plan view showing a second modified example of the semiconductor device according to the first embodiment, with the sealing member indicated by an imaginary line. FIG. 9 is a plan view showing a third modified example of the semiconductor device according to the first embodiment, with the sealing member indicated by an imaginary line. FIG. 10 is a plan view showing a fourth modified example of the semiconductor device according to the first embodiment, with the sealing member indicated by an imaginary line. FIG. 11 is a cross-sectional view showing an element package of a fourth modified example of the semiconductor device according to the first embodiment. FIG. 12 is a cross-sectional view showing another example of an element package of the fourth modified example of the semiconductor device according to the first embodiment. FIG. 13 is a perspective view showing a semiconductor device according to a second embodiment. FIG. 14 is a plan view showing the semiconductor device according to the second embodiment, with the sealing member indicated by imaginary lines. FIG. 15 is a view in which some connecting members and sealing members are omitted from the plan view of FIG. 14. FIG. 16 is a partially enlarged plan view of a main portion of FIG. 21. FIG. 17 is a partially enlarged plan view of a main portion of FIG. 21. FIG. 18 is a cross-sectional view taken along line XVIII-XVIII in FIG. 14. FIG. 19 is a perspective view showing a semiconductor device according to a third embodiment. FIG. 20 is a plan view showing a semiconductor device according to the third embodiment, with part of the case (top panel) and the resin member omitted. FIG. 21 is a cross-sectional view taken along line XXI-XXI in FIG. 20. FIG. 22 is a cross-sectional view taken along line XXII-XXII in FIG. 20. FIG. 23 is a cross-sectional view taken along line XXIII-XXIII in FIG. 20. Fig. 24 is a cross-sectional view taken along line XXIV-XXIV in Fig. 20. Fig. 25 is a cross-sectional view taken along line XXV-XXV in Fig. 20. Fig. 26 is an enlarged plan view of a main portion showing a first modified example of the semiconductor device according to the third embodiment. Fig. 27 is a diagram showing an example of a circuit configuration of the first modified example of the semiconductor device according to the third embodiment.

[0009] Preferred embodiments of the present disclosure will be described below with reference to the drawings. Hereinafter, identical or similar components will be designated by the same reference numerals, and redundant description will be omitted. The configurations of the various parts in the embodiments and variations described below can be combined with each other to the extent that no technical contradiction occurs. Terms such as "first," "second," and "third" in this disclosure are used merely as labels and are not intended to necessarily assign any order to the objects.

[0010] In the present disclosure, unless otherwise specified, the terms "a certain object A is formed on a certain object B" and "a certain object A is formed on (an) object B" may include "a certain object A is formed directly on a certain object B" and "a certain object A is formed on a certain object B with another object interposed between the certain object A and the certain object B." Similarly, the terms "a certain object A is disposed on a certain object B" and "a certain object A is disposed on (an) object B" may include "a certain object A is disposed directly on a certain object B" and "a certain object A is disposed on a certain object B with another object interposed between the certain object A and the certain object B" unless otherwise specified. Similarly, the term "a certain object A is located on (an) object B" may include "a certain object A is in contact with a certain object B and is located on (an) object B" and "a certain object A is located on (an) object B with another object interposed between the certain object A and the certain object B." Unless otherwise specified, "When viewed from a certain direction, an object A overlaps an object B" can include "an object A overlaps the entire object B" and "an object A overlaps a part of an object B." "An object A (a constituent material of an object A) contains a certain material C" can include "an object A (a constituent material of an object A) is made of a certain material C" and "an object A (a constituent material of an object A) mainly consists of a certain material C."

[0011] 1 to 6 show a semiconductor device A1 according to a first embodiment. The semiconductor device A1 may include a plurality of first semiconductor elements 11, a plurality of second semiconductor elements 12, a support substrate 2, a plurality of terminals, a plurality of connecting members, a plurality of resistor elements R1, R2, a plurality of capacitor elements C1, C2, and a sealing member 6. The plurality of terminals may include a plurality of power terminals 41 to 43 and a plurality of signal terminals 44A, 44B, 45A, 45B, 49. The plurality of connecting members may include a plurality of connecting members 51A, 51B, 52A, 52B, 53A, 53B, 54A, 54B.

[0012] For convenience of explanation, the thickness direction of the semiconductor device A1 will be referred to as the "thickness direction z." In the following explanation, terms such as "upper," "lower," "upper," "lower," "top surface," and "bottom surface" indicate the relative positional relationship of each component in the thickness direction z, and do not necessarily define the relationship with the direction of gravity. "Planar view" refers to the view in the thickness direction z. A direction perpendicular to the thickness direction z will be referred to as the "first direction x." As an example, the first direction x is the left-right direction in the plan view of the semiconductor device A1 (see Figure 2). A direction perpendicular to the thickness direction z and the first direction x will be referred to as the "second direction y." As an example, the second direction y is the up-down direction in the plan view of the semiconductor device A1 (see Figure 2).

[0013] The plurality of first semiconductor elements 11 and the plurality of second semiconductor elements 12 may each be, for example, a MOSFET. Instead of a MOSFET, the plurality of first semiconductor elements 11 and the plurality of second semiconductor elements 12 may each be another switching element such as a field-effect transistor including a metal-insulator-semiconductor field-effect transistor (MISFET). The plurality of first semiconductor elements 11 and the plurality of second semiconductor elements 12 may each be configured using silicon carbide (SiC). The semiconductor material is not limited to SiC and may be silicon (Si), gallium arsenide (GaAs), gallium nitride (GaN), gallium oxide (GaO), or the like.

[0014] Each of the plurality of first semiconductor elements 11 can be bonded to the support substrate 2 (the power wiring section 31 described below) via a conductive bonding material. The conductive bonding material can be, for example, solder, a metal paste material, or a sintered metal. The plurality of first semiconductor elements 11 can be arranged, for example, at equal intervals in the first direction x, as shown in FIGS. 2 and 3 .

[0015] Each of the multiple first semiconductor elements 11 may have a first element main surface 11a and a first element back surface 11b. As shown in Figures 3 and 5, the first element main surface 11a and the first element back surface 11b may be spaced apart from each other in the thickness direction z. The first element main surface 11a may face one side (upward) in the thickness direction z, and the first element back surface 11b may face the other side (downward) in the thickness direction z. The first element back surface 11b may face the support substrate 2 (the power wiring section 31 described below).

[0016] Each of the multiple first semiconductor elements 11 may have a first electrode 111, a second electrode 112, and a third electrode 113. In an example in which each first semiconductor element 11 is a MOSFET, the first electrode 111 may be a drain electrode, the second electrode 112 may be a source electrode, and the third electrode 113 may be a gate electrode. As can be understood from Figures 2, 3, and 5, in each first semiconductor element 11, the first electrode 111 may be arranged on the first element back surface 11b, and the second electrode 112 and the third electrode 113 may be arranged on the first element main surface 11a.

[0017] A first drive signal (e.g., a gate voltage) can be input to the third electrode 113 (gate electrode 113) of each of the multiple first semiconductor elements 11. Each of the multiple first semiconductor elements 11 can switch between an on state (conducting state) and an off state (blocking state) in response to the input first drive signal. This switching between the on state and the off state is called a switching operation. For example, in the on state, a forward current flows from the first electrode 111 (drain electrode 111) to the second electrode 112 (source electrode 112), and in the off state, this current does not flow. In each first semiconductor element 11, the on / off state between the first electrode 111 (drain electrode 111) and the second electrode 112 (source electrode 112) can be controlled by the first drive signal (e.g., a gate voltage) input to the third electrode 113 (gate electrode 113). The switching frequency of each first semiconductor element 11 can depend on the frequency of the first drive signal. The switching frequency is not limited in any way, but can be, for example, 10 kHz or more and several hundred kHz or less.

[0018] The multiple first semiconductor elements 11 may be electrically connected in parallel to one another. Specifically, for example, as shown in FIG. 6 , the first electrodes 111 (drain electrodes 111) may be electrically connected to one another, and the second electrodes 112 (source electrodes 112) may be electrically connected to one another. The semiconductor device A1 may input a common first drive signal to the multiple first semiconductor elements 11 connected in parallel in this manner, causing the multiple first semiconductor elements 11 to operate in parallel. In this case, the third electrodes 113 (gate electrodes 113) may be electrically connected to one another ( FIG. 6 ), but the present disclosure is not limited to this.

[0019] Each of the second semiconductor elements 12 may be bonded to the support substrate 2 (the power wiring portion 33 described below) via a conductive bonding material. The conductive bonding material may be, for example, solder, a metal paste material, or a sintered metal. The second semiconductor elements 12 may be arranged at equal intervals in the first direction x, as shown in FIGS. 2 and 4 .

[0020] Each of the multiple second semiconductor elements 12 may have a second element main surface 12a and a second element back surface 12b. As shown in Figures 4 and 5, the second element main surface 12a and the second element back surface 12b may be spaced apart from each other in the thickness direction z. The second element main surface 12a may face one side (upward) in the thickness direction z, and the second element back surface 12b may face the other side (downward) in the thickness direction z. The second element back surface 12b may face the support substrate 2 (the power wiring section 33 described below).

[0021] Each of the multiple second semiconductor elements 12 may have a fourth electrode 121, a fifth electrode 122, and a sixth electrode 123. In an example in which each second semiconductor element 12 is a MOSFET, the fourth electrode 121 may be a drain, the fifth electrode 122 may be a source, and the sixth electrode 123 may be a gate. As can be understood from Figures 2, 4, and 5, in each second semiconductor element 12, the fourth electrode 121 may be arranged on the second element back surface 12b, and the fifth electrode 122 and the sixth electrode 123 may be arranged on the second element main surface 12a.

[0022] A second drive signal (e.g., a gate voltage) can be input to the sixth electrode 123 (gate electrode 123) of each of the multiple second semiconductor elements 12. Each of the multiple second semiconductor elements 12 can be switched between an on state and an off state in response to the input second drive signal. In the on state, a forward current flows from the fourth electrode 121 (drain electrode 121) to the fifth electrode 122 (source electrode 122), and in the off state, this current does not flow. In each second semiconductor element 12, the on / off state between the fourth electrode 121 (drain electrode 121) and the fifth electrode 122 (source electrode 122) can be controlled by the second drive signal (e.g., a gate voltage) input to the sixth electrode 123 (gate electrode 123). The switching frequency of each second semiconductor element 12 can depend on the frequency of the second drive signal. The switching frequency is not limited in any way and can be, for example, 10 kHz or more and several hundred kHz or less.

[0023] The second semiconductor elements 12 may be electrically connected in parallel. Specifically, as shown in FIG. 6 , the fourth electrodes 121 (drain electrodes 121) may be electrically connected to one another, and the fifth electrodes 122 (source electrodes 122) may be electrically connected to one another. The semiconductor device A1 may input a common second drive signal to the second semiconductor elements 12 connected in parallel in this manner, causing the second semiconductor elements 12 to operate in parallel. In this case, the sixth electrodes 123 (gate electrodes 123) may be electrically connected to one another ( FIG. 6 ), but the present disclosure is not limited to this.

[0024] The support substrate 2 supports the plurality of first semiconductor elements 11 and the plurality of second semiconductor elements 12, and can electrically connect the plurality of first semiconductor elements 11 and the plurality of second semiconductor elements 12 to the plurality of terminals. In the semiconductor device A1, the support substrate 2 can be, for example, a direct bonded copper (DBC) substrate or an active metal brazing (AMB) substrate. Alternatively, the support substrate 2 can be, for example, a direct bonded aluminum (DBA) substrate. The support substrate 2 can include an insulating substrate 20, a main surface metal layer 21, and a back surface metal layer 22.

[0025] The insulating substrate 20 may be made of, for example, a ceramic having excellent thermal conductivity. Examples of such ceramics include AlN (aluminum nitride), SiN (silicon nitride), and AlO (aluminum oxide). The insulating substrate 20 may be, for example, a flat plate. As shown in FIG. 2, the insulating substrate 20 may have, for example, a rectangular shape in plan view.

[0026] The insulating substrate 20 may have a substrate main surface 20a and a substrate back surface 20b. As shown in Figures 3 to 5, the substrate main surface 20a and the substrate back surface 20b may be spaced apart from each other in the thickness direction z. The substrate main surface 20a may face upward in the thickness direction z, and the substrate back surface 20b may face downward in the thickness direction z.

[0027] The main surface metal layer 21 and the back surface metal layer 22 may each include, for example, copper or a copper alloy. The main surface metal layer 21 and the back surface metal layer 22 may each include aluminum or an aluminum alloy. As shown in FIGS. 3 to 5 , the main surface metal layer 21 may be formed on the substrate main surface 20a, and the back surface metal layer 22 may be formed on the substrate back surface 20b. The lower surface of the back surface metal layer 22 (the surface facing downward in the thickness direction z) may be exposed from the sealing member 6. Alternatively, the lower surface of the back surface metal layer 22 may be covered by the sealing member 6.

[0028] 2, the main surface metal layer 21 may include a plurality of power wiring portions 31 to 33 and a plurality of signal wiring portions 34A, 34B, 35A, 35B, 38A, 38B, and 39. The plurality of power wiring portions 31 to 33 and the plurality of signal wiring portions 34B, 34B, 35A, 35B, 38A, 38B, and 39 may be spaced apart from one another.

[0029] The multiple power wiring sections 31, 32, and 33 may form a conduction path for a main circuit current in the semiconductor device A1. The main circuit current may include a first main circuit current and a second main circuit current. The first main circuit current may be a current flowing between the power terminal 41 and the power terminal 43. The second main circuit current may be a current flowing between the power terminal 43 and the power terminal 42.

[0030] The power wiring section 31 may be electrically connected to each of the first electrodes 111 (drain electrodes 111) of the plurality of first semiconductor elements 11. The power wiring section 31 may be electrically connected to the power terminal 41. As shown in FIG. 2 , the power wiring section 31 may include two pad sections 311 and 312. The two pad sections 311 and 312 may be connected to each other and formed integrally.

[0031] A plurality of first semiconductor elements 11 can be mounted on the pad portion 311. The first electrodes 111 (drain electrodes 111) of the plurality of first semiconductor elements 11 can be bonded to the pad portion 311. In the illustrated example, the pad portion 311 can have a rectangular shape in a plan view with the first direction x as its longitudinal direction. The pad portion 311 can extend from the pad portion 312 along the first direction x.

[0032] 2 to 4, the power terminal 41 can be joined to the pad portion 312. In the illustrated example, the pad portion 312 can be strip-shaped in plan view with its longitudinal direction aligned with the second direction y. The pad portion 312 can be connected to an edge of the pad portion 311 on one side in the first direction x (the side where the power terminal 41 is located).

[0033] The power wiring portion 32 may be electrically connected to each of the fifth electrodes 122 (source electrodes 122) of the plurality of second semiconductor elements 12. The power wiring portion 32 may be electrically connected to the power terminal 42. The power wiring portion 32 may include two pad portions 321, 322. The two pad portions 321, 322 may be connected to each other and formed integrally.

[0034] 2 and 6 , the pad portion 321 may be joined to a plurality of connection members 51B and may be electrically connected to each of the fifth electrodes 122 (source electrodes 122) of the plurality of second semiconductor elements 12 via the plurality of connection members 51B. As shown in FIGS. 2 and 3 , the pad portion 321 may extend from the pad portion 322 along the first direction x. In the illustrated example, the pad portion 321 may have a strip shape with the first direction x as the longitudinal direction in a plan view. The pad portion 321 may be located on one side of the pad portion 311 in the second direction y (the lower side in FIG. 2 ).

[0035] The power terminal 42 may be joined to the pad portion 322, as shown in Figures 2, 3, and 5. The pad portion 322 may be strip-shaped in plan view with its longitudinal direction aligned with the second direction y, as shown in Figures 2 and 3. The pad portion 322 may be connected to an edge of the pad portion 321 on one side in the first direction x (the side on which the power terminal 42 is located). The pad portion 322 may be located on one side in the second direction y (the lower side in Figure 2) of the pad portion 321.

[0036] The power wiring section 33 may be electrically connected to each of the second electrodes 112 (source electrodes 112) of the multiple first semiconductor elements 11, and may also be electrically connected to each of the fourth electrodes 121 (drain electrodes 121) of the multiple second semiconductor elements 12. The power wiring section 33 may be electrically connected to two power terminals 43. The power wiring section 33 may include two pad sections 331, 332. The two pad sections 331, 332 are connected to each other and may be formed integrally.

[0037] 2 and 3 , a plurality of second semiconductor elements 12 can be mounted on the pad portion 331. The fourth electrodes 121 (drain electrodes 121) of the plurality of second semiconductor elements 12 can be bonded to the pad portion 331. In the illustrated example, the pad portion 331 can have a rectangular shape with the first direction x as the longitudinal direction in a plan view. The pad portion 331 can extend from the pad portion 332 along the first direction x. The pad portion 331 can be located between the pad portion 311 and the pad portion 321 in the second direction y.

[0038] 2 and 3 , the power terminal 43 can be joined to the pad portion 332. The pad portion 332 can be strip-shaped in plan view with its longitudinal direction aligned with the second direction y. The pad portion 332 can be connected to an edge of the pad portion 331 on one side in the first direction x (the side on which the power terminal 43 is located).

[0039] The plurality of signal wiring portions 34A, 34B, 35A, 35B, 38A, and 38B can form conduction paths for the respective electrical signals for controlling the semiconductor device A1.

[0040] The signal wiring portion 34A is electrically connected to each of the third electrodes 113 (gate electrodes 113) of the multiple first semiconductor elements 11, and will be referred to hereinafter as the third wiring portion 34A. When the third electrodes 113 are gate electrodes, the third wiring portion 34A may be referred to as the gate wiring portion 34A. The third wiring portion 34A (gate wiring portion 34A) can transmit a first drive signal. A signal terminal 44A may be joined to the third wiring portion 34A (gate wiring portion 34A). Hereinafter, the signal terminal 44A will be referred to as the third terminal 44A. When the third electrodes 113 are gate electrodes, the third terminal 44A may be referred to as the gate terminal 44A.

[0041] The signal wiring portion 34B is electrically connected to each sixth electrode 123 (gate electrodes 123) of the plurality of second semiconductor elements 12, and will be referred to hereinafter as the sixth wiring portion 34B. When the sixth electrode 123 is a gate electrode, the sixth wiring portion 34B may be referred to as the gate wiring portion 34B. The sixth wiring portion 34B (gate wiring portion 34B) can transmit a second drive signal. A signal terminal 44B can be joined to the sixth wiring portion 34B (gate wiring portion 34B). Hereinafter, the signal terminal 44B will be referred to as the sixth terminal 44B. When the sixth electrode 123 is a gate electrode, the sixth terminal 44B may be referred to as the gate terminal 44B.

[0042] 2 , the third wiring portion 34A (gate wiring portion 34A) and the sixth wiring portion 34B (gate wiring portion 34B) may be located on opposite sides of the pad portions 311, 321, and 331 in the second direction y. The third wiring portion 34A (gate wiring portion 34A) may be located on the opposite side of the pad portion 331 from the pad portion 311 in the second direction y. The sixth wiring portion 34B (gate wiring portion 34B) may be located on the opposite side of the pad portion 321 from the pad portion 331 in the second direction y.

[0043] The signal wiring portion 35A is electrically connected to the second electrodes 112 (source electrodes 112) of the multiple first semiconductor elements 11 and will hereinafter be referred to as the voltage detection wiring portion 35A. When the second electrodes 112 are source electrodes, the voltage detection wiring portion 35A may also be referred to as the source sense wiring portion 35A. The voltage detection wiring portion 35A (source sense wiring portion 35A) may transmit a first detection signal. The first detection signal is a signal indicating the electrical continuity of each first semiconductor element 11 and may be, for example, a voltage signal corresponding to the current (source current) flowing through each second electrode 112 (source electrode 112). A second terminal 45A, which is a voltage detection terminal, may be connected to the voltage detection wiring portion 35A (source sense wiring portion 35A). When the second electrodes 112 are source electrodes, the second terminal 45A may also be referred to as the source sense terminal 45A.

[0044] The signal wiring portion 35B is electrically connected to the fifth electrodes 122 (source electrodes 122) of the plurality of second semiconductor elements 12 and will hereinafter be referred to as the voltage detection wiring portion 35B. When the fifth electrodes 122 are source electrodes, the voltage detection wiring portion 35B may also be referred to as the source sense wiring portion 35B. The voltage detection wiring portion 35B (source sense wiring portion 35B) may transmit a second detection signal. The second detection signal is an electrical signal indicating the electrical continuity of each second semiconductor element 12 and may be, for example, a voltage signal corresponding to the current (source current) flowing through each fifth electrode 122 (source electrode 122). A fifth terminal 45B, which is a voltage detection terminal, may be connected to the voltage detection wiring portion 35B (source sense wiring portion 35B). When the fifth electrodes 122 are source electrodes, the fifth terminal 45B may also be referred to as the source sense terminal 45B.

[0045] 2 , the voltage detection wiring unit 35A (source sense wiring unit 35A) and the voltage detection wiring unit 35B (source sense wiring unit 35B) may be located on opposite sides of the pad units 311, 321, and 331 in the second direction y. The voltage detection wiring unit 35A (source sense wiring unit 35A) may be located on the same side as the third wiring unit 34A (gate wiring unit 34A) with respect to the pad unit 311 in the second direction y. The voltage detection wiring unit 35B (source sense wiring unit 35B) may be located on the same side as the sixth wiring unit 34B (gate wiring unit 34B) with respect to the pad unit 321 in the second direction y.

[0046] The signal wiring portion 38A can be electrically connected to each of the third electrodes 113 (gate electrodes 113) of the multiple first semiconductor elements 11. In the example shown, the intermediate signal wiring portion 38A can be located between the third wiring portion 34A (gate wiring portion 34A) and the pad portion 311 in the second direction y. Hereinafter, the signal wiring portion 38A will be referred to as the intermediate signal wiring portion 38A.

[0047] The signal wiring portion 38B can be electrically connected to each of the sixth electrodes 123 (gate electrodes 123) of the multiple second semiconductor elements 12. In the example shown, the intermediate signal wiring portion 38B can be located between the sixth wiring portion 34B (gate wiring portion 34B) and the pad portion 321 in the second direction y. Hereinafter, the signal wiring portion 38B will be referred to as the intermediate signal wiring portion 38B.

[0048] Each intermediate signal wiring portion 38A, 38B is divided into multiple portions, and in this embodiment, each may include multiple first portions 381 and multiple second portions 382. The following description regarding the multiple first portions 381 may be common to each intermediate signal wiring portion 38A, 38B unless otherwise specified. The multiple first portions 381 and the multiple second portions 382 may be arranged along the first direction x. The first portions 381 and the second portions 382 may be adjacent to each other in the first direction x and spaced apart from each other.

[0049] In the intermediate signal wiring portion 38A, a resistor R1 may be connected across the first portion 381 and the second portion 382 adjacent in the first direction x. In the intermediate signal wiring portion 38A, the first portion 381 and the second portion 382 adjacent in the first direction x may be electrically connected via the resistor R1. In the intermediate signal wiring portion 38B, a resistor R2 may be connected across the first portion 381 and the second portion 382 adjacent in the first direction x. In the intermediate signal wiring portion 38B, the first portion 381 and the second portion 382 adjacent in the first direction x may be electrically connected via the resistor R2. The specific configurations of the resistor elements R1 and R2 are not limited, and in the illustrated example, chip resistors may be used, for example. The resistance values ​​of the resistor elements R1 and R2 may be, for example, 0.1 Ω or more and 1 Ω or less.

[0050] The plurality of signal wiring portions 39 may be non-conductive to the plurality of first semiconductor elements 11 and the plurality of second semiconductor elements 12. The plurality of signal wiring portions 39 may be configured so that no main circuit current or electrical signal flows therethrough.

[0051] As shown in FIGS. 1 and 2 , the power terminals 41-43 and the signal terminals 44A, 44B, 45A, 45B, and 49 may each be partially exposed from the sealing member 6. The power terminals 41-43 and the signal terminals 44A, 44B, 45A, 45B, and 49 may each be made of copper or a copper alloy, for example, or may be made of other metals (including metal composites). The power terminals 41-43 and the signal terminals 44A, 44B, 45A, 45B, and 49 may each be made of a metal plate. As an example, these signal terminals may be appropriately bent.

[0052] The pair of power terminals 41, 42 are connected to a power source, and a power supply voltage (e.g., DC voltage) can be applied to them. In this embodiment, the power terminal 41 is a positive power input terminal (P terminal), and the power terminal 42 is a negative power input terminal (N terminal), but they may have opposite polarities. The power terminal 43 can output a voltage (e.g., AC voltage) converted by the switching operations of the multiple first semiconductor elements 11 and the multiple second semiconductor elements 12. The power terminal 43 can be a power output terminal (OUT terminal). Main circuit currents (first main circuit current and second main surface current) in the semiconductor device A1 can be generated by the power supply voltage and the converted voltage.

[0053] The power terminal 41 can be electrically connected to each of the first electrodes 111 (drain electrodes 111) of the plurality of first semiconductor elements 11 via the power wiring portion 31. The power terminal 41 can include a joint portion 411 and a terminal portion 412.

[0054] The joint portion 411 may be covered with a sealing member 6 as shown in Fig. 2. The joint portion 411 may be joined to the pad portion 312 of the power wiring portion 31 as shown in Fig. 2. This allows electrical conduction between the power terminal 41 and the power wiring portion 31. The joint portion 411 and the pad portion 312 may be joined using a method such as joining using a conductive joining material (such as solder or sintered metal), laser joining, or ultrasonic joining.

[0055] 2, the terminal portion 412 may be exposed from the sealing member 6. As shown in Fig. 2, the terminal portion 412 may extend from the sealing member 6 to one side in the first direction x in a plan view. The surface of the terminal portion 412 may be plated with silver, for example.

[0056] The power terminal 42 can be electrically connected to each of the fifth electrodes 122 (source electrodes 122) of the plurality of second semiconductor elements 12 via the power wiring portion 32. The power terminal 42 can include a joint portion 421 and a terminal portion 422.

[0057] The joint portion 421 may be covered with a sealing member 6 as shown in Fig. 2. The joint portion 421 may be joined to the pad portion 322 of the power wiring portion 32 as shown in Fig. 2. This may provide electrical continuity between the power terminal 42 and the power wiring portion 32. The joint portion 421 and the pad portion 322 may be joined using a method such as joining using a conductive joining material (such as solder or sintered metal), laser joining, or ultrasonic joining.

[0058] 2, the terminal portion 422 may be exposed from the sealing member 6. As shown in Fig. 2, the terminal portion 422 may extend from the sealing member 6 to one side in the first direction x in a plan view. The surface of the terminal portion 422 may be plated with silver, for example.

[0059] The power terminal 43 may be electrically connected to each of the second electrodes 112 (source electrodes 112) of the plurality of first semiconductor elements 11, and also electrically connected to each of the fourth electrodes 121 (drain electrodes 121) of the plurality of second semiconductor elements 12, via the power wiring portion 33. The power terminal 43 may include a joint portion 431 and a terminal portion 432.

[0060] 2, the joint portion 431 can be covered with a sealing member 6. The joint portion 431 can be joined to the pad portion 332 of the power wiring portion 33, as shown in FIG. 2. This allows electrical continuity between the power terminal 43 and the power wiring portion 33. The joint portion 431 and the pad portion 332 can be joined using a method such as joining using a conductive joining material (such as solder or sintered metal), laser joining, or ultrasonic joining.

[0061] 2, the terminal portion 432 may be exposed from the sealing member 6. As shown in Fig. 2, the terminal portion 432 may extend from the sealing member 6 to the other side in the first direction x in a plan view. The surface of the terminal portion 432 may be plated with silver, for example.

[0062] The power terminals 41 and 42 may be spaced apart from each other and arranged along the second direction y. The power terminals 41 and 42 may be arranged on opposite sides of the power terminal 43 in the first direction x, with the support substrate 2 sandwiched between them. In a configuration different from the semiconductor device A1, the number of power terminals 43 may be two or more instead of one. In this configuration, the multiple power terminals 43 may be respectively joined to the power wiring portion 33 (pad portion 332) and arranged along the second direction y.

[0063] The multiple signal terminals 44A, 44B, 45A, and 45B may be input or output terminals for electrical signals for controlling the semiconductor device A1. Each of the multiple signal terminals 44A, 44B, 45A, 45B, and 49 may include a portion covered by the sealing member 6 and a portion exposed from the sealing member 6. The multiple signal terminals 44A, 44B, 45A, 45B, and 49 may be pin-shaped metal members. The metal members may include, for example, copper or a copper alloy.

[0064] 2 , a portion of the third terminal 44A (gate terminal 44A) covered with the sealing member 6 may be joined to the third wiring portion 34A (gate wiring portion 34A). Since the third wiring portion 34A (gate wiring portion 34A) is electrically connected to each of the third electrodes 113 (gate electrodes 113) of the plurality of first semiconductor elements 11, the third terminal 44A (gate terminal 44A) may be electrically connected to each of the third electrodes 113 (gate electrodes 113). The third terminal 44A (gate terminal 44A) may be an input terminal for a first drive signal.

[0065] 2, a portion of the sixth terminal 44B (gate terminal 44B) that is covered with the sealing member 6 can be joined to the sixth wiring portion 34B (gate wiring portion 34B). Since the sixth wiring portion 34B (gate wiring portion 34B) is electrically connected to each of the sixth electrodes 123 (gate electrodes 123) of the multiple second semiconductor elements 12, the signal terminal 44B can be electrically connected to each of the sixth electrodes 123. The sixth terminal 44B (gate terminal 44B) can be an input terminal for a second drive signal.

[0066] 2 , a portion of the second terminal 45A (source sense terminal 45A) covered with the sealing member 6 may be joined to the voltage detection wiring portion 35A (source sense wiring portion 35A). Since the voltage detection wiring portion 35A (source sense wiring portion 35A) is electrically connected to each of the second electrodes 112 (source electrodes 112) of the multiple first semiconductor elements 11, the second terminal 45A (source sense terminal 45A) may be electrically connected to each of the second electrodes 112 (source electrodes 112). The second terminal 45A may be an output terminal for a first detection signal.

[0067] 2 , a portion of the fifth terminal 45B (source sense terminal 45B) that is covered with the sealing member 6 may be joined to the voltage detection wiring portion 35B (source sense wiring portion 35B). Since the voltage detection wiring portion 35B (source sense wiring portion 35B) is electrically connected to each of the fifth electrodes 122 (source electrodes 122) of the plurality of second semiconductor elements 12, the fifth terminal 45B (source sense terminal 45B) may be electrically connected to each of the fifth electrodes 122. The fifth terminal 45B (source sense terminal 45B) may be an output terminal for a second detection signal.

[0068] 2 , the portions of the multiple signal terminals 49 that are covered with the sealing member 6 may be joined to the multiple signal wiring portions 39, respectively. The multiple signal terminals 49 may be non-conductive to the multiple first semiconductor elements 11 and the multiple second semiconductor elements 12. The multiple signal terminals 49 may be non-connect terminals. The semiconductor device A1 may be configured without the multiple signal terminals 49.

[0069] Each of the plurality of connection members 51A, 51B, 52A, 52B, 53A, 53B, 54A, and 54B can electrically connect two portions spaced apart from each other. In the semiconductor device A1, the plurality of connection members 51A, 51B, 52A, 52B, 53A, 53B, 54A, and 54B can be bonding wires. Each of the plurality of connection members 51A, 51B, 52A, 52B, 53A, 53B, 54A, and 54B can be made of a material selected from the group consisting of gold, copper, and aluminum.

[0070] As shown in FIGS. 2 and 5 , the multiple connection members 51A are bonded to the second electrodes 112 (source electrodes 112) of the multiple first semiconductor elements 11 and the pad portion 331, respectively, and can electrically connect each second electrode 112 (source electrode 112) to the power wiring portion 33. In the semiconductor device A1, as shown in FIG. 2 , multiple connection members 51A can be bonded to each second electrode 112 (source electrode 112). A main circuit current (first main circuit current) in the semiconductor device A1 can flow through the multiple connection members 51A. The connection members 51A bonded to each second electrode 112 (source electrode 112) do not need to be bonding wires. As an example, a single metal (e.g., copper) plate-shaped member can be bonded to each second electrode 112.

[0071] As shown in FIGS. 2 and 5 , the multiple connection members 51B are bonded to the fifth electrodes 122 (source electrodes 122) and pad portions 321 of the multiple second semiconductor elements 12, respectively, and can electrically connect each fifth electrode 122 to the power wiring portion 32. In the semiconductor device A1, as shown in FIG. 2 , multiple connection members 51B can be bonded to each fifth electrode 122. A main circuit current (second main circuit current) in the semiconductor device A1 can flow through the multiple connection members 51B. The multiple connection members 51A bonded to each fifth electrode 122 do not need to be bonding wires. As an example, a single metal (e.g., copper) plate-shaped member can be bonded to each fifth electrode 122.

[0072] 2 , the multiple connection members 52A are respectively bonded to the third electrodes 113 (gate electrodes 113) of the multiple first semiconductor elements 11 and the multiple first portions 381 of the intermediate signal wiring portion 38A, thereby enabling electrical continuity between the third electrodes 113 (gate electrodes 113) and the first portions 381 of the intermediate signal wiring portion 38A. This allows electrical continuity between each first portion 381 of the intermediate signal wiring portion 38A and the third electrodes 113 (gate electrodes 113) of any of the multiple first semiconductor elements 11 via the connection members 52A. Hereinafter, the connection members 52A will be referred to as third connection members 52A. When the third electrodes 113 are gate electrodes, the third connection members 52A may also be referred to as gate connection members 52A.

[0073] 2 , the multiple connection members 52B are bonded to the sixth electrodes 123 (gate electrodes 123) of the multiple second semiconductor elements 12 and the multiple first portions 381 of the intermediate signal wiring portion 38B, respectively, and can mutually conduct the sixth electrodes 123 and the first portions 381 of the intermediate signal wiring portion 38B. This allows each first portion 381 of the intermediate signal wiring portion 38B to be electrically connected to the sixth electrode 123 of any of the multiple second semiconductor elements 12 via the connection members 52B. Hereinafter, the connection members 52B will be referred to as sixth connection members 52B. When the sixth electrodes 123 are gate electrodes, the sixth connection members 52B may also be referred to as gate connection members 52B.

[0074] As shown in FIG. 2 , the multiple connection members 53A are respectively bonded to the multiple second portions 382 of the intermediate signal wiring portion 38A and the third wiring portion 34A (gate wiring portion 34A), thereby electrically connecting the second portion 382 of the intermediate signal wiring portion 38A and the third wiring portion 34A (gate wiring portion 34A). This allows the third wiring portion 34A (gate wiring portion 34A) to be electrically connected to any of the second portions 382 of the intermediate signal wiring portion 38A via the connection members 53A. Hereinafter, the connection members 53A will be referred to as first intermediate connection members 53A. The third wiring portion 34A (gate wiring portion 34A) can be electrically connected to the multiple third electrodes 113 (gate electrodes 113) via the multiple third connection members 52A (gate connection members 52A), the multiple first portions 381, the multiple resistor elements R1, the multiple second portions 382, ​​and the multiple first intermediate connection members 53A. 6, this conduction path is shown as a third conduction path Jg1 for the plurality of first semiconductor elements 11. The third conduction path Jg1 may be a gate conduction path.

[0075] As shown in FIG. 2 , the multiple connection members 53B are respectively bonded to the multiple second portions 382 of the intermediate signal wiring portion 38B and to the sixth wiring portion 34B (gate wiring portion 34B), thereby electrically connecting the second portion 382 of the intermediate signal wiring portion 38B to the sixth wiring portion 34B (gate wiring portion 34B). The sixth wiring portion 34B (gate wiring portion 34B) can be electrically connected to any of the second portions 382 of the intermediate signal wiring portion 38B via the connection members 53B. Hereinafter, the connection members 53B will be referred to as first intermediate connection members 53B. The sixth wiring portion 34B (gate wiring portion 34B) can be electrically connected to the multiple sixth electrodes 123 via the multiple sixth connection members 52B (gate connection members 52B), the multiple first portions 381, the multiple resistor elements R2, the multiple second portions 382, ​​and the multiple first intermediate connection members 53B. 6, this conduction path is shown as a sixth conduction path Jg2 for the plurality of second semiconductor elements 12. The sixth conduction path Jg2 may be a gate conduction path.

[0076] As shown in FIG. 2 , the multiple connection members 54A are respectively bonded to the second electrodes 112 (source electrodes 112) and voltage detection wiring portions 35A (source sense wiring portions 35A) of the multiple first semiconductor elements 11, and can mutually conduct the second electrodes 112 (source electrodes 112) and the voltage detection wiring portions 35A (source sense wiring portions 35A). The voltage detection wiring portions 35A (source sense wiring portions 35A) can be electrically connected to the multiple second electrodes 112 (source electrodes 112) via the connection members 54A. Hereinafter, the connection members 54A will be referred to as voltage detection connection members 54A. When the second electrodes 112 are source electrodes, the voltage detection connection members 54A may also be referred to as source sense connection members 54A. The second terminal 45A (source sense terminal 45A) can be electrically connected to the plurality of second electrodes 112 (source electrodes 112) via the voltage detection wiring portion 35A (source sense wiring portion 35A) and the plurality of voltage detection connecting members 54A (source sense connecting members 54A). In FIG. 6 , this conductive path is shown as a second conductive path Js1 for the plurality of first semiconductor elements 11. The second conductive path Js1 can be a source sense conductive path.

[0077] As shown in FIG. 2 , the plurality of connection members 54B are respectively joined to the fifth electrodes 122 (source electrodes 122) and the voltage detection wiring portion 35B (source sense wiring portion 35B) of the plurality of second semiconductor elements 12, and can mutually conduct the fifth electrodes 122 and the voltage detection wiring portion 35B (source sense wiring portion 35B). The voltage detection wiring portion 35B (source sense wiring portion 35B) can be electrically connected to the plurality of fifth electrodes 122 via the connection members 54B. Hereinafter, the connection members 54B will be referred to as voltage detection connection members 54B. When the fifth electrode 122 is a source electrode, the voltage detection connection member 54B may also be referred to as source sense connection member 54B. The fifth terminal 45B (source sense terminal 45B) can be electrically connected to the plurality of fifth electrodes 122 via the voltage detection wiring portion 35B (source sense wiring portion 35B) and the plurality of voltage detection connection members 54B (source sense connection members 54B). 6, this conduction path is shown as a fifth conduction path Js2 for the plurality of second semiconductor elements 12. The fifth conduction path Js2 may be a source sense conduction path.

[0078] The capacitor element C1 can be connected across the multiple first parts 381 of the intermediate signal wiring portion 38A and the voltage detection wiring portion 35A (source sense wiring portion 35A). The gate conduction paths and source sense conduction paths of the multiple first semiconductor elements 11 can be connected to each other by the capacitor element C1.

[0079] The capacitor element C2 can be connected across the multiple first portions 381 of the intermediate signal wiring portion 38B and the voltage detection wiring portion 35B (source sense wiring portion 35B). The gate conduction paths and source sense conduction paths of the multiple second semiconductor elements 12 can be connected to each other by the capacitor element C2.

[0080] The specific configuration of the capacitor elements C1 and C2 is not limited in any way, and in the illustrated example, for example, a ceramic capacitor, an aluminum electrolytic capacitor, a tantalum electrolytic capacitor, etc. The capacitance of the capacitor elements C1 and C2 may be, for example, 0.1 nF or more and 10 nF or less.

[0081] The sealing member 6 can protect the multiple first semiconductor elements 11 and the multiple second semiconductor elements 12. The sealing member 6 can cover the multiple first semiconductor elements 11, the multiple second semiconductor elements 12, a portion of the support substrate 2, a portion of each of the multiple power terminals 41 to 43, a portion of each of the multiple signal terminals 44A, 44B, 45A, 45B, and 49, and the multiple connection members 51A, 51B, 52A, 52B, 53A, 53B, 54A, and 54B. The sealing member 6 can include, for example, an insulating resin material. The insulating material can be, for example, epoxy resin. The sealing member 6 can be, for example, black. The sealing member 6 can be rectangular in plan view. The sealing member 6 can have a resin main surface 61, a resin back surface 62, and multiple resin side surfaces 631 to 634.

[0082] As shown in FIGS. 3 to 5 , the resin main surface 61 and the resin back surface 62 can be spaced apart from each other in the thickness direction z. The resin main surface 61 can face upward in the thickness direction z, and the resin back surface 62 can face downward in the thickness direction z. Each of the multiple resin side surfaces 631 to 634 can be sandwiched between and connected to the resin main surface 61 and the resin back surface 62 in the thickness direction z. As shown in FIGS. 4 and 5 , the pair of resin side surfaces 631, 632 can face opposite sides to each other in the first direction x. The power terminals 41, 42 can be configured to protrude from the resin side surface 632. The power terminal 43 can be configured to protrude from the resin side surface 631. As shown in FIG. 5 , the pair of resin side surfaces 633, 634 can face opposite sides to each other in the second direction y. The signal terminals 44A, 45A can be configured to protrude from the resin side surface 634. The signal terminals 44B, 45B can be configured to protrude from the resin side surface 633.

[0083] The semiconductor device A1 can have the following functions and effects.

[0084] When multiple first semiconductor elements 11 are driven in parallel, electrical oscillation may occur in the conduction path connecting the multiple first semiconductor elements 11. The frequency of this oscillation may be, for example, several hundred megahertz, higher than the frequency (e.g., 10 Hz to several hundred Hz) of the gate signal applied to the third electrode 113 (gate electrode 113). As shown in FIG. 6 , the semiconductor device A1 may include a capacitor element C1 connecting the third conduction path Jg1 (gate conduction path Jg1) and the second conduction path Js1 (source sense conduction path Js1) to each other. This allows the semiconductor device A1 to include a passive low-pass filter. By setting the cutoff frequency of this low-pass filter higher than the frequency of the gate signal but lower than the frequency of any oscillation that may occur, the oscillation may be reduced while still allowing the gate signal to pass properly.

[0085] A capacitor element C2 may be provided to connect the sixth conduction path Jg2 (gate conduction path Jg2) and the fifth conduction path Js2 (source sense conduction path Js2) to each other for the plurality of second semiconductor elements 12. This may reduce oscillation while allowing the gate signal of the second semiconductor elements 12 to pass appropriately.

[0086] The semiconductor device A1 may include a resistor R1. By including the resistor R1 and the capacitor C1, the cutoff frequencies of the low-pass filters for the plurality of first semiconductor elements 11 can be set with high precision over a wide range. By including the resistor R2 in the semiconductor device A2, the cutoff frequencies of the low-pass filters for the plurality of second semiconductor elements 12 can be set with high precision over an even wider range.

[0087] As shown in FIG. 2 , in this embodiment, the resistor R1 may be disposed across the first portion 381 and the second portion 382 of the intermediate signal wiring portion 38A. The capacitor C1 may be disposed across the first portion 381 and the voltage detection wiring portion 35A (source sense wiring portion 35A). The intermediate signal wiring portion 38A may be disposed between the pad portion 311 of the power wiring portion 31 and the voltage detection wiring portion 35A (source sense wiring portion 35A) in the second direction y. The resistor R1 and the capacitor C1 may be disposed close to the first semiconductor elements 11. For example, the length of the conductive paths from the first semiconductor elements 11 to the resistor R1 and the capacitor C1 may be shorter than the length of the conductive paths from the resistor R1 and the capacitor C1 to the third terminal 44A (gate terminal 44A) and the second terminal 45A (source sense terminal 45A). This may reduce oscillation.

[0088] By arranging the multiple resistor elements R2 and the multiple capacitor elements C2 between the pad portion 321 of the power wiring unit 32 and the voltage detection wiring unit 35B (source sense wiring unit 35B), the multiple resistor elements R2 and the multiple capacitor elements C2 can be arranged in close proximity to the multiple second semiconductor elements 12. For example, the length of the conduction path from the multiple second semiconductor elements 12 to the multiple resistor elements R2 and the multiple capacitor elements C2 can be made shorter than the length of the conduction path from the multiple resistor elements R2 and the multiple capacitor elements C2 to the sixth terminal 44B (gate terminal 44B) and the fifth terminal 45B (source sense terminal 45B). This can more reliably reduce the oscillation phenomenon.

[0089] 7 to 27 show modified examples and other embodiments of the present disclosure. In these figures, elements that are the same as or similar to those in the above-described embodiment are given the same reference numerals. The configurations of the various parts in each modified example and each embodiment can be combined with each other to the extent that no technical contradictions arise.

[0090] 7 shows a first modification of the semiconductor device A1. In the semiconductor device A11 of this modification, the arrangement of the third wiring portion 34A (gate wiring portion 34A), the voltage detection wiring portion 35A (source sense wiring portion 35A), the intermediate signal wiring portion 38A, the first intermediate connecting member 53A, the plurality of resistor elements R1, and the plurality of capacitor elements C1 for the plurality of first semiconductor elements 11 may be different from that of the above-described example.

[0091] The third wiring portion 34A (gate wiring portion 34A) may be disposed between the intermediate signal wiring portion 38A and the voltage detection wiring portion 35A (source sense wiring portion 35A) in the second direction y. The resistive element R1 may be disposed so as to straddle the first portion 381 and the third wiring portion 34A (gate wiring portion 34A). The capacitor element C1 may be disposed so as to straddle the first portion 381 and the second portion 382. The first intermediate connecting member 53A may be connected to the second portion 382 and the voltage detection wiring portion 35A (source sense wiring portion 35A). The same may be true for the sixth wiring portion 34B (gate wiring portion 34B), the voltage detection wiring portion 35B (source sense wiring portion 35B), the intermediate signal wiring portion 38B, the first intermediate connecting member 53B, the plurality of resistive elements R2, and the plurality of capacitor elements C2 for the plurality of second semiconductor elements 12.

[0092] The semiconductor device A11 has a circuit configuration similar to that of the semiconductor device A1 shown in FIG.

[0093] This modification can reduce the oscillation phenomenon that occurs when the plurality of first semiconductor elements 11 and the plurality of second semiconductor elements 12 are driven in parallel. The arrangement of the plurality of resistor elements R1, R2 and the plurality of resistor elements C1, C2 is not limited in any way.

[0094] 8 shows a second modification of the semiconductor device A1. In the semiconductor device A12 of this modification, the intermediate signal wiring portions 38A, 38B may include a first portion 381, a second portion 382, ​​and a third portion 383. The semiconductor device A12 may include a plurality of second intermediate connection members 55A, 55B.

[0095] The first portion 381, the second portion 382, ​​and the third portion 383 may be aligned in the first direction x and spaced apart from each other. The third portion 383 may be located between the first portion 381 and the second portion 382. The resistor elements R1 and R2 may be connected to straddle the first portion 381 and the third portion 383. The capacitor elements C1 and C2 may be connected to straddle the second portion 382 and the third portion 383. The third connection member 52A (gate connection member 52A) and the sixth connection member 52B (gate connection member 52B) may be connected to the third portion 383. The first intermediate connection members 53A and 53B may be connected to the signal wiring portion 391, the third wiring portion 34A (gate wiring portion 34A), and the sixth wiring portion 34B (gate wiring portion 34B). The second intermediate connecting members 55A and 55B can be connected to the second portion 382, ​​the voltage detection wiring portion 35A (source sense wiring portion 35A), and the voltage detection wiring portion 35B (source sense wiring portion 35B).

[0096] The semiconductor device A12 can have a circuit configuration similar to that of the semiconductor device A1 shown in FIG.

[0097] This modification can reduce the oscillation phenomenon that occurs when the plurality of first semiconductor elements 11 and the plurality of second semiconductor elements 12 are driven in parallel. The arrangement of the plurality of resistive elements R1, R2 and the plurality of resistive elements C1, C2 and the configuration of the intermediate signal wiring portions 38A, 38B are not limited in any way.

[0098] 9 shows a third modification of the semiconductor device A1. In the semiconductor device A13 of this modification, the configurations of the resistor element R1 and the intermediate signal wiring portions 38A and 38B may differ from those of the above-described example.

[0099] The resistor elements R1 and R2 may be made of wire. The wire constituting the resistor element R1 may be made of a material with a high resistance, such as constantan, Ni—Cr (nickel-chromium alloy), alumel, or chromel.

[0100] The semiconductor device A13 can have a circuit configuration similar to that of the semiconductor device A1 shown in FIG.

[0101] This modification can reduce the oscillation phenomenon that occurs when a plurality of first semiconductor elements 11 and a plurality of second semiconductor elements 12 are driven in parallel. The specific configuration of the plurality of resistance elements R1, R2 is not limited in any way.

[0102] 10 shows a fourth modification of the semiconductor device A1. A semiconductor device A14 of this modification can differ from the above-described examples in that it includes a plurality of element packages P1 and P2.

[0103] 11 shows an example of the configuration of element packages P1 and P2. The element packages P1 and P2 may include resistor elements R1 and R2 and capacitor elements C1 and C2 built therein, and may include electrodes 81, 82, and 83 and a sealing resin 80.

[0104] The resistance elements R1 and R2 may be, for example, chip resistors. The capacitor elements C1 and C2 may be, for example, ceramic capacitors. The sealing resin 80 may cover the resistance elements R1 and R2 and the capacitor elements C1 and C2. A wiring pattern electrically connected to the resistance elements R1 and R2 and the capacitor elements C1 and C2 may be formed in the sealing resin 80 by, for example, plating. The resistance elements R1 and R2 may be electrically connected between an electrode 81 and an electrode 82. The capacitor elements C1 and C2 may be electrically connected between an electrode 81 and an electrode 83. A third connection member 52A (gate connection member 52A) and a sixth connection member 52B (gate connection member 52B) may be connected to the electrode 81, and first intermediate connection members 53A and 53B may be connected to the electrode 82. The electrode 83 can be electrically connected to the voltage detection wiring portion 35A (source sense wiring portion 35A) and the voltage detection wiring portion 35B (source sense wiring portion 35B).

[0105] The semiconductor device A14 can have the same circuit configuration as the circuit configuration diagram of the semiconductor device A1 shown in FIG.

[0106] This modification can reduce oscillation that occurs when multiple first semiconductor elements 11 and multiple second semiconductor elements 12 are driven in parallel. The multiple resistor elements R1, R2 and the multiple capacitor elements C1, C2 are not limited to being configured as individual electronic elements, but can be configured as an integrated package such as element packages P1, P2. By employing element packages P1, P2, the semiconductor device A14 can be made smaller.

[0107] 12 shows another example of the element packages P1 and P2. In this example, the element packages P1 and P2 may be configured without incorporating chip resistors for forming the resistance elements R1 and R2 or ceramic capacitors for forming the capacitor elements C1 and C2. The resistance elements R1 and R2 may be formed, for example, by providing a high-resistance material using a technique for forming a rewiring layer on a semiconductor layer. The capacitor elements C1 and C2 may be formed by stacking dielectric layers and metal layers using the rewiring technique described above.

[0108] The specific configuration of the element packages P1 and P2 is not limited in any way.

[0109] 13 to 18 show a semiconductor device A2 according to a second embodiment. As shown in the figures, the semiconductor device A2 may include a plurality of first semiconductor elements 11, a plurality of second semiconductor elements 12, a support substrate 2, a plurality of terminals, a plurality of resistor elements R1, a plurality of capacitor elements C1, a plurality of connecting members, and a sealing member 6. The plurality of terminals may include a plurality of power terminals 41 to 43 and a plurality of signal terminals 44A, 44B, 45A, 45B, 46, and 49. The plurality of connecting members may include a plurality of connecting members 52A, 52B, 53A, 53B, 54A, 54B, and 56, and a plurality of connecting members 58A and 58B.

[0110] In the semiconductor device A2, the support substrate 2 may include an insulating substrate 20, a main surface metal layer 21, a back surface metal layer 22, a pair of conductive substrates 23A and 23B, and a pair of signal substrates 24A and 24B. The support substrate 2 may be configured such that the pair of conductive substrates 23A and 23B and the pair of signal substrates 24A and 24B are disposed on a DBC substrate (or a DBA substrate, or an AMB substrate). Similar to the semiconductor device A1, the DBC substrate (or DBA substrate) may be configured with an insulating substrate 20, a pair of main surface metal layers 21A and 21B, and a back surface metal layer 22.

[0111] 18 , the pair of main surface metal layers 21A, 21B may be formed on the substrate main surface 20a of the insulating substrate 20. The pair of main surface metal layers 21A, 21B may be spaced apart in the first direction x. A conductive substrate 23A may be bonded to the main surface metal layer 21A, and a conductive substrate 23B may be bonded to the main surface metal layer 21B. Each of the pair of main surface metal layers 21A, 21B may have a rectangular shape in a plan view, for example.

[0112] Each of the pair of conductive substrates 23A and 23B may be made of a metal, such as copper or a copper alloy, or aluminum or an aluminum alloy.

[0113] As shown in FIG. 18 , the conductive substrate 23A may be disposed on the main surface metal layer 21A. As shown in FIG. 18 , multiple first semiconductor elements 11 may be mounted on the conductive substrate 23A. As shown in FIG. 15 , the multiple first semiconductor elements 11 of the semiconductor device A2 may be disposed on the conductive substrate 23A along the second direction y. The conductive substrate 23A may face each first element back surface 11b of each of the multiple first semiconductor elements 11. The conductive substrate 23A may be electrically connected to each of the first electrodes 111 (drain electrodes 111) of the multiple first semiconductor elements 11. The first electrodes 111 (drain electrodes 111) of the multiple first semiconductor elements 11 may be electrically connected to each other via the conductive substrate 23A.

[0114] As shown in FIG. 18 , the conductive substrate 23B may be disposed on the main surface metal layer 21B. As shown in FIG. 18 , a plurality of second semiconductor elements 12 may be mounted on the conductive substrate 23B. As shown in FIG. 15 , the plurality of second semiconductor elements 12 of the semiconductor device A2 may be disposed on the conductive substrate 23B along the second direction y. The conductive substrate 23B may face the second element back surfaces 12b of the plurality of second semiconductor elements 12. The conductive substrate 23B may be electrically connected to the respective fourth electrodes 121 (drain electrodes 121) of the plurality of second semiconductor elements 12. The fourth electrodes 121 of the plurality of second semiconductor elements 12 may be electrically connected to each other via the conductive substrate 23B.

[0115] The pair of signal boards 24A, 24B can support a plurality of signal terminals 44A, 44B, 45A, 45B, 46, and 49. As shown in FIG. 18 , the pair of signal boards 24A, 24B can be interposed in the thickness direction z between the pair of conductive boards 23A, 23B and the plurality of signal terminals 44A, 44B, 45A, 45B, 46, and 49. Each of the pair of signal boards 24A, 24B can be formed, for example, by a DBC substrate. Alternatively, each of the pair of signal boards 24A, 24B can be formed, for example, by a DBA substrate or an AMB substrate. Each of the pair of signal boards 24A, 24B can be formed, for example, by a printed circuit board rather than a DBC substrate or a DBA substrate.

[0116] As shown in FIG. 18 , the signal board 24A may be disposed on the conductive board 23A. The signal board 24A may support a plurality of signal terminals 44A, 45A, 46, and 49. The signal board 24A may be bonded to the conductive board 23A via a bonding material. The bonding material may be conductive or insulating. As an example, the bonding material may be solder. As shown in FIG. 18 , the signal board 24B may be disposed on the conductive board 23B. The signal board 24B may support a plurality of signal terminals 44B, 45B, and 49. The signal board 24B may be bonded to the conductive board 23B via a bonding material. The bonding material may be conductive or insulating. As an example, the bonding material may be solder.

[0117] 18, each of the pair of signal substrates 24A, 24B may include an insulating substrate 241, a main surface metal layer 242, and a back surface metal layer 243. Unless otherwise specified, the following description of the insulating substrate 241, the main surface metal layer 242, and the back surface metal layer 243 may be common to the pair of signal substrates 24A, 24B.

[0118] The insulating substrate 241 may be made of, for example, ceramic. This ceramic may be, for example, AlN, SiN, or Al2O3. The insulating substrate 241 may be, for example, rectangular in plan view. As shown in FIG. 18 , the insulating substrate 241 may have a main surface 241a and a back surface 241b. The main surface 241a and the back surface 241b may be spaced apart in the thickness direction z. The main surface 241a may face upward in the thickness direction z, and the back surface 241b may face downward in the thickness direction z. The main surface 241a and the back surface 241b may be flat (or approximately flat).

[0119] 18 , the back surface metal layer 243 may be formed on the back surface 241b of the insulating substrate 241. The back surface metal layer 243 of the signal substrate 24A may be bonded to the conductive substrate 23A via a bonding material. The back surface metal layer 243 of the signal substrate 24B may be bonded to the conductive substrate 23B via a bonding material. The constituent material of the back surface metal layer 243 may be, for example, copper or a copper alloy. The constituent material may be aluminum or an aluminum alloy instead of copper or a copper alloy.

[0120] 18 , the main surface metal layer 242 may be formed on the main surface 241 a of the insulating substrate 241. Each of the multiple signal terminals 44A, 44B, 45A, 45B, 46, and 49 may be provided upright on the main surface metal layer 242 of one of the pair of signal substrates 24A and 24B. The constituent material of the main surface metal layer 242 may be, for example, copper or a copper alloy. The constituent material may be aluminum or an aluminum alloy instead of copper or a copper alloy.

[0121] 15 and 16, the main surface metal layer 242 of the signal substrate 24A may include a plurality of signal wiring portions 34A, 35A, 36, 38A, and 39. The main surface metal layer 242 of the signal substrate 24B may include a plurality of signal wiring portions 34B, 35B, 38B, and 39, as shown in FIGS.

[0122] The signal wiring portion 36 is joined to a connection member 56 and can be electrically connected to the conductive substrate 23A via the connection member 56. The conductive substrate 23A can be electrically connected to the first electrodes 111 (drain electrodes 111) of the plurality of first semiconductor elements 11. The signal wiring portion 36 can be electrically connected to the first electrodes 111 (drain electrodes 111) of the plurality of first semiconductor elements 11.

[0123] The power terminal 41 may be formed integrally with the conductive substrate 23A. Alternatively, the power terminal 41 may be bonded to the conductive substrate 23A. The dimension of the power terminal 41 in the thickness direction z may be smaller than that of the conductive substrate 23A. The power terminal 41 may be configured to extend from the conductive substrate 23A to one side in the first direction x. This one side in the first direction x may be the side of the conductive substrate 23A opposite to the side on which the conductive substrate 23B is located. The power terminal 41 may be configured to protrude from the resin side surface 632. The power terminal 41 may be electrically connected to the first electrodes 111 (drain electrodes 111) of the multiple first semiconductor elements 11 via the conductive substrate 23A.

[0124] The two power terminals 42 may be spaced apart from the conductive substrate 23A. The two power terminals 42 may be arranged on opposite sides of the power terminal 41 in the second direction y. The two power terminals 42 may be arranged on one side of the conductive substrate 23A in the first direction x. This one side of the first direction x may be the side on which the power terminal 41 is located with respect to the conductive substrate 23A. The two power terminals 42 may be configured to protrude from the resin side surface 632. A connection member 58B may be joined to each of the two power terminals 42. The two power terminals 42 may be electrically connected to the fifth electrodes 122 (source electrodes 122) of the plurality of second semiconductor elements 12 via the connection member 58B.

[0125] The two power terminals 43 may each be formed integrally with the conductive substrate 23B. Alternatively, the two power terminals 43 may each be bonded to the conductive substrate 23B. The dimension of each of the two power terminals 43 in the thickness direction z may be smaller than that of the conductive substrate 23B. The two power terminals 43 may each be configured to extend from the conductive substrate 23B toward the other side in the first direction x. The other side in the first direction x may be the side of the conductive substrate 23B opposite to the side on which the conductive substrate 23A is located. The two power terminals 43 may each be configured to protrude from the resin side surface 631. The two power terminals 43 may each be electrically connected to the second electrodes 112 (source electrodes 112) of the multiple first semiconductor elements 11 and the fourth electrodes 121 (drain electrodes 121) of the multiple second semiconductor elements 12 via the conductive substrate 23B.

[0126] As shown in FIG. 13 , each of the signal terminals 44A, 44B, 45A, 45B, 46, and 49 may be configured to protrude from the resin main surface 61. Each of the signal terminals 44A, 44B, 45A, 45B, 46, and 49 may be, for example, a press-fit terminal. Each of the signal terminals 44A, 44B, 45A, 45B, 46, and 49 may include a holder and a metal pin. The holder may be a tubular member made of a conductive material. The holder may be bonded to the main surface metal layer 242 of the signal board 24A or 24B. The metal pin may be press-fit into the holder and extend in the thickness direction z.

[0127] The signal terminal 46 can be provided upright on the signal wiring portion 36. The signal terminal 46 can be electrically connected to the signal wiring portion 36. The signal wiring portion 36 can be electrically connected to the first electrodes 111 (drain electrodes 111) of the plurality of first semiconductor elements 11. The signal terminal 46 can be electrically connected to the first electrodes 111 (drain electrodes 111) of the plurality of first semiconductor elements 11.

[0128] The plurality of signal terminals 49 may be provided upright on the signal wiring portion 39. The plurality of signal terminals 49 may be non-conductive to the plurality of first semiconductor elements 11 and the plurality of second semiconductor elements 12. Each of the plurality of signal terminals 49 may be a non-connect terminal.

[0129] The connection member 56 may be, for example, a bonding wire. The bonding wire may be made of gold, copper, or aluminum. As shown in FIG. 15 , the connection member 56 is bonded to the signal wiring portion 36 and the conductive substrate 23A, and can electrically connect them.

[0130] The multiple connection members 58A, 58B, together with the support substrate 2, can form a path for a main circuit current switched by the multiple first semiconductor elements 11 and the multiple second semiconductor elements 12. The multiple connection members 58A, 58B can be formed of a plate-shaped member made of metal. The metal can be, for example, copper or a copper alloy. The multiple connection members 58A, 58B can have a partially bent shape.

[0131] Each of the multiple connection members 58A may be bonded to the second electrodes 112 (source electrodes 112) of the multiple first semiconductor elements 11 and the conductive substrate 23B. The second electrodes 112 (source electrodes 112) of the multiple first semiconductor elements 11 and the conductive substrate 23B may be electrically connected to each other. Each connection member 58A and each second electrode 112 (source electrode 112) of the multiple first semiconductor elements 11 may be bonded by a conductive bonding material (e.g., solder, metal paste, or sintered metal). Each connection member 58A and the conductive substrate 23B may be bonded by a conductive bonding material (e.g., solder, metal paste, or sintered metal). As shown in FIG. 15 , each connection member 58A may have a strip shape extending in the first direction x in a plan view.

[0132] The number of connecting members 58A may be the same as the number of first semiconductor elements 11. In the example shown in the figure, the number of connecting members 58A is three, but the present disclosure is not limited to this. Alternatively, the number of connecting members 58A may be different from the number of first semiconductor elements 11. As an example, one connecting member 58A may be used for multiple first semiconductor elements 11.

[0133] The connection member 58B can mutually connect the fifth electrodes 122 (source electrodes 122) and the power terminals 42 of the multiple second semiconductor elements 12. As shown in FIG. 14 , the connection member 58B can include a pair of first wiring portions 581B, a second wiring portion 582B, a third wiring portion 583B, and multiple fourth wiring portions 584B.

[0134] One of the pair of first wiring portions 581B may be connected to one of the pair of power terminals 42, and the other of the pair of first wiring portions 581B may be connected to the other of the pair of power terminals 42. Each first wiring portion 581B may be joined to each power terminal 42 by a conductive bonding material (for example, solder, a metal paste material, or a sintered metal). As shown in FIG. 14 , each of the pair of first wiring portions 581B may have a strip shape extending in the first direction x in a plan view. The pair of first wiring portions 581B may be spaced apart from each other in the second direction y and arranged parallel to (or approximately parallel to) each other.

[0135] As shown in FIG. 14 , the second wiring portion 582B may be connected to both of the pair of first wiring portions 581B. The second wiring portion 582B may have a strip shape extending in the second direction y in a plan view. As can be seen from FIGS. 14 and 18 , the second wiring portion 582B may overlap multiple second semiconductor elements 12 in a plan view. As shown in FIG. 18 , the second wiring portion 582B may be connected to each second semiconductor element 12 (fifth electrode 122). The second wiring portion 582B may have a portion that overlaps each second semiconductor element 12 in a plan view. This overlapping portion may have a configuration that protrudes downward in the thickness direction z compared to other portions. This downward-protruding portion of the second wiring portion 582B may be joined to each fifth electrode 122 of the multiple second semiconductor elements 12. The second wiring portion 582B and each of the fifth electrodes 122 can be joined to each other by, for example, a conductive bonding material (for example, solder, a metal paste material, or a sintered metal).

[0136] As shown in FIG. 14 , the third wiring portion 583B may be connected to both of the pair of first wiring portions 581B. The third wiring portion 583B may have a strip shape extending in the second direction y in a plan view. The third wiring portion 583B may be separated from the second wiring portion 582B in the first direction x. The third wiring portion 583B may be positioned parallel (or approximately parallel) to the second wiring portion 582B. As can be seen from FIGS. 14 and 18 , the third wiring portion 583B may overlap multiple first semiconductor elements 11 in a plan view. The third wiring portion 583B may be configured such that portions overlapping each first semiconductor element 11 in a plan view protrude upward in the thickness direction z relative to other portions. This portion protruding upward in the thickness direction z forms an area on each first semiconductor element 11 where each connection member 58A is bonded, and can reduce contact of the third wiring portion 583B with each connection member 58A.

[0137] As shown in FIG. 14 , each of the multiple fourth wiring portions 584B may be connected to both the second wiring portion 582B and the third wiring portion 583B. Each of the multiple fourth wiring portions 584B may have a strip shape extending in the first direction x in a plan view. The multiple fourth wiring portions 584B may be spaced apart in the second direction y and arranged parallel (or approximately parallel) in a plan view. Each of the multiple fourth wiring portions 584B may have one end and the other end in the first direction x. The one end may be connected to a portion of the third wiring portion 583B that overlaps between two first semiconductor elements 11 adjacent to each other in the second direction y in a plan view. The other end may be connected to a portion of the second wiring portion 582B that overlaps between two second semiconductor elements 12 adjacent to each other in the second direction y in a plan view.

[0138] 16, the semiconductor device A2 may have the same configurations as the semiconductor device A1 in terms of the plurality of resistor elements R1, the plurality of capacitor elements C1, the plurality of third connection members 52A (gate connection members 52A), the plurality of voltage detection connection members 54A (source sense connection members 54A), the plurality of first intermediate connection members 53A, the third wiring portion 34A (gate wiring portion 34A), the voltage detection wiring portion 35A (source sense wiring portion 35A), and the intermediate signal wiring portion 38A. As a result, the semiconductor device A2 may have the third conduction path Jg1 (gate conduction path Jg1) and the second conduction path Js1 (source sense conduction path Js1) shown in FIG.

[0139] 17 , the semiconductor device A2 may have the same configurations as the semiconductor device A1 in terms of the plurality of resistor elements R2, the plurality of capacitor elements C2, the plurality of sixth connection members 52B (gate connection members 52B), the plurality of voltage detection connection members 54B (source sense connection members 54B), the plurality of first intermediate connection members 53B, the sixth wiring portion 34B (gate wiring portion 34B), the voltage detection wiring portion 35B (source sense wiring portion 35B), and the intermediate signal wiring portion 38B. As a result, the semiconductor device A2 may have the sixth conduction path Jg2 (gate conduction path Jg2) and the fifth conduction path Js2 (source sense conduction path Js2) shown in FIG.

[0140] The semiconductor device A2 can reduce the oscillation phenomenon that occurs when multiple first semiconductor elements 11 and multiple second semiconductor elements 12 are operated in parallel. As a variation of the semiconductor device A2, the configurations of the above-described semiconductor devices A11 to A14 can be appropriately adopted.

[0141] 19 to 25 show a semiconductor device A3 according to a third embodiment. As shown in the figures, the semiconductor device A3 may include a plurality of first semiconductor elements 11, a plurality of second semiconductor elements 12, a support substrate 2, a plurality of terminals, a plurality of connecting members, a plurality of resistor elements R1, a plurality of capacitor elements C1, a heat sink 70, a case 71, and a resin member 75. The plurality of terminals may include a plurality of power terminals 41 to 43 and a plurality of signal terminals 44A, 44B, 45A, 45B, 46, and 47. The plurality of connecting members may include a plurality of connecting members 51A, 51B, 52A, 52B, 53A, 53B, 54A, 54B, 551A, 551B, 552A, 552B, 56, and 57.

[0142] In the first and second embodiments, an example has been shown in which the semiconductor device A3 has a resin-molded type module structure in which the plurality of first semiconductor elements 11 and the plurality of second semiconductor elements 12 are covered with the sealing member 6. In contrast to this, the semiconductor device A3 may have a case-type module structure in which the plurality of first semiconductor elements 11 and the plurality of second semiconductor elements 12 are housed in a case 71.

[0143] As can be seen from Figures 19 to 25, the case 71 may be, for example, a rectangular parallelepiped. The case 71 may be made of a synthetic resin that is electrically insulating and has excellent heat resistance, such as PPS (polyphenylene sulfide). The case 71 may be rectangular and have the same (or approximately the same) size as the heat sink 70 in a plan view. The case 71 may include a frame 72, a top plate 73, and a plurality of terminal blocks 741 to 744.

[0144] The frame 72 may be fixed to the upper surface of the heat sink 70 in the thickness direction z. The top plate 73 may be fixed to the frame 72. As shown in FIGS. 19 , 21 , 22 , and 25 , the top plate 73 may close the opening of the frame 72 on the upper side in the thickness direction z. As shown in FIGS. 21 , 22 , and 25 , the top plate 73 may face the heat sink 70, which closes the lower side of the frame 72 in the thickness direction z. The top plate 73, the heat sink 70, and the frame 72 may define a circuit accommodating space inside the case 71. The circuit accommodating space may accommodate a plurality of first semiconductor elements 11, a plurality of second semiconductor elements 12, and the like. Hereinafter, this circuit accommodating space may be referred to as the inside of the case 71.

[0145] The two terminal blocks 741, 742 may be arranged on one side of the frame portion 72 in the first direction x and may be formed integrally with the frame portion 72. The two terminal blocks 743, 744 may be arranged on the other side of the frame portion 72 in the first direction x and may be formed integrally with the frame portion 72. The two terminal blocks 741, 742 may be arranged along the second direction y on the side wall of the frame portion 72 on one side in the first direction x. The terminal block 741 may cover a portion of the power terminal 41. As shown in FIG. 19 , the power terminal 41 may be arranged on the upper surface of the terminal block 741 in the thickness direction z. The terminal block 742 may cover a portion of the power terminal 42. As shown in FIG. 19 , the power terminal 42 may be arranged on the upper surface of the terminal block 742 in the thickness direction z. The two terminal blocks 743, 744 may be arranged along the second direction y on the side wall of the frame portion 72 on the other side in the first direction x. The terminal block 743 may cover a portion of one of the two power terminals 43. As shown in Fig. 19 , a portion of this power terminal 43 may be disposed on the upper surface of the terminal block 743 in the thickness direction z. The terminal block 744 may cover a portion of the other of the two power terminals 43. As shown in Fig. 19 , a portion of this power terminal 43 may be disposed on the upper surface of the terminal block 744 in the thickness direction z.

[0146] As shown in FIGS. 21 , 22 , and 25 , the resin member 75 may be filled in the area surrounded by the top plate 73, the heat sink 70, and the frame portion 72. This area may be the circuit accommodating space. The resin member 75 may cover the first semiconductor elements 11, the second semiconductor elements 12, and the like. The resin member 75 may be made of, for example, black epoxy resin. The resin member 75 may be made of other insulating materials such as silicone gel instead of epoxy resin. The semiconductor device A3 is not limited to a configuration that includes the resin member 75, and may be configured without the resin member 75. In a configuration that includes the resin member 75, the case 71 may be configured without the top plate 73.

[0147] The support substrate 2 of the semiconductor device A3 can be bonded to the heat sink 70. The support substrate 2 of the semiconductor device A3 can include an insulating substrate 20 and a main surface metal layer 21. Alternatively, the support substrate 2 can include a back surface metal layer 22.

[0148] The main surface metal layer 21 may include a plurality of power wiring portions 31 to 33 and a plurality of signal wiring portions 34A, 34B, 35A, 35B, 37, 38A, and 38B. The main surface metal layer 21 of the semiconductor device A3 may further include a signal wiring portion 37, as compared with the main surface metal layer 21 of the semiconductor device A1.

[0149] As shown in FIG. 20 , the pair of signal wiring portions 37 may be spaced apart from each other in the second direction y. For example, a thermistor 91 may be bonded to each of the pair of signal wiring portions 37. The thermistor 91 may be disposed across the pair of signal wiring portions 37. In an example different from the semiconductor device A3, the thermistor 91 may not be bonded to the pair of signal wiring portions 37. As shown in FIG. 20 , the pair of signal wiring portions 37 may be located near the corners of the insulating substrate 20. The pair of signal wiring portions 37 may be located between the pad portion 311 and the two signal wiring portions 34A, 35A in the first direction x.

[0150] The power wiring section 31 of the semiconductor device A3 may include two pad sections 311 and 312, similar to the power wiring section 31 of the semiconductor device A1, and may also include an extension section 313, unlike the power wiring section 31 of the semiconductor device A1. As shown in Fig. 20 , the extension section 313 may be configured to extend in the second direction y from the end of the pad section 311 on the other side in the first direction x (the side opposite to the side on which the power terminal 41 is located). In the example shown in Fig. 20 , the extension section 313 may be located between the pad section 332 (power wiring section 33) and each of the signal wiring sections 34A, 35A, and 38A in a plan view.

[0151] 20 , a slit 321s may be formed in the pad portion 321 of the power wiring unit 32. In a plan view, the slit 321s may extend along the first direction x from an edge of the pad portion 321 on one side in the first direction x (the side on which the pad portion 322 is located) as a base end. The tip of the slit 321s may be located in the center of the pad portion 321 in the first direction x.

[0152] As shown in FIG. 20 , the signal terminal 46 may be joined to a connection member 56. The signal terminal 47 may be electrically connected to the power wiring unit 31 via the connection member 56. The signal terminal 46 may be electrically connected to each of the first electrodes 111 (drain electrodes 111) of the plurality of first semiconductor elements 11. The signal terminal 46 may be an output terminal for a third detection signal. The third detection signal may be a voltage signal corresponding to a current flowing through the power wiring unit 31. For example, the current may be a drain current flowing through each of the first electrodes 111 (drain electrodes 111) of the plurality of first semiconductor elements 11. The signal terminal 46 may be a press-fit terminal. Alternatively, the signal terminal 46 may be a pin-shaped metal member, similar to the other signal terminals 44A, 44B, 45A, 45B, etc.

[0153] 20 , a pair of connecting members 57 may be respectively joined to the pair of signal terminals 47. The pair of signal terminals 47 may be electrically connected to the pair of signal wiring portions 37 via the pair of connecting members 57. The pair of signal terminals 47 may be electrically connected to thermistors 91. The pair of signal terminals 47 may be terminals for detecting the temperature inside the case 71. When the thermistors 91 are not joined to the pair of signal wiring portions 37, the pair of signal terminals 47 may be non-connect terminals.

[0154] 20 and 25, the connection member 551A can be joined to the third wiring portion 34A (gate wiring portion 34A) and the third terminal 44A (gate terminal 44A) to electrically connect them to each other. The third wiring portion 34A (gate wiring portion 34A) and the third terminal 44A (gate terminal 44A) can be connected to each other via the connection member 551A.

[0155] 20 and 25, the connection member 551B is joined to the sixth wiring portion 34B (gate wiring portion 34B) and the sixth terminal 44B (gate terminal 44B) and can electrically connect them to each other. The sixth wiring portion 34B (gate wiring portion 34B) and the sixth terminal 44B (gate terminal 44B) can be connected to each other via the connection member 551B.

[0156] 20 , the connection member 552A can be joined to the voltage detection wiring portion 35A (source sense wiring portion 35A) and the second terminal 45A (source sense terminal 45A) to electrically connect them to each other. The voltage detection wiring portion 35A (source sense wiring portion 35A) and the second terminal 45A (source sense terminal 45A) can be connected to each other via the connection member 552A.

[0157] 20 , the connection member 552B is joined to the voltage detection wiring portion 35B (source sense wiring portion 35B) and the fifth terminal 45B (source sense terminal 45B) and can electrically connect them to each other. The voltage detection wiring portion 35B (source sense wiring portion 35B) and the fifth terminal 45B (source sense terminal 45B) can be connected to each other via the connection member 552B.

[0158] 20 , the connection member 56 is joined to the extending portion 313 and the signal terminal 46, and can electrically connect the power wiring portion 31 and the signal terminal 46. The signal terminal 46 can be electrically connected to each of the first electrodes 111 (drain electrodes 111) of the plurality of first semiconductor elements 11 via the connection member 56 and the power wiring portion 31.

[0159] 20 , the pair of connecting members 57 are respectively joined to the pair of signal wiring portions 37 and the pair of signal terminals 47, and can electrically connect these to each other. The pair of signal terminals 47 can be electrically connected to the thermistor 91 via the pair of connecting members 57 and the pair of signal wiring portions 37. If the thermistor 91 is not joined to the pair of signal wiring portions 37, the pair of connecting members 57 may be unnecessary.

[0160] 20 , the semiconductor device A3 may have the same configurations as the semiconductor device A1 in terms of the plurality of resistor elements R1, the plurality of capacitor elements C1, the plurality of third connection members 52A (gate connection members 52A), the plurality of voltage detection connection members 54A (source sense connection members 54A), the plurality of first intermediate connection members 53A, the third wiring portion 34A (gate wiring portion 34A), the voltage detection wiring portion 35A (source sense wiring portion 35A), and the intermediate signal wiring portion 38A. The semiconductor device A3 may have the third conduction path Jg1 (gate conduction path Jg1) and the second conduction path Js1 (source sense conduction path Js1) shown in FIG.

[0161] 20 , the semiconductor device A3 may have the same configurations as the semiconductor device A1 in terms of the plurality of resistor elements R2, the plurality of capacitor elements C2, the plurality of sixth connection members 52B (gate connection members 52B), the plurality of voltage detection connection members 54B (source sense connection members 54B), the plurality of first intermediate connection members 53B, the sixth wiring portion 34B (gate wiring portion 34B), the voltage detection wiring portion 35B (source sense wiring portion 35B), and the intermediate signal wiring portion 38B. The semiconductor device A3 may have the sixth conduction path Jg2 (gate conduction path Jg2) and the fifth conduction path Js2 (source sense conduction path Js2) shown in FIG.

[0162] The semiconductor device A3 can reduce the oscillation phenomenon that occurs when multiple first semiconductor elements 11 and multiple second semiconductor elements 12 are operated in parallel. As a variation of the semiconductor device A3, the configurations of the semiconductor devices A11 to A14 described above can be appropriately adopted.

[0163] 26 and 27 show a first modification of the semiconductor device A3. In the semiconductor device A31 of this modification, the numbers of the resistor elements R1, R2 and the capacitor elements C1, C2 provided for one first semiconductor element 11 and one second semiconductor element 12 may differ from those in the above-described example.

[0164] 26 shows a plurality of resistor elements R1 and a plurality of capacitor elements C1 provided for one first semiconductor element 11. In this modification, the intermediate signal wiring portion 38A may include a first portion 381, a second portion 382, ​​a third portion 383, and a fourth portion 384. The first portion 381, the second portion 382, ​​the third portion 383, and the fourth portion 384 may be aligned in the first direction x and spaced apart from one another. The third portion 383 may be located between the first portion 381 and the second portion 382, ​​and the fourth portion 384 may be located between the third portion 383 and the second portion 382.

[0165] In the illustrated example, three resistor elements R1 are provided for one first semiconductor element 11. One resistor element R1 may be connected to straddle the first portion 381 and the third portion 383. Another resistor element R1 may be connected to straddle the third portion 383 and the fourth portion 384. The remaining resistor element R1 may be connected to straddle the fourth portion 384 and the second portion 382. The three resistor elements R1 may be connected in series with each other in a third conduction path Jg1 (gate conduction path Jg1).

[0166] In the illustrated example, three capacitor elements C1 are provided for one first semiconductor element 11. One capacitor element C1 may be connected to straddle the third portion 383 and the voltage detection wiring portion 35A (source sense wiring portion 35A). Another capacitor element C1 may be connected to straddle the fourth portion 384 and the voltage detection wiring portion 35A (source sense wiring portion 35A). The remaining capacitor elements C1 may be connected to straddle the second portion 382 and the voltage detection wiring portion 35A (source sense wiring portion 35A).

[0167] 26 may be employed for each of the plurality of first semiconductor elements 11 and the plurality of second semiconductor elements 12. The semiconductor device A31 may have the circuit configuration shown in FIG. 27. As shown in the figure, a plurality of resistor elements R1, R2 and a plurality of capacitor elements C1, C2 may be provided in multiple stages for one first semiconductor element 11 and one second semiconductor element 12. In this way, the order of the low-pass filter of the semiconductor device A31 may be increased.

[0168] This modification can also reduce the oscillation phenomenon that occurs when multiple first semiconductor elements 11 and multiple second semiconductor elements 12 are operated in parallel. By increasing the order of the low-pass filter, signals in a frequency band below the cutoff frequency can be passed efficiently (e.g., with reduced attenuation). In a frequency band above the cutoff frequency, passing of signals can be reduced with a high attenuation rate.

[0169] The semiconductor device according to the present disclosure is not limited to the above-described embodiment. The specific configuration of each part of the semiconductor device according to the present disclosure can be freely designed in various ways. The present disclosure includes the embodiments described in the following appendices. Appendix 1. A semiconductor device comprising: a plurality of semiconductor elements each having a first electrode, a second electrode, and a third electrode to which a drive signal controlling the conduction state of the first electrode and the second electrode is input, the semiconductor elements being connected in parallel; a second terminal; a third terminal; a second conduction path connecting the second electrode and the second terminal of each semiconductor element to each other; a third conduction path connecting the third electrode and the third terminal of each semiconductor element to each other; and at least one capacitor element connecting the second conduction path and the third conduction path to each other. Appendix 2. The semiconductor device according to Appendix 1, wherein the second terminal is a voltage detection terminal. Appendix 3. The semiconductor device according to Appendix 1, further comprising a resistor element included in at least one of the second conduction path and the third conduction path. Appendix 4. The semiconductor device according to Appendix 3, wherein the resistive element is included in the third conduction path. Appendix 5. The semiconductor device according to Appendix 4, further comprising: a third connection member connected to the third electrode of each semiconductor element; a voltage detection connection member connected to the second electrode of each semiconductor element; a third wiring portion connected to the third terminal; a voltage detection wiring portion connected to the second terminal; and an intermediate signal wiring portion including a first portion and a second portion. Appendix 6. The semiconductor device according to Appendix 5, wherein the third connection member is connected to the first portion, and the voltage detection connection member is connected to the voltage detection wiring portion. Appendix 7. The semiconductor device according to Appendix 6, wherein the resistive element is connected to the first portion and the second portion. Appendix 8. The semiconductor device according to Appendix 6, further comprising a first intermediate connection member connected to the second portion and the third wiring portion. Appendix 9. The semiconductor device according to Appendix 8, wherein the capacitor element is connected to the second portion and the voltage detection wiring portion. Appendix 10. The semiconductor device according to Appendix 6, wherein the resistive element is connected to the first portion and the third wiring portion. Supplementary Note 11. The semiconductor device according to Supplementary Note 10, wherein the capacitor element is connected to the first portion and the second portion.Appendix 12. The semiconductor device according to Appendix 11, further comprising a first intermediate connecting member connected to the second portion and the voltage detection wiring portion. Appendix 13. The semiconductor device according to Appendix 5, further comprising a first intermediate connecting member connected to the second portion and the voltage detection wiring portion, and a second intermediate connecting member connected to the first portion and the third wiring portion, wherein the intermediate signal wiring portion includes a third portion, the third connecting member is connected to the third portion, the resistive element is connected to the first portion and the third portion, and the capacitor element is connected to the second portion and the third portion. Appendix 14. The semiconductor device according to any of Appendixes 5 to 13, further comprising a support substrate supporting the plurality of semiconductor elements, wherein the support substrate includes an insulating substrate and a main surface metal layer, and the main surface metal layer includes the third wiring portion, the voltage detection wiring portion, and the intermediate signal wiring portion. Appendix 15. The semiconductor device according to Appendix 5, wherein the resistive element is formed of a connecting member having a resistance value higher than that of the third connecting member. Appendix 16. The semiconductor device according to Supplementary Note 3, further comprising an element package including the capacitor element and the resistor element.Supplementary Note 17. The semiconductor device according to Supplementary Note 1, wherein the at least one capacitor element includes a plurality of capacitor elements corresponding to one semiconductor element of the plurality of semiconductor elements.Supplementary Note 18. The semiconductor device according to any of Supplements 1 to 17, wherein the first electrodes of the plurality of semiconductor elements are electrically connected to each other, and the second electrodes of the plurality of semiconductor elements are electrically connected to each other.Supplementary Note 19. The semiconductor device according to any of Supplements 1 to 18, wherein the third electrodes of the plurality of semiconductor elements are electrically connected to each other.

[0170] A1, A11, A12, A13, A14, A2, A3, A31: semiconductor device 2: supporting substrate 6: sealing member 11: first semiconductor element 11a: first element main surface 11b: first element back surface 12: second semiconductor element 12a: second element main surface 12b: second element back surface 20: insulating substrate 20a: substrate main surface 20b: substrate back surface 21, 21A, 21B, 22: back surface metal layer 23A, 23B: conductive substrate 24A, 24B: signal substrate 31, 32, 33: power wiring section 34A: signal wiring section (third wiring section, gate wiring section) 34B: signal wiring section (sixth wiring section, gate wiring section) 35A, 35B: signal wiring section (voltage detection wiring section) 36, 37, 39: signal wiring section 38A, 38B: Signal wiring portion (intermediate signal wiring portion) 41, 42, 43: Power terminal 44A: Signal terminal (third terminal, gate terminal) 44B: Signal terminal (sixth terminal, gate terminal) 45A: Signal terminal (second terminal, voltage detection terminal, source sense terminal) 45B: Signal terminal (fifth terminal, voltage detection terminal, source sense terminal) 46, 47, 49: Signal terminal 51A, 51B: Connecting member 52A: Connecting member (third connecting member) 52B: Connecting member (sixth connecting member) 53A, 53B: Connecting member (first intermediate connecting member) 54A, 54B: Connecting member (voltage detection connecting member, source sense connecting member) 55A, 55B: Connecting member (second intermediate connecting member) 56, 57, 58A, 58B: Connecting members 61: Resin main surface 62: Resin back surface 70: Heat sink 71: Case 72: Frame 73: Top plate 75: Resin member 80: Sealing resin 81, 82, 83: Electrodes 91: Thermistor 111: First electrode (drain electrode) 112: Second electrode (source electrode) 113: Third electrode (gate electrode) 121: Fourth electrode (drain electrode) 122: Fifth electrode (source electrode) 123: Sixth electrode (gate electrode) 241: Insulating substrate 241a: Main surface 241b: Back surface 242: Main surface metal layer 243: Back surface metal layer 311: Pad portion 312: Pad portion 313: Extension portion 321: Pad portion 321s: Slits 322, 331,332: Pad portion 381: First portion 382: Second portion 383: Third portion 384: Fourth portion 391: Signal wiring portion 411: Joint portion 412: Terminal portion 421: Joint portion 422: Terminal portion 431: Joint portion 432: Terminal portion 551A, 551B, 552A, 552B: Connection member 581B: First wiring portion 582B: Second wiring portion 583B: Third wiring portion 584B: Fourth wiring portion 631, 632, 633, 634: Resin side surface 741, 742, 743, 744: Terminal block C1, C2: Capacitor element Jg1: Third conduction path Jg2: Sixth conduction path Js1: Second conduction path Js2: Fifth conduction path P1, P2: element package R1, R2: resistor element x: first direction y: second direction z: thickness direction

Claims

1. a plurality of semiconductor elements connected in parallel with each other, each of which has a first electrode, a second electrode, and a third electrode to which a drive signal for controlling the conduction state of the first electrode and the second electrode is input; A second terminal; A third terminal; a second conductive path that electrically connects the second electrode and the second terminal of each semiconductor element to each other; a third conductive path that electrically connects the third electrode and the third terminal of each semiconductor element to each other; and at least one capacitor element connecting the second conduction path and the third conduction path to each other.

2. The semiconductor device according to claim 1 , wherein the second terminal is a voltage detection terminal.

3. The semiconductor device according to claim 1 , further comprising a resistive element included in at least one of said second conductive path and said third conductive path.

4. The semiconductor device according to claim 3 , wherein the resistive element is included in the third conduction path.

5. a third connection member connected to the third electrode of each semiconductor element; a voltage detection connection member connected to the second electrode of each semiconductor element; a third wiring portion connected to the third terminal; a voltage detection wiring portion connected to the second terminal; The semiconductor device according to claim 4 , further comprising: an intermediate signal wiring portion including a first portion and a second portion.

6. the third connecting member is connected to the first portion, The semiconductor device according to claim 5 , wherein the voltage detection connection member is connected to the voltage detection wiring portion.

7. The semiconductor device according to claim 6 , wherein said resistive element is connected to said first portion and said second portion.

8. The semiconductor device according to claim 6 , further comprising a first intermediate connecting member connected to said second portion and said third wiring portion.

9. The semiconductor device according to claim 8 , wherein said capacitor element is connected to said second portion and said voltage detection wiring portion.

10. The semiconductor device according to claim 6 , wherein said resistance element is connected to said first portion and said third wiring portion.

11. The semiconductor device according to claim 10 , wherein the capacitor element is connected to the first portion and the second portion.

12. The semiconductor device according to claim 11 , further comprising a first intermediate connecting member connected to said second portion and said voltage detection wiring portion.

13. a first intermediate connecting member connected to the second portion and the voltage detection wiring portion; a second intermediate connecting member connected to the first portion and the third wiring portion, the intermediate signal wiring portion includes a third portion; the third connection member is connected to the third portion, the resistive element is connected to the first portion and the third portion; The semiconductor device according to claim 5 , wherein the capacitor element is connected to the second portion and the third portion.

14. a support substrate for supporting the plurality of semiconductor elements; the support substrate includes an insulating substrate and a main surface metal layer; 14. The semiconductor device according to claim 5, wherein said main surface metal layer includes said third wiring portion, said voltage detection wiring portion, and said intermediate signal wiring portion.

15. 6. The semiconductor device according to claim 5, wherein said resistance element is formed of a connection member having a resistance value higher than that of said third connection member.

16. The semiconductor device according to claim 3 , further comprising an element package containing said capacitor element and said resistor element.

17. The semiconductor device according to claim 1 , wherein the at least one capacitor element includes a plurality of capacitor elements corresponding to one of the plurality of semiconductor elements.

18. 14. The semiconductor device according to claim 1, wherein the first electrodes of the plurality of semiconductor elements are electrically connected to each other, and the second electrodes of the plurality of semiconductor elements are electrically connected to each other.

19. 14. The semiconductor device according to claim 1, wherein the third electrodes of the plurality of semiconductor elements are electrically connected to each other.