Silicon carbide substrate, method for manufacturing silicon carbide epitaxial substrate, and method for manufacturing silicon carbide semiconductor device

Abstract

This silicon carbide substrate has a first main surface and a second main surface. The second main surface is on the opposite side of the first main surface. A value determined by dividing the intensity of transmitted light that passes through the second main surface by the intensity of incident light in the state where the first main surface is irradiated with the incident light is an external transmittance. The external transmittance obtained when the wavelength of incident light is 800 nm is larger than the external transmittance obtained when the wavelength of incident light is 1100 nm. When the wavelength range of incident light is 800 nm to 1100 nm inclusive, the absolute value of the amount of change in external transmittance relative to the amount of change in wavelength of the incident light is 0.06% / nm or less.

Description

Silicon carbide substrate, method for manufacturing silicon carbide epitaxial substrate, and method for manufacturing silicon carbide semiconductor device

[0001] The present disclosure relates to a silicon carbide substrate, a method for manufacturing a silicon carbide epitaxial substrate, and a method for manufacturing a silicon carbide semiconductor device. This application claims priority to Japanese Patent Application No. 2023-014510, filed February 2, 2023. The entire contents of this Japanese patent application are incorporated herein by reference.

[0002] Japanese Patent Laid-Open Publication No. 2012-240892 (Patent Document 1) describes a silicon carbide ingot in which the transmittance of light having a wavelength of 450 nm or more and 500 nm or less is specified.

[0003] JP 2012-240892 A

[0004] A silicon carbide substrate according to the present disclosure includes a first main surface and a second main surface. The second main surface is opposite to the first main surface. The value obtained by dividing the intensity of transmitted light passing through the second main surface when incident light is irradiated onto the first main surface by the intensity of the incident light is defined as the external transmittance. The external transmittance when the wavelength of the incident light is 800 nm is greater than the external transmittance when the wavelength of the incident light is 1100 nm. When the wavelength of the incident light is in the range of 800 nm or more and 1100 nm or less, the absolute value of the change in external transmittance with respect to the change in wavelength of the incident light is 0.06% / nm or less.

[0005] FIG. 1 is a schematic plan view showing the configuration of a silicon carbide substrate according to this embodiment. FIG. 2 is a schematic cross-sectional view taken along line II-II in FIG. 1 . FIG. 3 is a schematic bottom view showing the configuration of a silicon carbide substrate according to this embodiment. FIG. 4 is a schematic cross-sectional view showing a state in which incident light is irradiated onto the silicon carbide substrate. FIG. 5 is a schematic bottom view showing an LTV measurement region on a first main surface. FIG. 6 is a schematic plan view showing an LTV measurement region on a second main surface. FIG. 7 is a schematic diagram for explaining the definition of LTV. FIG. 8 is a flow diagram generally showing a method for manufacturing a silicon carbide substrate according to this embodiment. FIG. 9 is a schematic cross-sectional view showing a step of growing a silicon carbide single crystal. FIG. 10 is a schematic cross-sectional view showing a step of mechanically polishing a silicon carbide substrate. FIG. 11 is a schematic cross-sectional view showing a method for measuring a contact angle. FIG. 12 is a flow diagram generally showing a method for manufacturing a silicon carbide semiconductor device according to this embodiment. FIG. 13 is a schematic cross-sectional view showing a step of preparing a silicon carbide substrate. FIG. 14 is a cross-sectional view schematically illustrating a step of forming a silicon carbide epitaxial layer on a silicon carbide substrate. FIG. 15 is a plan view schematically illustrating the configuration of a silicon carbide epitaxial substrate according to this embodiment. FIG. 16 is a cross-sectional view schematically illustrating a step of forming a body region. FIG. 17 is a cross-sectional view schematically illustrating a step of forming a source region. FIG. 18 is a cross-sectional view schematically illustrating a step of forming a trench in a third main surface of the silicon carbide epitaxial layer. FIG. 19 is a cross-sectional view schematically illustrating a step of forming a gate insulating film. FIG. 20 is a cross-sectional view schematically illustrating a step of forming a gate electrode and an interlayer insulating film. FIG. 21 is a cross-sectional view schematically illustrating the configuration of a silicon carbide semiconductor device according to this embodiment. FIG. 22 is a schematic diagram illustrating the relationship between the wavelength of incident light and the external transmittance of a silicon carbide substrate.

[0006] [Problem to be Solved by the Present Disclosure] An object of the present disclosure is to provide a silicon carbide substrate, a method for manufacturing a silicon carbide epitaxial substrate, and a method for manufacturing a silicon carbide semiconductor device, which are capable of improving the yield of silicon carbide semiconductor devices. [Effects of the Present Disclosure] According to the present disclosure, it is possible to provide a silicon carbide substrate, a method for manufacturing a silicon carbide epitaxial substrate, and a method for manufacturing a silicon carbide semiconductor device, which are capable of improving the yield of silicon carbide semiconductor devices.

[0007] [Description of Embodiments of the Present Disclosure] First, embodiments of the present disclosure will be listed and described.

[0008] (1) A silicon carbide substrate according to the present disclosure includes a first main surface and a second main surface. The second main surface is opposite to the first main surface. The external transmittance is determined by dividing the intensity of transmitted light passing through the second main surface when incident light is irradiated onto the first main surface by the intensity of the incident light. The external transmittance when the wavelength of the incident light is 800 nm is greater than the external transmittance when the wavelength of the incident light is 1100 nm. When the wavelength of the incident light is in the range of 800 nm or more and 1100 nm or less, the absolute value of the change in external transmittance with respect to the change in wavelength of the incident light is 0.06% / nm or less.

[0009] (2) In the silicon carbide substrate according to (1), the first main surface may include a first center point. When viewed in a direction from the first main surface toward the second main surface, a square region having a center at the first center point and a side length of 90 mm is defined as a first central region, and the first central region is divided into a plurality of first square measurement regions, each having a side length of 3 mm, the maximum LTV value in the plurality of first square measurement regions may be 0.9 μm or less.

[0010] (3) In the silicon carbide substrate according to (2) above, when the total number of the plurality of first square measurement regions is defined as a first value and the number of the plurality of first square measurement regions having an LTV of 0.65 μm or less is defined as a second value, the ratio of the second value to the first value may be 40% or more.

[0011] (4) In the silicon carbide substrate according to (2) or (3), the second main surface may include a second center point. When viewed in a direction from the second main surface toward the first main surface, a square region having a center at the second center point and a side length of 90 mm is defined as a second central region, and the second central region is divided into a plurality of second square measurement regions having a side length of 3 mm, the maximum LTV value in the plurality of second square measurement regions may be smaller than the maximum LTV value in the plurality of first square measurement regions.

[0012] (5) According to the silicon carbide substrate according to any one of (1) to (4) above, when the wavelength range of incident light is 800 nm or more and 1100 nm or less, the external transmittance may be 15% or more and 40% or less.

[0013] (6) The silicon carbide substrate according to any one of (1) to (5) above may have a maximum diameter of 150 mm or more.

[0014] (7) A method for manufacturing a silicon carbide epitaxial substrate according to the present disclosure includes the following steps: A silicon carbide substrate according to any one of (1) to (6) above is prepared; and a silicon carbide epitaxial layer is formed on the silicon carbide substrate.

[0015] (8) A method for manufacturing a silicon carbide semiconductor device according to the present disclosure includes the following steps: preparing a silicon carbide substrate according to any one of (1) to (6) above; forming a silicon carbide epitaxial layer on the silicon carbide substrate; and forming an electrode on the silicon carbide epitaxial layer.

[0016] [Details of the Embodiments of the Present Disclosure] Next, embodiments of the present disclosure will be described with reference to the drawings. Note that the same or corresponding parts in the following drawings will be given the same reference numerals, and their description will not be repeated. In the crystallographic descriptions in this specification, individual orientations are indicated by [ ], collective orientations by < >, individual planes by ( ), and collective planes by {}. Furthermore, for negative indices, in crystallography, a "-" (bar) is placed above the number, but in this specification, a negative sign is placed before the number.

[0017] <Silicon Carbide Substrate> First, the configuration of silicon carbide substrate 100 according to this embodiment will be described. Fig. 1 is a plan view schematically showing the configuration of silicon carbide substrate 100 according to this embodiment. Fig. 2 is a cross-sectional view schematically showing the configuration of silicon carbide substrate 100 along line II-II in Fig. 1.

[0018] As shown in Figures 1 and 2, silicon carbide substrate 100 according to this embodiment has a first main surface 1, a second main surface 2, and an outer peripheral side surface 9. Second main surface 2 is opposite first main surface 1. Outer peripheral side surface 9 is continuous with each of first main surface 1 and second main surface 2. Outer peripheral side surface 9 is, for example, a cylindrical surface. Each of first main surface 1 and second main surface 2 is, for example, planar. Silicon carbide substrate 100 contains an n-type impurity such as nitrogen. Silicon carbide substrate 100 is made of, for example, hexagonal silicon carbide. The polytype of hexagonal silicon carbide is, for example, 4H.

[0019] 1 , when viewed along a line perpendicular to the second main surface 2, the second main surface 2 extends along each of a first direction 101 and a second direction 102. When viewed along a line perpendicular to the second main surface 2, the second direction 102 is a direction perpendicular to the first direction 101.

[0020] The first direction 101 is, for example, the <11-20> direction. The first direction 101 may be, for example, the [11-20] direction. The first direction 101 may be a direction obtained by projecting the <11-20> direction onto the second main surface 2. From another perspective, the first direction 101 may be, for example, a direction including a <11-20> direction component.

[0021] The second direction 102 is, for example, the <1-100> direction. The second direction 102 may be, for example, the [1-100] direction. The second direction 102 may be, for example, a direction obtained by projecting the <1-100> direction onto the second main surface 2. From another perspective, the second direction 102 may be, for example, a direction including a <1-100> direction component.

[0022] As shown in Fig. 2 , third direction 103 is perpendicular to each of first direction 101 and second direction 102, and is a direction from first main surface 1 to second main surface 2. A direction that is perpendicular to each of first direction 101 and second direction 102, and is from second main surface 2 to first main surface 1, is defined as fourth direction 104. Fig. 1 shows the configuration of silicon carbide substrate 100 as viewed in fourth direction 104.

[0023] First main surface 1 is a {0001} plane or a plane inclined with respect to the {0001} plane. When first main surface 1 is a plane inclined with respect to the {0001} plane, the inclination angle (off angle θ) with respect to the {0001} plane is, for example, greater than 0° and not greater than 8°. The off angle θ is not particularly limited. The off angle θ may be, for example, 1° or greater, or 2° or greater. The off angle θ may be, for example, 7° or less, or 6° or less.

[0024] The first main surface 1 may be a surface inclined by an off angle with respect to the (000-1) plane, or may be a surface inclined by an off angle with respect to the (0001) plane. The inclination direction (off direction) of the first main surface 1 is, for example, the <11-20> direction. From another perspective, the first direction 101 may be the off direction of the first main surface 1.

[0025] FIG. 3 is a schematic bottom view showing the configuration of silicon carbide substrate 100 according to this embodiment. FIG. 3 shows the configuration of silicon carbide substrate 100 as viewed in third direction 103. As shown in FIG. 3 , the diameter of first main surface 1 is defined as first maximum diameter W1. First maximum diameter W1 is, for example, 150 mm (6 inches) or more. First maximum diameter W1 may be, for example, 200 mm (8 inches) or more. First maximum diameter W1 may be, for example, 400 mm (16 inches) or less. When viewed in third direction 103, first maximum diameter W1 is the maximum linear distance between two different points on outer circumferential side surface 9.

[0026] As used herein, 6 inches refers to 150 mm or 152.4 mm (6 inches x 25.4 mm / inch). 8 inches refers to 200 mm or 203.2 mm (8 inches x 25.4 mm / inch). 16 inches refers to 400 mm or 406.4 mm (16 inches x 25.4 mm / inch).

[0027] 1 and 3, the outer peripheral side surface 9 has, for example, an orientation flat 7 and an arc-shaped portion 8. The orientation flat 7 extends along a first direction 101. As shown in FIG. 3, the orientation flat 7 is linear when viewed in a third direction 103. The arc-shaped portion 8 is continuous with the orientation flat 7. When viewed in the third direction 103, the arc-shaped portion 8 is arc-shaped.

[0028] <External Transmittance> Next, a description will be given of the external transmittance of silicon carbide substrate 100. Fig. 4 is a cross-sectional schematic diagram showing a state in which silicon carbide substrate 100 is irradiated with incident light.

[0029] As shown in Fig. 4 , when incident light 71 is irradiated onto first main surface 1, a portion of incident light 71 is reflected by first main surface 1. The reflected incident light 71 is referred to as reflected light 72. Reflected light 72 includes light reflected by specular reflection and light reflected by diffuse reflection. A portion of incident light 71 passes through the interior of silicon carbide substrate 100 and second main surface 2 along arrow C, and is transmitted to the outside of silicon carbide substrate 100. The light transmitted to the outside of silicon carbide substrate 100 is referred to as transmitted light 73.

[0030] A portion of incident light 71 is absorbed as energy by silicon carbide substrate 100 as it travels inside silicon carbide substrate 100. In FIG. 4 , the light absorbed by silicon carbide substrate 100 is shown as absorbed light 74. The energy of incident light 71 is substantially the same as the sum of the energy of reflected light 72, the energy of transmitted light 73, and the energy of absorbed light 74. The angle formed by incident light 71 and a line perpendicular to first main surface 1 at a point on first main surface 1 where incident light 71 is irradiated is defined as incident angle φ. Incident angle φ is, for example, 5°.

[0031] In this specification, the external transmittance is defined as the value obtained by dividing the intensity of transmitted light 73 passing through the second main surface 2 when incident light 71 is irradiated onto the first main surface 1 by the intensity of the incident light 71. The external transmittance depends on the wavelength of the incident light 71.

[0032] According to silicon carbide substrate 100 according to the present embodiment, when the wavelength range of incident light 71 is 800 nm or more and 1100 nm or less, the external transmittance is, for example, 15% or more and 40% or less. When the wavelength range of incident light 71 is 800 nm or more and 1100 nm or less, the external transmittance may be, for example, 18% or more, or 20% or more. When the wavelength range of incident light 71 is 800 nm or more and 1100 nm or less, the external transmittance may be, for example, 38% or less, or 35% or less.

[0033] The external transmittance when the wavelength of the incident light 71 is 800 nm is greater than the external transmittance when the wavelength of the incident light 71 is 1100 nm. When the wavelength of the incident light 71 is 800 nm, the external transmittance is, for example, 30% or more and 40% or less. When the wavelength of the incident light 71 is 1100 nm, the external transmittance is, for example, 15% or more and 25% or less. When the wavelength of the incident light 71 is in the range of 800 nm or more and 1100 nm or less, the external transmittance may monotonically decrease as the wavelength of the incident light 71 becomes longer.

[0034] The value obtained by subtracting the external transmittance when the wavelength of the incident light 71 is 1100 nm from the external transmittance when the wavelength of the incident light 71 is 800 nm and dividing the result by the width of the wavelength range of the incident light 71 is the amount of change in external transmittance with respect to the amount of change in the wavelength of the incident light 71 when the wavelength range of the incident light 71 is 800 nm or more and 1100 nm or less. When the wavelength range of the incident light 71 is 800 nm or more and 1100 nm or less, the width of the wavelength range of the incident light 71 is 300 nm. Hereinafter, the amount of change in external transmittance with respect to the amount of change in the wavelength of the incident light 71 when the wavelength range of the incident light 71 is 800 nm or more and 1100 nm or less will also be simply referred to as the amount of change in external transmittance.

[0035] When the wavelength range of the incident light 71 is 800 nm or more and 1100 nm or less, the absolute value of the change in external transmittance with respect to the change in wavelength of the incident light 71 is 0.06% / nm or less. The absolute value of the change in external transmittance may be, for example, 0.01% / nm or more, or 0.02% / nm or more. The absolute value of the change in external transmittance may be, for example, 0.055% / nm or less, or 0.052% / nm or less.

[0036] The external transmittance can be measured using, for example, a UV-1800 ultraviolet-visible spectrophotometer manufactured by Shimadzu Corporation. As shown in FIG. 3 , the locations at which the external transmittance is measured are, for example, a first center point 91, a first position 61, and a second position 62. When viewed in a third direction 103, the first center point 91 is the center point of the first main surface 1. The first position 61 is located 50 mm away from the first center point 91 in a second direction 102. The second position 62 is located 50 mm away from the first center point 91 in the opposite direction to the second direction 102. When viewed in a direction from the first main surface 1 to the second main surface 2, the first center point 91 may be located between the first position 61 and the second position 62.

[0037] Incident light 71 is irradiated at each measurement point. The external transmittance is measured while changing the wavelength of incident light 71, for example, from 200 nm to 1100 nm. Using the measured external transmittance values, the amount of change in external transmittance with respect to the amount of change in wavelength of incident light 71 when the wavelength range of incident light 71 is 800 nm or more and 1100 nm or less is determined. The average amount of change in external transmittance measured at each measurement point is taken as the amount of change in external transmittance of silicon carbide substrate 100 according to this embodiment.

[0038] When the wavelength of the incident light 71 is 300 nm or less, for example, deuterium is used as the light source. When the wavelength of the incident light 71 is longer than 300 nm, for example, halogen is used as the light source. For example, a silicon photodiode is used as the detector.

[0039] <LTV of Silicon Carbide Substrate> Next, a description will be given of a method for measuring the LTV (Local Thickness Variation) of silicon carbide substrate 100. The LTV can be measured using, for example, a "Tropel FlatMaster (trademark)" manufactured by Corning Tropel.

[0040] 5 is a schematic bottom view showing the LTV measurement area on the first principal surface 1. As shown in FIG. 5, the first principal surface 1 includes a first center point 91. When viewed in the third direction 103, a square area centered on the first center point 91 is defined as a first central region 10. The length (D1) of one side of the first central region 10 is, for example, 90 mm. When viewed in the third direction 103, one side of the first central region 10 is parallel to the extension direction of the orientation flat 7.

[0041] The first central region 10 is divided into a plurality of first square measurement regions 11. The length (D2) of one side of each of the plurality of first square measurement regions 11 is, for example, 3 mm. The number of the plurality of first square measurement regions 11 is, for example, 900. One side of each of the plurality of first square measurement regions 11 is parallel to the extension direction of the orientation flat 7. In each of the plurality of first square measurement regions 11, the LTV is measured.

[0042] 6 is a schematic plan view showing the LTV measurement region on the second principal surface 2. As shown in FIG. 6, the second principal surface 2 includes a second center point 92. When viewed in the fourth direction 104, a square region centered on the second center point 92 is defined as the second central region 20. The length (D3) of one side of the second central region 20 is, for example, 90 mm. When viewed in the fourth direction 104, one side of the second central region 20 is parallel to the extension direction of the orientation flat 7.

[0043] The second central region 20 is divided into a plurality of second square measurement regions 21. The length (D4) of one side of each of the plurality of second square measurement regions 21 is, for example, 3 mm. The number of the plurality of second square measurement regions 21 is, for example, 900. One side of each of the plurality of second square measurement regions 21 is parallel to the extension direction of the orientation flat 7. In each of the plurality of second square measurement regions 21, the LTV is measured.

[0044] Next, the definition of LTV will be described with reference to Fig. 7, which is a schematic diagram illustrating the definition of LTV.

[0045] LTV=|T1−T2| (Formula 1) LTV is measured, for example, by the following procedure. First, silicon carbide substrate 100 is prepared. Either first main surface 1 or second main surface 2 is used as chucking surface B to be chucked to a flat chuck surface. The surface opposite chucking surface B is used as measurement surface A.

[0046] The entire chucking surface B is chucked to the chuck surface. Next, an image of the measurement surface A, which is located opposite the chucking surface B, is optically acquired. As shown in FIG. 7 and Equation 1, the LTV is the value obtained by subtracting the height from the chucking surface B to the lowest point P2 of the measurement surface A (second height T2) from the height from the chucking surface B to the highest point P1 of the measurement surface A (first height T1) when the chucking surface B is entirely chucked to the flat chuck surface. In other words, the LTV is the value obtained by subtracting the shortest distance between the measurement surface A and the chucking surface B from the longest distance between the measurement surface A and the chucking surface B in a direction perpendicular to the chucking surface B. In other words, the LTV is the distance between a plane (first plane L1) that passes through the highest point P1 and is parallel to the chucking surface B and a plane (second plane L2) that passes through the lowest point P2 and is parallel to the chucking surface B.

[0047] The maximum value of LTV in the plurality of first square measurement regions 11 is, for example, 0.9 μm or less. The maximum value of LTV in the plurality of first square measurement regions 11 may be, for example, 0.8 μm or less, or 0.7 μm or less. The maximum value of LTV in the plurality of first square measurement regions 11 may be, for example, 0.1 μm or more, or 0.2 μm or more. The maximum value of LTV in the plurality of second square measurement regions 21 may be smaller than the maximum value of LTV in the plurality of first square measurement regions 11.

[0048] The total number of the first square measurement regions 11 is set to a first value. The first value is, for example, 900. The number of the first square measurement regions 11 having an LTV of 0.65 μm or less is set to a second value. The ratio of the second value to the first value is, for example, 40% or more. The ratio of the second value to the first value may be, for example, 60% or more, 75% or more, or 95% or more. The ratio of the second value to the first value may be 100% or less, or 99% or less.

[0049] The total number of the second square measurement areas 21 is set to a third value. The third value is, for example, 900. The number of the second square measurement areas 21 having an LTV of 0.65 μm or less is set to a fourth value. The ratio of the fourth value to the third value may be greater than the ratio of the second value to the first value.

[0050] <Electrical Resistivity of Silicon Carbide Substrate> Next, a method for measuring the electrical resistivity of silicon carbide substrate 100 will be described. The electrical resistivity can be measured using, for example, an electrical resistivity measuring device "EC-80" manufactured by Napson Corporation. The electrical resistivity can be measured, for example, at first center point 91. The electrical resistivity of silicon carbide substrate 100 is not particularly limited, and may be, for example, 100 mΩcm or less, 50 mΩcm or less, or 25 mΩcm or less. The electrical resistivity of silicon carbide substrate 100 is not particularly limited, and may be, for example, 0.1 mΩcm or more, or 1 mΩcm or more.

[0051] <Method for manufacturing silicon carbide substrate> Next, a method for manufacturing silicon carbide substrate 100 according to this embodiment will be described. Fig. 8 is a flow chart schematically showing the method for manufacturing silicon carbide substrate 100 according to this embodiment. As shown in Fig. 8, the method for manufacturing silicon carbide substrate 100 according to this embodiment mainly includes a step (S10) of growing a silicon carbide single crystal, a step (S20) of forming a silicon carbide substrate, a step (S30) of mechanically polishing the silicon carbide substrate, and a step (S40) of chemically mechanically polishing the silicon carbide substrate.

[0052] First, the step (S10) of growing a silicon carbide single crystal is carried out. Fig. 9 is a cross-sectional schematic diagram showing the step (S10) of growing a silicon carbide single crystal. As shown in Fig. 9, silicon carbide single crystal manufacturing apparatus 500 is prepared. Silicon carbide single crystal manufacturing apparatus 500 mainly includes crucible 30, first resistive heater 81, second resistive heater 82, and third resistive heater 83.

[0053] Crucible 30 has a raw material storage section 32 and a lid 31. Lid 31 is disposed on raw material storage section 32. First resistive heater 81 is disposed above lid 31. Second resistive heater 82 is disposed to surround the outer periphery of raw material storage section 32. Third resistive heater 83 is disposed below the bottom surface of raw material storage section 32.

[0054] As shown in Figure 9, silicon carbide source material 59 is placed in source material storage unit 32. Seed substrate 50 is fixed to lid unit 31 using, for example, an adhesive (not shown). Seed substrate 50 has growth surface 51 and attachment surface 52. Attachment surface 52 is opposite growth surface 51. Growth surface 51 faces silicon carbide source material 59. Attachment surface 52 faces lid unit 31. Growth surface 51 of seed substrate 50 is positioned so as to face the surface of silicon carbide source material 59.

[0055] Seed substrate 50 is, for example, a hexagonal silicon carbide substrate having a polytype of 4H. Growth surface 51 has a diameter of, for example, 150 mm. Growth surface 51 may have a diameter of 150 mm or more. Growth surface 51 is, for example, a {0001} plane or a plane inclined at an off-angle of approximately 8° or less with respect to the {0001} plane.

[0056] Crucible 30 is heated by applying electric power to first resistive heater 81, second resistive heater 82, and third resistive heater 83. Specifically, crucible 30 is heated so that the temperature of silicon carbide source material 59 becomes higher than the temperature of seed substrate 50. The pressure inside crucible 30 is set to, for example, 0.1 kPa or more and 3 kPa or less. The temperature of crucible 30 is set to, for example, 2100°C or more and 2300°C or less. As a result, silicon carbide source material 59 sublimes, and silicon carbide gas is generated. The silicon carbide gas recrystallizes on the surface of seed substrate 50. As a result, silicon carbide single crystal 110 grows on the surface of seed substrate 50. After the growth of silicon carbide single crystal 110 is completed, silicon carbide single crystal 110 is cooled to room temperature. In this manner, silicon carbide single crystal 110 is formed.

[0057] Next, a step (S20) of forming a silicon carbide substrate is performed. First, silicon carbide single crystal 110 is sliced ​​along a plane perpendicular to the central axis of silicon carbide single crystal 110, for example, using a saw wire. This results in a plurality of silicon carbide substrates 100. Next, first main surface 1 and second main surface 2 of silicon carbide substrate 100 are each ground. In this manner, silicon carbide substrate 100 is formed.

[0058] Next, a step (S30) of mechanically polishing the silicon carbide substrate is carried out. Fig. 10 is a cross-sectional schematic view showing the step of mechanically polishing silicon carbide substrate 100. As shown in Fig. 10, double-sided polishing apparatus 300 mainly has upper surface plate 301, lower surface plate 302, upper polishing cloth 303, and lower polishing cloth 304. Upper polishing cloth 303 is attached to the lower surface of upper surface plate 301. Lower polishing cloth 304 is attached to the upper surface of lower surface plate 302. For example, polishing cloth G804W manufactured by Fujibo Ehime Co., Ltd. is used as each of upper polishing cloth 303 and lower polishing cloth 304.

[0059] 10 , silicon carbide substrate 100 is placed between upper polishing cloth 303 and lower polishing cloth 304. First main surface 1 faces, for example, lower polishing cloth 304. Second main surface 2 faces, for example, upper polishing cloth 303. Next, slurry 310 is introduced between silicon carbide substrate 100 and upper polishing cloth 303 and between silicon carbide substrate 100 and lower polishing cloth 304. The flow rate of slurry 310 is set to, for example, 20 ml / min.

[0060] If the wettability of the slurry 310 to the first main surface 1 is low, the slurry 310 will be repelled by the first main surface 1. In this case, the abrasive grains in the slurry 310 will have difficulty penetrating into the first main surface 1. As a result, the flatness of the first main surface 1 will not be sufficiently improved. Therefore, a slurry that has high wettability to the first main surface 1 is selected as the slurry 310. This makes it possible to prevent the slurry 310 from being repelled by the first main surface 1 when mechanically polishing the first main surface 1. Therefore, the flatness of the first main surface 1 can be improved. The contact angle is used as an index for evaluating wettability.

[0061] Fig. 11 is a cross-sectional schematic diagram showing a method for measuring the contact angle λ. The contact angle λ is measured by dropping a slurry 310 onto the first main surface 1. Specifically, as shown in Fig. 11, one drop of the slurry 310 is dropped, for example, onto a first center point 91. In a cross section perpendicular to the first main surface 1, an end point 94 of the interface between the first main surface 1 and the slurry 310 is assumed. The angle between a tangent 93 to the surface of the slurry 310 at the end point 94 and the first main surface 1 is taken as the contact angle λ of the slurry 310 dropped onto the first center point 91.

[0062] Contact angle λ is measured, for example, as follows. 0.2 mL of slurry 310 is dropped onto first center point 91 of silicon carbide substrate 100. An image of dropped slurry 310 is taken from a direction parallel to first main surface 1. A tangent line 93 is defined using the taken image, and contact angle λ is measured. Contact angle λ is measured after the step (S20) of forming a silicon carbide substrate and before the step (S30) of mechanically polishing the silicon carbide substrate. Specifically, contact angle λ is measured on silicon carbide substrate 100 that has been sliced ​​using a wire saw and has not yet been mechanically polished.

[0063] Prior to the step (S30) of mechanically polishing the silicon carbide substrate, contact angle λ when slurry 310 is dropped onto first center point 91 (see FIG. 1 ) of silicon carbide substrate 100 is, for example, 100° or less. In other words, contact angle λ when slurry 310 is dropped onto first main surface 1 that has been sliced ​​using a wire saw and has not been polished is, for example, 100° or less. Contact angle λ may be, for example, 75° or less, or 40° or less. This allows for improved wettability of slurry 310 with respect to first main surface 1 compared to when contact angle λ is large. As a result, the flatness of first main surface 1 can be improved. Specifically, the LTV on first main surface 1 can be reduced.

[0064] As shown in Fig. 10, the slurry 310 is composed of abrasive grains 312 and a solution 311. The abrasive grains 312 are composed of, for example, diamond. The particle diameter at which the integrated value of the particle diameter distribution of the abrasive grains 312 corresponds to 50% is defined as a first particle diameter D50. The first particle diameter D50 is, for example, 1.0 µm. The particle diameter at which the integrated value of the particle diameter distribution of the abrasive grains 312 corresponds to 90% is defined as a second particle diameter D90. The second particle diameter D90 is, for example, 1.6 µm.

[0065] The solution 311 contains, for example, a solvent and a lubricant. The solvent is, for example, ethylene glycol. The lubricant is, for example, glucose. The weight ratio of the lubricant to the weight of the solution 311 is, for example, 1%. This can reduce the contact angle λ when the slurry 310 is dropped onto the first center point 91.

[0066] Solution 311 may contain an oxidizing agent. The oxidizing agent is, for example, citric acid or chloroacetic acid. When the oxidizing agent is citric acid, the ratio of the weight of the oxidizing agent to the weight of solution 311 is, for example, 1%. Citric acid has a chelating effect. Therefore, when the oxidizing agent is citric acid, slurry 310 can remove metal impurities adhering to the surface of silicon carbide substrate 100. Metal impurities reduce the wettability of slurry 310 to first main surface 1. Therefore, when the oxidizing agent of slurry 310 is citric acid, the wettability of slurry 310 to first main surface 1 can be improved.

[0067] When the oxidizing agent is chloroacetic acid, the ratio of the weight of the oxidizing agent to the weight of solution 311 is, for example, 0.5%. When the oxidizing agent is chloroacetic acid, the surface of silicon carbide substrate 100 is oxidized by chlorine atoms contained in chloroacetic acid. As a result, an oxide film is formed on the surface of silicon carbide substrate 100. The oxide film improves the wettability of slurry 310 to first main surface 1. As a result, when the oxidizing agent of slurry 310 is chloroacetic acid, the wettability of slurry 310 to first main surface 1 can be improved.

[0068] 10 , silicon carbide substrate 100 is sandwiched between upper polishing cloth 303 and lower polishing cloth 304, and thereby a surface pressure F is applied to silicon carbide substrate 100. With surface pressure F applied to silicon carbide substrate 100, upper surface plate 301 and lower surface plate 302 each rotate. The rotation speed of upper surface plate 301 is set to 50 rotations per minute. The rotation speed of lower surface plate 302 is set to 100 rotations per minute. From another perspective, the ratio of the speed of lower surface plate 302 to the speed of upper surface plate 301 is set to 2.

[0069] The time when mechanical polishing starts is defined as time point 1, 30 minutes after the start of mechanical polishing is defined as time point 2, 60 minutes after the start of mechanical polishing is defined as time point 3, 90 minutes after the start of mechanical polishing is defined as time point 4, 120 minutes after the start of mechanical polishing is defined as time point 5, and the time when mechanical polishing ends is defined as time point 6. The processing time of mechanical polishing is, for example, 600 minutes. The processing time of mechanical polishing is the time between time point 1 and time point 6.

[0070] From the first time point to the second time point, the surface pressure F is, for example, 100 g / cm 2 From the second time point to the third time point, the surface pressure F is, for example, 100 g / cm 2 to 200 g / cm 2 From the third time point to the fourth time point, the surface pressure F is increased to, for example, 200 g / cm 2 From the fourth time point to the fifth time point, the surface pressure F is maintained at, for example, 200 g / cm 2 to 300 g / cm 2 From the fifth time point to the sixth time point, the surface pressure F is increased to, for example, 300 g / cm 2 In this manner, both surfaces of silicon carbide substrate 100 are mechanically polished.

[0071] Compared to mechanical polishing, chemical mechanical polishing, which will be described later, has a smaller polishing amount per time. Therefore, when chemical mechanical polishing is used to improve macroscopic flatness represented by LTV or the like, the time required for chemical mechanical polishing increases excessively. Therefore, in order to obtain a silicon carbide substrate 100 with high flatness, it is desirable to use mechanical polishing to sufficiently improve the flatness of the surface of the silicon carbide substrate 100. According to the method for manufacturing the silicon carbide substrate 100 of this embodiment, the flatness of the surface of the silicon carbide substrate 100 can be sufficiently improved by using the step (S30) of mechanically polishing the silicon carbide substrate described above.

[0072] Next, the step (S40) of chemically mechanically polishing the silicon carbide substrate is carried out. As in the step (S30) of mechanically polishing the silicon carbide substrate, the step (S40) of chemically mechanically polishing the silicon carbide substrate uses double-sided polishing apparatus 300 shown in FIG. 10 . Silicon carbide substrate 100 is disposed between upper polishing cloth 303 and lower polishing cloth 304. By sandwiching silicon carbide substrate 100 between upper polishing cloth 303 and lower polishing cloth 304, a surface pressure F is applied to silicon carbide substrate 100. Slurry is supplied between silicon carbide substrate 100 and each of upper polishing cloth 303 and lower polishing cloth 304. By rotating each of upper surface plate 301 and lower surface plate 302, silicon carbide substrate 100 is chemically mechanically polished.

[0073] The slurry used for chemical mechanical polishing is different from slurry 310 used for mechanical polishing. The slurry used for chemical mechanical polishing contains, for example, abrasive grains and an oxidizing agent. The abrasive grains are, for example, colloidal silica. The oxidizing agent is, for example, permanganate. In this manner, silicon carbide substrate 100 according to this embodiment (see FIGS. 1, 2, and 3) is obtained.

[0074] <Method of Manufacturing Silicon Carbide Semiconductor Device> Next, a method of manufacturing silicon carbide semiconductor device 400 according to this embodiment will be described. Fig. 12 is a flow chart schematically showing a method of manufacturing silicon carbide semiconductor device 400 according to this embodiment. As shown in Fig. 12, the method of manufacturing silicon carbide semiconductor device 400 according to this embodiment mainly includes a step (S1) of preparing a silicon carbide substrate, a step (S2) of forming a silicon carbide epitaxial layer on the silicon carbide substrate, a step (S3) of processing the silicon carbide epitaxial layer, and a step (S4) of forming an electrode on the silicon carbide epitaxial layer.

[0075] The step (S1) of preparing a silicon carbide substrate and the step (S2) of forming a silicon carbide epitaxial layer on the silicon carbide substrate constitute a step (S5) of manufacturing a silicon carbide epitaxial substrate. In other words, the method of manufacturing silicon carbide epitaxial substrate 200 according to this embodiment mainly includes the step (S1) of preparing a silicon carbide substrate and the step (S2) of forming a silicon carbide epitaxial layer on the silicon carbide substrate.

[0076] First, the step (S1) of preparing a silicon carbide substrate is performed. Fig. 13 is a schematic cross-sectional view showing the step (S1) of preparing a silicon carbide substrate. As shown in Fig. 13, a silicon carbide substrate 100 according to this embodiment is prepared.

[0077] Next, the step (S2) of forming a silicon carbide epitaxial layer on the silicon carbide substrate is performed. FIG. 14 is a schematic cross-sectional view showing the step (S2) of forming a silicon carbide epitaxial layer on the silicon carbide substrate. As shown in FIG. 14 , for example, silicon carbide epitaxial layer 40 is formed by epitaxial growth on second main surface 2 of silicon carbide substrate 100. In the epitaxial growth, for example, silane (SiH 4 ) and propane (C 3 H 8 ) are used as source gases, and hydrogen (H 2 ) is used as a carrier gas. The temperature of the epitaxial growth is, for example, approximately 1400° C. or higher and 1700° C. or lower. In the epitaxial growth, an n-type impurity such as nitrogen is introduced into silicon carbide epitaxial layer 40. In this manner, silicon carbide epitaxial substrate 200 according to this embodiment is prepared. In other words, silicon carbide epitaxial substrate 200 is manufactured in the step (S5) of manufacturing a silicon carbide epitaxial substrate.

[0078] 15 is a plan view schematically illustrating the configuration of silicon carbide epitaxial substrate 200 according to this embodiment. As shown in FIGS. 14 and 15 , silicon carbide epitaxial substrate 200 according to this embodiment mainly has third main surface 3, first main surface 1, and outer peripheral side surface 9. First main surface 1 is opposite third main surface 3. Third main surface 3 is the front surface of silicon carbide epitaxial substrate 200. First main surface 1 is the back surface of silicon carbide epitaxial substrate 200. Outer peripheral side surface 9 is continuous with each of first main surface 1 and third main surface 3. Third main surface 3 extends along each of first direction 101 and second direction 102.

[0079] Third main surface 3 is a {0001} plane or a plane inclined with respect to the {0001} plane. When third main surface 3 is a plane inclined with respect to the {0001} plane, the inclination angle (off angle θ) with respect to the {0001} plane is, for example, greater than 0° and equal to or less than 8°.

[0080] The diameter of the third main surface 3 is defined as a second maximum diameter W2. The second maximum diameter W2 is, for example, 150 mm (6 inches) or more. The second maximum diameter W2 is not particularly limited. The second maximum diameter W2 may be, for example, 200 mm (8 inches) or more. The second maximum diameter W2 may be 400 mm (16 inches) or less. When viewed along a line perpendicular to the third main surface 3, the second maximum diameter W2 is the longest linear distance between two different points on the outer peripheral side surface 9.

[0081] As shown in Figure 14, at second main surface 2, silicon carbide epitaxial layer 40 is in contact with silicon carbide substrate 100. Silicon carbide epitaxial layer 40 may have a buffer layer 41 and a drift layer 42. Buffer layer 41 is in contact with silicon carbide substrate 100. Drift layer 42 is provided on buffer layer 41. The nitrogen concentration contained in drift layer 42 may be lower than the nitrogen concentration contained in buffer layer 41. Drift layer 42 constitutes third main surface 3. The cross section shown in Figure 14 is a cross section taken along line XIV-XIV in Figure 15.

[0082] Next, a step (S3) of processing the silicon carbide epitaxial layer is performed. First, ions are implanted into silicon carbide epitaxial layer 40. FIG. 16 is a schematic cross-sectional view showing the step of forming a body region. In the step of forming the body region, p-type impurities such as aluminum are ion-implanted into third main surface 3 of silicon carbide epitaxial layer 40. This forms body region 113 having p-type conductivity. Portions where body region 113 is not formed become drift layer 42 and buffer layer 41. The thickness of body region 113 is, for example, 0.9 μm. Silicon carbide epitaxial layer 40 includes buffer layer 41, drift layer 42, and body region 113.

[0083] Next, a step of forming a source region is performed. FIG. 17 is a schematic cross-sectional view showing the step of forming the source region. Specifically, n-type impurities such as phosphorus are ion-implanted into the body region 113. This forms a source region 114 having n-type conductivity. The thickness of the source region 114 is, for example, 0.4 μm. The concentration of the n-type impurity contained in the source region 114 is higher than the concentration of the p-type impurity contained in the body region 113.

[0084] Next, a p-type impurity such as aluminum is ion-implanted into the source region 114 to form a contact region 118. The contact region 118 is formed to penetrate the source region 114 and the body region 113 and to be in contact with the drift layer 42. The concentration of the p-type impurity contained in the contact region 118 is higher than the concentration of the n-type impurity contained in the source region 114.

[0085] Next, activation annealing is performed to activate the ion-implanted impurities. In the activation annealing, silicon carbide epitaxial substrate 200 is heated, for example, using an infrared lamp. The temperature of the activation annealing is, for example, 1500°C or higher and 1900°C or lower. The activation annealing time is, for example, about 30 minutes. The atmosphere of the activation annealing is, for example, an argon atmosphere.

[0086] Next, a step of forming trenches in the third main surface 3 of the silicon carbide epitaxial layer 40 is performed. FIG. 18 is a cross-sectional schematic diagram showing the step of forming trenches in the third main surface 3 of the silicon carbide epitaxial layer 40. A mask 117 having openings is formed on the third main surface 3 including the source region 114 and the contact region 118. The source region 114, the body region 113, and a portion of the drift layer 42 are removed by etching using the mask 117. For example, inductively coupled plasma reactive ion etching can be used as the etching method. Specifically, for example, inductively coupled plasma reactive ion etching using SF or a mixed gas of SF and O as the reactive gas is used. Recesses are formed in the third main surface 3 by etching.

[0087] Next, thermal etching is performed on the recesses. Thermal etching can be performed, for example, by heating the mask 117 formed on the third main surface 3 in an atmosphere containing a reactive gas having at least one type of halogen atom. The at least one type of halogen atom includes at least one of chlorine (Cl) atoms and fluorine (F) atoms. The atmosphere can include, for example, Cl2, BCl3, SF6, or CF4. For example, thermal etching is performed using a mixed gas of chlorine gas and oxygen gas as the reactive gas, and setting the heat treatment temperature to, for example, 700°C or higher and 1000°C or lower. The reactive gas may contain a carrier gas in addition to the above-mentioned chlorine gas and oxygen gas. Examples of the carrier gas that can be used include nitrogen gas, argon gas, and helium gas.

[0088] 18 , a trench 56 is formed in the third main surface 3 by thermal etching. The trench 56 is defined by a sidewall surface 53 and a bottom wall surface 54. The sidewall surface 53 is formed by the source region 114, the body region 113, and the drift layer 42. The bottom wall surface 54 is formed by the drift layer 42. Next, the mask 117 is removed from the third main surface 3.

[0089] Next, a step of forming a gate insulating film is performed. FIG. 19 is a schematic cross-sectional view showing the step of forming a gate insulating film. Specifically, silicon carbide epitaxial substrate 200 having trench 56 formed in third main surface 3 is heated in an oxygen-containing atmosphere at a temperature of, for example, 1300° C. or higher and 1400° C. or lower. This forms gate insulating film 115 that is in contact with drift layer 42 at bottom wall surface 54, in contact with drift layer 42, body region 113, and source region 114 at sidewall surface 53, and in contact with source region 114 and contact region 118 at third main surface 3.

[0090] Next, a step (S4) of forming an electrode on the silicon carbide epitaxial layer is performed. First, a step of forming a gate electrode is performed. FIG. 20 is a cross-sectional view schematically illustrating the step of forming a gate electrode and an interlayer insulating film. Gate electrode 127 is formed inside trench 56 so as to contact gate insulating film 115. Gate electrode 127 is disposed inside trench 56 and is formed on gate insulating film 115 so as to face each of sidewall surface 53 and bottom wall surface 54 of trench 56. Gate electrode 127 is formed, for example, by a low pressure chemical vapor deposition (LPCVD) method.

[0091] Next, an interlayer insulating film 126 is formed. The interlayer insulating film 126 is formed so as to cover the gate electrode 127 and to be in contact with the gate insulating film 115. The interlayer insulating film 126 is formed by, for example, chemical vapor deposition. The interlayer insulating film 126 is made of, for example, a material containing silicon dioxide. Next, the interlayer insulating film 126 and part of the gate insulating film 115 are etched so as to form openings over the source region 114 and the contact region 118. As a result, the contact region 118 and the source region 114 are exposed from the gate insulating film 115.

[0092] Next, a step of forming a source electrode is performed. The source electrode 116 is formed so as to be in contact with each of the source region 114 and the contact region 118. The source electrode 116 is formed by, for example, a sputtering method. The source electrode 116 is made of, for example, a material containing Ti (titanium), Al (aluminum), and Si (silicon).

[0093] Next, alloying annealing is performed. Specifically, the source electrode 116 in contact with each of the source region 114 and the contact region 118 is maintained at a temperature of, for example, 900° C. or higher and 1100° C. or lower for about 5 minutes. As a result, at least a portion of the source electrode 116 is silicided. This forms the source electrode 116 in ohmic contact with the source region 114. The source electrode 116 may also form an ohmic contact with the contact region 118.

[0094] Next, the source wiring 119 is formed. The source wiring 119 is electrically connected to the source electrode 116. The source wiring 119 is formed so as to cover the source electrode 116 and the interlayer insulating film 126.

[0095] Next, a step of forming a drain electrode is carried out. First, silicon carbide substrate 100 is polished at first main surface 1. This reduces the thickness of silicon carbide substrate 100. Next, drain electrode 123 is formed. Drain electrode 123 is formed so as to be in contact with first main surface 1. In this manner, silicon carbide semiconductor device 400 according to this embodiment is manufactured.

[0096] 21 is a cross-sectional schematic diagram showing the configuration of a silicon carbide semiconductor device according to this embodiment. The silicon carbide semiconductor device 400 is, for example, a MOSFET (Metal Oxide Semiconductor Field Effect Transistor). The silicon carbide semiconductor device 400 mainly includes a silicon carbide epitaxial substrate 200, a gate electrode 127, a gate insulating film 115, a source electrode 116, a drain electrode 123, a source wiring 119, and an interlayer insulating film 126. The silicon carbide epitaxial substrate 200 includes a buffer layer 41, a drift layer 42, a body region 113, a source region 114, and a contact region 118. The silicon carbide semiconductor device 400 may be, for example, an IGBT (Insulated Gate Bipolar Transistor) or the like.

[0097] Next, the effects of the method for manufacturing silicon carbide substrate 100, silicon carbide epitaxial substrate 200, and silicon carbide semiconductor device 400 according to this embodiment will be described.

[0098] In manufacturing silicon carbide semiconductor devices 400, it is preferable to have a high yield of silicon carbide semiconductor devices 400. However, there have been cases where the yield of fabricated silicon carbide semiconductor devices 400 has been lower than expected. Specifically, for example, in fabricated silicon carbide semiconductor devices 400, when a load current is short-circuited, the time until silicon carbide semiconductor device 400 is broken has been shorter than expected.

[0099] The inventors have made the following discovery while investigating factors behind the decrease in yield of silicon carbide semiconductor devices 400. Specifically, the inventors have focused on the infrared light absorptance of silicon carbide substrate 100. In the process of manufacturing silicon carbide semiconductor device 400, activation annealing is performed on silicon carbide epitaxial substrate 200 into which ions have been implanted. In the activation annealing, silicon carbide epitaxial substrate 200 is heated using an infrared lamp. Specifically, silicon carbide substrate 100 is heated by irradiating first main surface 1 of silicon carbide substrate 100 with infrared light. Thereafter, heat is conducted from silicon carbide substrate 100 to silicon carbide epitaxial layer 40, thereby heating silicon carbide epitaxial layer 40.

[0100] If the infrared light absorptance of silicon carbide substrate 100 is excessively low, the temperature of silicon carbide substrate 100 will have difficulty following the set temperature of the infrared lamp. Furthermore, the intensity of the infrared light irradiated onto first main surface 1 may vary within the plane of first main surface 1. Therefore, if the infrared light absorptance of silicon carbide substrate 100 is excessively low, the temperature will be excessively low around the portion of first main surface 1 where the intensity of the irradiated infrared light is weak. In this case, portions of silicon carbide epitaxial substrate 200 will be generated where the implanted ions are not sufficiently activated. As a result, the yield of silicon carbide semiconductor device 400 will decrease. Therefore, it is preferable that silicon carbide substrate 100 have a high infrared light absorptance. Specifically, it is preferable that the integrated value of the absorptance in the infrared light wavelength range (approximately 800 nm or more) is large.

[0101] The inventors have come to the following finding while studying ways to increase the infrared light absorptance of silicon carbide substrate 100. Specifically, the inventors have focused on the external transmittance of silicon carbide substrate 100. Fig. 22 is a schematic diagram showing the relationship between the wavelength of incident light 71 and the external transmittance of silicon carbide substrate 100. In Fig. 22, the horizontal axis represents the wavelength of incident light 71. In Fig. 22, the vertical axis represents the external transmittance of silicon carbide substrate 100 containing n-type impurities.

[0102] As shown in the graph indicated by the solid line in FIG. 22 , when the wavelength of incident light 71 is between approximately 650 nm and 1100 nm, the external transmittance of silicon carbide substrate 100 decreases as the wavelength of incident light 71 increases. Similarly, even when the wavelength of incident light 71 is greater than 1100 nm, the external transmittance of silicon carbide substrate 100 decreases as the wavelength of incident light 71 increases. There is a positive correlation between the energy of transmitted light 73 and the energy of absorbed light 74. Therefore, the energy of absorbed light 74 in silicon carbide substrate 100 decreases as the wavelength of incident light 71 increases. After extensive research, the inventors have found that optimizing the polishing conditions in the step of mechanically polishing a silicon carbide substrate can suppress the decrease in external transmittance associated with an increase in the wavelength of incident light 71. Specifically, the inventors have introduced, for example, a slurry 310 having high wettability with respect to first main surface 1 as the polishing liquid used during mechanical polishing.

[0103] According to silicon carbide substrate 100 of this embodiment, when the wavelength of incident light 71 is in the range of 800 nm or more and 1100 nm or less, the absolute value of the change in external transmittance with respect to the wavelength of incident light 71 is 0.06% / nm or less. Therefore, when the wavelength of incident light 71 is in the range of 800 nm or more and 1100 nm or less, a decrease in external transmittance with an increase in the wavelength of incident light 71 can be suppressed. Specifically, as shown by the dashed line in the graph of FIG. 22 , a decrease in external transmittance with an increase in the wavelength of incident light 71 can be suppressed. Furthermore, even when the wavelength is greater than 1100 nm, a decrease in external transmittance with an increase in the wavelength of incident light 71 can be suppressed. This allows for an increase in the amount of absorption of light irradiated from an infrared lamp during activation annealing. As a result, the yield of silicon carbide semiconductor devices 400 can be improved.

[0104] The energy of incident light 71 is substantially the same as the sum of the energy of reflected light 72, the energy of transmitted light 73, and the energy of absorbed light 74. Therefore, by suppressing the reflection of incident light 71 at first principal surface 1, it is possible to increase the energy of each of transmitted light 73 and absorbed light 74. Specifically, by reducing the unevenness on first principal surface 1, it is possible to suppress diffuse reflection of incident light 71 at first principal surface 1. In particular, by making the LTV value on first principal surface 1 smaller than the wavelength of incident light 71, it is possible to suppress diffuse reflection at first principal surface 1.

[0105] In silicon carbide substrate 100 according to the present embodiment, the maximum value of LTV in a plurality of first square measurement regions 11 may be equal to or less than 0.9 μm. This can suppress reflection of incident light 71 on first main surface 1. This can further improve the absorption of light irradiated from an infrared lamp during activation annealing.

[0106] When the wavelength of incident light 71 is not less than 650 nm and not more than 800 nm, the external transmittance of silicon carbide substrate 100 decreases as the wavelength of incident light 71 increases. Therefore, when the wavelength of incident light 71 is not less than 650 nm and not more than 800 nm, it is preferable that the decrease in external transmittance of silicon carbide substrate 100 with an increase in the wavelength of incident light 71 is small. According to silicon carbide substrate 100 according to this embodiment, the ratio of the second value to the first value is 40% or more. Therefore, the area of ​​the region on first main surface 1 where the LTV is 0.65 μm is increased. This increases the region on first main surface 1 where the reflectance is reduced when the wavelength of incident light 71 is 650 nm or more. As a result, the external transmittance can be improved when the wavelength of incident light 71 is 650 nm or more.

[0107] <Sample Preparation> First, silicon carbide substrates 100 according to Samples 1 to 6 were prepared. Silicon carbide substrates 100 according to Samples 1 and 2 are comparative examples. Silicon carbide substrates 100 according to Samples 3 to 6 are examples.

[0108]

[0109] Table 1 shows the manufacturing conditions for silicon carbide substrates 100 according to Samples 1 to 6. As shown in Table 1, the manufacturing methods for silicon carbide substrates 100 according to Samples 1 and 2 differ from the above-described manufacturing method for silicon carbide substrate 100 mainly in the composition of slurry 310. Silicon carbide substrates 100 according to Samples 3 to 6 were fabricated using the above-described manufacturing method for silicon carbide substrate 100.

[0110] In producing silicon carbide substrates 100 according to Samples 1 to 6, ethylene glycol was used as a solvent in solution 311 of slurry 310. In producing silicon carbide substrates 100 according to Samples 1 and 2, solution 311 did not contain either a lubricant or an oxidizer.

[0111] In the production of silicon carbide substrates 100 according to Samples 3 to 6, solution 311 contained glucose as a lubricant. The ratio of the weight of the lubricant to the weight of solution 311 was set to 1%. In the production of silicon carbide substrate 100 according to Sample 3, solution 311 did not contain an oxidizing agent. In the production of silicon carbide substrate 100 according to Sample 4, solution 311 contained citric acid as an oxidizing agent. The ratio of the weight of citric acid to the weight of solution 311 was set to 1%. In the production of silicon carbide substrates 100 according to Samples 5 and 6, solution 311 contained chloroacetic acid as an oxidizing agent. The ratio of the weight of chloroacetic acid to the weight of solution 311 was set to 0.5%.

[0112] In the silicon carbide substrate 100 of Sample 1, the contact angle λ before the step of mechanically polishing the silicon carbide substrate was 130°. In the silicon carbide substrate 100 of Sample 2, the contact angle λ before the step of mechanically polishing the silicon carbide substrate was 130°. In the silicon carbide substrate 100 of Sample 3, the contact angle λ before the step of mechanically polishing the silicon carbide substrate was 100°. In the silicon carbide substrate 100 of Sample 4, the contact angle λ before the step of mechanically polishing the silicon carbide substrate was 75°. In the silicon carbide substrates 100 of Samples 5 and 6, the contact angle λ before the step of mechanically polishing the silicon carbide substrate was 40°.

[0113] In fabricating silicon carbide substrate 100 according to Samples 1 to 6, a polishing cloth G804W manufactured by Fujibo Ehime Co., Ltd. was used as each of upper polishing cloth 303 and lower polishing cloth 304. First particle diameter D50 was set to 1.0 μm. Second particle diameter D90 was set to 1.6 μm.

[0114] <Evaluation Method> The electrical resistivity of silicon carbide substrates 100 according to Samples 1 to 6 was measured. The electrical resistivity of silicon carbide substrates 100 according to Samples 1 to 6 was measured using an electrical resistivity measuring apparatus EC-80 manufactured by Napson Corporation. The electrical resistivity was measured at first center point 91 of first main surface 1.

[0115] The LTV was measured on first main surface 1 of silicon carbide substrate 100 for samples 1 to 6. Specifically, the LTV was measured in each of a plurality of first square measurement regions 11. The length of one side of first central region 10 was 90 mm. The length of one side of the plurality of first square measurement regions 11 was 3 mm. The number of the plurality of first square measurement regions 11 (first value) was 900. The maximum value of LTV in the plurality of first square measurement regions 11 was measured. The number of first square measurement regions 11 with an LTV of 0.65 μm or less (second value) was measured.

[0116] Next, the external transmittance was measured at the first main surface 1 of the silicon carbide substrate 100 of Samples 1 to 6. A UV-1800 ultraviolet-visible spectrophotometer manufactured by Shimadzu Corporation was used to measure the external transmittance. The external transmittance was measured at each of the first center point 91, the first position 61, and the second position 62. At each measurement point, the external transmittance was measured while changing the wavelength of the incident light 71 from 200 nm to 1100 nm. When the wavelength of the incident light 71 was 300 nm or less, deuterium was used as the light source. When the wavelength of the incident light 71 was longer than 300 nm, halogen was used as the light source. A silicon photodiode was used as the detector.

[0117] The maximum and minimum values ​​of the external transmittance were measured when the wavelength of the incident light 71 was 800 μm or more and 1100 μm or less. The maximum value of the external transmittance was taken as the maximum value of the external transmittance at the first center point 91, the first position 61, and the second position 62. Similarly, the minimum value of the external transmittance was taken as the minimum value of the external transmittance at the first center point 91, the first position 61, and the second position 62. The amount of change in the external transmittance with respect to the wavelength of the incident light 71 was measured.

[0118] <Evaluation results>

[0119]

[0120] Table 2 shows the measurement results of the electrical resistivity, the measurement results of the LTV, and the measurement results of the external transmittance for the silicon carbide substrates 100 according to Samples 1 to 6. As shown in Table 2, the silicon carbide substrates 100 according to Samples 2 and 6 had lower electrical resistivities than the silicon carbide substrates 100 according to Sample 1 and Samples 3 to 5. Specifically, the electrical resistivity of the silicon carbide substrate 100 according to Sample 1 was 22.3 mΩcm. The electrical resistivity of the silicon carbide substrate 100 according to Sample 2 was 18.8 mΩcm. The electrical resistivity of the silicon carbide substrate 100 according to Sample 3 was 21.3 mΩcm. The electrical resistivity of the silicon carbide substrate 100 according to Sample 4 was 21.8 mΩcm. The electrical resistivity of the silicon carbide substrate 100 according to Sample 5 was 21.7 mΩcm. The electrical resistivity of the silicon carbide substrate 100 according to Sample 6 was 18.5 mΩcm.

[0121] As shown in Table 2, the maximum value of LTV was 1.4 μm or more in silicon carbide substrates 100 according to Sample 1 and Sample 2. In silicon carbide substrates 100 according to Sample 1 and Sample 2, the ratio of the second value to the first value was less than 35%.

[0122] In silicon carbide substrates 100 according to Samples 3 to 6, the maximum value of LTV was equal to or less than 0.9. In silicon carbide substrates 100 according to Samples 3 to 6, the ratio of the second value to the first value was 60% or more.

[0123] From the above results, it was confirmed that silicon carbide substrate 100 according to the present disclosure had improved flatness on first main surface 1 compared to silicon carbide substrate 100 according to the comparative example.

[0124] In silicon carbide substrate 100 according to Sample 1 and Sample 2, the external transmittance was equal to or greater than 8% and equal to or less than 39%. In silicon carbide substrate 100 according to Sample 1 and Sample 2, the maximum value of the external transmittance was equal to or greater than 28% and equal to or less than 39%. In silicon carbide substrate 100 according to Sample 1 and Sample 2, the minimum value of the external transmittance was equal to or greater than 8% and equal to or less than 17%.

[0125] In the silicon carbide substrates 100 according to Samples 3 to 6, the external transmittance was equal to or greater than 16% and equal to or less than 38%. In the silicon carbide substrates 100 according to Samples 3 to 6, the maximum value of the external transmittance was equal to or greater than 29% and equal to or less than 38%. In the silicon carbide substrates 100 according to Samples 3 to 6, the minimum value of the external transmittance was equal to or greater than 16% and equal to or less than 23%.

[0126] In silicon carbide substrates 100 according to Samples 1 to 6, the maximum external transmittance was measured when the wavelength of incident light 71 was 800 nm. The minimum external transmittance was measured when the wavelength of incident light 71 was 1100 nm. From another perspective, in silicon carbide substrates 100 according to Samples 1 to 6, the external transmittance when the wavelength of incident light 71 was 800 nm was greater than the external transmittance when the wavelength of incident light 71 was 1100 nm.

[0127] In silicon carbide substrates 100 according to Samples 1 and 2, the amount of change in external transmittance with respect to the amount of change in wavelength of incident light 71 was greater than 0.065% / nm. In silicon carbide substrates 100 according to Samples 3 to 6, the amount of change in external transmittance with respect to the amount of change in wavelength of incident light 71 was 0.060% / nm or less.

[0128] From the above results, it has been confirmed that with silicon carbide substrate 100 according to the present disclosure, the amount of change in external transmittance with respect to the amount of change in wavelength of incident light 71 is reduced when the wavelength range of incident light 71 is 800 nm or more and 1100 nm or less, compared to silicon carbide substrate 100 according to the comparative example.

[0129] In the silicon carbide substrate 100 according to Sample 2, the maximum external transmittance was 28.0%. The minimum external transmittance was 8.2%. In the silicon carbide substrate 100 according to Sample 6, the maximum external transmittance was 29.1%. The minimum external transmittance was 17.5%. Typically, as the resistivity of the silicon carbide substrate 100 decreases, the external transmittance of the silicon carbide substrate 100 decreases. It was confirmed that, with the silicon carbide substrate 100 according to the present disclosure, an excessive decrease in external transmittance was suppressed compared to the silicon carbide substrate 100 according to the comparative example, even when the resistivity of the silicon carbide substrate 100 was low.

[0130] The embodiments and examples disclosed herein are illustrative in all respects and should not be considered limiting. The scope of the present invention is defined by the claims, not by the above-described embodiments, and is intended to include meanings equivalent to the claims and all modifications within the scope thereof.

[0131] 1 First main surface, 2 Second main surface, 3 Third main surface, 7 Orientation flat, 8 Circular arc portion, 9 Outer peripheral side surface, 10 First central region, 11 First square measurement region, 20 Second central region, 21 Second square measurement region, 30 Crucible, 31 Lid portion, 32 Source material storage portion, 40 Silicon carbide epitaxial layer, 41 Buffer layer, 42 Drift layer, 50 Seed substrate, 51 Growth surface, 52 Mounting surface, 53 Side wall surface, 54 Bottom wall surface, 56 Trench, 59 Silicon carbide source material, 61 First position, 62 Second position, 71 Incident light, 72 Reflected light, 73 Transmitted light, 74 Absorbed light, 81 First resistive heater, 82 Second resistive heater, 83 Third resistive heater, 91 First center point, 92 Second center point, 93 Tangent, 94 end point, 100 silicon carbide substrate, 101 first direction, 102 second direction, 103 third direction, 104 fourth direction, 110 silicon carbide single crystal, 113 body region, 114 source region, 115 gate insulating film, 116 source electrode, 117 mask, 118 contact region, 119 source wiring, 123 drain electrode, 126 interlayer insulating film, 127 gate electrode (electrode), 200 silicon carbide epitaxial substrate, 300 double-sided polishing apparatus, 301 upper surface plate, 302 lower surface plate, 303 upper polishing cloth, 304 lower polishing cloth, 310 slurry, 311 solution, 312 abrasive grains, 400 silicon carbide semiconductor device, 500 manufacturing apparatus, A measurement surface, B suction surface, C arrow, F surface pressure, L1 first plane, L2 Second plane, P1 highest point, P2 lowest point, T1 first height, T2 second height, W1 first maximum diameter (maximum diameter), W2 second maximum diameter, θ off angle, φ incident angle, λ contact angle.

Claims

1. A silicon carbide substrate comprising a first main surface and a second main surface opposite the first main surface, When the intensity of transmitted light passing through the second main surface is divided by the intensity of incident light in a state where incident light is irradiated onto the first main surface, the external transmittance is: the external transmittance when the wavelength of the incident light is 800 nm is greater than the external transmittance when the wavelength of the incident light is 1100 nm, a silicon carbide substrate, wherein when the wavelength of the incident light is in the range of 800 nm or more and 1100 nm or less, the absolute value of the amount of change in the external transmittance with respect to the amount of change in the wavelength of the incident light is 0.06% / nm or less.

2. the first major surface includes a first center point; When viewed in a direction from the first main surface toward the second main surface, a square region having a center at the first center point and a side length of 90 mm is defined as a first central region; When the first central area is divided into a plurality of first square measurement areas each having a side length of 3 mm, The silicon carbide substrate according to claim 1 , wherein a maximum value of LTV in said plurality of first square measurement regions is equal to or less than 0.9 μm.

3. When the total number of the plurality of first square measurement regions is a first value, and the number of the plurality of first square measurement regions having an LTV of 0.65 μm or less is a second value, The silicon carbide substrate according to claim 2 , wherein a ratio of said second value to said first value is equal to or greater than 40%.

4. the second major surface includes a second center point; When viewed in a direction from the second main surface toward the first main surface, a square region having a center at the second center point and a side length of 90 mm is defined as a second central region; When the second central area is divided into a plurality of second square measurement areas each having a side length of 3 mm, 4 . The silicon carbide substrate according to claim 2 , wherein a maximum value of LTV in said plurality of second square measurement regions is smaller than a maximum value of LTV in said plurality of first square measurement regions.

5. 4 . The silicon carbide substrate according to claim 1 , wherein when the wavelength of the incident light is in the range of 800 nm to 1100 nm, the external transmittance is 15% to 40%. 5 . The silicon carbide substrate according to claim 1 , wherein the external transmittance is 15% to 40% when the wavelength of the incident light is in the range of 800 nm to 1100 nm.

6. The silicon carbide substrate according to claim 1 , wherein a maximum diameter of the silicon carbide substrate is equal to or greater than 150 mm.

7. A step of preparing a silicon carbide substrate according to any one of claims 1 to 3; and forming a silicon carbide epitaxial layer on the silicon carbide substrate.

8. A step of preparing a silicon carbide substrate according to any one of claims 1 to 3; forming a silicon carbide epitaxial layer on the silicon carbide substrate; and processing the silicon carbide epitaxial layer.