Surface-emitting laser element

Abstract

The present invention comprises: a light-transmitting substrate; a first semiconductor layer that is formed on the substrate and on which a void layer that is a photonic crystal layer is formed; an active layer formed on the first semiconductor layer; a second semiconductor layer formed on the active layer; a current confinement layer that is formed on the second semiconductor layer and that includes a circular or a rotationally symmetrical contact opening; a contact electrode formed by filling the contact opening of the current confinement layer; and a pad electrode which is formed on the contact electrode, and in which a thermal conduction adjustment layer having thermal conductivity less than an effective thermal conductivity of the second semiconductor layer is embedded. The thermal conduction adjustment layer includes a thermal conduction adjustment opening having a center axis that is coaxial with the contact opening, and the thermal conduction adjustment opening has an opening diameter (W2) smaller than an opening diameter (W1) of the contact opening.

Description

Surface-emitting laser element

[0001] The present invention relates to a surface-emitting laser element, and more particularly to a surface-emitting laser element having a photonic crystal.

[0002] In recent years, development of a photonic-crystal surface-emitting laser (PCSEL) using a photonic crystal (PC) has been progressing.

[0003] The resonant wavelength of a photonic crystal laser is determined by the lattice constant of the photonic crystal and the effective refractive index of the waveguide mode. It is known that in continuous wave (CW) oscillation of a photonic crystal laser, a temperature distribution occurs in the current injection region due to heat generation, and this temperature distribution causes an in-plane distribution of the resonant wavelength, adversely affecting the laser characteristics.

[0004] Furthermore, the influence of this heat generation is particularly noticeable in nitride (GaN) semiconductor photonic crystal lasers due to the high driving voltage and electrical resistance of the semiconductor material.

[0005] For example, Patent Document 1 discloses an invention in which the size of holes in a photonic crystal is adjusted in accordance with the temperature distribution.

[0006] Furthermore, Patent Document 1 describes that the size of the holes in the photonic crystal or the lattice constant is adjusted in accordance with the temperature distribution.

[0007] [Patent Document 1] Re-Table 2017 / 038595 Publication

[0008] [Non-patent Document 1] S. Katsuno, T. Inoue, M. Yoshida, MD Zoysa, K. Ishizaki, and S. Noda, "Self-consistent analysis of photonic-crystal surface-emitting lasers under continuous-wave operation," Opt. Express Vol. 29, No. 16, 25118-25132 (2021). [Non-patent Document 2] Koizumi et al., 69th Japan Society of Applied Physics Spring Academic Conference [25p-E303-13], "Continuous operation of blue photonic crystal laser"

[0009] However, adjusting the size and lattice constant of the photonic crystal to match the temperature distribution requires extremely high-precision control on the order of nanometers or less. Such extremely high-precision adjustment is extremely difficult, and it is also difficult to verify during manufacturing. In addition, there are problems with manufacturing reproducibility and low manufacturing yield.

[0010] The present invention has been made with the above points in mind, and aims to provide a photonic crystal surface-emitting laser that can easily flatten the temperature distribution of a photonic crystal during continuous wave (CW) operation, thereby improving light-emitting efficiency and providing excellent oscillation stability.

[0011] a first semiconductor layer formed on the substrate and having a hole layer which is a photonic crystal layer; an active layer formed on the first semiconductor layer; a second semiconductor layer formed on the active layer; a current confinement layer formed on the second semiconductor layer and having a circular or rotationally symmetric contact opening; a contact electrode formed by filling the contact opening of the current confinement layer; and a pad electrode formed on the contact electrode, having a thermal conduction adjustment layer embedded therein and having a thermal conductivity smaller than the effective thermal conductivity of the second semiconductor layer, wherein the thermal conduction adjustment layer has a thermal conduction adjustment opening whose central axis is coaxial with the contact opening, and the thermal conduction adjustment opening has an opening diameter (W2) smaller than the opening diameter (W1) of the contact opening. a first semiconductor layer formed on the substrate and having a hole layer that is a photonic crystal layer; an active layer formed on the first semiconductor layer; a second semiconductor layer formed on the active layer; a contact electrode partially formed on the second semiconductor layer and in ohmic contact with the second semiconductor layer; a thermal conduction adjustment layer formed on the second semiconductor layer, the thermal conduction adjustment layer extending over the outer periphery of the contact electrode and partially covering an upper surface of the outer periphery to expose the second semiconductor layer, the thermal conduction adjustment layer comprising a layer containing at least one of an insulator and a semiconductor having a thermal conductivity smaller than that of the second semiconductor layer; and a metal electrode formed to fill the thermal conduction adjustment opening in the thermal conduction adjustment layer and to cover at least the entire contact electrode in a top view.a first semiconductor layer formed on the substrate and having a hole layer that is a photonic crystal layer formed therein; an active layer formed on the first semiconductor layer; a second semiconductor layer formed on the active layer; a current confinement layer formed on the second semiconductor layer and having a contact opening; a contact electrode formed by filling the contact opening of the current confinement layer; a metal electrode formed on the contact electrode; a bonding metal formed on the metal electrode; a heat dissipation substrate bonded to the bonding metal by the bonding metal; and a thermal conduction adjustment layer provided inside any of the metal electrode, the bonding metal, and the heat dissipation substrate, wherein the thermal conduction adjustment layer includes at least one of an insulator and a semiconductor material having a thermal conductivity lower than that of at least any of the bonding metal and the heat dissipation substrate, and the thermal conduction adjustment layer has a thermal conduction adjustment opening, and the thermal conduction adjustment opening is of a size and arranged to be contained within the contact opening in a top view.

[0012] 1A is a cross-sectional view schematically showing an example of the structure of a PCSEL element according to a first embodiment of the present invention; FIG. 1B is a partially enlarged cross-sectional view schematically showing the air hole layer of FIG. 1A and the air holes arranged in the air hole layer; FIG. 1C is a plan view schematically showing the top surface of a PCSEL element (with the pad electrode removed); FIG. 1D is a cross-sectional view schematically showing a cross section of the air hole layer in a plane parallel to the n-side guide layer; FIG. 1F is a plan view schematically showing the bottom surface of a PCSEL element; FIG. 1G is a diagram schematically showing an example of an air hole arrangement in a plane parallel to the air hole layer; FIG. 1H is a cross-sectional view schematically showing a surface-emitting laser device including a PCSEL element mounted on a submount; FIG. 1I is a diagram showing the results of calculations using the finite element method for the temperature distribution in the air hole layer in a PCSEL element not provided with a temperature adjustment layer; FIG. 1J is a diagram showing the results of calculations for the temperature distribution in the air hole layer of a PCSEL element (EMB1) of the first embodiment; FIG. 1J is a cross-sectional view schematically showing an example of the structure of a PCSEL element (EMB2) of a second embodiment; FIG. 1J is a plan view schematically showing the top surface of the thermal conduction adjustment layer of the PCSEL element shown in FIG. 9B is a diagram showing the calculation results of the temperature distribution in the hole layer of the PCSEL element (EMB2). FIG. 9C is a cross-sectional view schematically showing an example of the structure of the PCSEL element (EMB3) of the third embodiment. FIG. 9D is a plan view schematically showing the upper surface of the thermal conduction adjusting layer of the PCSEL element shown in FIG. 9A. FIG. 9E is a cross-sectional view schematically showing an example of the structure of the PCSEL element (EMB4) of the fourth embodiment. FIG. 9F is a cross-sectional view schematically showing an example of the structure of the PCSEL element (EMB5) of the fifth embodiment. FIG. 9G is a cross-sectional view schematically showing an example of the structure of a PCSEL element that is a modified example of the fifth embodiment. FIG. 9H is a cross-sectional view schematically showing an example of the structure of the PCSEL element (EMB6) of the sixth embodiment. FIG. 9I is a top view schematically showing modified example 1 of the thermal conduction adjusting layer. FIG. 9J is a top view schematically showing modified example 2 of the thermal conduction adjusting layer. FIG. 9J is a top view schematically showing modified example 3 of the thermal conduction adjusting layer. FIG. 9I is a top view schematically showing modified example 4 of the thermal conduction adjusting layer. FIG. 9I is a cross-sectional view schematically showing the structure of the PCSEL element of the seventh embodiment. Fig. 10 is a plan view schematically showing the upper surface of a PCSEL element. Fig. 11 is a graph showing the calculation results of the temperature distribution in the hole layer of the PCSEL element of the seventh embodiment. Fig. 12 is a graph showing the calculation results of the temperature distribution in the hole layer of a comparative PCSEL element in which a thermal conduction adjustment layer is not provided. Fig. 13 is a cross-sectional view schematically showing the structure of a PCSEL element of an eighth embodiment.10 is a plan view schematically showing the top surface of a PCSEL element. FIG. 11 is a graph comparing calculation results of the temperature distribution in the hole layer of the PCSEL elements of the eighth embodiment and the comparative example. FIG. 12 is a cross-sectional view schematically showing the structure of a PCSEL element of modified example 1 of the eighth embodiment. FIG. 13 is a cross-sectional view schematically showing the structure of a PCSEL element of modified example 2. FIG. 14 is a cross-sectional view schematically showing the structure of a PCSEL element of modified example 3. FIG. 15 is a cross-sectional view schematically showing the structure of a PCSEL element of modified example 4. FIG. 16 is a cross-sectional view schematically showing the structure of a PCSEL element of the ninth embodiment. FIG. 17 is a graph comparing calculation results of the temperature distribution in the hole layer of the PCSEL elements of the ninth embodiment and the comparative example. FIG. 18 is a graph comparing calculation results of the resonance center wavelength of the PCSEL elements of the ninth embodiment and the comparative example. FIG. 19 is a cross-sectional view showing another example of the PCSEL element of the ninth embodiment.

[0013] In the following, preferred embodiments of the present invention will be described, but these may be modified and combined as appropriate. In the following description and accompanying drawings, substantially the same or equivalent parts are designated by the same reference numerals.

[0014] [First Embodiment] 1. Structure of Photonic Crystal Surface Emitting Laser (a) Device Structure A photonic crystal surface emitting laser (hereinafter also referred to as PCSEL) is an element that has a resonator layer parallel to semiconductor light emitting structure layers (n-side guide layer, light emitting layer, p-side guide layer) that constitute a light emitting element, and emits coherent light in a direction perpendicular to the resonator layer.

[0015] That is, in a photonic crystal surface-emitting laser (PCSEL), light waves propagating in a plane parallel to the photonic crystal layer (air hole layer) are diffracted by the diffraction effect of the photonic crystal to form a two-dimensional resonance mode, and are also diffracted in a direction perpendicular to the parallel plane. That is, in a photonic crystal surface-emitting laser, the light extraction direction is perpendicular to the resonance direction (in the plane parallel to the air hole layer).

[0016] Fig. 1A is a cross-sectional view schematically illustrating an example of the structure of a photonic crystal surface-emitting laser device (hereinafter referred to as a PCSEL device) 10 according to a first embodiment of the present invention, and Fig. 1B is an enlarged cross-sectional view schematically illustrating an air hole layer 14P and air hole pairs 14K arranged in the air hole layer 14P in Fig. 1A.

[0017] 1A, a semiconductor structure layer 11 is formed on a light-transmitting substrate 12. The semiconductor structure layer 11 is made of a hexagonal nitride semiconductor. In this embodiment, the semiconductor structure layer 11 is made of, for example, a gallium nitride (GaN)-based semiconductor.

[0018] More specifically, a semiconductor structure layer 11 consisting of a plurality of semiconductor layers is formed on a substrate 12, namely, an n-clad layer (first clad layer of a first conductivity type) 13, an n-side guide layer (first guide layer) 14 which is a guide layer provided on the n-side, an active layer (ACT) 15, a p-side guide layer (second guide layer) 16 which is a guide layer provided on the p-side, an electron barrier layer (EBL: Electron Blocking Layer) 17, a p-clad layer (second clad layer of a second conductivity type) 18, and a p-contact layer 19, in this order.

[0019] In the following description, the semiconductor layers provided on the active layer 15, that is, in this embodiment, the p-side guide layer 16, the electron barrier layer 17, the p-cladding layer 18, and the p-contact layer 19 as a whole, will be collectively referred to as a second semiconductor layer (p-semiconductor layer) 11A. Note that, although a case will be described in which the first conductivity type is n-type and the second conductivity type, which is the opposite conductivity type to the first conductivity type, is p-type, the first conductivity type and the second conductivity type may also be p-type and n-type, respectively.

[0020] The substrate 12 is a hexagonal GaN single crystal substrate that has a high transmittance for light emitted from the active layer 15. More specifically, the substrate 12 is a hexagonal GaN single crystal substrate whose main surface (crystal growth surface) is the +c plane, which is the {0001} plane in which Ga atoms are arranged on the outermost surface.

[0021] The rear surface (light emission surface having the light emission region 20L) opposite to the main surface is the -c plane, which is the (000-1) plane with N atoms arranged on the outermost surface. The -c plane is suitable as a light emission surface because it is resistant to oxidation and the like.

[0022] Although the substrate 12 is not limited to this, a so-called just substrate or a substrate whose main surface is offset by about 1° in the m-axis or a-axis direction is preferable. For example, a substrate offset by about 1° in the m-axis direction can achieve mirror-finish growth under a wide range of growth conditions.

[0023] The composition, thickness, and other configurations of each semiconductor layer will be explained below, but these are merely examples and can be modified as appropriate.

[0024] The n-clad layer 13 is, for example, n-Al having an Al composition of 4%. ０．０４ Ga ０．９６ The aluminum (Al) composition ratio is set so that the refractive index is smaller than that of the layer adjacent to the active layer 15 (i.e., the n-side guide layer 14).

[0025] The n-side guide layer 14 is composed of a lower guide layer 14A, an air-hole layer 14P, which is a photonic crystal layer, and a buried layer 14B. As shown in FIG. 1B, the air-hole layer 14P has a layer thickness (depth) d ＰＣ The buried layer 14B has a thickness d ＥＭＢ It has.

[0026] The lower guide layer 14A is made of n-GaN and has a thickness of 300 nm, for example. The air-hole layer 14P is made of n-GaN and has a thickness (or the depth of the air holes 14K) of 90 nm, for example.

[0027] The buried layer 14B is made of n-GaN, n-InGaN, undoped GaN, or undoped InGaN. Alternatively, the buried layer 14B may be a layer in which these semiconductor layers are stacked. The buried layer 14B has a thickness of, for example, 120 nm.

[0028] The active layer 15, which is a light-emitting layer, is a multiple quantum well (MQW) layer having, for example, two quantum well layers. The barrier layer and quantum well layer of the MQW are made of GaN (layer thickness: 3.0 nm) and InGaN (layer thickness: 3.0 nm), respectively. The oscillation wavelength of the active layer 15 is, for example, 432 nm.

[0029] The active layer 15 is preferably located within 180 nm of the air hole layer 14P, in which case a high resonance effect can be obtained by the air hole layer 14P.

[0030] The p-side guide layer 16 is made of, for example, undoped GaN or undoped InGaN and has a thickness of 250 nm. The p-side guide layer 16 is an undoped layer in consideration of light absorption by dopants, but may be doped with magnesium (Mg) or the like to obtain good electrical conductivity.

[0031] The electron barrier layer (EBL) 17 is a p-type Al doped with magnesium (Mg). ０．２ Ga ０．８ The N layer has a thickness of, for example, 15 nm.

[0032] The p-cladding layer 18 is made of Mg-doped p-Al ０．０６ Ga ０．９４ The Al composition of the p-cladding layer 18 is preferably selected so that the refractive index is smaller than that of the p-side guide layer 16.

[0033] The p-contact layer 19 is an Mg-doped p-GaN layer, and has a thickness of, for example, 25 nm. The carrier density of the p-contact layer 19 is set to a concentration that allows for ohmic contact with the p-electrode 23 provided on the surface of the p-contact layer 19. P-type InGaN may be used instead of p-type GaN. Alternatively, a layer in which a GaN layer and an InGaN layer are stacked may be used.

[0034] In this specification, the terms "n-side" and "p-side" do not necessarily mean n-type and p-type. For example, an n-side guide layer refers to a guide layer provided on the n-side of the active layer, and may be an undoped layer (or i-layer).

[0035] The n-cladding layer 13 may be composed of multiple layers instead of a single layer, and in that case, not all layers need to be n-layers (n-doped layers), and may include an undoped layer (i-layer). The same applies to the guide layer 16 and the p-cladding layer 18.

[0036] Furthermore, it is not necessary to provide all of the semiconductor layers described above, and it is sufficient to have a configuration including a first semiconductor layer of a first conductivity type including a vacancy layer, a second semiconductor layer of a second conductivity type, and an active layer (light-emitting layer) sandwiched between these layers.

[0037] The side and top surfaces of the semiconductor structure layer 11 are made of SiO ２ The insulating film 21 is covered with an insulating film 21 such as a silicon dioxide film. An opening OP (also referred to as a "contact opening") having a diameter W1 is provided in the insulating film 21, which exposes the upper surface of the semiconductor structure layer 11 (i.e., the upper surface of the p-contact layer 19). More specifically, a circular (cylindrical) opening OP is provided, with its central axis CZ, penetrating the insulating film 21. The insulating film 21 also functions as a current confinement layer.

[0038] The insulating film 21 also functions as a protective film, protecting the aluminum (Al)-containing crystal layer that constitutes the PCSEL element 10 from corrosive gases and the like. It also prevents short circuits caused by deposits or solder creeping up during mounting, contributing to improved reliability and yield. The insulating film 21 is made of SiO ２ Not limited to ZrO ２ , HfO ２ , TiO ２ , Al ２ O ３ , SiNx, Si, etc. can be selected.

[0039] On the p-contact layer 19 exposed from the contact opening OP, a p-electrode 23 (also referred to as a "contact electrode") that is in ohmic contact with the p-contact layer 19 is provided.

[0040] More specifically, the p-electrode 23 is formed to fill the circular opening OP, which is the current injection region 23R. That is, when viewed from above, the p-electrode 23 has a circular shape with a central axis CZ that passes through the center of the p-electrode 23 and is perpendicular to the pore layer 14P (z direction).

[0041] The p-electrode 23 is filled so that its upper surface is flat and parallel to the pore layer 14P. As shown in FIG. 1A , it is preferable that the p-electrode 23 fills the opening OP, rides on the insulating film 21, and has a flat upper surface. This allows a more accurately flat light-reflecting layer 24 to be formed, and the reflected diffracted light Lr can be emitted as light substantially parallel to the directly diffracted light Lr. The upper surface of the p-electrode 23 may also be formed so that it is flat with the upper surface of the insulating layer 21. In other words, simply filling the opening OP with the p-electrode 23 allows the upper surfaces of the p-electrode 23 and the insulating layer 21 to be flush with each other.

[0042] The p-electrode 23 is preferably made of a light-transmitting conductor, such as indium tin oxide (ITO), and has a thickness of 135 nm.

[0043] The p-electrode 23 is not limited to ITO, and may be made of a transparent conductor such as zinc tin oxide (ZTO), GZO (ZnO:Ga), or AZO (ZnO:Al).

[0044] The diameter W1 of the region where the p-electrode 23 is formed (i.e., the current injection region 23R) is set to 300 μm. The thickness of the p-electrode 23 can be appropriately selected within the range of 20 nm to 300 nm, and in this example, the layer thickness was set to 135 nm.

[0045] A silver alloy (Ag alloy) layer is provided on the p-electrode 23 as a light-reflecting layer 24. The light-reflecting layer 24 is provided so as to cover at least the entire opening OP when viewed from above. The light-reflecting layer 24 has a flat surface that is parallel to the hole layer 14P.

[0046] The light-reflecting layer 24 is made of a silver alloy (Ag alloy) and has a thickness of, for example, 150 nm. The light-reflecting layer 24 may be made of Al, an Al alloy, a dielectric DBR (Distributed Bragg Reflector), or the like, in addition to an Ag alloy.

[0047] A thermal conduction adjusting layer 31 is formed on the light reflecting layer 24. The thermal conduction adjusting layer 31 is composed of a layer containing at least one type of material having a thermal conductivity lower than the effective thermal conductivity of at least the semiconductor layer provided on the active layer 15, i.e., the semiconductor layer between the active layer 15 and the p-electrode 23 (i.e., the second semiconductor layer 11A).

[0048] When the second semiconductor layer 11A is made of a gallium nitride (GaN)-based semiconductor, the thermal conduction adjusting layer 31 is preferably formed of a material having a thermal conductivity lower than that of GaN. In this embodiment, the thermal conduction adjusting layer 31 is formed of a material having a thermal conductivity lower than that of GaN.

[0049] For example, the thermal conduction adjusting layer 31 may be made of SiO ２ , Al ２ O ３ , Ta ２ O ５ , ZrO ２ , HfO ２ oxides such as SiNx, nitrides such as SiON and AlON, conductive oxide films such as ITO, AZO and GZO, and metals such as Ti, V and Pt can be selected.

[0050] A pad electrode 32 is provided on the light reflecting layer 24, covering the entire heat conduction adjusting layer 31 and burying the heat conduction adjusting layer 31. As described above, the heat conduction adjusting layer 31 is provided in contact with the light reflecting layer 24.

[0051] The pad electrode 32 is made of, for example, a Ni / Pd / Au layer formed by depositing nickel (layer thickness: 10 nm), palladium (layer thickness: 200 nm), and gold (layer thickness: 800 nm) in this order.

[0052] In addition, the pad electrode 32 can also be made of Ni / Au, platinum / gold (Pt / Au), Pt / Pd / Au, titanium / gold (Ti / Au), Ti / Pt / Au, tungsten / palladium / gold (W / Pd / Au), W / Au, W / Pt / Au, etc.

[0053] An n-electrode 25 (cathode) having a circular opening (light emission region 20L in FIG. 2C) is formed on the back surface of the substrate 12. An anti-reflection (AR) coating layer 27 is formed on the inner region of the n-electrode 25.

[0054] The n-electrode 25 is made of Ti / Pt / Au and is in ohmic contact with the substrate 12. In addition to Ti / Pu / Au, the electrode material can also be selected from Ti / Al, Ti / Rh, Ti / Al / Pt / Au, Ti / Au, vanadium / aluminum (V / Al), V / Rh, V / Al / Pt / Au, V / Pt / Au, and the like.

[0055] The light emitted from the active layer 15 is diffracted by the air hole layer (PC layer) 14P. The light diffracted by the air hole layer 14P and directly emitted from the air hole layer 14P (direct diffracted light Ld: first diffracted light) and the light emitted by the air hole layer 14P and reflected by the light reflecting layer 24 (reflected diffracted light Lr: second diffracted light) are emitted to the outside from a light emitting region 20L ( FIG. 2C ) on the rear surface (emission surface) 12R of the substrate 12.

[0056] 2A is a plan view schematically showing the upper surface of the PCSEL device 10. For clarity and ease of understanding, the upper surface is shown with the pad electrode 32 removed.

[0057] 2B is a cross-sectional view of the hole layer 14P taken along a plane parallel to the n-side guide layer 14, and FIG. 2C is a plan view of the bottom surface of the PCSEL device 10. As shown in FIG.

[0058] As shown in FIG. 2A , the thermal conduction adjusting layer 31 has a circular plate shape centered (coaxial) on the central axis of the p-electrode 23, i.e., the central axis CZ of the current injection region 23R. More specifically, the thermal conduction adjusting layer 31 has a circular opening 31W (also referred to as a "thermal conduction adjusting opening") in a top view, and the opening diameter (diameter) W2 of the opening 31W is smaller than the diameter W1 of the p-electrode 23 (current injection region 23R) (W2<W1). That is, the thermal conduction adjusting opening 31W has a similar shape but a smaller diameter than the contact opening OP. It is preferable that the thermal conduction adjusting opening 31W have a similar shape to the contact opening OP in order to adjust the heat generation distribution uniformly in two dimensions. The thermal conduction adjusting layer 31 also has an outer diameter W5.

[0059] 2B , in the hole layer 14P, the holes 14K are periodically arranged in a hole formation region 14R that has a circular cross section. The diameter W3 of the hole formation region 14R is equal to or greater than the diameter W1 of the current injection region 23R (W1≦W3) when viewed from a direction perpendicular to the hole layer 14P (z direction) (top view). The shape of the hole formation region 14R is not limited to a circular shape; it need only be large enough to encompass at least the current injection region 23R when viewed from above.

[0060] As shown in FIG. 2C, the n-electrode 25 (cathode) is formed with a circular opening outside the void formation region 14R so as not to overlap the void formation region 14R when viewed from a direction perpendicular to the void layer 14P.

[0061] The opening of the n-electrode 25 has a diameter W4, which is larger than the diameter W1 of the current injection region 23R (W1<W4).

[0062] In addition, a bonding pad 25C for connecting a power supply wire is provided on the n-electrode 25. (b) Photonic Crystal Layer (Air Hole Layer) As shown in Figures 1A and 1B, the air hole layer 14P has regularly arranged air holes that cause the light emitted from the active layer 15 to resonate in a horizontal plane.

[0063] 3 is a diagram schematically illustrating an example of a hole arrangement in a plane parallel to the hole layer 14P, that is, a plan view schematically illustrating a hole pair 14K (sometimes simply referred to as a hole 14K) consisting of a main hole 14K1 and a sub-hole 14K2 arranged at a square lattice position in the plane of the hole layer 14P, as viewed from above.

[0064] That is, the hole layer 14P has a double lattice structure. For clarity of the drawing, the main holes 14K1 and the sub-holes 14K2 (holes 14K) are shown hatched.

[0065] More specifically, the main air holes 14K1 have their centers of gravity CD1 arranged at square lattice positions with a period (lattice constant) PK in two mutually perpendicular directions (x direction and y direction). Similarly, the sub-air holes 14K2 have their centers of gravity CD2 arranged at square lattice positions with a period PK in the x direction and y direction. The period PK of the air holes 14K can be adjusted to match the desired oscillation wavelength.

[0066] The main holes 14K1 have a long hexagonal shape surrounded by m-planes, which are {10-10} planes, when viewed from above (i.e., when viewed from a direction perpendicular to the hole layer 14P). The sub-holes 14K2 also have a shape surrounded by m-planes.

[0067] The x and y directions are inclined at 45° with respect to the major axis direction (<11-20> direction) and the minor axis direction (<1-100> direction) of the main hole 14K1, respectively. In this specification, the xy coordinates are also referred to as hole coordinates.

[0068] The center of gravity CD2 of the sub-hole 14K2 is spaced apart from the center of gravity CD1 of the main hole 14K1 by Δx in the x-direction and Δy in the y-direction. Here, Δx = Δy = 0.46PK. That is, the center of gravity CD2 of the sub-hole 14K2 is spaced apart from the center of gravity CD1 of the main hole 14K1 in the <1-100> direction.

[0069] Here, the distance Δx between the centers of gravity in the x direction and the distance Δy between the centers of gravity in the y direction can be appropriately adjusted according to laser characteristics such as, for example, the current value required for a device to which the laser element is applied and the slope efficiency of the laser output intensity.

[0070] Here, the case where the pore layer 14P has a double lattice structure will be described as an example, but this is not limiting. The pore layer 14P may have a single lattice structure or a multiple lattice structure. 2. Method for Manufacturing PCSEL Device Next, manufacturing steps S1 to S9 of the method for manufacturing the PCSEL device 10 will be described in order. (S1) Crystal Growth Using a MOVPE (Metalorganic Vapor Phase Epitaxy) device, n-Al, which is the n-cladding layer 13, is grown on the +c-plane GaN substrate 12. ０．０４ Ga ０．９６ An N layer was grown to a thickness of 2 μm, followed by growing an n-GaN layer to a thickness of 500 nm on the n-cladding layer 13.

[0071] (S2) Hole formation: A SiNx film was formed on the grown n-GaN layer to a thickness of approximately 100 nm using plasma CVD. Next, an electron beam lithography resist was applied to the SiNx film by spin coating, and the resist was placed in an electron beam lithography system (EB system) to form a two-dimensional periodic pattern corresponding to the two-dimensional photonic crystal structure described above.

[0072] After developing the patterned resist, the SiNx was selectively dry-etched using an inductively coupled plasma reactive ion etching (ICP-RIE) system, resulting in the formation of square lattice-shaped openings that penetrated the SiNx film.

[0073] After that, the resist is removed, and SiNx is used as a hard mask. ２ , BCl ３ The n-GaN layer was dry-etched using an ICP-RIE apparatus with Ar gas. As a result, holes arranged in a square lattice pattern were formed in the n-GaN layer. The etching depth was approximately 190 nm. The SiNx hard mask was then removed using buffered hydrofluoric acid (BHF).

[0074] (S3) Recrystallization Growth The substrate on which the photonic crystal was formed was placed again in the MOVPE apparatus, and buried growth was performed so as to leave holes, thereby forming voids 14K. Specifically, undoped GaN and undoped InGaN were grown to a thickness of 70 nm and 50 nm, respectively, to form the buried layer 14B. This resulted in the formation of the n-side guide layer 14 including the void layer 14P.

[0075] Due to the burying growth, the main voids 14K1 and the sub-voids 14K2 of the void layer 14P have a hexagonal shape surrounded by m-planes, which are {10-10} planes, when viewed from above. The depth of the main voids 14K1 of the void layer 14P was 90 nm, and the depth of the sub-voids 14K2 was 70 nm.

[0076] Subsequently, an active layer 15 (MQW layer) consisting of two pairs of InGaN / GaN quantum wells was grown on the burying layer 14B (i.e., on the n-side guide layer 14). Subsequently, undoped InGaN and undoped GaN were grown on the active layer 15 to a thickness of 70 nm and 180 nm, respectively, to form a p-side guide layer 16.

[0077] Next, an electron barrier layer 17 made of p-AlGaN was grown to a thickness of 15 nm, and a p-clad layer 18 made of p-AlGaN was grown to a thickness of 300 nm on the electron barrier layer 17. Subsequently, a p-contact layer 19 made of p-GaN / p-InGaN was grown to a thickness of 25 nm.

[0078] (S4) Formation of Electrodes and Light Reflecting Layer First, a dry etching apparatus was used to form isolation grooves in the grown wafer to separate the individual PCSEL elements 10. The isolation grooves were formed deep enough to reach the inside of the substrate 12. Next, a SiO ２ After the film formation, SiO ２ The film was removed with BHF and patterned, thereby forming an insulating film 21 having an opening OP with a diameter of 300 μm corresponding to the current injection region 23R.

[0079] Next, an ITO film (layer thickness: 135 nm) was formed to fill the opening OP, forming a p-electrode 23. The p-electrode 23 was formed so as to fill the opening OP and cover the insulating film 21.

[0080] Thereafter, a film of Ag alloy was formed on the p-electrode 23 to a thickness of 150 nm to form a light reflecting layer 24 .

[0081] (S5) Formation of a Heat Conduction Adjustment Layer Next, a SiO ２ A thermal conduction adjusting layer 31 made of a film and having a circular shape and having a circular opening 31W was formed. The thickness of the thermal conduction adjusting layer 31 was 25 nm, and the opening diameter W2 was 160 nm.

[0082] (S6) Formation of Pad Electrode Ni / Pd / Au films were sequentially formed on the thermal conduction adjusting layer 31 to thicknesses of 10 nm / 200 nm / 800 nm to form a pad electrode 32 in which the thermal conduction adjusting layer 31 is embedded.

[0083] (S7) Formation of Backside Electrode Next, the backside of the substrate 12 was polished and then mirror-finished by chemical mechanical polishing (CMP) to obtain a wafer with a thickness of 170 nm. Subsequently, Ti / Pt / Au (layer thickness: 50 nm / 50 nm / 500 nm) films were formed on the polished surface to form an n-electrode 25 (cathode electrode).

[0084] Furthermore, a SiN film is formed on the rear surface of the substrate in the opening region of the n-electrode 25 (i.e., the light emitting region 20L). ｘ / SiO ２ (layer thickness: 32 nm / 53 nm) was formed to form an anti-reflection coating layer 27, which is an anti-reflection layer. (S9) Slicing Finally, the wafer was scribed using a laser scriber or a diamond scriber, and cleaved into individual pieces using a cleavage device, thereby obtaining PCSEL devices 10.

[0085] 4 is a cross-sectional view showing a surface-emitting laser device 50 including a PCSEL element 10 mounted on a submount 50M. The cross section shown includes the central axis CZ of the p-electrode 23 (current injection region 23R).

[0086] In the surface-emitting laser device 50, the PCSEL element 10 is soldered and mounted on a submount 50M. The submount 50M has a base material 51, and an anode wiring 53 and a cathode wiring 54 provided on the base material 51.

[0087] Specifically, the pad electrode 32 of the PCSEL element 10 is electrically connected to the anode wiring 53 by junction-down bonding (epi-down bonding). The n-electrode 25 (bonding pad 25C) of the PCSEL element 10 is connected to the cathode wiring 54 using a bonding wire BW, which is a gold wire.

[0088] In the example, a submount 50M was used that had diamond as the substrate 51. In addition to diamond, materials with high thermal conductivity such as aluminum nitride (AlN), silicon carbide (SiC), graphite, copper tungsten (CuW), Cu, and Ag diamond are also suitable for the substrate of the submount 50M.

[0089] A heat sink is attached to the back surface of the submount 50M on which the PCSEL element 10 is mounted.

[0090] Light from the PCSEL device 10 is emitted from the rear surface side of the substrate 12 (in the drawing, emitted light LE).

[0091] 4. Characteristic Evaluation of PCSEL Devices (a) Temperature Distribution of the Air Hole Layer First, we consider the effect of the temperature distribution of the air hole layer. Figure 5 shows the results of calculations of the temperature distribution of the air hole layer using the finite element method. More specifically, it is a graph showing the temperature distribution of the air hole layer in a PCSEL device without a thermal conduction adjusting layer 31 as a comparative example (CMP).

[0092] The PCSEL element of the comparative example (CMP) differs from the PCSEL element 10 of the first embodiment in that it does not have a thermal conduction adjusting layer 31, but the other configurations are the same. FIG. 5 shows the temperature distribution in the hole layer of a surface-emitting laser device equipped with the PCSEL element of the comparative example. FIG. 5 shows the calculation results when a power of 24 W is injected. The dashed line in the figure indicates the current injection region (W1 = 300 μm). The comparative example without the thermal conduction adjusting layer 31 exhibits an upwardly convex temperature distribution with a peak at the center of the current injection region.

[0093] The central peak temperature is 68.2° C., and the outer periphery of the current injection region is 51.2° C. Since the refractive index varies according to this temperature distribution, the resonant wavelength also varies according to the shape of the temperature distribution.

[0094] According to the inventors' research, even if a temperature distribution like that in the comparative example occurs, CW oscillation is possible (see Non-Patent Document 2), but the laser efficiency decreases due to the narrowing of the region where coherent resonance is possible (cavity length). The decrease in efficiency is due to an increase in the area that does not contribute to oscillation and light leakage within the plane due to a decrease in the cavity length.

[0095] When a power of 24 W was applied, the effective oscillation region (i.e., the cavity length for coherent operation) was approximately 195 μm for a current injection region of 300 μm. Converting this cavity length (region) into a temperature difference means that the temperature difference for coherent oscillation is approximately 4°C.

[0096] (b) Temperature Distribution of the Air Hole Layer of the First Embodiment Calculation results for the temperature distribution of the air hole layer 14P of the PCSEL element 10 (EMB1) of the first embodiment described above are shown in Figure 6. As with the comparative example, the temperature distribution of the air hole layer 14P of the PCSEL element 10 in the surface-emitting laser device 50 (Figure 4) in which the PCSEL element 10 is mounted is shown. The calculation results are also the same when a power of 24 W is applied.

[0097] As described above, in the PCSEL device 10 (EMB1), the thermal conduction adjusting layer 31 has an opening 31W with an opening diameter W2 smaller than the diameter W1 of the current injection region 23R.

[0098] 6, the temperature distribution in the hole layer 14P of the PCSEL device 10 (EMB1) is flatter than that of the comparative example. Specifically, when the temperature difference required for coherent oscillation is 4°C, the diameter of the effective oscillation region is 256 μm for a current injection region of 300 μm. In other words, the diameter of the effective oscillation region is 31% larger and the area is 72% larger than that of the comparative example.

[0099] This effect is only achieved by making the opening diameter W2 of the opening 31W in the thermal conduction adjusting layer 31 smaller than the diameter W1 of the current injection region 23R (W2<W1). This is because, in the case of a junction-down junction in which the p-semiconductor side is joined to a heat sink to enhance heat dissipation, the distance between the active layer and the heat sink is very short, and most of the heat dissipation is contributed by heat dissipation to the heat sink side.

[0100] Therefore, the light emission efficiency during continuous wave (CW) operation is improved, and a surface emitting laser with excellent oscillation stability, such as single mode stability, can be provided.

[0101] Second Embodiment Fig. 7A is a cross-sectional view schematically illustrating an example of the structure of a PCSEL device 60 (EMB2) according to a second embodiment. The cross section shown includes the central axis CZ of the p-electrode 23 (current injection region 23R). Fig. 7B is a plan view schematically illustrating the top surface of the PCSEL device 60. The top surface is shown with the pad electrode 32 removed. (a) Device Structure The PCSEL device 60 (EMB2) differs from the PCSEL device 10 according to the first embodiment in that it has a two-layer thermal conduction adjusting layer 33, but the other configurations are the same.

[0102] More specifically, as shown in FIG. 7B, the thermal conduction adjusting layer 33 has a two-layer structure in which a first low thermal conduction layer 33A having a circular ring shape and a circular opening 33W1 with an opening diameter W2 is stacked, and a second low thermal conduction layer 33B having a circular ring shape and a circular opening 33W2 with an opening diameter W2B (>W2).

[0103] That is, the two-layer thermal conduction adjustment layer 33 has an opening 33W1 with an opening diameter W2, and the diameter W1 of the current injection region 23R (p-electrode 23) and the opening diameters W2, W2B of the first low thermal conduction layer 33A and the second low thermal conduction layer 33B satisfy W2 < W2B < W1.

[0104] The first low thermal conductive layer 33A and the second low thermal conductive layer 33B are stacked so that their central axes are coaxial, and the first low thermal conductive layer 33A and the second low thermal conductive layer 33B are arranged so that their central axes are coaxial with the central axis CZ of the p-electrode 23 (current injection region 23R).

[0105] The first low thermal conductive layer 33A and the second low thermal conductive layer 33B are made of SiO ２ The first low thermal conductive layer 33A is formed of a film, and the second low thermal conductive layer 33B is formed of a film having a thickness of 20 nm, for example, and a thickness of 100 nm.

[0106] (b) Temperature Distribution of the Air Hole Layer Figure 8 shows the calculation results for the temperature distribution of the air hole layer 14P of the PCSEL element 60 (EMB2). As with the PCSEL element 10 (EMB1) of the first embodiment, the temperature distribution of the air hole layer 14P in the surface-emitting laser device (see Figure 4) in which the PCSEL element 60 is mounted on the submount 50M is shown. The calculation results are also the same when a power of 24 W is applied.

[0107] The calculation was performed assuming W2=160 μm, W2B=260 μm, and W1=300 μm.

[0108] 8, it can be seen that the temperature distribution is even more flattened than that of the PCSEL device 10 (EMB1). Specifically, when the temperature difference that allows coherent oscillation is set to 4°C as the standard, the diameter of the effective oscillation region is 290 μm for a current injection region of 300 μm.

[0109] That is, compared to the comparative example (CMP) in which the diameter of the effective oscillation region was 195 μm, it was found that the diameter of the effective oscillation region was enlarged by 49% and the area by 121%.

[0110] Therefore, compared to the comparative example (CMP) and the PCSEL device 10 (EMB1) of the first embodiment, the light emission efficiency during continuous wave (CW) driving is significantly improved, and a surface-emitting laser with excellent oscillation stability, such as single-mode stability, can be provided.

[0111] Although the thermal conduction adjusting layer 33 has been described as having a two-layer structure, the thermal conduction adjusting layer 33 may also be formed as a stepped thermal conduction adjusting layer having an outer peripheral portion (corresponding to the second low thermal conduction layer 33B) and an annular inner peripheral portion whose layer thickness is smaller than that of the outer peripheral portion.

[0112] 9A is a cross-sectional view showing an example of the structure of a PCSEL device 70 (EMB3) according to a third embodiment, and is a diagram similar to FIGS. 1A and 7A. Also, FIG. 9B is a plan view showing the top surface of the PCSEL device 70. The top surface is shown with the pad electrode 32 removed.

[0113] The PCSEL element 70 of this embodiment differs from the PCSEL element 10 of the first embodiment in that the thermal conduction adjusting layer 35 has an inclined annular inner peripheral portion 35T whose layer thickness tapers toward the center of the thermal conduction adjusting opening 35W. The rest of the configuration is the same as that of the PCSEL element 10 of the first embodiment.

[0114] More specifically, the thermal conduction adjusting layer 33 has an annular shape and a circular opening 35W with an opening diameter W2. The annular inner peripheral portion 35T has an outer diameter W2T. The diameter W1 of the current injection region 23R and the thermal conduction adjusting opening 35W of the thermal conduction adjusting layer 33 satisfy the relationship W2<W1.

[0115] The outer diameter W2T of the inner circumferential portion 35T preferably satisfies W2T<W1, but is not limited to this. That is, it is sufficient that the layer thickness decreases toward the center within the diameter W1 of the current injection region 23R, and W2T≧W1 may be satisfied.

[0116] Fourth Embodiment FIG. 10 is a cross-sectional view schematically showing an example of the structure of a PCSEL device 80 (EMB4) according to a fourth embodiment.

[0117] In the PCSEL element 10 of the first embodiment, the thermal conduction adjusting layer 31 is provided on the light reflecting layer 24, but in the PCSEL element 80 of the present embodiment, the thermal conduction adjusting layer 31 is entirely embedded inside the pad electrode 32 and is formed at a distance from the p-electrode.

[0118] That is, the thermal conduction adjusting layer 31 may be formed at a distance from the p-electrode 23 (contact electrode). The temperature uniformity effect can be adjusted by selecting the distance.

[0119] 11A is a cross-sectional view showing an example of the structure of a PCSEL device 90 (EMB5) according to a fifth embodiment, and FIG. 11B is a cross-sectional view showing an example of the structure of a PCSEL device 95, which is a modified example of the fifth embodiment.

[0120] In the PCSEL device 90 of this embodiment, the thermal conduction adjusting layer 31 is provided below the light reflecting layer 24 and in contact with the light reflecting layer 24. More specifically, the thermal conduction adjusting layer 31 is provided on the p-electrode 23, with an opening in the thermal conduction adjusting layer 31 on the central axis CZ. The opening is filled with a transparent conductor 91, and the upper surfaces of the thermal conduction adjusting layer 31 and the transparent conductor 91 are flat. In this case, it is preferable that the upper surfaces of the thermal conduction adjusting layer 31 and the transparent conductor 91 are continuously flat and coplanar. A light reflecting layer 24 is provided on the thermal conduction adjusting layer 31 and the transparent conductor 91, and a pad electrode 32 is formed on the upper surface of the light reflecting layer 24. In this case, it is preferable to use materials with a small difference in refractive index between the transparent conductor 91 and the thermal conduction adjusting layer 31. For example, ITO can be used for the transparent conductor 91, and SiN can be used for the thermal conduction adjusting layer 31. 11B, the opening can also be filled with a light-reflecting layer 24. In this case, the upper surface of the light-reflecting layer 24 is flat. Specifically, instead of forming a translucent conductor 91 in the opening, the light-reflecting layer 24 can be formed on the upper surface of the opening and the thermal conduction adjusting layer 31, resulting in a structure in which the upper surface of the light-reflecting layer 24 is flat.

[0121] In the PCSEL element 90, the thermal conduction adjusting layer 31 is provided in contact with the p-electrode 23 (contact electrode), so that a higher thermal uniformity effect can be obtained.

[0122] Sixth Embodiment FIG. 12 is a cross-sectional view schematically showing an example of the structure of a PCSEL device 100 (EMB6) according to a sixth embodiment.

[0123] In the PCSEL device 100 of this embodiment, the thermal conduction adjusting layer 31 is made of a layer formed with a dot pattern 31D. The dot pattern 31D is made of the same material as the thermal conduction adjusting layer 31, for example, a layer of SiO2 formed in a dot pattern. The dot pattern 31D may be either a periodic pattern or an aperiodic pattern, but a shape in which the spacing between dots becomes denser the farther it is from the central axis CZ is preferable. By using a structure in which the spacing between dots becomes denser the farther it is from the central axis CZ, a higher thermal uniformity effect can be achieved.

[0124] 13A is a top view schematically illustrating a first modification of the thermal conduction adjusting layer of any of the first to fifth embodiments. The thermal conduction adjusting layer 37 of the first modification has a polygonal opening 37W (thermal conduction adjusting opening).

[0125] In the first modified example, the diameter of the opening 37W is defined as the diameter (or major axis) of a circle (including an ellipse) circumscribing the opening 37W, and has an opening diameter W2. The opening diameter W2 and the diameter W1 of the current injection region 23R (p-electrode 23) (i.e., the opening diameter of the contact opening) satisfy the relationship W2<W1. Preferably, the opening 37W has a regular polygonal shape.

[0126] 13B is a top view schematically illustrating a second modified example of the thermal conduction adjusting layer of the embodiment described above. The thermal conduction adjusting layer 37 of the second modified example has a gear-shaped opening 37W.

[0127] In the second modified example, the diameter of the opening 37W is defined as the diameter of a circle circumscribing the opening 37W, and has an opening diameter W2. The opening diameter W2 and the diameter W1 of the current injection region 23R satisfy W2<W1.

[0128] 13C is a top view schematically illustrating a third modified example of the thermal conduction adjusting layer of the embodiment described above. The thermal conduction adjusting layer 37 of the second modified example has a double ring shape. More specifically, the thermal conduction adjusting layer 37 has a first thermal conduction adjusting layer 37M and a second thermal conduction adjusting layer 37S having a ring shape provided inside the first thermal conduction adjusting layer 37M.

[0129] In the third modified example, the first thermal conduction adjusting layer 37M has a circular opening 37W, and the opening 37W has an opening diameter W2. The opening diameter W2 and the diameter W1 of the current injection region 23R satisfy W2<W1.

[0130] 13D is a top view schematically illustrating a fourth modified example of the thermal conduction adjusting layer of the above-described embodiment. The fourth modified example differs from the thermal conduction adjusting layer of the above-described embodiment in that the thermal conduction adjusting layer 37 has a rectangular outer shape, but the other configurations are the same as those of the thermal conduction adjusting layer of the above-described embodiment.

[0131] In the fourth modified example, the thermal conduction adjusting layer 37 has a circular opening 37W, and the opening 37W has an opening diameter W2. The opening diameter W2 and the diameter W1 of the current injection region 23R satisfy W2<W1.

[0132] The above is a detailed description of the embodiments of the present invention. In the above-described embodiments, the contact openings and the thermal conduction adjustment openings are preferably circular in shape, but are not limited to this. They may also be elliptical, polygonal, gear-shaped, or the like, but are preferably rotationally symmetrical about a central axis. In these cases, the opening diameter is defined by the diameter (or major axis) of a circle (including an ellipse) circumscribing the opening shape.

[0133] Furthermore, it is preferable that the heat conduction adjustment opening has a shape similar to that of the contact opening.

[0134] As described above, according to the present invention, it is possible to easily flatten the temperature distribution of a photonic crystal during continuous wave (CW) operation, thereby providing a photonic crystal surface-emitting laser with improved light emission efficiency and excellent oscillation stability.

[0135] Seventh Embodiment (1) Device Structure Fig. 14A is a cross-sectional view schematically showing the structure of a PCSEL device 210 according to the seventh embodiment. The cross section shown includes the central axis CZ of the p-electrode 213. Fig. 14B is a plan view schematically showing the top surface of the PCSEL device 210. The top surface is shown with the pad electrode 215 and the light-reflecting layer 214 removed.

[0136] Although the hole layer 14P has a single lattice structure in the following description, it may have a multiple lattice structure.

[0137] In the PCSEL device 210 of this embodiment, a light-transmitting p-electrode 213 (p-contact electrode) is formed in ohmic contact with the p-contact layer 19. That is, the region where the p-electrode 213 is in contact with the p-contact layer 19 is the contact region, which is the current injection region 213R.

[0138] The p-electrode 213 has a thin cylindrical shape (central axis CZ), and the thermal conduction adjusting layer 211 is formed so as to ride on the outer periphery of the p-electrode 213 and partially cover the upper surface of the outer periphery.

[0139] More specifically, the p-electrode 213 is formed of translucent indium tin oxide (ITO). The p-electrode 213 is preferably a translucent conductor. In this case, the p-electrode 213 is not limited to ITO, and other translucent conductors such as zinc tin oxide (ZTO), GZO (ZnO:Ga), and AZO (ZnO:Al) can be used.

[0140] The p-electrode 213 had a diameter W1 of 300 μm and a thickness of 135 nm, and the thickness of the p-electrode 213 can be appropriately selected within the range of 20 to 300 nm.

[0141] The thermal conduction adjusting layer 211 is a 25 nm thick SiO ２ 14B , the thermal conduction adjusting layer 211 has a circular shape, i.e., a thin cylindrical shape, whose central axis is coaxial with the p-electrode 213 (central axis CZ) in top view, and has an opening 211R (thermal conduction adjusting opening) whose diameter W2 is smaller than the diameter W1 of the p-electrode 213 (W2<W1). The current injection region 213R is contained within the void-formation region 14R in top view, and specifically, the diameter W1 of the current injection region 213R is smaller than the diameter W3 of the void-formation region 14R (W1<W3).

[0142] The thermal conduction adjusting layer 211 is the same as in the above-described embodiment in that it is composed of a layer containing at least one type of insulator and semiconductor having a thermal conductivity lower than the effective thermal conductivity of at least the semiconductor layer (second semiconductor layer) provided on the active layer 15. Furthermore, as in the above-described embodiment, when the second semiconductor layer 11A is made of a gallium nitride (GaN)-based semiconductor, the thermal conduction adjusting layer 211 is preferably formed including a material having a thermal conductivity lower than that of GaN.

[0143] The thermal conduction adjusting layer 211 is made of SiO ２ , Al ２ O ３ , Ta ２ O ５ , ZrO ２ , HfO ２ oxides such as SiNx, nitrides such as SiON and AlON, and metals such as Ti, V, and Pt can be selected.

[0144] The p-electrode 213 is exposed from the opening 211R of the thermal conduction adjusting layer 211. A metal electrode 215A is provided on the p-electrode 213 exposed from the thermal conduction adjusting layer 211. The metal electrode 215A is formed in an area that covers at least the entire p-electrode 213 when viewed from above.

[0145] The metal electrode 215A is made of a light-reflecting layer 214 and a pad electrode 215. The light-reflecting layer 214 is made of a silver alloy (Ag alloy) and has a layer thickness of, for example, 150 nm. In addition to an Ag alloy, the light-reflecting layer 214 can also be made of Al, an Al alloy, Rh, Ru, a dielectric DBR, or the like.

[0146] A pad electrode 215 is provided on the light reflecting layer 214. The pad electrode 215 is formed by depositing Ni / Pd / Au films with thicknesses of 10 nm / 200 nm / 800 nm, respectively. The pad electrode 215 is preferably provided so as to cover the entire upper surface of the light reflecting layer 214.

[0147] The p-electrode 213 and the thermal conduction adjusting layer 211 can have any shape, such as a circle, a polygon, a gear shape, or a multiple ring shape, when viewed from above (see, for example, FIGS. 13A to 13D), but preferably have a shape that is rotationally symmetric about a central axis CZ perpendicular to the hole layer 14P. Furthermore, a circular shape is more preferable in terms of adjusting the temperature distribution to be two-dimensionally uniform.

[0148] The PCSEL element 210 was soldered onto a diamond submount, which was then mounted on a heat sink. The submount can be made of a material with high thermal conductivity, such as AlN, SiC, graphite, CuW, Cu diamond, or Ag diamond.

[0149] (2) Evaluation of the Device Fig. 15A is a graph showing the calculation results of the temperature distribution in the hole layer of the PCSEL device 210 (EMB7) of this embodiment using the finite element method. Fig. 15B is a graph showing the temperature distribution in the hole layer of a PCSEL device not provided with the thermal conduction adjusting layer 211 as a comparative example (CMP7).

[0150] The horizontal axis indicates the position in the hole layer 14P when the center position of the current injection region 213R (diameter W1) is 400 μm (element size: 800 μm), and the vertical axis indicates the temperature of the hole layer 14P.

[0151] 15A and 15B , the temperature distribution in the hole layer 14P of the PCSEL device 210 (EMB7) is flatter than that of the comparative example (CMP7). Specifically, as discussed in the first embodiment, when the temperature difference ΔT at which coherent oscillation is possible is 4° C., the diameter of the effective oscillation region for the current injection region 213R (W1=300 μm) was 256 μm (ΔT≦4° C.). That is, compared to the diameter of the effective oscillation region of the comparative example (CMP7), which was 195 μm (ΔT≦4° C.), the diameter of the effective oscillation region was found to be 31% larger and the area was found to be 72% larger.

[0152] This effect can only be achieved by making the diameter W2 of the opening 211R (thermal conduction adjustment opening) in the thermal conduction adjustment layer 211 smaller than the diameter W1 of the current injection region 213R (W2 < W1). This is because, in the case of a junction-down bonding in which the p-type semiconductor side is bonded to a submount (or a support substrate) to enhance heat dissipation, the distance between the active layer and the submount is very short, and most of the heat dissipation is contributed to by heat dissipation to the submount. In other words, the temperature of the air hole layer is significantly reduced (see FIG. 15B ). By compensating for the temperature distribution in the outer periphery of the current injection region, where the resonant wavelength significantly changes, the in-plane distribution of the resonant wavelength can be flattened. Such degradation of oscillation characteristics due to temperature distribution is a particular issue for PCSEL devices, in which light resonates in the in-plane direction of the air hole layer and radiates diffracted waves perpendicular to the air hole layer.

[0153] Therefore, by providing the thermal conduction adjusting layer, it is possible to prevent an increase in threshold current during continuous wave (CW) operation, improve light emission efficiency, and provide a surface-emitting laser with excellent oscillation stability, such as single-mode stability.

[0154] Furthermore, in the PCSEL element of this embodiment, the thermal conduction adjusting layer 211 is formed so as to ride on the outer periphery of the p-electrode 213 (p-contact electrode) and partially cover the upper surface of this outer periphery, thereby reducing the current (electric field) concentrating at the end of the p-electrode 213 and the end of the active layer 15. Current concentration at the end can cause breakdown and degradation of the element, but the PCSEL element of this embodiment can improve the reliability and lifespan of the element.

[0155] Eighth Embodiment (1) Device Structure Fig. 16A is a cross-sectional view schematically showing the structure of a PCSEL device 220 according to the eighth embodiment. Fig. 16B is a plan view schematically showing the upper surface of the PCSEL device 220. The view is also schematically shown as seen from the upper surface of the thermal conduction adjusting layer 221.

[0156] In the PCSEL element 220, an insulating film 21 formed on the upper surface of the semiconductor structure layer 11 has an opening (contact opening) OP with a diameter of W1 that exposes the upper surface of the p-contact layer 19. A p-electrode 23 is provided to make ohmic contact with the p-contact layer 19 exposed through the contact opening OP and to fill the contact opening OP.

[0157] The p-electrode 23 is formed of a transparent conductor, such as indium tin oxide (ITO). The diameter of the contact opening OP, i.e., the diameter W1 of the current injection region 23R, is 500 μm, and the thickness of the p-electrode 23 is 135 nm.

[0158] A silver alloy (Ag alloy) layer is provided on the p-electrode 23 as a light-reflecting layer 24. The light-reflecting layer 24 is provided so as to cover at least the entire contact opening OP when viewed from above. The light-reflecting layer 24 has a flat surface that is parallel to the pore layer 14P. The light-reflecting layer 24 has a thickness of, for example, 150 nm.

[0159] A pad electrode 32 is provided on the light reflecting layer 24. The pad electrode 32 is bonded to a heat dissipation substrate 225 (submount) made of diamond by bonding metal 224 via a wiring electrode 224P on the heat dissipation substrate 225.

[0160] A thermal conduction adjusting layer 221 is provided on the bonding surface (lower surface) of the heat dissipation substrate 225. The thermal conduction adjusting layer 221 includes a first layer 221A having an opening coaxial with the central axis CZ of the p-electrode 23 and having a diameter W2 (W2<W1), and a second layer 221B provided on the lower surface of the first layer 221A and having an opening coaxial with the central axis CZ and having a diameter W4 (W2<W4<W1). That is, the first layer 221A and the second layer 221B are formed as layers having circular openings in a cross section parallel to the vacancy layer 14P (i.e., the semiconductor structure layer 11). That is, the diameter W2 of the first layer 221A, which is the diameter of the opening in the thermal conduction adjusting layer 221, is smaller than the diameter W1 (contact opening diameter) of the current injection region 23R (W2<W1).

[0161] The first layer 221A and the second layer 221B (hereinafter, sometimes collectively referred to as the thermal conduction adjusting layer 221) are made of SiO ２The thickness of the first layer 221A is 20 nm, and the thickness of the second layer 221B is 120 nm. The diameter W2 of the opening of the first layer 221A is, for example, 240 μm, and the diameter W4 of the opening of the second layer 221B is, for example, 400 μm.

[0162] The thermal conduction adjusting layer 221 can be a layer containing at least one of an insulating material and a semiconductor material having a thermal conductivity lower than that of the heat dissipation substrate 225 or the bonding metal 224. For example, an oxide (SiO ２ , Al ２ O ３ , Ta ２ O ５ , ZrO ２ , HfO ２ The thermal conduction adjusting layer 221 can be made of SiO. ２ Oxide insulators such as the above are preferred in that they have low thermal conductivity and high electrical resistance.

[0163] The thermal conduction adjusting layer 221 is adhered to the heat dissipation substrate 225 by an adhesion layer 222A provided between the first layer 221A of the thermal conduction adjusting layer 221, and is adhered to the bonding metal 224 by an adhesion layer 222B provided between the second layer 221B.

[0164] The adhesion layer 222A and the adhesion layer 222B (hereinafter sometimes collectively referred to as adhesion layer 222) may be, for example, a Ti / Pu / Au layer, but are not limited to this.

[0165] The bonding metal 224 covers the entire thermal conduction adjusting layer 221 to bury the thermal conduction adjusting layer 221 and bonds the heat dissipation substrate 225 thereto.

[0166] The heat dissipation substrate 225 is not limited to diamond, and AlN, SiC, graphite, CuW, Cu diamond, Ag diamond, etc. may also be used.

[0167] 17 is a graph showing the results of calculating the temperature distribution in the hole layer for the PCSEL element 220 (EMB8) of this embodiment and the PCSEL element (CMP8) of the comparative example, comparing them. The comparative example (CMP8) differs from the PCSEL element 220 (EMB8) of this embodiment only in that it does not have the thermal conduction adjusting layer 221 or the adhesion layer 222.

[0168] 17, the temperature distribution in the hole layer 14P of the PCSEL device 220 (EMB8) is flatter than that of the comparative example (CMP8). Specifically, the diameter of the region capable of effective oscillation is 467 μm (based on the aforementioned ΔT≦4° C.), which indicates that the oscillation area is larger and the efficiency is improved compared to the diameter of the region capable of oscillation of 318 μm in the comparative example (CMP8A).

[0169] This effect is only achieved by making the diameter W2 of the opening 221R (thermal conduction adjusting opening) in the thermal conduction adjusting layer 221 smaller than the diameter W1 of the current injection region 23R (contact region) (W2<W1). In other words, the PCSEL element of this embodiment can solve the problem specific to PCSEL elements, namely, the deterioration of oscillation characteristics due to the temperature distribution in the air hole layer (photonic crystal layer).

[0170] Therefore, by providing the thermal conduction adjusting layer, it is possible to prevent an increase in threshold current during continuous wave (CW) operation, improve light emission efficiency, and provide a surface-emitting laser with excellent oscillation stability, such as single-mode stability.

[0171] Furthermore, in the PCSEL element 220 of this embodiment, the thermal conduction adjusting layer 221 is provided away from the p-electrode 23 (contact electrode) on the heat dissipation substrate 225. That is, compared to when the thermal conduction adjusting layer is provided near the p-electrode 23, the current injected from the wiring electrode 224P on the heat dissipation substrate 225 connected to the bonding metal 224 is not obstructed by the thermal conduction adjusting layer 221, allowing for uniform current injection.

[0172] Since non-uniformity of current injection within the surface leads to deterioration of device characteristics and reliability, the PCSEL element of this embodiment makes it possible to improve these characteristics.

[0173] In this embodiment, the thermal conduction adjusting layer 221 is described as being made up of two layers with different opening diameters, but it may be made up of a single layer with an opening of diameter W2. Alternatively, it may be formed as a tapered layer whose thickness decreases toward the center of the opening.

[0174] 18 is a cross-sectional view schematically illustrating the structure of a PCSEL device 230 according to a first modification of the eighth embodiment, the cross section including the central axis CZ of the p-electrode 23.

[0175] In the PCSEL device 230 of the first modified example, the thermal conduction adjusting layer 226 is formed as a cavity (air layer) provided in the heat dissipation substrate 225. The heat dissipation substrate 225 is made of, for example, AlN (aluminum nitride).

[0176] More specifically, the thermal conduction adjusting layer 226 has a recess recessed from the lower surface of the heat dissipation substrate 225 (i.e., the bonding surface with the bonding metal 224). The inner wall surface of the thermal conduction adjusting layer 226 has a cylindrical shape. That is, the heat dissipation substrate 225 has a cylindrical protrusion 225C that is coaxial with the central axis CZ of the p-electrode 23 and has a diameter W2 (W2<W1).

[0177] By joining the underside of the heat dissipation substrate 225 on which the recess is formed to the pad electrode 32, a thermal conduction adjustment layer 226 of a cavity (air layer) formed in the heat dissipation substrate 225 is formed between the heat dissipation substrate 225 and the pad electrode 32.

[0178] Such a hollow thermal conduction adjusting layer 226 can be formed, for example, as follows: First, the AlN substrate is dry-etched using an ICP-RIE apparatus to form cylindrical protrusions 225C and recesses around the protrusions 225C that are recessed from the peripheral surface of the heat dissipation substrate 225. The recesses are formed, for example, in a circular ring shape when viewed from above.

[0179] Subsequently, in order to suppress the melting and spreading of the metal when bonding to the pad electrode 32 , a bonding metal film 224 made of Ti / Pt / Au is patterned and formed only in the bonding region of the heat dissipation substrate 225 .

[0180] Next, the pad electrode 32 is bonded to the bonding area of ​​the heat dissipation substrate 225. Note that since solder such as AuSn melts and spreads and is unlikely to form voids, it is preferable to use a bonding material that is unlikely to melt and spread, such as an Au-Au bonding material.

[0181] 19 is a cross-sectional view schematically illustrating the structure of a PCSEL device 240 according to a second modification of the eighth embodiment. In the PCSEL device 240 according to the second modification, the thermal conduction adjusting layer 221 is entirely embedded within the bonding metal 224. The thermal conduction adjusting layer 221 has an opening coaxial with the central axis CZ of the p-electrode 23 and having a diameter W2, which is smaller than the opening diameter W1 of the contact opening OP (W2<W1), as in the PCSEL devices of the above-described embodiments.

[0182] 20 is a cross-sectional view schematically illustrating the structure of a PCSEL device 250 according to a third modification of the eighth embodiment. In the PCSEL device 250 of the third modification, the thermal conduction adjusting layer 221 is provided on the upper surface of the pad electrode 32 in contact with the bonding metal 224. Similar to the PCSEL device 240 of the second modification, the thermal conduction adjusting layer 221 has an opening coaxial with the central axis CZ of the p-electrode 23 and having a diameter W2 (W2<W1).

[0183] 21 is a cross-sectional view schematically illustrating the structure of a PCSEL device 260 according to a fourth modification of the eighth embodiment. In the PCSEL device 260 according to the fourth modification, the thermal conduction adjusting layer 221 is in contact with the pad electrode 32 and is embedded in the bonding metal 224. Similar to the PCSEL devices of the above-described embodiments, the thermal conduction adjusting layer 221 has an opening coaxial with the central axis CZ of the p-electrode 23 and having a diameter W2 (W2<W1).

[0184] Therefore, according to the PCSEL element of this embodiment, by providing a thermal conduction adjusting layer, it is possible to prevent an increase in threshold current during continuous wave (CW) operation, thereby improving light emission efficiency, and it is also possible to provide a surface-emitting laser with excellent oscillation stability, such as single-mode stability.

[0185] 22 is a cross-sectional view schematically illustrating the structure of a PCSEL device 280 according to a ninth embodiment. The PCSEL device 280 according to this embodiment has the same thermal conduction adjusting layer 31 as the PCSEL device 10 according to the first embodiment.

[0186] The PCSEL device 280 further includes a refractive index adjustment layer 288 embedded in the second semiconductor layer. More specifically, the PCSEL device 280 includes the refractive index adjustment layer 288 embedded in the p-cladding layer 18 and the p-contact layer 19.

[0187] In the PCSEL element 280, the refractive index adjustment layer 288 is, for example, Al ｘ In ｙ Ga １－ｘ－ｙ It is made of N layers (0≦x≦1, 0≦y≦1, 0≦x+y≦1) (semiconductor heterostructure) and is formed as a layer extending from a position shallower than the lower surface of the p-cladding layer 18 to the upper surface of the p-contact layer 19.

[0188] A p-electrode 283 (p-contact electrode) is formed on the p-contact layer 19 and the refractive index adjustment layer 288. A light-reflecting layer 24 is formed on the p-electrode 283 made of a light-transmitting conductor, and a pad electrode 32 with a thermal conduction adjustment layer 31 embedded therein is provided on the light-reflecting layer 24, which is the same as the PCSEL element 10 of the first embodiment.

[0189] More specifically, the refractive index adjustment layer 288 has a cylindrical opening coaxial with the central axis CZ of the opening in the thermal conduction adjustment layer 31, and the diameter WR of the cylindrical opening is 500 μm. That is, the refractive index adjustment layer 288 is formed so that the cylindrical opening of the refractive index adjustment layer 288 is filled with a portion of the p-cladding layer 18 and the p-contact layer 19. Here, the refractive index adjustment layer 288 has a refractive index higher than the effective refractive index of the p-cladding layer 18 and the p-contact layer 19 contained in the cylindrical opening.

[0190] The refractive index adjustment layer 288 also functions as a current confinement layer. That is, the cylindrical region functions as a current injection region. Therefore, the diameter (opening diameter) WR of the cylindrical opening is larger than the opening diameter (diameter) W2 of the thermal conduction adjustment layer 31 (W2<WR).

[0191] The refractive index adjustment layer 288 (AlInGaN) is formed by, for example, etching the p-contact layer 19 and the p-cladding layer 18 by dry etching, and then filling and growing the etched portion by MOVPE. The refractive index adjustment layer 288 can be formed not only by MOVPE, but also by MBE or sputtering. In the PCSEL element 280, the refractive index adjustment layer 288 is formed to a depth of about 320 nm. The refractive index adjustment layer 288 is formed by using ZrO ２ , TiO ２ , Ta ２ O ５ , Nb ２ O5, SiNx, etc. can also be used.

[0192] (2) Evaluation of the Element Figure 23A is a graph comparing the calculation results of the temperature distribution in the hole layer for the PCSEL element 280 (EMB9) of this embodiment and the PCSEL element (CMP9) of the comparative example. The comparative PCSEL element differs from the PCSEL element 280 only in that it does not have the refractive index adjustment layer 288. In addition, here, an applied voltage of 6 V and an injected current of 7 A to the element were assumed.

[0193] As shown in FIG. 23A, there is no significant difference in temperature distribution between the PCSEL element 280 (EMB9) of this embodiment and the PCSEL element (CMP9) of the comparative example (they overlap in the figure), and it can be seen that the temperature distribution in the current injection region (diameter WR) is flat.

[0194] 23B is a graph showing the results of calculating the resonance center wavelength (nm) for the PCSEL device 280 (EMB9) of this embodiment and the PCSEL device (CMP9) of the comparative example. In this calculation, the Bragg reflection wavelength is calculated from the effective refractive index taking temperature into account and the lattice constant of the photonic crystal.

[0195] In the comparative example that does not have a refractive index adjustment layer, the resonant wavelength is shifted between inside and outside the current injection region, but in the PCSEL element 280 of this embodiment, it can be seen that the shift in resonant wavelength is alleviated. Therefore, light diffraction can be obtained from outside the current injection region, reducing light leakage within the plane and loss. In other words, it is possible to improve the efficiency of the PCSEL element.

[0196] 24, the refractive index adjustment layer 288 may be formed as a layer provided between the lower surface of the p-cladding layer 18 and the upper surface of the p-electrode 23. In this case, the refractive index adjustment layer 288 only needs to have a refractive index higher than the effective refractive index of the p-cladding layer 18, p-contact layer 19, and p-electrode 23 as a whole, which are included in the cylindrical region of the refractive index adjustment layer 288.

[0197] The embodiments of the present invention have been described above in detail. In the above-described embodiments, the contact opening (current injection region) and the thermal conduction adjusting opening of the p-electrode (contact electrode) and the thermal conduction adjusting layer are preferably circular in top view, but are not limited to this. They may also have an elliptical shape, a polygonal shape, a substantially circular shape (including a gear shape) with periodic irregularities on the periphery, a multiple ring shape, or the like. Therefore, in this specification, the term "circular shape" includes an elliptical shape, a substantially circular shape with periodic irregularities on the periphery, and a multiple ring shape.

[0198] When the contact opening (current injection region) and the heat conduction adjustment opening have a non-circular shape, they are preferably rotationally symmetric about the central axis. In these cases, the opening diameter is defined by the diameter (or major axis) of a circle (including an ellipse) that circumscribes the opening shape.

[0199] Furthermore, in terms of adjusting the temperature distribution uniformly in two dimensions, it is more preferable that the contact opening (current injection region) and the thermal conduction adjustment opening have a circular shape or a regular n-gon shape (n is an integer of 4 or more) when viewed from above, and it is even more preferable that they have a circular shape.

[0200] Furthermore, it is preferable that the thermal conduction adjustment opening has a similar shape and a coaxial central axis to the contact opening. The point is that the thermal conduction adjustment opening region is arranged with a size that allows it to be contained within the current injection region when viewed from above, and the shapes of the p-electrode (contact electrode) and the thermal conduction adjustment layer are determined so that the temperature at the periphery of the current injection region is uniform with the temperature at the center, resulting in a flat temperature distribution. Furthermore, the various embodiments described above can be applied in appropriate modifications or combinations within the scope of the present invention.

[0201] As described above, according to the present invention, it is possible to easily flatten the temperature distribution of a photonic crystal during continuous wave (CW) operation, thereby providing a photonic crystal surface-emitting laser with improved light emission efficiency and excellent oscillation stability.

[0202] 10, 60, 70, 80, 90, 210, 220, 230, 240, 250, 260, 280: PCSEL element 11: semiconductor structure layer 11A: second semiconductor layer 14: first guide layer 14P: void layer 14K: void 15: active layer 19: contact layer 23, 213: p-electrode (contact electrode) 23R, 213R: current injection region 24, 214: light reflecting layer 31, 33, 35, 211, 221: thermal conduction adjusting layer 32, 215: pad electrode 226: thermal conduction adjusting layer (void) 31W, 35W, 37W, 211R, 221R: thermal conduction adjusting opening 215A: metal electrode 224: bonding metal 225: heat dissipation substrate 288: refractive index adjusting layer OP: Contact opening

Claims

1. A surface-emitting laser element having a photonic crystal, a light-transmitting substrate; a first semiconductor layer formed on the substrate, the first semiconductor layer having a hole layer formed therein, the hole layer being a photonic crystal layer; an active layer formed on the first semiconductor layer; a second semiconductor layer formed on the active layer; a current confinement layer formed on the second semiconductor layer and having a circular or rotationally symmetric contact opening; a contact electrode formed by filling the contact opening of the current confinement layer; a pad electrode formed on the contact electrode, the pad electrode having a thermal conduction adjusting layer embedded therein and having a thermal conductivity smaller than the effective thermal conductivity of the second semiconductor layer; The thermal conduction adjustment layer has a thermal conduction adjustment opening whose central axis is coaxial with the contact opening, and the thermal conduction adjustment opening has an opening diameter (W2) smaller than an opening diameter (W1) of the contact opening.

2. 2. The surface-emitting laser element according to claim 1, wherein the heat conduction adjustment opening has a similar shape and a central axis that is coaxial with that of the contact opening.

3. The heat conduction adjustment opening has a circular shape, 3. The surface-emitting laser element according to claim 2, wherein the thermal conduction adjusting layer has an outer peripheral portion and an inner peripheral portion having a ring shape and a thickness smaller than that of the outer peripheral portion.

4. 2. The surface-emitting laser element according to claim 1, wherein the thermal conduction adjusting layer has a thickness tapered toward the center of the thermal conduction adjusting opening and has an annular inner peripheral portion similar to the contact opening.

5. 2. The surface-emitting laser element according to claim 1, further comprising a light-reflecting layer provided between the pad electrode and the contact electrode.

6. 2. The surface-emitting laser element according to claim 1, wherein the second semiconductor layer is made of a gallium nitride (GaN)-based semiconductor, and the thermal conduction adjustment layer is formed containing a material having a thermal conductivity lower than that of GaN.

7. The surface-emitting laser element according to claim 1 , wherein the thermal conduction adjusting layer is formed in a dot pattern.

8. A surface-emitting laser element having a photonic crystal, a light-transmitting substrate; a first semiconductor layer formed on the substrate, the first semiconductor layer having a hole layer formed therein, the hole layer being a photonic crystal layer; an active layer formed on the first semiconductor layer; a second semiconductor layer formed on the active layer; a transparent contact electrode partially formed on the second semiconductor layer and in ohmic contact with the second semiconductor layer; a thermal conduction adjustment layer formed on the second semiconductor layer, extending over the outer periphery of the contact electrode and partially covering the upper surface of the outer periphery, the thermal conduction adjustment layer having a thermal conduction adjustment opening exposing the contact electrode, the thermal conduction adjustment layer being made of a layer containing at least one of an insulator and a semiconductor having a thermal conductivity smaller than the effective thermal conductivity of the second semiconductor layer; a light-reflective metal electrode formed so as to fill the heat conduction adjustment opening of the heat conduction adjustment layer and to cover at least the entire contact electrode in a top view; A surface-emitting laser element having the same.

9. The surface-emitting laser element according to claim 8 , wherein the openings of the contact electrode and the thermal conduction adjusting layer have either a coaxial circular shape or a rotationally symmetric shape when viewed from above.

10. 9. The surface-emitting laser element according to claim 8, wherein the contact electrode is a light-transmitting conductor, and the metal electrode comprises a light-reflecting layer formed on the contact electrode and a pad electrode formed on the light-reflecting layer.

11. A surface-emitting laser element having a photonic crystal, a light-transmitting substrate; a first semiconductor layer formed on the substrate, the first semiconductor layer having a hole layer formed therein, the hole layer being a photonic crystal layer; an active layer formed on the first semiconductor layer; a second semiconductor layer formed on the active layer; a current confinement layer formed on the second semiconductor layer and having a contact opening; a contact electrode formed by filling the contact opening of the current confinement layer; a metal electrode formed on the contact electrode; a bonding metal formed on the metal electrode; a heat dissipation substrate bonded to the bonding metal by the bonding metal; a thermal conduction adjusting layer provided inside any one of the metal electrode, the bonding metal, and the heat dissipation substrate; Equipped with the thermal conduction adjustment layer includes at least one of an insulating material and a semiconductor material having a thermal conductivity lower than that of at least either the bonding metal or the heat dissipation substrate, The thermal conduction adjustment layer has a thermal conduction adjustment opening, the thermal conduction adjustment opening having a size and arrangement such that it is contained within the contact opening in top view.

12. The surface-emitting laser element according to claim 11 , wherein the contact opening and the opening in the thermal conduction adjusting layer have either a coaxial circular shape or a rotationally symmetric shape when viewed from above.

13. The surface-emitting laser element according to claim 12 , wherein the thermal conduction adjusting layer is provided on the lower surface of the heat dissipation substrate.

14. The surface-emitting laser element according to claim 12, wherein the thermal conduction adjusting layer is a cavity formed in the heat dissipation substrate between the heat dissipation substrate and the bonding metal.

15. The surface-emitting laser element according to claim 12 , wherein the thermal conduction adjusting layer is provided inside the bonding metal.

16. The surface-emitting laser element according to claim 12 , wherein the thermal conduction adjusting layer is provided in the metal electrode at the interface between the metal electrode and the bonding metal.

17. a refractive index adjusting layer embedded in the second semiconductor layer; the refractive index adjustment layer is formed by being embedded in a cylindrical opening region coaxial with a central axis of the contact electrode so that a part of the second semiconductor layer is filled therein; 17. The surface-emitting laser element according to claim 1, wherein the thermal conduction adjustment opening has a smaller opening diameter than the cylindrical opening diameter of the refractive index adjustment layer.

18. the second semiconductor layer has a p-side guide layer formed on the active layer, an electron barrier layer formed on the p-side guide layer, a p-clad layer formed on the electron barrier layer, and a p-contact layer formed on the p-clad layer; 18. The surface-emitting laser element according to claim 17, wherein the refractive index adjustment layer is formed as a layer extending from a position shallower than the lower surface of the p-cladding layer to the upper surface of the p-contact layer.