Semiconductor device and method for manufacturing same

JPWO2024189685A5Active Publication Date: 2025-07-08MITSUBISHI ELECTRIC CORP
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Patent Information

Application Number
JP2025506241
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-03-10
Filing Date
2023-03-10
Publication Date
2025-07-08
Estimated Expiration
2043-03-10

AI Technical Summary

Technical Problem

Copper diffusion into semiconductor substrates deteriorates the characteristics of semiconductor devices, particularly when nickel electroless plated films with phosphorus or boron crystallize due to heat treatment or environmental factors, leading to a decline in barrier properties against copper diffusion.

Method used

A semiconductor device with a dual-layer barrier metal structure, where the first barrier metal is polycrystalline and made of a nickel alloy eutectoid with phosphorus or boron, and the second barrier metal is amorphous, formed using electroless plating with a diffusion prevention layer to prevent nickel or tungsten diffusion, maintaining high barrier properties against copper diffusion.

Benefits of technology

The dual-layer barrier metal structure effectively prevents copper diffusion while reducing interfacial stress and maintaining adhesion, ensuring high barrier properties and preventing crystallization of the second barrier metal, even after heat treatment, thus enhancing the semiconductor device's performance.

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Abstract

A barrier metal (2) made of a metal material obtained by coprecipitating phosphorus or boron is formed on a semiconductor substrate (1). A copper film (3) is formed on the barrier metal (2). The barrier metal (2) includes a first barrier metal (2a) in contact with the semiconductor substrate (1) and a second barrier metal (2b) formed on the first barrier metal (2a). The first barrier metal (2a) and the second barrier metal (2b) are made of the same metal material. The first barrier metal (2a) is polycrystalline. The second barrier metal (2b) has an amorphous structure.
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Description

Semiconductor device and manufacturing method thereof

[0001] The present disclosure relates to a semiconductor device and a manufacturing method thereof.

[0002] Group III-V semiconductor devices such as GaAs are used in communication devices and the like. Copper, which has high electrical conductivity, is used as an electrode material for semiconductor devices. However, copper diffuses into the semiconductor substrate, degrading the characteristics of the semiconductor device. Therefore, a barrier metal is formed between the semiconductor substrate and the copper film. To improve the adhesion between the semiconductor substrate and the barrier metal, heat treatment is performed to diffuse the metal atoms of the barrier metal into the semiconductor substrate, forming a diffusion layer between the barrier metal and the semiconductor substrate. It is known to form the barrier metal by nickel electroless plating (see, for example, Patent Document 1).

[0003] Japanese Patent Application Publication No. 2020-100869

[0004] When phosphorus or boron is codeposited on nickel electroless plating film, an amorphous structure is formed, enhancing the barrier properties against copper diffusion. However, when nickel in the plating film diffuses into the semiconductor substrate due to heat treatment or the operating environment, the concentration of phosphorus or boron in the plating film increases. This causes the plating film to crystallize, creating grain boundaries, which leads to a problem of degraded barrier properties against copper diffusion.

[0005] The present disclosure has been made to solve the above-mentioned problems, and its object is to provide a semiconductor device that can obtain high barrier properties against copper diffusion, and a method for manufacturing the same.

[0006] The semiconductor device according to the present disclosure comprises a semiconductor substrate, a barrier metal formed on the semiconductor substrate and made of a metal material co-deposited with phosphorus or boron, and a copper film formed on the barrier metal, wherein the barrier metal has a first barrier metal in contact with the semiconductor substrate and a second barrier metal formed on the first barrier metal, the first barrier metal and the second barrier metal being made of the same material, the first barrier metal being polycrystalline, and the second barrier metal having an amorphous structure.

[0007] In the present disclosure, since the second barrier metal has an amorphous structure, it is possible to obtain a high barrier property against the diffusion of copper atoms in the copper film.

[0008] Fig. 1 is a cross-sectional view showing a semiconductor device according to a first embodiment; Fig. 2 is a cross-sectional view showing a method for manufacturing a semiconductor device according to the first embodiment; Fig. 3 is a cross-sectional view showing a method for manufacturing a semiconductor device according to a comparative example; Fig. 4 is a cross-sectional view showing a method for manufacturing a semiconductor device according to a comparative example; Fig. 5 is a cross-sectional view showing a semiconductor device according to a second embodiment; Fig. 6 is a cross-sectional view showing a method for manufacturing a semiconductor device according to the second embodiment; Fig. 7 is a cross-sectional view showing a method for manufacturing a semiconductor device according to the second embodiment;

[0009] A semiconductor device and a manufacturing method thereof according to an embodiment will be described with reference to the drawings. The same or corresponding components are designated by the same reference numerals, and repeated description may be omitted.

[0010] 1 is a cross-sectional view showing a semiconductor device according to a first embodiment. A semiconductor substrate 1 is made of a III-V group semiconductor such as GaAs. A barrier metal 2 made of a metallic material co-deposited with phosphorus (P) or boron (B) is formed on the semiconductor substrate 1. A copper film 3 is formed on the barrier metal 2.

[0011] The barrier metal 2 is, for example, a nickel alloy (Ni-P) co-deposited with phosphorus. Here, Ni-P refers to an alloy of nickel and phosphorus, and hereafter, a hyphen will be used to denote the alloy. However, the barrier metal 2 is not limited to this, and may be any alloy in which phosphorus or boron is co-deposited with at least one of nickel (Ni), cobalt (Co), and tungsten (W). That is, the barrier metal 2 may be any of Ni-P, Ni-W-P, Ni-Co-P, Co-P, Co-W-P, Ni-B, Ni-W-B, Ni-Co-B, Co-B, and Co-W-B. These alloys can be formed by electroless plating and have high barrier properties against the diffusion of copper (Cu) from the copper film 3. The crystallinity of the barrier metal 2 can also be controlled by the solution composition or processing conditions.

[0012] The barrier metal 2 includes a first barrier metal 2a in contact with the semiconductor substrate 1 and a second barrier metal 2b formed on the first barrier metal 2a. A diffusion prevention layer 4 is formed between the first barrier metal 2a and the second barrier metal 2b. The diffusion prevention layer 4 includes at least one of gold (Au), silver (Ag), copper (Cu), palladium (Pd), platinum (Pt), titanium (Ti), and aluminum (Al). The diffusion prevention layer 4 made of these materials can prevent the diffusion of nickel, cobalt, or tungsten, which is the metallic material of the second barrier metal 2b, and has high adhesion to nickel alloys, cobalt alloys, and tungsten alloys.

[0013] The internal stress and linear expansion of a metal film are determined by the material. Therefore, the first barrier metal 2a and the second barrier metal 2b are formed from the same material. This reduces the stress that occurs at the interface due to the difference in internal stress or linear expansion between the two, and prevents interfacial peeling caused by stress.

[0014] The metallic material of the first barrier metal 2a diffuses into the semiconductor substrate 1, forming a diffusion layer 5 between the first barrier metal 2a and the semiconductor substrate 1. The diffusion layer 5 has stronger adhesion to the barrier metal 2a and the semiconductor substrate 1 than a sputtered film or a vapor-deposited film. Therefore, by forming the diffusion layer 5, it is possible to improve the adhesion between the semiconductor substrate 1 and the barrier metal 2.

[0015] The first barrier metal 2a is Ni 3 P, Ni 12 P 5 or Ni 7 P 3 The second barrier metal 2b is a polycrystalline material, such as a nickel alloy. The crystal grains of the polycrystalline material are nanoscale. On the other hand, the second barrier metal 2b is not a polycrystalline material but has a uniform amorphous structure. In the amorphous structure, phosphorus or boron enters the interstitial spaces of the nickel crystals, distorting the crystals.

[0016] Next, a method for manufacturing a semiconductor device according to this embodiment will be described. FIG. 2 is a cross-sectional view showing the method for manufacturing a semiconductor device according to the first embodiment. First, hydrophilization and activator treatment are performed as pretreatments. For example, oxygen plasma treatment or ozone treatment is performed to modify the surface of the semiconductor substrate 1 to be hydrophilic. Subsequently, the semiconductor substrate 1 is immersed in an activated solution for electroless plating containing Pd ions, whereby the surface of the semiconductor substrate 1 dissolves due to the effect of galvanic corrosion, resulting in the deposition of Pd. For example, the Pd ion concentration is 10 ppm to 100 ppm, the solution temperature is 0°C to 50°C, and the immersion time is 1 minute to 5 minutes. If the amount of Pd deposition is too small, the subsequent Ni plating film will not form, while if it is too large, the adhesion between the films will be poor. However, because the ease of Pd deposition varies depending on the type of semiconductor, it is necessary to adjust the amount within the above range depending on the type of substrate.

[0017] After the pretreatment is complete, the substrate is immersed in an electroless Ni plating solution containing hypophosphorous acid as its main component. For example, the solution temperature is set to 70°C to 90°C. By circulating, filtering, and shaking the solution, the plating reaction can be stabilized, resulting in the formation of a smooth plating film. The catalytic action of Pd converts Ni ions into Ni and precipitates them, while P, a component of the solution, codeposits to form a Ni-P alloy film. While Pd is used as the catalytic metal here, any metal that is catalytically active in electroless plating deposition, such as Au, Ag, Pt, Ni, Sn, or Ru, can be used to similarly obtain a Ni alloy film. In this manner, an amorphous first barrier metal 2a is formed on the semiconductor substrate 1 by electroless plating. The first barrier metal 2a may also be formed by other methods, such as PVD or vapor deposition. In this case, the pretreatment step of precipitating a catalytically active metal such as Pd is unnecessary.

[0018] The wafer is removed from the electroless Ni plating solution and rinsed with water. The wet wafer is then immersed in an electroless Pd plating solution to form a diffusion barrier layer 4 on the first barrier metal 2a. The thickness of the diffusion barrier layer 4 is, for example, 0.01 μm. If the thickness is greater than 0.1 μm, peeling occurs at the interface with the first barrier metal 2a, so the thickness is designed to be 0.1 μm or less. If the thickness is less than 0.01 microns, deposition is unstable, so the thickness is designed to be 0.01 μm or more. The material for the diffusion barrier layer 4 is not limited to Pd; other materials may be used as long as they prevent interdiffusion. For example, plating of metals that have catalytic activity for electroless plating deposition, such as Au, Ag, Pt, Sn, and Ru, can be used. While electroless plating is a simple and easy-to-use method for forming the diffusion barrier layer 4, sputtering or vapor deposition may also be used.

[0019] Next, the second barrier metal 2b having an amorphous structure is formed by electroless plating on the diffusion prevention layer 4. The method for forming the second barrier metal 2b is the same as the method for forming the first barrier metal 2a.

[0020] Next, the wafer and copper plate are immersed in a copper sulfate plating solution, and a current is applied between the outer periphery of the wafer as the cathode and the copper plate as the anode, forming a copper film 3 on the second barrier metal 2b in proportion to the amount of electricity supplied. For example, the solution temperature is set to 30°C. Note that electroless plating can also be used instead of electroplating. Even in the case of electroless plating, the copper film 3 can be formed by adjusting the additives. Furthermore, to prevent surface oxidation of the copper film 3, Ni plating, Pd plating, and Au plating can be performed sequentially by electroless plating or electroplating as a post-treatment. This improves the adhesion of die bonding or wire bonding.

[0021] The first barrier metal 2a and the second barrier metal 2b are made of the same material, for example, a Ni-P film. When a Ni-P film is formed with a P concentration of 10 at. % to 25 at. %, it has an amorphous structure. Therefore, the first barrier metal 2a and the second barrier metal 2b to be formed have an amorphous structure when the co-deposited amount of phosphorus or boron is set to 10 at. % or more.

[0022] Next, a heat treatment is performed at 150°C to 300°C. As a result, the metallic material of the first barrier metal 2a diffuses into the semiconductor substrate 1, forming a diffusion layer 5 between the first barrier metal 2a and the semiconductor substrate 1. The first barrier metal 2a, whose metallic material has diffused into the semiconductor substrate 1, crystallizes due to an increase in the co-deposition of P or B. On the other hand, the diffusion prevention layer 4 prevents the diffusion of metal atoms in the second barrier metal 2b, so that the second barrier metal 2b maintains an amorphous structure without any change in film composition even after the heat treatment. Therefore, the second barrier metal 2b has a high barrier property against the diffusion of copper atoms in the copper film 3.

[0023] In addition, if the interface between the semiconductor substrate 1 and the barrier metal 2 is in a poor state, application of heat may cause separation. Therefore, heat treatment can also be used as a pre-screening method for defective products before shipping.

[0024] Next, the effects of this embodiment will be described in comparison with a comparative example. FIGS. 3 and 4 are cross-sectional views showing a method for manufacturing a semiconductor device according to the comparative example. As shown in FIG. 3, one layer of barrier metal 6 is formed on a semiconductor substrate 1, and a copper film 3 is formed thereon. The barrier metal 6 has an amorphous structure when formed. Next, heat treatment is performed at 150° C. to 300° C., causing metal atoms of the barrier metal 6 to diffuse into the semiconductor substrate 1, forming a diffusion layer 5, as shown in FIG. 4. The barrier metal 6 into which the metal atoms have diffused is entirely crystallized due to an increase in the codeposition of phosphorus or boron. Therefore, the barrier metal 6 after heat treatment exhibits poor barrier properties against the diffusion of copper atoms from the copper film 3.

[0025] In contrast, in this embodiment, the diffusion prevention layer 4 prevents the diffusion of metal atoms in the second barrier metal 2b, so the second barrier metal 2b does not crystallize even after heat treatment. Therefore, the second barrier metal 2b has an amorphous structure, and therefore a high barrier property against the diffusion of copper atoms in the copper film 3 can be obtained. Furthermore, the nickel diffusion layer 5 is thinner than when the barrier metal is a single layer of nickel alloy, so the stress caused by the diffusion layer 5 is reduced.

[0026] To provide a barrier against the diffusion of copper atoms, the thickness of the barrier metal 2 must be 0.1 μm or more. However, if the thickness of the barrier metal 2 is thicker than 0.5 μm, the device will bend due to stress. Therefore, the thickness of the barrier metal 2 is set to 0.1 μm or more and 0.5 μm or less.

[0027] 5 is a cross-sectional view showing a semiconductor device according to a second embodiment. This embodiment differs from the first embodiment in that there is no diffusion prevention layer 4 and a second barrier metal 2b is formed directly on a first barrier metal 2a. The other configurations are the same as those of the first embodiment.

[0028] Next, a method for manufacturing a semiconductor device according to a second embodiment will be described. Figures 6 to 8 are cross-sectional views showing a method for manufacturing a semiconductor device according to a second embodiment. First, as shown in Figure 6, a first barrier metal 2a is formed on a semiconductor substrate 1 by electroless plating. At this stage, the first barrier metal 2a has an amorphous structure.

[0029] Next, as shown in Figure 7, a heat treatment at 150°C to 300°C is performed to diffuse the metal atoms of the first barrier metal 2a into the semiconductor substrate 1, forming a diffusion layer 5 between the first barrier metal 2a and the semiconductor substrate 1. After the heat treatment, the first barrier metal 2a is polycrystalline. Depth analysis confirmed that the P concentration in the Ni-P film remains uniform even after Ni diffusion. Therefore, the concentrations of the metal material and the eutectoid of the first barrier metal 2a remain uniform throughout the film after the heat treatment.

[0030] Next, as shown in FIG. 8 , a second barrier metal 2b is formed directly on the first barrier metal 2a by electroless plating. The first barrier metal 2a and the second barrier metal 2b are formed of the same material. If the first barrier metal 2a is polycrystalline, even if a second barrier metal 2b composed of the same Ni and P is stacked on top of the first barrier metal 2a, the elements of the two layers will not interdiffuse. This is because the polycrystalline Ni—P crystalline structure of the first barrier metal 2a is energetically more stable than an amorphous structure and is less likely to change structurally. The second barrier metal 2b has an amorphous structure. An amorphous Ni—P film with a low phosphorus concentration (10 at.% to 25 at.%) will not crystallize at temperatures below 300°C. Therefore, the amorphous structure of the second barrier metal 2b is maintained if subjected to heat treatment or use in an environment below 300°C.

[0031] Thereafter, a copper film 3 is formed on the second barrier metal 2b by electroless plating, thereby completing the manufacturing of the semiconductor device shown in FIG.

[0032] In this embodiment, after the first barrier metal 2a is formed, heat treatment is performed before the second barrier metal 2b is formed, so the second barrier metal 2b remains in an amorphous structure. This provides a high barrier property against the diffusion of copper atoms in the copper film 3. Furthermore, the step of forming the diffusion prevention layer 4 between the first barrier metal 2a and the second barrier metal 2b is not required.

[0033] Furthermore, the diffusion layer 5 can be made thinner than when the barrier metal is formed as a single layer. Because the diffusion layer 5 is subject to high stress, the stress can be reduced by making the diffusion layer 5 thinner. Furthermore, since the first barrier metal 2a and the second barrier metal 2b are made of the same material, they have high adhesion to each other.

[0034] REFERENCE SIGNS LIST 1 semiconductor substrate, 2 barrier metal, 2a first barrier metal, 2b second barrier metal, 3 copper film, 4 diffusion prevention layer, 5 diffusion layer

Claims

1. A semiconductor substrate, a barrier metal formed on the semiconductor substrate and made of a metal material in which phosphorus or boron is eutectic, and a copper film formed on the barrier metal, wherein the barrier metal has a first barrier metal in contact with the semiconductor substrate and a second barrier metal formed on the first barrier metal, the first barrier metal and the second barrier metal are made of the same material, the first barrier metal is polycrystalline, and the second barrier metal has an amorphous structure. A semiconductor device characterized by this.

2. The semiconductor device according to claim 1, wherein metal atoms of the first barrier metal diffuse into the semiconductor substrate, and a diffusion layer is formed between the first barrier metal and the semiconductor substrate.

3. The semiconductor device according to claim 1 or 2, wherein the film thickness of the barrier metal is 0.1 μm or more and 0.5 μm or less.

4. The semiconductor device according to claim 1 or 2, wherein the metal material has at least one of nickel, cobalt, and tungsten.

5. The semiconductor device according to claim 1 or 2, further comprising a diffusion prevention layer formed between the first barrier metal and the second barrier metal to prevent diffusion of metal atoms of the second barrier metal.

6. The semiconductor device according to claim 5, wherein the diffusion prevention layer has at least one of gold, silver, copper, palladium, platinum, titanium, and aluminum.

7. The semiconductor device according to claim 1 or 2, wherein the second barrier metal is directly formed on the first barrier metal.

8. A step of forming a first barrier metal made of a metal material in which phosphorus or boron is eutectic on a semiconductor substrate; a step of diffusing metal atoms of the first barrier metal into the semiconductor substrate by heat treatment to form a diffusion layer between the first barrier metal and the semiconductor substrate; a step of directly forming a second barrier metal on the first barrier metal after the heat treatment; and a step of forming a copper film on the second barrier metal, wherein the first barrier metal and the second barrier metal are made of the same metal material, the first barrier metal after the heat treatment is polycrystalline, and the second barrier metal has an amorphous structure. A method for manufacturing a semiconductor device characterized by this.