Light-emitting element, its manufacturing method and semiconductor substrate

Abstract

This light-emitting element is provided with: a first nitride semiconductor unit having a first surface perpendicular to a first crystal orientation; and a second nitride semiconductor unit having a second surface perpendicular to a second crystal orientation different from the first crystal orientation and a light-emitting layer positioned above the second surface, the second nitride semiconductor unit being positioned above the first surface.

Description

Light-emitting element, its manufacturing method and manufacturing apparatus, laser element, semiconductor substrate, and electronic device

[0001] The present disclosure relates to a light-emitting device and the like.

[0002] Light-emitting elements are being put to practical use in a variety of fields, and depending on the application of the light-emitting element, light having polarization characteristics is required.

[0003] Due to constraints such as the material constituting the light-emitting element or the element structure, the light emitted from the light-emitting portion (active layer) of the light-emitting element may not have stable polarization characteristics. For example, when a polarizing filter or the like is provided outside the light-emitting element, the light utilization efficiency is reduced. Methods for emitting light with polarization characteristics from light-emitting elements have been studied (see, for example, Non-Patent Document 1).

[0004] Rami T. et. al., "Study and Application of Birefringent Nanoporous GaN in the Polarization Control of Blue Vertical-Cavity Surface-Emitting Lasers", American Chemical Society (ACS) Photonics April 2021, 8, 1041-1047

[0005] A light-emitting element in one aspect of the present disclosure comprises a first nitride semiconductor part having a first surface perpendicular to a first crystal orientation, a second nitride semiconductor part having a second surface perpendicular to a second crystal orientation different from the first crystal orientation and an emission layer located above the second surface, and located above the first surface.

[0006] A method for manufacturing a light-emitting element in one aspect of the present disclosure includes the steps of forming a first nitride semiconductor part having a first surface perpendicular to a first crystal orientation, forming a second nitride semiconductor part having a second surface perpendicular to a second crystal orientation different from the first crystal orientation and a light-emitting layer located above the second surface, and bonding the first surface and the second surface.

[0007] 1 is a schematic diagram for explaining the polarization characteristics of light emitted from a light emitting portion including a nitride semiconductor. FIG. 1 is a schematic diagram for explaining a specific example of birefringence characteristics in a multilayer film reflector. FIG. 1 is a schematic diagram showing an example of a light emitting device for explaining the findings of the present disclosure. FIG. 2 is a schematic diagram showing another example of a light emitting device for explaining the findings of the present disclosure. FIG. 3 is a cross-sectional view schematically showing a configuration of a light emitting device in an embodiment of the present disclosure. FIG. 4 is a flowchart showing an example of a manufacturing apparatus for a light emitting device in an embodiment of the present disclosure. FIG. 5 is a cross-sectional view, taken along the X direction, of a light emitting substrate including a plurality of light emitting elements in Example 1. FIG. 6 is a cross-sectional view, taken along the Y direction, of a light emitting substrate including a plurality of light emitting elements in Example 1. FIG. 7 is a plan view of a light emitting substrate including a plurality of light emitting elements in Example 1. FIG. 8 is a partially enlarged cross-sectional view of the light emitting element in Example 1. FIG. 9 is a flowchart showing an example of a manufacturing method of the light emitting element in Example 1. FIG. 10 is a process cross-sectional view showing an example of a first partial process of a manufacturing method of the light emitting element in Example 1. FIG. 11 is a process plan view showing an example of a first partial process of a manufacturing method of the light emitting element in Example 1. FIG. 12 is a cross-sectional view showing an example of a configuration example of a template substrate. FIG. 13 is a cross-sectional view showing a method of forming a semiconductor portion in Example 1. FIG. 14 is a process cross-sectional view showing an example of a second partial process of a manufacturing method of the light emitting element in Example 1. FIG. 1 is a process cross-sectional view showing an example of a third partial process in the method for manufacturing the light-emitting element in Example 1. FIG. 2 is a plan view showing an individualized light-emitting substrate in Example 1. FIG. 3 is a process cross-sectional view showing an example of a first partial process in the method for manufacturing the light-emitting element in another configuration example of Example 1. FIG. 4 is a process cross-sectional view showing an example of a third partial process in the method for manufacturing the light-emitting element in another configuration example of Example 1. FIG. 5 is a partially enlarged cross-sectional view of another configuration example of the light-emitting element in Example 1. FIG. 6 is a process cross-sectional view showing an example of a method for manufacturing the light-emitting element in another configuration example of Example 1. FIG. 7 is a schematic view for explaining the light-emitting element in another configuration example of Example 1. FIG. 8 is a plan view schematically showing the configuration of a laser element including the light-emitting element in Example 2. FIG. 9 is a cross-sectional view schematically showing the configuration of a laser element including the light-emitting element in Example 2. FIG. 10 is a schematic view showing the configuration of an electronic device in Example 3.

[0008] [Definition of Terms, etc.] Hereinafter, the term "polarized light" refers to light with a bias in the distribution of vibration directions. Light with a bias in the distribution of vibration directions may also be referred to as polarized light. The polarization direction is the direction perpendicular to the direction of light propagation in which the magnitude of the electric field vector is greatest. In the drawings below, the polarization direction may be indicated by a dashed bidirectional arrow. The polarization ratio can be defined as the ratio of (Is-Ic) to (Is+Ic), where Is is the maximum value of the electric field vector in the polarization direction and Ic is the maximum value of the electric field vector in the direction perpendicular to the direction of light propagation and polarization. The greater the polarization ratio, the greater the proportion of linearly polarized light (the smaller the proportion of unpolarized light), and the stronger the linear polarization characteristics.

[0009] In this specification, a substance having birefringence means that the substance has a property in which the refractive index varies depending on the polarization direction of incident light. A substance having birefringence has a property in which the reflectance varies depending on the polarization direction of incident light, in relation to the difference in refractive index.

[0010] In this specification, Miller indices relating to crystal structure are written with a minus sign instead of a bar above the index. In this specification, forming a film or layer by growing a substance along the c-axis is sometimes referred to as c-plane growth (c-plane film formation), and this also applies to other axial directions. Furthermore, in this specification, when describing a component primarily consisting of a single crystal of a substance, the crystal orientation in the crystal structure of the substance forming the component may be simply described as "the a-axis direction of a component" for simplicity.

[0011] [Summary of the Findings of the Present Disclosure] In the following description, in order to facilitate understanding of the light-emitting device of the present disclosure, an overview of the findings of the present disclosure will first be described. Specifically, first, the polarization characteristics of light emitted from a light-emitting portion including a nitride semiconductor will be described, and then the birefringence characteristics of a multilayer film reflector included in a surface-emitting optical element will be described. Then, an optical element according to one aspect of the present disclosure will be generally described.

[0012] (Polarization Characteristics of Light Emitted from Nitride Semiconductor) Fig. 1 is a schematic diagram for explaining the polarization characteristics of light emitted from a light emitting portion including a nitride semiconductor. In the example shown in Fig. 1, the nitride semiconductor is gallium nitride (GaN) having a hexagonal crystal structure. GaN typically has a wurtzite crystal structure.

[0013] The diagram indicated by the reference numeral 1001 in FIG. 1 is a schematic diagram showing a hexagonal HC. １ ~a ３ The hexagonal HC crystal structure has a crystal plane Pa (a-plane), a crystal plane Pc (c-plane), and a crystal plane Pm (m-plane), which are respectively aligned along the a-axis (e.g., a ３ The crystal plane Pm is perpendicular to the a-axis, c-axis, and m-axis. The crystal plane Pm corresponds to the prism plane of the hexagonal column shape of the hexagonal crystal HC. There are various directions for the m-axis. ３ The m-axis, which is perpendicular to the c-axis, is shown. In reality, there are various planes equivalent to the crystal plane Pa, the crystal plane Pc, and the crystal plane Pm. In the diagram denoted by reference numeral 1001 in FIG. 1, a certain crystal plane Pa, a crystal plane Pc, and a crystal plane Pm are shown with different hatchings.

[0014] The diagram indicated by reference numeral 1002 in FIG. 1 is a schematic diagram showing the light-emitting section 100 of the light-emitting element, and the a-axis, m-axis, and c-axis are shown in the diagram. The light-emitting section 100 may typically be an active layer, and the diagram indicated by reference numeral 1002 in FIG. 1 is a schematic diagram omitting structures other than the light-emitting section 100 of the light-emitting element. In the light-emitting section 100, the top surface 10c perpendicular to the c-axis corresponds to the crystal plane Pc, the side surface 10a perpendicular to the a-axis corresponds to the crystal plane Pa, and the side surface 10m perpendicular to the m-axis corresponds to the crystal plane Pm. In the diagram indicated by reference numeral 1002 in FIG. 1, the top surface 10c, the side surface 10a, and the side surface 10m are each shown with different hatching.

[0015] In general, light emitted from a semiconductor crystal by radiative recombination may have polarization characteristics that correspond to the orientation of the crystal. For example, if the light emitting unit 100 is made of a GaN crystal, the following can be said.

[0016] The light emitted from the light-emitting unit 100 has polarization characteristics parallel or perpendicular to the c-axis. The light emitted from the side surface 10m includes polarized light LM11 having a polarization direction PD1 perpendicular to the c-axis (parallel to the a-axis) and polarized light LM12 having a polarization direction PD2 parallel to the c-axis (perpendicular to the a-axis). The light emitted from the side surface 10a includes polarized light LA13 having a polarization direction PD3 perpendicular to the c-axis (parallel to the m-axis) and polarized light LA14 having a polarization direction PD4 parallel to the c-axis (perpendicular to the m-axis). The light emitted from the top surface 10c includes polarized light LC15 having a polarization direction PD5 perpendicular to the c-axis. Since light is a transverse wave, waves with a vibration direction parallel to the c-axis (so-called longitudinal waves) are not considered in the light emitted from the top surface 10c. Note that "parallel" here does not have to mean parallel in the strict sense; a deviation of about 5° from strict parallelism is allowed, and the term "parallel" will be used interchangeably in the following descriptions in this specification.

[0017] Typically, due to the band structure of GaN crystals, polarization LM11 is more prevalent than polarization LM12, and a high polarization ratio has been reported. Generally, the light-emitting section 100 is often formed by c-plane growth due to its practical advantages in terms of manufacturing costs and light-emitting characteristics of the light-emitting device. For example, in an edge-emitting laser including the light-emitting section 100, the side surface 10m can be suitably used as the light-emitting surface, and in this case, it can also be used in applications where polarization is required.

[0018] On the other hand, the polarization direction PD5 of the polarized light LC15 from the upper surface 10c is not determined to a specific direction due to the rotational symmetry of the GaN crystal structure. Therefore, when using light emitted from the upper surface 10c in a surface-emitting light-emitting device such as a vertical cavity surface-emitting laser (VCSEL), it is difficult to stably emit polarized light having a specific polarization direction. Because the c-plane is a polar plane and GaN crystals formed by c-plane growth are affected by piezoelectric polarization, etc., forming a light-emitting portion by growing a semipolar or nonpolar plane (e.g., m-plane) has been considered, but there are currently many practical obstacles in terms of cost and mass productivity.

[0019] (Birefringence Properties of Multilayer Reflectors) Generally, multilayer reflectors (multilayer mirrors) are used in surface-emitting light-emitting devices such as VCSEL devices. For example, a distributed Bragg reflector (hereinafter referred to as a DBR) formed by alternately growing GaN and aluminum nitride (AlN) layers on the m-plane has been reported to have birefringence properties (see, for example, the following references): [D.M. Schaadt. et al., "Polarization-dependent beam switch based on an M-plane GaN / AlN distributed Bragg reflector", APPLIED PHYSICS LETTERS 90, 231117 (2007)].

[0020] 2 is a schematic diagram for explaining a specific example of birefringence characteristics in a multilayer film reflector. The diagram indicated by reference numeral 2001 in FIG. 2 is a schematic diagram showing a hexagonal HC crystal, and is a diagram a shown in FIG. 1 indicated by reference numeral 1001. ３ 2 shows a state where the axis direction is the rotation axis and the axis is rotated by 90°. In FIG. 2, the coordinate axes of the a-axis, m-axis, and c-axis corresponding to those in FIG. 1 are shown for reference.

[0021] The diagram denoted by the reference numeral 2002 in Fig. 2 is a schematic diagram for explaining the birefringence characteristics of a multilayer reflector RM when the m-plane is used as the reflecting surface. The reflected light emitted from the outermost crystal plane Pm of the multilayer reflector RM actually has an intensity obtained by superposing the reflected light from each of the multiple layers stacked in the thickness direction of the multilayer reflector RM.

[0022] The following can be said about the birefringence characteristics when polarized light LI1 and polarized light LI2 are incident perpendicular to the crystal plane Pm. Here, polarized light LI1 and polarized light LI2 are assumed to be linearly polarized light, with polarized light LI1 having a polarization direction perpendicular to the c-axis (parallel to the a-axis) and polarized light LI2 having a polarization direction parallel to the c-axis (perpendicular to the a-axis). The reflected light corresponding to polarized light LI1 is assumed to be LR1, and the reflected light corresponding to polarized light LI2 is assumed to be LR2. The diagram indicated by reference numeral 2002 in Figure 2 shows an example in which the wavelengths of the incident light (polarized light LI1 and polarized light LI2) are changed so that they increase from left to right on the page.

[0023] 2 is a table showing an example of how the polarization reflectance changes when the wavelengths of the incident polarized light LI1 and LI2 are changed for a certain wavelength band. The ratio of the intensity of the reflected light LR1 to the intensity of the polarized light LI1 is defined as the polarization reflectance PR1, and the ratio of the intensity of the reflected light LR2 to the intensity of the polarized light LI2 is defined as the polarization reflectance PR2.

[0024] In the example shown in Figure 2, when the wavelengths of both polarized light LI1 and polarized light LI2 are relatively short, both polarized reflectance PR1 and polarized reflectance PR2 are relatively low. As the wavelengths of polarized light LI1 and polarized light LI2 become longer, polarized reflectance PR1 becomes higher than polarized reflectance PR2, and the difference between polarized reflectance PR1 and polarized reflectance PR2 (polarized reflectance difference) becomes larger. Then, as the wavelengths of polarized light LI1 and polarized light LI2 become even longer, both polarized reflectance PR1 and polarized reflectance PR2 become higher, and the polarized reflectance difference becomes smaller. In the example shown in Figure 2, it can be said that the multilayer film reflecting mirror RM has birefringence characteristics in which the polarized reflectance in the polarization direction perpendicular to the c-axis (parallel to the a-axis) is relatively high in a specific wavelength band.

[0025] (Regarding Polarization Control) Generally, when nitride semiconductors such as GaN are used in the light-emitting portion, various manufacturing requirements must be met to achieve high light-emitting efficiency. For example, reducing the defect density of GaN-based semiconductors is not easy, and the physical properties of the growth substrate (and, from a practical standpoint, cost) are also highly demanding. Furthermore, surface-emitting light-emitting devices such as VCSEL elements generally have the manufacturing advantage of monolithically forming resonators on the growth substrate, allowing chip inspection on the growth substrate. When "monolithically" manufacturing a VCSEL element, for example, a semiconductor layer (light-emitting layer) is formed on the growth substrate, and then an upper reflector and a lower reflector are formed by a technique including partial etching of the growth substrate, and then an electrode structure is formed, thereby enabling the formation of multiple VCSEL resonator structures on the growth substrate.

[0026] Previously, in the development of technology for controlling the polarization direction of surface-emitting light-emitting elements that use nitride semiconductors such as GaN in their light-emitting portions, there were limitations due to the fixed idea that monolithic manufacturing and pre-separation inspection were required in order to maintain process benefits. Furthermore, there were also limitations on the element structure, which was based on the assumption that high-quality nitride semiconductors formed on the c-plane were used in the light-emitting portion to achieve high light-emitting efficiency. For example, there were limited options for the underlying structure of the light-emitting portion (growth substrate, etc.).

[0027] Therefore, the measures proposed so far for controlling the polarization direction are limited to, for example, interposing a polarization selective layer between two reflecting mirrors (e.g., multilayer reflecting mirrors) positioned apart from each other, or inducing anisotropy in some of the components.

[0028] The present inventors have obtained new knowledge that breaks away from the above-mentioned fixed ideas while studying nitride semiconductor growth techniques and semiconductor device techniques.

[0029] FIG. 3 is a schematic diagram illustrating an example of a light-emitting device for explaining the findings of the present disclosure. FIG. 3 illustrates an example of a VCSEL element including a GaN crystal in its light-emitting portion. As shown in FIG. 3 , the example light-emitting element 30 includes a lower reflective layer RL1 formed on a main substrate (first main substrate) MS, an upper reflective layer RL2 positioned above the lower reflective layer RL1, and a light-emitting portion LP positioned between the lower reflective layer RL1 and the upper reflective layer RL2. For ease of explanation, FIG. 3 illustrates the lower reflective layer RL1, the light-emitting portion LP, and the upper reflective layer RL2 as having gaps between them, but various layers may be interposed therebetween. Furthermore, in FIG. 3 , for the purpose of distinguishing between the coordinate axes, the coordinate axes related to the lower reflective layer RL1 are designated as a-, c-, and m-axes, and the coordinate axes related to the light-emitting portion LP are designated as a', c', and m'-axes.

[0030] The lower reflective layer RL1 is a DBR formed on the main substrate MS by, for example, m-plane growth. In this case, the surface LMS of the lower reflective layer RL1 on the light-emitting portion LP side in the stacking direction is an m-plane. The lower reflective layer RL1 can be designed to have desired reflectance characteristics corresponding to the emission wavelength of the light-emitting portion LP. Here, the reflectance for unpolarized (non-polarized) light such as natural light is referred to as the basic reflectance. Typically, a DBR has wavelength-dependent basic reflectance. Therefore, the lower reflective layer RL1 is designed to have a high basic reflectance in the wavelength range of light emitted from the light-emitting portion LP. In addition, in the light-emitting device 30 of the present disclosure, the lower reflective layer RL1 is designed to have the aforementioned birefringence characteristics for the emission wavelength of the light-emitting portion LP. In the example shown in FIG. 3, the lower reflective layer RL1 has birefringence characteristics in which the polarized reflectance in the polarization direction parallel to the a-axis is relatively higher than the polarized reflectance in other polarization directions.

[0031] The light emitting portion LP is formed, for example, by c-plane growth on a growth substrate. In this case, the surface LPS in the stacking direction has the c-plane of the crystal structure. The light emitting portion LP may then be transferred onto the lower reflective layer RL1 at a distance from the growth substrate. A manufacturing method for such a light emitting element 30 will be described in detail later. In the example shown in FIG. 3, the a-, c-, and m-axis directions of the lower reflective layer RL1 and the a', m', and c'-axis directions of the light emitting portion LP are parallel to each other.

[0032] The light-emitting element 30 may have an upper structure such as an upper reflective layer RL2 formed above the light-emitting portion LP, and the upper reflective layer RL2 may be, for example, a DBR. In the example shown in Figure 3, the upper reflective layer RL2 does not need to have birefringence properties.

[0033] In the light-emitting element 30 described above, because the lower reflective layer RL1 has the birefringence characteristics described above, the polarized light emitted from the light-emitting portion LP in the in-plane direction (c'-axis direction) and reflected by the lower reflective layer RL1 has a polarization direction in the a-axis direction (a'-axis direction) before laser oscillation. It has been found that, when laser oscillation occurs, the light-emitting element 30 can emit laser light LB having a specific polarization direction in the in-plane direction (in the example of FIG. 3, the a'-axis direction). Although the details are not yet clear, it is believed that, before laser oscillation, polarized light having a polarization direction in the a'-axis direction between the lower reflective layer RL1 and the upper reflective layer RL2 is preferentially amplified, thereby satisfying the oscillation conditions, while other polarized light components do not satisfy the oscillation conditions due to the low reflectivity of the reflector having birefringence characteristics (the lower reflective layer RL1 in the example above). Once a polarized light component that satisfies the oscillation conditions oscillates, injected carriers are preferentially consumed for oscillation of that polarized light component, thereby further suppressing oscillation of other polarized light components. As a result, the polarization ratio of the polarized light that was most likely to oscillate before laser oscillation occurred (polarized light having a polarization direction along the a' axis in the above example) can be further increased once laser oscillation occurs.

[0034] Regarding the polarized reflectivity when light of a certain emission wavelength emitted from the light-emitting unit LP is reflected by the lower reflective layer RL1, the difference between the polarized reflectivity in the polarization direction parallel to the a-axis and the polarized reflectivity in the polarization direction parallel to the c-axis is referred to as the polarized reflectivity difference for convenience of explanation. The larger the polarized reflectivity difference, the stronger the birefringence characteristics. The larger the polarized reflectivity difference in the lower reflective layer RL1 for light of a certain emission wavelength emitted from the light-emitting unit LP, the higher the polarization ratio of the laser light LB oscillated by the light-emitting element 30. Furthermore, even if the polarized reflectivity difference in the lower reflective layer RL1 is relatively small, the light-emitting element 30 may emit laser light LB having a specific polarization direction in the in-plane direction due to the occurrence of laser oscillation as described above.

[0035] Although FIG. 3 illustrates a single light-emitting element, multiple light-emitting elements may be arranged two-dimensionally on the main substrate MS. By applying the technology developed by the inventors, multiple high-quality light-emitting portions LP can be transferred onto the lower reflective layer RL1 while controlling the crystal orientation of the lower reflective layer RL1 and the crystal orientation of the light-emitting portion LP to a desired relationship. This allows a stack including the lower reflective layer RL1 and the light-emitting portion LP to be arranged two-dimensionally on the main substrate MS, allowing subsequent manufacturing processes to proceed on the main substrate MS. Furthermore, chip inspection can also be performed on the main substrate MS before chip separation. Therefore, the light-emitting element disclosed herein can be manufactured without significantly compromising the process advantages of conventional VCSELs.

[0036] 4 is a schematic diagram showing another example of a light-emitting device for explaining the findings of the present disclosure. As shown in Fig. 4, in the light-emitting device 30 according to the another example of the present disclosure, the lower reflective layer RL1 has a crystal orientation rotated by 90° around the m-axis compared to the example of Fig. 3. In this case, the light-emitting device 30 emits laser light LB polarized in the m'-axis direction in the in-plane direction.

[0037] 3 and 4, the polarization direction of the laser light LB emitted in the planar direction from the light-emitting element 30 corresponds to the direction of the a-axis in the lower reflective layer RL1. In another example of the light-emitting element 30, the light-emitting portion LP may be further rotated around the c'-axis and positioned on the lower reflective layer RL1. In this case, the laser light LB having a polarization direction between the a'-axis and the m'-axis can be emitted from the light-emitting element 30.

[0038] Furthermore, in the light-emitting element 30, the upper reflective layer RL2 may have birefringence, and the lower reflective layer RL1 may not have birefringence, in which case the birefringence in the upper reflective layer RL2 can control the polarization direction of the laser light LB emitted in the planar direction from the light-emitting element 30. Both the upper reflective layer RL2 and the lower reflective layer RL1 may have birefringence, and in this case, the upper reflective layer RL2 and the lower reflective layer RL1 may be arranged so that the polarization directions with high polarized reflectance are aligned.

[0039] Furthermore, DBRs formed by a-plane growth may also have birefringence. It can be said that the a-plane and m-plane of nitride semiconductor crystals are equivalent from some perspectives. Therefore, similar to what has been described above with respect to DBRs formed by m-plane growth, polarization control can also be performed using DBRs formed by a-plane growth. For example, in the light-emitting device 30, the reflective surface of the lower reflective layer RL1 or the upper reflective layer RL2 may be the a-plane. In this case, the polarization direction of the laser light LB may be controlled by the birefringence characteristics of the a-plane of the lower reflective layer RL1 or the upper reflective layer RL2.

[0040] As described above, according to an example of the light-emitting element of the present disclosure, it is possible to control the polarization of the laser light LB emitted in the surface direction, and it is possible to stably emit the laser light LB having the required polarization direction.

[0041] The findings of the present disclosure are that, in a light-emitting element including a nitride semiconductor, the polarization characteristics (polarization direction) of light emitted in the in-plane direction from the light-emitting element can be changed by combining a light-emitting portion with a semiconductor layer having a crystal orientation different from that of the light-emitting portion in the stacking direction. This allows for relatively easy control of the polarization characteristics (polarization direction) of light emitted in the in-plane direction from the light-emitting element. Generally, various materials are conceivable for the light-emitting portion, and the multilayer reflector can have various birefringence characteristics depending on the structure and constituent materials of the multilayer reflector. Even with such various combinations, a light-emitting element capable of stably emitting polarized light with a controlled polarization direction can be realized based on the findings of the present disclosure.

[0042] [Light-Emitting Element] A light-emitting element according to an embodiment of the present disclosure will be described below with reference to the drawings. In the embodiment of the present disclosure, an example in which the light-emitting element is a VCSEL element will be described. However, the present disclosure is not limited thereto. The present disclosure can also be applied to surface-emitting light-emitting elements such as resonant cavity light-emitting diodes (RCLEDs). Furthermore, while the present embodiment uses a current-injection light-emitting element as an example, the present disclosure is not limited thereto. The light-emitting element of the present disclosure may also be optically excited. The electrode structure of the light-emitting element 30 can be appropriately selected and used from known technologies corresponding to the mounting form on the circuit board. The excitation structure of the light-emitting element 30 can also be appropriately selected and used from known technologies. Furthermore, the following description will use the a-, c-, and m-axes related to the lower reflective layer RL1 and the a', c', and m'-axes related to the light-emitting portion LP as appropriate, and these are also illustrated in the drawings as appropriate.

[0043] 5 is a cross-sectional view schematically illustrating a configuration of a light-emitting device according to an embodiment of the present disclosure. As illustrated in FIG. 5 , the light-emitting device 30 according to this embodiment includes a first nitride semiconductor portion NS1 having a first surface SF1 perpendicular to the first crystal orientation CO1, and a second nitride semiconductor portion NS2 positioned above the first surface SF1, the second surface SF2 being perpendicular to a second crystal orientation CO2 different from the first crystal orientation CO1 and having a light-emitting portion LP positioned above the second surface SF2. The second nitride semiconductor portion NS2 includes a base portion 8 and an upper layer portion 9 positioned above the base portion 8 and including the light-emitting portion LP. The first surface SF1 is a surface of the first nitride semiconductor portion NS1 facing the second nitride semiconductor portion NS2, and the second surface SF2 is a surface of the second nitride semiconductor portion NS2 facing the first nitride semiconductor portion NS1. In the light-emitting device 30, the first surface SF1 and the second surface SF2 may be bonded to each other. The first nitride semiconductor portion NS1 may be a first nitride semiconductor layer, the second nitride semiconductor portion NS2 may be a second nitride semiconductor layer, the light emitting portion LP may be a light emitting layer, and the base portion 8 may be layered.

[0044] The light-emitting element 30 may have a main substrate MS below the first nitride semiconductor portion NS1. In the light-emitting element 30, the first nitride semiconductor portion NS1 may be a lower reflective layer (corresponding to the lower reflective layer RL1 described above). The light-emitting element 30 may also have an upper reflective layer RL2 above the light-emitting portion LP. The light-emitting element 30 may have a junction BP between the first surface SF1 and the second surface SF2. The junction BP will be described in detail later. The direction from the main substrate MS toward the first nitride semiconductor portion NS1 is defined as the "upward direction."

[0045] 5 , the light-emitting element 30 may have an anode EA provided on the upper layer portion 9, and a cathode EC provided on a portion of the base portion 8 where the upper layer portion 9 is not located (the exposed portion). The upper reflective layer RL2, the anode EA, the light-emitting portion LP, the base portion 8, and the first nitride semiconductor portion NS1 may overlap one another in a planar view. Two components overlapping in a planar view means that at least a portion of one component overlaps the other component when viewed in the normal direction of the main substrate MS (including perspective viewing).

[0046] The first nitride semiconductor portion NS1 and the second nitride semiconductor portion NS2 may each contain a nitride semiconductor as a main material. ｘ Ga ｙ In ｚ N (0≦x≦1; 0≦y≦1; 0≦z≦1; x+y+z=1), and specific examples include GaN-based semiconductors, AlN (aluminum nitride), InAlN (indium aluminum nitride), and InN (indium nitride). GaN-based semiconductors are semiconductors that contain gallium atoms (Ga) and nitrogen atoms (N), and typical examples include GaN, AlGaN, AlGaInN, and InGaN. The base portion 8 may be doped (e.g., n-type containing donors).

[0047] In the light-emitting element 30, the first nitride semiconductor portion NS1 and the second nitride semiconductor portion NS2 may each include a GaN-based semiconductor. The first nitride semiconductor portion NS1 and the second nitride semiconductor portion NS2 may each have a hexagonal HC crystal structure (see FIGS. 1 and 2 ). The second nitride semiconductor portion NS2 may include a c-plane GaN-based semiconductor layer. In this specification, a c-plane GaN-based semiconductor layer refers to a GaN-based semiconductor layer formed by c-plane film deposition.

[0048] In the light-emitting device 30 of this embodiment, the first surface SF1 may be an m-plane. In the first nitride semiconductor portion NS1 whose first surface SF1 is an m-plane, the first crystal orientation CO1 is parallel to the m-axis and, as described above, has birefringence with respect to light traveling in the direction of the first crystal orientation CO1. The first nitride semiconductor portion NS1 functions as a lower reflective layer and may be, for example, a DBR having birefringence characteristics. The first nitride semiconductor portion NS1 may include a plurality of nitride crystal layers having different refractive indices. The first nitride semiconductor portion NS1 may include an amorphous nitride layer. The amorphous nitride layer may not have birefringence characteristics.

[0049] In the light-emitting element 30 of this embodiment, light generated in the light-emitting portion LP is reflected back and forth by the first nitride semiconductor portion NS1 and the upper reflective layer RL2, resulting in laser oscillation. The light-emitting element 30 emits laser light from the side with relatively low reflectivity (here, the upper reflective layer RL2 side). The light-emitting element 30 can also emit relatively weak laser light from the side with relatively high reflectivity (here, the lower reflective layer RL1 side). The upper reflective layer RL2 may be, for example, a DBR including multiple dielectric layers. For clarity of explanation, the following description will be given assuming that the traveling direction of light between the first nitride semiconductor portion NS1 and the upper reflective layer RL2 is perpendicular to the first surface SF1 of the first nitride semiconductor portion NS1. Even if there is a slight deviation in the traveling direction of light, the birefringence characteristics do not change significantly. In addition, in the light-emitting element 30, the material, stacking structure, etc. of the first nitride semiconductor portion NS1 are adjusted (designed) so as to have the required polarization reflectance characteristics (birefringence characteristics) corresponding to the emission wavelength of the light-emitting portion LP.

[0050] In the light-emitting element 30 of this embodiment, light (reflected light) L11 traveling from the first surface SF1 toward the second surface SF2 of the first nitride semiconductor portion NS1 has a specific polarization direction with respect to the first crystal orientation CO1. For example, in the light-emitting element 30, the first crystal orientation CO1 may be the m-axis direction, and the specific polarization direction of the light (reflected light) L11 from the first surface SF1 may be the a-axis direction in the first nitride semiconductor portion NS1. In the light-emitting element 30, the light (reflected light) L11 traveling from the first surface SF1 toward the second surface SF2 may have a polarization ratio exceeding 50% (e.g., a polarization ratio of 80% or more).

[0051] In the light-emitting element 30 of this embodiment, the second face SF2 of the second nitride semiconductor portion NS2 may be the -c plane. The light-emitting portion LP may be a GaN-based semiconductor layer having a c-plane parallel to the second face SF2. The light-emitting portion LP may be an active layer. The upper layer portion 9 including the light-emitting portion LP may be formed on the base portion 8 by epitaxial growth. When the second face SF2 is the -c plane, the second nitride semiconductor portion NS2 may be formed by c-plane growth. The second face SF2 may also be the c-plane. The a', c', and m' axes related to the light-emitting portion LP can be commonly used for the entire second nitride semiconductor portion NS2. The a', c', and m' axes related to the first nitride semiconductor portion NS1 may be the <11-20> axis, <0001> axis, and <1-100> axis of the nitride semiconductor, respectively. The a', c', and m' axes related to the light emitting portion LP (second nitride semiconductor portion NS2) are also the same.

[0052] Here, the findings of the present disclosure can be summarized as follows, using the light-emitting element 30 of one embodiment as an example. Generally, a VCSEL that emits laser light from the c-plane can produce laser light having a polarization ratio (proportion of linear polarization). However, the polarization direction is not determined with respect to the crystal orientation, making it difficult to use as a linearly polarized laser from a design perspective. Under these circumstances, it has been found that light (reflected light) L11, which is generated when light emitted from the c-plane of the light-emitting portion LP is reflected by the m-plane of the first nitride semiconductor portion NS1, and which travels toward the c-plane of the light-emitting portion LP in a direction along the m-axis of the first nitride semiconductor portion NS1, has a polarization ratio (greater than 0) and its polarization direction can be a determined direction (specific direction) with respect to the crystal orientation of the first nitride semiconductor portion NS1. In this embodiment, by combining c-plane emission and m-plane reflection, it is possible to obtain laser light that has a high polarization ratio (e.g., 80% or more) and a fixed polarization direction (e.g., the a-axis direction of the first nitride semiconductor portion NS1), and that is easy to use as a linearly polarized laser from a design perspective.

[0053] 5, the stacking direction of the second nitride semiconductor portion NS2 is parallel to the c'-axis. The second nitride semiconductor portion NS2 has a second crystal orientation CO2 parallel to the c'-axis, and as described above, does not have birefringence with respect to light traveling in the direction of the second crystal orientation CO2.

[0054] 5, the reflected light L11 from the first surface SF1 has a polarization direction in the a-axis direction (the magnitude of the electric field vector in the a-axis direction is relatively larger than the electric field vectors in other directions), so that the polarization direction of the light emitted from the light-emitting unit LP can be guided to the a-axis direction (the m'-axis direction in the light-emitting unit LP). As a result, laser light LB having a polarization direction in the m'-axis direction is emitted in the in-plane direction from the light-emitting element 30. Therefore, the light-emitting element 30 can be configured to be capable of controlling the polarization of the laser light LB emitted in the in-plane direction.

[0055] Specific examples of the light emitting element 30 in this embodiment will be described later, but based on the above findings, the light emitting element 30 can have various configuration examples.

[0056] In one configuration example, the light-emitting element 30 may have a first surface SF1 that is a semipolar or nonpolar surface (apolar surface). Since the first surface SF1 is a semipolar or nonpolar surface and the first nitride semiconductor portion NS1 has birefringence, the reflected light L11 from the first surface SF1 may have a specific polarization direction. For example, if the first nitride semiconductor portion NS1 has a hexagonal HC crystal structure, the semipolar surface is a surface having a plane orientation oblique to the c-axis of the hexagonal HC. Various planes are actually used as semipolar planes, such as the (11-22) plane and the (1-101) plane. The nonpolar surface is a plane having a plane orientation perpendicular to the c-plane of the hexagonal HC, such as the m-plane or the a-plane.

[0057] In one configuration example of the light-emitting element 30, the first surface SF1 may be an m-plane or an a-plane. For example, when the first crystal orientation CO1 is the a-axis direction (the first surface SF1 is the a-plane), the specific polarization direction of the reflected light L11 from the first surface SF1 may be the m-axis direction of the first nitride semiconductor portion NS1. The first nitride semiconductor portion NS1 and the second nitride semiconductor portion NS2 may have a crystal structure other than the hexagonal HC. The first nitride semiconductor portion NS1 and the second nitride semiconductor portion NS2 may be, for example, a cubic crystal, and a plane orientation having birefringence characteristics may be used as the first surface SF1, and the first surface SF1 may be the (111) plane of the cubic crystal. In one configuration example of the light-emitting element 30, the second surface SF2 may be a polar plane. The second surface SF2 is not necessarily limited to the c-plane or the −c-plane. Since the reflected light L11 from the first surface SF1 has a specific polarization direction and the second nitride semiconductor portion NS2 does not have birefringence for light traveling in the direction of the second crystal orientation CO2, laser light LB having a specific polarization direction is emitted from the light-emitting element 30 in the surface direction.

[0058] In one exemplary configuration of the light-emitting element 30, the first surface SF1 and the second surface SF2 may be directly bonded at the junction BP. The direct bonding method is not particularly limited, and may be surface activated bonding, or bonding may be performed by heating and applying pressure. When directly bonded at the junction BP, the materials of the base portion 8 and the first nitride semiconductor portion NS1 may be selected taking into consideration lattice mismatch, etc. Typically, an amorphous layer may be generated at the interface between the first nitride semiconductor portion NS1 and the base portion 8 due to direct bonding. The light-emitting element 30 may include a transition layer between the first surface SF1 and the second surface SF2. Examples of the transition layer include, but are not limited to, an amorphous layer, an oxide layer, a layer containing defects (such as dislocations), and a composite layer containing two or more layers selected from these groups. The amorphous layer may contain oxygen. The junction BP may include the transition layer.

[0059] Furthermore, the light-emitting element 30 may include a medium layer such as a transparent adhesive layer between the first nitride semiconductor portion NS1 and the second nitride semiconductor portion NS2 as long as light can travel back and forth between the lower reflective layer RL1 and the upper reflective layer RL2 to generate laser light. The first surface SF1 and the second surface SF2 may be bonded together via a light-transmitting bonding material.

[0060]

[0043] Fig. 6 is a flowchart illustrating an example of a method for manufacturing a light-emitting device according to an embodiment of the present disclosure. As shown in Fig. 6, the method for manufacturing a light-emitting device according to the embodiment includes a step S10 of forming a first nitride semiconductor portion NS1 having a first surface SF1 perpendicular to the first crystal orientation CO1, a step S20 of forming a second nitride semiconductor portion NS2 having a second surface SF2 perpendicular to a second crystal orientation CO2 different from the first crystal orientation CO1 and a light-emitting portion LP located above the second surface SF2, and a step S30 of bonding the first surface SF1 and the second surface SF2.

[0061] In the step of forming the first nitride semiconductor portion NS1, for example, the first nitride semiconductor portion NS1 can be crystal-grown on the main substrate MS. The second nitride semiconductor portion NS2 can be formed using, for example, an epitaxial lateral overgrowth (ELO) method. The second nitride semiconductor portion NS2 may be formed using any other method as long as it can realize a light-emitting portion LP with low defects. In one embodiment, the method for manufacturing a light-emitting element may include, for example, peeling off the second nitride semiconductor portion NS2 that has been crystal-grown on a template substrate including a seed region and a growth-inhibiting region, and directly bonding the second surface SF2 of the peeled second nitride semiconductor portion NS2 to the first surface SF1 of the first nitride semiconductor portion NS1.

[0062] In one example of a method for manufacturing a light-emitting element, the first surface SF1 and the second surface SF2 may be bonded by at least one of heating and pressing. In one example of a method for manufacturing a light-emitting element, the first surface SF1 and the second surface SF2 may be bonded via a light-transmitting bonding material.

[0063] [Manufacturing Apparatus] Fig. 7 is a block diagram showing an example of a manufacturing apparatus for a light-emitting element according to an embodiment of the present disclosure. The manufacturing apparatus 50 for a light-emitting element shown in Fig. 7 includes an apparatus M10 that performs step S10 of Fig. 6, an apparatus M20 that performs step S20 of Fig. 6, an apparatus M30 that performs step S30 of Fig. 6, and a control device MC that controls the apparatus M10, the apparatus M20, and the apparatus M30.

[0064] The devices M10 and M20 may include MOCVD devices, and the control device MC may include a processor and memory. The control device MC may be configured to control the devices M10, M20, and M30 by executing a program stored in, for example, an internal memory, a communication device capable of communication, or an accessible network. This program and a recording medium on which this program is stored are also included in this embodiment.

[0065] Example 1 In Example 1, a light emitting substrate 40 having a plurality of light emitting elements 30 will be described as an example. In Example 1, the light emitting elements 30 are VCSEL elements. One or more light emitting elements 30 can be cut out from the light emitting substrate 40, and a single or multiple light emitting elements 30 can be mounted on a submount, a circuit board, or the like.

[0066] (Overall Configuration) Details of each part of the light emitting device in Example 1 will be described in more detail later together with an example of a method for manufacturing a light emitting device, but the overall configuration will be briefly described below.

[0067] Fig. 8 is a cross-sectional view, along the X direction, of a light emitting substrate having a plurality of light emitting elements in Example 1. Fig. 9 is a cross-sectional view, along the Y direction, of a light emitting substrate having a plurality of light emitting elements in Example 1. Fig. 10 is a plan view of the light emitting substrate having a plurality of light emitting elements in Example 1. As shown in Figs. 8, 9, and 10, the light emitting element 30 in Example 1 includes a main substrate MS, a first nitride semiconductor portion NS1 located on the main substrate MS, a second nitride semiconductor portion NS2 located on the first nitride semiconductor portion NS1, an insulating film KF and an anode EA located on the second nitride semiconductor portion NS2, an upper reflective layer RL2 located on the anode EA, and a cathode EC located on the base portion 8.

[0068] The second nitride semiconductor portion NS2 includes a base portion 8 and an upper layer portion 9. The base portion 8 and the upper layer portion 9 may include a nitride semiconductor (for example, a GaN-based semiconductor). In the first embodiment, the X direction is the a-axis direction of the first nitride semiconductor portion NS1 and the a'-axis direction of the second nitride semiconductor portion NS2, and is the <11-20> direction in the nitride semiconductor. The Y direction is the c-axis direction of the first nitride semiconductor portion NS1 and the m'-axis direction of the second nitride semiconductor portion NS2, i.e., the <1-100> direction in the nitride semiconductor that forms the second nitride semiconductor portion NS2. The Z direction is the m-axis direction of the first nitride semiconductor portion NS1 and the c'-axis direction of the second nitride semiconductor portion NS2, i.e., the <0001> direction in the nitride semiconductor that forms the second nitride semiconductor portion NS2.

[0069] In Example 1, the base portion 8 includes a first portion HD and a second portion SD (low defect portion) having a threading dislocation density equal to or less than 1 / 5 of that of the first portion HD. ６ / cm ２ or less. The second nitride semiconductor portion NS2 including such a base portion 8 can be formed by, for example, the ELO method (described later). The second portion SD overlaps with the upper layer portion 9 in a planar view. The portion of the upper layer portion 9 that overlaps with the second portion SD in a planar view becomes a low-dislocation portion that inherits the low-dislocation properties (low defects) of the base portion 8. The first nitride semiconductor portion NS1 that functions as a lower reflective layer and the upper reflective layer RL2 can be configured to overlap with the second portion SD in a planar view.

[0070] In the light-emitting element 30, light generated in the light-emitting portion LP (see FIG. 5 ) of the upper layer portion 9 by a current between the anode EA and the cathode EC undergoes laser oscillation due to stimulated emission and feedback between the first nitride semiconductor portion NS1 and the upper reflective layer RL2. In the light-emitting element 30, the first surface SF1 is an m-plane, and the first nitride semiconductor portion NS1 exhibits birefringence with respect to light traveling in the direction of the first crystal orientation CO1. The first nitride semiconductor portion NS1 has a relatively higher polarized reflectance in the a-axis direction at the first surface SF1 than in other directions. In the light-emitting element 30, the second surface SF2 is a c-plane, and the second nitride semiconductor portion NS2 does not exhibit birefringence with respect to light traveling in the direction of the second crystal orientation CO2. This allows the light-emitting element 30 to emit laser light LB having a specific polarization direction in the in-plane direction when a current is injected between the anode EA and the cathode EC. In the first embodiment, the specific polarization direction is the a'-axis direction of the second nitride semiconductor portion NS2 (the a-axis direction of the first nitride semiconductor portion NS1).

[0071] FIG. 11 is a partially enlarged view of the light-emitting element in Example 1. As shown in FIG. 11 , the upper layer 9 includes, from the bottom up, an n-type semiconductor layer 9A as a first-type semiconductor layer, a light-emitting portion LP, and a p-type semiconductor layer 9B as a second-type semiconductor layer. The light-emitting portion LP is an active layer, has an MQW (multi-quantum well) structure, and includes, for example, at least one of InGaN and GaN. The n-type semiconductor layer 9A is, for example, an n-type AlGaN layer. The p-type semiconductor layer 9B is, for example, a p-type GaN layer. The anode EA is provided so as to be in contact with the p-type semiconductor layer 9B.

[0072] The light-emitting element 30 includes an insulating film KF located on the upper layer portion 9, and the insulating film KF includes an upper reflective layer RL2, an anode EA, a light-emitting portion LP, a second portion SD, and an aperture portion AP that overlaps with the first nitride semiconductor portion NS1 in a planar view. The anode EA is a transparent electrode located between the upper layer portion 9 and the upper reflective layer RL2, and the anode EA is in contact with the upper surface of the insulating film KF. The insulating film KF can be made of SiOx, SiNx, AlOx, or the like.

[0073] The anode EA and the upper layer 9 come into contact at the aperture portion AP. Specifically, the p-type semiconductor layer 9B exposed at the aperture portion AP comes into contact with the center of the anode EA. The aperture portion AP is a current constriction portion formed, for example, in a circular shape, penetrating the insulating film KF. The aperture portion AP constricts the current path CP between the anode EA and the cathode EC on the anode EA side, thereby improving light emission efficiency. Furthermore, in Example 1, the current path CP extending from the anode EA within the aperture portion AP through the upper layer 9 and base portion 8 to the cathode EC is formed in the low-defect portions of the base portion 8 and upper layer 9. Therefore, the light emission efficiency of the light-emitting portion LP is improved, and heat generation in the base portion 8 and upper layer 9 is suppressed.

[0074] In the first embodiment, the first nitride semiconductor portion NS1 may be an epitaxial DBR including a nitride semiconductor formed by m-plane growth on the main substrate MS. The first nitride semiconductor portion NS1 has a plurality of pairs PF including a first refraction portion R1 and a second refraction portion R2 having a refractive index higher than that of the first refraction portion R1. The second refraction portion R2 may include a GaN-based semiconductor, and the first refraction portion R1 may include a refractive index material (e.g., a nitride semiconductor) having a refractive index lower than that of the GaN-based semiconductor of the second refraction portion R2. By forming the first nitride semiconductor portion NS1 as an epitaxial DBR including a nitride semiconductor, the optical reflectance of the first nitride semiconductor portion NS1 is increased.

[0075] From the viewpoint of increasing reflectance, the first nitride semiconductor portion NS1 may have a structure in which a first refraction portion R1 and a second refraction portion R2 are repeatedly stacked in this order on the main substrate MS. In Example 1, the first face SF1 of the first nitride semiconductor portion NS1 corresponds to the upper face of the second refraction portion R2 and is the m-plane of the nitride semiconductor crystal structure. Furthermore, the second face SF2 of the second nitride semiconductor portion NS2 corresponds to the lower face of the base portion 8 and is the -c-plane of the nitride semiconductor crystal structure.

[0076] The specific stacked structure of the first nitride semiconductor portion NS1 is not particularly limited, and for example, a known epitaxial DBR structure can be appropriately applied. The first nitride semiconductor portion NS1 may have a modulated film thickness, and the stacking order of the first refraction portion R1 and the second refraction portion R2 may be appropriately set. Various combinations of stacking orders of the first refraction portion R1 and the second refraction portion R2 are possible. For example, since an optical film thickness of ½λ does not affect the reflectance, the first refraction portion R1 with an optical film thickness of ½λ may be disposed in the uppermost layer of the first nitride semiconductor portion NS1 in the first nitride semiconductor portion NS1. In this case, the first surface SF1 corresponds to the upper surface of the first refraction portion R1. Alternatively, the second refraction portion R2 with an optical film thickness of ½λ may be disposed in the lowermost layer of the first nitride semiconductor portion NS1 (the layer located on the surface of the main substrate MS).

[0077] In the first embodiment, the junction BP is provided between the first nitride semiconductor portion NS1 and the base portion 8. Specifically, the junction BP is a transition layer (a layer generated as a by-product of the bonding) formed by directly bonding the first nitride semiconductor portion NS1 and the second nitride semiconductor portion NS2, and is, for example, an amorphous layer. In the light-emitting element 30, the first surface SF1 and the second surface SF2 may each be made of the same nitride semiconductor. The first surface SF1 may be the interface between the first nitride semiconductor portion NS1 and the junction BP, and the second surface SF2 may be the interface between the base portion 8 and the junction BP. The junction BP may not be an amorphous layer but may be a crystalline layer including defects (dislocations, etc.).

[0078] In the light-emitting element 30, the root mean square roughness (RMS) of each of the first surface SF1 and the second surface SF2 is 0.5 nm or less. This facilitates direct bonding between the first nitride semiconductor portion NS1 and the second nitride semiconductor portion NS2. The RMS of each of the first surface SF1 and the second surface SF2 can be measured in a state before direct bonding. When the first nitride semiconductor portion NS1 and the second nitride semiconductor portion NS2 are directly bonded, the RMS of each of the first surface SF1 and the second surface SF2 in a state before direct bonding can be indirectly determined to be 0.5 nm or less.

[0079] The constituent materials and crystal orientations of the first nitride semiconductor portion NS1 and the second nitride semiconductor portion NS2 can be adjusted so that the lattice mismatch between the first surface SF1 of the first nitride semiconductor portion NS1 and the second surface SF2 of the second nitride semiconductor portion NS2 is small. In this case, the first nitride semiconductor portion NS1 and the second nitride semiconductor portion NS2 may be directly bonded together seamlessly. The junction portion BP may be an interface between the first surface SF1 and the second surface SF2, rather than an amorphous layer.

[0080] The upper reflective layer RL2 is located on the anode EA and can be a dielectric DBR containing a dielectric. For example, the upper reflective layer RL2 has multiple pairs PS each including a third refraction portion R3 and a fourth refraction portion R4 having a refractive index higher than that of the third refraction portion R3, and each of the third refraction portion R3 and the fourth refraction portion R4 contains a dielectric material. The lower surface of the upper reflective layer RL2 may be included in the third refraction portion R3, and the upper surface of the upper reflective layer RL2 may be included in the fourth refraction portion R4. The third refraction portion R3 may also have a refractive index lower than that of the anode EA. This can increase the optical reflectivity of the upper reflective layer RL2. Furthermore, providing the upper reflective layer RL2 in an island shape on the anode EA improves heat dissipation.

[0081] 8 and 9, the light emitting substrate 40 of Example 1 may have gaps TK between the plurality of light emitting elements 30. The side surfaces of the base portion 8 and the upper layer portion 9 may be the a-plane or m-plane of a GaN-based semiconductor.

[0082] (Manufacturing Method) Fig. 12 is a flowchart showing an example of a method for manufacturing the light-emitting element in Example 1. As shown in Fig. 12, the example of the method for manufacturing the light-emitting element includes a first partial process S100, a second partial process S200, and a third partial process S300. Below, the first partial process S100, the second partial process S200, and the third partial process S300 will be described in order.

[0083] {First Partial Process} FIG. 13 is a process cross-sectional view showing an example of a first partial process of the manufacturing method of the light-emitting device in Example 1. FIG. 14 is a process plan view showing an example of the first partial process of the manufacturing method of the light-emitting device in Example 1. As shown in FIGS. 12 to 14 , the first partial process S100 includes a step S110 of preparing a template substrate TS, a step S120 of forming a semiconductor portion 8N by ELO, a step S130 of forming a plurality of trenches TR to divide the semiconductor portion 8N into a plurality of base portions 8, a step S140 of forming an upper layer portion 9 on the base portions 8, and a step S150 of separating the second nitride semiconductor portion NS2 from the template substrate TS. In Example 1, the upper layer portion 9 is grown on the c-plane above the template substrate TS. In another example, an island-shaped portion including the base portion 8 and the upper layer portion 9 (corresponding to the second nitride semiconductor portion NS2 mentioned above) may be formed on the template substrate TS by forming the upper layer portion 9 on the semiconductor portion 8N and then dividing the semiconductor portion 8N and the upper layer portion 9.

[0084] <Template Substrate> The template substrate TS includes a seed region SA and a growth inhibition region DA aligned in the first direction (X direction). The template substrate TS may have, for example, a main substrate (second main substrate) 1, an underlayer 4, and a mask pattern 6. The mask pattern 6 may include a mask portion 5 that functions as the growth inhibition region DA and an opening K that corresponds to the seed region SA. Specifically, the surface (top surface) of the mask portion 5 may serve as the growth inhibition region DA. The main substrate 1 and underlayer 4 may be collectively referred to as a base substrate BS. The template substrate TS may also be referred to as a growth substrate.

[0085] The main substrate 1 can be a heterogeneous substrate having a lattice constant different from that of the semiconductor portion 8N containing, for example, a GaN-based semiconductor. Examples of heterogeneous substrates include a single-crystal silicon (Si) substrate, a sapphire (Al ２ O ３Examples of the surface orientation of the main substrate 1 include a (111) surface of a silicon substrate, a (0001) surface of a sapphire substrate, and a 6H—SiC (0001) surface of a SiC substrate. These are merely examples, and in Example 1, any substrate and surface orientation may be used as long as it allows the semiconductor portion 8N to be formed using the ELO method and the upper layer portion 9 to be grown as the c-plane above the semiconductor portion 8N (or the base portion 8 obtained by dividing the semiconductor portion 8N).

[0086] 15 is a cross-sectional view showing an example of the configuration of a template substrate. As shown in FIG. 15 , the template substrate TS may have a configuration in which a seed portion 3 and a mask pattern 6 are formed in this order on a main substrate 1, and in this case, the base portion 4 may be the seed portion 3. The template substrate TS may also have a configuration in which a multilayer base portion 4 (including a buffer portion 2 and a seed portion 3) and a mask pattern 6 are formed in this order on the main substrate 1. The seed portion 3 may be formed locally (e.g., in a stripe shape) so as to overlap with the opening K of the mask pattern 6 in a plan view. The template substrate TS may also have a configuration in which the mask pattern 6 is formed on the main substrate 1 (e.g., a SiC bulk crystal substrate).

[0087] The seed portion 3 is a growth starting point of the semiconductor portion 8N, and may overlap the opening K in plan view, and may have a shape with its longitudinal direction aligned in the second direction (Y direction). The seed portion 3 may be made of a base material such as a GaN-based semiconductor, aluminum nitride (AlN), silicon carbide (SiC), AlScN, or graphene.

[0088] For example, when a silicon substrate is used for the main substrate 1 and a GaN-based semiconductor is used for the seed portion 3, a buffer portion 2 including at least one of an AlN layer and a SiC (silicon carbide) layer may be provided to reduce the possibility of the two (main substrate and seed portion) fusing together. When a main substrate 1 that does not fuse with the seed portion 3 is used, a configuration without providing the buffer portion 2 is also possible. Furthermore, when a seed portion 3 that is less reactive with the main substrate 1 is used, a configuration without providing the buffer portion 2 is also possible. The buffer portion 2 may include a strain relaxation layer. Examples of the strain relaxation layer include an AlGaN superlattice structure and a graded structure in which the Al composition of AlGaN is gradually changed.

[0089] At least one of the buffer portion 2 (e.g., aluminum nitride) and the seed portion 3 (e.g., GaN-based semiconductor) can be formed using a sputtering device (e.g., pulse sputter deposition (PSD), pulse laser deposition (PLD), etc.). By forming the film using a sputtering device, the efficiency of the manufacturing process can be improved.

[0090] The mask pattern 6 is formed on the main substrate 1 or base substrate BS using a material that suppresses vertical growth (growth in the c-axis direction) of the nitride semiconductor and enables lateral growth (e.g., growth in the a-axis direction) of the nitride semiconductor. Examples of materials for the mask portion 5 of the mask pattern 6 include silicon nitride, silicon carbide, silicon carbonitride, diamond-like carbon, silicon oxide, and silicon oxynitride. Examples of materials for the mask portion 5 include silicon-free materials such as titanium nitride, molybdenum nitride, tungsten nitride, and tantalum carbide, as well as high-melting-point metals (molybdenum, tungsten, platinum, etc.). The mask portion 5 may be a single-layer film made of one of these materials, or a multilayer film made by combining multiple materials. The thickness of the mask portion 5 may be, for example, approximately 100 nm to 4 μm. The width Wm (size in the first direction) of the mask portion 5 may be, for example, 10 μm to 200 μm.

[0091] The opening K of the mask pattern 6 may have a longitudinal shape with the first direction (X direction) as the width direction and the second direction (Y direction) as the length direction. The mask pattern 6 may have a plurality of openings K arranged in the first direction. The openings K may have a tapered shape (a shape in which the width narrows downward). The width Wk of the opening K (size in the first direction) may be, for example, approximately 0.1 μm to 20 μm. The width Wk of the opening K may be smaller than the width Wm of the mask portion 5.

[0092] <Deposition of Semiconductor Portion> Next, the semiconductor portion 8N is formed on the template substrate TS using the ELO method. In Example 1, the semiconductor portion 8N is a GaN layer, and the semiconductor portion 8N is deposited by ELO on the template substrate TS using a MOCVD (metal-organic chemical vapor deposition) apparatus so that the upper surface is the c-plane. Examples of ELO deposition conditions are: substrate temperature: 1120°C, growth pressure: 50 kPa, TMG (trimethylgallium): 22 sccm, NH ３ : 15 slm, V / III=6000 (ratio of the supply amount of group V source material to the supply amount of group III source material) can be adopted.

[0093] FIG. 16 is a cross-sectional view showing an example of a method for forming a semiconductor portion in Example 1. FIG. 16 shows an example in which a mask portion 5 in a mask pattern 6 has a tapered opening K. As shown in FIG. 16, an initial growth portion SL may be formed on a seed region SA exposed from the opening K, and then a semiconductor portion 8N may be grown laterally from the initial growth portion SL. The initial growth portion SL serves as a starting point for the lateral growth of the semiconductor portion 8N. By appropriately controlling the ELO film formation conditions, it is possible to control the growth of the semiconductor portion 8N to either the c-axis direction of the nitride semiconductor or the a-axis direction (first direction (X direction)).

[0094] For example, deposition of the initial growth portion SL may be stopped just before the edge of the initial growth portion SL reaches the upper surface of the mask portion 5 (when it is in contact with the upper edge of the side of the mask portion 5) or just after it reaches the upper surface of the mask portion 5 (i.e., at this timing, the ELO deposition conditions may be switched from c-axis deposition conditions to a-axis deposition conditions). By causing the initial growth portion SL to grow laterally from a state in which it slightly protrudes from the mask portion 5, the growth of the semiconductor portion 8N in the c-axis direction (thickness direction) is suppressed, allowing the semiconductor portion 8N to grow laterally at high speed with high crystallinity and reduced raw material consumption. This allows a thin, wide, and low-defect semiconductor portion 8N (crystal of a nitride semiconductor such as GaN) to be formed at low cost. The initial growth portion SL may be formed to a thickness of, for example, 30 nm to 1000 nm, 50 nm to 400 nm, or 70 nm to 350 nm.

[0095] The deposition temperature for the semiconductor portion 8N (ELO semiconductor portion) may be a high temperature exceeding 1200°C, but may also be 1150°C or lower. From the viewpoint of reducing mutual reactions, the semiconductor portion 8N can also be formed at a low temperature below 1000°C. In such low-temperature deposition, if trimethylgallium (TMG) is used as the gallium source, the source material may not be sufficiently decomposed, and gallium atoms and carbon atoms may be simultaneously incorporated into the semiconductor portion 8N in greater amounts than usual. The carbon incorporated into the semiconductor portion 8N may reduce reaction with the mask portion 5 and reduce adhesion between the mask portion 5 and the semiconductor portion 8N. Therefore, in low-temperature deposition of the semiconductor portion 8N, the amount of ammonia supplied may be reduced and deposition may be performed at a low V / III ratio (<1000). This allows carbon elements in the source material or chamber atmosphere to be incorporated into the semiconductor portion 8N, reducing reaction between the semiconductor portion 8N and the mask portion 5.

[0096] The semiconductor portions 8N that have grown laterally in opposite directions from each of two adjacent openings K do not come into contact (meet) with each other on the mask portion 5, and a gap (gap) GP is formed, thereby reducing internal stress in the semiconductor portions 8N. This reduces cracks and defects (dislocations) that occur in the semiconductor portions 8N. The width of the gap GP (size in the first direction X1) can be 5 μm or less, 3 μm or less, or 2 μm or less.

[0097] The base portion B of the semiconductor portion 8N, which is located on the initial growth portion SL, becomes a dislocation inheritance portion (the aforementioned first portion HD) with many threading dislocations, while the wing portion F, which is located on the mask portion 5, becomes a low-defect portion (the aforementioned second portion SD) with a threading dislocation density of 1 / 5 or less compared to the dislocation inheritance portion. The wing portion F includes an edge E located above the growth inhibition region DA. Threading dislocations are dislocations (defects) that extend in the c-axis direction (<0001> direction) of the semiconductor portion 8N. The threading dislocation density can be determined, for example, by performing CL (Cathode Luminescence) measurement on the surface of the semiconductor portion 8N and counting the number of black dots in the CL measurement image. The threading dislocation density of the wing portion F is, for example, 5×10 ６ [pcs / cm ２ ] can be as follows.

[0098] The density of basal plane dislocations in base B is 5 × 10 ８ / cm ２ The basal plane dislocations may be dislocations extending in the in-plane direction of the c-plane of the semiconductor portion 8N. The basal plane dislocation density here can be determined, for example, by dividing the semiconductor portion 8N to expose the side surface of the base portion B and measuring the dislocation density of this side surface by CL.

[0099] For the wing portion F, the ratio (WF / d1) of the width WF (size in the first direction) to the thickness d1 can be, for example, 2.0 or more. WF / d1 can be 2.0 or more, 4.0 or more, 5.0 or more, 7.0 or more, or 10.0 or more. By making WF / d1 2.0 or more, it is easy to reduce the internal stress of the semiconductor portion 8N. As a result, it is possible to reduce the warpage of the wafer. The width WF of the wing portion F may be, for example, 7.0 μm or more, 10.0 μm or more, 20.0 μm or more, or 40.0 μm or more. The thickness d1 may be 10.0 μm or less, 5.0 μm or less, or 2.0 μm or less.

[0100] In Example 1, the width Wm of the mask portion 5 was 50 μm, the width Wk of the opening K was 5 μm, the horizontal width of the semiconductor portion 8N was 53 μm, the width (size in the X direction) of the wing portion F was 24 μm, and the layer thickness of the semiconductor portion 8N was 5 μm. The aspect ratio of the semiconductor portion 8N was 53 μm / 5 μm=10.6, which is an extremely high aspect ratio.

[0101] <Division of Semiconductor Portion> Next, in Example 1, the semiconductor portion 8N is divided into a plurality of base portions 8 by forming a plurality of trenches TR extending in the first direction (X direction). The base portion 8 may be formed into an island shape (not connected to its surroundings) by the plurality of trenches TR and gaps GP. The etching of the semiconductor portion 8N may be dry etching, and this dry etching may be stopped at the mask portion 5. In this case, the mask portion 5 functions as an etching stopper, and the mask portion 5 is exposed at the bottom of the trench TR. The etching does not necessarily have to stop at the surface of the mask portion 5, as long as the etching stops within the mask portion 5. The mask portion 5 is formed of a material that is more difficult to etch than the semiconductor portion 8N, and a portion of the mask portion 5 may be etched as long as it serves to stop the etching.

[0102] When the trench TR is formed to extend in the width direction (X direction) of the opening K, warpage of the wafer can be reduced. This effect is remarkable when a heterogeneous substrate having a thermal expansion coefficient different from that of the semiconductor portion 8N is used for the main substrate 1.

[0103] <Formation of Upper Layer> Next, in Example 1, each upper layer 9 may be formed in an island shape corresponding to the base portion 8. Because nitride semiconductor is difficult to deposit on the mask portion 5, which is a selective growth mask, the upper layer 9 grows on the top and side surfaces of the base portion 8, which includes nitride semiconductor, and therefore the upper layer 9 can be formed in an island shape. This can avoid patterning damage and improve the condition of the light-emitting portion LP (see FIG. 11 ), which is the active layer of the upper layer 9. The upper layer 9 may be formed above the base portion 8 in a portion that overlaps with the wing portion F in a planar view, or a portion of the upper layer 9 may be recessed by etching or the like to expose the base portion 8. Recessing a portion of the upper layer 9 by etching or the like may expose, for example, the n-type semiconductor layer 9A of the upper layer 9.

[0104] The upper layer 9 may be formed continuously using the same apparatus (e.g., an MOCVD apparatus) as the apparatus used to form the semiconductor portion 8N, or the substrate may be temporarily removed from the apparatus after the semiconductor portion 8N has been formed, and the upper layer 9 may be formed after performing surface polishing or the like on the semiconductor portion 8N. In addition to an MOCVD apparatus, a sputtering apparatus, a remote plasma chemical vapor deposition (RPCVD) apparatus, a PSD (Pulse Sputter Deposition) apparatus, or the like may be used to form the upper layer 9. When a remote plasma CVD apparatus or a PSD apparatus is used, hydrogen is not used as a carrier gas, making it easier to form a low-resistance p-type GaN-based semiconductor portion.

[0105] The MQW structure of the light emitting portion LP in the upper layer portion 9 can be, for example, a 2- to 6-period structure of InGaN / GaN. The In composition varies depending on the target emission wavelength, with an In concentration of approximately 15-20% for blue (near 450 nm) and approximately 30% for green (near 530 nm). If necessary, an electron blocking layer (e.g., an AlGaN layer) may be formed on the light emitting portion LP. Furthermore, to reduce resistance, the surface (approximately 10 nm) of the p-type semiconductor layer 9B may be a highly doped p-type layer.

[0106] The island-shaped portion including the base portion 8 and the upper layer portion 9 can be the second nitride semiconductor portion NS2 in the above-described light-emitting element 30. The second nitride semiconductor portion NS2 formed as described above includes the base portion 8 located below the light-emitting portion LP, and the base portion 8 has a base portion B and a pair of wing portions F extending on both sides from the base portion B. In the second nitride semiconductor portion NS2, the light-emitting portion LP and the wing portions F overlap in a planar view. The portion of the upper layer portion 9 that overlaps with the wing portions F in a planar view retains low dislocation properties (low defects), and therefore the light-emitting efficiency of this portion can be improved.

[0107] <Separation of Element Portion> Next, the mask portion 5 is wet-etched to leave the base portion 8 of the second nitride semiconductor portion NS2 connected only to the underlying portion 4, and then the second nitride semiconductor portion NS2 can be mechanically separated from the template substrate TS using a temporary support member TM. The temporary support member TM may be an adhesive tape (for example, an adhesive dicing tape used when dicing a semiconductor wafer) or the like. The specific form of the temporary support member TM is not particularly limited.

[0108] Adjacent second nitride semiconductor portions NS2 on the template substrate TS may be separated by a single temporary support member TM. Alternatively, a single temporary support member TM may be used to selectively separate some of the second nitride semiconductor portions NS2 on the template substrate TS. For example, the second nitride semiconductor portions NS2 may be temporarily bonded to the temporary support member TM so as to straddle the second nitride semiconductor portions NS2, for example, every two or three second nitride semiconductor portions NS2.

[0109] Without being limited to this, the second nitride semiconductor portion NS2 may be bonded to the temporary support member TM using solder, or may be peeled off using an adhesive stamp made of a flexible material such as adhesive material or silicone elastomer polydimethylsiloxane (PDMS).

[0110] 17 is a cross-sectional view showing an example of a second partial process of the manufacturing method of the light-emitting element in Example 1. As shown in Fig. 12 and Fig. 17, the second partial process S200 includes a step S210 of preparing a main substrate MS and a step S220 of forming a first nitride semiconductor portion NS1.

[0111] The main substrate MS may be made of any one of silicon carbide (SiC), sapphire, and GaN. However, without being limited thereto, in Example 1, the main substrate MS may be made of any material and have any plane orientation that allows the first nitride semiconductor portion NS1 to be formed by m-plane growth. From the viewpoint of excellent thermal conductivity, a SiC substrate may be used for the main substrate MS. The main substrate MS may also be a light-shielding substrate (e.g., a silicon substrate). The main substrate MS may be a base substrate in which a (11-22)-plane GaN-based semiconductor layer is formed on a sapphire substrate, or a base substrate in which a (20-21)-plane GaN-based semiconductor layer is formed on a sapphire substrate. For example, a grooved sapphire substrate may be used as the main substrate MS, and a nonpolar (m-plane) GaN layer may be formed on the main substrate MS. A sapphire substrate may be less expensive than a nonpolar SiC substrate.

[0112] Then, the first nitride semiconductor portion NS1 is formed on the main substrate MS. The first nitride semiconductor portion NS1 may be formed on the main substrate MS via an underlying portion (e.g., a GaN layer). As shown in the above-mentioned FIG. 11 , by stacking 20 to 40 pairs of PFs each including AlN in the first refraction portion R1 and GaN in the second refraction portion R2, it is possible to form an epitaxial DBR with high reflectivity (e.g., 96% or more) and high thermal conductivity.

[0113] As described above, the first nitride semiconductor portion NS1 has a first face SF1 perpendicular to the first crystal orientation CO1 on the surface opposite to the main substrate MS. The first nitride semiconductor portion NS1 only needs to have birefringence with respect to light traveling in the direction of the first crystal orientation CO1, and the specific configuration of the first nitride semiconductor portion NS1 is not necessarily limited. The first nitride semiconductor portion NS1 may also be, for example, an epitaxial DBR of a lattice-matched system such as AlInN (first refraction portion R1) / GaN (second refraction portion R2).

[0114] The epitaxial DBR may be formed using the MOCVD method, or may be formed using the RPCVD method or sputtering method (PSD method, etc.) that allows low-temperature film formation. By using a low-temperature film formation method such as the RPCVD method or PSD method, the temperature difference between during and after film formation is small, making it possible to suppress cracks caused by the difference in thermal expansion coefficient between the main substrate MS and the epitaxial DBR.

[0115] In Example 1, an epitaxial DBR was formed by stacking 30 pairs of AlN (first refraction portion R1) / GaN (second refraction portion R2) on a 4H—SiC substrate by MOVPE at a growth temperature of 1040° C. and a growth pressure of 50 Torr. The designed peak wavelength of the DBR was 400 nm, and the optical film thickness of the GaN in each pair was λ / 4. This enabled the production of a first nitride semiconductor portion NS1 with a high optical reflectance of approximately 99%. The first nitride semiconductor portion NS1 can function as a lower reflective layer of a VCSEL.

[0116] Unlike the example shown in FIG. 11 , the top of the first nitride semiconductor portion NS1 may be the first refractive portion R1 (e.g., AlN). The refractive material of the first refractive portion R1 may be AlN, AlInN, or InN. The second refractive portion R2 includes a GaN-based semiconductor (e.g., GaN). The refractive material of the first refractive portion R1 may have a different lattice constant from the GaN-based semiconductor of the second refractive portion R2. The refractive material of the first refractive portion R1 (e.g., AlN) may have a smaller lattice constant than the GaN-based semiconductor (e.g., GaN) of the second refractive portion R2. Regarding the thermal expansion coefficient, the main material (e.g., SiC, Si) of the main substrate MS may be smaller than the GaN-based semiconductor (e.g., GaN) of the second refractive portion R2 than the refractive material (e.g., AlN) of the first refractive portion R1.

[0117] 18 is a process cross-sectional view showing an example of a third partial process of the manufacturing method of the light-emitting device in Example 1. As shown in Fig. 14 and Fig. 18 , the third partial process S300 includes a step S310 of bonding the first face SF1 of the first nitride semiconductor portion NS1 and the second face SF2 of the second nitride semiconductor portion NS2 together, a step S320 of forming an insulating film (current confinement layer) KF, a step S330 of forming the anode EA, the cathode EC, and the upper reflective layer RL2, and a step S340 of singulating into a plurality of light-emitting elements 30.

[0118] <Bonding> First, the back surface of the base portion 8 in the second nitride semiconductor portion NS2 temporarily supported by the temporary support member TM is planarized by polishing or CMP (Chemical Mechanical Polishing). The polishing may be, for example, lapping polishing or buffing. In this case, the abrasive may contain, for example, colloidal silica, an oxidizing agent, or a mixture of these. As a polishing technique, a polishing method called CARE (Catalyst Surface Referred Etching) may be used. This allows the RMS of the back surface of the base portion 8 corresponding to the second surface SF2 in the second nitride semiconductor portion NS2 to be, for example, 0.5 nm or less.

[0119] As described above, the base portion 8 is formed by the ELO method, and the back surface of the base portion 8 is a surface separated from the template substrate TS, and therefore has high flatness. By using the ELO method, it is possible to increase the flatness of the back surface of the base portion 8 and also to facilitate separation from the template substrate TS. If the back surface of the base portion 8 is sufficiently flat, the above-described flattening process may be unnecessary.

[0120] Furthermore, the surface of the first nitride semiconductor portion NS1 located on the main substrate MS may also be subjected to a planarization process, as necessary, by polishing, CMP, or the like. This allows the RMS of the surface (first surface SF1) of the first nitride semiconductor portion NS1 to be set to, for example, 0.5 nm or less.

[0121] Then, in Example 1, the first face SF1 of the first nitride semiconductor portion NS1 and the second face SF2 of the second nitride semiconductor portion NS2 are bonded together in a crystal orientation relationship in which the c-axis direction of the first nitride semiconductor portion NS1 and the m'-axis direction of the second nitride semiconductor portion NS2 are parallel to each other. This bonds the first nitride semiconductor portion NS1, which is an m-plane DBR, to the second nitride semiconductor portion NS2, which is a c-plane ELO layer. Then, the second nitride semiconductor portion NS2 is separated from the temporary support member TM, and multiple second nitride semiconductor portions NS2 are transferred onto the first nitride semiconductor portion NS1.

[0122] For example, the first face SF1 and the second face SF2 can be directly bonded by surface activated bonding. Specifically, the first face SF1 and the second face SF2 are each plasma-treated in a vacuum. This makes it possible to clean and activate the surfaces (leading to the presence of dangling bonds on the surfaces). Thereafter, the first face SF1 and the second face SF2 are brought into contact with each other, thereby enabling surface activated bonding of the first nitride semiconductor portion NS1 and the second nitride semiconductor portion NS2. Heat or pressure may be applied during the direct bonding. In Example 1, the bonding portion BP may be an amorphous layer.

[0123] <Formation of Upper Structure> Next, an insulating film KF is formed above the upper layer portion 9 so as to have an aperture portion AP (current confinement portion). The material of the insulating film KF is not particularly limited, and for example, SiOx, SiNx, AlOx, etc. can be used. In Example 1, the insulating film KF was formed in two locations per single second nitride semiconductor portion NS2. Specifically, one insulating film KF was formed above each of the two wing portions F of the base portion 8 (see FIG. 10 ).

[0124] The anode EA is formed so as to contact the upper layer portion 9 in the aperture portion AP of the insulating film KF, and the cathode EC is formed on the base portion 8 (see FIGS. 9 and 10). The constituent material of the cathode EC is not particularly limited. The anode EA and the cathode EC may be aligned in the Y direction (see FIG. 10).

[0125] The anode EA overlaps, in plan view, the wing portions F of the base portion 8. The anode EA overlaps, in plan view, the light emitting portion LP of the upper layer portion 9. In the light emitting element 30, light traveling back and forth between the first nitride semiconductor portion NS1 and the upper reflective layer RL2 passes through the anode EA.

[0126] The anode EA is formed of a transparent conductive material having optical transparency. Examples of the transparent conductive material include indium tin oxide (crystalline ITO, amorphous ITO, Sn-doped In ２ O ３ Indium Zinc Oxide (IZO), IFO (F-doped In ２ O ３ ), tin oxide (SnO ２ , Sb-doped SnO ２ , F-doped SnO ２ and zinc oxide (including ZnO, Al-doped ZnO, and B-doped ZnO).

[0127] The anode EA may contain at least one of Ga (gallium) oxide, Ti (titanium) oxide, Nb (niobium) oxide, and Ni (nickel) oxide. The aperture diameter of the anode EA (the diameter of the current injection region in contact with the p-type semiconductor portion) can be, for example, 2 μm or more and 100 μm or less.

[0128] Next, an upper reflective layer RL2 is formed above the anode EA, thereby forming a light emitting substrate 40 having a plurality of light emitting elements 30. Example 1 shows an example in which two light emitting elements 30 are formed for each of a plurality of second nitride semiconductor portions NS2 arranged on the first nitride semiconductor portion NS1.

[0129] In Example 1, the upper reflective layer RL2 may be, for example, an amorphous dielectric. Also, in Example 1, the upper reflective layer RL2 may be, for example, a stacked structure of crystalline layers such as SiN, and in this case, the crystal orientation of each crystal is not particularly limited. For example, as shown in FIG. 11, the upper reflective layer RL2 may be a DBR in which third refraction portions R3 and fourth refraction portions R4 are alternately stacked. The third refraction portion R3 may be, for example, a SiO ２The fourth refraction portion R4 is a layer containing a material having a higher refractive index than the third refraction portion R3, for example, Ta. ２ O ５ , HfO ２ , ZrO ２ , TiO ２ , Al ２ O ３ , Nb ２ O ５ , ZnO, AlN, SiN, MgO, etc. Light incident on the interface between the third refraction portion R3 and the fourth refraction portion R4 at an angle equal to or greater than the critical angle is totally reflected at this interface, and therefore the upper reflective layer RL2 achieves a high light reflectance (for example, 96% or more).

[0130] In the light-emitting element 30, the first nitride semiconductor portion NS1 has a higher reflectivity than the upper reflective layer RL2 for the emission wavelength of the light-emitting portion LP. The first nitride semiconductor portion NS1 may have a reflectivity of approximately 100%, for example, approximately 99%. As a result, light traveling back and forth between the first nitride semiconductor portion NS1 and the upper reflective layer RL2 is emitted as laser light LB mainly from the upper surface of the upper reflective layer RL2 (the portion overlapping with the aperture portion AP in plan view).

[0131] The light-emitting element 30 is not limited to a configuration in which the laser light LB is emitted from the upper reflective layer RL2 side. If the main substrate MS is not light-transmitting, the light-emitting element 30 may be configured to emit the laser light LB from the main substrate MS side (in other words, the first nitride semiconductor portion NS1 side), or may be configured to emit the laser light LB from both the main substrate MS side and the upper reflective layer RL2 side.

[0132] <Singulation> Fig. 19 is a plan view showing the singulated light-emitting substrate in Example 1. As shown in Fig. 19, the light-emitting substrate 40 in Fig. 18 may be singulated to form a plurality of light-emitting substrates 40, each including two light-emitting elements 30. In Example 1, the light-emitting substrate 40 may also include four or more light-emitting elements 30.

[0133] [Another Configuration Example] (a) In another configuration example of Example 1, the template substrate TS used in the step S100 above may further be configured as follows. That is, in the template substrate TS, the seed region SA may be a region that serves as a starting point for the growth of the semiconductor portion 8N. The template substrate TS may have both the seed region SA and the growth inhibition region DA above the main substrate 1. The template substrate TS may not have, for example, a mask portion 5. The template substrate TS may have an underlayer containing an underlayer material located above the main substrate 1, and may have, on the surface of the underlayer, a growth inhibition region DA where the underlayer material is modified and a seed region SA where the underlayer material is not modified. The underlayer material may be AlScN, ScN, ZnO, CrN, or the like, containing a different material (e.g., a metal element other than Group III) such as Sc (scandium), Zn, or Cr. The underlayer may have a single-layer structure or a multilayer structure. It may also have a multilayer structure including a periodic structure. Using such a template substrate TS, the semiconductor portion 8N can be formed by the ELO method.

[0134] (b) In another configuration example of Example 1, in the step S120 (see FIG. 12 ), a gap may be formed between the wing portion F and the mask portion 5, which is the growth inhibition region DA. For example, the seed region SA may be located above the growth inhibition region DA in the thickness direction of the template substrate TS. This makes it easier to improve the flatness of the back surface of the wing portion F.

[0135] (c) In another configuration example of Example 1, in the step S120 (see FIG. 12 ), the semiconductor portions 8N that have grown laterally in opposite directions from each of two adjacent openings K may come into contact (meet) with each other on the mask portion 5. In this case, by removing the met portions, a plurality of bar-shaped semiconductor portions 8N or island-shaped base portions 8 as shown in FIG.

[0136] (d) FIG. 20 is a plan view showing an example of a first partial process of a method for manufacturing a light-emitting device according to another configuration example of Example 1. As shown in FIG. 20 , in this configuration example of Example 1, trenches TR extending in the Y direction may be formed so as to remove the base B that overlaps with the opening K in a plan view. The rear surfaces of the wing portions F of the base portion 8 and the mask portion 5 are weakly bonded to each other, for example, by van der Waals forces. Then, in the step S150 (see FIG. 12 ), the second nitride semiconductor portion NS2 may be separated by the temporary support member TM without removing the mask portion 5. After forming the multiple trenches TR, an anchor film may be formed in contact with the side surface of the base portion 8 and the mask portion 5. The anchor film may be, for example, a dielectric film.

[0137] (e) Figure 21 is a process cross-sectional view showing an example of a third partial process in the manufacturing method of a light-emitting device in another configuration example of Example 1. As shown in Figure 21, in the above-mentioned step S310 (see Figure 12), for example, a light-transmitting bonding material BM may be formed on the first nitride semiconductor portion NS1, and the first surface SF1 and the second surface SF2 may be bonded via the bonding material BM. In this case, the bonding portion BP may be a transparent adhesive layer (medium layer) made of the bonding material BM. As the bonding material BM, for example, a transparent dielectric film can be used, and a specific example is silicon oxide (SiO ２ By setting the optical film thickness of the transparent adhesive layer to λ / 4, the junction portion BP can also be used as a part of the first nitride semiconductor portion NS1.

[0138] (f) FIG. 22 is a cross-sectional view showing another example of the configuration of the light-emitting element 30 in Example 1. In the example shown in FIG. 11 , an aperture portion AP is provided in the insulating film KF, but this is not limited thereto. As shown in the example shown in FIG. 22 , a ring-shaped high-resistance portion HR (a region with a low p-type doping concentration) may be provided in the p-type semiconductor layer 9B, and the inside of the high-resistance portion HR may be the aperture portion AP (current confinement portion) (a configuration in which the high-resistance portion HR surrounds the aperture portion AP). The aperture portion AP may also be formed by implanting Al (aluminum) or Fe (iron) into the p-type semiconductor layer 9B. Furthermore, to provide the aperture portion AP with a light confinement effect due to the refractive index difference, the periphery of the aperture may be recessed to create a refractive index difference between the aperture portion AP and its surroundings (e.g., the refractive index of the surroundings may be made smaller than that of the aperture portion AP).

[0139] (g) Figure 23 is a cross-sectional view showing steps in one example of a method for manufacturing a light-emitting element in another configuration example of Example 1. In the example shown in Figure 18 etc., the first nitride semiconductor portion NS1 is formed continuously on the surface of the main substrate MS, but this is not limiting. As shown in Figure 23, the first nitride semiconductor portion NS1 may be locally positioned on the main substrate MS so as to be arranged two-dimensionally in a plan view.

[0140] (h) In the method for manufacturing a light-emitting element according to another configuration example of Example 1, in the first partial process S100 (see FIG. 12 ), the upper layer portions 9 may be formed on the plurality of bar-shaped semiconductor portions 8N without performing the process of S130. The strip-shaped semiconductor portion including the semiconductor portions 8N and the upper layer portions 9 may be divided on the template substrate TS to form the plurality of second nitride semiconductor portions NS2. Alternatively, the strip-shaped semiconductor portion may be separated from the template substrate TS using, for example, a temporary support member TM, and then the strip-shaped semiconductor portion may be divided on the temporary support member TM to form the plurality of second nitride semiconductor portions NS2. The division may be performed by cleaving the strip-shaped semiconductor portion.

[0141] (i) As described above, the present disclosure relates to a novel finding for controlling the polarization direction of laser light LB emitted from the light-emitting element 30 in the c-plane direction of the light-emitting portion LP. Conventionally, techniques have been proposed for controlling the polarization direction, such as utilizing asymmetric resonance or anisotropy of optical gain. These techniques can be combined with the technology of the present disclosure to further facilitate control of the polarization direction of laser light LB. The effect of the birefringence characteristics (difference in polarized reflectance) of the first nitride semiconductor portion NS1 or the upper reflective layer RL2 in the present disclosure can be enhanced by combining the above techniques.

[0142] For example, the light-emitting element 30 may have an asymmetric resonator shape by forming an asymmetric aperture, an asymmetric mesa, or the like, so as to correspond to the birefringence characteristics (directions with relatively high polarized reflectance) of the first nitride semiconductor portion NS1 or the upper reflective layer RL2. Alternatively, the light-emitting element 30 may be formed by bonding the second nitride semiconductor portion NS2 formed using a high-index substrate (e.g., a c-plane off-substrate or a nonpolar plane) to the first nitride semiconductor portion NS1 so as to correspond to the birefringence characteristics of the first nitride semiconductor portion NS1 or the upper reflective layer RL2. This makes it easier to control the polarization direction of the laser light LB.

[0143] Furthermore, for example, the light-emitting element 30 may have an anisotropic strain in the light-emitting portion LP. This anisotropic strain will be described in detail below with reference to Fig. 24. Fig. 24 is a schematic diagram for explaining a light-emitting element in another configuration example of Example 1.

[0144] In the light-emitting element 30, strain normally occurs in the light-emitting portion LP due to differences in the thermal expansion coefficients between the base portion 8 and the upper layer portion 9, lattice mismatch, etc. However, since such strain is isotropic in the c-plane and the symmetry of the crystal is maintained, it does not have a significant effect on the polarization direction of the light emitted from the light-emitting portion LP. In contrast, for example, when a crystal is formed in a stripe shape by the ELO method, uniaxial stress may occur in the stripe direction, and in this case, in-plane anisotropic strain may occur in the light-emitting portion LP formed by c-plane growth. Specific examples are described below.

[0145] In one configuration example of the present disclosure, as shown by reference numeral 2401 in FIG. 24 , a semiconductor portion 8N is formed on a template substrate TS by the ELO method, and an upper layer portion 9 is formed on the semiconductor portion 8N. The semiconductor portion 8N is formed by growing laterally in the a'-axis direction, starting from a seed region SA exposed from an opening K in the mask pattern 6, with the m'-axis direction as the longitudinal direction. The semiconductor portion 8N may be divided into base portions 8. When the base substrate BS in the template substrate TS is a heterogeneous substrate, the following state may occur.

[0146] That is, for example, if the base substrate BS includes a silicon substrate, when a semiconductor substrate on which a semiconductor portion 8N is formed under high-temperature conditions is cooled to room temperature, the semiconductor portion 8N and the base substrate BS shrink as the temperature decreases, but the semiconductor portion 8N shrinks to a greater extent than the base substrate BS. Therefore, tensile strain occurs in the semiconductor portion 8N in the longitudinal direction (stripe direction) and compressive strain occurs in the lateral direction. Furthermore, the light emitting portion LP formed above the semiconductor portion 8N generally contains a material with a lattice constant larger than that of the semiconductor portion 8N, so compressive strain occurs in the light emitting portion LP. Here, if the base layer above the semiconductor portion 8N, which serves as the base for growing the light emitting portion LP during the film formation process, has anisotropic strain, and the light emitting portion LP grows in alignment with this base layer, compressive strain of different magnitudes occurs in the longitudinal and lateral directions of the light emitting portion LP (the compressive strain in the longitudinal direction is smaller than that in the lateral direction). By generating anisotropic distortion in the light emitting portion LP in this way, light emitted in the planar direction from the light emitting portion LP can have a specific polarization direction.

[0147] In the example shown in Figure 24, the longitudinal direction of the semiconductor portion 8N is the m'-axis direction, and in this case, the polarization direction of the light emitted from the light emitting portion LP is the a'-axis direction. Experiments have confirmed that light emitted from the light emitting portion LP in a compressively strained state has polarization characteristics in which the intensity in the a'-axis direction is greater than the intensity in the m'-axis direction. Whether compressive strain or tensile strain occurs in the light emitting portion LP is determined according to the relationship between the thermal expansion coefficients, lattice constants, etc. of the materials of the base substrate BS, the semiconductor portion 8N, and the upper layer portion 9. By generating in-plane anisotropic strain in the c-plane, light having a specific polarization direction in the plane direction can be emitted from the light emitting portion LP.

[0148] 24 schematically shows the first nitride semiconductor portion NS1, the second nitride semiconductor portion NS2, and the upper reflective layer RL2 of the light emitting element 30. The second nitride semiconductor portion NS2 is bonded to the first nitride semiconductor portion NS1 so that the a-axis direction of the first nitride semiconductor portion NS1 and the a'-axis direction of the second nitride semiconductor portion NS2 are aligned.

[0149] Light whose polarization direction is in the a'-axis direction is emitted from the second nitride semiconductor portion NS2 toward the first nitride semiconductor portion NS1 and the upper reflective layer RL2. The first nitride semiconductor portion NS1 has birefringence characteristics in which the polarized reflectance in the a-axis direction is relatively higher than the polarized reflectance in other directions, so that the polarization ratio of light reflected from the first surface SF1 can be increased compared to the polarization ratio of light incident on the first nitride semiconductor portion NS1. The first surface SF1 and the second surface SF2 of the light-emitting element 30 may be bonded together such that the angle between the specific polarization direction of the light reflected from the first surface SF1 of the first nitride semiconductor portion NS1 and the a'-axis direction of the second nitride semiconductor portion NS2 is less than 5°. This makes it easier to further increase the polarization ratio of the specific polarization direction of the laser light LB emitted from the light-emitting element 30.

[0150] 24 shows the semiconductor portion 8N and upper layer portion 9 extending in a single stripe shape, but as described above, multiple semiconductor portions 8N and upper layer portions 9 can be formed on the template substrate TS. A set of the semiconductor portion 8N and upper layer portion 9 is referred to as a strip-shaped semiconductor portion. A semiconductor substrate according to one aspect of the present disclosure includes a template substrate TS including a seed region SA and a growth inhibition region DA, and multiple strip-shaped semiconductor portions positioned above the template substrate TS. The multiple strip-shaped semiconductor portions are aligned in a first direction, and each strip-shaped semiconductor portion has a light-emitting portion (light-emitting layer) LP including a c-plane nitride semiconductor. The light-emitting portion LP has anisotropic strain and emits polarized light polarized in the first direction. A c-plane nitride semiconductor refers to a nitride semiconductor formed by c-plane deposition.

[0151] In this way, a light-emitting element that emits polarized light can be obtained from each semiconductor strip. This polarized light may be laser light. The first direction may be the a'-axis direction of a nitride semiconductor (e.g., a GaN-based semiconductor). Each semiconductor strip may be cleaved (e.g., m-plane cleavage) to obtain a plurality of light-emitting elements.

[0152] (j) In another configuration example of the first embodiment, the first surface SF1 may be the a-plane or another nonpolar plane. For example, the (11-20) plane of GaN can be grown on the r-plane ((1-102) plane) of a sapphire substrate. GaN films with various nonpolar planes can be formed using a grooved sapphire substrate.

[0153] (k) In one configuration example of the present disclosure, the light-emitting element 30 may be an RCLED. In this case, the light emitted from the light-emitting element 30 in the planar direction has a specific polarization direction, and the polarization ratio thereof may be smaller than the polarization ratio of the specific polarization direction of the laser light LB described above. The light emitted from the light-emitting element 30 that is an RCLED may have a polarization ratio corresponding to the polarization reflectance difference of the first nitride semiconductor portion NS1 at the emission wavelength of the light emitted from the light-emitting portion LP.

[0154] 25 is a plan view schematically showing the configuration of a laser device including a light-emitting element in Example 2. FIG. 26 is a cross-sectional view schematically showing the configuration of a laser device including a light-emitting element in Example 2.

[0155] As shown in FIGS. 25 and 26 , a laser element 60 in Example 2 includes the light-emitting element 30 shown in FIGS. 8 to 10 . In one example, the laser element 60 is obtained by mounting a plurality of light-emitting elements 30 on a circuit board CB. The laser element 60 emits laser light LB in the thickness direction of the second nitride semiconductor portion NS2. In the laser element 60, the laser light LB has a specific polarization direction. The specific polarization direction is, for example, the a-axis direction in the first nitride semiconductor portion NS1. In the laser element 60, as described above, the first nitride semiconductor portion NS1 has birefringence characteristics with respect to light of a specific emission wavelength from the light-emitting portion LP of the second nitride semiconductor portion NS2. As a result, light of a specific wavelength and a specific polarization direction resonates in the laser element 60.

[0156] The specific method for mounting the light-emitting element 30 on the circuit board CB is not particularly limited, and known techniques can be used. In the example shown in Figure 25, the circuit board CB may have a base portion BD and a first pad portion P1 and a second pad portion P2 located above the base portion BD. A first conductive film MF1 may be provided to electrically connect the first pad portion P1 and the anode EA to each other. In addition, a second conductive film MF2 may be provided to electrically connect the second pad portion P2 and the cathode EC to each other.

[0157] The laser element 60 may have a gap SP between the light emitting element 30 and the base portion BD.

[0158] A pad (first pad) in contact with the anode EA may be formed, in which case the first pad and the first conductive film MF1 may be electrically connected. The first pad may have a single-layer structure or a multi-layer structure containing at least one of Au, Ag, Pd, Pt, Ni, Ti, V, W, Cr, Al, Cu, Zn, Sn, and In, for example.

[0159] 27 is a schematic diagram showing the configuration of an electronic device in Example 3. The electronic device 70 in Fig. 27 includes a light-emitting element 30 and a control unit 80 including a processor that controls the light-emitting element 30. Examples of the electronic device 70 include a communication device, an optical device, a display device, a lighting device, a sensor device, an information processing device, a medical device, and an electric vehicle (EV).

[0160] [Additional Notes] The invention according to the present disclosure has been described above based on the drawings and examples. However, the invention according to the present disclosure is not limited to the above-described embodiments and examples. In other words, the invention according to the present disclosure can be modified in various ways within the scope of the present disclosure, and embodiments obtained by appropriately combining the technical means disclosed in different embodiments and examples are also included in the technical scope of the invention according to the present disclosure. In other words, it should be noted that a person skilled in the art can easily make various modifications or corrections based on the present disclosure. It should also be noted that these modifications or corrections are included in the scope of the present disclosure.

[0161] [Summary] The light-emitting element in aspect 1 of the present disclosure comprises a first nitride semiconductor part having a first surface perpendicular to a first crystal orientation, a second nitride semiconductor part having a second surface perpendicular to a second crystal orientation different from the first crystal orientation and a light-emitting layer located above the second surface, and located above the first surface.

[0162] A light-emitting element according to a second aspect of the present disclosure is the light-emitting element according to the first aspect, wherein the first surface and the second surface are bonded together.

[0163] A light-emitting device according to a third aspect of the present disclosure is the light-emitting device according to the first or second aspect, wherein the first nitride semiconductor section has birefringence with respect to light traveling in the first crystal orientation.

[0164] A light-emitting device according to a fourth aspect of the present disclosure is any one of the first to third aspects, wherein the second nitride semiconductor section does not have birefringence for light traveling in the second crystal orientation.

[0165] A light-emitting element according to aspect 5 of the present disclosure is any one of aspects 1 to 4, wherein light traveling from the first surface to the second surface has a specific polarization direction with respect to the first crystal orientation.

[0166] A sixth aspect of the present disclosure provides a light-emitting device according to any one of the first to fifth aspects, wherein the light traveling from the first surface to the second surface has a polarization ratio of more than 50%.

[0167] A seventh aspect of the present disclosure provides a light-emitting device according to any one of the first to sixth aspects, wherein the first surface is a semi-polar surface or a non-polar surface.

[0168] In an eighth aspect of the present disclosure, in any one of the first to seventh aspects, the first surface is an m-plane or an a-plane.

[0169] The light-emitting element in aspect 9 of the present disclosure is, in any one of aspects 1 to 8, wherein light traveling from the first surface to the second surface has a specific polarization direction with respect to the first crystal orientation, the first crystal orientation being the m-axis direction, and the specific polarization direction being the a-axis direction.

[0170] The light-emitting element in aspect 10 of the present disclosure is any one of aspects 1 to 9, wherein the light traveling from the first surface to the second surface has a specific polarization direction with respect to the first crystal orientation, and the first surface and the second surface are bonded together so that the angle between the specific polarization direction and the a-axis direction of the second nitride semiconductor portion is less than 5°.

[0171] In an eleventh aspect of the present disclosure, in the light-emitting device of any one of the first to tenth aspects, the second surface is a polar surface.

[0172] A twelfth aspect of the present disclosure provides the light-emitting device according to any one of the first to eleventh aspects, wherein the second surface is a −c-plane.

[0173] A thirteenth aspect of the present disclosure provides the light-emitting device according to any one of the first to twelfth aspects, wherein the light-emitting layer is a GaN-based semiconductor layer having a c-plane parallel to the second surface.

[0174] A fourteenth aspect of the present disclosure provides a light-emitting device according to any one of the first to thirteenth aspects, wherein the first nitride semiconductor portion is a lower reflective layer.

[0175] A light-emitting device according to a fifteenth aspect of the present disclosure is the light-emitting device according to any one of the first to fourteenth aspects, further comprising an upper reflective layer above the light-emitting layer.

[0176] A light-emitting element according to a sixteenth aspect of the present disclosure is any one of the first to fifteenth aspects, and includes a main substrate made of one of silicon carbide, sapphire, and GaN, and the first nitride semiconductor portion is located on the main substrate.

[0177] A seventeenth aspect of the present disclosure provides a light-emitting element according to any one of the first to sixteenth aspects, wherein the first surface and the second surface are directly bonded to each other.

[0178] The light-emitting device according to Aspect 18 of the present disclosure is the light-emitting device according to any one of Aspects 1 to 17, further comprising a transition layer between the first surface and the second surface.

[0179] A nineteenth aspect of the present disclosure provides a light-emitting element according to any one of the first to eighteenth aspects, wherein the first surface and the second surface are bonded together via a light-transmitting bonding material.

[0180] A twenty-first aspect of the present disclosure provides a light-emitting device according to any one of the first to nineteenth aspects, wherein the first nitride semiconductor section and the second nitride semiconductor section each include a GaN-based semiconductor.

[0181] A twenty-first aspect of the present disclosure provides a light-emitting device according to any one of the first to twentieth aspects, wherein the first nitride semiconductor layer is a lower reflective layer, and the lower reflective layer is a DBR having birefringence characteristics.

[0182] A light-emitting device according to aspect 22 of the present disclosure is any one of aspects 1 to 21, wherein the first nitride semiconductor layer is a lower reflective layer, and the lower reflective layer includes a plurality of nitride crystal layers having different refractive indices.

[0183] A twenty-third aspect of the present disclosure provides a light-emitting device according to any one of the first to twenty-second aspects, wherein the second nitride semiconductor portion includes a c-plane GaN-based semiconductor layer.

[0184] A twenty-fourth aspect of the present disclosure provides a light-emitting element according to any one of the first to twenty-third aspects, wherein the RMS of each of the first surface and the second surface is 0.5 nm or less.

[0185] A twenty-fifth aspect of the present disclosure provides the light-emitting device of any one of the first to twenty-fourth aspects, wherein the first surface and the second surface are each made of the same nitride semiconductor.

[0186] In a twenty-sixth aspect of the present disclosure, the light-emitting element is any one of the first to twenty-five aspects, further comprising an upper reflective layer above the light-emitting layer, the upper reflective layer being a DBR including a plurality of dielectric layers.

[0187] The light-emitting element in aspect 27 of the present disclosure is any one of aspects 1 to 26, wherein the second nitride semiconductor portion includes a base portion located below the light-emitting layer, and the base portion has a base portion and a pair of wing portions extending on both sides from the base portion.

[0188] In a twenty-eighth aspect of the present disclosure, in the light-emitting element of the twenty-seventh aspect, the light-emitting layer and the wing portion overlap each other in plan view.

[0189] A light-emitting element according to a twenty-ninth aspect of the present disclosure is the light-emitting element according to the twenty-seventh or twenty-eighth aspect, further comprising an anode, and the anode and the wing portions overlap in plan view.

[0190] A laser device according to a 30th aspect of the present disclosure includes the light-emitting device according to any one of the 1st to 29th aspects.

[0191] A laser element according to aspect 31 of the present disclosure is the laser element according to aspect 30, which emits laser light in the thickness direction of the second nitride semiconductor portion.

[0192] A laser element according to aspect 32 of the present disclosure is the same as that according to aspect 31, wherein the laser light has a specific polarization direction.

[0193] In the laser element of Aspect 33 of the present disclosure, in Aspect 32, light having a specific wavelength and a specific polarization direction resonates.

[0194] An electronic device according to a thirty-fourth aspect of the present disclosure includes the light-emitting device according to any one of the first to twenty-ninth aspects.

[0195] In aspect 35 of the present disclosure, the semiconductor substrate comprises a template substrate including a seed region and a growth inhibition region, and a plurality of strip-shaped semiconductor portions located above the template substrate, the plurality of strip-shaped semiconductor portions being aligned in a first direction, and each strip-shaped semiconductor portion having a light-emitting layer including a c-plane nitride semiconductor, the light-emitting layer having anisotropic strain and emitting polarized light with the first direction as its polarization direction.

[0196] A method for manufacturing a light-emitting element in aspect 36 of the present disclosure includes the steps of forming a first nitride semiconductor part having a first surface perpendicular to a first crystal orientation, forming a second nitride semiconductor part having a second surface perpendicular to a second crystal orientation different from the first crystal orientation and a light-emitting layer located above the second surface, and bonding the first surface and the second surface.

[0197] The method for manufacturing a light-emitting element in aspect 37 of the present disclosure is, in aspect 36, to grow the first nitride semiconductor portion as a crystal on a main substrate, peel off the second nitride semiconductor portion that has been grown as a crystal on a template substrate including a seed region and a growth suppression region, and bond the second surface of the peeled second nitride semiconductor portion to the first surface of the first nitride semiconductor portion.

[0198] A thirty-eighth aspect of the present disclosure provides a method for manufacturing a light-emitting element according to the thirty-seventh aspect, wherein the first surface and the second surface are bonded together by at least one of heating and applying pressure.

[0199] In a thirty-ninth aspect of the present disclosure, in the manufacturing method of the light-emitting element in the thirty-seventh aspect, the first surface and the second surface are bonded together via a light-transmitting bonding material.

[0200] The light-emitting element manufacturing apparatus according to aspect 40 of the present disclosure performs each step included in the light-emitting element manufacturing method according to any one of aspects 36 to 39.

[0201] 8 Base portion 9 Upper layer portion 30 Light emitting element BP Junction portion CO1 First crystal orientation CO2 Second crystal orientation EA Anode EC Cathode LB Laser light LP Light emitting portion NS1 First nitride semiconductor portion NS2 Second nitride semiconductor portion RL2 Upper reflective layer SF1 First surface SF2 Second surface

Claims

1. a first nitride semiconductor portion having a first surface perpendicular to a first crystal orientation; a second nitride semiconductor portion located above the first surface, the second surface being perpendicular to a second crystal orientation different from the first crystal orientation and having a light-emitting layer located above the second surface.

2. The light-emitting device of claim 1 , wherein the first surface and the second surface are bonded together.

3. The light-emitting device according to claim 1 , wherein the first nitride semiconductor portion has birefringence with respect to light traveling in the first crystal orientation.

4. The light-emitting device according to claim 1 , wherein the second nitride semiconductor portion does not have birefringence for light traveling in the second crystal orientation.

5. The light-emitting element according to claim 1 , wherein light traveling from the first surface to the second surface has a specific polarization direction with respect to the first crystal orientation.

6. The light-emitting device of claim 1 , wherein light traveling from the first surface to the second surface has a polarization ratio of greater than 50%.

7. The light-emitting device according to claim 1 , wherein the first surface is a semi-polar surface or a non-polar surface.

8. The light-emitting device according to claim 1 , wherein the first surface is an m-plane or an a-plane.

9. the first crystal orientation is the m-axis direction, The light-emitting element according to claim 5 , wherein the specific polarization direction is the a-axis direction.

10. The light-emitting element according to claim 5 , wherein the first surface and the second surface are bonded together so that the angle between the specific polarization direction and the a-axis direction of the second nitride semiconductor portion is less than 5°.

11. The light-emitting device according to claim 1 , wherein the second surface is a polar surface.

12. 2. The light-emitting device according to claim 1, wherein the second surface is a −c-plane.

13. The light-emitting element according to claim 1 , wherein the light-emitting layer is a GaN-based semiconductor layer having a c-plane parallel to the second surface.

14. The light-emitting device according to claim 1 , wherein the first nitride semiconductor portion is a lower reflective layer.

15. The light-emitting device of claim 14 , further comprising an upper reflective layer above the light-emitting layer.

16. The light-emitting device of claim 1 including a transition layer between the first surface and the second surface.

17. The light-emitting element according to claim 1 , wherein the first surface and the second surface are bonded together via a light-transmitting bonding material.

18. The light-emitting device according to claim 1 , wherein the first nitride semiconductor portion and the second nitride semiconductor portion each include a GaN-based semiconductor.

19. a template substrate including a seed region and a growth inhibition region; and a plurality of strip-shaped semiconductor portions located above the template substrate; the plurality of strip-shaped semiconductor portions are aligned in a first direction, and each strip-shaped semiconductor portion has a light-emitting layer including a c-plane nitride semiconductor; The light-emitting layer has anisotropic strain and emits polarized light having a polarization direction in the first direction.

20. forming a first nitride semiconductor portion having a first surface perpendicular to a first crystal orientation; forming a second nitride semiconductor portion having a second surface perpendicular to a second crystal orientation different from the first crystal orientation and a light emitting layer located above the second surface; and bonding the first surface and the second surface together.