Power conversion device

Abstract

A power conversion device (10) comprises: a first power conversion part (5) that converts a DC voltage applied from first and second capacitor units (40, 42) into a three-phase AC voltage; a second power conversion part (6) that converts a single-phase AC voltage or a three-phase AC voltage into a DC voltage and applies the DC voltage to the first and second capacitor units (40, 42); a first parallel flat plate conductor (30) having three flat plate-like conductors to which a high potential, an intermediate potential, and a low potential are applied from the first capacitor unit (40); a second parallel flat plate conductor (32) having three flat plate-like conductors to which a high potential, an intermediate potential, and a low potential are applied from the second capacitor unit (42); and a third parallel flat plate conductor (34) disposed on the side opposite to the first and second capacitor units (40, 42) across the first and second parallel flat plate conductors (30, 32).

Description

Power Conversion Device

[0001] The present disclosure relates to a power conversion device including a first power conversion unit that converts a DC voltage applied from a shared capacitor group into a three-phase AC voltage, and a second power conversion unit that converts a single-phase AC voltage or a three-phase AC voltage into a DC voltage and applies it to the shared capacitor group.

[0002] In a power conversion device in which the first and second power conversion units are connected to a common capacitor group, the distances between the power semiconductor modules belonging to the first power conversion unit and the capacitors belonging to the common capacitor group vary, and the variation in distance causes variation in switching current between the power semiconductor modules, which in turn causes variation in switching loss.

[0003] Japanese Patent Application Laid-Open No. 2003-144222 discloses a technique for providing slits in parallel flat conductors for connecting a plurality of power semiconductor modules and a group of shared capacitors in order to suppress variations in switching current.

[0004] Japanese Patent Application Laid-Open No. 2000-60126

[0005] In the case of the technology of providing slits in parallel flat conductors, the effect of the slits depends on the lengths of the short and long sides of the slits, and the longer the lengths, the better. However, increasing the length of the slits in the short side direction requires increasing the distance between the first power conversion unit and the second power conversion unit, resulting in a problem of increased device size. Furthermore, increasing the length of the slits in the long side direction reduces the width of the parallel flat conductors remaining after providing the slits, resulting in a problem of weakening the mechanical strength of the parallel flat conductors. Therefore, in order to obtain the effect of the slits while maintaining mechanical strength, some kind of support member is required, which increases the device size.

[0006] The present disclosure has been made in view of the above, and aims to provide a power conversion device that can reduce variations in switching current while ensuring the mechanical strength of parallel plate conductors.

[0007] To solve the above-mentioned problems and achieve the object, a power conversion device according to the present disclosure includes first to third parallel plate conductors, first and second capacitor units, and first and second power conversion units. The first parallel plate conductor includes at least a first flat-plate high-potential conductor to which a high potential is applied and a first flat-plate low-potential conductor to which a low potential is applied. The first high-potential conductor and the first low-potential conductor are arranged in parallel. The first capacitor unit includes at least a capacitor electrically connected between the first high-potential conductor and the first low-potential conductor. The second parallel plate conductor includes at least a second flat-plate high-potential conductor to which a high potential is applied and a second flat-plate low-potential conductor to which a low potential is applied. The second high-potential conductor and the second low-potential conductor are arranged in parallel. The second capacitor unit includes at least a capacitor electrically connected between the second high-potential conductor and the second low-potential conductor. The first power conversion unit includes a plurality of first power semiconductor modules electrically connected to the first parallel plate conductor and converts a DC voltage applied from the first and second capacitor units into a three-phase AC voltage. The second power conversion unit includes a plurality of second power semiconductor modules electrically connected to the second parallel plate conductor and converts a single-phase AC voltage or a three-phase AC voltage into a DC voltage and applies it to the first and second capacitor units. The third parallel plate conductor includes at least a flat-plate-shaped third high-potential conductor electrically connected to the first and second high-potential conductors and a third low-potential conductor electrically connected to the first and second low-potential conductors. The third high-potential conductor and the third low-potential conductor are arranged in parallel. The third parallel plate conductor is arranged on the opposite side of the first and second parallel plate conductors from the first and second capacitor units.

[0008] The power conversion device according to the present disclosure has the advantage of being able to reduce variations in switching current while ensuring the mechanical strength of the parallel plate conductors.

[0009] 2 is a circuit diagram showing the configuration of a power conversion circuit having a power semiconductor module different from that of FIG. 1; FIG. 3 is a cross-sectional view showing the connection relationship between a first parallel plate conductor and a first capacitor and the connection relationship between the first parallel plate conductor and a second capacitor in the first embodiment; FIG. 4 is a cross-sectional view showing the connection relationship between a second parallel plate conductor and a third capacitor and the connection relationship between the second parallel plate conductor and a fourth capacitor in the first embodiment; FIG. 5 is an exploded perspective view showing the connection relationship between a third parallel plate conductor and a first parallel plate conductor and the connection relationship between the third parallel plate conductor and a second parallel plate conductor in the first embodiment;

[0010] Hereinafter, a power conversion device according to an embodiment of the present disclosure will be described in detail with reference to the accompanying drawings. In the following description, multiple components of the same type are denoted by reference characters with subscripts, but when describing these components without distinguishing between them, the subscripts will be omitted as appropriate.

[0011] Embodiment 1 Fig. 1 is a circuit diagram showing the configuration of a power conversion device 10 according to embodiment 1. The power conversion device 10 according to embodiment 1 includes a first power conversion unit 5 and a second power conversion unit 6. Fig. 1 shows a configuration in which the power conversion device 10 is applied to a propulsion control device for a railway vehicle.

[0012] The first power conversion unit 5 includes three power conversion circuits 8a, 8b, and 8c. Each power conversion circuit 8, i.e., one phase's worth, is composed of four switching elements and two diodes. That is, each of the power conversion circuits 8a, 8b, and 8c is composed of four switching elements and two diodes. The power conversion circuits 8a, 8b, and 8c are connected in parallel to each other to form a three-phase, three-level inverter. Four traction motors 7 are connected to the output terminals of the first power conversion unit 5.

[0013] The second power conversion unit 6 also includes two power conversion circuits 8d and 8e. The configuration of each power conversion circuit 8 is the same as that of the first power conversion unit 5. That is, each of the power conversion circuits 8d and 8e is composed of four switching elements and two diodes. The power conversion circuits 8d and 8e are connected in parallel to each other to form a single-phase three-level converter.

[0014] A single-phase AC voltage is applied to the power conversion device 10 from the secondary winding 3 of the transformer 2 via a pantograph 1. A second power conversion unit 6 converts the applied single-phase AC voltage into a DC voltage. A first power conversion unit 5 converts the DC voltage output from the second power conversion unit 6 into an AC voltage and applies it to a traction motor 7. The traction motor 7 rotates due to the applied AC voltage, and provides driving force to the axles of a railway vehicle (not shown).

[0015] Although FIG. 1 shows an example of the power conversion device 10 according to the first embodiment, which is applied to a railway vehicle to which a single-phase AC voltage is applied, the power conversion device 10 can also be applied to a railway vehicle to which a three-phase AC voltage is applied.

[0016] FIG. 2 is a circuit diagram of a power conversion circuit 8 for one phase extracted from FIG. 1 . As shown in FIG. 2 , the power conversion circuit 8 for one phase includes switching elements Q1, Q2, Q3, and Q4. In FIG. 2 , the high-potential side of the power conversion circuit 8, i.e., the collector side of the switching element Q1, is represented by P and is referred to as the “P-side.” Furthermore, the low-potential side of the power conversion circuit 8, i.e., the emitter side of the switching element Q4, is represented by N and is referred to as the “N-side.” The switching elements Q1, Q2, Q3, and Q4 are connected in series in this order between the P-side and the N-side. A diode D is connected in anti-parallel to each of the switching elements Q1, Q2, Q3, and Q4. Although FIGS. 1 and 2 illustrate IGBTs (insulated gate bipolar transistors) as examples of the switching elements Q1, Q2, Q3, and Q4, the present invention is not limited thereto. The switching elements Q1, Q2, Q3, and Q4 may be MOSFETs (Metal Oxide Semiconductor Field Effect Transistors).

[0017] The power conversion circuit 8 also includes capacitors C1 and C2. The capacitors C1 and C2 are connected in series between the P-side and N-side in this order. In the power conversion circuit 8, the connection point between the capacitors C1 and C2 is an intermediate potential point M.

[0018] The power conversion circuit 8 also includes diodes D1 and D2. The diodes D1 and D2 are connected in series in this order. The cathode of the diode D1 is connected to a connection point N1 between the switching elements Q1 and Q2, and the anode of the diode D2 is connected to a connection point N2 between the switching elements Q3 and Q4. The connection point between the anode of the diode D1 and the cathode of the diode D2 is connected to an intermediate potential point M. The diodes D1 and D2 function as clamp diodes.

[0019] In recent years, there has been a trend to package two elements in a single module. Such a power semiconductor module is called a "2-in-1 module." Figure 2 shows an example in which switching elements Q1 and Q2 are configured as a power semiconductor module 20a, switching elements Q3 and Q4 are configured as a power semiconductor module 20b, and diodes D1 and D2 are configured as a power semiconductor module 20c.

[0020] Fig. 3 is a circuit diagram showing the configuration of a power conversion circuit 8 having a power semiconductor module different from that shown in Fig. 2. In Fig. 3, components that are the same as or equivalent to those in Fig. 2 are designated by the same reference numerals. Fig. 3 shows an example in which a switching element Q1 and a diode D1 are configured as a power semiconductor module 20d, switching elements Q2 and Q3 are configured as a power semiconductor module 20e, and diode D2 and a switching element Q4 are configured as a power semiconductor module 20f.

[0021] Returning to the explanation of Fig. 1 , in this paper, with regard to the configuration of the first power conversion unit 5 in Fig. 1 , each of the capacitors C1 on the high-potential side of the power conversion circuits 8a, 8b, and 8c, i.e., all three capacitors C1, will be referred to as a "first capacitor," and each of the capacitors C2 on the low-potential side of the power conversion circuits 8a, 8b, and 8c, i.e., all three capacitors C2, will be referred to as a "second capacitor," and the first capacitor and the second capacitor will be collectively referred to as a "first capacitor group." In the first power conversion unit 5 configured as in Fig. 1 , each of the nine power semiconductor modules 20 divided as in Fig. 2 or 3 will be referred to as a "first power semiconductor module."

[0022] 1, in this paper, one capacitor C1 on the high potential side of each of the power conversion circuits 8d and 8e, i.e., two capacitors C1 in total, will be referred to as a "third capacitor," one capacitor C2 on the low potential side of each of the power conversion circuits 8d and 8e, i.e., two capacitors C2 in total, will be referred to as a "fourth capacitor," and the third capacitor and the fourth capacitor will be collectively referred to as a "second capacitor group." Furthermore, in the second power conversion unit 6 configured as in FIG. 1, each of the six power semiconductor modules 20 divided as in FIG. 2 or 3 will be referred to as a "second power semiconductor module."

[0023] Next, a description will be given of the configuration of the main parts according to embodiment 1. Fig. 4 is a cross-sectional view showing the connection relationship between the first parallel plate conductor 30 and the first capacitor and the connection relationship between the first parallel plate conductor 30 and the second capacitor according to embodiment 1.

[0024] The first parallel plate conductor 30 includes a flat-plate first high-potential conductor 30a to which a high potential is applied, a flat-plate first intermediate-potential conductor 30b to which an intermediate potential is applied, and a flat-plate first low-potential conductor 30c to which a low potential is applied. The first high-potential conductor 30a, the first intermediate-potential conductor 30b, and the first low-potential conductor 30c are arranged in parallel as shown in Fig. 4. Although not shown, flat-plate insulating sheets are inserted between these conductors to provide electrical insulation.

[0025] 4, three first capacitors C1 and three second capacitors C2 are arranged in a line, every other one. In each of the three capacitors C1, one positive electrode is electrically connected to the first high-potential conductor 30a, and the other negative electrode is electrically connected to the first intermediate potential conductor 30b through the first high-potential conductor 30a. In each of the three capacitors C2, one positive electrode is electrically connected to the first intermediate potential conductor 30b through the first high-potential conductor 30a, and the other negative electrode is electrically connected to the first low-potential conductor 30c through the first high-potential conductor 30a and the first intermediate potential conductor 30b. These connections allow currents to flow in opposite directions between the first high potential conductor 30a and the first intermediate potential conductor 30b, and also between the first intermediate potential conductor 30b and the first low potential conductor 30c, so that the first parallel plate conductor 30 can be configured with low inductance.

[0026] 4 is an example and is not limiting. The capacitors C1 and C2 do not have to be arranged alternately. Furthermore, the first parallel plate conductors 30 are arranged in the order of the first high-potential conductor 30a, the first intermediate-potential conductor 30b, and the first low-potential conductor 30c when viewed from the capacitors C1 and C2. However, the first low-potential conductor 30c, the first intermediate-potential conductor 30b, and the first high-potential conductor 30a may be arranged in this order.

[0027] FIG. 5 is a cross-sectional view showing the connection relationship between the second parallel plate conductor 32 and the third capacitor and the connection relationship between the second parallel plate conductor 32 and the fourth capacitor in the first embodiment.

[0028] The second parallel plate conductor 32 includes a flat-plate second high-potential conductor 32a to which a high potential is applied, a flat-plate second intermediate-potential conductor 32b to which an intermediate potential is applied, and a flat-plate second low-potential conductor 32c to which a low potential is applied. The second high-potential conductor 32a, the second intermediate-potential conductor 32b, and the second low-potential conductor 32c are arranged in parallel as shown in Fig. 5. Although not shown, flat insulating sheets are inserted between these conductors to provide electrical insulation.

[0029] 5, two capacitors C1 serving as the third capacitors and two capacitors C2 serving as the fourth capacitors are arranged in a line, every other one. In the two capacitors C1, one electrode serving as the positive electrode is electrically connected to the second high-potential conductor 32a, and the other electrode serving as the negative electrode is electrically connected to the second intermediate potential conductor 32b through the second high-potential conductor 32a. In the two capacitors C2, one electrode serving as the positive electrode is electrically connected to the second intermediate potential conductor 32b through the second high-potential conductor 32a, and the other electrode serving as the negative electrode is electrically connected to the second low-potential conductor 32c through the second high-potential conductor 32a and the second intermediate potential conductor 32b. These connections allow currents to flow in opposite directions between the second high potential conductor 32a and the second intermediate potential conductor 32b, and also between the second intermediate potential conductor 32b and the second low potential conductor 32c, so that the second parallel plate conductor 32 can be configured with low inductance.

[0030] 5 is an example and is not limiting. The capacitors C1 and C2 do not have to be arranged alternately. Furthermore, the second parallel plate conductors 32 are arranged in the order of the first high-potential conductor 32a, the first intermediate-potential conductor 32b, and the first low-potential conductor 32c when viewed from the capacitors C1 and C2. However, the second parallel plate conductors 32 may be arranged in the order of the first low-potential conductor 32c, the first intermediate-potential conductor 32b, and the first high-potential conductor 32a.

[0031] Fig. 6 is an exploded perspective view showing the connection relationship between the third parallel plate conductor 34 and the first parallel plate conductor 30 and the connection relationship between the third parallel plate conductor 34 and the second parallel plate conductor 32 in the first embodiment. Fig. 7 is a cross-sectional view showing a schematic structure of the third parallel plate conductor 34 in the first embodiment.

[0032] Fig. 6 shows the first parallel plate conductor 30 described using Fig. 4, the second parallel plate conductor 32 described using Fig. 5, and the third parallel plate conductor 34 shown in Fig. 7. Fig. 6 also shows a first capacitor unit 40 accommodating three capacitors C1 that are first capacitors and three capacitors C2 that are second capacitors, and a second capacitor unit 42 accommodating two capacitors C1 that are third capacitors and two capacitors C2 that are fourth capacitors.

[0033] 7 , the third parallel plate conductor 34 includes a flat-plate third high-potential conductor 34a to which a high potential is applied, a flat-plate third intermediate potential conductor 34b to which an intermediate potential is applied, and a flat-plate third low-potential conductor 34c to which a low potential is applied. The third high-potential conductor 34a, the third intermediate potential conductor 34b, and the third low-potential conductor 34c are arranged in parallel. Although not shown, flat insulating sheets are inserted between these conductors to provide electrical insulation.

[0034] Returning to the explanation of Fig. 6, the three power semiconductor modules 20 for each of the UVW phases provided in the first power conversion section 5 are arranged below the first capacitor unit 40. The first parallel plate conductor 30 is arranged bent into an L shape. The first parallel plate conductor 30 bent into an L shape allows electrical connection to be made with capacitors C1 and C2 (not shown in Fig. 6) in the first capacitor unit 40, as well as with each of the three power semiconductor modules 20.

[0035] Further, two power semiconductor modules 20 for each of the UV phases provided in the second power conversion unit 6 are disposed below the second capacitor unit 42. The second parallel plate conductor 32 is disposed bent into an L-shape. The L-shaped second parallel plate conductor 32 enables electrical connection to capacitors C1 and C2 (not shown in FIG. 6 ) in the second capacitor unit 42, as well as electrical connection to each of the two power semiconductor modules 20.

[0036] The third parallel plate conductor 34 is disposed on the opposite side of the first capacitor unit 40 and the second capacitor unit 42, with the first parallel plate conductor 30 and the second parallel plate conductor 32 sandwiched between them. The third parallel plate conductor 34 and the first parallel plate conductor 30 are electrically connected at a connection portion 34d, and the third parallel plate conductor 34 and the second parallel plate conductor 32 are electrically connected at a connection portion 34e. The third parallel plate conductor 34 disposed in this manner allows electrical connection between the first parallel plate conductor 30 and the second parallel plate conductor 32 without the first parallel plate conductor 30 and the second parallel plate conductor 32 facing each other.

[0037] Next, the effects of the power conversion device 10 according to the first embodiment will be described with reference to Fig. 6. In Fig. 6, the length between the longitudinal center of the connection portion 34d and the longitudinal center of the connection portion 34e is referred to as the "inter-connection distance" and represented by "L". Also, the distance between the first parallel plate conductor 30 and the second parallel plate conductor 32 is referred to as the "inter-conductor distance" and represented by "d".

[0038] As in the first embodiment, by using a method of electrically connecting the first parallel plate conductor 30 and the second parallel plate conductor 32 using the third parallel plate conductor 34, the distance L between the connection parts can be made longer than the distance d between the conductors. In contrast, when using the conventional method shown in Patent Document 1, there is a problem with mechanical strength, so it is difficult to make the width of the slit provided in the parallel plate conductor longer than the distance d between the conductors.

[0039] When the power semiconductor modules 20 for the U, V, and W phases provided in the first power conversion unit 5 use the power of the second capacitor unit 42, the distance between the power semiconductor modules 20 for the U, V, and W phases and the second capacitor unit 42 becomes an important factor in suppressing variations in switching current. When the method of embodiment 1 is used, the charge stored in the second capacitor unit 42 always passes through the third parallel plate conductor 34, so the effect of the difference in distance between the connection portion 34d and the power semiconductor modules 20 for the U, V, and W phases is reduced. This makes it possible to suppress variations in switching current between the power semiconductor modules 20 for the U, V, and W phases. Furthermore, when the power semiconductor modules 20 for the U, V, and W phases provided in the second power conversion unit 6 use the power of the first capacitor unit 40, the distance between the power semiconductor modules 20 for the U, V, and W phases and the first capacitor unit 40 becomes an important factor in suppressing variations in switching current. When the method of the first embodiment is used, the charge stored in the first capacitor unit 40 always passes through the third parallel plate conductor 34, so the influence of the difference in distance between the connection portion 34e and the power semiconductor modules 20 of each of the U and V phases is reduced, thereby making it possible to suppress variations in switching current between the power semiconductor modules 20 of each of the U and V phases.

[0040] Furthermore, the technique of the first embodiment eliminates the need for slits in the parallel plate conductors, as in the prior art, thereby eliminating mechanical strength issues. Furthermore, with the technique of the first embodiment, the inter-connection distance L can be set arbitrarily depending on the positional relationship between the power semiconductor modules 20 of each of the UVW phases and the connection portions 34d, without being affected by the inter-conductor distance d. Therefore, even if the first power conversion unit 5 and the second power conversion unit 6 are arranged close to each other, variations in switching current can be suppressed. Furthermore, the third parallel plate conductor 34 is typically formed with a wide conductor width to reduce electrical resistance and a thin thickness to enhance heat dissipation. Therefore, the provision of the third parallel plate conductor 34 hardly increases the size in the thickness direction. Therefore, the technique of the first embodiment can contribute to the miniaturization of the power conversion device 10.

[0041] 1 illustrates an example in which the first power conversion unit 5 is configured as a three-phase three-level inverter and the second power conversion unit 6 is configured as a single-phase three-level converter, but the present invention is not limited to this example. The power conversion device 10 may be configured as shown in FIGS. 8 to 10. FIG. 8 is a circuit diagram showing the configuration of a power conversion device 10A according to a first modified example of the first embodiment, FIG. 9 is a circuit diagram showing the configuration of a power conversion device 10B according to a second modified example of the first embodiment, and FIG. 10 is a circuit diagram showing the configuration of a power conversion device 10C according to a third modified example of the first embodiment.

[0042] In a power conversion device 10A according to a first modification shown in Fig. 8, the first power conversion unit 5 in the configuration of Fig. 1 is replaced with a first power conversion unit 5A. The first power conversion unit 5A has a three-phase two-level inverter configuration. In the case of a three-phase two-level inverter, it can be configured by connecting three power conversion circuits 8A, each for one phase, including two switching elements and one capacitor, in parallel.

[0043] In a power conversion device 10B according to a second modification shown in Fig. 9, the second power conversion unit 6 in the configuration of Fig. 1 is replaced with a second power conversion unit 6A. The second power conversion unit 6A has a configuration of a single-phase two-level converter. In the case of a single-phase two-level converter, it can be configured by connecting two power conversion circuits 8A for one phase, each of which has two switching elements and one capacitor, in parallel.

[0044] In a power conversion device 10C according to a third modification shown in Fig. 10, the first power conversion unit 5 in the configuration of Fig. 1 is replaced with a first power conversion unit 5A, and the second power conversion unit 6 in the configuration of Fig. 1 is replaced with a second power conversion unit 6A. The first power conversion unit 5A is a three-phase two-level inverter configuration, and the second power conversion unit 6A is a single-phase two-level converter configuration. In the case of a three-phase two-level inverter, it can be configured by connecting three power conversion circuits 8A for one phase, each having two switching elements and one capacitor, in parallel. In the case of a single-phase two-level converter, it can be configured by connecting two power conversion circuits 8A for one phase, each having two switching elements and one capacitor, in parallel.

[0045] The technique of the first embodiment described above can be applied to any of the power conversion devices 10A, 10B, and 10C according to the first to third modifications, and the effects described above can be obtained.

[0046] As described above, the power conversion device according to the first embodiment includes first to third parallel plate conductors, first and second capacitor units, and first and second power conversion units. The first parallel plate conductor includes at least a first flat-plate high-potential conductor to which a high potential is applied and a first flat-plate low-potential conductor to which a low potential is applied. The first high-potential conductor and the first low-potential conductor are arranged in parallel. The first capacitor unit includes at least a capacitor electrically connected between the first high-potential conductor and the first low-potential conductor. The second parallel plate conductor includes at least a second flat-plate high-potential conductor to which a high potential is applied and a second flat-plate low-potential conductor to which a low potential is applied. The second high-potential conductor and the second low-potential conductor are arranged in parallel. The second capacitor unit includes at least a capacitor electrically connected between the second high-potential conductor and the second low-potential conductor. The first power conversion unit includes a plurality of first power semiconductor modules electrically connected to the first parallel plate conductor and converts a DC voltage applied from the first and second capacitor units into a three-phase AC voltage. An example of the first power conversion unit is a two-level inverter. The second power conversion unit includes a plurality of second power semiconductor modules electrically connected to the second parallel plate conductor and converts a single-phase AC voltage or a three-phase AC voltage into a DC voltage and applies it to the first and second capacitor units. An example of the second power conversion unit is a two-level converter. The third parallel plate conductor includes at least a flat-plate-shaped third high-potential conductor electrically connected to the first and second high-potential conductors and a third low-potential conductor electrically connected to the first and second low-potential conductors. The third high-potential conductor and the third low-potential conductor are arranged in parallel. The third parallel plate conductor is arranged on the opposite side of the first and second parallel plate conductors from the first and second capacitor units. According to the power conversion device configured as described above, it is possible to reduce the variation in the distance between the plurality of first power semiconductor modules belonging to the first power conversion unit and the capacitors belonging to the second capacitor unit without providing slits or the like in the first parallel plate conductor or the second parallel plate conductor.Furthermore, with the power conversion device configured as described above, it is possible to reduce the variation in the distance between the plurality of second power semiconductor modules belonging to the second power conversion unit and the capacitors belonging to the first capacitor unit without providing slits or the like in the first parallel plate conductor or the second parallel plate conductor, thereby making it possible to obtain a power conversion device that can reduce the variation in switching current while ensuring the mechanical strength of the first and second parallel plate conductors.

[0047] In the above configuration, when the first power conversion unit is a three-level inverter and the second power conversion unit is a two-level converter, the first parallel plate conductor may further include a flat first intermediate potential conductor arranged parallel to the first high potential conductor and the first low potential conductor and to which an intermediate potential is applied. In this configuration, the capacitors included in the first capacitor unit include a first capacitor electrically connected between the first high potential conductor and the first intermediate potential conductor, and a second capacitor electrically connected between the first intermediate potential conductor and the first low potential conductor. Even with a power conversion device configured in this manner, it is possible to enjoy the above-mentioned effects.

[0048] Furthermore, in the above configuration, when the first power conversion unit is a two-level inverter and the second power conversion unit is a three-level converter, the second parallel plate conductor may further include a flat second intermediate potential conductor arranged parallel to the second high potential conductor and the second low potential conductor and to which an intermediate potential is applied. In this configuration, the capacitors included in the second capacitor unit include a third capacitor electrically connected between the second high potential conductor and the second intermediate potential conductor, and a fourth capacitor electrically connected between the second intermediate potential conductor and the second low potential conductor. Even with a power conversion device configured in this manner, it is possible to enjoy the effects described above.

[0049] Furthermore, in the above configuration, when the first power conversion unit is a three-level inverter and the second power conversion unit is a three-level converter, the first parallel plate conductor may further include a flat-plate first intermediate potential conductor arranged parallel to the first high potential conductor and the first low potential conductor and to which an intermediate potential is applied, and the second parallel plate conductor may further include a flat-plate second intermediate potential conductor arranged parallel to the second high potential conductor and the second low potential conductor and to which an intermediate potential is applied. In this configuration, the capacitors included in the first capacitor unit include a first capacitor electrically connected between the first high potential conductor and the first intermediate potential conductor and a second capacitor electrically connected between the first intermediate potential conductor and the first low potential conductor. Furthermore, the capacitors included in the second capacitor unit include a third capacitor electrically connected between the second high potential conductor and the second intermediate potential conductor and a fourth capacitor electrically connected between the second intermediate potential conductor and the second low potential conductor. Even with the power conversion device configured in this way, it is possible to enjoy the above-mentioned effects.

[0050] Embodiment 2. Fig. 11 is an exploded perspective view showing the configuration of the main parts of the power conversion device 10 according to embodiment 2. In Fig. 11, a first gate drive circuit 50 and a second gate drive circuit 52 are added to the configuration shown in Fig. 6. The other configurations are the same as or equivalent to the configuration in Fig. 6, and the same or equivalent components are denoted by the same reference numerals, and redundant explanations will be omitted.

[0051] The first gate drive circuit 50 is a drive circuit that applies a drive voltage to the gates of twelve switching elements provided in the power semiconductor module 20 of the first power conversion unit 5. The second gate drive circuit 52 is a drive circuit that applies a drive voltage to the gates of eight switching elements provided in the power semiconductor module 20 of the second power conversion unit 6. These drive circuits are arranged as shown in FIG. 11 . Specifically, the first gate drive circuit 50 is arranged on the side of the third parallel plate conductor 34 that does not face the first parallel plate conductor 30. The second gate drive circuit 52 is arranged on the side of the third parallel plate conductor 34 that does not face the second parallel plate conductor 32.

[0052] In the configuration of Fig. 11, the radiation noise emitted from the first capacitor unit 40 and the second capacitor unit 42 is shielded by the first parallel plate conductor 30 and the second parallel plate conductor 32. Furthermore, in the configuration of Fig. 11, the radiation noise that passes through the first parallel plate conductor 30 and the second parallel plate conductor 32 is further shielded by the third parallel plate conductor 34. Therefore, the first gate drive circuit 50 and the second gate drive circuit 52 are placed in positions where they are less affected by radiation noise. This makes it possible to reduce the number of noise filter components in the first gate drive circuit 50 and the second gate drive circuit 52.

[0053] As described above, the power conversion device according to the second embodiment includes a first gate drive circuit that applies a drive voltage to the gate of a switching element included in a first power semiconductor module and a second gate drive circuit that applies a drive voltage to the gate of a switching element included in a second power semiconductor module. The first gate drive circuit is arranged on the side of the third parallel plate conductor that does not face the first parallel plate conductor, and the second gate drive circuit is arranged on the side of the third parallel plate conductor that does not face the second parallel plate conductor. This power conversion device can be configured so that radiation noise radiated from the first and second capacitor units is shielded by the first and second parallel plate conductors, and radiation noise that passes through the first and second parallel plate conductors is further shielded by the third parallel plate conductor. This allows for a reduction in noise filter components in the first and second gate drive circuits, resulting in cost savings.

[0054] The configurations shown in the above embodiments are merely examples, and may be combined with other known technologies, and parts of the configurations may be omitted or modified without departing from the spirit of the invention.

[0055] REFERENCE SIGNS LIST 1 Pantograph, 2 Transformer, 3 Secondary winding, 5, 5A First power conversion unit, 6, 6A Second power conversion unit, 7 Propulsion motor, 8, 8a, 8b, 8c, 8d, 8e, 8A Power conversion circuit, 10, 10A, 10B, 10C Power conversion device, 20, 20a, 20b, 20c, 20d, 20e, 20f Power semiconductor module, 30 First parallel plate conductor, 30a First high potential conductor, 30b First intermediate potential conductor, 30c First low potential conductor, 32 Second parallel plate conductor, 32a Second high potential conductor, 32b Second intermediate potential conductor, 32c Second low potential conductor, 34 Third parallel plate conductor, 34a Third high potential conductor, 34b Third intermediate potential conductor, 34c Third low potential conductor, 34d, 34e Connection portion, 40 First capacitor unit, 42 Second capacitor unit, 50 First gate drive circuit, 52 Second gate drive circuit, C1, C2 Capacitors, D, D1, D2 Diode, M Midpoint potential point, N1, N2 Connection point, Q1, Q2, Q3, Q4 Switching element.

Claims

1. A first parallel plate conductor comprising at least a flat first high potential conductor to which a high potential is applied and a flat first low potential conductor to which a low potential is applied, the first high potential conductor and the first low potential conductor being arranged in parallel; a first capacitor unit comprising at least a capacitor electrically connected between the first high potential conductor and the first low potential conductor; a second parallel plate conductor comprising at least a flat second high potential conductor to which the high potential is applied and a flat second low potential conductor to which the low potential is applied, the second high potential conductor and the second low potential conductor being arranged in parallel; a second capacitor unit comprising at least a capacitor electrically connected between the second high potential conductor and the second low potential conductor; a first power conversion unit comprising a plurality of first power semiconductor modules electrically connected to the first parallel plate conductors, and converting a DC voltage applied from the first and second capacitor units into a three-phase AC voltage; a second power conversion unit including a plurality of second power semiconductor modules electrically connected to the second parallel plate conductor, converting a single-phase AC voltage or a three-phase AC voltage into a DC voltage and applying the DC voltage to the first and second capacitor units; and a third parallel plate conductor including at least a flat third high potential conductor electrically connected to the first and second high potential conductors and a third low potential conductor electrically connected to the first and second low potential conductors, the third high potential conductor and the third low potential conductor being arranged in parallel, and the third parallel plate conductor being arranged on the opposite side of the first and second capacitor units with the first and second parallel plate conductors in between.

2. The power conversion device according to claim 1, characterized in that: the first parallel plate conductor further comprises a flat first intermediate potential conductor arranged in parallel to the first high potential conductor and the first low potential conductor and to which an intermediate potential is applied; the capacitor provided in the first capacitor unit comprises a first capacitor electrically connected between the first high potential conductor and the first intermediate potential conductor and a second capacitor electrically connected between the first intermediate potential conductor and the first low potential conductor; the first power conversion unit is a three-level inverter; and the second power conversion unit is a two-level converter.

3. The power conversion device according to claim 1, characterized in that: the second parallel plate conductor further comprises a flat second intermediate potential conductor arranged in parallel to the second high potential conductor and the second low potential conductor and to which an intermediate potential is applied; the capacitors provided in the second capacitor unit comprise a third capacitor electrically connected between the second high potential conductor and the second intermediate potential conductor and a fourth capacitor electrically connected between the second intermediate potential conductor and the second low potential conductor; the first power conversion unit is a two-level inverter; and the second power conversion unit is a three-level converter.

4. The first parallel plate conductor is arranged in parallel with the first high potential conductor and the first low potential conductor, and further includes a flat first intermediate potential conductor to which an intermediate potential is applied; the second parallel plate conductor is arranged in parallel with the second high potential conductor and the second low potential conductor, and further includes a flat second intermediate potential conductor to which an intermediate potential is applied; the capacitors provided in the first capacitor unit include a first capacitor electrically connected between the first high potential conductor and the first intermediate potential conductor and a second capacitor electrically connected between the first intermediate potential conductor and the first low potential conductor; the capacitors provided in the second capacitor unit include a third capacitor electrically connected between the second high potential conductor and the second intermediate potential conductor and a fourth capacitor electrically connected between the second intermediate potential conductor and the second low potential conductor; the first power conversion unit is a three-level inverter; and the second power conversion unit is a three-level converter.

2. The power conversion device according to claim 1 .

5. A power conversion device as claimed in any one of claims 1 to 4, comprising: a first gate drive circuit which applies a drive voltage to the gate of a switching element provided in the first power semiconductor module; and a second gate drive circuit which applies a drive voltage to the gate of a switching element provided in the second power semiconductor module, wherein the first gate drive circuit is arranged on a side of the third parallel plate conductor which does not face the first parallel plate conductor, and the second gate drive circuit is arranged on a side of the third parallel plate conductor which does not face the second parallel plate conductor.