Multilayer ceramic capacitor

Abstract

Provided is a multilayer ceramic capacitor having higher moisture resistance reliability. In the multilayer ceramic capacitor 1, a difference between a first silicon concentration at an outer layer position A and a first silicon concentration at a side margin position B is 0.2-2.5 mol%, and a first silicon concentration at an origin O is from equal to or greater than the first silicon concentration at the outer layer position A to equal to or less than the first silicon concentration at the side margin position B, or is from equal to or greater than the first silicon concentration at the side margin position B to equal to or less than the first silicon concentration at the outer layer position A.

Description

Multilayer ceramic capacitors

[0001] The present invention relates to a multilayer ceramic capacitor.

[0002] The interior of a multilayer ceramic capacitor contains portions with different lamination patterns, such as a portion where internal electrode layers are laminated with a dielectric layer interposed between them, and a portion where only dielectric layers are laminated.

[0003] Japanese Patent Application Laid-Open No. 2018-148226

[0004] Recently, higher moisture resistance reliability is required for multilayer ceramic capacitors. In particular, moisture resistance reliability is required at the boundaries between parts where lamination modes differ. Therefore, an object of the present invention is to provide a multilayer ceramic capacitor with higher moisture resistance reliability.

[0005] The multilayer ceramic capacitor of the present invention has first internal electrode layers and second internal electrode layers alternately stacked with dielectric layers formed of a first ceramic dielectric interposed therebetween, and has a first internal layer main surface which is a surface in the stacking direction, a second internal layer main surface which is a surface opposite to the first internal layer main surface, a first internal layer side surface which is a surface in the width direction perpendicular to the first internal layer main surface and the second internal layer main surface and from which the first internal electrode layers and the second internal electrode layers are drawn, a second internal layer side surface which is a surface opposite to the first internal layer side surface and from which the first internal electrode layers and the second internal electrode layers are drawn, and an inner layer portion having a first inner layer end face, which is a lengthwise surface orthogonal to the first inner layer side face and the second inner layer side face and from which the first inner electrode layer is drawn, and a second inner layer end face, which is a surface opposite to the first inner layer end face and from which the second inner electrode layer is drawn; a first outer layer portion, which is formed of a second ceramic dielectric and covers the first inner layer main surface from the stacking direction; a second outer layer portion, which is formed of the second ceramic dielectric and covers the second inner layer main surface from the stacking direction; a ceramic body having a first side margin covering the inner layer portion, the first outer layer portion, and the second outer layer portion from the other side in the width direction, the first side margin being formed of a second ceramic dielectric and covering the inner layer portion, the first outer layer portion, and the second outer layer portion from the other side in the width direction; and terminal electrodes provided on the ceramic body and connected to some of the internal electrode layers, wherein in the ceramic body, two surfaces opposing each other in a stacking direction are defined as a first element body main surface and a second element body main surface, and two surfaces opposing each other in a width direction perpendicular to the stacking direction are defined as a first element body side surface and a second element body side surface, two surfaces that face each other in a lengthwise direction perpendicular to the width direction and the width direction are defined as a first element body end face and a second element body end face; a first length is half the length of the first outer layer portion and the second outer layer portion in the stacking direction; a second length is one-third the length of the first side margin portion and the second side margin portion in the width direction; and a distance from the first element body main surface at an interface between the first outer layer portion and the first side margin portion in a cross section of the ceramic body in a plane parallel to the width direction and the stacking direction at a center position in the lengthwise direction of the multilayer ceramic capacitor:The first length position in the direction of the second element body main surface, the first length position at the interface between the first outer layer portion and the second side margin portion from the first element body main surface in the direction of the second element body main surface, the first length position at the interface between the second outer layer portion and the first side margin portion from the second element body main surface in the direction of the first element body main surface, and the first length position at the interface between the second outer layer portion and the second side margin portion from the second element body main surface in the direction of the first element body main surface are each defined as an origin, and a position away from each of the origins by the second length in the direction of the farther of the two element body side surfaces is defined as an outer layer position, and When a position distant from the first silicon concentration is defined as a side margin position, and when the content of silicon per 100 mol of titanium at a specific position of the second ceramic dielectric is defined as a first silicon concentration, when focusing on one origin, the difference between the first silicon concentration at the outer layer position with respect to the origin and the first silicon concentration at the side margin position with respect to the origin is 0.2 mol% or more and 2.5 mol% or less, and the first silicon concentration at the origin is equal to or greater than the first silicon concentration at the outer layer position with respect to the origin, equal to or less than the first silicon concentration at the side margin position with respect to the origin, or equal to or less than the first silicon concentration at the outer layer position with respect to the origin, or equal to or greater than the first silicon concentration at the side margin position with respect to the origin.

[0006] According to the present invention, it is possible to provide a multilayer ceramic capacitor having higher moisture resistance reliability.

[0007] 1 is a perspective view of a multilayer ceramic capacitor according to an embodiment of the present invention. FIG. 1 is a cross-sectional view taken along line II of FIG. 1. FIG. 1 is a cross-sectional view taken along line II-II of FIG. 1. FIG. 1 is a cross-sectional view taken along line III-III of FIG. 1. FIG. 1 is a cross-sectional view taken along line IV-IV of FIG. 1. FIG. 4 is an enlarged view of the framed area of ​​FIG. 4. FIG. 4 is an enlarged view of the framed area of ​​FIG. 4. FIG. 4 is a table showing the results of a humidity load test. FIG. 4 is a table showing the results of a humidity load test. FIG. 5 is a perspective view of a ceramic body core part.

[0008] An embodiment of the present invention will be described with reference to Fig. 1. Fig. 1 is a perspective view of a multilayer ceramic capacitor 1 according to an embodiment of the present invention. Fig. 1 shows a so-called two-terminal multilayer ceramic capacitor.

[0009] The multilayer ceramic capacitor 1 includes a ceramic body 2 and terminal electrodes. The terminal electrodes include a first terminal electrode 20 and a second terminal electrode 21.

[0010] The ceramic body 2 includes a plurality of laminated dielectric layers and a plurality of laminated internal electrode layers. The internal electrode layers are laminated with the dielectric layers sandwiched between them. The ceramic body 2 has a roughly rectangular parallelepiped shape.

[0011] In the following description, the direction in which the dielectric layers and internal electrode layers are stacked is referred to as the stacking direction T. The direction perpendicular to the stacking direction T is referred to as the width direction W. The direction perpendicular to the stacking direction T and the width direction W is referred to as the length direction L.

[0012] Of the two surfaces of the ceramic body 2 that face each other in the stacking direction T, one surface is called the first body main surface 3. The remaining surface is called the second body main surface 4. Of the two surfaces of the ceramic body 2 that face each other in the width direction W, one surface is called the first body side surface 5. The remaining surface is called the second body side surface 6. Of the two surfaces of the ceramic body 2 that face each other in the length direction L, one surface is called the first body end surface 7. The remaining surface is called the second body end surface 8.

[0013] In the following description, the cross section taken along line II in Fig. 1 will be referred to as an LT cross section, the cross sections taken along line II-II and line III-III in Fig. 1 will be referred to as WT cross sections, and the cross section taken along line IV-IV in Fig. 1 will be referred to as an LW cross section.

[0014] A portion where three faces of the ceramic body 2 intersect is called a corner. A portion where two faces of the ceramic body 2 intersect is called a ridge. The corners and ridges are preferably rounded.

[0015] The state of lamination of the internal electrode layers will be described with reference to Fig. 2. Fig. 2 is a cross-sectional view taken along line II in Fig. 1.

[0016] The first internal electrode layer 32 and the second internal electrode layer 33 are laminated via a dielectric layer 30. The dielectric layer 30 is formed of a ceramic dielectric. The ceramic dielectric forming the dielectric layer 30 sandwiched between the first internal electrode layer 32 and the second internal electrode layer 33 is called a first ceramic dielectric.

[0017] The internal electrode layers include a plurality of first internal electrode layers 32 and a plurality of second internal electrode layers 33. The first internal electrode layers 32 are internal electrode layers exposed at the first element body end face 7. The second internal electrode layers 33 are internal electrode layers exposed at the second element body end face 8.

[0018] The first internal electrode layer 32 is divided into a first opposing electrode portion 34 and a first extension electrode portion 36. The first opposing electrode portion 34 is a portion that faces the second internal electrode layer 33. The first extension electrode portion 36 is a portion that is extended from the first opposing electrode portion 34 to the first element body end surface 7.

[0019] The second internal electrode layer 33 is divided into a second opposing electrode portion 35 and a second extension electrode portion 37. The second opposing electrode portion 35 is a portion that faces the first internal electrode layer 32. The second extension electrode portion 37 is a portion that is extended from the second opposing electrode portion 35 to the second element body end surface 8.

[0020] The divisions within the ceramic body 2 will be described. The portion where the first internal electrode layer 32 and the second internal electrode layer 33 face each other in the stacking direction T is called the internal layer portion 11. The surfaces of the internal layer portion 11 are called as follows. The surface of the internal layer portion 11 in the stacking direction T is called the first internal layer main surface 61. The surface opposite the first internal layer main surface 61 is called the second internal layer main surface 62. The surface in the width direction W that is perpendicular to the first internal layer main surface 61 and the second internal layer main surface 62, and from which the first internal electrode layer 32 and the second internal electrode layer 33 are drawn, is called the first internal layer side surface 63. The surface opposite the first internal layer side surface 63, and from which the first internal electrode layer 32 and the second internal electrode layer 33 are drawn, is called the second internal layer side surface 64. A surface in the length direction L that is orthogonal to the first inner layer main surface 61, the second inner layer main surface 62, the first inner layer side surface 63, and the second inner layer side surface 64, and from which the first internal electrode layer 32 is drawn, is called a first inner layer end surface 65. A surface opposite to the first inner layer end surface 65, and from which the second internal electrode layer 33 is drawn, is called a second inner layer end surface 66.

[0021] The outer layer portions and side margin portions are referred to as follows: A portion formed of a ceramic dielectric and covering the first inner layer main surface 61 in the stacking direction T is referred to as the first outer layer portion 10. A portion formed of a ceramic dielectric and covering the second inner layer main surface 62 in the stacking direction T is referred to as the second outer layer portion 12. A portion formed of a ceramic dielectric and covering the inner layer portion 11, the first outer layer portion 10, and the second outer layer portion 12 from one side in the width direction W is referred to as the first side margin portion 16. A portion formed of a ceramic dielectric and covering the inner layer portion 11, the first outer layer portion 10, and the second outer layer portion 12 from the other side in the width direction W is referred to as the second side margin portion 18.

[0022] The ceramic dielectric forming the first outer layer portion 10, the second outer layer portion 12, the first side margin portion 16 and the second side margin portion 18 is referred to as a second ceramic dielectric.

[0023] Only the dielectric layer 30 is disposed on the first outer layer portion 10 and the second outer layer portion 12. The first outer layer portion 10 and the second outer layer portion 12 are not disposed on the first outer layer portion 10 and the second outer layer portion 12, and the first inner electrode layer 32 and the second inner electrode layer 33 are not disposed on the first outer layer portion 10 and the second outer layer portion 12.

[0024] The division of the ceramic body 2 in the length direction L will be described. The ceramic body 2 is divided in the length direction L into a first lead portion 13, a longitudinally facing portion 14, and a second lead portion 15.

[0025] The longitudinally facing portion 14 corresponds to the range in the longitudinal direction L of the inner layer portion 11. The first lead portion 13 is the portion between the longitudinally facing portion 14 and the first element body end surface 7. The second lead portion 15 is the portion between the longitudinally facing portion 14 and the second element body end surface 8.

[0026] The longitudinally facing portions 14 correspond to the facing electrode portions of the internal electrode layers. The first lead portion 13 and the second lead portion 15 correspond to the lead electrode portions of the internal electrode layers.

[0027] The side margin portion will be described with reference to Figures 3 and 4. Figure 3 is a cross-sectional view taken along line II-II in Figure 1. Figure 4 is a cross-sectional view taken along line III-III in Figure 1. Both Figures 3 and 4 show a WT cross-section of the multilayer ceramic capacitor 1. Figure 3 shows a WT cross-section at the second lead portion 15. Figure 4 shows a WT cross-section at the longitudinally facing portion 14.

[0028] 3 , the first internal electrode layer 32 is not visible in the WT cross section of the second lead portion 15. Only the second internal electrode layer 33 is visible in the WT cross section. As a result, only the second internal electrode layer 33 is electrically connected to the second terminal electrode 21 at the second element body end face 8.

[0029] In the WT cross section of the first lead portion 13, the second internal electrode layer 33 is not visible. Only the first internal electrode layer 32 is visible. At the first element body end surface 7, the first internal electrode layer 32 is electrically connected to the first terminal electrode 20.

[0030] In Fig. 1, the center position in the longitudinal direction L of the multilayer ceramic capacitor 1 is shown as a longitudinal center position 90. The length 91 and the length 92 shown in Fig. 1 are the same length. Fig. 4 is a WT cross section of the multilayer ceramic capacitor 1 at the longitudinal center position 90.

[0031] 4, no terminal electrodes are visible in the WT cross section at the longitudinal center position 90 of the multilayer ceramic capacitor 1. Both the first internal electrode layer 32 and the second internal electrode layer 33 are visible in the WT cross section. This is because the WT cross section at the longitudinal center position 90 is a cross section of the inner layer portion 11.

[0032] As shown in FIG. 4 , the ceramic body 2 is divided in the width direction W into a first side margin portion 16 , a widthwise opposing portion 17 , and a second side margin portion 18 .

[0033] The widthwise opposing portion 17 is a portion where the first internal electrode layer 32 and the second internal electrode layer 33 are opposed to each other in the stacking direction T. The first side margin portion 16 is a portion between the widthwise opposing portion 17 and the first element body side surface 5. The second side margin portion 18 is a portion between the widthwise opposing portion 17 and the second element body side surface 6.

[0034] Only the dielectric layer 30 is disposed in the first side margin portion 16 and the second side margin portion 18. The first internal electrode layer 32 and the second internal electrode layer 33 are not disposed in the first side margin portion 16 and the second side margin portion 18.

[0035] Here, the widthwise opposing portion 17 is divided into a first outer layer portion 10, an inner layer portion 11, and a second outer layer portion 12 in the stacking direction T.

[0036] Therefore, the WT cross section at the longitudinal center position 90 is divided into a first side margin portion 16 , a first outer layer portion 10 , an inner layer portion 11 , a second outer layer portion 12 and a second side margin portion 18 .

[0037] The ceramic body 2 excluding the first side margin portion 16 and the second side margin portion 18 is referred to as a ceramic body core portion 40 .

[0038] The line showing the boundary between the ceramic body core portion 40 and the first side margin portion 16 is called a first boundary line 42. The line showing the boundary between the ceramic body core portion 40 and the second side margin portion 18 is called a second boundary line 44.

[0039] The first boundary line 42 and the second boundary line 44 are imaginary lines. The first boundary line 42 and the second boundary line 44 are not lines that are recognized as actual lines.

[0040] The first boundary line 42 can be drawn and determined by drawing a straight line passing through the end of the first internal electrode layer 32 on the first element body side surface 5 side and the end of the second internal electrode layer 33 on the first element body side surface 5 side. The second boundary line 44 can be drawn and determined by drawing a straight line passing through the end of the first internal electrode layer 32 on the second element body side surface 6 side and the end of the second internal electrode layer 33 on the second element body side surface 6 side.

[0041] Fig. 5 is a cross-sectional view taken along line IV-IV in Fig. 1. Of the first internal electrode layer 32 and the second internal electrode layer 33, Fig. 5 shows the first internal electrode layer 32.

[0042] As shown in FIG. 5 , the first side margin 16 and the second side margin 18 are continuous from the first element body end surface 7 to the second element body end surface 8 .

[0043] In the multilayer ceramic capacitor 1, capacitance is formed by the first opposing electrode portion 34 and the second opposing electrode portion 35 facing each other via the dielectric layer 30. This allows the multilayer ceramic capacitor 1 to exhibit capacitor characteristics.

[0044] Examples of the first and second ceramic dielectrics are those containing barium titanate, calcium titanate, strontium titanate, etc. as their main components. The dielectric ceramics may contain auxiliary components. Examples of the auxiliary components include rare earth oxides, silicon compounds, aluminum compounds, magnesium compounds, manganese compounds, iron compounds, chromium compounds, cobalt compounds, vanadium compounds, and nickel compounds. The ceramic dielectrics may contain ABO ３ It is sufficient that the perovskite oxide is a perovskite oxide represented by the formula (1) and that titanium is contained in the largest amount among the B-site elements.

[0045] The composition of the first ceramic dielectric and the composition of the second ceramic dielectric may be the same or different.

[0046] The preferred thickness of each of the dielectric layers 30 is 0.3 μm or more and 10 μm or less.

[0047] The total number of dielectric layers 30 stacked in the ceramic body 2 is preferably 15 or more and 2000 or less.

[0048] The main material of the internal electrode layers is a metal such as nickel, copper, silver, palladium, gold, etc. The material of the internal electrode layers may also be an alloy containing at least one of the aforementioned metals, such as a silver-palladium alloy.

[0049] The preferred thickness of the internal electrode layers is 0.2 μm or more and 2.0 μm or less.

[0050] A preferred total number of the first internal electrode layers 32 and the second internal electrode layers 33 is 15 or more and 2000 or less.

[0051] The size of the ceramic body 2 is not particularly limited. The length of the ceramic body 2 in the longitudinal direction L is preferably 0.2 mm or more and 10 mm or less. The length of the ceramic body 2 in the width direction W is preferably 0.1 mm or more and 5 mm or less. The length of the ceramic body 2 in the stacking direction T is preferably 0.1 mm or more and 5 mm or less.

[0052] The terminal electrodes will now be described. As shown in Fig. 1 , the terminal electrodes include a first terminal electrode 20 and a second terminal electrode 21. The first terminal electrode 20 is a terminal electrode connected to a first internal electrode layer 32. The second terminal electrode 21 is a terminal electrode connected to a second internal electrode layer 33.

[0053] The first terminal electrode 20 is arranged on the first element body end face 7, part of the first element body main surface 3, part of the second element body main surface 4, part of the first element body side surface 5, and part of the second element body side surface 6. The second terminal electrode 21 is arranged on the second element body end face 8, part of the first element body main surface 3, part of the second element body main surface 4, part of the first element body side surface 5, and part of the second element body side surface 6.

[0054] The terminal electrodes include an external electrode film 22, a nickel-plated film 24, and a tin-plated film 25. These are arranged in this order from the end face of the ceramic body 2: the external electrode film 22, the nickel-plated film 24, and the tin-plated film 25.

[0055] The external electrode films 22 are disposed on and cover the end faces of the ceramic body 2. The external electrode films 22 extend from the end faces to parts of the main surfaces and parts of the side surfaces.

[0056] The external electrode films 22 include glass and metal. The glass includes, for example, boron and silicon. The metal includes, for example, at least one selected from copper, nickel, silver, palladium, a silver-palladium alloy, and gold. The external electrode films 22 are formed by applying a conductive paste to the ceramic body 2 and firing the paste. This conductive paste includes glass and metal. A preferred thickness of the external electrode films 22 is, for example, 3 μm or more and 100 μm or less.

[0057] The nickel plating film 24 is disposed so as to cover the external electrode film 22. The tin plating film 25 is disposed so as to cover the nickel plating film 24.

[0058] Solder is used when mounting the multilayer ceramic capacitor 1 on a substrate, etc. The nickel plating film 24 prevents the external electrode film 22 from being corroded by the solder.

[0059] The tin plating film 25 improves the wettability of the solder to the multilayer ceramic capacitor 1. As a result, the multilayer ceramic capacitor 1 can be easily mounted on a substrate or the like.

[0060] The size of the multilayer ceramic capacitor 1 is not particularly limited. The length in the longitudinal direction L of the multilayer ceramic capacitor 1 including the ceramic body 2 and the terminal electrodes is preferably 0.2 mm or more and 10 mm or less. The length in the stacking direction T of the multilayer ceramic capacitor 1 including the ceramic body 2 and the terminal electrodes is preferably 0.1 mm or more and 5 mm or less. The length in the width direction W of the multilayer ceramic capacitor 1 including the ceramic body 2 and the terminal electrodes is preferably 0.1 mm or more and 10 mm or less.

[0061] The amount of silicon contained in the dielectric layer 30 will be described. The content ratio of silicon per 100 mol of titanium at a specific position in the second ceramic dielectric will be referred to as a first silicon concentration.

[0062] The content of silicon per 100 mol of titanium in the entire specific portion of the second ceramic dielectric is referred to as the “second silicon concentration.” Specifically, the content of silicon per 100 mol of titanium in the entire second ceramic dielectric forming the first outer layer portion 10, the content of silicon per 100 mol of titanium in the entire second ceramic dielectric forming the second outer layer portion 12, the content of silicon per 100 mol of titanium in the entire second ceramic dielectric forming the first side margin portion 16, and the content of silicon per 100 mol of titanium in the entire second ceramic dielectric forming the second side margin portion 18 are referred to as the “second silicon concentration.”

[0063] The silicon content relative to 100 mol of titanium at a specific position in the first ceramic dielectric is referred to as a third silicon concentration.

[0064] In the multilayer ceramic capacitor 1 of this embodiment, the first outer layer portion 10, the second outer layer portion 12, the first side margin portion 16, and the second side margin portion 18 are all formed of a second ceramic dielectric. The second silicon concentration of the first outer layer portion 10, the second outer layer portion 12, the first side margin portion 16, and the second side margin portion 18 is 1.0 mol% or more and 3.5 mol% or less.

[0065] 6 is an enlarged view of the box 46 in FIG. 4. The origin O, outer layer position A, and side margin position B are defined as follows. Note that the following explanation uses the first outer layer portion 10 and the second side margin portion 18 as examples. However, the following explanation also applies to the second outer layer portion 12 and the first side margin portion 16.

[0066] 4, the length of the first outer layer portion 10 in the stacking direction T is indicated by a length 54. Half of the length 54 is indicated by a length 56. The length 56 will be referred to as a first length 56.

[0067] In Figure 4, the length of the second side margin portion 18 in the width direction W is indicated by length 50. One-third of length 50 is indicated by length 52. Length 52 is referred to as the second length 52. Note that length 51 is two-thirds of length 50.

[0068] In the WT cross section at the longitudinal center position 90 of the multilayer ceramic capacitor 1, the position of the first length 56 on the second boundary line 44 in the direction from the first element body main surface 3 to the second element body main surface 4 is called the origin O.

[0069] A position away from the origin O by a second length 52 in the direction of the first element body side surface 5, which is the farther side surface of the first element body side surface 5 and the second element body side surface 6, is called an outer layer position A. The first silicon concentration at the outer layer position A is called an outer layer silicon concentration.

[0070] A position away from the origin O by a second length 52 in the direction of the second element body side surface 6, which is the closer side surface of the first element body side surface 5 and the second element body side surface 6, is called a side margin position B. The first silicon concentration at the side margin position B is called a side margin silicon concentration.

[0071] The difference between the silicon concentration in the outer layer portion and the silicon concentration in the side margin portion is 0.2 mol % or more and 2.5 mol % or less.

[0072] The first silicon concentration at the origin O is called the origin silicon concentration. The origin O is located at the boundary between the outer layer portion and the side margin portion. The measurement target of the origin silicon concentration includes the outer layer portion and the side margin portion. The origin silicon concentration is between the outer layer portion silicon concentration and the side margin portion silicon concentration.

[0073] The trend of the first silicon concentration will be described based on Fig. 7. Fig. 7 is a graph showing the first silicon concentration of the first outer layer portion 10 and the first silicon concentration of the second side margin portion 18. The X axis of Fig. 7 represents the position in the width direction W. The Y axis of Fig. 7 represents the first silicon concentration.

[0074] 7 are the outer layer position A, the origin O, and the side margin position B, respectively, described based on FIG. 6. Point YA shown in FIG. 7 indicates the first silicon concentration at the outer layer position A. Point YB shown in FIG. 7 indicates the first silicon concentration at the side margin position B.

[0075] The first silicon concentration YA and the first silicon concentration YB are 1.0 mol % or more and 3.5 mol % or less. The difference between the first silicon concentration YA and the first silicon concentration YB is 0.2 mol % or more and 2.5 mol % or less.

[0076] 7 illustrates a case where the first silicon concentration YA at the outer layer position A is smaller than the first silicon concentration YB at the side margin position B. If the difference between the first silicon concentration YA and the first silicon concentration YB is 0.2 mol% or more and 2.5 mol% or less, the first silicon concentration YA at the outer layer position A may be larger than the first silicon concentration YB at the side margin position B.

[0077] 7 indicates the first silicon concentration at the origin O. The first silicon concentration YO is equal to or greater than the first silicon concentration YA and equal to or less than the first silicon concentration YB, or equal to or less than the first silicon concentration YA and equal to or greater than the first silicon concentration YB. The first silicon concentration changes monotonically from the outer layer position A to the side margin position B via the origin O.

[0078] The first silicon concentration YO is preferably an intermediate value between the first silicon concentration YA and the first silicon concentration YB, for example, in the range of ((first silicon concentration YA + first silicon concentration YB) / 2) ± 5%.

[0079] 6, in the WT cross section of the ceramic body 2 at the longitudinal center position 90, an arbitrary position in the inner layer portion 11 is referred to as an inner layer position N. The third silicon concentration at the inner layer position N is referred to as the inner layer portion silicon concentration.

[0080] The preferable relationship between the silicon concentration in the inner layer portion, the silicon concentration in the outer layer portion, and the silicon concentration in the side margin portion is as follows: silicon concentration in the inner layer portion<silicon concentration in the outer layer portion<silicon concentration in the side margin portion

[0081] 8, the first to third methods for measuring silicon concentrations will be described. The first to third silicon concentrations are measured by composition analysis of the dielectric layer 30. The multilayer ceramic capacitor 1 is polished to expose a WT cross section at a center position 90 in the longitudinal direction.

[0082] The first silicon concentration and the third silicon concentration are analyzed by composition analysis of the WT cross section using laser ablation ICP-MS (LA-ICP-MS). The spot shape during composition analysis is a square with its centers at the outer layer position A, the side margin position B, the inner layer position N, and the origin O. The length of one side of the square is 5 μm.

[0083] The second silicon concentration is measured by EDX (energy dispersive X-ray spectroscopy) over the entire first outer layer portion 10, the second outer layer portion 12, the first side margin portion 16, and the second side margin portion 18 in a cross section parallel to the width direction and the stacking direction.

[0084] The following describes the particle size of the dielectric particles contained in the dielectric layer 30. In the multilayer ceramic capacitor 1 of this embodiment, the median particle size of the dielectric particles contained in the dielectric layer 30 at the origin O is 0.4 to 0.9 times the median particle size of the dielectric particles contained in the dielectric layer 30 at the side margin position B. The median particle size is also referred to as the median diameter or D50.

[0085] A method for measuring the particle size of dielectric particles will be described with reference to Fig. 9. Fig. 9 is a diagram showing the measurement position and measurement range in measuring the particle size of dielectric particles. Fig. 9 is an enlarged view of the frame 46 in Fig. 4.

[0086] The particle size of the dielectric particles is measured using a scanning electron microscope (SEM) on the WT cross section at the center position 90 in the longitudinal direction of the multilayer ceramic capacitor 1.

[0087] The multilayer ceramic capacitor 1 is polished to the longitudinal center position 90 to expose the WT surface. An SEM image of the dielectric particles is taken of the WT cross section under conditions of a magnification of 30,000x, an acceleration voltage of 5 kV, and a field of view of 3 μm x 3 μm. Image processing software is used to recognize the edges of all dielectric particles included in the SEM image, and the cross-sectional area of ​​the dielectric particles is calculated. The circle-equivalent diameter is calculated from the calculated cross-sectional area. The calculated circle-equivalent diameter is used as the particle diameter. After excluding dielectric particles that are missing from the image, the diameters of all dielectric particles included within the imaged area are measured, and the average value is calculated.

[0088] The multilayer ceramic capacitor 1 of this embodiment can provide a multilayer ceramic capacitor 1 with higher moisture resistance reliability.

[0089] As shown in FIG. 7, the silicon concentration in the outer layer portion and the silicon concentration in the side margin portion are both 1.0 mol % or more and 3.5 mol % or less.

[0090] The difference between the silicon concentration in the outer layer portion and the silicon concentration in the side margin portion is 0.2 mol % or more and 2.5 mol % or less.

[0091] Furthermore, the origin silicon concentration is either equal to or greater than the outer layer silicon concentration and equal to or less than the side margin silicon concentration, or equal to or less than the outer layer silicon concentration and equal to or greater than the side margin silicon concentration.

[0092] That is, the silicon concentration in the outer layer portion and the silicon concentration in the side margin portion are within a predetermined preferred range, and the silicon concentration changes monotonically from the outer layer position A to the side margin position B.

[0093] When the silicon concentrations are within the ranges described above on both sides of the second boundary line 44 and have the changing tendency described above, the moisture resistance reliability of the multilayer ceramic capacitor 1 is improved.

[0094] The results of the humidity load test for the example and comparative example are described with reference to FIGS. 10 and 11 . The following multilayer ceramic capacitor chips were used as chips for the example and comparative example. The chip including the terminal electrodes had a length in the longitudinal direction L of 1.6 mm, a length in the width direction W of 0.8 mm, and a length in the stacking direction T of 0.8 mm. The thickness of the dielectric layer 30 in the inner layer portion 11 was 0.5 μm, the thickness of the internal electrode layer was 0.5 μm, and the number of dielectric layers 30 was 705. Here, the thickness of the dielectric layer 30 refers to the distance in the stacking direction T between adjacent internal electrode layers. The number of dielectric layers 30 refers to the number of spaces between adjacent internal electrode layers in the inner layer portion 11. The length 54 of the first outer layer portion 10 in the stacking direction T and the length 50 of the second outer layer portion 12 in the stacking direction T were 45 μm. The length in the width direction W of the first side margin portion 16 and the length 50 in the width direction W of the second side margin portion 18 were 30 μm.

[0095] The conditions for the humidity load test conducted on the chips of the example and comparative example will be explained. The humidity load test was conducted on 100 chips under conditions of a temperature of 125°C, humidity of 95% RH, and applied voltages of 2V, 4V, and 6V, and the insulation resistance IR was measured after 72 hours. Chips with LogIR≦4 were judged to be defective, and the defect rate was calculated from the number of defective chips. A calculated defect rate of less than 10% was judged to be good. A defect rate of 10% or more was judged to be defective.

[0096] 10 shows the results of the humidity load test for the chips of the example and the comparative example. In FIG. 10, a good result in the humidity load test is indicated by G, and a bad result in the humidity load test is indicated by F.

[0097] As shown in Examples 1 to 9, when the silicon concentration in the outer layer portion and the silicon concentration in the side margin portion were 1.0 mol% or more and 3.5 mol% or less, the difference between the silicon concentration in the outer layer portion and the silicon concentration in the side margin portion was 0.2 mol% or more and 2.5 mol% or less, and the origin silicon concentration was either equal to or more than the silicon concentration in the outer layer portion and equal to or less than the silicon concentration in the side margin portion, or equal to or less than the silicon concentration in the outer layer portion and equal to or more than the silicon concentration in the side margin portion, the result in the humidity load test was good when the applied voltage was 2 V.

[0098] As shown in Comparative Examples 1 to 7, when any of the silicon concentration conditions satisfied by Examples 1 to 9 described above was not satisfied, the results were poor in the humidity load test when the applied voltage was 2 V.

[0099] Furthermore, as shown in Examples 1 to 4, when the silicon concentrations were such that the silicon concentration in the inner layer portion was less than the silicon concentration in the outer layer portion and less than the silicon concentration in the side margin portion, the results were good even when the applied voltage was 4 V in the humidity load test.

[0100] The median particle size of the dielectric particles and the results of the humidity load test will be described with reference to Fig. 11. Fig. 11 shows the results of the humidity load test for the chips of the example and the comparative example. In Fig. 11, a case where the result of the humidity load test was good is marked with G. A case where the result of the humidity load test was poor is marked with F.

[0101] In Examples A to E, the median particle size of the dielectric particles contained in the dielectric layer 30 at the origin O is 0.4 to 0.9 times the median particle size of the dielectric particles contained in the dielectric layer 30 at the side margin position B, i.e., the side margin portion.

[0102] In Examples A to E, as shown in FIG. 11, the results were good in the humidity load test even when the applied voltage was 6 V.

[0103] As shown by Comparative Examples A to D, when the median particle size condition of the dielectric particles satisfied by Examples A to E described above was not met, the results were poor in the humidity load test when the applied voltage was 6 V.

[0104] The ratio of the length 52 of the second side margin 18 in the width direction W to the length 50 is not limited to 1 / 3, and may be, for example, 1 / 4. Furthermore, the length 52 does not have to be determined as a ratio to the length 50. For example, the length 52 may be a constant value such as 10 μm. The length 52 can be determined appropriately depending on, for example, the length of the side margin in the width direction W.

[0105] The reason why the moisture-resistant reliability of the multilayer ceramic capacitor 1 of this embodiment is improved is believed to be as follows. The dielectric layer 30 contains a desired amount of silicon from the outer layer portion to the side margin portion. Furthermore, the amount of silicon changes monotonically from the side margin portion to the outer layer portion. This improves the bonding strength between the outer layer portion and the side margin portion. As a result, the moisture-resistant reliability is improved.

[0106] The relationship between the median particle size of the dielectric particles and the moisture-resistant reliability is considered as follows. The particle size of the dielectric particles in the dielectric layer 30 is preferably uniform. This is because distortion is less likely to occur in the dielectric layer 30. In the multilayer ceramic capacitor 1 of this embodiment, the median particle size of the dielectric particles contained in the dielectric layer 30 near the origin O is 0.4 to 0.9 times the median particle size of the dielectric particles contained in the dielectric layer 30 in the side margin portion. That is, the ratio between the median particle size of the dielectric particles in the vicinity of the interface between the outer layer portion and the side margin portion—in other words, in a predetermined range from the origin O toward the side margin position B and the outer layer position A—and the median particle size of the dielectric particles in the side margin portion falls within a predetermined range. Therefore, steps in the arrangement of the dielectric particles and distortion between the dielectric particles are less likely to occur in the dielectric layer 30. As a result, the moisture-resistant reliability of the multilayer ceramic capacitor 1 of this embodiment is improved.

[0107] The method for manufacturing the multilayer ceramic capacitor 1 will now be described. (1) A ceramic element core precursor 040 is prepared. As shown in FIG. 12 , the ceramic element core precursor 040 is a precursor of the ceramic element before the dielectric sheets for the side margins are arranged. The precursor refers to the state before firing. The portion of the ceramic element excluding the side margins is called the ceramic element core.

[0108] A dielectric sheet for the ceramic body core and a conductive paste for the internal electrode layers are prepared. The dielectric sheet and the conductive paste for the internal electrode layers contain a binder and a solvent. The binder and the solvent may be known organic binders and organic solvents.

[0109] (2) A conductive paste for the internal electrode layers is printed on the dielectric sheet in a predetermined pattern, thereby forming an internal electrode layer pattern on the dielectric sheet. Examples of printing methods include screen printing and gravure printing.

[0110] (3) A predetermined number of dielectric sheets on which no internal electrode layer patterns are printed are stacked. The stacked layers become layers that include an outer layer portion on one side. Dielectric sheets on which internal electrode layer patterns are printed are stacked in sequence on top of that. The stacked layers become layers that include an inner layer portion. A predetermined number of dielectric sheets on which no internal electrode layer patterns are printed are stacked on top of that. The stacked layers become layers that include an outer layer portion on the other side.

[0111] (4) The laminated sheets are pressed in the lamination direction to produce a laminated block. An example of the pressing method is isostatic pressing.

[0112] (5) The laminated block is cut. When cutting, the conductive paste corresponding to the internal electrode layers is exposed on both sides in the width direction W. The cut laminated block is called a ceramic element core precursor 040. FIG. 12 is a perspective view of the ceramic element core precursor 040.

[0113] Dielectric sheets for forming side margins are arranged on both sides of the ceramic body core precursor 040 in the width direction W. The ceramic body 2 is then formed through firing and cutting. In Figure 12, each portion of the ceramic body core precursor 040 is assigned a component number with a "0" added before the corresponding component number in the ceramic body 2. For example, a portion 032 in the ceramic body core precursor 040 corresponds to the first internal electrode layer 32 in the ceramic body 2.

[0114] (6) Dielectric sheets for the side margins are prepared. Specifically, the dielectric material may be the same as the dielectric material for the ceramic element core. Additives may be added to the dielectric powder obtained from this dielectric material. The dielectric sheets for the side margins may have a two-layer structure including an inner layer in contact with the ceramic element core precursor 040 and an outer layer. The inner layer and the outer layer may contain different solvents and additives.

[0115] Among the dielectric sheets for the ceramic element core portion and the dielectric sheets for the side margin portion, silicon is added to at least the dielectric sheet for the side margin portion. The silicon concentration of the dielectric sheet for the ceramic element core portion is made different from that of the dielectric sheet for the side margin portion. Preferably, the silicon concentration of the dielectric sheet for the side margin portion is made higher than that of the dielectric sheet for the ceramic element core portion.

[0116] Furthermore, in the dielectric sheets for the ceramic body core, the silicon concentration may be made different between the dielectric sheet corresponding to the inner layer and the dielectric sheet corresponding to the outer layer.

[0117] (7) The dielectric sheet for the side margin portion is pressed against the ceramic element core portion precursor 040. Then, by punching, layers that will become the side margin portion are formed. Next, on the other side of the ceramic element core portion precursor 040, the dielectric sheet for the inner layer portion is pressed against the other side of the ceramic element core portion precursor 040 in the same manner. Then, by punching, layers that will become the side margin portion on the other side are formed. Note that punching may be performed after the dielectric sheets for the side margin portion have been pressed against both sides of the ceramic element core portion precursor 040.

[0118] (11) The laminated chip on which the layers that will become the side margins are formed is degreased under predetermined conditions in a nitrogen atmosphere. The laminated chip is then fired at a predetermined temperature in a nitrogen-hydrogen-water vapor mixed atmosphere to obtain a sintered ceramic body. The firing process may be carried out at a temperature at which the laminated chip is sufficiently densified. For example, the firing may be carried out at a temperature of 1200°C to 1300°C, and held for 0 to 30 minutes. The firing may also be carried out at a temperature of 1200°C to 1300°C, and held for 0 to 30 minutes. ３ The process is carried out in an atmosphere in which the main component compounds such as the above are not reduced and the oxidation of the conductive material is suppressed. For example, the oxygen partial pressure is 1.8×10 －９ ~8.7 x 10 －１０ MPa N ２ -H ２ -H ２ The firing may be performed in a stream of O. Furthermore, an annealing treatment may be performed after firing.

[0119] (12) Terminal electrodes are formed on each of the two end faces of the sintered ceramic body. In this manner, the multilayer ceramic capacitor 1 is manufactured. The terminal electrodes may be formed by a known method. For example, a base layer is formed by applying and baking a conductive paste containing a conductive component such as Cu or Ni to the end faces of the body portion where the internal electrodes are drawn out and exposed. The base layer may also be formed by applying a conductive paste to both end faces of the green body portion before firing, followed by a firing process. After forming the base layer, electrolytic plating may be performed to form a plating film of Ni, Sn, or the like on the surface of the base layer. This completes the multilayer ceramic capacitor.

[0120] As mentioned above, the silicon concentration of the dielectric sheet for the ceramic body core portion is different from that of the dielectric sheet for the side margin portion. Therefore, silicon migrates during firing. As a result, a silicon concentration gradient can be formed between the outer layer portion and the side margin portion.

[0121] Although the embodiments of the present invention have been described above, the present invention is not limited to the above-described embodiments and various changes and modifications are possible.

[0122] <1> An inner layer portion in which first internal electrode layers and second internal electrode layers are alternately stacked with dielectric layers formed of a first ceramic dielectric interposed therebetween, the inner layer portion having a first inner layer main surface which is a surface in the stacking direction, a second inner layer main surface which is a surface opposite to the first inner layer main surface, a first inner layer side surface which is a surface in the width direction perpendicular to the first inner layer main surface and the second inner layer main surface and from which the first internal electrode layers and second internal electrode layers are drawn, a second inner layer side surface which is a surface opposite to the first inner layer side surface and from which the first internal electrode layers and the second internal electrode layers are drawn, a first inner layer end surface which is a surface in the length direction perpendicular to the first inner layer main surface, the second inner layer main surface, the first inner layer side surface and the second inner layer side surface and from which the first internal electrode layers are drawn, and a second inner layer end surface which is a surface opposite to the first inner layer end surface and from which the second internal electrode layers are drawn; and a first outer layer portion formed of a second ceramic dielectric and covering the first inner layer main surface in the stacking direction, a ceramic body having a second outer layer portion formed of a second ceramic dielectric and covering the second inner layer main surface in the stacking direction; a first side margin portion formed of the second ceramic dielectric and covering the inner layer portion, the first outer layer portion, and the second outer layer portion from one side in the width direction; and a second side margin portion formed of the second ceramic dielectric and covering the inner layer portion, the first outer layer portion, and the second outer layer portion from the other side in the width direction; and terminal electrodes provided on the ceramic body and connected to some of the internal electrode layers, wherein in the ceramic body, two surfaces opposing each other in the stacking direction are a first element body main surface and a second element body main surface, two surfaces opposing each other in the width direction perpendicular to the stacking direction are a first element body side surface and a second element body side surface, and two surfaces opposing each other in a length direction perpendicular to the stacking direction and the width direction are a first element body end face and a second element body end face, a first length is half the length of the first outer layer portion and the second outer layer portion in the stacking direction; a second length is one-third the length of the first side margin portion and the second side margin portion in the width direction; and in a cross section of the ceramic body in a plane parallel to the width direction and the stacking direction at a central position in the length direction of the multilayer ceramic capacitor,the first length position at the interface between the first outer layer portion and the first side margin portion from the first element body main surface in the direction of the second element body main surface, the first length position at the interface between the first outer layer portion and the second side margin portion from the first element body main surface in the direction of the second element body main surface, the first length position at the interface between the second outer layer portion and the first side margin portion from the second element body main surface in the direction of the first element body main surface, and the first length position at the interface between the second outer layer portion and the second side margin portion from the second element body main surface in the direction of the first element body main surface, each of which is defined as an origin; an outer layer position is a position that is the second length away from each of the origins in the direction of the farther of the two element body side surfaces; and a side margin position is a position that is the second length away from each of the origins in the direction of the closer of the two element body side surfaces, a multilayer ceramic capacitor, wherein, when a silicon content per 100 mol of titanium at a specific position of a second ceramic dielectric is defined as a first silicon concentration, and when focusing on one of the origins, a difference between the first silicon concentration at the outer layer position with respect to the origin and the first silicon concentration at the side margin position with respect to the origin is 0.2 mol% or more and 2.5 mol% or less, and the first silicon concentration at the origin is equal to or greater than the first silicon concentration at the outer layer position with respect to the origin and equal to or less than the first silicon concentration at the side margin position with respect to the origin,

[0123] <2> The multilayer ceramic capacitor according to <1>, wherein, in a cross section of the ceramic body in a plane parallel to the width direction and the stacking direction at a central position in the length direction of the multilayer ceramic capacitor, the second silicon concentration in the first outer layer portion, the second outer layer portion, the first side margin portion, and the second side margin portion is 1.0 mol % or more and 3.5 mol % or less, where the second silicon concentration is defined as: the silicon content per 100 mol of titanium in the entire second ceramic dielectric forming the first outer layer portion; the silicon content per 100 mol of titanium in the entire second ceramic dielectric forming the second outer layer portion; the silicon content per 100 mol of titanium in the entire second ceramic dielectric forming the first side margin portion; and the silicon content per 100 mol of titanium in the entire second ceramic dielectric forming the second side margin portion.

[0124] <3> The multilayer ceramic capacitor according to <1> or <2>, wherein, when a content rate of silicon per 100 mol of titanium at a specific position of the first ceramic dielectric is defined as a third silicon concentration, and when focusing on one of the origins, the first silicon concentration at the outer layer position relative to the origin is lower than the first silicon concentration at the side margin position relative to the origin, and the third silicon concentration of the inner layer portion is lower than the first silicon concentration at the outer layer position relative to the origin in a cross section of the ceramic body in a plane parallel to the width direction and the stacking direction at a central position in the length direction of the multilayer ceramic capacitor.

[0125] <4> The multilayer ceramic capacitor according to any one of <1> to <3>, wherein, when focusing on one of the origins, a median particle size of the dielectric particles contained in the dielectric layer in the vicinity of the origin is 0.4 to 0.9 times the median particle size of the dielectric particles contained in the dielectric layer at the side margin position relative to the origin.

[0126] REFERENCE SIGNS LIST 1 Multilayer ceramic capacitor 2 Ceramic body 3 First body main surface 4 Second body main surface 5 First body side surface 6 Second body side surface 7 First body end surface 8 Second body end surface 10 First outer layer portion 11 Inner layer portion 12 Second outer layer portion 13 First lead portion 14 Longitudinal opposing portion 15 Second lead portion 16 First side margin portion 18 Second side margin portion 20 First terminal electrode 21 Second terminal electrode 22 External electrode film 24 Nickel plating film 25 Tin plating film 30 Dielectric layer 32 First internal electrode layer 33 Second internal electrode layer 34 First opposing electrode portion 35 Second opposing electrode portion 36 First lead electrode portion 37 Second lead electrode portion 40 Ceramic body core portion precursor 42 First boundary line 44 Second boundary line 61 First inner layer main surface 62 Second inner layer main surface 63 First inner layer side surface 64 Second inner layer side surface 65 First inner layer end surface 66 Second inner layer end surface 90 Center position in length direction 91, 92 Length A Outer layer position B Side margin position O Origin L Length direction T Stacking direction W Width direction

Claims

1. An inner layer having a first inner layer and a second inner electrode layer alternately stacked via a dielectric layer formed of a first ceramic dielectric, the inner layer having a first inner layer main surface which is a surface in the stacking direction, a second inner layer main surface which is the surface opposite to the first inner layer main surface, a first inner layer side surface which is a surface in the width direction perpendicular to the first inner layer main surface and the second inner layer main surface from which the first inner electrode layer and the second inner electrode layer are drawn out, a second inner layer side surface which is the surface opposite to the first inner layer side surface from which the first inner electrode layer and the second inner electrode layer are drawn out, a first inner layer end surface which is a surface in the length direction perpendicular to the first inner layer main surface, the second inner layer main surface, the first inner layer side surface and the second inner layer side surface from which the first inner electrode layer is drawn out, and a second inner layer end surface which is the surface opposite to the first inner layer end surface from which the second inner electrode layer is drawn out, A first outer layer portion formed of a second ceramic dielectric, which covers the main surface of the first inner layer from the stacking direction, A second outer layer portion formed of a second ceramic dielectric, which covers the main surface of the second inner layer from the stacking direction, A first side margin portion, formed of a second ceramic dielectric, covers the inner layer, the first outer layer, and the second outer layer from one side in the width direction, A ceramic body having a second side margin portion formed of a second ceramic dielectric, which covers the inner layer portion, the first outer layer portion, and the second outer layer portion from the other side in the width direction, A multilayer ceramic capacitor comprising a terminal electrode provided on the ceramic body and connected to a part of the internal electrode layer, In the ceramic body, two faces opposite each other in the stacking direction are designated as the first main body surface and the second main body surface, two faces opposite each other in the width direction perpendicular to the stacking direction are designated as the first side surface and the second side surface, and two faces opposite each other in the length direction perpendicular to the stacking direction and the width direction are designated as the first end surface and the second end surface. The first length is defined as half the length of the first outer layer and the second outer layer in the stacking direction. The second length is set to one-third of the length in the width direction of the first side margin portion and the second side margin portion. In the cross-section of the ceramic element in a plane parallel to the width direction and the stacking direction at the central position in the length direction of the multilayer ceramic capacitor, At the interface between the first outer layer and the first side margin, from the first main surface of the element, in the direction of the second main surface of the element, at the position of the first length, At the interface between the first outer layer and the second side margin, from the first main surface of the element, in the direction of the second main surface of the element, at the position of the first length, At the interface between the second outer layer and the first side margin, the position of the first length is such that the direction from the second main surface of the element to the first main surface of the element is such that, At the interface between the second outer layer and the second side margin, the position of the first length is set as the origin from the second main surface of the element in the direction of the first main surface of the element, From each of the aforementioned origins, the outer layer position is defined as the position at a distance of the second length in the direction of the side surface of the element that is further away from the other of the two element surfaces. When the side margin position is defined as a position separated by the second length from each of the two origins in the direction of the side of the element that is closer to the other side of the element, When the silicon content relative to 100 mol of titanium at a specific location in the second ceramic dielectric is defined as the first silicon concentration, When focusing on one of the aforementioned origins, The difference between the first silicon concentration at the outer layer position relative to the origin and the first silicon concentration at the side margin position relative to the origin is 0.2 mol% or more and 2.5 mol% or less. The first silicon concentration at the origin is, A silicon concentration greater than or equal to the first silicon concentration at the outer layer position relative to the origin, or less than or equal to the first silicon concentration at the side margin position relative to the origin, or The silicon concentration at the outer layer position relative to the origin is less than or equal to the first silicon concentration at the side margin position relative to the origin. Multilayer ceramic capacitor.

2. In the cross-section of the ceramic element in a plane parallel to the width direction and the stacking direction at the central position in the length direction of the multilayer ceramic capacitor, The silicon content relative to 100 mol of titanium in the entire second ceramic dielectric forming the first outer layer, The silicon content relative to 100 mol of titanium in the entire second ceramic dielectric forming the second outer layer, The silicon content relative to 100 mol of titanium in the entire second ceramic dielectric forming the first side margin, and When the silicon content relative to 100 mol of titanium in the entire second ceramic dielectric forming the second side margin is defined as the second silicon concentration, The second silicon concentration in the first outer layer, the second outer layer, the first side margin, and the second side margin is 1.0 mol% or more and 3.5 mol% or less. The multilayer ceramic capacitor according to claim 1.

3. When the silicon content relative to 100 mol of titanium at a specific location in the first ceramic dielectric is defined as the third silicon concentration, When focusing on one of the aforementioned origins, The first silicon concentration at the outer layer position relative to the origin is smaller than the first silicon concentration at the side margin position relative to the origin. In the cross-section of the ceramic body in a plane parallel to the width direction and the stacking direction at the central position in the longitudinal direction of the multilayer ceramic capacitor, the third silicon concentration in the inner layer is smaller than the first silicon concentration at the outer layer position relative to the origin. A multilayer ceramic capacitor according to claim 1 or 2.

4. When focusing on one of the aforementioned origins, The median particle size of the dielectric particles contained in the dielectric layer near the origin is 0.4 times or more and 0.9 times or less the median particle size of the dielectric particles contained in the dielectric layer at the side margin position relative to the origin. A multilayer ceramic capacitor according to claim 1 or 2.