Semiconductor device manufacturing method

Abstract

The method for manufacturing a semiconductor device according to the present disclosure includes the steps of forming a lower-layer resist (4) on a substrate (1) having a plurality of electrode portions (2, 2a) on its surface, and patterning a first opening in the lower-layer resist (4) corresponding to the shape of an air bridge (7) connecting the plurality of electrode portions (2, 2a), forming a power supply layer (5) on the lower-layer resist (4) including the first opening, forming an upper-layer resist (6) on the power supply layer (5) and patterning a second opening in the upper-layer resist (6) corresponding to the shape of the air bridge (7), forming a plating film on the power supply layer (5) within the second opening to form an air bridge (7), and removing at least the upper-layer resist (6) by spraying dry ice particles.

Description

[Technical field]

[0001] The present disclosure relates to a method for manufacturing a semiconductor device. [Background technology]

[0002] In recent years, multi-level technology using digital coherent technology has been developed to cope with the increase in communication capacity. For example, Mach-Zehnder type optical modulators that can control the amplitude and phase of light and generate zero-chirp optical modulated signals are used as multi-level optical modulators. In addition, the response speed required for optical modulators continues to increase in order to increase the signal capacity per unit time. For this reason, there is a demand for optical modulators that can input modulated electrical signals of 64 GBaud or 96 GBaud or more with low loss and generate high-speed modulated optical signals through electrical-optical interaction.

[0003] In order to realize an optical modulator capable of the above-mentioned high-speed response, Mach-Zehnder optical modulators equipped with traveling-wave electrodes have been vigorously developed. By applying a high-frequency line structure optimized for driving by a differential signal as the traveling-wave electrode of the Mach-Zehnder optical modulator, driving by a differential driver with high power efficiency is realized. In order to achieve higher high-frequency characteristics in such a structure, it is ideal to realize a reduction in capacitance by incorporating a hollow structure (air bridge) or the like as a line connecting the traveling-wave electrode and the electrode pad of the driver. However, in the formation of an air bridge in a semiconductor device with severe unevenness such as a Mach-Zehnder optical modulator, low damage and improved resist removability are essential.

[0004] As an example of a resist removal method that causes little damage and has excellent resist removability, the lift-off method described in Patent Document 1 discloses a manufacturing method that improves lift-off properties by spraying dry ice (CO2) particles onto the photoresist, which is a lift-off pattern on a Si wafer, to remove the photoresist together with the metal film on the photoresist. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] JP 2000-058546 A Summary of the Invention [Problem to be solved by the invention]

[0006] The lift-off method described in Patent Document 1 uses lift-off to process a metal film into a preset shape, and the application of the lift-off method to an air bridge is not disclosed or even anticipated.

[0007] In order to form an air bridge, a manufacturing method has been generally used in which a lower resist layer, a power supply layer, and an upper resist layer are formed in this order, and then wiring electrodes such as plated wiring are formed. However, this manufacturing method has a problem in that it is difficult to use wet etching to remove the upper resist layer in order to prevent side etching of the lower resist layer. On the other hand, even if dry etching such as asher is used to remove the upper resist layer, there is a problem in that the resist deterioration occurs due to heat damage to the lower resist layer, and the removability of the resist deteriorates.

[0008] The present disclosure has been made to solve the problems described above, and aims to provide a method for reproducibly manufacturing a semiconductor device including an air bridge that has excellent reliability and pressure resistance characteristics by applying dry ice cleaning as a method for removing at least the upper layer resist when forming an air bridge. [Means for solving the problem]

[0009] A method for manufacturing a semiconductor device according to the present disclosure includes: A method for manufacturing a semiconductor device including an air bridge, comprising the steps of: forming a lower resist layer on a substrate having a plurality of electrode portions on a surface thereof, and patterning a first opening portion in the lower resist layer, the first opening portion corresponding to a shape of the air bridge connecting the plurality of electrode portions; forming a power supply layer on the lower resist layer including the first opening; forming an upper resist layer on the power supply layer, and patterning a second opening in the upper resist layer corresponding to a shape of the air bridge; forming the air bridge by depositing a plating film on the power supply layer in the second opening; The dry ice particles are sprayed from a fixed direction onto the wafer on which the substrate is formed, while the spray nozzle is moved back and forth from the side opposite the orientation flat to the orientation flat side, At least the upper resist layer Excluding and a removing step. Effect of the Invention

[0010] According to the manufacturing method of a semiconductor device disclosed herein, dry ice cleaning is applied as a method for removing at least the upper resist layer, thereby achieving the effect of reproducibly manufacturing semiconductor devices that have excellent reliability and voltage resistance characteristics and a low defect rate. [Brief description of the drawings]

[0011] [Figure 1] 1 is a top view illustrating a structure of a Mach-Zehnder type optical modulator, which is an example of a semiconductor device according to a first embodiment. [Diagram 2] 2 is an enlarged top view of a portion where an air bridge is formed in the Mach-Zehnder optical modulator, which is an example of the semiconductor device according to the first embodiment. FIG. [Diagram 3] 1 is a cross-sectional view of a typical air bridge in a semiconductor device. [Figure 4] 4 is a process flow diagram illustrating a manufacturing process of an air bridge in the manufacturing method of the semiconductor device according to the first embodiment. FIG. [Diagram 5] 5A to 5C are cross-sectional views illustrating a method for manufacturing an air bridge in the method for manufacturing a semiconductor device according to the first embodiment. [Figure 6] 5A to 5C are cross-sectional views illustrating a method for manufacturing an air bridge in the method for manufacturing a semiconductor device according to the first embodiment. [Figure 7] 5A to 5C are cross-sectional views illustrating a method for manufacturing an air bridge in the method for manufacturing a semiconductor device according to the first embodiment. [Figure 8] 5A to 5C are cross-sectional views illustrating a method for manufacturing an air bridge in the method for manufacturing a semiconductor device according to the first embodiment. [Figure 9] 5A to 5C are cross-sectional views illustrating a method for manufacturing an air bridge in the method for manufacturing a semiconductor device according to the first embodiment. [Figure 10] 5A to 5C are cross-sectional views illustrating a method for manufacturing an air bridge in the method for manufacturing a semiconductor device according to the first embodiment. [Figure 11] 5A to 5C are cross-sectional views illustrating a method for manufacturing an air bridge in the method for manufacturing a semiconductor device according to the first embodiment. [Figure 12] 5A to 5C are cross-sectional views illustrating a method for manufacturing an air bridge in the method for manufacturing a semiconductor device according to the first embodiment. [Figure 13] 4 is a schematic diagram showing a direction in which dry ice particles are sprayed onto a wafer in the method for manufacturing a semiconductor device according to the first embodiment. FIG. [Figure 14] 5A to 5C are cross-sectional views illustrating a method for manufacturing an air bridge in the method for manufacturing a semiconductor device according to the first embodiment. [Figure 15] FIG. 11 is a process flow diagram illustrating a manufacturing process of an air bridge in a manufacturing method of a semiconductor device according to a second embodiment. [Figure 16] 10A to 10C are cross-sectional views illustrating a method for manufacturing an air bridge in a method for manufacturing a semiconductor device according to a second embodiment. [Figure 17] 10A to 10C are cross-sectional views illustrating a method for manufacturing an air bridge in a method for manufacturing a semiconductor device according to a second embodiment. [Figure 18] 10A to 10C are cross-sectional views illustrating a method for manufacturing an air bridge in a method for manufacturing a semiconductor device according to a second embodiment. [Figure 19] 10A to 10C are cross-sectional views illustrating a method for manufacturing an air bridge in a method for manufacturing a semiconductor device according to a second embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0012] Embodiment 1 Fig. 1 is a top view showing the structure of a Mach-Zehnder optical modulator 101, which is an example of a semiconductor device according to embodiment 1. Fig. 2 is an enlarged top view of a portion where an air bridge is formed in the Mach-Zehnder optical modulator 101, which is an example of a semiconductor device according to embodiment 1. Fig. 2 corresponds to the region surrounded by a dotted line in Fig. 1.

[0013] <Structure of a Mach-Zehnder type optical modulator, which is an example of a semiconductor device> The Mach-Zehnder type optical modulator 101 is composed of an optical input waveguide 102 that guides light incident from the outside, an optical output waveguide 103 that outputs the processed light to the outside, an MMI (Multi-Mode Interference) coupler 104 that splits the input light into two lights, an MMI coupler 105 that combines the two input lights into one light, a pair of traveling wave electrodes 108 and 109 that apply an electric signal to the optical waveguide to modulate the light propagating through the optical waveguide, arm waveguides 106 and 107 that guide the modulated light to a subsequent stage, ground lines 110 and 111 that supply a ground potential, a termination resistor 112, phase adjusters 113 and 114 that adjust the phase of the modulated light, a metal electrode 115, a mesa (separation groove) 116, an electrode pad 117, an air bridge 118, and an insulating protective film 120 that protects the surface.

[0014] As shown in FIG. 2, an air bridge 118 is formed above the optical input waveguide 102 to electrically connect the electrode pad 117 and the traveling wave electrode 109 .

[0015] <Air bridge in semiconductor device> 3 is a cross-sectional view of a typical air bridge 7 used in a semiconductor device manufactured by the manufacturing method of a semiconductor device according to the first embodiment. The air bridge 7 is composed of a processed substrate 1 (hereinafter also referred to as substrate) on which each part required for a semiconductor device is formed, a traveling wave electrode 2 and an electrode pad 2a such as a driver (hereinafter simply referred to as electrode pad 2a) formed on the surface of the processed substrate 1, an insulating protective film 3 covering the surface of the processed substrate 1 and having openings for the traveling wave electrode 2 and the electrode pad 2a, respectively, a power supply layer 5 electrically connected to the traveling wave electrode 2 and the electrode pad 2a at the openings of the insulating protective film 3, respectively, and spatially separated from the insulating protective film 3 between the traveling wave electrode 2 and the electrode pad 2a, and an air bridge 7 formed on the power supply layer 5. Note that the air bridge 7 and the power supply layer 5 in close contact with the lower part of the air bridge 7 may be collectively referred to as an air bridge. Also, the traveling wave electrode 2 and the electrode pad 2a are collectively referred to as an electrode part.

[0016] <Processed substrate> The processed substrate 1 is processed to correspond to the semiconductor device to be manufactured. An example of the processed substrate 1 is a substrate that uses an epitaxial crystal growth substrate mainly composed of a III-V group compound semiconductor such as gallium nitride (GaN) or indium phosphide (InP) and has already been subjected to recrystallization growth or substrate processing to correspond to the element structure of the semiconductor device to be manufactured.

[0017] For example, in the case of a GaN-based semiconductor device, epitaxial crystal growth of aluminum gallium nitride (AlGaN) or aluminum nitride (AlN) is carried out on a GaN on SiC (silicon nitride) substrate or a GaN on Si (silicon) substrate to form a field effect transistor (HEMT: High Electron Mobility Transistor) structure in which gate, source, and drain electrodes are already formed, serving as the processed substrate 1.

[0018] Examples of optical elements include a distributed feedback laser (DFB), an electro-absorption modulator integrated laser (EML), and a Mach-Zehnder type optical modulator.

[0019] A multi-quantum well (MQW) active layer made of III-V compound semiconductors such as aluminum gallium indium arsenide (AlGaInAs) and indium gallium arsenide phosphide (InGaAsP) is formed on an InP substrate as an optical waveguide, and then a recrystallized grown substrate on which a block layer, contact layer, etc. are formed is subjected to ridge processing to form an optical waveguide and traveling wave electrode, and this substrate is used as the processed substrate 1.

[0020] <Air bridge manufacturing method> In the method for manufacturing a semiconductor device according to the first embodiment, a Mach-Zehnder optical modulator using an InP substrate is taken as an example of a semiconductor device. The manufacturing process of an air bridge in the manufacturing process of a Mach-Zehnder optical modulator will be described below.

[0021] 4 is a process flow diagram illustrating the manufacturing process of an air bridge in the manufacturing method of the semiconductor device according to the first embodiment. The manufacturing process of the air bridge includes the following steps: a process ST101 for preparing a substrate to be processed, a process ST102 for forming a protective film, a process ST103 for forming a lower-layer resist pattern, a process ST104 for forming a power supply layer, a process ST105 for forming an upper-layer resist pattern, a process ST106 for forming an air bridge, a process ST107 for removing an upper-layer resist, a process ST108 for removing a power supply layer, and a process ST109 for removing a lower-layer resist. Each step will be described in detail below.

[0022] <Processing board manufacturing process ST101> First, a processed substrate 1 corresponding to the Mach-Zehnder optical modulator to be manufactured is prepared using a known manufacturing method. One example of processing corresponding to the Mach-Zehnder optical modulator is recrystallization growth. Figure 5 is a cross-sectional view of the processed substrate 1 after recrystallization growth and processing into a Mach-Zehnder optical modulator have already been completed. Note that in Figure 5, each part in the processed substrate 1 for forming the Mach-Zehnder optical modulator is omitted.

[0023] 6 shows a cross-sectional view of a processed substrate 1 on which a traveling-wave electrode 2 and an electrode pad 2a are formed on the surface, as an example of a processed substrate 1 corresponding to a Mach-Zehnder type optical modulator. The film formation method of the traveling-wave electrode 2 and the electrode pad 2a may be, for example, a vapor deposition method or a sputtering method. As the metal material constituting the traveling-wave electrode 2 and the electrode pad 2a, a metal material stable as a wiring electrode is suitable. Specifically, an alloy using multiple metals is applied from metal materials such as gold (Au), titanium (Ti), aluminum (Al), platinum (Pt), and nickel (Ni).

[0024] <Protective film formation process ST102> An insulating protective film 3 is formed on the surface of the processed substrate 1 on which the traveling wave electrode 2 and the electrode pad 2a are formed, in order to improve reliability and withstand voltage characteristics and suppress process damage. The insulating protective film 3 has openings corresponding to the traveling wave electrode 2 and the electrode pad 2a, respectively. FIG. 7 is a cross-sectional view after the insulating protective film 3 and the openings are formed. As the film type of the insulating protective film 3, oxide films such as silicon oxide (SiO) and aluminum oxide (AlO), and nitride films such as silicon nitride (SiN) and AlN are often used. As the film type of the insulating protective film 3 of the present disclosure, an oxide or nitride of an element selected from Si, Al, Ti, tantalum (Ta), tungsten (W), molybdenum (Mo), and zirconium (Zr) may also be applied.

[0025] The insulating protective film 3 may be formed by plasma-enhanced chemical vapor deposition (PE-CVD), catalytic chemical vapor deposition (Cat-CVD), sputtering, atomic layer deposition (ALD), or the like. A laminated film of two or three layers of different film types may also be used. Furthermore, multiple film formation methods may be selected. One example of selecting multiple film formation methods is a method in which a SiN film is formed by PE-CVD, and then an AlO film is formed by ALD.

[0026] <Lower layer resist pattern forming process ST103> A lower resist layer 4 is formed by applying a resist to the entire surface of the processed substrate 1 on which the insulating protective film 3 has been formed. Using photolithography and etching techniques, openings for the electrode parts (first openings), i.e., resist patterns for openings for the electrode parts, are provided in the lower resist layer 4 at locations corresponding to the traveling wave electrode 2 and electrode pad 2a connected by an air bridge 7. FIG. 8 is a cross-sectional view after the openings for the electrode parts (first openings) have been formed in the lower resist layer 4.

[0027] In the lower-layer resist pattern formation step ST103, a negative resist that can be easily made thick is often used as the resist because the film thickness of the lower-layer resist 4 is approximately equal to the height of the air bridge 7. However, for optical elements such as Mach-Zehnder type optical modulators, a resin with excellent flatness, such as polyimide or benzocyclobutene (BCB), may be used because the lower-layer resist also plays a role in bridging high step portions such as high mesa ridges.

[0028] <Power supply layer formation process ST104> On the lower resist layer 4 provided with the openings for the electrode parts, the power supply layer 5a required in the plating forming process, which is a later process, is formed. FIG. 9 is a cross-sectional view of the power supply layer 5a formed. In the power supply layer forming process ST104, when the height of the air bridge 7 is several μm or more, or when the air bridge 7 is formed on a high step part such as a high mesa ridge, it is desirable to form the power supply layer 5a by a sputtering method, taking into consideration the coverage to the resist side surface. However, when there is no high step part on the processing substrate 1, a deposition method or the like may be used instead of the sputtering method. In addition, as the type of metal material used for the power supply layer 5a, an alloy using multiple metals such as Au, Ti, Al, Pt, Ni, etc., such as Ti / Au, is preferably used.

[0029] <Upper layer resist pattern forming process ST105> Next, a resist is applied onto the power supply layer 5a to form an upper resist layer 6. A resist pattern corresponding to the shape of the air bridge 7, i.e., an opening (second opening), is formed in the upper resist layer 6 using photolithography and etching techniques. FIG. 10 is a cross-sectional view of the upper resist layer 6 after a pattern corresponding to the shape of the air bridge is formed. The film thickness of the upper resist layer 6 must be determined taking into account the film thickness of the air bridge 7, but there is no particular restriction on the type of resist. However, a necessary condition for the material of the upper resist layer 6 is that it has resistance to an electrolyte when forming an air bridge by electrolytic plating or electroless plating, which will be described later.

[0030] <Air bridge formation process ST106> An air bridge 7 made of a plating film is formed on the power supply layer 5a exposed at the bottom of the air bridge pattern (second opening) of the upper resist layer 6 by electrolytic plating or electroless plating. FIG. 11 is a cross-sectional view of the processed substrate 1 including the air bridge 7 after the air bridge has been formed. Examples of plating materials include Ni, Au, chromium (Cr), zinc (Zn), and tin (Sn). Note that Au is most commonly used as the metal plating that constitutes the air bridge in semiconductor surface processing.

[0031] <Upper layer resist removal process ST107> Next, the upper resist layer 6 is removed. FIG. 12 is a cross-sectional view of the upper resist layer 6 after it has been removed. For resist removal, wet etching is usually used. However, air bridges 7 generally tend to have high step patterns, and when processing areas with high steps by wet etching, there are areas where the wet etching solution can easily penetrate and areas where it cannot easily penetrate. Therefore, when air bridge formation is processed by wet etching, etching unevenness and resist residues occur within the wafer surface, which can cause process problems or reliability problems in subsequent steps.

[0032] To deal with this problem, a method of removing the resist by dry etching using an asher or the like is often applied. However, for example, the lower-layer resist 4 may be thermally damaged by the dry etching and altered, and resist residues may be generated when the lower-layer resist is removed, which may cause problems such as a decrease in the breakdown voltage of the semiconductor device.

[0033] In order to solve the above problems, in the manufacturing method of the semiconductor device according to the first embodiment, the resist is removed by spraying dry ice particles onto the surface (hereinafter referred to as dry ice cleaning). The mechanism of resist removal by dry ice cleaning is considered to be that the dry ice particles penetrate into the lower part of the resist when sprayed, and the dry ice particles expand when vaporized to peel off the resist.

[0034] Dry ice cleaning causes no damage due to high temperatures, and does not damage the air bridge 7 made of a plating film formed by plating. In addition, there is no unintended etching effect such as side etching of the power supply layer 5a and the lower resist layer 4.

[0035] In addition to the above effects, dry ice cleaning can also simultaneously remove dust and other foreign matter adhering to the wafer surface, which can unintentionally act as a mask in the next process, such as ion milling, and can therefore be used to remove foreign matter that could cause processing abnormalities.

[0036] In other words, by using dry ice cleaning when removing the upper resist layer, it is possible to suppress the deterioration of the lower resist layer and improve the removability of the resist. In addition, as a secondary effect of dry ice cleaning, it is also possible to suppress surface foreign matter. As a result, it is possible to improve the reliability and withstand voltage characteristics of the semiconductor device, reduce the defect rate, and realize a reduction in capacitance, which is a characteristic of air bridges.

[0037] Fig. 13 shows an example of a method for performing dry ice cleaning. As shown in Fig. 13, dry ice particles are always sprayed from a fixed direction onto a 3-inch InP wafer 15 on which a processed substrate 1 has been formed, while the spray nozzle is moved back and forth from the side opposite the orientation flat to the orientation flat side. This is to limit spraying from only one direction to prevent re-adhesion of resist, foreign matter, etc. However, when removing the lower-layer resist 4, which will be described later, it is necessary to remove the lower-layer resist 4 formed directly below the piers of the air bridge 7, so it is important to spray the dry ice particles perpendicular to the direction in which the air bridge 7 is bridged, that is, parallel to the extension direction of the air bridge.

[0038] In addition to the above-mentioned jetting conditions, other jetting conditions for dry ice particles include jet nozzle, jet pressure, particle size, distance between the wafer and nozzle, dew prevention, on-wafer stage feed speed, etc. Detailed settings for each item need to be changed appropriately depending on the width, size, film thickness, etc. of the air bridge 7. For example, it is preferable to apply conditions such as a jetting pressure of 1 MPa or less and a particle size of 30 μm or less for dry ice particles used in a manufacturing method for a Mach-Zehnder type optical modulator, which is an example of a semiconductor device.

[0039] <Power supply layer removal process ST108> After removing the upper resist layer 6 by dry ice cleaning, unnecessary parts of the power supply layer 5a are removed. FIG. 14 is a cross-sectional view of the power supply layer 5a after removing the unnecessary parts. The method of removing the power supply layer 5a depends on the type of metal material constituting the power supply layer 5a. The method of selectively removing the power supply layer 5a by wet etching is not very suitable because side etching occurs in the power supply layer 5a below the plating film, which causes plating peeling. In addition, it is difficult to remove the metal material constituting the power supply layer 5a by dry etching. Therefore, it is most common and preferable to physically remove the unnecessary parts of the power supply layer 5a by means of ion milling or the like.

[0040] <Underlayer resist removal process ST109> Finally, the lower resist layer 4 is removed. By removing the lower resist layer 4, the air bridge 7 is completed. That is, FIG. 3 is a cross-sectional view of the air bridge after completion. Regarding the method of removing the lower resist layer 4, it is necessary to remove the resist that has infiltrated under the air bridge 7, so in the past, removal by wet etching was essential. However, if an attempt is made to remove the resist that has been hardened, that is, altered, by ion milling using only wet etching, there is a high possibility of defects occurring, such as resist residues in the hardened and altered resist portions.

[0041] Therefore, in the manufacturing method of the semiconductor device according to the first embodiment, when removing the lower-layer resist 4, a two-stage etching method is used in which the hardened resist portion of the lower-layer resist 4 is first removed by dry ice cleaning, and then the resist below the air bridge 7 is removed by wet etching. As a result, the generation of resist residue below the air bridge 7 can be suppressed, so there is no damage to the semiconductor surface, and it is possible to prevent the generation of foreign matter on the surface, making it possible to eliminate all of the causes of defects related to the formation of the air bridge. Through the above steps, the air bridge 7 is completed on the processed substrate 1.

[0042] <Advantages of the First Embodiment> As described above, according to the manufacturing method of a semiconductor device according to the first embodiment, dry ice cleaning is applied as a method for removing at least the upper layer resist, thereby achieving the effect of easily manufacturing a semiconductor device having excellent reliability and voltage resistance characteristics and a low defect rate.

[0043] Embodiment 2 The air bridge 7a used in the semiconductor device manufactured by the method for manufacturing a semiconductor device according to the second embodiment is shaped identically to the air bridge 7 shown in Fig. 3. The method for manufacturing a semiconductor device according to the second embodiment is different in that the air bridge 7a is not formed by plating as in the first embodiment, but is fabricated by using a vapor deposition method and a wet lift-off method. The wet lift-off method is an example of lift-off.

[0044] When forming the air bridge 7a using the vapor deposition method and the wet lift-off method, it is possible to use only a two-layer resist without using a power supply layer, but in this case, it is important to devise a resist configuration and to use a method having high lift-off properties. In the method for manufacturing a semiconductor device according to the second embodiment, high lift-off properties are achieved by using dry ice cleaning to lift off the metal film that constitutes the air bridge. The air bridge formation process in the method for manufacturing a semiconductor device according to the second embodiment will be described below.

[0045] 15 is a process flow diagram for explaining the manufacturing process of an air bridge in the manufacturing method of a semiconductor device according to the second embodiment. The manufacturing process of an air bridge includes the following steps: a process substrate fabrication step ST201, a protective film formation step ST202, a lower layer resist pattern formation step ST203, an upper layer resist pattern formation step ST204, an air bridge formation step ST205, a lift-off step ST206, and a remaining resist removal step ST207. The steps up to the process substrate fabrication step ST201 and the protective film formation step ST202 are common to the steps in the manufacturing method of a semiconductor device according to the first embodiment, and therefore will not be described here. Each step after the lower layer resist pattern formation step ST203 will be described in detail below.

[0046] <Lower layer resist pattern forming process ST203> A resist is applied to the entire surface of the processed substrate 1 on which the insulating protective film 3 is formed, to form a lower resist layer 4a. Using photolithography and etching techniques, a resist pattern, i.e., an opening (first opening) for the electrode portion is provided in the lower resist layer 4 at a portion corresponding to the traveling wave electrode 2 and the electrode pad 2a connected by the air bridge 7a. FIG. 16 is a cross-sectional view after the opening (first opening) for the electrode portion is formed. In the lower resist pattern forming step ST203, since the film thickness of the lower resist layer 4a is almost equal to the height of the air bridge 7, a negative resist that is easy to thicken is often used as the resist. However, for the lower resist layer 4a, a positive resist may be used instead of a negative resist, taking into account the ease of lift-off performed in a later step.

[0047] <Upper layer resist pattern forming process ST204> Next, a resist is applied onto the lower resist layer 4a to form an upper resist layer 8. Using photolithography and etching techniques, an opening (second opening) corresponding to the shape of the air bridge is formed in the upper resist layer 8. Fig. 17 is a cross-sectional view after the air bridge pattern is formed in the upper resist layer 8. Unlike the method for manufacturing a semiconductor device according to the first embodiment, plating is not used, so there is no need to form a power supply layer.

[0048] The thickness of the upper resist layer 8 must be determined taking into consideration the thickness of the air bridge 7a. In addition, it is preferable to use a resist material that has an inverse tapered shape for the upper resist layer 8 in order to improve lift-off properties. It is also important to use a resist material that expands when subjected to a thermal history such as baking, so that the upper resist layer 8 can have a shape that expands relative to the lower resist layer 4a.

[0049] <Air bridge formation process ST205> Using the air bridge pattern (second opening) of the upper resist layer 8 as a mask, an air bridge metal film 9 is formed by deposition or the like. Fig. 18 is a cross-sectional view of the processed substrate 1 including the air bridge metal film 9 after the air bridge metal film 9 has been formed. Unlike the plating film of the first embodiment, the air bridge metal film 9 is difficult to thicken. However, the air bridge metal film 9 can be alloyed.

[0050] For example, as a specific example of the metal material of the air bridge metal film 9, an alloy using Au, Ti, Al, Pt, Ni, etc., which is the same metal material as the traveling wave electrode 2 and the electrode pad 2a, may be applied. However, if a highly isotropic sputtering method or the like is used as a method for forming the air bridge metal film 9, there is a high possibility that the metal film will adhere to the resist sidewall, causing problems such as burrs and lift-off failure. Therefore, it is preferable to use a deposition method that is more anisotropic than the sputtering method as a method for forming the air bridge metal film 9.

[0051] <Lift-off process ST206> After forming the metal film 9 for the air bridge, the upper resist layer 8 and the lower resist layer 4a are simultaneously removed by dry ice cleaning. Fig. 19 is a cross-sectional view of the air bridge made of the evaporated film after the lift-off is completed. The method of dry ice cleaning can be the same as that described in the first embodiment, that is, the method shown in Fig. 13.

[0052] In the first embodiment, the upper resist layer 6 and the lower resist layer 4 are in principle removed separately by dry ice cleaning. On the other hand, in the second embodiment, the upper resist layer 8 and the lower resist layer 4a can be simultaneously removed by one dry ice cleaning. Therefore, in the second embodiment, the air bridge can be formed in fewer steps than in the first embodiment, and the manufacturing cost of the semiconductor device can be reduced.

[0053] <Remaining resist removal process ST207> After lift-off by dry ice cleaning, the resist remaining under the air bridge 7a is removed by wet etching. Through the above steps, the air bridge 7a is completed.

[0054] <Advantages of the second embodiment> As described above, according to the manufacturing method of the semiconductor device of the second embodiment, lift-off using dry ice cleaning is applied when forming the air bridge, so that it is possible to reduce the number of steps compared to the first embodiment. Furthermore, since the power supply layer required for plating film formation in the first embodiment is not required in the second embodiment, the electrode etching step using ion milling is also not required and there is no concern about deterioration of the resist. Therefore, it is possible to obtain an effect of obtaining a manufacturing method that can easily manufacture a semiconductor device that is free from damage to the surface of the semiconductor layer and has excellent reliability.

[0055] In the first and second embodiments, a Mach-Zehnder optical modulator has been described as an example of a semiconductor device to be manufactured. However, the manufacturing methods of the semiconductor device according to the first and second embodiments can be applied to any semiconductor device having an air bridge other than the Mach-Zehnder optical modulator.

[0056] Although the present disclosure describes various exemplary embodiments and examples, the various features, aspects, and functions described in one or more embodiments are not limited to application to a particular embodiment, but may be applied to the embodiments alone or in various combinations.

[0057] Therefore, countless modifications not illustrated are assumed within the scope of the technology of the present disclosure, including, for example, modifying, adding, or omitting at least one component, and further, extracting at least one component and combining it with a component of another embodiment. [Explanation of symbols]

[0058] 1 Processed substrate, 2, 108, 109 Traveling wave electrode, 2a, 117 Electrode pad, 3, 120 Insulating protective film, 4, 4a Lower layer resist, 5, 5a Power supply layer, 6, 8 Upper layer resist, 7, 7a, 118 Air bridge, 9 Metal film for air bridge, 15 3-inch InP wafer, 101 Mach-Zehnder type optical modulator, 102 Optical input waveguide, 103 Optical output waveguide, 104, 105 MMI coupler, 106, 107 Arm waveguide, 110, 111 Ground line, 112 Termination resistor, 113, 114 Phase adjuster, 115 Metal electrode, 116 Mesa (separation groove)

Claims

1. 1. A method of manufacturing a semiconductor device including an air bridge, comprising: forming a lower resist layer on a substrate having a plurality of electrode portions on a surface thereof, and patterning a first opening portion in the lower resist layer, the first opening portion corresponding to the shape of the air bridge connecting the plurality of electrode portions; forming a power supply layer on the lower resist layer including the first opening; forming an upper resist layer on the power supply layer, and patterning a second opening portion in the upper resist layer corresponding to the shape of the air bridge; forming the air bridge by depositing a plating film on the power supply layer in the second opening; a step of spraying dry ice particles from a predetermined direction onto the wafer on which the substrate has been formed, while reciprocating a spray nozzle from the side opposite the orientation flat to the orientation flat side, thereby removing at least the upper resist layer; A method for manufacturing a semiconductor device comprising:

2. 2. The method for manufacturing a semiconductor device according to claim 1, wherein in addition to removing the upper resist layer, at least a part of the lower resist layer is removed by blasting the dry ice particles.

3. 3. The method for manufacturing a semiconductor device according to claim 2, further comprising the step of removing the remaining lower-layer resist by wet etching after removing at least a portion of the lower-layer resist by spraying dry ice particles.

4. 4. The method for manufacturing a semiconductor device according to claim 1, wherein the dry ice particles are sprayed in a direction perpendicular to a direction in which the air bridge is formed.

5. 4. The method for manufacturing a semiconductor device according to claim 1, further comprising the step of removing an unnecessary portion of the power supply layer after removing the upper resist layer.

6. 1. A method of manufacturing a semiconductor device including an air bridge, comprising: forming a lower resist layer on a substrate having a plurality of electrode portions on a surface thereof, and patterning a first opening portion in the lower resist layer, the first opening portion corresponding to the shape of the air bridge connecting the plurality of electrode portions; forming an upper-layer resist on the lower-layer resist including the first opening, and patterning a second opening in the upper-layer resist corresponding to the shape of the air bridge; forming a metal film on the upper resist layer including the second opening; forming the air bridge by lift-off, which removes the upper and lower resist layers by spraying dry ice particles onto the wafer on which the substrate has been formed from a fixed direction while reciprocating a spray nozzle from the side opposite the orientation flat to the orientation flat side; A method for manufacturing a semiconductor device comprising:

7. 7. The method for manufacturing a semiconductor device according to claim 6, wherein the metal film is formed by vapor deposition.

8. 8. The method for manufacturing a semiconductor device according to claim 1, wherein each portion constituting a Mach-Zehnder optical modulator is pre-processed on the substrate.

9. 8. The method for manufacturing a semiconductor device according to claim 1, wherein the predetermined direction is a direction parallel to the extension direction of the air bridge.

10. 8. The method for manufacturing a semiconductor device according to claim 1, wherein an insulating protective film is formed on the substrate.

11. 8. The method for manufacturing a semiconductor device according to claim 1, wherein the air bridge is applied to the electrode portion including a traveling wave electrode of a Mach-Zehnder type optical modulator.

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