ELECTROSTATIC PROTECTION DEVICE

Abstract

An electrostatic protection device for protecting an input port of an electronic circuit. The electrostatic protection device includes a first stacked coil, a second stacked coil, and an input terminal, wherein the second stacked coil is inductively coupled to the first stacked coil. The first stacked coil comprises a first coil input connected to the input terminal, a first coil output port connected to a lower-frequency ESD protection circuit, and a first coil termination port connected to a termination load, wherein the lower-frequency ESD protection circuit comprises a lower-frequency output. The second stacked coil comprises an output port connected to a higher-frequency ESD protection circuit, wherein the higher-frequency ESD protection circuit comprises a higher-frequency output.The electrostatic protection device comprises a summing circuit configured to output a sum of the highest frequency output and the lowest frequency output.

Description

ELECTROSTATIC PROTECTION DEVICE Field and Background of the Invention

[0001] The present invention relates to integrated circuits, in particular to the electrostatic protection of input ports for integrated circuits.

[0002] Integrated circuits (ICs) may incorporate dedicated circuitry to protect them against electrostatic discharge (ESD) events on their input / output (I / O) pads. Compliance with this ESD protection requirement can be challenging when transmitting and / or receiving broadband high-frequency signals through the IC's I / O pads.

[0003] ESD protection devices in integrated circuits often comprise devices such as inductors and coils. As integrated circuit dimensions shrink and clock speeds increase, it is difficult or sometimes not even possible to scale ESD protection device designs. Existing ESD protection device designs often do not provide the necessary bandwidth. Brief Description of the Invention

[0004] In one aspect, the invention relates to an electrostatic shielding device for protecting an input port of an electronic circuit. The electronic shielding device comprises a first stacked coil and a second stacked coil. The first stacked coil and the second stacked coil can be stacked on top of each other. When formed in an integrated circuit, the first stacked coil and the second stacked coil can be physically formed one on top of the other.

[0005] The electrostatic protection device comprises an input terminal. The first stacked coil comprises a first coil input connected to the input terminal. The first stacked coil comprises a first coil output port connected to a lower-frequency ESD protection circuit. The first stacked coil comprises a first coil termination port connected to a termination load. The second stacked coil is inductively coupled to the first stacked coil. The second stacked coil comprises an output port connected to a higher-frequency ESD protection circuit. The higher-frequency ESD protection circuit comprises a higher-frequency output. The lower-frequency ESD protection circuit comprises a lower-frequency output.The electrostatic protection device comprises a summing circuit configured to output a sum of the higher frequency output and the lower frequency output to the input port of the electronic circuit.

[0006] According to a further aspect of the present invention, the invention further provides an integrated circuit incorporating the electrostatic protection device to protect an input port of an electronic circuit. Brief Description of the Figures

[0007] In the following, the embodiments of the invention are explained in greater detail, by way of example only, by reference to the figures in which:

[0008] Figure 1 illustrates an example of an electrostatic protection device;

[0009] Figure 2 illustrates an example of a first stacked coil and a second stacked coil; iviA / a / zuzo / uii uoh

[0010] Figure 3 shows a graph of the transmission frequency from a circuit simulation of the electrostatic device shown in Figure 1;

[0011] Figure 4 illustrates the bandwidth provided by the electrostatic shielding device of Figure 1 as seen in an eye diagram;

[0012] Figure 5 illustrates an example of an integrated circuit;

[0013] Figure 6 illustrates a further example of an electrostatic protection device;

[0014] Figure 7 illustrates a further example of an electrostatic protection device;

[0015] Figure 8 illustrates a further example of an electrostatic protective device; and

[0016] Figure 9 illustrates a further example of an electrostatic protection device. Detailed Description of the Invention

[0017] The descriptions of the various embodiments of the present invention are presented for illustrative purposes but are not intended to be exhaustive or limited to the disclosed embodiments. Many modifications and variations will be evident to those skilled in the art without departing from the scope of the described embodiments. The terminology used herein was chosen to better explain the principles of the embodiments, their practical application or technical improvement over existing technologies, or to enable others skilled in the art to understand the embodiments disclosed herein.

[0018] The embodiments of the present invention are advantageous because they provide an effective means of increasing the bandwidth of an electrostatic protection device. The signal is split into lower and higher frequency components, which are then processed separately and recombined. The terms lower frequency ESD protection circuit and higher frequency ESD protection circuit are used to distinguish between the two separate ESD protection circuits. The terms higher frequency output and lower frequency output are used to distinguish between or name the two different frequency outputs used in the circuit.

[0019] In some embodiments, both the human body model (HBM) electrostatic discharge (ESD) protection circuit and the load device model (CDM) ESD protection circuit may refer to ESD protection circuits that incorporate clamping circuits, such as diodes, connected to both power supply rails (supply and ground). HBM and CDM ESD devices may also, in practice, incorporate a capacitance to ground resulting from the diode junction capacitance and the parasitic wiring capacitance of the diodes. For the CDM diode, this capacitance is the parasitic diode junction capacitance and the input RX capacitance. Load device ESD protection may further incorporate a resistor and / or impedance in series with a current-limiting input, and separate HBM and CDM protection circuits.

[0020] In another embodiment, the first stacked coil and the second stacked coil form a crossover network configured to split a signal input at the input terminal into a higher frequency component and a lower frequency component. The use of the inductive circuit provides a means of naturally splitting the input signal into these two components. The higher frequency component is generated by the higher frequency output, and the lower frequency component is generated by the lower frequency output. iviA / a / zuzó / uii uoh

[0021] A potential advantage of this configuration is that the higher and lower frequency components of an ESD event can have different current amounts. For example, the lower frequency component of the ESD event typically has a higher current than the higher frequency component. This effect can be used to design an effective electrostatic protection device. The first stacked coil and the second stacked coil can effectively form a crossover network that decouples the higher frequency ESD protection circuit from the lower frequency component of the ESD event. This can allow the higher frequency ESD protection circuit and the lower frequency ESD protection circuit to have their components tailored to each particular type of ESD event.For example, the higher frequency ESD protection circuit can be designed with a lower current rating than the lower frequency ESD protection circuit.

[0022] In another configuration, the first stacked coil is a t-coil with a single coil tap. In this configuration, a t-coil structure is used for the lowest frequency component. This can be advantageous because it is relatively simple to construct the t-coil with a single tap and a lower-frequency ESD protection circuit so that it can handle higher currents. However, this can impair its ability to respond to higher frequencies. Therefore, it is beneficial to couple the t-coil with the higher-frequency ESD protection circuit to increase bandwidth.

[0023] In another embodiment, the single coil tap divides the first stacked coil into a first coil portion and a second coil portion. The single coil tap is the first coil output. The second coil portion connects between the single coil tap and the coil termination port. The first coil portion connects between the single coil tap and the first coil input.

[0024] In another configuration, the inductive coupling between the first coil portion and the second stacked coil is greater than the inductive coupling between the second coil portion and the second stacked coil. This configuration can be advantageous during the construction of the electrostatic protection device because the signal captured in the first coil portion can be more accurate. For example, if a signal passes through the first coil portion and then the second coil portion, the inductance of the first coil portion can cause degradation in the high-frequency signal component. Another advantage is that the current in the first coil portion can be higher. Therefore, it can increase the capacity for inductive coupling to occur.

[0025] In another embodiment, the second stacked coil comprises a reference port connected to a ground plane of the electrostatic protection device. This embodiment can be advantageous because it can provide an effective means of referencing the high- and low-frequency components.

[0026] In another embodiment, the lower-frequency ESD protection circuit comprises a human body model ESD protection circuit. This can be beneficial because the human body model ESD protection circuit can be specifically designed to handle the highest current, lowest frequency component of an ESD event.

[0027] In another embodiment, the lower-frequency ESD protection circuit comprises an additional-load device-model ESD protection circuit. The various frequency components can be divided into upper, higher, and lower portions, but there may still be some portion of the higher-frequency component of the pulse. IVIA / a / ZUZÓ / UI IUOH ESD passes through the first stacked coil. Therefore, incorporating an additional load device model ESD protection circuit can be beneficial and increase the effectiveness of the ESD protection.

[0028] In another embodiment, the first stacked coil comprises a first coil tap and a second coil tap. The lower-frequency ESD protection circuit is connected to the first coil tap and the second coil tap. This embodiment is similar to a t-coil arrangement, but instead of the first stacked coil being divided into two parts, it is divided into three parts. This may allow for a more sophisticated lower-frequency ESD protection circuit.

[0029] In another embodiment, the first stacked coil comprises a first coil portion, an intermediate coil portion, and a second coil portion. The first coil portion connects between the first coil entry and the first coil tap. The intermediate coil portion connects between the first coil tap and the second coil tap. The second coil portion connects between the second coil tap and the first coil termination port.

[0030] In another configuration, the lower frequency ESD protection circuit comprises a human body model ESD protection circuit. The lower frequency ESD protection also comprises an additional load device model ESD protection circuit. The additional load device model ESD protection circuit is connected to the first coil tap, and the human body model ESD protection circuit is connected to the second coil tap. This configuration can be advantageous because it provides very effective ESD protection at lower frequencies.

[0031] In another embodiment, the second stacked coil comprises a reference port connected to a ground plane of the electrostatic protection device.

[0032] In another embodiment, the second stacked coil comprises a reference port connected to the second coil tap.

[0033] In another embodiment, the first stacked coil is formed at least partially from the two upper metallization layers of the electrostatic protection device. This can be advantageous because the currents passing through the first stacked coil can be higher than those through the second stacked coil. The two upper metallization layers of the electrostatic protection device can be thicker, resulting in a first stacked coil that is less likely to be destroyed by an ESD event and has lower resistance.

[0034] In another embodiment, the higher-frequency ESD protection circuit comprises a primary load device model ESD protection circuit. The use of the terms primary load device model ESD protection circuit and additional load device model ESD protection circuit is intended to indicate that there are two separate load device model ESD protection circuits.

[0035] In another configuration, the primary load device model ESD protection circuit has a primarily reactive impedance. Because the ESD event signal is effectively split in two, with the higher-frequency component having a lower current, the primary load device model ESD protection circuit can be specialized and designed to minimize power loss. In a conventional electrostatic protection device, the primary load device model ESD protection circuit uses diodes that For smaller signals, IVIA / a / ZUZÓ / UI IUOH diodes effectively act as lossy capacitors. However, for larger voltages, the diodes begin to conduct and effectively provide a resistance that dissipates ESD energy to ground. A reactive impedance can be used instead for the ESD protection circuit, since the data signal for the higher- and lower-frequency ESD protection circuits carries a lower current.

[0036] In another configuration, the summing circuit can be a continuous-time linear equalizer circuit. For example, this can be a particularly effective way to combine low- and high-frequency signal components.

[0037] In another embodiment, the input port of the electronic circuit is a differential input port. The differential input port consists of two electrostatic shielding devices connected together through a continuous-time linear equalization circuit. The continuous-time linear equalization circuit is used to combine the signals from the two separate electrostatic shielding devices. This can be beneficial because it can provide better noise rejection.

[0038] In another configuration, the termination load is resistive. This, for example, can provide an effective means of constructing the circuit.

[0039] In another aspect, the invention provides an integrated circuit comprising an electronic circuit. The integrated circuit comprises an electrostatic protection device for protecting the input port of the electronic circuit. The electrostatic protection device comprises a first stacked coil and a second stacked coil. The electrostatic protection device comprises an input terminal. The first stacked coil comprises a first coil input connected to the input terminal. The first stacked coil comprises a first coil output port connected to a lower-frequency ESD protection circuit. The first stacked coil comprises a first coil termination port connected to a termination load. The second stacked coil is inductively coupled to the first stacked coil. The second stacked coil comprises an output port connected to a higher-frequency ESD protection circuit.The higher-frequency ESD protection circuit has a higher-frequency output. The lower-frequency ESD protection circuit has a lower-frequency output. The electrostatic protection device comprises a summing circuit configured to output the sum of the higher-frequency and lower-frequency outputs to the input port of the electronic circuit.

[0040] In another form, the integrated circuit may be any of the following: a microprocessor, a microcontroller, a graphics processing unit, a central processing unit, a broadband amplifier, an analog-to-digital converter, a digital-to-analog converter, a wired transceiver circuit, and a telecommunications chip.

[0041] In another embodiment, the integrated circuit comprises a substrate. The electronic circuitry is formed on the substrate. The electrostatic protection device is also formed on the substrate. The second stacked coil is formed closer to the substrate than the first stacked coil. This, for example, can be advantageous because thicker metal layers, such as the final few metallization layers, can be used to form the first stacked coil. This can provide a higher current rating and lower resistance for the lower-frequency EDS protection circuit. IVIA / a / ZUZÓ / UI IUOH

[0042] Figure 1 illustrates an example of an electrostatic protective device 100. The electrostatic protective device 100 has an input port 102. The input port 102 can be the input port for an electronic circuit that it is protecting. The electrostatic protective device 100 comprises a first stacked coil 104 and a second stacked coil 106. In this example, the first stacked coil 104 is divided into a first coil portion 110 and a second coil portion 112. There is a single coil tap 114 between the first coil portion 110 and the second coil portion 112. The first stacked coil 104 and the second stacked coil 106 are physically stacked together such that the first stacked coil 104 and the second stacked coil 106 have an inductive coupling. In this particular figure, it is shown that the second stacked coil 106 is predominantly coupled to the first coil portion 110.However, this is just one option. It could also be primarily attached to the second portion of coil 112.

[0043] The first stacked coil and the second stacked coil 104,106 form a five-port device. The first port 120 is a first coil input. The second port 122 is a first coil output port and is the same as the single coil tap 114. The third port 124 connects to the output of the second coil portion 112 and connects to a termination load 116. The fourth port is a reference port 126 that connects to one end of the second stacked coil 106, and the fifth port is a second coil output port 128, which is the other port of the second stacked coil 106.

[0044] The inductive coupling between the second stacked coil 106 and the first stacked coil 104 is configured so that the high-frequency component of a signal is preferentially coupled to a higher-frequency ESD protection circuit 140. The decoupled portion of the signal remains in the lower-frequency ESD protection circuit 130. This thus forms a higher-frequency circuit path 142 and a lower-frequency circuit path 132. The lower-frequency circuit path 132 has a human body model ESD protection circuit 134 and an additional load device model ESD protection circuit 136. The higher-frequency circuit path 142 has a primary load device model ESD protection circuit 144.

[0045] Both the higher-frequency ESD protection circuit 140 and the lower-frequency ESD protection circuit 130 are coupled to a summing circuit 150 through an amplifier. The summing circuit 150 sums a lower-frequency output 154 and a higher-frequency output 156 to an output of the electrostatic protection device 152, which has a sum 158 of both the lower-frequency output 154 and the higher-frequency output 156. This is illustrated by the graphs of the lower-frequency and higher-frequency signals as shown in the graph.

[0046] Figure 2 shows an example of the first stacked coil 104 and the second stacked coil 106. This figure shows a perspective view 200 and a top view 202. The figures show the first coil portion 110 and the second coil portion 112 of the first stacked coil 104 on top of the second stacked coil 106. In this example, the second coil portion 112 is adjacent to the second stacked coil 106. The inductive coupling is probably stronger between the second stacked coil 106 and the second coil portion 112 than between the second stacked coil 106 and the first coil portion 110. This is the opposite of the situation illustrated in Figure 1, where the drawing shows that the inductive coupling is primarily between the first coil portion 110 and the second coil portion 112. IVIA / a / ZUZÓ / UI IUOH and the second stacked coil 106. The design in Figure 2 could be easily modified to match that illustrated in Figure 1 by mechanically changing the position of the two coil portions 112 and 110. The coils illustrated in Figure 2 could, for example, be easily manufactured using standard semiconductor manufacturing techniques.

[0047] Figure 3 shows the frequency transmission from a simulation of the circuit illustrated in Figure 1. The lower frequency output 154 and the higher frequency output 156 are plotted. The low-band -3dB point 300 is shown. The sum of both signals is illustrated by summation 158. The -3dB point for summation 158 is illustrated by line 302. Compared to the low-band -3dB point 300, the -3dB point for the sum of the signals increases considerably.

[0048] Figure 4 illustrates the bandwidth provided by the electrostatic device of Figure 1. There are two groups of figures. The figures in column 400 represent the actual signals. The figures in column 402 are eye diagrams. Row 1, 404, contains the highest frequency band. Row 2 is the lowest frequency band, 406. The lowest row, 408, contains the sum of the highest frequency band, 404, and the lowest frequency band, 406. Column 402 for the sum shows a relatively large bandwidth.

[0049] Figure 5 illustrates an example of an integrated circuit 500. The integrated circuit 500 comprises a substrate 502. There is an input pad 504 on the substrate 502. This is then connected by wire 506 to the input port 102. The first stacked coil 104 and the second stacked coil 106, as illustrated in Figure 2, are part of the integrated circuit 500. The integrated circuit 500 comprises the electrostatic protection device 100 and forms the input for an electronic circuit 508. The first coil portion 110 and the second coil portion 112 are formed from the two upper metallization layers 510. This allows these two portions 110, 112 to have a higher current rating and better withstand an ESD event.

[0050] Figure 6 illustrates a further example of an electrostatic protection circuit 600. The electrostatic protection circuit 600 in Figure 6 is similar to the one illustrated in Figure 1. In this example, the summing circuit is a continuous-time linear equalizer circuit 150'. The continuous-time linear equalizer circuit 150' comprises an amplifier 602, a FET transistor 601, and several resistors 604. The resistances of the resistors 604 can be adjusted so that the attenuation of the HF path 142 matches the amplitude of the LF path 132. In the LF path 132, due to the feedback loop constructed by the amplifier 602 and the FET transistor 601, a virtual ground 606 is formed. This forms a transimpedance amplifier (current-to-voltage amplifier). The LF 154 and HF 156 signals are summed at the bottom of the FET transistor 601 and output 152 is connected to a subsequent stage, such as an analog-to-digital converter (ADC).

[0051] Figure 7 illustrates a further example of a differential electrostatic protective device 700. There is a first differential input 702 and a second differential input 704. The first differential input 702 is connected to a first electrostatic protective device 706 that is similar to the electrostatic protective device 100 illustrated in Figure 1. The second differential input 704 is connected as the input for a second electrostatic protective device 708. Similarly, the second electrostatic protective device 708 is similar to the electrostatic protective device 100 illustrated in Figure 1. IVIA / a / ZUZÓ / UI IUOH

[0052] The first electrostatic protection device 706 and the second electrostatic protection device 708 have some modifications with respect to the electrostatic protection device 100 of Figure 1. First, the second stacked coil 106 is shown as being primarily coupled to the second coil portion 112 in both cases. The first electrostatic protection device 706 and the second electrostatic protection device 708 are shown as being connected and providing a differential sum using a continuous-time linear actuator circuit 150.

[0053] The continuous-time linear driver circuit 150 is a differential amplifier in this example, with two FETs 710 and a resistor 712 at their drains. The DC voltage (VDD) is supplied through inductor L3. The high-frequency output 156 reaches the output (to the next stage) through the drain resistors 712, where it is combined with the low-frequency output 154, which is slightly amplified by the FETs 710. A current source is typical of differential amplifiers. The adjustable resistors 714 are configured to tune the circuit so that the signal amplitudes of the high- and low-frequency channels match. The capacitor 716 between the two VDDs is only for blocking the power supply.

[0054] Figure 8 illustrates a further example of an electrostatic protective device 800. In this example, the first stacked coil 104 has been modified from the example illustrated in Figure 1. The first stacked coil 104 has been divided into three parts: a first coil portion 110, an intermediate coil portion 802, and a second coil portion 112. There is a first coil outlet port 122 between the first coil portion 110 and the intermediate coil portion 802. There is a sixth port 806 provided by a second coil tap 804. The second coil tap 804 is located between the intermediate coil portion 802 and the second coil portion 112. The first stacked coil 104 and the second stacked coil 106 thus form a sixth port device in this example.The example in Figure 8 is further modified from that shown in Figure 1 in that the ESD protection circuit of the additional charging device model 136 is shown connected to either the second or first output port of coil 122. The ESD protection circuit of the human body model 134 is shown connected to either the sixth or second output port of coil 806. In the circuit diagram, the second stacked coil 106 is shown as being primarily coupled to the intermediate coil portion 802. However, this could be modified, and the second stacked coil 106 could also be primarily coupled to either the first coil portion 110 or the second coil portion 112.

[0055] Figure 9 shows an additional example of an electrostatic protective device 900. The example illustrated in Figure 9 is very similar to the example illustrated in Figure 8 with one modification. In Figure 8, the fourth port or reference port 126 of the second stacked coil 106 was connected to ground. In the example in Figure 9, the fourth port or reference port 126 is instead connected to the second coil tap 804. This is equivalent to the second coil output port 806 being connected to the reference port 126 of the second stacked coil 106.

[0056] The descriptions of the various embodiments of the present invention have been presented for illustrative purposes, but are not intended to be exhaustive or limited to the disclosed embodiments. Many modifications and variations will be evident to those skilled in the art without departing from the scope of the described embodiments. The terminology used herein was chosen to best explain the principles of the embodiments and their application. IVIA / a / ZUZÓ / UI IUOH practice or technical improvement on technologies that are on the market, or to allow other experts in the art to understand the modalities disclosed herein.

Claims

1. An electrostatic protection device for protecting an input port of an electronic circuit, the electrostatic protection device comprising: a first stacked coil, a second stacked coil, and an input terminal, wherein the second stacked coil is inductively coupled to the first stacked coil; wherein the first stacked coil comprises a first coil input connected to the input terminal, a first coil output port connected to a lower-frequency ESD protection circuit, and a first coil termination port connected to a termination load, and wherein the lower-frequency ESD protection circuit comprises a lower-frequency output; wherein the second stacked coil comprises an output port connected to a higher-frequency ESD protection circuit, and wherein the higher-frequency ESD protection circuit comprises a higher-frequency output;and wherein the electrostatic protection device comprises a summing circuit configured to output a sum of the higher frequency output and the lower frequency output to the input port of the electronic circuit.

2. The electrostatic protection device of claim 1, wherein the first stacked coil and the second stacked coil form a crossover network configured to split a signal input at the input terminal into a higher frequency component and a lower frequency component, wherein the higher frequency component is emitted by the higher frequency output and the lower frequency component is emitted by the lower frequency output.

3. The electrostatic protection device of claim 1, wherein the first stacked coil is a t-coil with an individual coil tap.

4. The electrostatic protection device of claim 3, wherein the single coil tap divides the first stacked coil into a first coil portion and a second coil portion, the single coil tap being the first coil outlet, the second coil portion connecting between the single coil tap and the coil termination port, and the first coil portion connecting between the single coil tap and the first coil inlet.

5. The electrostatic protection device of claim 4, wherein an inductive coupling between the first coil portion and the second stacked coil is greater than the inductive coupling between the second coil portion and the second stacked coil.

6. The electrostatic protection device of claim 5, wherein the second stacked coil comprises a reference port connected to a ground plane of the electrostatic protection device.

7. The electrostatic protection device of claim 1, wherein the lower frequency ESD protection circuit comprises a human body model ESD protection circuit.

8. The electrostatic protection device of claim 7, wherein the lower frequency ESD protection comprises an additional charging device model ESD protection circuit. IVIA / a / ZUZÓ / UI IUOH 9. The electrostatic protection device of claim 1, wherein the first stacked coil comprises a first coil tap and a second coil tap, and the lower frequency ESD protection circuit is connected to the first coil tap and the second coil tap.

10. The electrostatic protection device of claim 9, wherein the first stacked coil comprises a first coil portion, an intermediate coil portion, and a second coil portion, wherein the first coil portion connects between the first coil entry and the first coil tap, the intermediate coil portion connects between the first coil tap and the second coil tap, and the second coil portion connects between the second coil tap and the first coil termination port.

11. The electrostatic protection device of claim 10, wherein the lower frequency ESD protection circuit comprises a human body model ESD protection circuit, the lower frequency ESD protection comprising an additional load device model ESD protection circuit, the additional load device model ESD protection circuit is connected to the first coil socket, and the human body model ESD protection circuit is connected to the second coil socket.

12. The electrostatic protection device of claim 1, wherein the second stacked coil comprises a reference port connected to a ground plane of the electrostatic protection device.

13. The electrostatic protection device of claim 1, wherein the second stacked coil comprising a reference port is connected to the second coil tap.

14. The electrostatic protection device of claim 1, wherein the first stacked coil is formed at least partially from two upper metallization layers of the electrostatic protection device.

15. The electrostatic protection device of claim 1, wherein the higher frequency ESD protection circuit comprises a primary load device model ESD protection circuit.

16. The electrostatic protection device of claim 15, wherein the ESD protection circuit of the primary charging device model has a primarily reactive impedance.

17. The electrostatic protection device of claim 1, wherein the summing circuit is a continuous-time linear equalizer circuit.

18. The electrostatic protection device of claim 17, wherein the input port of the electronic circuit is a differential input port, wherein the differential input port is formed by two electrostatic protection devices connected together through the continuous-time linear equalizer circuit.

19. The electrostatic protection device of claim 1, wherein the summing circuit is formed from a summing amplifier.

20. The electrostatic protection device of claim 1, wherein the termination load is resistive.

21. An integrated circuit comprising an electronic circuit, the integrated circuit comprising an electrostatic protection device for protecting an input port of the electronic circuit, the electrostatic protection device comprising: a first stacked coil, a second stacked coil, and an input terminal, wherein the second stacked coil is inductively coupled to the first stacked coil; IVIA / a / ZUZÓ / UI IUOH wherein the first stacked coil comprises a first coil input connected to the input terminal, a first coil output port connected to a lower-frequency ESD protection circuit, and a first coil termination port connected to a termination load, and wherein the lower-frequency ESD protection circuit comprises a lower-frequency output;wherein the second stacked coil comprises an output port connected to a higher-frequency ESD protection circuit, and wherein the higher-frequency ESD protection circuit comprises a higher-frequency output; and wherein the electrostatic protection device comprises a summing circuit configured to output a sum of the higher-frequency output and the lower-frequency output to the input port of the electronic circuit.

22. The integrated circuit of claim 21, wherein the integrated circuit is selected from a group consisting of: a microprocessor, a microcontroller, a graphics processing unit, a central processing unit, a broadband amplifier, an analog-to-digital converter, a digital-to-analog converter, a wired transceiver circuit, and a telecommunications chip.

23. The integrated circuit of claim 21, wherein the integrated circuit comprises a substrate, the electronic circuit formed on the substrate, the electrostatic protection device formed on the substrate, and the second stacked coil formed closer to the substrate than the first stacked coil.

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