Complementary power supply modulator

The complementary power supply modulator addresses the efficiency loss in power modulation amplifiers by using a P-type transistor on the high voltage side with a high voltage side combiner, reducing power consumption and enhancing integrated circuit efficiency by minimizing resistance loss.

WO2024257290A1PCT designated stage expired Publication Date: 2024-12-19MITSUBISHI ELECTRIC CORP
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Patent Information

Application Number
PCT/JP2023/022173
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Filing Date
2023-06-15
Publication Date
2024-12-19

AI Technical Summary

Technical Problem

In power modulation type amplifiers, the use of P-type MOS transistors on the high voltage side leads to increased current consumption and efficiency loss due to the configuration of high-side switches, resulting in decreased overall integrated circuit efficiency.

Method used

A complementary power supply modulator is designed with a P-type transistor on the high voltage side, featuring a high voltage side switching element connected in series between a power supply potential node and a ground potential node, along with a low voltage side N-type transistor, and a high voltage side combiner that applies a combined PWM signal to the gate electrode of the P-type transistor, reducing power consumption by minimizing resistance loss.

Benefits of technology

This configuration effectively suppresses power consumption when applying a bias voltage to the gate electrode of the P-type transistor, improving the efficiency of the integrated circuit by ensuring minimal energy loss during PWM signal processing.

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Abstract

This complementary power supply modulator comprises a high-voltage-side switching element (10) and a low-voltage-side switching element (20) that are connected in series between a first power supply potential node V1 and a ground potential node. The high-voltage-side switching element (10) is equipped with a first P-type transistor (11), and the low-voltage-side switching element (20) is equipped with a first N-type transistor (21). A first combiner (30) is provided, which applies, to a gate electrode of the first P-type transistor (11), a PWM signal obtained by combining the PWM signal with a second voltage V2 which is applied to a second power supply potential node V2.
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Description

Complementary Power Supply Modulator

[0001] The present disclosure relates to a complementary power supply modulator having complementary switching elements connected in series between a power supply potential node and a ground potential node.

[0002] A power supply modulation amplifier must modulate the applied bias voltage in response to the voltage level of a high-frequency input signal, which is a PWM (Pulse Width Modulation) signal. Typically, in such a power supply modulation amplifier, the bias voltage is more than twice as large as the voltage amplitude of the PWM signal. It has been considered to use a P-type MOS transistor on the high-voltage side of a power supply modulation amplifier. For example, the "High-Side Switch Configuration Using a P-Channel MOSFET" shown in Figure 5-19 of Non-Patent Document 1 could be applied to a power supply modulation amplifier.

[0003] The high-side switch configuration shown in Non-Patent Document 1 is such that the source electrode of the P-channel MOS is V DD and the drain electrode is connected to R L is connected to one end of V DD and a resistor R 4 is connected, and a resistor R 4 A resistor R3 is connected between one end of the resistor R1 and the collector electrode of the bipolar transistor, the emitter electrode of the bipolar transistor is grounded, and a pulse PG is input to the gate electrode of the bipolar transistor.

[0004] "Switching Power Supply [2] Mastering Elemental Technology" published on March 1, 2019, CO Publishing Co., Ltd., pp. 194 and 195, especially Fig. 5-19

[0005] The high-side switch configuration shown in Non-Patent Document 1 has a resistor R 4 Flowing through C Since VGS is secured by this, current consumption increases, and when a power supply modulation type amplifier is integrated, this leads to a problem of a decrease in the efficiency of the entire integrated circuit.

[0006] The present disclosure is intended to solve the above-mentioned problems, and aims to provide a complementary power supply modulator that has complementary switching elements connected in series between a power supply potential node and a ground potential node, and has a P-type transistor as the high-voltage side switching element, and that reduces power consumption when a bias voltage is applied to the gate electrode of the P-type transistor.

[0007] A complementary power supply modulator according to the present disclosure includes a high-voltage side switching element having a first high-voltage side main node connected to a first power supply potential node to which a first voltage is applied, a second high-voltage side main node connected to an output terminal, and a high-voltage side control node to which a PWM signal is input, the high-voltage side switching element including a first P-type transistor having a source electrode electrically connected to the first high-voltage side main node, a drain electrode electrically connected to the second high-voltage side main node, and a gate electrode electrically connected to the high-voltage side control node; a first low-voltage side main node connected to the output terminal, a second low-voltage side main node connected to a ground potential node, and a low-voltage side control node to which the PWM signal is input, the drain electrode of which is electrically connected to the first low-voltage side main node; a low-voltage side switching element including a first N-type transistor electrically connected to an input terminal to which a PWM signal is input, a source electrode electrically connected to a second low-voltage side main node, and a gate electrode electrically connected to a low-voltage side control node; a high-voltage side combiner having a first high-voltage side summing node electrically connected to an input terminal to which a PWM signal is input, a second high-voltage side summing node electrically connected to a second power supply potential node to which a second voltage is applied, and a high-voltage side combined output node electrically connected to the high-voltage side control node of the high-voltage side switching element and for outputting a PWM signal obtained by combining the PWM signal input to the first high-voltage side summing node and the second voltage applied to the second high-voltage side summing node.

[0008] According to the present disclosure, in a complementary power supply modulator having a P-type transistor as a switching element on the high-voltage side, power consumption when applying a bias voltage to the gate electrode of the P-type transistor can be reduced.

[0009] FIG. 1 is a configuration diagram showing a complementary power supply modulator according to a first embodiment; FIG. 2 is a configuration diagram showing an example of a combiner in the complementary power supply modulator according to the first embodiment; FIG. 3 is an equivalent circuit diagram showing a simulation of the combiner in the complementary power supply modulator according to the first embodiment; FIG. 4 is a diagram showing a simulation result of the combiner in the complementary power supply modulator according to the first embodiment; FIG. 5 is a configuration diagram showing an example of a combiner in the complementary power supply modulator according to a second embodiment; FIG. 6 is a configuration diagram showing a complementary power supply modulator according to a third embodiment; FIG. 7 is a configuration diagram showing a complementary power supply modulator according to a fourth embodiment; FIG. 8 is a configuration diagram showing a complementary power supply modulator according to a fifth embodiment; and FIG. 9 is a configuration diagram showing a complementary power supply modulator according to a sixth embodiment.

[0010] First Embodiment A complementary power supply modulator according to a first embodiment will be described with reference to Figures 1 to 4. A complementary power supply modulator 100 according to the first embodiment has a first power supply potential node V 1 and a ground potential node, with the connection point being connected to the output node, the high-voltage side switching element 10 having a P-type transistor 11, and the low-voltage side switching element 20 having an N-type transistor 21. The complementary power supply modulator according to the first embodiment receives a high-frequency PWM signal as an input signal, and outputs a high-frequency PWM signal to a first power supply potential node V. 1 The voltage applied to the PWM signal is more than twice as large as the voltage amplitude of the PWM signal, which is the input signal.

[0011] As shown in Figure 1, the complementary power supply modulator according to the first embodiment includes a high-voltage side switching element 10, a low-voltage side switching element 20, and a high-voltage side combiner 30. The high-voltage side switching element 10, the low-voltage side switching element 20, and the high-voltage side combiner 30 are incorporated as an integrated circuit. The high-voltage side switching element 10 is connected to a first voltage V 1 A first power supply potential node V 1 , a second high-voltage side main node 10b connected to output terminal 1, and a high-voltage side control node 10c to which a PWM signal is input via a high-voltage side combiner 30.

[0012] First power supply potential node V 1 A first voltage V applied to 1 For example, the first power supply potential node V 1 The voltage applied to the first power supply potential node V is 10 times the voltage amplitude of the PWM signal, which is the input signal. 1 The voltage applied to the first power supply potential node V is twice or more larger than the voltage amplitude of the PWM signal that is the input signal. 1 A first voltage V applied to 1 is supplied from a power supply circuit (not shown).

[0013] High-voltage side switching element 10 includes first P-type transistor 11 having a source electrode electrically connected directly to first high-voltage side main node 10a, a drain electrode electrically connected directly to second high-voltage side main node 10b, and a gate electrode electrically connected directly to high-voltage side control node 10c. First P-type transistor 11 is a P-type transistor (high-voltage transistor element) that uses a wide bandgap semiconductor.

[0014] The band gap of a P-type transistor using a wide band gap semiconductor is 2.2 eV or more. As the first P-type transistor 11, for example, a P-type GaN (Gallium Nitride) transistor or a diamond MOSFET (Metal Oxide Semiconductor Field Effect Transistor) is used, and in particular, a P-type transistor using a wide band gap semiconductor of 3 eV or more is used. Note that the specific example shown here for the first P-type transistor 11 is just an example, and is not limited thereto. Any P-type transistor using a wide band gap semiconductor may be used, and either a normally on type or a normally off type may be used.

[0015] Low-voltage side switching element 20 has first low-voltage side main node 20a connected to output terminal 1, second low-voltage side main node 20b connected to the ground potential node, and low-voltage side control node 20c electrically connected directly to input terminal 2 to which a PWM signal is input. Low-voltage side switching element 20 includes first N-type transistor 21 having a drain electrode electrically connected directly to first low-voltage side main node 20a, a source electrode electrically connected directly to second low-voltage side main node 20b, and a gate electrode electrically connected directly to low-voltage side control node 20c.

[0016] The first N-type transistor 21 is an N-type transistor (high-voltage transistor element) using a wide bandgap semiconductor. The bandgap of an N-type transistor using a wide bandgap semiconductor is 2.2 eV or more. For example, an N-type GaN HEMT (High Electron Mobility Transistor) is used as the first N-type transistor 21, and in particular, an N-type transistor using a wide bandgap semiconductor of 3 eV or more is used. Note that the specific example shown here for the first N-type transistor 21 is merely an example, and is not limited thereto. Any N-type transistor using a wide bandgap semiconductor may be used, and the transistor may be either a normally-on type or a normally-off type.

[0017] The high-voltage side combiner 30 has a first high-voltage side summing node 30a electrically connected directly to the input terminal 2, and a second voltage V 2 A second power supply potential node V 2 a second high-voltage side summing node 30b electrically connected directly to the high-voltage side control node 10c of the high-voltage side switching element 10, and a second voltage V applied to the second high-voltage side summing node 30b and a PWM signal input to the first high-voltage side summing node 30a; 2 The second power supply potential node V has a high voltage side combined output node 30c from which a PWM signal obtained by combining the first and second power supply potential nodes V 2 A second voltage V applied to 2 is 31.5V as an example.

[0018] Now, the potential difference between the H level and L level of the PWM signal input to the input terminal 2 is (H-L), the duty ratio is D, and the second power supply potential node V 2 A second voltage V applied to 2 V 2 When the PWM signal is at the H level, the voltage appearing at the high-voltage side composite output node 30c is (H-L)(1-D)+V 2 When the PWM signal is at the H level, the first P-type transistor 11 is turned off, the first N-type transistor 21 is turned on, and the voltage appearing at the output terminal 1 is 0 V (ground potential). When the PWM signal is at the L level, the voltage appearing at the high-voltage side composite output node 30c is −(H−L)D+V 2 is at the L level, the first P-type transistor 11 is on, the first N-type transistor 21 is off, and the voltage appearing at the output terminal 1 is V 1 (First power supply potential node V 1 A first voltage V applied to 1 )

[0019] As an example, the H level of the PWM signal is 0 V, the L level is −3 V, and the first voltage V 1 is 30V, the second voltage V 2 is 31.5 V. When the PWM signal is at H level, the voltage appearing at the high-voltage side composite output node 30c is 33 V, and the voltage appearing at the output terminal 1 is 0 V. When the PWM signal is at L level, the voltage appearing at the high-voltage side composite output node 30c is 30 V, and the voltage appearing at the output terminal 1 is 30 V. Note that normally-on depletion type transistors are used as the first P-type transistor 11 and the first N-type transistor 21.

[0020] As shown in FIG. 2, the high-voltage side combiner 30 has a DC block 31 which is a capacitor and an inductor section 32 which is a choke coil. In the following description of the first embodiment, the DC block 31 will be referred to as the capacitor 31 and the inductor section 32 as the choke coil 32. One electrode of the capacitor 31 is electrically connected directly to the first high-voltage side summing node 30a, and the other electrode is electrically connected directly to the high-voltage side combined output node 30c. One electrode of the choke coil 32 is electrically connected directly to the second power supply potential node 30b, and the other electrode is electrically connected directly to the high-voltage side combined output node 30c.

[0021] The constant of capacitor 31 is determined as follows. To perform the simulation, the equivalent circuit shown in Figure 3 is assumed. Here, to clarify the relationship with the time constant, the simulation was performed using a series CR circuit. The equivalent circuit shown in Figure 3 assumes a series circuit of capacitor C1 and resistor R1.

[0022] Capacitor C1 is connected between terminals CR1 and CR2, to which a PWM signal is input. Capacitor C1 corresponds to capacitor 31 in combiner 30 on the high-voltage side. Resistor R1 is connected between terminal CR2 and the ground node. Resistor R1 corresponds to a resistor with a resistance value determined by the choke coil 32 in combiner 30 on the high-voltage side and the input impedance of first P-type transistor 11, etc.

[0023] The simulation is performed with the capacitance value of the capacitor C1 set to 1 nF and the resistance value of the resistor R1 set to 50 Ω. The value of the time constant calculated from the capacitor C1 and the resistor R1 is 5.0×10 -8 The reciprocal of this is 20 MHz. The duty ratio of the PWM signal is 50%.

[0024] The results of a simulation performed under these conditions are shown in Figure 4. In Figure 4, the horizontal axis represents time, which is shown as a value normalized by the reciprocal of the PWM signal frequency, and the vertical axis represents voltage, with waveform CR1V1 representing the voltage amplitude of the PWM signal input to terminal CR1, waveform CR2V1 representing the voltage amplitude at terminal CR2 when a 1 MHz PWM signal is input, waveform CR2V2 representing the voltage amplitude at terminal CR2 when a 10 MHz PWM signal is input, waveform CR2V3 representing the voltage amplitude at terminal CR2 when a 20 MHz PWM signal is input, and waveform CR2V4 representing the voltage amplitude at terminal CR2 when a 100 MHz PWM signal is input.

[0025] As can be seen from the simulation results in Figure 4, a transient response characteristic can be observed when the PWM signal is 1 MHz (waveform CR2V1), but as the frequency increases (waveforms CR2V2 to CR2V4), the waveform becomes differentiated because it is unable to return to a steady state. In the simulation results (waveform CR2V3) when a 20 MHz PWM signal, which is the reciprocal of the time constant, is input, a sag of approximately V / 5 occurs in the voltage amplitude V of the PWM signal (waveform CR1V1). However, by paying attention to the threshold voltage of the first P-type transistor 11, it can be used as the capacitor 31 in the high-side combiner 30. Therefore, the capacitance value of the capacitor 31 in the high-side combiner 30 is determined so that the frequency of the PWM signal is equal to or greater than the reciprocal of the time constant.

[0026] In the simulation results (waveform CR2V4) when a 100 MHz PWM signal, which is five times the reciprocal of the time constant, is input, almost no sag occurs. Therefore, when used near the threshold voltage of the first P-type transistor 11, it is advisable to determine the capacitance value of capacitor 31 in combiner 30 on the high-voltage side so that the frequency of the PWM signal is five times or more the reciprocal of the time constant.

[0027] That is, the capacitance value of the capacitor 31 that can control the on / off operation of the first P-type transistor 11 using the output waveform of the high-voltage side combiner 30 can be adjusted according to the resistance value determined by the input impedance of the choke coil 32 and the first P-type transistor 11 in the high-voltage side combiner 30 corresponding to the resistor R1 and the lower limit frequency of the PWM signal. Note that the upper limit frequency of the PWM signal is determined by the cutoff frequency of the first P-type transistor 11.

[0028] In short, the capacitance value of the capacitor 31 is set to a value equal to or greater than the reciprocal of the time constant calculated from the input impedance of the first P-type transistor 11, which is the same as the frequency of the PWM signal, and the resistance value of the choke coil 32. In particular, it is preferable that the capacitance value of the capacitor 31 be set to a value equal to or greater than five times the reciprocal of the time constant calculated from the input impedance of the first P-type transistor 11, which is the same as the frequency of the PWM signal, and the resistance value of the choke coil 32.

[0029] The impedance of the choke coil 32 in the combiner 30 on the high-voltage side is preferably set to be five times or more the input impedance of the first P-type transistor 11 at the frequency of the PWM signal. By setting the impedance to be five times or more, the energy of the PWM signal can be sufficiently supplied to the gate electrode of the first P-type transistor 11.

[0030] As described above, by configuring the high-voltage side combiner 30 with the capacitor 31 and the choke coil 32, in particular, the capacitance value of the capacitor 31 is set to a value equal to or greater than the reciprocal of the time constant calculated from the input impedance of the first P-type transistor 11, which is the same as the frequency of the PWM signal, and the resistance value of the choke coil 32, and the impedance of the choke coil is set to a value equal to or greater than five times the input impedance of the first P-type transistor 11 at the frequency of the PWM signal. This reduces power consumption when applying a bias voltage to the gate electrode of the first P-type transistor 11, and allows the PWM signal and the second voltage V applied to the second high-voltage side adding node 30b to be applied to the gate electrode of the first P-type transistor 11. 2The PWM signal obtained by combining the above is applied as a bias voltage to the gate electrode of the first P-type transistor 11 that constitutes the switching element 10 on the high-voltage side.

[0031] Next, the operation of the complementary power supply modulator according to the first embodiment will be described. When an H level PWM signal is input to the input terminal 2, the high-side combiner 30 generates a voltage (H-L) that is the potential difference between the H level and L level of the PWM signal and a voltage at the second power supply potential node V 2 A second voltage V applied to 2 are combined and a combined voltage [(H−L)(1−D)+V 2 ] is applied to the gate electrode of the first P-type transistor 11 in the switching element 10 on the high-voltage side.

[0032] As a result, the first P-type transistor 11 is turned off, and the first power supply potential node V 1 and the output terminal 1 are electrically cut off. Meanwhile, the H-level voltage of the PWM signal is applied to the gate electrode of the first N-type transistor 21 that constitutes the low-voltage side switching element 20. As a result, the first N-type transistor 21 is turned on, and an electrical connection is established between the output terminal 1 and the ground potential node. Therefore, the output terminal 1 is set to the ground potential.

[0033] When an L level PWM signal is input to the input terminal 2, the voltage difference between the H level and L level of the PWM signal, that is, the voltage −(H−L), and the second power supply potential node V 2 A second voltage V applied to 2 are combined and a combined voltage [−(H−L)D)+V 2 ] is applied to the gate electrode of the first P-type transistor 11 in the switching element 10 on the high-voltage side.

[0034] As a result, the first P-type transistor 11 is turned on, and the first power supply potential node V 1and the output terminal 1 are electrically connected. Meanwhile, the L-level voltage of the PWM signal is applied to the gate electrode of the first N-type transistor 21 that constitutes the low-voltage side switching element 20. As a result, the first N-type transistor 21 is turned off, and an electrical disconnection occurs between the output terminal 1 and the ground potential node. Therefore, the output terminal 1 is connected to the first power supply potential node V 1 A first voltage V applied to 1 to be turned into

[0035] As described above, the complementary power supply modulator according to the first embodiment has a first power supply potential node V 1 and a ground potential node V. The high-voltage side switching element 10 includes a first P-type transistor 11, and the low-voltage side switching element 20 includes a first N-type transistor 21. The PWM signal and the second power supply potential node V are connected in series. 2 A second voltage V applied to 2 The high-voltage side combiner 30 applies a PWM signal obtained by combining the above to the gate electrode of the first P-type transistor 11. Therefore, it is possible to control the on / off operation of the first P-type transistor 11 constituting the high-voltage side switching element 10 while suppressing power consumption when applying a bias voltage to the gate electrode of the first P-type transistor 11.

[0036] That is, power consumption can be reduced because there is no resistive loss when the high-voltage side combiner 30 combines the second voltage and the PWM signal to generate a high-voltage bias voltage at the gate electrode of the first P-type transistor 11. Furthermore, because power consumption can be reduced, when the high-voltage side switching element 10, the low-voltage side switching element 20, and the high-voltage side combiner 30 are incorporated as an integrated circuit, the efficiency of the integrated circuit can be improved.

[0037] Second Embodiment A complementary power supply modulator according to a second embodiment will be described with reference to Figure 5. The complementary power supply modulator according to the second embodiment is the same as the complementary power supply modulator according to the first embodiment except that the high-voltage side combiner 30 is changed. In Figure 5, the same reference numerals as those shown in Figures 1 and 2 indicate the same or corresponding parts.

[0038] Similar to the complementary power supply modulator of embodiment 1, the complementary power supply modulator of embodiment 2 includes a high-voltage side switching element 10, a low-voltage side switching element 20, and a high-voltage side combiner 30A. The high-voltage side switching element 10 and the low-voltage side switching element 20 are the same as the high-voltage side switching element 10 and the low-voltage side switching element 20 in the complementary power supply modulator of embodiment 1, and therefore a description thereof will be omitted.

[0039] 5, combiner 30A on the high voltage side has DC block 31, which is a capacitor, and inductor section 32A. The capacitor that is DC block 31 is the same as capacitor 31 in embodiment 1, and the method for setting the capacitance value is also the same as the method for setting the capacitance value described in embodiment 1.

[0040] The inductor section 32A has a first inductor 33, a first parallel connection of the second inductor 34 and the first resistor 35, a second parallel connection of the third inductor 36 and the second resistor 37, a first capacitor 38, and a second capacitor 39. The first parallel connection of the first inductor 33, the second inductor 34, and the first resistor 35 and the second parallel connection of the third inductor 36 and the second resistor 37 are connected in series in this order between the second power supply potential node 30b and the high-voltage side combined output node 30c.

[0041] The first capacitor 38 is connected to the second power supply potential node V 2 The second capacitor 39 is connected between the ground node and a connection point between the other electrode of the first inductor 33 and one end of the first parallel body of the second inductor 34 and the first resistor 35.

[0042] By setting the inductance and capacitance values, which are circuit constants, of the first parallel body, the second parallel body, the first capacitor 38, and the second capacitor 39, it is possible to stabilize the PWM signal for a plurality of frequencies. 2 The impedance of the inductor section 32A between the second power supply potential node V and the high-voltage side combined output node 30c should be set to be five times or more the input impedance of the first P-type transistor 11 at the frequency of the PWM signal. 2 A second voltage V applied to 2 The circuit constants of the elements constituting the inductor section 32A are set so that there is no voltage drop due to the inductor section 32A. The complementary power supply modulator according to the second embodiment has the same effects as the complementary power supply modulator according to the first embodiment.

[0043] Third Embodiment A complementary power supply modulator according to a third embodiment will be described with reference to Fig. 6. The complementary power supply modulator according to the third embodiment is a modulator that is similar to the first embodiment except that the second voltage V 2 is the first voltage V 1 The first voltage V 1 6, the same reference numerals as those shown in FIGS. 1 and 2 denote the same or corresponding parts.

[0044] The following mainly describes the differences from the first embodiment. The second high-voltage side summing node 30b in the high-voltage side combiner 30 receives the first voltage V 1 A first power supply potential node V 1 Therefore, the second voltage V applied to the second high-voltage side summing node 30b in the high-voltage side combiner 30 is 2 is the first voltage V 1As a result, the high-voltage side combined output node 30c of the high-voltage side combiner 30 receives the PWM signal input to the first high-voltage side summing node 30a and the first voltage V applied to the second high-voltage side summing node 30b. 1 A PWM signal obtained by combining the above is output.

[0045] In the complementary power supply modulator according to the third embodiment, it is preferable to use a normally-off enhancement type P-type transistor as the first P-type transistor 11 constituting the high-voltage side switching element 10. When a normally-on depletion type P-type transistor is used as the first P-type transistor 11, the threshold voltage of the first P-type transistor 11 and the voltage amplitude and duty ratio of the PWM signal are set so that the on / off operation of the first P-type transistor 11 can be controlled.

[0046] The complementary power supply modulator according to the third embodiment has the same effects as the complementary power supply modulator according to the first embodiment. Note that in the complementary power supply modulator according to the third embodiment, the high-voltage side combiner 30A shown in the complementary power supply modulator according to the second embodiment may be used as the high-voltage side combiner 30.

[0047] Embodiment 4 A complementary power supply modulator according to embodiment 4 will be described with reference to Figure 7. The complementary power supply modulator according to embodiment 4 differs from embodiment 1 in that, while the complementary power supply modulator according to embodiment 1 is configured using a first P-type transistor 11 as the high-voltage side switching element 10, the complementary power supply modulator according to embodiment 4 adds a second P-type transistor 12 cascode-connected to the first P-type transistor 11 as the high-voltage side switching element 10, but is otherwise the same. In Figure 7, the same reference numerals as those shown in Figures 1 and 2 indicate the same or corresponding parts.

[0048] The following description will focus on high-voltage side switching element 10, which is a difference from embodiment 1. High-voltage side switching element 10 comprises a cascode-connected first P-type transistor 11 and second P-type transistor 12. First P-type transistor 11 has a source electrode electrically connected directly to first high-voltage side main node 10a, a drain electrode indirectly electrically connected to second high-voltage side main node 10b via second P-type transistor 12, and a gate electrode electrically connected directly to high-voltage side control node 10c.

[0049] The second P-type transistor 12 has a source electrode electrically connected directly to the drain electrode of the first P-type transistor 11, a drain electrode electrically connected directly to the second high-voltage side main node 10b, and a gate electrode electrically connected directly to the high-voltage side control node 10c. Like the first P-type transistor 11, the second P-type transistor 12 is a P-type transistor (high-voltage transistor element) that uses a wide bandgap semiconductor, and is, for example, a P-type GaN transistor or a diamond MOSFET.

[0050] A combined voltage from the high-voltage side combined output node 30c in the high-voltage side combiner 30 is input to the gate electrodes of the first P-type transistor 11 and the second P-type transistor 12, and the first P-type transistor 11 and the second P-type transistor 12 are simultaneously controlled to be turned on / off.

[0051] In this way, the high-voltage side switching element 10 is configured by the cascode-connected first P-type transistor 11 and second P-type transistor 12, so that the source-drain voltage applied to each of the first P-type transistor 11 and second P-type transistor 12 can be distributed, and the first voltage V 1 can be applied.

[0052] In general, in a transistor, there is a trade-off between on-resistance, cutoff frequency, and breakdown voltage, but the on-resistance can be reduced and the cutoff frequency can be increased by lowering the breakdown voltage of each of the first P-type transistor 11 and the second P-type transistor 12. The complementary power supply modulator according to the fourth embodiment has the same effects as the complementary power supply modulator according to the first embodiment, and in addition, it can reduce the on-resistance of the high-voltage side switching element 10 and increase the cutoff frequency.

[0053] In the high-voltage side switching element 10, the cascode-connected transistors are not limited to two stages, the first P-type transistor 11 and the second P-type transistor 12, but may be three or more stages of cascode-connected P-type transistors. Also, in the complementary power supply modulator according to the fourth embodiment, the high-voltage side combiner 30A shown in the complementary power supply modulator according to the second embodiment may be used as the high-voltage side combiner 30. Furthermore, in the complementary power supply modulator according to the fourth embodiment, as in the complementary power supply modulator according to the third embodiment, the second voltage V applied to the second high-voltage side adding node 30b of the high-voltage side combiner 30 2 to the first voltage V 1 The voltage may be the same as

[0054] Fifth Embodiment A complementary power supply modulator according to a fifth embodiment will be described with reference to Figure 8. The complementary power supply modulator according to the fifth embodiment differs from the complementary power supply modulator according to the fourth embodiment in that it includes a first N-type transistor 21 as the low-voltage side switching element 20, while the fifth embodiment includes a second N-type transistor 22 cascode-connected to the first N-type transistor 21 as the low-voltage side switching element 20. In other respects, the complementary power supply modulator according to the fifth embodiment is the same as the complementary power supply modulator according to the fourth embodiment. In Figure 8, the same reference numerals as those shown in Figures 1, 2 and 7 indicate the same or corresponding parts.

[0055] The following description will focus on low-voltage side switching element 20, which is a difference from embodiment 4. Low-voltage side switching element 20 comprises a cascode-connected first N-type transistor 21 and second N-type transistor 22. First N-type transistor 21 has a drain electrode electrically connected directly to first low-voltage side main node 20a, a source electrode electrically connected indirectly and directly to second low-voltage side main node 20b via second N-type transistor 22, and a gate electrode electrically connected directly to low-voltage side control node 20c.

[0056] The second N-type transistor 22 has a drain electrode electrically connected directly to the source electrode of the first N-type transistor 21, a source electrode electrically connected directly to the second low-voltage side main node 20b, and a gate electrode connected directly to the low-voltage side control node. Like the first N-type transistor 21, the second N-type transistor 22 is an N-type transistor (high-voltage transistor element) that uses a wide bandgap semiconductor, such as an N-type GaN HEMT.

[0057] A PWM signal is input to the gate electrode of the first N-type transistor 21 and the gate electrode of the second N-type transistor 22, and the first N-type transistor 21 and the second N-type transistor 22 are simultaneously controlled to be turned on / off. In this way, since the low-voltage side switching element 20 is configured by the cascode-connected first N-type transistor 21 and the second N-type transistor 22, the source-drain voltages applied to the first N-type transistor 21 and the second N-type transistor 22 can be distributed, and the first voltage V 1 can be applied.

[0058] The complementary power supply modulator according to embodiment 5 has the same effects as the complementary power supply modulator according to embodiment 4. In the low-voltage side switching element 20, the cascode-connected transistors are not limited to the two stages of the first N-type transistor 21 and the second N-type transistor 22, but may be three or more stages of cascode-connected N-type transistors.

[0059] In the complementary power supply modulator according to the fifth embodiment, the high-voltage side combiner 30A shown in the complementary power supply modulator according to the second embodiment may be used as the high-voltage side combiner 30. Furthermore, in the complementary power supply modulator according to the fifth embodiment, similarly to the complementary power supply modulator according to the third embodiment, the second voltage V 2 to the first voltage V 1 The voltage may be the same as

[0060] Sixth Embodiment A complementary power supply modulator according to a sixth embodiment will be described with reference to Figure 9. The complementary power supply modulator according to the second embodiment is the same as the complementary power supply modulator according to the first embodiment except that a low-voltage side combiner 40 is added. In Figure 9, the same reference numerals as those shown in Figures 1 and 2 indicate the same or corresponding parts.

[0061] The following description will focus on the low-voltage side combiner 40, which is a difference from the first embodiment. The low-voltage side combiner 40 has a first low-voltage side summing node 40a electrically connected directly to the input terminal 2, and a third voltage V 3 A third power supply potential node V 3 a second low-voltage side summing node 40b connected directly to the first low-voltage side summing node 40a; a third voltage V 3 and a low-voltage side combined output node 40c from which a PWM signal obtained by combining the above is output.

[0062] A normally-on depletion type N-type transistor is used as the first N-type transistor 21 constituting the low-voltage side switching element 20, and the third voltage V 3 is set to a negative voltage. By doing so, it is not necessary to add a negative value to the PWM signal. 2 A second voltage V applied to 2 to the first power supply potential node V 1 A first voltage V applied to 1 It is preferable to make it the same as

[0063] The low-voltage side combiner 40 has a DC block that is a capacitor and an inductor section that is a choke coil, similar to the high-voltage side combiner 30 in the first embodiment shown in Figure 2. One electrode of the capacitor in the low-voltage side combiner 40 is electrically connected directly to the first low-voltage side summing node 40a, and the other electrode is electrically connected directly to the low-voltage side combined output node 40c. One electrode of the choke coil in the low-voltage side combiner 40 is electrically connected directly to the third power supply potential node V 3 and the other electrode is electrically connected directly to a combined output node 40c on the low voltage side.

[0064] The low-voltage side combiner 40 may also be configured to include a DC block that is a capacitor and an inductor section, similar to the high-voltage side combiner 30A in the second embodiment shown in Fig. 5. In this case, one electrode of the capacitor in the low-voltage side combiner 40 is electrically connected directly to the first low-voltage side summing node 40a, and the other electrode is electrically connected directly to the low-voltage side combined output node 40c.

[0065] In the inductor section of the combiner 40 on the low voltage side, a first parallel combination of the first inductor, the second inductor, and the first resistor, and a second parallel combination of the third inductor and the second resistor are connected to a third power supply potential node V 3The first capacitor is connected in series to a low-voltage side composite output node 40c in this order, the first capacitor is connected between one electrode of the first inductor and the ground node, and the second capacitor is connected between the connection point between the other electrode of the first inductor and one end of the first parallel body and the ground node.

[0066] The combiner 40 on the low voltage side may be changed to only a capacitor that constitutes a DC block by setting the threshold voltage of the first N-type transistor 21 and the voltage amplitude and duty ratio of the PWM signal.

[0067] In the complementary power supply modulator according to the sixth embodiment, for example, the H level of the PWM signal is 3 V, the L level is 0 V, and the third voltage V 3 is -3V, when the PWM signal is at H level, a composite voltage of 0V is output to the low-voltage side composite output node 40c of the low-voltage side combiner 40, and the first N-type transistor 21 that constitutes the low-voltage side switching element 20 is turned on, and when the PWM signal is at L level, a composite voltage of -3V is output to the low-voltage side composite output node 40c of the low-voltage side combiner 40, and the first N-type transistor 21 that constitutes the low-voltage side switching element 20 is turned off.

[0068] The complementary power supply modulator according to embodiment 6 has the same effects as the complementary power supply modulator according to embodiment 1. Note that, like the complementary power supply modulator according to embodiment 4, the complementary power supply modulator according to embodiment 6 may also include a second P-type transistor 12 cascode-connected with the first P-type transistor 11 as the high-voltage side switching element 10. Also, like the complementary power supply modulator according to embodiment 5, the complementary power supply modulator according to embodiment 6 may also include a second P-type transistor 12 cascode-connected with the first P-type transistor 11 as the high-voltage side switching element 10, and a second N-type transistor 22 cascode-connected with the first N-type transistor 21 as the low-voltage side switching element 20.

[0069] It should be noted that the embodiments may be freely combined, or any of the components in each embodiment may be modified, or any of the components in each embodiment may be omitted.

[0070] The complementary power supply modulator according to the present disclosure is suitable as a power supply modulator that modulates an applied bias voltage in response to the voltage level of an input signal that is a PWM signal, and is also suitable as a power supply modulator used in a power supply modulation amplifier.

[0071] 1 Input terminal, 2 Output terminal, 10 High-voltage side switching element, 10a First high-voltage side main node, 10b Second high-voltage side main node, 10c High-voltage side control node, 11 First P-type transistor, 20 Low-voltage side switching element, 20a First low-voltage side main node, 20b Second low-voltage side main node, 20c Low-voltage side control node, 21 First N-type transistor, 30 High-voltage side combiner, 30a First high-voltage side summing node, 30b Second high-voltage side summing node, 30c High-voltage side combined output node, 31 Capacitor, 32 Choke coil, 40 Low-voltage side combiner.

Claims

1. A high-voltage side switching element having a high-voltage side control node to which a PWM signal is input, a first high-voltage side main node connected to a first power supply potential node to which a first voltage that is at least twice the amplitude of the PWM signal is applied, and a second high-voltage side main node connected to an output terminal, and comprising a first P-type transistor having a source electrode electrically connected to the first high-voltage side main node, a drain electrode electrically connected to the second high-voltage side main node, and a gate electrode electrically connected to the high-voltage side control node; a low-voltage side switching element having a first low-voltage side main node connected to the output terminal, a second low-voltage side main node connected to a ground potential node, and a low-voltage side control node to which a PWM signal is input, and comprising a first N-type transistor having a drain electrode electrically connected to the first low-voltage side main node, a source electrode electrically connected to the second low-voltage side main node, and a gate electrode electrically connected to the low-voltage side control node; 1. A complementary power supply modulator comprising: a first high-voltage side summing node electrically connected to an input terminal to which a PWM signal is input; a second high-voltage side summing node electrically connected to a second power supply potential node to which a second voltage is applied; and a high-voltage side combining output node electrically connected to a high-voltage side control node of a high-voltage side switching element and outputting a PWM signal obtained by combining the PWM signal input to the first high-voltage side summing node and a second voltage applied to the second high-voltage side summing node, and a high-voltage side combiner having no resistance loss for combining the PWM signal input to the first high-voltage side summing node and the second voltage applied to the second high-voltage side summing node.

2. A complementary power supply modulator as described in claim 1, wherein the first P-type transistor is a transistor using a wide band gap semiconductor having a band gap of 3 eV or more, and the first N-type transistor is a transistor using a wide band gap semiconductor having a band gap of 3 eV or more.

3. A complementary power supply modulator as claimed in claim 1, wherein the high-voltage side combiner has a DC block electrically connected between the first high-voltage side summing node and the high-voltage side combined output node, and a choke coil electrically connected between the second high-voltage side summing node and the high-voltage side combined output node.

4. A complementary power supply modulator as described in claim 3, wherein the DC block is a capacitor, and the capacitance value of the capacitor is set to a value equal to or greater than the reciprocal of a time constant calculated from the input impedance of the first P-type transistor, which is the same as the frequency of the PWM signal, and the resistance value of the choke coil.

5. A complementary power supply modulator as claimed in claim 3, wherein the DC block is a capacitor, and the capacitance value of the capacitor is set to a value that is 5 times or more the reciprocal of a time constant calculated from the input impedance of the first P-type transistor, which is the same as the frequency of the PWM signal, and the resistance value of the choke coil.

6. A complementary power supply modulator according to claim 3, wherein the impedance of said choke coil is set to a value that is at least five times the input impedance of said first P-type transistor at the frequency of said PWM signal.

7. A complementary power supply modulator as claimed in claim 1, wherein the second voltage applied to said second power supply potential node is higher than the first voltage applied to said first power supply potential node.

8. A complementary power supply modulator as claimed in claim 1, wherein the second voltage applied to said second power supply potential node is the same as the first voltage applied to said first power supply potential node.

9. A complementary power supply modulator as claimed in claim 1, wherein the high-voltage side combiner comprises: a DC block consisting of a capacitor electrically connected between the first high-voltage side summing node and the high-voltage side combined output node; and an inductor section comprising a first parallel combination of a first inductor, a second inductor and a first resistor, and a second parallel combination of a third inductor and a second resistor, which are connected in series in that order between the second high-voltage side summing node and the high-voltage side combined output node, a first capacitor connected between the second high-voltage side summing node and a ground node, and a second capacitor connected between the connection point of the first inductor and the first parallel combination and the ground node.

10. A complementary power supply modulator as claimed in any one of claims 1 to 9, further comprising a low-voltage side combiner having a first low-voltage side summing node electrically connected to the input terminal, a second low-voltage side summing node connected to a third power supply potential node to which a third voltage is applied, and a low-voltage side combined output node connected to a low-voltage side control node of the low-voltage side switching element and outputting a PWM signal obtained by combining the PWM signal input to the first low-voltage side summing node and the third voltage applied to the second low-voltage side summing node.

11. A complementary power supply modulator as claimed in any one of claims 1 to 9, wherein the high-voltage side switching element further comprises a P-type transistor that is cascode-connected with the first P-type transistor in two or more stages.

12. A complementary power supply modulator as claimed in any one of claims 1 to 9, wherein the low-voltage side switching element further comprises an N-type transistor which is cascode-connected with the first N-type transistor in two or more stages.

Citation Information

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