Semiconductor device and semiconductor module

Abstract

This semiconductor device comprises a heat dissipation member, a base material, a first conductive layer, a first semiconductor element, and a sealing resin. When viewed in a first direction, the heat dissipation member is surrounded by a first peripheral edge that defines the sealing resin. The heat dissipation member has a base part and a heat dissipation part. The base part has the base material mounted thereon, and at least a portion thereof is covered with the sealing resin. The heat dissipation part is positioned on the side opposite to the base material with respect to the base part, and is exposed from the sealing resin. The base part has provided thereto a first penetration section that extends in the first direction. The sealing resin has provided thereto a second penetration section that extends in the first direction. When viewed in the first direction, the second penetration section overlaps the first penetration section.

Description

Semiconductor device and semiconductor module

[0001] The present disclosure relates to a semiconductor device and a semiconductor module including the semiconductor device.

[0002] Patent Document 1 discloses an example of a semiconductor device equipped with a cooler. The cooler includes a housing having a hollow region and a heat dissipation member. The housing has an opening that leads to the hollow region. The heat dissipation member is attached to the housing so as to cover the opening. A portion of the heat dissipation member is housed in the hollow region. The semiconductor device is bonded to the portion of the heat dissipation member that protrudes from the hollow region via a bonding material. When cooling water is flowed through the hollow region, the cooling water comes into contact with the heat dissipation member. This allows the semiconductor device to be cooled via the heat dissipation member.

[0003] It is possible to integrate the heat dissipation member with the semiconductor device rather than the cooler. In this case, if a bonding material is used to attach the heat dissipation member to the cooler, there is a risk that the heat dissipation member will become misaligned with respect to the cooler. Therefore, a method is desired that allows the heat dissipation member to be attached to the cooler more easily while suppressing misalignment with the cooler.

[0004] International Publication No. 2017 / 094370

[0005] An object of the present disclosure is to provide an improved semiconductor device compared to conventional devices. In particular, in view of the above circumstances, an object of the present disclosure is to provide a semiconductor device that can be more easily attached while suppressing misalignment of a heat dissipation member relative to a cooler.

[0006] A semiconductor device provided by a first aspect of the present disclosure includes a heat dissipation member, a substrate including an insulating layer and mounted on one side of the heat dissipation member in a first direction, a conductive layer located on the opposite side of the substrate from the heat dissipation member and bonded to the substrate, a semiconductor element bonded to the conductive layer, and a sealing resin covering the substrate, the conductive layer, and the semiconductor element. When viewed in the first direction, the heat dissipation member is surrounded by a first periphery that defines the sealing resin. The heat dissipation member has a base on which the substrate is mounted and at least a portion of which is covered by the sealing resin, and a heat dissipation portion located on the opposite side of the base from the substrate and exposed from the sealing resin. The base has a first penetration portion that penetrates the base in the first direction. The sealing resin has a second penetration portion that penetrates the sealing resin in the first direction. When viewed in the first direction, the second penetration portion overlaps the first penetration portion.

[0007] A semiconductor module provided by a second aspect of the present disclosure includes a cooler, a semiconductor device, and a fastening member that secures the semiconductor device to the cooler. The semiconductor device further includes a power terminal and a signal terminal, in comparison with the semiconductor device provided by the first aspect of the present disclosure. The power terminal is electrically connected to at least one of a conductive layer and a semiconductor element provided in the semiconductor device. The signal terminal is electrically connected to the semiconductor element. Each of the power terminal and the signal terminal is exposed from a sealing resin provided in the semiconductor device. The fastening member is inserted into each of the first through-portion and the second through-portion provided in the semiconductor device.

[0008] According to the above configuration, it is possible to more easily attach the heat dissipation member to the cooler while suppressing misalignment of the heat dissipation member relative to the cooler in the semiconductor device.

[0009] Other features and advantages of the present disclosure will become more apparent from the following detailed description taken in conjunction with the accompanying drawings.

[0010] FIG. 1 is a perspective view of a semiconductor device according to a first embodiment of the present disclosure. FIG. 2 is a plan view of the semiconductor device shown in FIG. 1. FIG. 3 is a plan view corresponding to FIG. 2, seen through the sealing resin. FIG. 4 is a partial enlarged view of FIG. 3. FIG. 5 is a plan view corresponding to FIG. 2, seen through the first conductive member, and omitting the sealing resin and the second conductive member. FIG. 6 is a right side view of the semiconductor device shown in FIG. 1. FIG. 7 is a bottom view of the semiconductor device shown in FIG. 1. FIG. 8 is a cross-sectional view taken along line VIII-VIII in FIG. 3. FIG. 9 is a cross-sectional view taken along line IX-IX in FIG. 3. FIG. 10 is a partial enlarged view of the first semiconductor element and its periphery shown in FIG. 9. FIG. 11 is a partial enlarged view of the second semiconductor element and its periphery shown in FIG. 9. FIG. 12 is a cross-sectional view taken along line XII-XII in FIG. 3. FIG. 13 is a cross-sectional view taken along line XIII-XIII in FIG. 3. FIG. 14 is a partial enlarged view of FIG. 13. 15 is a cross-sectional view of a semiconductor module including the semiconductor device shown in FIG. 1. FIG. 16 is a schematic diagram of a vehicle equipped with the semiconductor device shown in FIG. 1. FIG. 17 is a plan view of a semiconductor device according to a second embodiment of the present disclosure. FIG. 18 is a cross-sectional view of the semiconductor device shown in FIG. 17. FIG. 19 is a plan view of a semiconductor device according to a modified example of the second embodiment of the present disclosure. FIG. 20 is a cross-sectional view of the semiconductor device shown in FIG. 19. FIG. 21 is a plan view of a semiconductor device according to a third embodiment of the present disclosure. FIG. 22 is a plan view corresponding to FIG. 21, seen through the sealing resin. FIG. 23 is a cross-sectional view taken along line XXIII-XXIII of FIG. 22. FIG. 24 is a plan view of a semiconductor device according to a fourth embodiment of the present disclosure. FIG. 25 is a cross-sectional view of the semiconductor device shown in FIG. 24.

[0011] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present disclosure will be described with reference to the accompanying drawings.

[0012] First Embodiment: A semiconductor device A10 according to a first embodiment of the present disclosure will be described with reference to FIGS. 1 to 15 . The semiconductor device A10 includes a substrate 11, a first conductive layer 121, a second conductive layer 122, a first power terminal 13, two second power terminals 14, two third power terminals 15, a plurality of semiconductor elements 20, a first conductive member 31, a second conductive member 32, a sealing resin 50, and a heat dissipation member 70. The semiconductor device A10 further includes a first signal terminal 161, a second signal terminal 162, a third signal terminal 171, a fourth signal terminal 172, two fifth signal terminals 181, two sixth signal terminals 182, a seventh signal terminal 191, two thermistors 23, a first wiring 61, and a second wiring 62. For ease of understanding, FIGS. 3 and 4 show the sealing resin 50 in a transparent manner. In FIG. 3 , the transparent sealing resin 50 is indicated by an imaginary line (double-dashed line). 5, for ease of understanding, the first conductive member 31 is shown in perspective, and the second conductive member 32 and the sealing resin 50 are omitted. In FIG. 14, for ease of understanding, the sealing resin 50 is omitted, and the first wiring 61 is shown in perspective.

[0013] In the description of the semiconductor device A10, for convenience, the normal direction to the main surface 711 of the base 71 of the heat dissipation member 70 (described later) will be referred to as the "first direction z." One direction perpendicular to the first direction z will be referred to as the "second direction x." A direction perpendicular to both the first direction z and the second direction x will be referred to as the "third direction y."

[0014] The semiconductor device A10 converts DC power input to the first power terminal 13 and the two second power terminals 14 into AC power using a plurality of semiconductor elements 20. The converted AC power is input from each of the two third power terminals 15 to a power supply target such as a motor.

[0015] The heat dissipation member 70 serves to cool the semiconductor device A 10. The heat dissipation member 70 is made of a material containing, for example, aluminum (Al).

[0016] As shown in FIGS. 8 , 9 , 12 , and 13 , the heat dissipation member 70 has a base 71 and a heat dissipation portion 72. The base 71 is flat. At least a portion of the base 71 is covered with the sealing resin 50. The base 71 has a main surface 711, a back surface 712, and an end surface 713. The main surface 711 faces the side facing the substrate 11 in the first direction z. The sealing resin 50 is in contact with the main surface 711. The back surface 712 faces the side opposite the main surface 711 in the first direction z. As shown in FIG. 7 , the back surface 712 is exposed from the sealing resin 50. The end surface 713 faces in a direction perpendicular to the first direction z. When viewed in a direction perpendicular to the first direction z, the sealing resin 50 overlaps the end surface 713. At least a portion of the end surface 713 is covered with the sealing resin 50.

[0017] As shown in Figures 8, 9, 12, and 13, the heat dissipation portion 72 is located on the opposite side of the base portion 71 from the substrate 11 in the first direction z. The heat dissipation portion 72 protrudes from a rear surface 712 of the base portion 71. The heat dissipation portion 72 is exposed from the sealing resin 50. As shown in Figure 7, the heat dissipation portion 72 is a plurality of pins that are spaced apart from each other in a direction perpendicular to the first direction z. Alternatively, the heat dissipation portion 72 may be a plurality of fins that are spaced apart from each other in a direction perpendicular to the first direction z. When viewed in the first direction z, the heat dissipation portion 72 is located inward of a second periphery 71A that defines the base portion 71.

[0018] As shown in FIGS. 8 , 9 , 12 , and 13 , the substrate 11 is mounted on one side of the base 71 of the heat dissipation member 70 in the first direction z. The substrate 11 has a first conductive layer 121 and a second conductive layer 122 mounted thereon. In the semiconductor device A10, the substrate 11 is made of a DBC (Direct Bonded Copper) substrate. As shown in FIGS. 9 to 11 , the substrate 11 includes an insulating layer 111, two intermediate layers 112, and a metal layer 113. The substrate 11 is covered with a sealing resin 50.

[0019] As shown in FIGS. 9 to 11 , the insulating layer 111 includes a portion located between the metal layer 113 and the two intermediate layers 112 in the first direction z. The insulating layer 111 is made of a material with relatively high thermal conductivity. For example, the insulating layer 111 is made of ceramics containing aluminum nitride (AlN). Alternatively, the insulating layer 111 may be made of an insulating resin sheet. The dimension of the insulating layer 111 in the first direction z is smaller than the dimensions of each of the first conductive layer 121 and the second conductive layer 122 in the first direction z. As viewed in the first direction z, the insulating layer 111 includes a third periphery 11A that defines the base material 11. As shown in FIG. 7 , at least a portion of the heat dissipation portion 72 is located inward from the third periphery 11A as viewed in the first direction z.

[0020] 9 to 11 , the two intermediate layers 112 are positioned between the insulating layer 111 and the first and second conductive layers 121 and 122 in the first direction z. The two intermediate layers 112 are spaced apart from each other in the second direction x. The composition of the two intermediate layers 112 includes copper (Cu). As shown in FIG. 5 , when viewed in the first direction z, each of the two intermediate layers 112 is positioned inward from a third periphery 11A that defines the substrate 11.

[0021] As shown in FIGS. 9 to 11 , the metal layer 113 is located on the opposite side of the insulating layer 111 from the two intermediate layers 112 in the first direction z. The metal layer 113 contains copper. The metal layer 113 is bonded to the main surface 711 of the base 71 via a bonding material 73. The bonding material 73 is, for example, solder. Alternatively, the bonding material 73 may contain a sintered body of metal particles. When viewed in the first direction z, the metal layer 113 is located inward of a third periphery 11A that defines the substrate 11.

[0022] As shown in FIGS. 8 , 9 , 12 , and 13 , the sealing resin 50 covers the substrate 11, the first conductive layer 121, the second conductive layer 122, the semiconductor elements 20, the first conductive member 31, and the second conductive member 32. The sealing resin 50 also covers a portion of each of the first power terminal 13, the two second power terminals 14, and the two third power terminals 15. The sealing resin 50 has electrical insulation properties. The sealing resin 50 is made of a material including, for example, a black epoxy resin. As shown in FIGS. 2 , 6 , and 7 , the sealing resin 50 has a top surface 51, a bottom surface 52, a first side surface 53, a second side surface 54, two third side surfaces 55, and two recesses 56.

[0023] As shown in Fig. 6 , the top surface 51 faces the same side as the main surface 711 of the base 71 in the first direction z. As shown in Fig. 6 , the bottom surface 52 faces the opposite side to the top surface 51 in the first direction z. As shown in Fig. 7 , the back surface 712 of the base 71 is exposed from the bottom surface 52.

[0024] As shown in Figures 2, 6, and 7, and as shown in Figure 6, the first side surface 53 and the second side surface 54 are spaced apart from each other in the second direction x. The first side surface 53 and the second side surface 54 face opposite each other in the second direction x. As shown in Figures 2 and 7, the two third side surfaces 55 are spaced apart from each other in the third direction y. The two third side surfaces 55 face opposite each other in the third direction y.

[0025] 2 and 7 , the two recesses 56 are recessed from the first side surface 53 in the second direction x. The two recesses 56 extend from the top surface 51 to the bottom surface 52 in the first direction z. The two recesses 56 are located on both sides of the first power terminal 13 in the third direction y.

[0026] 2, as viewed in the first direction z, the heat dissipation member 70 is surrounded by a first periphery 50A that defines the sealing resin 50. Furthermore, as viewed in the first direction z, a second periphery 71A that defines the base 71 is spaced apart from the first periphery 50A.

[0027] 2, 3, 5 to 8, and 12, the base 71 is provided with a plurality of first through portions 714. Each of the plurality of first through portions 714 penetrates the base 71 in the first direction z. Each of the plurality of first through portions 714 opens on the main surface 711 and the back surface 712 of the heat dissipation member 70. As viewed in the first direction z, each of the plurality of first through portions 714 is spaced apart from the third periphery 11A that defines the substrate 11. In the semiconductor device A10, as viewed in the first direction z, the plurality of first through portions 714 are located at the four corners of the base 71.

[0028] As shown in FIGS. 2 , 6 to 8 , and 12 , the sealing resin 50 is provided with a plurality of second through portions 50B. Each of the plurality of second through portions 50B penetrates the sealing resin 50 in the first direction z. Each of the plurality of second through portions 50B opens at the top surface 51 of the sealing resin 50. As viewed in the first direction z, the plurality of second through portions 50B individually overlaps with a plurality of first through portions 714 provided in the base 71. The plurality of second through portions 50B individually communicates with the plurality of first through portions 714. In the semiconductor device A10, the plurality of second through portions 50B are located between the top surface 51 and the plurality of first through portions 714 in the first direction z. As viewed in the first direction z, the area of ​​each of the plurality of second through portions 50B is larger than the area of ​​each of the plurality of first through portions 714.

[0029] 5, 9, and 13, the base 71 has a plurality of recesses 715 recessed from the main surface 711. Each of the recesses 715 extends in either the second direction x or the third direction y. As shown in FIG. 14, the base 71 has a plurality of inner circumferential surfaces 715A connected to the main surface 711. Each of the inner circumferential surfaces 715A defines one of the recesses 715. The sealing resin 50 is in contact with each of the inner circumferential surfaces 715A.

[0030] As shown in FIGS. 9 to 11 , the first conductive layer 121 and the second conductive layer 122 are located on the opposite side of the insulating layer 111 of the substrate 11 from the metal layer 113. The first conductive layer 121 and the second conductive layer 122 contain copper. The first conductive layer 121 and the second conductive layer 122 are spaced apart from each other in the second direction x. As shown in FIGS. 8 and 9 , the first conductive layer 121 has a first mounting surface 121A that faces the same side as the main surface 711 of the base 71 in the first direction z. As shown in FIG. 10 , the first conductive layer 121 is bonded to one of the two intermediate layers 112 of the substrate 11 via a first bonding layer 129. The first bonding layer 129 is, for example, solder. 8 and 9, the second conductive layer 122 has a second mounting surface 122A facing the same side as the first mounting surface 121A in the first direction z. As shown in Fig. 11, the second conductive layer 122 is bonded to the other of the two intermediate layers 112 via a first bonding layer 129.

[0031] As shown in FIGS. 5 and 9 , each of the multiple semiconductor elements 20 is mounted on either the first conductive layer 121 or the second conductive layer 122. The multiple semiconductor elements 20 are, for example, MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors). Alternatively, the multiple semiconductor elements 20 may be switching elements such as IGBTs (Insulated Gate Bipolar Transistors) or diodes. In the description of the semiconductor device A10, the multiple semiconductor elements 20 are n-channel MOSFETs with a vertical structure. The multiple semiconductor elements 20 include a compound semiconductor substrate. The compound semiconductor substrate contains silicon carbide (SiC).

[0032] 5 , in the semiconductor device A10, the multiple semiconductor elements 20 include multiple first semiconductor elements 21 and multiple second semiconductor elements 22. The structure of each of the multiple second semiconductor elements 22 is the same as the structure of each of the multiple first semiconductor elements 21. The multiple first semiconductor elements 21 are mounted on a first mounting surface 121A of a first conductive layer 121. The multiple first semiconductor elements 21 are arranged along the third direction y. The multiple second semiconductor elements 22 are mounted on a second mounting surface 122A of a second conductive layer 122. The multiple second semiconductor elements 22 are arranged along the third direction y.

[0033] As shown in FIGS. 5 and 10, each of the plurality of first semiconductor elements 21 has a first electrode 211 , a second electrode 212 , a first gate electrode 213 and a first detection electrode 214 .

[0034] 10 , the first electrode 211 faces the first mounting surface 121A of the first conductive layer 121. A current corresponding to the power before being converted by the first semiconductor element 21 flows through the first electrode 211. In other words, the first electrode 211 corresponds to the drain electrode of the first semiconductor element 21. The first electrode 211 is conductively bonded to the first mounting surface 121A via a conductive bonding layer 29. As a result, the first electrode 211 of each of the multiple first semiconductor elements 21 is electrically connected to the first conductive layer 121. The conductive bonding layer 29 is a sintered metal containing silver (Ag) or the like. Alternatively, the conductive bonding layer 29 may be solder.

[0035] 10 , the second electrode 212 is located on the opposite side of the first conductive layer 121 from the side facing the first mounting surface 121A in the first direction z. Therefore, the first electrode 211 and the second electrode 212 are located on opposite sides of each other in the first direction z. A current corresponding to the power converted by the first semiconductor element 21 flows through the second electrode 212. In other words, the second electrode 212 corresponds to the source electrode of the first semiconductor element 21.

[0036] 10 , the first gate electrode 213 is located on the opposite side of the first conductive layer 121 in the first direction z from the side facing the first mounting surface 121A. Therefore, the first gate electrode 213 is located on the same side as the second electrode 212 in the first direction z. A gate voltage for driving the first semiconductor element 21 is applied to the first gate electrode 213. As shown in FIG. 5 , the area of ​​the first gate electrode 213 is smaller than the area of ​​the second electrode 212 when viewed in the first direction z.

[0037] 5 , the first detection electrode 214 is located on the same side as the second electrode 212 and the first gate electrode 213 in the first direction z. The first detection electrode 214 is located adjacent to the first gate electrode 213 in the third direction y. A voltage equivalent to the voltage applied to the second electrode 212 is applied to the first detection electrode 214. When viewed in the first direction z, the area of ​​the first detection electrode 214 is approximately equal to the area of ​​the first gate electrode 213.

[0038] As shown in FIGS. 5 and 11 , each of the plurality of second semiconductor elements 22 has a third electrode 221 , a fourth electrode 222 , a second gate electrode 223 and a second detection electrode 224 .

[0039] 11 , the third electrode 221 faces the second mounting surface 122A of the second conductive layer 122. A current corresponding to the power before being converted by the second semiconductor element 22 flows through the third electrode 221. In other words, the third electrode 221 corresponds to the drain electrode of the second semiconductor element 22. The third electrode 221 is conductively bonded to the second mounting surface 122A via the conductive bonding layer 29. As a result, the third electrode 221 of each of the multiple second semiconductor elements 22 is electrically connected to the second conductive layer 122.

[0040] 11 , the fourth electrode 222 is located on the opposite side of the second conductive layer 122 from the side facing the second mounting surface 122A in the first direction z. Therefore, the third electrode 221 and the fourth electrode 222 are located on opposite sides of each other in the first direction z. A current corresponding to the power converted by the second semiconductor element 22 flows through the fourth electrode 222. In other words, the fourth electrode 222 corresponds to the source electrode of the second semiconductor element 22.

[0041] 11 , the second gate electrode 223 is located on the opposite side of the second conductive layer 122 in the first direction z from the side facing the second mounting surface 122A. Therefore, the second gate electrode 223 is located on the same side as the fourth electrode 222 in the first direction z. A gate voltage for driving the second semiconductor element 22 is applied to the second gate electrode 223. As shown in FIG. 5 , the area of ​​the second gate electrode 223 is smaller than the area of ​​the fourth electrode 222 when viewed in the first direction z.

[0042] 5 , the second detection electrode 224 is located on the same side as the fourth electrode 222 and the second gate electrode 223 in the first direction z. The second detection electrode 224 is located on both sides of the second gate electrode 223 in the third direction y. A voltage equivalent to the voltage applied to the fourth electrode 222 is applied to the second detection electrode 224. When viewed in the first direction z, the area of ​​the second detection electrode 224 is approximately equal to the area of ​​the second gate electrode 223.

[0043] As shown in FIGS. 3 and 9 , the first power terminal 13 is located on the opposite side of the second conductive layer 122 from the first conductive layer 121 in the second direction x. The first power terminal 13 is conductively bonded to the first conductive layer 121. This allows the first power terminal 13 to be electrically connected to the first electrodes 211 of the multiple first semiconductor elements 21 via the first conductive layer 121. The first power terminal 13 is a P terminal (positive electrode) to which DC power to be converted is input. The first power terminal 13 extends from the first conductive layer 121 in the second direction x. The first power terminal 13 has a covering portion 131 and an exposed portion 132. As shown in FIG. 9 , the covering portion 131 is conductively bonded to the first mounting surface 121A of the first conductive layer 121 and is covered with sealing resin 50. The exposed portion 132 extends from the covered portion 131 in the second direction x and is exposed from the first side surface 53 of the sealing resin 50 .

[0044] As shown in FIGS. 3 and 8 , each of the two second power terminals 14 is located on the same side as the first power terminal 13 in the second direction x with respect to the first conductive layer 121 and the second conductive layer 122, but is spaced apart from the first conductive layer 121 and the second conductive layer 122. Each of the two second power terminals 14 is electrically connected to the fourth electrodes 222 of the second semiconductor elements 22. The two second power terminals 14 are N terminals (negative electrodes) to which DC power to be converted is input. The second power terminals 14 are spaced apart from each other in the third direction y. The first power terminal 13 is located between the two second power terminals 14 in the third direction y. Each of the two second power terminals 14 has a covering portion 141 and an exposed portion 142. As shown in FIG. 8 , the covering portion 141 is spaced apart from the first conductive layer 121 and is covered with the sealing resin 50. The exposed portion 142 extends from the covered portion 141 in the second direction x and is exposed from the first side surface 53 of the sealing resin 50 .

[0045] As shown in FIGS. 3 and 8 , each of the two third power terminals 15 is located on the opposite side of the first conductive layer 121 from the second conductive layer 122 in the second direction x. Each of the two third power terminals 15 is conductively bonded to the second conductive layer 122. This electrically connects each of the two third power terminals 15 to the third electrodes 221 of the second semiconductor elements 22 via the second conductive layer 122. AC power converted by the semiconductor elements 20 is output from each of the two third power terminals 15. In the semiconductor device A10, the two third power terminals 15 are spaced apart from each other in the third direction y. Each of the two third power terminals 15 has a covering portion 151 and an exposed portion 152. As shown in FIG. 8 , the covering portion 151 is conductively bonded to the second mounting surface 122A of the second conductive layer 122 and is covered with the sealing resin 50. The exposed portion 152 extends from the covered portion 151 in the second direction x and is exposed to the outside from the second side surface 54 of the sealing resin 50 .

[0046] 10 , the first wiring 61 is bonded to a first mounting surface 121A of the first conductive layer 121. The first wiring 61 is located on the opposite side of the plurality of second semiconductor elements 22 with respect to the plurality of first semiconductor elements 21 in the second direction x. The first wiring 61 is electrically connected to the plurality of first semiconductor elements 21 and the first conductive layer 121. As shown in FIGS. 5 and 10 , the first wiring 61 has a first mounting layer 611, a first metal layer 612, two first gate wiring layers 613, a first detection wiring layer 614, a first temperature detection wiring layer 615, and a second detection wiring layer 616.

[0047] 5 , the first mounting layer 611 includes two first gate wiring layers 613, a first detection wiring layer 614, two first temperature detection wiring layers 615, and a second detection wiring layer 616. The first mounting layer 611 is an insulator. The first mounting layer 611 is made of, for example, ceramics. Alternatively, the first mounting layer 611 may be made of an insulating resin sheet.

[0048] 10 , the first metal layer 612 is located on a side facing the first mounting surface 121A of the first conductive layer 121 with the first mounting layer 611 as a reference in the first direction z. The first metal layer 612 is bonded to the first mounting layer 611. The first metal layer 612 contains copper. The first metal layer 612 is bonded to the first mounting surface 121A via a second bonding layer 68. The second bonding layer 68 is, for example, solder.

[0049] 5 and 10 , the two first gate wiring layers 613 are located on the opposite side of the first mounting layer 611 from the first metal layer 612. The two first gate wiring layers 613 are bonded to the first mounting layer 611. Of the two first gate wiring layers 613, one of the first gate wiring layers 613 is conductively bonded to a plurality of first wires 41. The plurality of first wires 41 are individually conductively bonded to the first gate electrodes 213 of the plurality of first semiconductor elements 21. Furthermore, a plurality of sixth wires 46 are conductively bonded to each of the two first gate wiring layers 613. As a result, each of the two first gate wiring layers 613 is electrically connected to the first gate electrodes 213 of the plurality of first semiconductor elements 21.

[0050] 5 and 10 , the first detection wiring layer 614 is located on the opposite side of the first mounting layer 611 from the first metal layer 612. The first detection wiring layer 614 is bonded to the first mounting layer 611. A plurality of second wires 42 are conductively bonded to the first detection wiring layer 614. Furthermore, the plurality of second wires 42 are individually conductively bonded to the first detection electrodes 214 of the plurality of first semiconductor elements 21. As a result, the first detection wiring layer 614 is electrically connected to the first detection electrodes 214 of the plurality of first semiconductor elements 21.

[0051] 5 , the two first temperature detection wiring layers 615 are located on the opposite side of the first mounting layer 611 from the first metal layer 612. The two first temperature detection wiring layers 615 are bonded to the first mounting layer 611. The two first temperature detection wiring layers 615 are adjacent to each other in the third direction y.

[0052] 5 , the second detection wiring layer 616 is located on the opposite side of the first metal layer 612 with respect to the first mounting layer 611. The second detection wiring layer 616 is bonded to the first mounting layer 611. A third wire 43 is conductively bonded to the second detection wiring layer 616. The third wire 43 is further conductively bonded to the first mounting surface 121A of the first conductive layer 121. This provides electrical continuity between the second detection wiring layer 616 and the first conductive layer 121.

[0053] 11 , the second wiring 62 is bonded to the second mounting surface 122A of the second conductive layer 122. The second wiring 62 is located on the opposite side of the plurality of first semiconductor elements 21 with respect to the plurality of second semiconductor elements 22 in the second direction x. The second wiring 62 is electrically connected to the plurality of second semiconductor elements 22 and the second conductive layer 122. As shown in FIGS. 5 and 11 , the second wiring 62 has a second mounting layer 621, a second metal layer 622, two second gate wiring layers 623, a third detection wiring layer 624, two second temperature detection wiring layers 625, and a fourth detection wiring layer 626.

[0054] 5 , the second mounting layer 621 includes two second gate wiring layers 623, a third detection wiring layer 624, two second temperature detection wiring layers 625, and a fourth detection wiring layer 626. The second mounting layer 621 is an insulator. The second mounting layer 621 is made of, for example, ceramics. Alternatively, the second mounting layer 621 may be made of an insulating resin sheet.

[0055] 11 , the second metal layer 622 is located on the side facing the second mounting surface 122A of the second conductive layer 122 with the second mounting layer 621 as the reference in the first direction z. The second metal layer 622 is bonded to the second mounting layer 621. The second metal layer 622 contains copper. The second metal layer 622 is bonded to the second mounting surface 122A via a second bonding layer 68.

[0056] 5 and 11 , the two second gate wiring layers 623 are located on the opposite side of the second metal layer 622 with respect to the second mounting layer 621. The two second gate wiring layers 623 are bonded to the second mounting layer 621. A plurality of fourth wires 44 are conductively bonded to one of the two second gate wiring layers 623. The plurality of fourth wires 44 are individually conductively bonded to the second gate electrodes 223 of the second semiconductor elements 22. Furthermore, a plurality of seventh wires 47 are conductively bonded to each of the two second gate wiring layers 623. As a result, each of the two second gate wiring layers 623 is electrically connected to the second gate electrodes 223 of the second semiconductor elements 22.

[0057] 5 and 11 , the third detection wiring layer 624 is located on the opposite side of the second metal layer 622 with respect to the second mounting layer 621. The third detection wiring layer 624 is bonded to the second mounting layer 621. A plurality of fifth wires 45 are conductively bonded to the third detection wiring layer 624. Furthermore, the plurality of fifth wires 45 are individually conductively bonded to the second detection electrodes 224 of the plurality of second semiconductor elements 22. As a result, the third detection wiring layer 624 is electrically connected to the second detection electrodes 224 of the plurality of second semiconductor elements 22.

[0058] 5 , the two second temperature detection wiring layers 625 are located on the opposite side of the second mounting layer 621 from the second metal layer 622. The two second temperature detection wiring layers 625 are bonded to the second mounting layer 621. The two second temperature detection wiring layers 625 are adjacent to each other in the third direction y.

[0059] 5, the fourth detection wiring layer 626 is located on the opposite side of the second mounting layer 621 from the second metal layer 622. The fourth detection wiring layer 626 is bonded to the second mounting layer 621.

[0060] As shown in FIGS. 10 and 11 , each of the multiple sleeves 63 is conductively bonded to either the first wiring 61 or the second wiring 62 via a third bonding layer 69. The third bonding layer 69 is, for example, solder. The multiple sleeves 63 are made of a conductive material such as metal. Each of the multiple sleeves 63 has a cylindrical shape extending in the first direction z. As shown in FIGS. 2 and 9 , each of the multiple sleeves 63 has an end surface 631 facing the same side as the first mounting surface 121A of the first conductive layer 121 in the first direction z. The end surface 631 is exposed from the top surface 51 of the sealing resin 50. The third bonding layer 69 is, for example, solder.

[0061] 4, one of the two thermistors 23 is conductively joined to two first temperature detection wiring layers 615 of the first wiring 61. As shown in FIG. 4, the other of the two thermistors 23 is conductively joined to two second temperature detection wiring layers 625 of the second wiring 62. The two thermistors 23 are used as temperature detection sensors for the semiconductor device A10.

[0062] As shown in FIG. 1 , the first signal terminal 161, the second signal terminal 162, the third signal terminal 171, the fourth signal terminal 172, the two fifth signal terminals 181, the two sixth signal terminals 182, and the seventh signal terminal 191 are formed as metal pins extending in the first direction z. These terminals protrude from the top surface 51 of the sealing resin 50. Furthermore, these terminals are individually press-fitted into a plurality of sleeves 63. As a result, each of these terminals is supported by one of the plurality of sleeves 63 and is electrically connected to one of the first wiring 61 and the second wiring 62.

[0063] 5 and 10 , the first signal terminal 161 is press-fitted into one of the multiple sleeves 63 that is conductively joined to one of the two first gate wiring layers 613 of the first wiring 61. This allows the first signal terminal 161 to be electrically connected to the first gate electrodes 213 of the multiple first semiconductor elements 21 via the two first gate wiring layers 613. A gate voltage for driving the multiple first semiconductor elements 21 is applied to the first signal terminal 161.

[0064] 5 and 11 , the second signal terminal 162 is press-fitted into one of the multiple sleeves 63 that is conductively joined to one of the two second gate wiring layers 623 of the second wiring 62. This allows the second signal terminal 162 to be electrically connected to the second gate electrodes 223 of the multiple second semiconductor elements 22 via the two second gate wiring layers 623. A gate voltage for driving the multiple second semiconductor elements 22 is applied to the second signal terminal 162.

[0065] As shown in Fig. 2 , the third signal terminal 171 is located adjacent to the first signal terminal 161 in the third direction y. As shown in Fig. 5 , the third signal terminal 171 is press-fitted into one of the multiple sleeves 63 that is conductively joined to the first detection wiring layer 614 of the first wiring 61. This allows the third signal terminal 171 to be electrically connected to the first detection electrodes 214 of each of the multiple first semiconductor elements 21 via the first detection wiring layer 614. A voltage equivalent to the voltage applied to the first detection electrodes 214 of each of the multiple first semiconductor elements 21 is applied to the third signal terminal 171.

[0066] As shown in Fig. 2 , the fourth signal terminal 172 is located adjacent to the second signal terminal 162 in the third direction y. As shown in Fig. 5 , the fourth signal terminal 172 is press-fitted into one of the multiple sleeves 63 that is conductively joined to the third detection wiring layer 624 of the second wiring 62. This allows the fourth signal terminal 172 to be electrically connected to the second detection electrodes 224 of each of the multiple second semiconductor elements 22 via the third detection wiring layer 624. A voltage equivalent to the voltage applied to the second detection electrodes 224 of each of the multiple second semiconductor elements 22 is applied to the fourth signal terminal 172.

[0067] As shown in Fig. 2 , the two fifth signal terminals 181 are located on the opposite side of the first signal terminal 161 from the third signal terminal 171 in the third direction y. The two fifth signal terminals 181 are adjacent to each other in the third direction y. As shown in Fig. 5 , the two fifth signal terminals 181 are individually press-fitted into two of the multiple sleeves 63 that are individually conductively joined to the two first temperature detection wiring layers 615 of the first wiring 61. As a result, the two fifth signal terminals 181 are electrically connected to the two thermistors 23 that are conductively joined to the two first temperature detection wiring layers 615 of the two thermistors 23.

[0068] As shown in Fig. 2 , the two sixth signal terminals 182 are located on the opposite side of the second signal terminal 162 from the fourth signal terminal 172 in the third direction y. The two sixth signal terminals 182 are adjacent to each other in the third direction y. As shown in Fig. 5 , the two sixth signal terminals 182 are individually press-fitted into two of the multiple sleeves 63 that are individually conductively joined to the two second temperature detection wiring layers 625 of the second wiring 62. As a result, the two sixth signal terminals 182 are electrically connected to the two thermistors 23 that are conductively joined to the two second temperature detection wiring layers 625 of the two thermistors 23.

[0069] As shown in Fig. 2 , the seventh signal terminal 191 is located on the opposite side of the first signal terminal 161 in the third direction y with respect to the third signal terminal 171. As shown in Fig. 5 , the seventh signal terminal 191 is press-fitted into one of the multiple sleeves 63 that is conductively joined to the second detection wiring layer 616 of the first wiring 61. This provides electrical continuity between the seventh signal terminal 191 and the first conductive layer 121 via the second detection wiring layer 616. A voltage equivalent to the DC power input to the first power terminal 13 and the two second power terminals 14 is applied to the seventh signal terminal 191.

[0070] As shown in Figures 5 and 10, the first conductive member 31 is conductively bonded to the second electrodes 212 of the multiple first semiconductor elements 21 and the second mounting surface 122A of the second conductive layer 122. This allows the second electrodes 212 of the multiple first semiconductor elements 21 to be electrically connected to the second conductive layer 122. The first conductive member 31 contains copper. The first conductive member 31 is a metal clip. As shown in Figure 5, the first conductive member 31 has a main portion 311, multiple first bonding portions 312, multiple first connecting portions 313, second bonding portions 314, and second connecting portions 315.

[0071] The main portion 311 forms a main portion of the first conductive member 31. As shown in Fig. 5 , the main portion 311 extends in the third direction y. As shown in Fig. 9 , the main portion 311 straddles between the first conductive layer 121 and the second conductive layer 122.

[0072] 10 , the multiple first bonding portions 312 are individually bonded to the second electrodes 212 of the multiple first semiconductor elements 21. Each of the multiple first bonding portions 312 faces the second electrode 212 of one of the multiple first semiconductor elements 21.

[0073] 5, the plurality of first connecting portions 313 are connected to the main portion 311 and the plurality of first bonding portions 312. The plurality of first connecting portions 313 are spaced apart from one another in the third direction y. As shown in Fig. 9, when viewed in the third direction y, the plurality of first connecting portions 313 are inclined in a direction away from the first mounting surface 121A of the first conductive layer 121 as they extend from the plurality of first bonding portions 312 toward the main portion 311.

[0074] 5 and 9 , the second bonding portion 314 is bonded to the second mounting surface 122A of the second conductive layer 122. The second bonding portion 314 faces the second mounting surface 122A. The second bonding portion 314 extends in the third direction y. The dimension of the second bonding portion 314 in the third direction y is equal to the dimension of the main portion 311 in the third direction y.

[0075] 5 and 9 , the second connecting portion 315 is connected to the main portion 311 and the second joint portion 314. When viewed in the third direction y, the second connecting portion 315 is inclined in a direction away from the second mounting surface 122A of the second conductive layer 122 as it extends from the second joint portion 314 toward the main portion 311. The dimension of the second connecting portion 315 in the third direction y is equal to the dimension of the main portion 311 in the third direction y.

[0076] 9 , 10 , and 12 , a conductive bonding layer 29 is located between the second electrode 212 of each of the multiple first semiconductor elements 21 and each of the multiple first bonding portions 312. The conductive bonding layer 29 electrically conductively bonds each of the multiple first bonding portions 312 to the second electrode 212 of each of the multiple first semiconductor elements 21. As shown in FIG. 9 , the conductive bonding layer 29 is located between the second mounting surface 122A of the second conductive layer 122 and the second bonding portion 314. The conductive bonding layer 29 electrically conductively bonds the second mounting surface 122A to the second bonding portion 314.

[0077] As shown in FIGS. 4 and 11 , the second conductive member 32 is conductively bonded to the second electrodes 212 of the plurality of second semiconductor elements 22 and the covering portion 141 of the second power terminal 14. As a result, the second electrodes 212 of the plurality of second semiconductor elements 22 are electrically connected to the second power terminal 14. The second conductive member 32 contains copper. The second conductive member 32 is a metal clip. As shown in FIG. 4 , the second conductive member 32 has two main portions 321, a plurality of third joint portions 322, a plurality of third connecting portions 323, two fourth joint portions 324, two fourth connecting portions 325, a plurality of intermediate portions 326, and a plurality of cross beam portions 327.

[0078] 4 , the two main portions 321 are spaced apart from each other in the third direction y. The two main portions 321 extend in the second direction x. The two main portions 321 are spaced apart from the first mounting surface 121A and the second mounting surface 122A more than the main portion 311 of the first conductive member 31.

[0079] 4 , the intermediate portions 326 are spaced apart from one another in the third direction y and are located between the two main portions 321 in the third direction y. The intermediate portions 326 extend in the second direction x. The dimension of each of the intermediate portions 326 in the second direction x is smaller than the dimension of each of the two main portions 321 in the second direction x.

[0080] 11 , the multiple third bonding portions 322 are individually bonded to the second electrodes 212 of the multiple second semiconductor elements 22. Each of the multiple third bonding portions 322 faces the fourth electrode 222 of one of the multiple second semiconductor elements 22.

[0081] 4 and 13 , the multiple third connecting portions 323 are connected to both sides of the multiple third joint portions 322 in the third direction y. Furthermore, the multiple third connecting portions 323 are connected to either of the two main portions 321 and the multiple intermediate portions 326. When viewed in the second direction x, each of the multiple third connecting portions 323 is inclined in a direction away from the second mounting surface 122A of the second conductive layer 122 as it moves from either of the multiple third joint portions 322 to either of the two main portions 321 or the multiple intermediate portions 326.

[0082] 4 and 8 , the two fourth joint portions 324 are joined to the covering portion 141 of the second power terminal 14. The two fourth joint portions 324 face the covering portion 141.

[0083] 4 and 8 , the two fourth connecting portions 325 are connected to the two main portions 321 and the two fourth joint portions 324. When viewed in the third direction y, the two fourth connecting portions 325 are inclined in a direction away from the first mounting surface 121A of the first conductive layer 121 as they move from the two fourth joint portions 324 toward the two main portions 321.

[0084] As shown in FIGS. 4 and 12 , the multiple cross beam portions 327 are arranged along the third direction y. As viewed in the first direction z, the multiple cross beam portions 327 include regions that individually overlap the multiple first joint portions 312 of the first conductive member 31. Of the multiple cross beam portions 327, the cross beam portion 327 located at the center in the third direction y is connected to the multiple intermediate portions 326 on both sides in the third direction y. Of the multiple cross beam portions 327, the remaining two cross beam portions 327 are connected to one of the two main portions 321 and one of the multiple intermediate portions 326 on both sides in the third direction y. As viewed in the second direction x, the multiple cross beam portions 327 are convex in the first direction z toward the first mounting surface 121A of the first conductive layer 121.

[0085] 9 , 11 , and 13 , a conductive bonding layer 29 is located between each fourth electrode 222 of the multiple second semiconductor elements 22 and each of the multiple third bonding portions 322. The conductive bonding layer 29 conductively bonds each of the multiple third bonding portions 322 to each of the multiple second semiconductor elements 22. As shown in FIG. 8 , a conductive bonding layer 29 is located between each covering portion 141 of each of the two second power terminals 14 and the two fourth bonding portions 324. The conductive bonding layer 29 conductively bonds each of the covering portions 141 of the two second power terminals 14 to each of the two fourth bonding portions 324.

[0086] Next, a semiconductor module B10 including the semiconductor device A10 will be described with reference to Fig. 15. In addition to the semiconductor device A10, the semiconductor module B10 includes a cooler 81 and a plurality of fastening members 82. The cross-sectional position in Fig. 15 corresponds to the cross-sectional position in Fig. 12.

[0087] 15, the cooler 81 supports the semiconductor device A10. In this case, the cooler 81 faces the back surface 712 of the base 71 of the semiconductor device A10. The cooler 81 is made of, for example, the same material as the heat dissipation member 70. A hollow portion 811 is provided inside the cooler 81. A refrigerant flows down through the hollow portion 811. The heat dissipation portion 72 of the semiconductor device A10 is accommodated in the hollow portion 811. The back surface 712 of the base 71 is in contact with the hollow portion 811.

[0088] The plurality of fastening members 82 fix the semiconductor device A10 to the cooler 81. The plurality of fastening members 82 are, for example, bolts. Each of the plurality of fastening members 82 is inserted through one of the plurality of second through-holes 50B provided in the sealing resin 50 of the semiconductor device A10 and one of the plurality of first through-holes 714 provided in the base 71 of the semiconductor device A10 and communicating with the second through-holes 50B. The tip of each of the plurality of fastening members 82 reaches the hollow portion 811 of the cooler 81. Each of the plurality of fastening members 82 is spaced apart in the first direction z from the top surface 51 of the sealing resin 50 toward the side where the base 71 is located.

[0089] Next, a vehicle C equipped with the semiconductor device A10 will be described with reference to Fig. 16. The vehicle C is, for example, an electric vehicle (EV).

[0090] As shown in Fig. 16, vehicle C includes an on-board charger 91, a storage battery 92, and a drive system 93. Power is supplied to the on-board charger 91 wirelessly from a power supply facility (not shown) installed outdoors. Alternatively, power may be supplied from the power supply facility to the on-board charger 91 via a wired connection. The on-board charger 91 is configured with a step-up DC-DC converter. The voltage of the power supplied to the on-board charger 91 is stepped up by the converter and then supplied to the storage battery 92. The stepped-up voltage is, for example, 600 V.

[0091] The drive system 93 drives the vehicle C. The drive system 93 includes an inverter 931 and a drive source 932. The semiconductor device A10 constitutes part of the inverter 931. Power stored in the storage battery 92 is supplied to the inverter 931. The power supplied from the storage battery 92 to the inverter 931 is DC power. Alternatively, unlike the power system shown in FIG. 16 , a step-up DC-DC converter may be further provided between the storage battery 92 and the inverter 931. The inverter 931 converts DC power into AC power. The inverter 931 including the semiconductor device A10 is connected to the drive source 932. The drive source 932 includes an AC motor and a transmission. When the AC power converted by the inverter 931 is supplied to the drive source 932, the AC motor rotates and the rotation is transmitted to the transmission. The transmission appropriately reduces the rotation speed transmitted from the AC motor and then rotates the drive shaft of the vehicle C. This drives the vehicle C. To drive the vehicle C, it is necessary to freely control the rotation speed of the AC motor based on information such as the amount of fluctuation in the accelerator pedal. Therefore, the semiconductor device A10 in the inverter 931 is necessary to output AC power whose frequency has been appropriately changed to correspond to the required rotation speed of the AC motor.

[0092] Next, the effects of the semiconductor device A10 will be described.

[0093] The semiconductor device A10 includes a heat dissipation member 70, a substrate 11, a first conductive layer 121, a first semiconductor element 21, and a sealing resin 50. As viewed in the first direction z, the heat dissipation member 70 is surrounded by a first periphery 50A that defines the sealing resin 50. The heat dissipation member 70 includes a base 71 and a heat dissipation portion 72. The base 71 includes a first through portion 714 that penetrates the base 71 in the first direction z. The sealing resin 50 includes a second through portion 50B that penetrates the sealing resin 50 in the first direction z. As viewed in the first direction z, the second through portion 50B overlaps the first through portion 714. With this configuration, the heat dissipation member 70 does not protrude beyond the first periphery 50A as viewed in the first direction z. This allows the semiconductor device A10 to be miniaturized even when the heat dissipation member 70 is included. 15 , when attaching the semiconductor device A10 to the cooler 81, the fastening members 82 are inserted through the first through-holes 714 and the second through-holes 50B, respectively, so that the semiconductor device A10 can be easily attached to the cooler 81. Here, because the semiconductor device A10 is attached to the cooler 81 using the fastening members 82, misalignment of the semiconductor device A10 with respect to the cooler 81 is suppressed. Therefore, with this configuration, in the semiconductor device A10, it is possible to more easily attach the semiconductor device A10 while suppressing misalignment of the heat dissipation member 70 with respect to the cooler 81.

[0094] When viewed in the first direction z, the heat dissipation portion 72 is located inward of the second peripheral edge 71A that defines the base portion 71. This configuration makes it possible to prevent the heat dissipation portion 72 from interfering with the cooler 81 when the semiconductor device A10 is attached to the cooler 81 (see FIG. 15 ).

[0095] The base 71 has a back surface 712 facing the side opposite to the side facing the substrate 11 in the first direction z. The back surface 712 is exposed from the sealing resin 50. This configuration can improve the heat dissipation efficiency of the semiconductor device A10.

[0096] When viewed in the first direction z, the second periphery 71A that defines the base 71 is spaced apart from the first periphery 50A that defines the sealing resin 50. This configuration increases the creepage distance (the distance along the surface of the sealing resin 50) from each of the first power terminal 13, the two second power terminals 14, and the two third power terminals 15 to the base 71. This makes it possible to suppress a decrease in the dielectric strength voltage of the semiconductor device A10 due to the heat dissipation member 70.

[0097] The base 71 has an end surface 713 facing in a direction perpendicular to the first direction z. The sealing resin 50 covers at least a portion of the end surface 713. This configuration can further suppress a decrease in the dielectric strength voltage of the semiconductor device A10 caused by the heat dissipation member 70.

[0098] As viewed in the first direction z, at least a portion of the heat dissipation portion 72 is located inward from the third periphery 11A that defines the base 11. By adopting this configuration, the dimensions of the heat dissipation portion 72 can be reduced while improving the heat dissipation efficiency of the semiconductor device A10.

[0099] The substrate 11 includes a metal layer 113 bonded to the main surface 711 of the base 71, and an insulating layer 111 laminated on the metal layer 113. The insulating layer 111 includes a third periphery 11A that defines the substrate 11. When viewed in the first direction z, the metal layer 113 is located inward from the third periphery 11A. This configuration can prevent the substrate 11 from falling off from the sealing resin 50 while ensuring the bonding strength of the substrate 11 to the main surface 711.

[0100] The base 71 is provided with a recess 715 recessed from the main surface 711. The base 71 has an inner circumferential surface 715A that is connected to the main surface 711 and defines the recess 715. The sealing resin 50 is in contact with the inner circumferential surface 715A. With this configuration, the sealing resin 50 exhibits an anchoring effect with respect to the recess 715. This makes it possible to effectively prevent the sealing resin 50 from peeling off from the base 71.

[0101] Second Embodiment: A semiconductor device A20 according to a second embodiment of the present disclosure will be described with reference to Figures 17 and 18. In these figures, elements that are the same as or similar to those in the semiconductor device A10 described above are designated by the same reference numerals, and duplicated descriptions will be omitted. Here, the cross-sectional position in Figure 18 corresponds to the cross-sectional position in Figure 12, which shows the semiconductor device A10.

[0102] In the semiconductor device A20, the configuration of the sealing resin 50 is different from that of the semiconductor device A10.

[0103] 17 and 18 , each of the second through portions 50B provided in the sealing resin 50 is open not only on the top surface 51 of the sealing resin 50 but also on one of the two third side surfaces 55 of the sealing resin 50. The main surface 711 of the base 71 is exposed from each of the second through portions 50B.

[0104] Next, a semiconductor device A21, which is a modification of the semiconductor device A20, will be described with reference to Figures 19 and 20. The cross-sectional position in Figure 20 corresponds to the cross-sectional position in Figure 12 showing the semiconductor device A10.

[0105] As shown in FIGS. 19 and 20 , each of the multiple second through portions 50B provided in the sealing resin 50 includes a first portion 50C and a second portion 50D. The first portion 50C is located between the top surface 51 and one of the multiple first through portions 714 provided in the base 71 in the first direction z. The second portion 50D is located adjacent to one of the multiple first through portions 714 in a direction perpendicular to the first direction z. In the first direction z, the first portion 50C of each of the multiple second through portions 50B overlaps one of the multiple first through portions 714 and the second portion 50D. Each of the multiple first through portions 714 opens at an end surface 713 of the base 71. When viewed in the first direction z, each of the multiple first through portions 714 and each of the multiple second through portions 50B are semicircular.

[0106] Next, the effects of the semiconductor device A20 will be described.

[0107] The semiconductor device A20 includes a heat dissipation member 70, a substrate 11, a first conductive layer 121, a first semiconductor element 21, and a sealing resin 50. As viewed in the first direction z, the heat dissipation member 70 is surrounded by a first periphery 50A that defines the sealing resin 50. The heat dissipation member 70 includes a base 71 and a heat dissipation portion 72. The base 71 is provided with a first through portion 714 that penetrates the base 71 in the first direction z. The sealing resin 50 is provided with a second through portion 50B that penetrates the sealing resin 50 in the first direction z. As viewed in the first direction z, the second through portion 50B overlaps the first through portion 714. Therefore, with this configuration, even in the semiconductor device A20, it is possible to more easily mount the semiconductor device A20 while suppressing misalignment of the heat dissipation member 70 with respect to the cooler 81. Furthermore, the semiconductor device A20 has the same configuration as the semiconductor device A10, and thus exhibits the same effects as the semiconductor device A10.

[0108] In the semiconductor device A20, the second through portion 50B opens on one of the two third side surfaces 55 of the sealing resin 50. With this configuration, when attaching the semiconductor device A10 to the cooler 81 (see FIG. 15 ), the fastening member 82 can be more easily inserted through each of the first through portion 714 and the second through portion 50B. Furthermore, when fastening the cooler 81 and the base 71 together with the fastening member 82, the tool used to fasten the fastening member 82 can be more easily inserted into the second through portion 50B.

[0109] 21 to 23, a semiconductor device A30 according to a third embodiment of the present disclosure will be described. In these figures, elements that are the same as or similar to those in the semiconductor device A10 described above are given the same reference numerals, and duplicated explanations will be omitted. Here, in FIG. 22, for ease of understanding, the sealing resin 50 is shown through.

[0110] In the semiconductor device A30, the configurations of the base material 11, the sealing resin 50, and the heat dissipation member 70 are different from those of the semiconductor device A10.

[0111] As shown in FIGS. 21 to 23 , the substrate 11 has a plurality of openings 11B. Each of the plurality of openings 11B penetrates the substrate 11 in the first direction z. As viewed in the first direction z, each of the plurality of openings 11B is defined by a portion of the third periphery 11A that defines the substrate 11. As viewed in the first direction z, the plurality of first through portions 714 provided in the base 71 individually overlap the plurality of openings 11B. Additionally, as viewed in the first direction z, the plurality of second through portions 50B provided in the sealing resin 50 individually overlap the plurality of openings 11B. Furthermore, as viewed in the second direction x, two of the plurality of second through portions 50B adjacent to each other in the third direction y individually overlap two recessed portions 56.

[0112] 23 , the first conductive layer 121 is provided with a first opening 121B penetrating the first conductive layer 121 in the first direction z. As viewed in the first direction z, the first opening 121B overlaps with one of the plurality of openings 11B provided in the base material 11. The second conductive layer 122 is provided with a second opening 122B penetrating the second conductive layer 122 in the first direction z. As viewed in the first direction z, the second opening 122B overlaps with one of the plurality of openings 11B.

[0113] Next, the effects of the semiconductor device A30 will be described.

[0114] The semiconductor device A30 includes a heat dissipation member 70, a substrate 11, a first conductive layer 121, a first semiconductor element 21, and a sealing resin 50. As viewed in the first direction z, the heat dissipation member 70 is surrounded by a first periphery 50A that defines the sealing resin 50. The heat dissipation member 70 includes a base 71 and a heat dissipation portion 72. The base 71 is provided with a first through portion 714 that penetrates the base 71 in the first direction z. The sealing resin 50 is provided with a second through portion 50B that penetrates the sealing resin 50 in the first direction z. As viewed in the first direction z, the second through portion 50B overlaps the first through portion 714. Therefore, with this configuration, even in the semiconductor device A30, it is possible to more easily mount the semiconductor device A30 while suppressing misalignment of the heat dissipation member 70 with respect to the cooler 81. Furthermore, the semiconductor device A30 has the same configuration as the semiconductor device A10, and thus exhibits the same effects as the semiconductor device A10.

[0115] In the semiconductor device A30, the base 11 has an opening 11B that penetrates the base 11 in the first direction z. As viewed in the first direction z, the opening 11B is defined by a portion of the third periphery 11A that defines the base 11. As viewed in the first direction z, the first through portion 714 and the second through portion 50B each overlap the opening 11B. By adopting this configuration, as viewed in the first direction z, the positions of the first through portion 714 and the second through portion 50B can be moved further inward of the semiconductor device A30. This allows the dimensions of the semiconductor device A30 to be reduced in a direction perpendicular to the first direction z.

[0116] In the above case, when viewed in the third direction y, the second penetrating portion 50B overlaps the recessed portion 56 of the sealing resin 50. By adopting this configuration, it is possible to suppress a decrease in the dielectric strength voltage of the semiconductor device A30 caused by the fastening member 82 shown in FIG.

[0117] Fourth Embodiment: A semiconductor device A40 according to a second embodiment of the present disclosure will be described with reference to Figures 24 and 25. In these figures, elements that are the same as or similar to those in the semiconductor device A10 described above are designated by the same reference numerals, and duplicated descriptions will be omitted. The cross-sectional position in Figure 25 corresponds to the cross-sectional position in Figure 12, which shows the semiconductor device A10.

[0118] In the semiconductor device A40, the configuration of the base portion 71 of the heat dissipation member 70 is different from that of the semiconductor device A10.

[0119] 24 and 25 , the base 71 is provided with a plurality of protruding portions 716 protruding from the main surface 711. The plurality of first penetrating portions 714 provided in the base 71 individually penetrate the plurality of protruding portions 716 in the first direction z. Each of the plurality of protruding portions 716 is in contact with the sealing resin 50.

[0120] Next, the effects of the semiconductor device A40 will be described.

[0121] The semiconductor device A40 includes a heat dissipation member 70, a substrate 11, a first conductive layer 121, a first semiconductor element 21, and a sealing resin 50. As viewed in the first direction z, the heat dissipation member 70 is surrounded by a first periphery 50A that defines the sealing resin 50. The heat dissipation member 70 includes a base 71 and a heat dissipation portion 72. The base 71 is provided with a first through portion 714 that penetrates the base 71 in the first direction z. The sealing resin 50 is provided with a second through portion 50B that penetrates the sealing resin 50 in the first direction z. As viewed in the first direction z, the second through portion 50B overlaps the first through portion 714. Therefore, with this configuration, even in the semiconductor device A40, it is possible to more easily mount the semiconductor device A40 while suppressing misalignment of the heat dissipation member 70 with respect to the cooler 81. Furthermore, the semiconductor device A40 has the same configuration as the semiconductor device A10, and thus exhibits the same effects as the semiconductor device A10.

[0122] In the semiconductor device A40, the base 71 has a protrusion 716 protruding from the main surface 711. The first through portion 714 penetrates the protrusion 716 in the first direction z. The protrusion 716 is in contact with the sealing resin 50. This configuration allows the dimension of the second through portion 50B in the first direction z to be reduced. This makes it possible to suppress damage to the sealing resin 50 caused by the second through portion 50B when forming the sealing resin 50. Furthermore, because the protrusion 716 is in contact with the sealing resin 50, an anchoring effect is exerted on the sealing resin 50 with respect to the protrusion 716. This makes it possible to more effectively suppress peeling of the sealing resin 50 from the base 71.

[0123] The present disclosure is not limited to the above-described embodiment, and the specific configuration of each part of the present disclosure can be freely modified in various ways.

[0124] The present disclosure includes embodiments described in the following supplementary notes. Supplementary note 1. A semiconductor device comprising: a heat dissipation member; a substrate including an insulating layer and mounted on one side of the heat dissipation member in a first direction; a conductive layer located on the opposite side of the substrate from the heat dissipation member and bonded to the substrate; a semiconductor element bonded to the conductive layer; and a sealing resin covering the substrate, the conductive layer, and the semiconductor element, wherein, as viewed in the first direction, the heat dissipation member is surrounded by a first periphery that defines the sealing resin, and the heat dissipation member has: a base on which the substrate is mounted and at least a portion of which is covered by the sealing resin, and a heat dissipation portion located on the opposite side of the base from the substrate and exposed from the sealing resin, wherein the base has a first penetration portion that penetrates the base in the first direction, and the sealing resin has a second penetration portion that penetrates the sealing resin in the first direction, and the second penetration portion overlaps the first penetration portion as viewed in the first direction. Supplementary note 2. The semiconductor device according to Supplementary Note 1, wherein the heat dissipation portion is located inward from a second periphery that defines the base, as viewed in the first direction. Supplementary Note 3. The semiconductor device according to Supplementary Note 2, wherein the base has a back surface that faces the side opposite to the side facing the substrate in the first direction, and the back surface is exposed from the sealing resin. Supplementary Note 4. The semiconductor device according to Supplementary Note 3, wherein the second periphery is spaced from the first periphery, as viewed in the first direction. Supplementary Note 5. The semiconductor device according to Supplementary Note 4, wherein the substrate has an end surface that faces a direction perpendicular to the first direction, and the sealing resin covers at least a portion of the end surface. Supplementary Note 6. The semiconductor device according to Supplementary Note 5, wherein at least a portion of the heat dissipation portion is located inward from a third periphery that defines the substrate, as viewed in the first direction. Supplementary Note 7. The semiconductor device according to Supplementary Note 6, wherein the base has a main surface that faces the side opposite to the back surface in the first direction, and the substrate is bonded to the main surface. Supplementary Note 8. 8. The semiconductor device according to claim 7, wherein the first through portion is spaced apart from the third periphery when viewed in the first direction.Appendix 9. The semiconductor device according to Appendix 8, wherein the sealing resin has a side surface facing a direction perpendicular to the first direction, and the second penetrating portion is open at the side surface. Appendix 10. The semiconductor device according to Appendix 9, wherein the main surface is exposed at the second penetrating portion. Appendix 11. The semiconductor device according to Appendix 8, wherein the base is provided with a convex portion protruding from the main surface, the first penetrating portion penetrates the convex portion in the first direction, and the convex portion is in contact with the sealing resin. Appendix 12. The semiconductor device according to Appendix 7, wherein the substrate is provided with an opening that penetrates the substrate in the first direction, the opening is defined by a part of the third periphery as viewed in the first direction, and each of the first penetrating portion and the second penetrating portion overlaps the opening as viewed in the first direction. Appendix 13. The semiconductor device according to any one of Appendix 7 to 12, further comprising: a power terminal electrically connected to at least one of the conductive layer and the semiconductor element; and a signal terminal electrically connected to the semiconductor element, wherein each of the power terminal and the signal terminal is exposed from the sealing resin. Appendix 14. The semiconductor device according to Appendix 13, wherein the base includes a metal layer bonded to the main surface and the insulating layer laminated on the metal layer, and the conductive layer is located on the opposite side of the metal layer with respect to the insulating layer. Appendix 15. The semiconductor device according to Appendix 14, wherein the insulating layer includes the third periphery, and the metal layer is located more inward than the third periphery when viewed in the first direction. Appendix 16. The semiconductor device according to Appendix 13, wherein the base is provided with a recess recessed from the main surface, the base has an inner circumferential surface that is connected to the main surface and defines the recess, and the sealing resin is in contact with the inner circumferential surface. Appendix 17. 16. A semiconductor module comprising: a cooler; the semiconductor device according to claim 13; and a fastening member for fixing the semiconductor device to the cooler, the fastening member being inserted through each of the first through-portion and the second through-portion. 17. A vehicle comprising: a drive source; and the semiconductor device according to claim 13, the semiconductor device being electrically connected to the drive source.

[0125] A10, A20, A30, A40: semiconductor device B10: semiconductor module C: vehicle 11: base material 11A: third periphery 11B: opening 111: insulating layer 112: intermediate layer 113: metal layer 121: first conductive layer 121A: first mounting surface 121B: first opening 122: second conductive layer 122A: second mounting surface 122B: second opening 129: first bonding layer 13: first power terminal 131: covering portion 132: exposed portion 14: second power terminal 141: covering portion 142: exposed portion 15: third power terminal 151: covering portion 152: exposed portion 161: first signal terminal 162: second signal terminal 171: third signal terminal 172: fourth signal terminal 181: fifth signal terminal 182: Sixth signal terminal 191: Seventh signal terminal 192: Eighth signal terminal 20: Semiconductor element 21: First semiconductor element 211: First electrode 212: Second electrode 213: First gate electrode 214: First detection electrode 22: Second semiconductor element 221: Third electrode 222: Fourth electrode 223: Second gate electrode 224: Second detection electrode 23: Thermistor 29: Conductive bonding layer 31: First conductive member 311: Main body portion 312: First bonding portion 313: First connecting portion 314: Second bonding portion 315: Second connecting portion 32: Second conductive member 321: Main body portion 322: Third bonding portion 323: Third connecting portion 324: Fourth bonding portion 325: Fourth connecting portion 326: Intermediate portion 327: Cross beam portion 41 to 47: First wire to seventh wire 50: Sealing resin 50A: First periphery 50B: Second penetration portion 50C: First portion 50D: Second portion 51: Top surface 52: Bottom surface 53: First side surface 54: Second side surface 55: Third side surface 56: Depression portion 61: First wiring 611: First mounting layer 612: First metal layer 613: First gate wiring layer 614: First detection wiring layer 615: First temperature detection wiring layer 616: Second detection wiring layer 62: Second wiring 621: Second mounting layer 622: Second metal layer 623: Second gate wiring layer 624: Third detection wiring layer 625: Second temperature detection wiring layer 626: Fourth detection wiring layer 63: Sleeve 631: End surface 68: Second bonding layer 69: Third bonding layer 70: Heat dissipation member 71: Base portion 71A: Second peripheral edge711: Main surface 712: Back surface 713: End surface 714: First penetration portion 715: Recessed portion 715A: Inner peripheral surface 716: Protruding portion 72: Heat dissipation portion 73: Bonding material 81: Cooler 811: Hollow portion 82: Fastening member 91: On-board charger 92: Storage battery 93: Drive system 931: Inverter 932: Drive source z: First direction x: Second direction y: Third direction

Claims

1. A semiconductor device comprising: a heat dissipation member; a substrate including an insulating layer and mounted on one side of the heat dissipation member in a first direction; a conductive layer located on the opposite side of the substrate to the heat dissipation member and bonded to the substrate; a semiconductor element bonded to the conductive layer; and a sealing resin covering the substrate, the conductive layer and the semiconductor element, wherein as viewed in the first direction, the heat dissipation member is surrounded by a first periphery that defines the sealing resin, and the heat dissipation member has a base on which the substrate is mounted and at least a portion of which is covered by the sealing resin, and a heat dissipation portion located on the opposite side of the substrate to the substrate and exposed from the sealing resin, the base is provided with a first penetration portion that penetrates the base in the first direction, and the sealing resin is provided with a second penetration portion that penetrates the sealing resin in the first direction, and as viewed in the first direction, the second penetration portion overlaps the first penetration portion.

2. The semiconductor device according to claim 1, wherein, when viewed in the first direction, the heat dissipation portion is located inwardly of a second peripheral edge that defines the base portion.

3. The semiconductor device according to claim 2, wherein the base has a back surface facing the opposite side to the side facing the substrate in the first direction, the back surface being exposed from the sealing resin.

4. The semiconductor device according to claim 3, wherein the second periphery is spaced apart from the first periphery when viewed in the first direction.

5. The semiconductor device according to claim 4, wherein the base material has an end surface facing in a direction perpendicular to the first direction, and the sealing resin covers at least a portion of the end surface.

6. The semiconductor device according to claim 5, wherein at least a portion of said heat dissipation portion is located inwardly of a third peripheral edge that defines said base material when viewed in said first direction.

7. The semiconductor device according to claim 6, wherein the base has a main surface facing the opposite side to the back surface in the first direction, and the substrate is bonded to the main surface.

8. The semiconductor device according to claim 7, wherein the first penetrating portion is spaced apart from the third peripheral edge when viewed in the first direction.

9. The semiconductor device according to claim 8, wherein the sealing resin has a side surface facing a direction perpendicular to the first direction, and the second penetrating portion is open at the side surface.

10. The semiconductor device according to claim 9, wherein the main surface is exposed at the second penetrating portion.

11. The semiconductor device according to claim 8, wherein the base has a convex portion protruding from the main surface, the first penetrating portion penetrates the convex portion in the first direction, and the convex portion is in contact with the sealing resin.

12. The semiconductor device described in claim 7, wherein the substrate has an opening penetrating the substrate in the first direction, the opening being defined by a portion of the third peripheral edge as viewed in the first direction, and each of the first penetrating portion and the second penetrating portion overlaps the opening as viewed in the first direction.

13. The semiconductor device according to any one of claims 7 to 12, further comprising: a power terminal electrically connected to at least one of said conductive layer and said semiconductor element; and a signal terminal electrically connected to said semiconductor element, each of said power terminal and said signal terminal being exposed from said sealing resin.

14. The semiconductor device according to claim 13, wherein the base material includes a metal layer bonded to the main surface and an insulating layer laminated on the metal layer, and the conductive layer is located on the opposite side of the insulating layer to the metal layer.

15. The semiconductor device according to claim 14, wherein the insulating layer includes the third periphery, and when viewed in the first direction, the metal layer is located inward from the third periphery.

16. The semiconductor device according to claim 13, wherein the base is provided with a recess recessed from the main surface, the base has an inner circumferential surface connected to the main surface and defining the recess, and the sealing resin is in contact with the inner circumferential surface.

17. A semiconductor module comprising: a cooler; a semiconductor device according to claim 13; and a fastening member for fixing the semiconductor device to the cooler, the fastening member being inserted through each of the first through-portion and the second through-portion.

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