Phototransistor and manufacturing method therefor, and photodetector

Abstract

The present application relates to a phototransistor and a manufacturing method therefor, and a photodetector. When irradiated with light of two different wavelengths, the phototransistor can identify light of different wavelengths on the basis of the magnitude relationship between photocurrent and dark current.

Description

Phototransistor and preparation method thereof, and photodetector device

[0001] This application claims priority to the Chinese patent application filed with the China Patent Office on June 28, 2023, with application number 2023107811783 and invention name “Phototransistor and its preparation method, photoelectric detection device”, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The present application relates to the field of transistor technology, and in particular to a phototransistor and a preparation method thereof, and a photodetection device. Background Art

[0003] Photodetectors have a wide range of applications. In the visible or near-infrared bands, they are primarily used for radiation measurement, radiation detection, industrial automation, and photometry. With the development of the Internet of Things, the demand for photodetectors is increasing. However, traditional single-pixel photodetectors can only detect monochromatic light. To achieve dual-color light recognition and detection, two single-pixel photodetectors with different response bands must be combined, or two identical single-pixel photodetectors equipped with two different filters must be used. This approach is difficult and costly to manufacture, and the device integration level is low.

[0004] Summary of the Invention

[0005] Based on this, it is necessary to provide a phototransistor and a method for manufacturing the same, as well as a photodetector device. The phototransistor can realize the recognition of light of different wavelength bands through a single device.

[0006] In a first aspect, the present application provides a phototransistor, comprising a first substrate, a first source electrode, a first drain electrode, a first channel layer, a first insulating dielectric layer, a first semiconductor layer, and a first gate electrode; the first source electrode and the first drain electrode are spaced apart and arranged on a surface of the first substrate; the first channel layer is disposed on the surface of the first substrate and is located between the first source electrode and the first drain electrode, and the first channel layer is connected to the first source electrode and the first drain electrode; the first insulating dielectric layer, the first semiconductor layer, and the first gate electrode are sequentially stacked on a surface of the first channel layer away from the first substrate; the band gap width of the first semiconductor layer is greater than the band gap width of the first channel layer;

[0007] Alternatively, it includes a second substrate, a second source electrode, a second drain electrode, a second channel layer, a second insulating dielectric layer, a second semiconductor layer and a second gate electrode; the second gate electrode, the second semiconductor layer, the second insulating dielectric layer and the second channel layer are stacked in sequence on the surface of the second substrate; the second source electrode is arranged on the surface of the second insulating dielectric layer away from the second substrate or on the surface of the second channel layer away from the second substrate, and the second source electrode is in contact with the second channel layer; the second drain electrode is arranged on the surface of the second insulating dielectric layer away from the second substrate or on the surface of the second channel layer away from the second substrate, and the second drain electrode is in contact with the second channel layer; the second source electrode and the second drain electrode are arranged at intervals; the band gap width of the second semiconductor layer is greater than the band gap width of the second channel layer.

[0008] In some embodiments, a difference between a band gap width of the first semiconductor layer and a band gap width of the first channel layer is greater than or equal to 0.2 eV.

[0009] In some embodiments, the bandgap width of the first channel layer is 0.2 eV to 5 eV.

[0010] In some embodiments, the band gap width of the first semiconductor layer is 1.5 eV to 5.5 eV.

[0011] In some embodiments, the resistance of the first semiconductor layer in a dark state is greater than or equal to 1% of the resistance of the first insulating dielectric layer.

[0012] In some embodiments, the thickness of the first semiconductor layer is 20 nm to 1000 nm.

[0013] In some embodiments, the first channel layer partially or entirely covers a surface of the first source electrode away from the first substrate.

[0014] In some embodiments, the first channel layer partially or entirely covers a surface of the first drain electrode away from the first substrate.

[0015] In some embodiments, the first insulating dielectric layer partially or entirely covers a surface of the first source electrode away from the first substrate.

[0016] In some embodiments, the first insulating dielectric layer partially or entirely covers a surface of the first drain electrode away from the first substrate.

[0017] In some embodiments, the first insulating dielectric layer partially or entirely covers a surface of the first substrate where the first source electrode, the first drain electrode, and the first channel layer are not provided.

[0018] In some embodiments, the material of the first channel layer is selected from at least one of silicon, molybdenum disulfide, tungsten disulfide, rhenium disulfide, tungsten diselenide, indium gallium zinc oxide, gallium oxide, gallium arsenide, indium selenide, and organic semiconductors.

[0019] In some embodiments, the material of the first semiconductor layer is selected from at least one of silicon, molybdenum disulfide, tungsten disulfide, rhenium disulfide, tungsten diselenide, indium gallium zinc oxide, gallium oxide, gallium arsenide, indium selenide, and organic semiconductors.

[0020] In some embodiments, the material of the first insulating dielectric layer is selected from at least one of silicon dioxide, silicon nitride, aluminum oxide, hafnium dioxide, titanium dioxide, polyethylene naphthalate, polyethylene terephthalate, polyimide, polymethyl methacrylate, polydimethylsiloxane, polyvinyl chloride, polycarbonate, polystyrene and polymethyl methacrylate.

[0021] In some embodiments, the first source electrode, the first drain electrode, and the first gate electrode are each independently selected from at least one metal electrode.

[0022] In some embodiments, the material of the first substrate is selected from at least one of silicon, silicon oxide, sapphire, glass, ceramic, polyethylene naphthalate, polyethylene terephthalate, polyimide, polymethyl methacrylate, polydimethylsiloxane, polyvinyl chloride, polycarbonate, polystyrene and polymethyl methacrylate.

[0023] In some embodiments, a difference between a band gap width of the second semiconductor layer and a band gap width of the second channel layer is greater than or equal to 0.2 eV.

[0024] In some embodiments, the bandgap width of the second channel layer is 0.2 eV to 5 eV.

[0025] In some embodiments, the band gap width of the second semiconductor layer is 1.5 eV to 5.5 eV.

[0026] In some embodiments, the resistance of the second semiconductor layer in a dark state is greater than or equal to 1% of the resistance of the second insulating dielectric layer.

[0027] In some embodiments, the second semiconductor layer has a thickness of 20 nm to 1000 nm.

[0028] In some embodiments, the material of the second channel layer and the material of the second semiconductor layer are each independently selected from at least one of silicon, molybdenum disulfide, tungsten disulfide, rhenium disulfide, tungsten diselenide, indium gallium zinc oxide, gallium oxide, gallium arsenide, indium selenide and an organic semiconductor.

[0029] In some embodiments, the material of the second insulating dielectric layer is selected from at least one of silicon dioxide, silicon nitride, aluminum oxide, hafnium dioxide, titanium dioxide, polyethylene naphthalate, polyethylene terephthalate, polyimide, polymethyl methacrylate, polydimethylsiloxane, polyvinyl chloride, polycarbonate, polystyrene and polymethyl methacrylate.

[0030] In some embodiments, the second source electrode, the second drain electrode, and the second gate electrode are each independently selected from at least one metal electrode.

[0031] In some embodiments, the material of the second substrate is selected from at least one of silicon, silicon oxide, sapphire, glass, ceramic, polyethylene naphthalate, polyethylene terephthalate, polyimide, polymethyl methacrylate, polydimethylsiloxane, polyvinyl chloride, polycarbonate, polystyrene and polymethyl methacrylate.

[0032] In a second aspect, the present application further provides a method for manufacturing a phototransistor, comprising: providing a first substrate; forming a first source electrode, a first drain electrode, and a first channel layer on one surface of the first substrate, respectively, wherein the first source electrode and the first drain electrode are spaced apart, and the first channel layer is located between the first source electrode and the first drain electrode and is connected to the first source electrode and the first drain electrode; and forming a first insulating dielectric layer, a first semiconductor layer, and a first gate electrode stacked in sequence on a surface of the first channel layer away from the first substrate, wherein the band gap width of the first semiconductor layer is greater than the band gap width of the first channel layer;

[0033] Or it includes: providing a second substrate; preparing a second gate electrode, a second semiconductor layer, a second insulating dielectric layer and a second channel layer stacked in sequence on one surface of the second substrate; preparing a second source electrode and a second drain electrode on a surface of the second insulating dielectric layer away from the second substrate or a surface of the second channel layer away from the second substrate, respectively, the second source electrode is in contact with the second channel layer, the second drain electrode is in contact with the second channel layer, and the second source electrode and the second drain electrode are spaced apart; the band gap width of the second semiconductor layer is greater than the band gap width of the second channel layer.

[0034] In a third aspect, the present application further provides a photoelectric detection device, comprising any of the above-mentioned phototransistors or a phototransistor prepared by the above-mentioned method for preparing a phototransistor.

[0035] The phototransistor includes a semiconductor layer positioned between an insulating dielectric layer and a gate electrode, wherein the bandgap width of the semiconductor layer is greater than the bandgap width of the channel layer. The phototransistor can discern light of different wavelengths by distributing gate voltage. Under irradiation with light of relatively short wavelengths, the semiconductor layer plays a primary role, leading to a redistribution of the gate voltage. Under irradiation with light of relatively long wavelengths, the channel layer plays a primary role, leading to an increase in the channel carrier concentration. That is, under irradiation with light of different wavelengths, the photocurrent and dark current can be used to discern light of different wavelengths. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments of the present application. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other relevant drawings can be obtained based on these drawings without creative work.

[0037] FIG1 is a schematic structural diagram of a phototransistor provided in one embodiment of the present application;

[0038] FIG2 is a schematic structural diagram of a phototransistor provided in another embodiment of the present application;

[0039] 3 is a schematic diagram of an equivalent circuit of a first semiconductor layer and a first insulating dielectric layer of a phototransistor provided in one embodiment of the present application;

[0040] FIG4 is a response curve of the phototransistor provided in Example 1 of the present application to 254 nm light;

[0041] FIG5 is a response curve of the phototransistor provided in Example 1 of the present application to 365 nm light.

[0042] Explanation of the reference numerals: 11, first substrate; 21, first source electrode; 22, first drain electrode; 31, first channel layer; 41, first insulating dielectric layer; 51, first semiconductor layer; 61, first gate electrode; 110, second substrate; 210, second source electrode; 220, second drain electrode; 310, second channel layer; 410, second insulating dielectric layer; 510, second semiconductor layer; 610, second gate electrode. DETAILED DESCRIPTION

[0043] To make the above-mentioned objects, features, and advantages of the present application more clearly understood, the specific embodiments of the present application are described in detail below with reference to the accompanying drawings. The following description sets forth many specific details to facilitate a full understanding of the present application. However, the present application can be implemented in many other ways than those described herein, and those skilled in the art can make similar improvements without violating the scope of the present application. Therefore, the present application is not limited to the specific embodiments disclosed below.

[0044] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the art to which this application pertains. The terms used herein in the specification of this application are for the purpose of describing specific embodiments only and are not intended to limit this application. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0045] 1 , an embodiment of the present application provides a phototransistor, comprising a first substrate 11, a first source electrode 21, a first drain electrode 22, a first channel layer 31, a first insulating dielectric layer 41, a first semiconductor layer 51, and a first gate electrode 61; the first source electrode 21 and the first drain electrode 22 are spaced apart on a surface of the first substrate 11; the first channel layer 31 is disposed on the surface of the first substrate 11 and is located between the first source electrode 21 and the first drain electrode 22, and the first channel layer 31 is connected to the first source electrode 21 and the first drain electrode 22; a first insulating dielectric layer 41, a first semiconductor layer 51, and a first gate electrode 61 are sequentially stacked on a surface of the first channel layer 31 away from the first substrate 11; the band gap width of the first semiconductor layer 51 is greater than the band gap width of the first channel layer 31.

[0046] 2 , another embodiment of the present application provides a phototransistor, comprising a second substrate 110, a second source electrode 210, a second drain electrode 220, a second channel layer 310, a second insulating dielectric layer 410, a second semiconductor layer 510, and a second gate electrode 610; the second gate electrode 610, the second semiconductor layer 510, the second insulating dielectric layer 410, and the second channel layer 310 are sequentially stacked on the surface of the second substrate 110; the second source electrode 210 is disposed on the second insulating dielectric layer 410 away from the second substrate 110. The second source electrode 210 is on the surface of the second insulating dielectric layer 410 or on the surface of the second channel layer 310 away from the second substrate 110, and the second source electrode 210 is in contact with the second channel layer 310; the second drain electrode 220 is arranged on the surface of the second insulating dielectric layer 410 away from the second substrate 110 or on the surface of the second channel layer 310 away from the second substrate 110, and the second drain electrode 220 is in contact with the second channel layer 310; the second source electrode 210 and the second drain electrode 220 are arranged alternately; the band gap width of the second semiconductor layer 510 is greater than the band gap width of the second channel layer 310.

[0047] The above-mentioned phototransistor includes a semiconductor layer located between an insulating dielectric layer and a gate electrode, and the band gap width of the semiconductor layer is greater than the band gap width of the channel layer. The phototransistor can recognize light of different wavelengths by distributing the gate voltage. Under the irradiation of light with a relatively short wavelength, the semiconductor layer plays a major role, resulting in the redistribution of the gate voltage. Under the irradiation of light with a relatively long wavelength, the channel layer plays a major role, resulting in an increase in the channel carrier concentration. That is, under the irradiation of light with two different wavelengths, according to the relationship between the photocurrent and the dark current, the recognition of light of different wavelengths can be achieved. Furthermore, by setting different materials for the channel layer and the semiconductor layer, the recognition of light of different wavelength combinations can be achieved.

[0048] Taking the embodiment in FIG. 1 as an example, the detection principle of the phototransistor in this solution is explained in detail below.

[0049] In the dark state, the equivalent circuit and gate voltage distribution of the first semiconductor layer 51 and the first insulating dielectric layer 41 are shown in FIG3 , where C 51 and R 51 are the equivalent capacitance and resistance of the first semiconductor layer 51, C 41 and R 41 are the equivalent capacitance and resistance of the first insulating dielectric layer 41 respectively. The gate voltage is fixed to V GS , the gate voltage borne by the first semiconductor layer 51 is V 51 , then the gate voltage borne by the first insulating dielectric layer 41 is V 41 =V GS -V 51 , so the amount of electron charge depleted in the first channel layer 31 is Q=C 41 ×(V GS -V 51 ). Under the irradiation of light with a shorter wavelength (i.e., matching the band gap of the first semiconductor layer 51), the resistance of the first semiconductor layer 51 decreases significantly. The resistance of the first semiconductor layer 51 after the decrease is negligible compared with the resistance of the first insulating dielectric layer 41. At this time, the gate voltage is almost entirely distributed on the first insulating dielectric layer 41, i.e., V 41 =V GS , so the electron charge of the channel depletion is Q = C 41 ×V GS , in which case the photocurrent will be lower than the dark current. Under irradiation with light of a longer wavelength (i.e., matching the bandgap of the first channel layer 31), the resistance of the first semiconductor layer 51 remains unchanged, and therefore the gate voltage distribution remains unchanged. The first channel layer 31 will generate carriers, resulting in a higher photocurrent than the dark current. By comparing the photocurrent and dark current, it is possible to distinguish between light of different wavelengths, thus achieving dual-color recognition.

[0050] In some embodiments, the difference between the bandgap width of the first semiconductor layer 51 and the bandgap width of the first channel layer 31 is greater than or equal to 0.2 eV. When the difference between the bandgap width of the first semiconductor layer 51 and the bandgap width of the first channel layer 31 is greater than or equal to 0.2 eV, wavelength discrimination is easier, achieving better recognition of light of different wavelengths. Optionally, the difference between the bandgap width of the first semiconductor layer 51 and the bandgap width of the first channel layer 31 is 0.2 eV to 5.3 eV. Further optionally, the difference between the band gap width of the first semiconductor layer 51 and the band gap width of the first channel layer 31 is 0.2eV, 0.3eV, 0.4eV, 0.5eV, 0.6eV, 0.7eV, 0.8eV, 0.9eV, 1.0eV, 1.1eV, 1.2eV, 1.3eV, 1.4eV, 1.5eV, 1.6eV, 1.7eV, 1.8eV, 1.9eV, 2.0eV, 2.1eV, 2.2eV, 2.3eV, 2.4eV , 2.5eV, 2.6eV, 2.7eV, 2.8eV, 2.9eV, 3.0eV, 3.1eV, 3.2eV, 3.3eV, 3.4eV, 3.5eV, 3.6eV, 3.7eV, 3.8eV, 3. 9eV, 4.0eV, 4.1eV, 4.2eV, 4.3eV, 4.4eV, 4.5eV, 4.6eV, 4.7eV, 4.8eV, 4.9eV, 5.0eV, 5.1eV, 5.2eV or 5.3eV.

[0051] In some embodiments, the difference between the bandgap width of the second semiconductor layer 510 and the bandgap width of the second channel layer 310 is greater than or equal to 0.2 eV. When the difference between the bandgap width of the second semiconductor layer 510 and the bandgap width of the second channel layer 310 is greater than or equal to 0.2 eV, wavelength discrimination is easier, achieving better recognition of light of different wavelengths. Optionally, the difference between the bandgap width of the second semiconductor layer 510 and the bandgap width of the second channel layer 310 is 0.2 eV to 5.3 eV. Further optionally, the difference between the band gap width of the second semiconductor layer 510 and the band gap width of the second channel layer 310 is 0.2eV, 0.3eV, 0.4eV, 0.5eV, 0.6eV, 0.7eV, 0.8eV, 0.9eV, 1.0eV, 1.1eV, 1.2eV, 1.3eV, 1.4eV, 1.5eV, 1.6eV, 1.7eV, 1.8eV, 1.9eV, 2.0eV, 2.1eV, 2.2eV, 2.3eV, 2.4eV V, 2.5eV, 2.6eV, 2.7eV, 2.8eV, 2.9eV, 3.0eV, 3.1eV, 3.2eV, 3.3eV, 3.4eV, 3.5eV, 3.6eV, 3.7eV, 3.8eV, 3. 9eV, 4.0eV, 4.1eV, 4.2eV, 4.3eV, 4.4eV, 4.5eV, 4.6eV, 4.7eV, 4.8eV, 4.9eV, 5.0eV, 5.1eV, 5.2eV or 5.3eV.

[0052] In some embodiments, the bandgap width of the first channel layer 31 and / or the second channel layer 310 is 0.2eV to 5eV. Optionally, the bandgap width of the first channel layer 31 and / or the second channel layer 310 is 0.2eV, 0.3eV, 0.4eV, 0.5eV, 0.6eV, 0.7eV, 0.8eV, 0.9eV, 1.0eV, 1.1eV, 1.2eV, 1.3eV, 1.4eV, 1.5eV, 1.6eV, 1.7eV, 1.8eV, 1.9eV, 2.0eV, 2.1eV, 2.2eV, 2.3eV, 2.4eV, 2.5eV, 2.6eV, 2.7eV, 2.8eV, 2.9eV, 3.0eV, 3.1eV, 3.2eV, 3.3eV, 3.4eV, 3.5eV, 3.6eV, 3. 7eV, 3.8eV, 3.9eV, 4.0eV, 4.1eV, 4.2eV, 4.3eV, 4.4eV, 4.5eV, 4.6eV, 4.7eV, 4.8eV, 4.9eV or 5eV.

[0053] In some embodiments, the band gap width of the first semiconductor layer 51 and / or the second semiconductor layer 510 is 1.5 eV to 5.5 eV. Optionally, the band gap width of the first semiconductor layer 51 and / or the second semiconductor layer 510 is 1.5 eV, 1.6 eV, 1.7 eV, 1.8 eV, 1.9 eV, 2.0 eV, 2.1 eV, 2.2 eV, 2.3 eV, 2.4 eV, 2.5 eV, 2.6 eV, 2.7 eV, 2.8 eV, 2.9 eV, 3.0 eV, 3.1 eV, 3.2 eV, 3.3eV, 3.4eV, 3.5eV, 3.6eV, 3.7eV, 3.8eV, 3.9eV, 4.0eV, 4.1eV, 4.2eV, 4.3eV, 4.4 eV, 4.5eV, 4.6eV, 4.7eV, 4.8eV, 4.9eV, 5.0eV, 5.1eV, 5.2eV, 5.3eV, 5.4eV or 5.5eV.

[0054] In some embodiments, the dark-state resistance of the first semiconductor layer 51 is greater than or equal to 1% of the resistance of the first insulating dielectric layer 41. When the dark-state resistance of the first semiconductor layer 51 is greater than or equal to 1% of the resistance of the first insulating dielectric layer 41, the change in resistance of the first semiconductor layer 51 under shorter wavelength light irradiation is more significant than the resistance of the first insulating dielectric layer 41, making the redistribution of the gate voltage more obvious, facilitating the differentiation of the magnitude of the photocurrent and the dark current, and achieving higher feasibility of dual-color detection. When the dark-state resistance of the first semiconductor layer 51 is too small compared to that of the first insulating dielectric layer 41, the resistance change of the first semiconductor layer 51 under shorter wavelength photovoltaic irradiation is not significant compared to that of the first insulating dielectric layer 41. Optionally, the resistance of the first semiconductor layer 51 in the dark state is 1%, 2%, 3%, 4%, 5%, 6%, 7%, 8%, 9%, 10%, 12%, 15%, 18%, 20%, 25%, 30%, 35%, 40%, 45%, 50%, 55%, 60%, 70%, 80%, 90% or 100% of the resistance of the first insulating dielectric layer 41.

[0055] In some embodiments, the dark-state resistance of the second semiconductor layer 510 is greater than or equal to 1% of the resistance of the second insulating dielectric layer 410. When the dark-state resistance of the second semiconductor layer 510 is greater than or equal to 1% of the resistance of the second insulating dielectric layer 410, the change in resistance of the second semiconductor layer 510 under shorter wavelength light irradiation is more significant than the resistance of the second insulating dielectric layer 410, making the redistribution of the gate voltage more obvious, facilitating the differentiation of the magnitude of the photocurrent and the dark current, and achieving higher feasibility of dual-color detection. When the dark-state resistance of the second semiconductor layer 510 is too small compared to the second insulating dielectric layer 410, the resistance change of the second semiconductor layer 510 under shorter wavelength photovoltaic irradiation is not significant compared to the second insulating dielectric layer 410. Optionally, the resistance of the second semiconductor layer 510 in the dark state is 1%, 2%, 3%, 4%, 5%, 6%, 7%, 8%, 9%, 10%, 12%, 15%, 18%, 20%, 25%, 30%, 35%, 40%, 45%, 50%, 55%, 60%, 70%, 80%, 90% or 100% of the resistance of the second insulating dielectric layer 410.

[0056] In some embodiments, the thickness of the first semiconductor layer 51 and / or the second semiconductor layer 510 is 20 nm to 1000 nm. The thickness of the first semiconductor layer 51 and / or the second semiconductor layer 510 can be used to control the resistance of the first semiconductor layer 51 and / or the second semiconductor layer 510 of different materials in the dark state. When the thickness of the first semiconductor layer 51 and / or the second semiconductor layer 510 is too large, the resistance of the first semiconductor layer 51 and / or the second semiconductor layer 510 in the dark state will be too small, resulting in too small a change in the resistance of the first semiconductor layer 51 and / or the second semiconductor layer 510 in the dark state and under irradiation with light of a shorter wavelength; if the thickness of the first semiconductor layer 51 and / or the second semiconductor layer 510 is too small, the performance and reliability of the device may be reduced. Optionally, the thickness of the first semiconductor layer 51 and / or the second semiconductor layer 510 is 20nm, 21nm, 22nm, 23nm, 24nm, 25nm, 26nm, 27nm, 28nm, 29nm, 30nm, 32nm, 35nm, 40nm, 45nm, 50nm, 60nm, 70nm, 80nm, 100nm, 120nm, 150nm, 200nm, 250nm, 300nm, 350nm, 400nm, 450nm, 500nm, 550nm, 600nm, 650nm, 700nm, 750nm, 800nm, 850nm, 900nm, 950nm or 1000nm.

[0057] In some embodiments, the first channel layer partially or entirely covers a surface of the first source electrode away from the first substrate.

[0058] In some embodiments, the first channel layer partially or entirely covers a surface of the first drain electrode away from the first substrate.

[0059] In some embodiments, the first insulating dielectric layer partially or entirely covers a surface of the first source electrode away from the first substrate.

[0060] In some embodiments, the first insulating dielectric layer partially or entirely covers a surface of the first drain electrode away from the first substrate.

[0061] In some embodiments, the first insulating dielectric layer partially or entirely covers a surface of the first substrate where the first source electrode, the first drain electrode, and the first channel layer are not provided.

[0062] In some embodiments, the material of the first channel layer 31 and / or the second channel layer 310 is selected from at least one of silicon, molybdenum disulfide, tungsten disulfide, rhenium disulfide, tungsten diselenide, indium gallium zinc oxide (IGZO), gallium oxide, gallium arsenide, indium selenide and organic semiconductors.

[0063] In some embodiments, the material of the first semiconductor layer 51 and / or the second semiconductor layer 510 is selected from at least one of silicon, molybdenum disulfide, tungsten disulfide, rhenium disulfide, tungsten diselenide, indium gallium zinc oxide, gallium oxide, gallium arsenide, indium selenide and organic semiconductors.

[0064] In some embodiments, the material of the first insulating dielectric layer 41 and / or the second insulating dielectric layer 410 is selected from at least one of silicon dioxide, silicon nitride, aluminum oxide, hafnium dioxide, titanium dioxide, polyethylene naphthalate, polyethylene terephthalate, polyimide, polymethyl methacrylate, polydimethylsiloxane, polyvinyl chloride, polycarbonate, polystyrene and polymethyl methacrylate.

[0065] In some embodiments, the first source electrode 21 and / or the second source electrode 210 is selected from at least one metal electrode. Optionally, the first source electrode 21 and / or the second source electrode 210 is a copper electrode, an aluminum electrode, a gold electrode, a silver electrode, a platinum electrode, a titanium electrode or a molybdenum electrode.

[0066] In some embodiments, the first drain electrode 22 and / or the second drain electrode 220 is selected from at least one metal electrode. Optionally, the first drain electrode 22 and / or the second drain electrode 220 is a copper electrode, an aluminum electrode, a gold electrode, a silver electrode, a platinum electrode, a titanium electrode or a molybdenum electrode.

[0067] In some embodiments, the first gate electrode 61 and / or the second gate electrode 610 is selected from at least one metal electrode. Optionally, the first gate electrode 61 and / or the second gate electrode 610 is a copper electrode, an aluminum electrode, a gold electrode, a silver electrode, a platinum electrode, a titanium electrode or a molybdenum electrode.

[0068] In some embodiments, the material of the first substrate 11 and / or the second substrate 110 is selected from at least one of silicon, silicon oxide, sapphire, glass, ceramic, polyethylene naphthalate, polyethylene terephthalate, polyimide, polymethyl methacrylate, polydimethylsiloxane, polyvinyl chloride, polycarbonate, polystyrene and polymethyl methacrylate.

[0069] In some embodiments, the first insulating dielectric layer 41 further covers a surface of the first source electrode 21 away from the first substrate 11 .

[0070] In some embodiments, the first insulating dielectric layer 41 further covers the surface of the first drain electrode 22 away from the first substrate 11 .

[0071] In some embodiments, the first insulating dielectric layer 41 further covers a region of the surface of the first substrate 11 where the first source electrode 21 , the first drain electrode 22 , and the first channel layer 31 are not provided.

[0072] Another embodiment of the present application also provides a method for preparing a phototransistor, including: providing a first substrate 11; preparing a first source electrode 21, a first drain electrode 22 and a first channel layer 31 on one surface of the first substrate 11, respectively, the first source electrode 21 and the first drain electrode 22 are arranged at intervals, and the first channel layer 31 is located between the first source electrode 21 and the first drain electrode 22 and is connected to the first source electrode 21 and the first drain electrode 22; preparing a first insulating dielectric layer 41, a first semiconductor layer 51 and a first gate electrode 61 stacked in sequence on the surface of the first channel layer 31 away from the first substrate 11, and the band gap width of the first semiconductor layer 51 is greater than the band gap width of the first channel layer 31.

[0073] Another embodiment of the present application also provides a method for preparing a phototransistor, including: providing a second substrate 110; preparing a second gate electrode 610, a second semiconductor layer 510, a second insulating dielectric layer 410, and a second channel layer 310, which are stacked in sequence on one surface of the second substrate 110; preparing a second source electrode 210 and a second drain electrode 220 on a surface of the second insulating dielectric layer 410 away from the second substrate 110 or on a surface of the second channel layer 310 away from the second substrate 110, respectively, the second source electrode 210 is in contact with the second channel layer 310, the second drain electrode 220 is in contact with the second channel layer 310, and the second source electrode 210 and the second drain electrode 220 are spaced apart; the band gap width of the second semiconductor layer 510 is greater than the band gap width of the second channel layer 310.

[0074] In some embodiments, the first source electrode 21 and / or the second source electrode 210 are prepared by magnetron sputtering.

[0075] In some embodiments, patterning of the first source electrode 21 and / or the second source electrode 210 is achieved by photolithography.

[0076] In some embodiments, the first drain electrode 22 and / or the second drain electrode 220 are fabricated by magnetron sputtering.

[0077] In some embodiments, patterning of the first drain electrode 22 and / or the second drain electrode 220 is achieved by photolithography.

[0078] In some embodiments, the first channel layer 31 and / or the second channel layer 310 are prepared by magnetron sputtering.

[0079] In some embodiments, patterning of the first channel layer 31 and / or the second channel layer 310 is achieved by photolithography.

[0080] In some embodiments, the first semiconductor layer 51 and / or the second semiconductor layer 510 are prepared by magnetron sputtering.

[0081] In some embodiments, patterning of the first semiconductor layer 51 and / or the second semiconductor layer 510 is achieved by photolithography.

[0082] In some embodiments, the first insulating dielectric layer 41 and / or the second insulating dielectric layer 410 are prepared by atomic layer deposition.

[0083] In some embodiments, patterning of the first insulating dielectric layer 41 and / or the second insulating dielectric layer 410 is achieved by photolithography.

[0084] In some embodiments, the first gate electrode 61 and / or the second gate electrode 610 are fabricated by magnetron sputtering.

[0085] In some embodiments, patterning of the first gate electrode 61 and / or the second gate electrode 610 is achieved by photolithography.

[0086] In some embodiments, before respectively forming the first source electrode 21 , the first drain electrode 22 and the first channel layer 31 on the first substrate 11 , the method further includes: cleaning the first substrate 11 using acetone, alcohol and deionized water respectively.

[0087] In some embodiments, a method for preparing a phototransistor includes the following steps:

[0088] (1) Providing a first substrate 11;

[0089] (2) defining the patterns of the first source electrode 21 and the first drain electrode 22 on the surface of the first substrate 11 by photoresist, and preparing the first source electrode 21 and the first gate electrode 61 by magnetron sputtering, with the first source electrode 21 and the first drain electrode 22 spaced apart, and removing the resist;

[0090] (3) defining a pattern of a first channel layer 31 on the surface of the first substrate 11 by photoresist, preparing the first channel layer 31 by magnetron sputtering, wherein the first channel layer 31 is located between the first source electrode 21 and the first drain electrode 22 and connected to the first source electrode 21 and the first drain electrode 22, and removing the resist;

[0091] (4) defining a pattern of a first insulating dielectric layer 41 on a surface of the first channel layer 31 away from the first substrate 11 by photoresist, preparing the first insulating dielectric layer 41 by atomic layer deposition, and removing the resist;

[0092] (5) defining a pattern of the first semiconductor layer 51 on the surface of the first insulating dielectric layer 41 away from the first channel layer 31 by photoresist, forming the first semiconductor layer 51 by magnetron sputtering, wherein the band gap width of the first semiconductor layer 51 is larger than the band gap width of the first channel layer 31, and removing the resist;

[0093] (6) The pattern of the first gate electrode 61 is defined on the surface of the first semiconductor layer 51 away from the first insulating dielectric layer 41 by photoresist, the first gate electrode 61 is prepared by magnetron sputtering, and the resist is removed.

[0094] In one embodiment, the method for preparing a phototransistor comprises the following steps:

[0095] (1) Providing a first substrate 11;

[0096] (2) defining the patterns of the first source electrode 21 and the first drain electrode 22 on the surface of the first substrate 11 by photoresist, and preparing the first source electrode 21 and the first gate electrode 61 by magnetron sputtering, with the first source electrode 21 and the first drain electrode 22 spaced apart, and removing the resist;

[0097] (3) defining a pattern of a first channel layer 31 on the surface of the first substrate 11 by photoresist, preparing the first channel layer 31 by magnetron sputtering, wherein the first channel layer 31 is located between the first source electrode 21 and the first drain electrode 22 and connected to the first source electrode 21 and the first drain electrode 22, and removing the resist;

[0098] (4) defining a pattern of a first insulating dielectric layer 41 on a surface of the first channel layer 31 away from the first substrate 11 by photoresist, preparing the first insulating dielectric layer 41 by atomic layer deposition, and removing the resist;

[0099] (5) defining a pattern of the first semiconductor layer 51 on the surface of the first insulating dielectric layer 41 away from the first channel layer 31 by photoresist, forming the first semiconductor layer 51 by magnetron sputtering, wherein the band gap width of the first semiconductor layer 51 is larger than the band gap width of the first channel layer 31, and removing the resist;

[0100] (6) The pattern of the first gate electrode 61 is defined on the surface of the first semiconductor layer 51 away from the first insulating dielectric layer 41 by photoresist, the first gate electrode 61 is prepared by magnetron sputtering, and the resist is removed.

[0101] Yet another embodiment of the present application provides a photodetection device, comprising any of the above-mentioned phototransistors or a phototransistor manufactured by the above-mentioned method for manufacturing a phototransistor.

[0102] The following is a specific implementation method

[0103] Example 1

[0104] Referring again to FIG1 , the phototransistor in this embodiment includes a first substrate 11, a first source electrode 21, a first drain electrode 22, a first channel layer 31, a first insulating dielectric layer 41, a first semiconductor layer 51, and a first gate electrode 61. In this embodiment, the first substrate 11 is made of glass, the first source electrode 21 is made of Mo, the first drain electrode 22 is made of Mo, the first channel layer 31 is made of IGZO (band gap of 3.4 eV), the first insulating dielectric layer 41 is made of Al2O3, the first semiconductor layer 51 is made of Ga2O3 (band gap of 5 eV), and the first gate electrode 61 is made of Au. The first source electrode 21 and the first drain electrode 22 are spaced apart and disposed on the upper surface of the first substrate 11. A first channel layer 31 is disposed on the surface of the first substrate 11 and located between the first source electrode 21 and the first drain electrode 22. The first channel layer 31 is connected to the first source electrode 21 and the first drain electrode 22. The first channel layer 31 is thicker than the first source electrode 21 and the first drain electrode 22 and partially covers the surfaces of the first source electrode 21 and the first drain electrode 22 that are away from the first substrate 11. A first insulating dielectric layer 41 is disposed on the surface of the first channel layer 31 that is away from the first substrate 11 and covers the surface of the first source electrode 21 that is away from the first substrate 11, the surface of the first drain electrode 22 that is away from the first substrate 11, and the surface of the first substrate 11 that is not provided with the first source electrode 21, the first drain electrode 22, and the first channel layer 31. A first semiconductor layer 51 is disposed on the surface of the first insulating dielectric layer 41 that is away from the first substrate 11. A first gate electrode 61 is disposed on the surface of the conductive layer that is away from the first substrate 11.

[0105] The preparation method of the phototransistor in this embodiment comprises the following steps:

[0106] (1) providing a first glass substrate 11, and ultrasonically cleaning the first glass substrate 11 in acetone, alcohol, and deionized water for 10 minutes each;

[0107] (2) defining the patterns of the first source electrode 21 and the first drain electrode 22 on the surface of the first substrate 11 by photoresist, and preparing the Mo first source electrode 21 and the Mo first gate electrode 61 by magnetron sputtering, respectively. The first source electrode 21 and the first drain electrode 22 are spaced apart, and the resist is removed;

[0108] (3) defining the pattern of the first channel layer 31 on the surface of the first substrate 11 by photoresist, preparing the IGZO first channel layer 31 by magnetron sputtering, the first channel layer 31 being located between the Mo first source electrode 21 and the Mo first drain electrode 22 and connected to the first source electrode 21 and the first drain electrode 22, and removing the resist;

[0109] (4) defining the pattern of the Al2O3 first insulating dielectric layer 41 on the surface of the IGZO first channel layer 31 away from the first glass substrate 11 by photoresist, preparing the Al2O3 first insulating dielectric layer 41 by atomic layer deposition, and removing the resist;

[0110] (5) defining the pattern of the Ga2O3 first semiconductor layer 51 on the surface of the Al2O3 first insulating dielectric layer 41 away from the IGZO first channel layer 31 by photoresist, preparing the Ga2O3 first semiconductor layer 51 by magnetron sputtering, and removing the resist;

[0111] (6) The pattern of the Au first gate electrode 61 is defined on the surface of the Ga2O3 first semiconductor layer 51 away from the Al2O3 first insulating dielectric layer 41 by photoresist, the Au first gate electrode 61 is prepared by magnetron sputtering, and the resist is removed.

[0112] The phototransistor in Example 1 is subjected to a two-color recognition test. The gate voltage and drain voltage of the phototransistor are fixed at -3V and 1V, respectively, and the phototransistor is irradiated with 254nm and 365nm light, respectively. Referring to Figure 4, Figure 4 is the response curve of the phototransistor to 254nm light. It can be seen that when the phototransistor is irradiated with light of 254nm wavelength, the current is significantly reduced, and the photocurrent is smaller than the dark current. Referring to Figure 5, Figure 5 is the response curve of the phototransistor to 365nm light. It can be seen that when the phototransistor is irradiated with light of 365nm wavelength, the current is significantly increased, and the photocurrent is larger than the dark current. That is, when the phototransistor in this embodiment is irradiated with light of 254nm or 365nm wavelength, the light of 254nm and 365nm wavelength can be identified and distinguished by comparing the size of the photocurrent and the dark current. The phototransistor in this embodiment can achieve two-color recognition.

[0113] In this embodiment, the detection principle of the dual-color detection phototransistor is as follows: in the dark state, the equivalent circuit and gate voltage distribution of the first semiconductor layer 51 and the first insulating dielectric layer 41 are shown in FIG2 , where C 51 and R 51are the equivalent capacitance and resistance of the first semiconductor layer 51, C 41 and R 41 are the equivalent capacitance and resistance of the first insulating dielectric layer 41 respectively. The gate voltage is fixed to V GS , the gate voltage borne by the first semiconductor layer 51 is V 51 , then the gate voltage borne by the first insulating dielectric layer 41 is V 41 =V GS -V 51 , so the amount of electron charge depleted in the first channel layer 31 is Q=C 41 ×(V GS -V 51 ). Under the irradiation of light with a shorter wavelength (i.e., matching the band gap of the first semiconductor layer 51), the resistance of the first semiconductor layer 51 decreases significantly. The resistance of the first semiconductor layer 51 after the decrease is negligible compared with the resistance of the first insulating dielectric layer 41. At this time, the gate voltage is almost entirely distributed on the first insulating dielectric layer 41, i.e., V 41 =V GS , so the electron charge of the channel depletion is Q = C 41 ×V GS , in which case the photocurrent will be lower than the dark current. Under irradiation with light of a longer wavelength (i.e., matching the bandgap of the first channel layer 31), the resistance of the first semiconductor layer 51 remains unchanged, and therefore the gate voltage distribution remains unchanged. The first channel layer 31 will generate carriers, resulting in a higher photocurrent than the dark current. By comparing the photocurrent and dark current, it is possible to distinguish between light of different wavelengths, thus achieving dual-color recognition.

[0114] Example 2

[0115] Referring again to FIG. 2 , the phototransistor in this embodiment includes a second substrate 110, a second source electrode 210, a second drain electrode 220, a second channel layer 310, a second insulating dielectric layer 410, a second semiconductor layer 510, and a second gate electrode 610. In this embodiment, the second substrate 110 is made of glass, the second source electrode 210 is made of Mo, the second drain electrode 220 is made of Mo, the second channel layer 310 is made of IGZO (bandgap 3.4 eV), the second insulating dielectric layer 410 is made of Al2O3, the second semiconductor layer 510 is made of Ga2O3 (bandgap 5 eV), and the second gate electrode 610 is made of Au. The second gate electrode 610, the second semiconductor layer 510, the second insulating dielectric layer 410, and the second channel layer 310 are sequentially stacked on the surface of the second substrate 110. The second source electrode 210 and the second drain electrode 220 are spaced apart and disposed on the upper surface of the second insulating dielectric layer 410 , and both the second source electrode 210 and the second drain electrode 220 are in contact with the second channel layer 310 .

[0116] The preparation method of the phototransistor in this embodiment comprises the following steps:

[0117] (1) providing a glass second substrate 110, and ultrasonically cleaning the glass second substrate 110 in acetone, alcohol, and deionized water for 10 minutes each;

[0118] (2) defining the pattern of the Au second gate electrode 610 on the surface of the second substrate 110 by photoresist, preparing the Au second gate electrode 610 by magnetron sputtering, and removing the resist;

[0119] (3) defining the pattern of the Ga2O3 second semiconductor layer 510 on the surface of the Au second gate electrode 610 by photoresist, preparing the Ga2O3 second semiconductor layer 510 by magnetron sputtering, and removing the resist;

[0120] (4) defining the pattern of the Al2O3 second insulating dielectric layer 410 on the surface of the Ga2O3 second semiconductor layer 510 by photoresist, preparing the Al2O3 second insulating dielectric layer 410 by atomic layer deposition, and removing the resist;

[0121] (5) The patterns of the second source electrode 210, the second drain electrode 220 and the second channel layer 310 are defined on the surface of the Al2O3 second insulating dielectric layer 410 by photoresist, the IGZO second channel layer 310 is prepared by magnetron sputtering, and the Mo second source electrode 210 and the Mo second drain electrode 220 are respectively prepared by magnetron sputtering. The second source electrode 210 and the second drain electrode 220 are arranged at intervals, and the second channel layer 310 is located between the Mo second source electrode 210 and the Mo second drain electrode 220 and is connected to the second source electrode 210 and the second drain electrode 220, and the glue is removed.

[0122] The technical features of the above-mentioned embodiments can be combined arbitrarily. In order to make the description concise, not all possible combinations of the technical features in the above-mentioned embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0123] The above-described embodiments merely represent several implementation methods of the present application. While the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent. It should be noted that a person skilled in the art could make several modifications and improvements without departing from the spirit of the present application, all of which fall within the scope of protection of the present application. Therefore, the scope of protection of the patent in this application shall be based on the appended claims, and the specification and drawings may be used to interpret the claims.

Claims

1. A phototransistor, comprising a first substrate, a first source electrode, a first drain electrode, a first channel layer, a first insulating dielectric layer, a first semiconductor layer and a first gate electrode; The first source electrode and the first drain electrode are arranged on a surface of the first substrate with an interval; The first channel layer is disposed on the surface of the first substrate and is located between the first source electrode and the first drain electrode, and the first channel layer is connected to the first source electrode and the first drain electrode; The first insulating dielectric layer, the first semiconductor layer and the first gate electrode are sequentially stacked on a surface of the first channel layer away from the first substrate; The bandgap width of the first semiconductor layer is greater than the bandgap width of the first channel layer; or, comprising a second substrate, a second source electrode, a second drain electrode, a second channel layer, a second insulating dielectric layer, a second semiconductor layer and a second gate electrode; The second gate electrode, the second semiconductor layer, the second insulating dielectric layer and the second channel layer are sequentially stacked on the surface of the second substrate; The second source electrode is disposed on a surface of the second insulating dielectric layer away from the second substrate or on a surface of the second channel layer away from the second substrate, and the second source electrode is in contact with the second channel layer; The second drain electrode is disposed on a surface of the second insulating dielectric layer away from the second substrate or on a surface of the second channel layer away from the second substrate, and the second drain electrode is in contact with the second channel layer; The second source electrode and the second drain electrode are arranged at intervals; The bandgap width of the second semiconductor layer is greater than the bandgap width of the second channel layer.

2. The phototransistor according to claim 1, wherein: A difference between a band gap width of the first semiconductor layer and a band gap width of the first channel layer is greater than or equal to 0.2 eV.

3. The phototransistor according to claim 2, wherein: The band gap width of the first channel layer is 0.2 eV to 5 eV.

4. The phototransistor according to any one of claims 2 to 3, wherein: The band gap width of the first semiconductor layer is 1.5 eV to 5.5 eV.

5. The phototransistor according to any one of claims 1 to 4, wherein: The resistance of the first semiconductor layer in a dark state is greater than or equal to 1% of the resistance of the first insulating dielectric layer.

6. The phototransistor according to any one of claims 1 to 5, wherein: The thickness of the first semiconductor layer is 20 nm to 1000 nm.

7. The phototransistor according to any one of claims 1 to 6, wherein: The first channel layer partially or entirely covers a surface of the first source electrode that is away from the first substrate.

8. The phototransistor according to any one of claims 1 to 7, wherein: The first channel layer partially or entirely covers a surface of the first drain electrode that is away from the first substrate.

9. The phototransistor according to any one of claims 1 to 8, wherein: The first insulating dielectric layer partially or entirely covers a surface of the first source electrode that is away from the first substrate.

10. The phototransistor according to any one of claims 1 to 9, wherein: The first insulating dielectric layer partially or completely covers a surface of the first drain electrode away from the first substrate.

11. The phototransistor according to any one of claims 1 to 10, wherein: The first insulating dielectric layer partially or entirely covers a surface of the first substrate where the first source electrode, the first drain electrode, and the first channel layer are not provided.

12. The phototransistor according to any one of claims 1 to 11, wherein: The material of the first channel layer and the material of the first semiconductor layer are each independently selected from at least one of silicon, molybdenum disulfide, tungsten disulfide, rhenium disulfide, tungsten diselenide, indium gallium zinc oxide, gallium oxide, gallium arsenide, indium selenide and an organic semiconductor.

13. The phototransistor according to any one of claims 1 to 12, wherein: The material of the first insulating dielectric layer is selected from at least one of silicon dioxide, silicon nitride, aluminum oxide, hafnium dioxide, titanium dioxide, polyethylene naphthalate, polyethylene terephthalate, polyimide, polymethyl methacrylate, polydimethylsiloxane, polyvinyl chloride, polycarbonate, polystyrene and polymethyl methacrylate.

14. The phototransistor according to any one of claims 1 to 13, wherein: The first source electrode, the first drain electrode, and the first gate electrode are each independently selected from at least one of metal electrodes.

15. The phototransistor according to any one of claims 1 to 14, wherein: The material of the first substrate is selected from at least one of silicon, silicon oxide, sapphire, glass, ceramic, polyethylene naphthalate, polyethylene terephthalate, polyimide, polymethyl methacrylate, polydimethylsiloxane, polyvinyl chloride, polycarbonate, polystyrene and polymethyl methacrylate.

16. The phototransistor according to claim 1, wherein A difference between a band gap width of the second semiconductor layer and a band gap width of the second channel layer is greater than or equal to 0.2 eV.

17. The phototransistor according to claim 16, wherein: The band gap width of the second channel layer is 0.2 eV to 5 eV.

18. The phototransistor according to any one of claims 16 to 17, wherein: The band gap width of the second semiconductor layer is 1.5 eV to 5.5 eV.

19. The phototransistor according to any one of claims 1, 16 to 18, wherein: The resistance of the second semiconductor layer in a dark state is greater than or equal to 1% of the resistance of the second insulating dielectric layer.

20. The phototransistor according to any one of claims 1, 16 to 19, wherein: The thickness of the second semiconductor layer is 20 nm to 1000 nm.

21. The phototransistor according to any one of claims 1, 16 to 20, wherein: The material of the second channel layer and the material of the second semiconductor layer are each independently selected from at least one of silicon, molybdenum disulfide, tungsten disulfide, rhenium disulfide, tungsten diselenide, indium gallium zinc oxide, gallium oxide, gallium arsenide, indium selenide and an organic semiconductor.

22. The phototransistor according to any one of claims 1, 16 to 21, wherein: The material of the second insulating dielectric layer is selected from at least one of silicon dioxide, silicon nitride, aluminum oxide, hafnium dioxide, titanium dioxide, polyethylene naphthalate, polyethylene terephthalate, polyimide, polymethyl methacrylate, polydimethylsiloxane, polyvinyl chloride, polycarbonate, polystyrene and polymethyl methacrylate.

23. The phototransistor according to any one of claims 1, 16 to 22, wherein: The second source electrode, the second drain electrode and the second gate electrode are each independently selected from at least one of metal electrodes.

24. The phototransistor according to any one of claims 1, 16 to 23, wherein: The material of the second substrate is selected from at least one of silicon, silicon oxide, sapphire, glass, ceramic, polyethylene naphthalate, polyethylene terephthalate, polyimide, polymethyl methacrylate, polydimethylsiloxane, polyvinyl chloride, polycarbonate, polystyrene and polymethyl methacrylate.

25. A method for preparing a phototransistor, comprising: providing a first substrate; A first source electrode, a first drain electrode and a first channel layer are respectively prepared on one surface of the first substrate, wherein the first source electrode and the first drain electrode are arranged at an interval, and the first channel layer is located between the first source electrode and the first drain electrode and is connected to the first source electrode and the first drain electrode; On a surface of the first channel layer away from the first substrate, a first insulating dielectric layer, a first semiconductor layer and a first gate electrode are sequentially stacked, wherein the band gap width of the first semiconductor layer is greater than the band gap width of the first channel layer; Or include: providing a second substrate; On one surface of the second substrate, a second gate electrode, a second semiconductor layer, a second insulating dielectric layer, and a second channel layer are sequentially stacked. A second source electrode and a second drain electrode are respectively formed on a surface of the second insulating dielectric layer away from the second substrate or on a surface of the second channel layer away from the second substrate, the second source electrode is in contact with the second channel layer, the second drain electrode is in contact with the second channel layer, and the second source electrode and the second drain electrode are spaced apart; The bandgap width of the second semiconductor layer is greater than the bandgap width of the second channel layer.

26. A photoelectric detection device, comprising the phototransistor according to any one of claims 1 to 24 or a phototransistor prepared by the method for preparing a phototransistor according to claim 25.

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