Multi-level envelope tracking power amplifier circuit
By using reconfigurable devices and power modulators in multi-level envelope tracking power amplifiers to adjust the output impedance and operating voltage, efficiency problems at different levels and loads are solved, high-efficiency power amplification is achieved, and energy consumption is reduced .
Patent Information
- Application Number
- PCT/CN2024/100548
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-06-30
- Filing Date
- 2024-06-21
- Publication Date
- 2025-01-02
AI Technical Summary
Existing multi-level envelope tracking power amplifiers cannot continuously operate in the optimal efficiency state at different levels and loads, resulting in deep retraction of power and increased energy consumption.
By introducing reconfigurable devices and power modulators into the amplifier module, the output impedance value and operating voltage of the envelope tracking power amplifier are adjusted to meet the target efficiency impedance curve, thereby maintaining high efficiency operation at different levels and loads. .
It realizes the reduction of transmitter energy consumption under peak average signal, improves the efficiency of multi-level envelope tracking power amplifier, avoids energy waste, and is suitable for base station and terminal wireless transmission products.
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Figure CN2024100548_02012025_PF_FP_ABST
Abstract
Description
A multi-level envelope tracking power amplifier circuit
[0001] CROSS-REFERENCE TO RELATED APPLICATIONS
[0002] This application claims priority to a Chinese patent application filed with the Patent Office of China on June 30, 2023, with application number 202310797825.X and invention name “A Multi-level Envelope Tracking Power Amplifier Circuit”. The entire contents of the Chinese patent application are incorporated herein by reference. Technical Field
[0003] The present application relates to the field of wireless communications, and in particular to a multi-level envelope tracking power amplifier circuit. Background Art
[0004] When a base station is operating in the field, its actual average output power needs to be adjusted based on the traffic volume. Most of the time, the average transmit power is only 50% of the rated load, or even as low as 30%. Because the power amplifier operates at light load for extended periods, deep power fallback causes the amplifier to operate in a low-efficiency range, increasing overall power consumption.
[0005] To address this issue, low-power energy-saving technologies are gaining increasing attention. Multi-level envelope tracking (ET) power amplifiers are particularly competitive. However, the current conventional technical solution for multi-level envelope tracking (ET) power amplifiers relies on a fixed load matching design, which cannot ensure that the amplifier consistently operates at optimal efficiency under varying power levels and loads. This presents a challenge that remains to be addressed in multi-level ET amplifiers.
[0006] How to improve the efficiency of a multi-level envelope tracking power amplifier and reduce energy consumption is a technical problem to be solved by this application.
[0007] Summary of the Invention
[0008] In a first aspect, a multi-level envelope tracking power amplifier circuit is provided, comprising: a power amplifier module, comprising at least one envelope tracking power amplifier and at least one reconfigurable device, wherein the reconfigurable device is used to adjust the output impedance value of a target envelope tracking power amplifier to a target output impedance value; a power supply modulator, which is used to adjust the operating voltage of the power amplifier module so that the target envelope tracking power amplifier is at a target operating voltage; wherein the target output impedance value and the target operating voltage are such that the operating efficiency of the target envelope tracking power amplifier satisfies an efficiency-impedance curve corresponding to the target envelope tracking power amplifier. BRIEF DESCRIPTION OF THE DRAWINGS
[0009] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:
[0010] FIG1 is a schematic diagram of a structure of a multi-level envelope tracking power amplifier circuit according to an embodiment of the present application;
[0011] FIG2 is a second structural diagram of a multi-level envelope tracking power amplifier circuit according to an embodiment of the present application;
[0012] FIG3 is a third structural diagram of a multi-level envelope tracking power amplifier circuit according to an embodiment of the present application;
[0013] FIG4 a is a schematic diagram of the circuit structure of a reconfigurable device of a power amplifier module according to an embodiment of the present application;
[0014] FIG4b is an efficiency-impedance curve of the envelope tracking power amplifier based on the circuit structure shown in FIG4a under three leakage voltages and corresponding loads;
[0015] FIG4c is a schematic diagram of fundamental and harmonic impedance matching of the reconfigurable output matching submodule based on the circuit structure shown in FIG4a as viewed from port a;
[0016] FIG4 d is a schematic diagram showing a comparison of efficiencies achievable based on the circuit structure shown in FIG4 a ;
[0017] FIG5 is a fourth structural diagram of a multi-level envelope tracking power amplifier circuit according to an embodiment of the present application;
[0018] FIG6 a is a schematic structural diagram of a power amplifier module based on a Doherty architecture in a multi-level envelope tracking power amplifier circuit according to an embodiment of the present application;
[0019] FIG6 b is a schematic diagram of the structure of a power amplifier module based on an Outphasing architecture in a multi-level envelope tracking power amplifier circuit according to an embodiment of the present application;
[0020] FIG6 c is a schematic diagram of the structure of a power amplifier module based on an LMBA architecture in a multi-level envelope tracking power amplifier circuit according to an embodiment of the present application;
[0021] FIG7 is a schematic diagram of the basic structure of a reconfigurable device in a multi-level envelope tracking power amplifier circuit according to an embodiment of the present application;
[0022] FIG8 is a schematic diagram of the structure of a power amplifier module implemented by a Doherty architecture according to an embodiment of the present application. DETAILED DESCRIPTION
[0023] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application. The figure numbers in this application are only used to distinguish the various steps in the scheme and are not used to limit the execution order of the various steps. The specific execution order is subject to the description in the specification.
[0024] In order to solve the problems existing in the prior art, an embodiment of the present application provides a multi-level envelope tracking power amplifier circuit, which can be applied to the field of wireless technology, and is particularly suitable for wireless communication systems with high peak-to-average ratio signals.
[0025] In practical applications, the circuit provided in the embodiment of the present application can cover an operating frequency band of 10%-30% relative to the operating bandwidth and has a high-efficiency transmission system under high back-off amount. It can be specifically applied to base station wireless transmission products, terminal wireless transmission products, etc.
[0026] The multi-level envelope tracking power amplifier circuit provided in the present application relates to envelope tracking technology, wherein the envelope tracking technology can be used to achieve energy saving of a power amplifier (PA), which can also be referred to as a power amplifier.
[0027] An embodiment of the present application provides a multi-level envelope tracking power amplifier circuit, as shown in FIG1 , comprising:
[0028] The power amplifier module 11 includes at least one envelope tracking power amplifier 111 and at least one reconfigurable device 112, wherein the reconfigurable device is used to adjust the output impedance value of the target envelope tracking power amplifier to a target output impedance value; the power supply modulator 12 is used to adjust the operating voltage of the power amplifier module 11 so that the target envelope tracking power amplifier is at a target operating voltage; wherein the target output impedance value and the target operating voltage make the operating efficiency of the target envelope tracking power amplifier meet the efficiency impedance curve corresponding to the target envelope tracking power amplifier.
[0029] Envelope tracking (ET) tracks the power level of the input RF signal's envelope. For each power level, an appropriate operating voltage is determined: a higher voltage for higher powers and a lower voltage for lower powers. The appropriate operating voltage here refers to a voltage that achieves the desired amplification function while avoiding energy waste.
[0030] In practical applications, the specific implementation method of applying envelope tracking technology is that the RF signal is input to the input end of the envelope tracking power amplifier of the power amplifier module, and the power supply voltage of the power amplifier is changed accordingly according to the envelope change of the input RF signal, so that the power amplifier is at a suitable operating voltage, reducing losses while ensuring the realization of the amplification function, and achieving a high-efficiency technical effect.
[0031] In the solution provided in the embodiments of the present application, the target ET power amplifier is any ET power amplifier in the power amplifier module. Under the control of the power modulator and the control module, the operating voltage and load of the target ET power amplifier are controlled to meet the efficiency-impedance curve corresponding to the target ET power amplifier, thereby ensuring that the target ET power amplifier operates in a high-efficiency state.
[0032] Specifically, the reconfigurable device is connected between the output end of the envelope tracking power amplifier and the load impedance, and the output impedance of the envelope tracking power amplifier can be adjusted by controlling the reconfigurable device.
[0033] The solution provided by the embodiments of the present application comprises a multi-level envelope tracking power amplifier circuit including a power amplifier module and a power supply modulator. The reconfigurable device in the power amplifier module is used to adjust the output impedance of a target envelope tracking power amplifier to a target output impedance value, and the power supply modulator is used to control the operating voltage of the power amplifier module to maintain the target envelope tracking power amplifier at the target operating voltage. Furthermore, the operating efficiency of the target envelope tracking power amplifier is controlled from two aspects: the output impedance value and the operating voltage. This efficiency is adjusted to meet the efficiency-impedance curve corresponding to the target envelope tracking power amplifier, ensuring that the envelope tracking power amplifier operates in a highly efficient state and avoiding energy waste.
[0034] In this solution, the efficiency-impedance curve corresponding to the target envelope tracking power amplifier is determined by the inherent properties of the target envelope tracking power amplifier. In practical applications, the efficiency-impedance curve corresponding to the target envelope tracking power amplifier can be pre-calculated based on the inherent parameters of the target envelope tracking power amplifier, or generated through test records and the like. For example, if a test method is adopted, the target envelope tracking power amplifier under different operating voltages is tested separately. When in any operating voltage state, the output impedance value is changed and the efficiency is recorded. In other words, the relationship between the voltage of the target envelope tracking amplifier and its load, output impedance value, and efficiency is tested. For any operating voltage, the output impedance value corresponding to the optimal efficiency point is determined, and this output impedance value is determined as the output impedance value corresponding to the operating voltage. A curve is generated based on multiple operating voltages and the corresponding output impedance values as the efficiency-impedance curve corresponding to the envelope tracking power amplifier.
[0035] The efficiency-impedance curve can specifically be a two-dimensional curve, in which one dimension represents the variable operating voltage and load of the envelope tracking power amplifier, and the other dimension represents the output impedance value corresponding to each operating voltage and load of the envelope tracking power amplifier, that is, the output impedance value with optimal efficiency corresponding to the operating voltage and load.
[0036] The efficiency-impedance curve is determined by the structure and properties of the ETPA itself. Different ETPAs correspond to different efficiency-impedance curves. If a power amplifier module contains multiple ETPAs, the corresponding ETPA can be controlled separately for each efficiency-impedance curve. This allows for independent control of each ETPA, ensuring that each ETPA in the module operates at high efficiency.
[0037] In practical applications, since this solution adjusts the operating voltage and output impedance value of the envelope tracking power amplifier based on the efficiency impedance curve, it can achieve continuous adjustment and continuously ensure that the envelope tracking power amplifier is in a high-efficiency operating state during the continuous adjustment process.
[0038] For example, in practical applications, an envelope tracking power amplifier may experience significant power back-off, which significantly reduces the gain of the envelope tracking power amplifier. During this process, the operating voltage of the envelope tracking power amplifier must also decrease significantly. During this decrease, the output impedance of the envelope tracking power amplifier changes accordingly with the target operating voltage through the solution provided in the embodiments of the present application. This ensures that the operating voltage and output impedance of the envelope tracking power amplifier during the significant power back-off process continue to meet the efficiency-impedance curve, thereby ensuring that the envelope tracking power amplifier maintains a high-efficiency operating state during the significant back-off process and avoiding energy waste.
[0039] Based on the solution provided in the above embodiment, optionally, as shown in FIG2 , the circuit further includes:
[0040] A field programmable gate array (FPGA) module 21 is used to control the reconfigurable device 112 to adjust the output impedance value of the target envelope tracking power amplifier 111 to the target output impedance value according to the efficiency impedance curve, and to control the power supply modulator 12 to adjust the operating voltage of the power amplifier module 11 according to the efficiency impedance curve so that the operating efficiency of the target envelope tracking power amplifier 111 satisfies the efficiency impedance curve corresponding to the target envelope tracking power amplifier 111.
[0041] In this solution, the FPGA module implements signal processing and control. In practice, the target operating voltage and output impedance are determined based on the efficiency-impedance curve and the input RF signal. This output controls the power modulator and amplifier modules, ensuring that the envelope tracking power amplifier operates efficiently at the target operating voltage and corresponding output impedance.
[0042] Based on the solution provided in the above embodiment, optionally, as shown in FIG3 , the circuit further includes:
[0043] The control module 31 is configured to adjust the at least one reconfigurable device 112 under the control of the FPGA module 21 so as to adjust the output impedance value of the target envelope tracking power amplifier 111 to a target output impedance value.
[0044] In this solution, the control module is connected between the FPGA module and the power amplifier module, enabling further control of the power amplifier module based on the FPGA module's instructions. If the power amplifier module includes multiple reconfigurable components, the control module can be used to control each component individually, effectively improving the controllability of each component.
[0045] Based on the solution provided in the above embodiment, optionally, the FPGA module 21 is further configured to:
[0046] An impedance control signal and a power control signal are generated according to the efficiency-impedance curve, wherein the impedance control signal is used to control the reconfigurable device 112 , and the power control signal is used to control the power modulator 12 .
[0047] In this solution, the FPGA module can apply envelope tracking technology to instantly calculate the corresponding target operating voltage based on the input RF signal. This target operating voltage is a high-efficiency voltage that can achieve the required amplification function without wasting energy. Once the target operating voltage is determined, the target output impedance value corresponding to the target operating voltage is determined based on the efficiency impedance curve. Furthermore, a power control signal is generated based on the target operating voltage and sent to the power modulator. Furthermore, an impedance control signal is generated based on the target output impedance value and sent to the control module, which then controls the reconfigurable device. The power control signal controls the operating voltage of the target envelope tracking power amplifier through the power modulator, and the output impedance control signal controls the output impedance of the target envelope tracking power amplifier through the control module.
[0048] After receiving the power control signal, the power modulator supplies power to the power amplifier module according to the power control signal, thereby maintaining the target envelope tracking power amplifier at the target operating voltage. The power modulator is capable of rapid voltage switching, delivering the voltage corresponding to the signal to the power amplifier, maintaining the envelope tracking power amplifier at the desired target operating voltage.
[0049] After receiving the impedance control signal, the control module adjusts the impedance of the at least one reconfigurable device based on the impedance control signal, thereby adjusting the target output impedance value of the envelope tracking power amplifier to the target output impedance value. The control module can be used to adjust the reconfigurable device based on the impedance control signal to change the impedance value at the output end of the envelope tracking power amplifier, thereby ensuring that the operating state of the envelope tracking power amplifier meets the efficiency-impedance curve.
[0050] The circuit provided in the embodiment of the present application includes a field programmable gate array (FPGA) module, a control module, a power modulator, and a power amplifier module. The power amplifier module includes an envelope tracking power amplifier and a reconfigurable device. The FPGA module sends a power control signal and an impedance control signal according to the efficiency impedance curve, and the power modulator supplies power to the power amplifier module according to the power control signal, thereby controlling the operating voltage of the envelope tracking power amplifier. The control module adjusts the impedance of the reconfigurable device according to the impedance control signal, thereby adjusting the output impedance value of the target envelope tracking power amplifier, so that the operating efficiency of the target envelope tracking power amplifier meets the efficiency impedance curve, ensuring that the envelope tracking power amplifier is in a high-efficiency operating state and avoiding energy waste.
[0051] The following describes the connection method of each module in the circuit provided in the embodiment of the present application.
[0052] The input of the reconfigurable output device is electrically connected to the output of the target envelope tracking power amplifier. The first output of the FPGA module is electrically connected to the input of the power modulator. The second output of the FPGA module is electrically connected to the input of the control module. The first output is used to transmit a power control signal, and the second output is used to transmit an impedance control signal. The output of the control module is electrically connected to the first input of the power amplifier module, and the control module is used to adjust the impedance of the reconfigurable device based on the impedance control signal. The output of the power modulator is electrically connected to the second input of the power amplifier module, and the power modulator is used to provide an operating voltage to the power amplifier module based on the power control signal.
[0053] Optionally, a module power supply can be provided between the FPGA module and the power modulator. The module power supply can be used to provide electrical energy to the power modulator, and the power modulator determines the target operating voltage to be provided to the power amplifier module based on the power control signal. In practical applications, the module power supply can provide multiple voltages to the power modulator according to the actual needs of each module, and the power modulator provides multiple power supply terminals with different voltages to the power amplifier module based on the multiple voltages. For example, when the power amplifier module includes multiple envelope tracking power amplifiers, the power modulator can provide power supply terminals with different voltages to the multiple envelope tracking power amplifiers respectively to meet the different power supply requirements of different envelope tracking power amplifiers.
[0054] Based on the solution provided in the above embodiment, optionally, as shown in FIG4 a , the power amplifier module includes a reconfigurable harmonic output matching submodule 101 , a reconfigurable fundamental output matching submodule 102 , an output drain bias module 103 and an impedance inverter 104 .
[0055] The input end of the reconfigurable harmonic output matching submodule, the input end of the reconfigurable fundamental output matching submodule, and the input end of the output drain bias module are all electrically connected to the output end of the target envelope tracking power amplifier.
[0056] The power supply end of the output drain bias module is electrically connected to the output end of the power modulator.
[0057] The output end of the reconfigurable fundamental wave output matching submodule is electrically connected to the input end of the impedance inverter.
[0058] The output end of the impedance inverter is electrically connected to the input end of the load impedance of the target envelope tracking power amplifier.
[0059] In order to more clearly describe the implementation process of impedance reconfiguration in this example, an embodiment is provided to describe the circuit structure and its implementation in detail. In this example, the impedance inverter is specifically a 1 / 4 wavelength impedance inverter.
[0060] In this example, the power amplifier module includes a PIN switch K1, microstrip lines TL1, TL2, TL3, TL4, TL5, a quarter-wavelength line TL6, a series capacitor C1, a grounded capacitor C2, a grounded varactor diode C3, a grounded varactor diode C4, and a grounded capacitor C5.
[0061] Port a is connected to the drain of the envelope tracking power amplifier, port b is the output end connected to the output load impedance of the power amplifier module, and port c is connected to the output end of the power modulator to achieve drain power supply of different gears.
[0062] Capacitor C5 is a DC blocking capacitor, and together with microstrip line TL5 forms an output drain bias module 103 .
[0063] One end of the microstrip line TL4 is connected to the drain of the envelope tracking power amplifier, and the other end is connected to the grounded varactor diode C4 and the microstrip line TL3 . The microstrip line TL4 and the varactor diode C4 together constitute the reconfigurable harmonic output matching submodule 101 .
[0064] The other end of the microstrip line TL3 is connected to the grounded varactor diode C3 and the microstrip line TL2. The other end of the microstrip line TL2 is connected to the microstrip line TL1 and one end of the PIN switch K1. The other end of the PIN switch K1 is connected to the grounded capacitor C2. The other end of the microstrip line TL1 is connected to the DC blocking capacitor C1, which together constitute a reconfigurable fundamental wave output matching submodule 102.
[0065] The other end of the DC blocking capacitor C1 is connected to the output terminal b and the load impedance, wherein the quarter-wavelength line TL6 constitutes an impedance inverter 104 .
[0066] In practical applications, when the power amplifier is in the large back-off working state and the leakage voltage at the C-terminal is switched to the third low voltage (in this example, the third low leakage voltage is 26V), the PIN switch K1 is disconnected, and the capacitances of the varactor diodes C3 and C4 are respectively C31 and C41 under this voltage control. That is, at this time, the microstrip lines TL3, TL2, TL1 and the capacitor C31 achieve fundamental wave output matching under this voltage and load, and the microstrip line TL4 and the capacitor C41 achieve harmonic output matching under this voltage and load.
[0067] When the power amplifier back-off amount decreases and the C-terminal leakage voltage switches to the second low voltage (the second low leakage voltage is 36V in this example), the PIN switch K1 is still disconnected, and the capacitances of the varactor diodes C3 and C4 are C32 and C42 respectively under this voltage control. That is, at this time, the microstrip lines TL3, TL2, TL1 and the capacitor C32 achieve fundamental wave output matching under this voltage and load, and the microstrip line TL4 and the capacitor C42 achieve harmonic output matching under this voltage and load.
[0068] When the power amplifier operates at rated full load and the C-terminal leakage voltage switches to the first voltage level (in this example, the first low leakage voltage is 48V), the PIN switch K1 is closed, and the capacitances of the varactor diodes C3 and C4 are respectively C33 and C43 under this voltage control. That is, at this time, the microstrip lines TL3, TL2, TL1 and the capacitors C2 and C33 achieve fundamental wave output matching under this voltage level and load, and the microstrip line TL4 and the capacitor C43 achieve harmonic output matching under this voltage level and load.
[0069] Figure 4b shows the LoadPull data of the envelope tracking power amplifier in the above example under three drain voltages and corresponding loads, namely 26V@43.9dBM, 36V@47.6dBM, and 48V@49.2dBM. The black dashed arrows show the maximum efficiency impedance migration trajectory under the three drain voltages and loads.
[0070] Furthermore, the fundamental and harmonic impedance matching of the reconfigurable output matching submodule in the present embodiment as viewed from port a is shown in FIG4c . FIG4c also shows the selection of a fixed load impedance point (indicated by a triangle in FIG4c ) in the impedance intersection region for comparison. Using LoadPull data to compare the efficiency achievable by the present embodiment design with the efficiency achievable by fixed impedance matching is shown in FIG4d . It is clear that the solution provided by the embodiment of the present application can control the envelope tracking power amplifier to continuously operate at the optimal efficiency point under large back-off amounts.
[0071] Based on the solution provided in the above embodiment, optionally, as shown in FIG5 , the power amplifier module 11 further includes:
[0072] The reconfigurable input matching submodule 51 is used to adjust the impedance under the control of the FPGA module 21 so that the input impedance value of the target envelope tracking power amplifier 111 matches the target operating voltage.
[0073] In the circuit diagram shown in Figure 5, the module power supply is optional. In addition to the reconfigurable device connected to the output of the target ET PA, a reconfigurable input matching submodule is also connected to the input of the ET PA in this example. This reconfigurable input matching submodule is controlled by the FPGA module. The control module adjusts the reconfigurable device within the reconfigurable input matching submodule based on a status signal, thereby adjusting the input impedance of the ET PA input.
[0074] In this example, the reconfigurable input matching submodule includes a reconfigurable device. Under the control of the control module, adjustment of the reconfigurable device enables control of the gate impedance of the ETPA, thereby controlling the actual gain of the ETPA during operation. Furthermore, the ETPA is controlled to maintain a target operating voltage and the corresponding high-efficiency operating state by taking into account the input impedance, output impedance, and gain.
[0075] Based on the solution provided in the above embodiment, optionally, the output end of the reconfigurable input matching submodule 51 is electrically connected to the input end of the target envelope tracking power amplifier, and the reconfigurable input matching submodule 51 is used to receive an input RF signal.
[0076] Optionally, the power amplifier module 11 is implemented based on at least one of the following architectures: a Doherty architecture, an Outphasing architecture, or an LMBA architecture. The following describes the power amplifier modules of these three architectures. Any reconfigurable output matching submodule or reconfigurable input matching submodule includes the reconfigurable device described in any of the above examples.
[0077] As shown in Figure 6a, the power amplifier module based on the Doherty architecture includes a power divider, multiple envelope tracking power amplifiers, multiple reconfigurable input matching submodules corresponding to the envelope tracking power amplifiers, and multiple reconfigurable output matching submodules corresponding to the envelope tracking power amplifiers. The power divider is used to convert the input RF signal RF in The output terminals of at least one of the reconfigurable output matching submodules are respectively output to the reconfigurable input matching submodules, wherein the output terminal of at least one of the reconfigurable output matching submodules is electrically connected to the input terminal of the load impedance through an impedance inverter.
[0078] In this example, the power amplifier module includes a Carry envelope tracking power amplifier and a Peak envelope tracking power amplifier. The input and output of these two envelope tracking power amplifiers are connected to a reconfigurable input matching submodule and a reconfigurable output matching submodule, respectively. Specifically, the impedance inverter is a quarter-wavelength impedance inverter.
[0079] As shown in Figure 6b, the power amplifier module based on the Outphasing architecture includes multiple envelope tracking power amplifiers, multiple reconfigurable input matching sub-modules corresponding one-to-one to the envelope tracking power amplifiers, multiple reconfigurable output matching sub-modules corresponding one-to-one to the envelope tracking power amplifiers, and a non-separate coupler; wherein the multiple reconfigurable input matching sub-modules are used to respectively receive different RF signals and output them to the corresponding envelope tracking power amplifiers, and the multiple reconfigurable output matching sub-modules are electrically connected to the input end of the load impedance through the non-separate coupler.
[0080] In this example, the power amplifier module includes envelope tracking power amplifiers PA1 and PA2, and the input and output ends of the two envelope tracking power amplifiers are connected to the reconfigurable input matching submodule and the reconfigurable output matching submodule respectively. In addition, the input RF signal of PA1 is RF in,a , the input RF signal of PA2 is RF in,b , where Chireix is a non-separating coupler.
[0081] As shown in Figure 6c, the power amplifier module based on the LMBA architecture includes multiple envelope tracking power amplifiers, multiple reconfigurable input matching sub-modules corresponding one-to-one to the envelope tracking power amplifiers, and multiple reconfigurable output matching sub-modules corresponding one-to-one to the envelope tracking power amplifiers; wherein, there is at least one first envelope tracking power amplifier among the multiple envelope tracking power amplifiers for receiving a first RF signal different from other envelope tracking power amplifiers, and there are multiple second envelope tracking power amplifiers among the multiple envelope tracking power amplifiers for receiving the same second RF signal; wherein, the multiple reconfigurable input matching sub-modules connected to the second envelope tracking power amplifier receive the second RF signal through a first bridge, and the multiple reconfigurable output matching sub-modules connected to the second envelope tracking power amplifier are electrically connected to the input end of the load impedance through a second bridge.
[0082] In this example, the power amplifier module includes envelope tracking power amplifiers PA1, PA2, and PA3. The input and output ends of these three envelope tracking power amplifiers are connected to the reconfigurable input matching submodule and the reconfigurable output matching submodule respectively. Among them, the input RF signal of PA1 is RF in,a The input RF signal of PA2 and PA3 is RF in,b The input end of the reconfigurable input matching submodule connected to PA2 and PA3 receives the RF signal through the first bridge. in,a ,Correspondingly, the output end of the reconfigurable output matching submodule connected to PA2 and PA3 is grounded through a bridge.
[0083] Based on the solution provided by any of the above embodiments, the at least one reconfigurable device is electrically connected to the load impedance of the target envelope tracking power amplifier.
[0084] Through the solution provided by the embodiment of the present application, the reconfigurable device in the power amplifier module can achieve optimal impedance matching of the envelope tracking power amplifier under different power levels and loads. The reconfigurable device of this solution is described below in conjunction with the basic L-type reconfigurable matching architecture shown in Figure 7.
[0085] where R L It is the load impedance of the power amplifier module. jX and jB are series reactance components and parallel reactance components respectively. When X value is positive, it represents inductance, and when X value is negative, it represents capacitance. When B value is positive, it represents capacitance, and when B value is negative, it represents inductance. Both values are adjustable. n +jb n It is the optimal impedance of the power amplifier tube under different power levels and loads.
[0086] The following formula (1-1) is satisfied in the reconfigurable input / output matching submodule shown in FIG5 :
[0087] From the above formula (1-1), X and B can be solved respectively:
[0088] From the above expressions of X and B, it can be seen that when the optimal impedance a n +jb n When changes, the values of X and B change accordingly, thereby achieving reconfigurable matching of the optimal impedance.
[0089] Optionally, the reconfigurable device includes a variable capacitor. The control module can be configured to adjust the capacitance of the variable capacitor according to the impedance control signal. The reconfigurable devices jX and jB can be implemented as reconfigurable devices such as variable capacitors, varactor diodes, and PIN diodes, without limitation.
[0090] In addition to using a single reconfigurable element to form a reconfigurable device, a combination of multiple elements can also be used to form a reconfigurable device. Optionally, the reconfigurable device includes a switch and a fixed-value capacitor electrically connected to each other. The control module can be used to adjust the on / off state of the switch based on the impedance control signal.
[0091] In practical applications, the reconfigurable function can be realized based on a single reconfigurable element or a reconfigurable element group composed of multiple elements.
[0092] Figure 8 shows a schematic diagram of a power amplifier module structure implemented using a Doherty architecture, featuring a reconfigurable input matching submodule and a reconfigurable output matching submodule. In this example, the fundamental and harmonic impedances are reconfigured under varying leakage voltages and loads by controlling the operating states of multiple PIN diodes and varactor diodes within the reconfigurable device.
[0093] Referring to FIG8 , the circuit provided in this example specifically includes: a Carry power amplifier tube (shown as C in the figure), a Peak power amplifier tube (shown as P in the figure), a Carry power amplifier tube reconfigurable input matching submodule 1, a Carry power amplifier tube reconfigurable output matching submodule 2, a Peak power amplifier tube reconfigurable input matching submodule 3, a Peak power amplifier tube reconfigurable output matching submodule 4, a Carry power amplifier tube output 1 / 4 wavelength impedance inverter 5, a Peak power amplifier tube input phase adjustment 1 / 4 wavelength transmission line 6, and a load impedance Z L .
[0094] Through the embodiments of the present application, a reconfigurable device is formed by combining a single reconfigurable element of a variable capacitance diode and multiple elements with custom capacitors connected in series with switches. A reconfigurable input / output matching submodule is applied to a multi-level ET amplifier. The power modulator and control module flexibly control the state of the reconfigurable device in the amplifier module, adjusting the load impedance to meet the efficiency impedance curve at different power levels and loads, achieving optimal load matching and enabling the amplifier to continuously operate at the optimal efficiency point under large back-off amounts. This solution can reduce transmitter energy consumption under high peak-to-average ratio signals, further achieving the goal of green energy.
[0095] Those skilled in the art will appreciate that the embodiments of the present application can be provided as methods, systems, or computer program products. Therefore, the present application can adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment in combination with software and hardware. Moreover, the present application can adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to magnetic disk storage, CD-ROM, optical storage, etc.) that contain computer-usable program code.
[0096] The present application is described with reference to the flow chart and / or block diagram of the method, device (system), and computer program product according to the embodiment of the present application. It should be understood that each flow process and / or box in the flow chart and / or block diagram and the combination of the flow process and / or box in the flow chart and / or block diagram can be realized by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processing machine or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device produce a device for realizing the function specified in one flow chart flow or multiple flows and / or one box or multiple boxes of the block diagram.
[0097] These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce a product including an instruction device that implements the functions specified in one or more processes in the flowchart and / or one or more boxes in the block diagram.
[0098] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, so that the instructions executed on the computer or other programmable device provide steps for implementing the functions specified in one or more processes in the flowchart and / or one or more boxes in the block diagram.
[0099] In a typical configuration, a computing device includes one or more processors (CPUs), input / output interfaces, network interfaces, and memory.
[0100] Memory may include non-permanent storage in a computer-readable medium, random access memory (RAM) and / or non-volatile memory in the form of read-only memory (ROM) or flash RAM. Memory is an example of a computer-readable medium.
[0101] Computer-readable media includes permanent and non-permanent, removable and non-removable media that can be implemented by any method or technology to store information. The information can be computer-readable instructions, data structures, program modules or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technology, compact disc read-only memory (CD-ROM), digital versatile disc (DVD) or other optical storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices or any other non-transmission media that can be used to store information that can be accessed by a computing device. As defined herein, computer-readable media does not include transitory computer-readable media (transitory media), such as modulated data signals and carrier waves.
[0102] It should also be noted that the terms "comprises," "includes," or any other variations thereof are intended to encompass non-exclusive inclusion, such that a process, method, commodity, or apparatus that includes a series of elements includes not only those elements but also other elements not explicitly listed, or includes elements inherent to such process, method, commodity, or apparatus. In the absence of further limitations, an element defined by the phrase "comprises a ..." does not exclude the presence of other identical elements in the process, method, commodity, or apparatus that includes the element.
[0103] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems, or computer program products. Therefore, the present application may take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Furthermore, the present application may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to magnetic disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.
[0104] The foregoing is merely an embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various changes and variations. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present application should all be included within the scope of the claims of the present application.
Claims
1. A multi-level envelope tracking power amplifier circuit, comprising: A power amplifier module, comprising at least one envelope tracking power amplifier and at least one reconfigurable device, wherein the reconfigurable device is used to adjust the output impedance value of the target envelope tracking power amplifier to a target output impedance value; A power modulator, used to adjust the operating voltage of the power amplifier module so that the target envelope tracking power amplifier is at a target operating voltage; The target output impedance value and the target operating voltage enable the operating efficiency of the target envelope tracking power amplifier to satisfy an efficiency impedance curve corresponding to the target envelope tracking power amplifier.
2. The circuit of claim 1 , further comprising: A field programmable gate array (FPGA) module is used to control the reconfigurable device to adjust the output impedance value of the target envelope tracking power amplifier to the target output impedance value according to the efficiency impedance curve, and to control the power modulator to adjust the operating voltage of the power amplifier module according to the efficiency impedance curve so that the operating efficiency of the target envelope tracking power amplifier satisfies the efficiency impedance curve corresponding to the target envelope tracking power amplifier.
3. The circuit of claim 2, further comprising: A control module is used to adjust the at least one reconfigurable device under the control of the FPGA module to adjust the output impedance value of the target envelope tracking power amplifier to the target output impedance value.
4. The circuit of claim 3, wherein: The FPGA module is also used for: An impedance control signal and a power control signal are generated according to the efficiency impedance curve, wherein the impedance control signal is used to control the reconfigurable device, and the power control signal is used to control the power modulator.
5. The circuit according to any one of claims 1 to 4, wherein: The power amplifier module includes a reconfigurable harmonic output matching submodule, a reconfigurable fundamental output matching submodule, an output drain bias module and an impedance inverter; Wherein, the input end of the reconfigurable harmonic output matching submodule, the input end of the reconfigurable fundamental output matching submodule, and the input end of the output drain bias module are all electrically connected to the output end of the target envelope tracking power amplifier; The power supply end of the output drain bias module is electrically connected to the output end of the power modulator; The output end of the reconfigurable fundamental wave output matching submodule is electrically connected to the input end of the impedance inverter; The output end of the impedance inverter is electrically connected to the input end of the load impedance of the target envelope tracking power amplifier.
6. A circuit as claimed in claim 3 or 4, wherein: The power amplifier module also includes: A reconfigurable input matching submodule is used to adjust the impedance under the control of the FPGA module so that the input impedance value of the target envelope tracking power amplifier matches the target operating voltage.
7. The circuit of claim 6, wherein: The output end of the reconfigurable input matching submodule is electrically connected to the input end of the target envelope tracking power amplifier, and the reconfigurable input matching submodule is used to receive an input radio frequency signal.
8. The circuit of claim 7, wherein: The power amplifier module is implemented based on at least one of the following architectures: Doherty architecture, Outphasing architecture, and LMBA architecture.
9. The circuit according to any one of claims 1 to 4, wherein: The at least one reconfigurable device is electrically connected to a load impedance of the target envelope tracking power amplifier.
10. The circuit of claim 9, wherein: The reconfigurable device includes a variable capacitor.
11. The circuit of claim 9, wherein: The reconfigurable device includes a switch and a fixed-value capacitor electrically connected to each other.
Citation Information
Patent Citations
Envelope tracking power amplifier with low impedance supply feed
CN103975523A
Power amplifier device with controlled envelop tracking modulator and adapted static voltage
CN105874705A
Harmonic control-based hybrid high-efficiency power amplifier and design method thereof
CN113162554A
Circuit structure of RF power amplifier is trailed to envelope
CN206099910U
Methods and apparatus for envelope tracking system
US20150236729A1