Photoelectric conversion device and photoelectric conversion system

Abstract

This photoelectric conversion device comprises a first APD, a first pulse generation circuit for generating a first pulse signal on the basis of an output from the first APD, a first switch provided between a first power supply for supplying a first voltage and one terminal of the first APD, and a second switch provided between a second power supply for supplying a second voltage and one terminal of the first APD, and is characterized in that the first APD enters a recharge state when the first switch is turned on, the first APD enters a standby state when the first switch is turned off, the first APD enters an inactive state when the second switch is turned on, and the first APD enters an active state when the second switch is turned off, wherein the period in which the first switch is on and the period in which the second switch is on are different.

Description

Photoelectric conversion device and photoelectric conversion system

[0001] The present invention relates to a photoelectric conversion device and a photoelectric conversion system.

[0002] 2. Description of the Related Art Photoelectric conversion devices having pixels each including a plurality of avalanche photodiodes (APDs) are known.

[0003] Patent Document 1 discloses an APD, a quench circuit connected to the APD, a signal control circuit to which a signal output from the APD is input, and a pulse generation circuit connected to the quench circuit and the signal control circuit. It discloses that the pulse signal generated by the pulse generation circuit controls the on / off of the quench circuit and resets the output signal of the APD, thereby outputting a pulse signal corresponding to input photons even under high brightness.

[0004] Japanese Patent Application Laid-Open No. 2020-123847

[0005] Since an APD has only one electrode for charge collection and all the charges are collected at that electrode, causing avalanche multiplication, there is a possibility that device characteristics that depend on avalanche multiplication may be degraded.

[0006] One aspect of the present invention is a photoelectric conversion device having a first avalanche photodiode, the photoelectric conversion device comprising: a first pulse generation circuit that generates a first pulse signal based on an output from the first avalanche photodiode; a first switch provided between a first power supply that supplies a first voltage and one terminal of the first avalanche photodiode; a second power supply that supplies a second voltage different from the first voltage; and a second switch provided between the first power supply and one terminal of the first avalanche photodiode, wherein turning the first switch into an on state causes the first avalanche photodiode to enter a recharge state; turning the first switch into an off state causes the first avalanche photodiode to enter a standby state; turning the second switch into an on state causes the first avalanche photodiode to enter an inactive state; and turning the second switch into an off state causes the first avalanche photodiode to enter an active state, and a period during which the first switch is in an on state and a period during which the second switch is in an on state are different from each other.

[0007] Another aspect of the present invention is a photoelectric conversion device including a first avalanche photodiode, the photoelectric conversion device comprising: a first pulse generating circuit that generates a first pulse signal based on an output from the first avalanche photodiode; a first power supply that supplies a first voltage to one terminal of the first avalanche photodiode via a first switch; a second power supply that supplies a second voltage, different from the voltage of the first power supply, to the other terminal of the first avalanche photodiode; and a third power supply that supplies a third voltage, different from the voltages of the first power supply and the second power supply, to the one terminal via a second switch, the third voltage being different from the voltages of the first power supply and the second power supply, wherein a period during which the first switch is in an on state is different from a period during which the second switch is in an on state.

[0008] By reducing the frequency of use of electrodes for charge collection, the degradation of device characteristics that depend on avalanche multiplication is suppressed.

[0009] 1 is a diagram illustrating a configuration of a photoelectric conversion device according to an embodiment; FIG. 2 is an example of an arrangement of a sensor substrate of a photoelectric conversion device according to an embodiment; FIG. 3 is an example of an arrangement of a circuit board of a photoelectric conversion device according to an embodiment; FIG. 4 is a block diagram including an equivalent circuit of a photoelectric conversion element of a photoelectric conversion device according to an embodiment; FIG. 5 is a block diagram including an equivalent circuit of a photoelectric conversion element of a photoelectric conversion device according to an embodiment; FIG. 6 is a diagram illustrating a relationship between an operation of an APD of a photoelectric conversion device according to an embodiment and an output signal; FIG. 7 is a diagram illustrating an example of a configuration of a photoelectric conversion element and a signal processing circuit according to a first embodiment; FIG. 8 is a timing chart illustrating an operation of a signal processing circuit according to the first embodiment; FIG. 9 is a timing chart illustrating an operation of a signal processing circuit according to the first embodiment; FIG. 10 is an image diagram of a photoelectric conversion element according to the first embodiment; FIG. 11 is an image diagram of a photoelectric conversion element according to the first embodiment; FIG. 12 is a cross-sectional view of a photoelectric conversion element according to a second embodiment; FIG. 13 is a potential diagram of a photoelectric conversion element according to the second embodiment; FIG. 14 is a plan view of a photoelectric conversion element according to the second embodiment; FIG. 15 is a potential diagram of a photoelectric conversion element according to the second embodiment; FIG. 16 is a cross-sectional view of a photoelectric conversion element according to a third embodiment; FIG. 17 is a cross-sectional view of a trench structure of a photoelectric conversion element according to the third embodiment; 10 is a plan view of a photoelectric conversion element according to a third embodiment. FIG. 11 is a plan view of a photoelectric conversion element according to the third embodiment. FIG. 12 is a cross-sectional view of a photoelectric conversion element according to a fourth embodiment. FIG. 13 is a plan view of a photoelectric conversion element according to the fourth embodiment. FIG. 14 is a plan view of a photoelectric conversion element according to the fourth embodiment. FIG. 15 is a conceptual diagram of a photoelectric conversion element according to a fifth embodiment. FIG. 16 is a conceptual diagram of a photoelectric conversion element according to the fifth embodiment. FIG. 17 is a conceptual diagram of a photoelectric conversion element according to the sixth embodiment. FIG. 18 is a plan view of a photoelectric conversion element according to the sixth embodiment. FIG. 19 is a functional block diagram of a photoelectric conversion system according to a seventh embodiment. FIG. 19 is a functional block diagram of a photoelectric conversion system according to an eighth embodiment. FIG. 19 is a functional block diagram of a photoelectric conversion system according to the eighth embodiment. FIG. 19 is a functional block diagram of a photoelectric conversion system according to a ninth embodiment. FIG. 20 is a functional block diagram of a photoelectric conversion system according to a tenth embodiment. FIG. 21 is a conceptual diagram of a photoelectric conversion system according to an eleventh embodiment.FIG. 22 is a conceptual diagram of a photoelectric conversion system according to an eleventh embodiment.

[0010] The embodiments shown below are intended to embody the technical concept of the present invention and are not intended to limit the present invention. The size and positional relationship of components shown in each drawing may be exaggerated for clarity. In the following description, the same components may be designated by the same reference numerals and their description may be omitted.

[0011] A configuration common to the photoelectric conversion devices of each embodiment will be described using Figures 1 to 5. The photoelectric conversion device has a SPAD pixel including an avalanche diode (APD). The conductivity type of the charge used as the signal charge among the charge pairs generated in the avalanche diode is called the first conductivity type. The first conductivity type refers to a conductivity type in which charges of the same polarity as the signal charge serve as majority carriers. The conductivity type opposite to the first conductivity type is called the second conductivity type. Below, an example will be described in which the signal charge is electrons, the first conductivity type is N-type, and the second conductivity type is P-type. However, the signal charge may also be holes, the first conductivity type is P-type, and the second conductivity type is N-type.

[0012] When the signal charge is electrons, the signal is read out from the cathode of the APD, but when the signal charge is holes, the signal is read out from the anode of the APD. Therefore, the cathode and anode of the APD have an inverse relationship.

[0013] In this specification, the term "planar view" refers to a view from a direction perpendicular to the light incident surface of the semiconductor layer on which the photoelectric conversion element described below is disposed. Furthermore, the term "cross section" refers to a surface in a direction perpendicular to the light incident surface of the semiconductor layer on which the photoelectric conversion element is disposed. Note that, when the light incident surface of the semiconductor layer is rough when viewed microscopically, the planar view is defined based on the light incident surface of the semiconductor layer when viewed macroscopically.

[0014] In the following description, the anode of the APD is held at a fixed potential, and the signal is extracted from the cathode side. Therefore, the first conductivity type semiconductor region, which has majority carriers of charges of the same polarity as the signal charge, is an N-type semiconductor region, and the second conductivity type semiconductor region, which has majority carriers of charges of a polarity opposite to that of the signal charge, is a P-type semiconductor region. The present invention also applies when the cathode of the APD is held at a fixed potential, and the signal is extracted from the anode side. In this case, the first conductivity type semiconductor region, which has majority carriers of charges of the same polarity as the signal charge, is a P-type semiconductor region, and the second conductivity type semiconductor region, which has majority carriers of charges of a polarity opposite to that of the signal charge, is an N-type semiconductor region. The following description will be given of a case where one node of the APD is held at a fixed potential, but the potentials of both nodes may fluctuate.

[0015] In this specification, when the term "impurity concentration" is simply used, it means the net impurity concentration minus the amount compensated by impurities of the opposite conductivity type. In other words, "impurity concentration" refers to the net doping concentration. A region where the concentration of P-type added impurities is higher than the concentration of N-type added impurities is a P-type semiconductor region. Conversely, a region where the concentration of N-type added impurities is higher than the concentration of P-type added impurities is an N-type semiconductor region.

[0016] First, the configuration common to each embodiment will be described.

[0017] FIG. 1 is a diagram showing the configuration of a photoelectric conversion device 100 according to an embodiment of the present invention. The following description will be given taking as an example a case where the photoelectric conversion device 100 is a stacked-type photoelectric conversion device. That is, the description will be given taking as an example a photoelectric conversion device configured by stacking and electrically connecting two substrates, a sensor substrate 11 and a circuit substrate 21. However, the photoelectric conversion device is not limited to this. For example, the photoelectric conversion device may be one in which the components included in the sensor substrate 11 and the components included in the circuit substrate are arranged on a common semiconductor layer, as described below. Hereinafter, a photoelectric conversion device in which the components included in the sensor substrate 11 and the components included in the circuit substrate are arranged on a common semiconductor layer will also be referred to as a non-stacked photoelectric conversion device.

[0018] The sensor substrate 11 has a first semiconductor layer having photoelectric conversion elements 102 (described later) and a first wiring structure. The circuit board 21 has a second semiconductor layer having circuits such as a signal processing circuit 103 (described later) and a second wiring structure. The photoelectric conversion device 100 is configured by laminating the second semiconductor layer, the second wiring structure, the first wiring structure, and the first semiconductor layer in this order.

[0019] 1 illustrates a back-illuminated photoelectric conversion device in which light is incident from a first surface and a circuit board is disposed on a second surface opposite the first surface. In the case of a non-stacked photoelectric conversion device, the surface on which the transistors of the signal processing circuit are disposed is referred to as the second surface. In the case of a back-illuminated photoelectric conversion device, the first surface opposite the second surface of the semiconductor layer serves as the light incident surface. In the case of a front-illuminated photoelectric conversion device, the second surface of the semiconductor layer serves as the light incident surface.

[0020] In the following description, the sensor substrate 11 and the circuit substrate 21 are described as diced chips, but are not limited to chips. For example, each substrate may be a wafer. Furthermore, each substrate may be stacked in the wafer state and then diced, or each chip may be stacked and bonded after being formed into chips.

[0021] The sensor substrate 11 has a pixel region 12 arranged thereon, and the circuit substrate 21 has a circuit region 22 arranged thereon for processing signals detected in the pixel region 12 .

[0022] 2 is a diagram showing an example of the arrangement of the sensor substrate 11. Pixels 101, each having a photoelectric conversion element 102 including an avalanche photodiode (hereinafter, referred to as an APD), are arranged in a two-dimensional array in a plan view to form a pixel region 12.

[0023] The pixel 101 is typically a pixel for forming an image, but when used for TOF (Time of Flight), it does not necessarily have to form an image. That is, the pixel 101 may be a pixel for measuring the time and amount of light that arrives.

[0024] 3 is a configuration diagram of the circuit board 21. It has a signal processing circuit 103 that processes the charges photoelectrically converted by the photoelectric conversion element 102 in FIG. 2, a readout circuit 112, a control pulse generation unit 115, a horizontal scanning circuit unit 111, a signal line 113, and a vertical scanning circuit unit 110.

[0025] The photoelectric conversion element 102 in FIG. 2 and the signal processing circuit 103 in FIG. 3 are electrically connected via connection wiring provided for each pixel.

[0026] The vertical scanning circuit section 110 receives the control pulses supplied from the control pulse generating section 115 and supplies the control pulses to each pixel. The vertical scanning circuit section 110 uses logic circuits such as a shift register and an address decoder.

[0027] The control pulse generation unit 115 includes a signal generation unit 215 that generates a control signal P_CLK for the switch, as described below. The signal generation unit 215 generates a pulse signal for controlling the switch, as described below. For example, as shown in FIG. 4A , the signal generation unit 215 may generate a common control signal P_CLK for multiple pixels in the pixel region. Alternatively, as shown in FIG. 4B , the signal generation unit 215 may generate a control signal P_CLK for each pixel. When generating a common pulse signal P_CLK, at least one of the period, number of pulses, and pulse width of the signal P_EXP that controls the exposure period is generated in common, corresponding to the exposure period. Furthermore, when controlling the control signal P_CLK for each pixel, a signal can be generated using both the input signal P_CLK_IN output from the control pulse generation unit 115 and the signal P_EXP that controls the exposure period. The control pulse generation unit 115 preferably includes, for example, a frequency divider circuit. This simplifies control and reduces the need for an increased number of elements.

[0028] The signal output from the photoelectric conversion element 102 of the pixel is processed by the signal processing circuit 103. The signal processing circuit 103 is provided with a counter, a memory, etc., and the memory holds digital values.

[0029] The horizontal scanning circuit unit 111 inputs a control pulse for sequentially selecting each column to the signal processing circuit 103 in order to read out the signal from the memory of each pixel in which the digital signal is held.

[0030] A signal is output to the signal line 113 from the signal processing circuit 103 of the pixel selected by the vertical scanning circuit unit 110 for the selected column.

[0031] The signal output to the signal line 113 is output via an output circuit 114 to a recording unit or a signal processing unit outside the photoelectric conversion device 100 .

[0032] 2, the photoelectric conversion elements in the pixel region may be arranged one-dimensionally. The effects of the present invention can be obtained even with a single pixel, and the case of a single pixel is also included in the present invention. However, a photoelectric conversion device having multiple pixels makes it easier to obtain the power consumption reduction effect of this embodiment. The signal processing function does not necessarily need to be provided for each photoelectric conversion element. For example, a single signal processing unit may be shared by multiple photoelectric conversion elements, and signal processing may be performed sequentially.

[0033] 2 and 3 , a plurality of signal processing circuits 103 are arranged in a region overlapping the pixel region 12 in a plan view. A vertical scanning circuit unit 110, a horizontal scanning circuit unit 111, a readout circuit 112, an output circuit 114, and a control pulse generation unit 115 are arranged so as to overlap between an end of the sensor substrate 11 and an end of the pixel region 12 in a plan view. In other words, the sensor substrate 11 has the pixel region 12 and a non-pixel region arranged around the pixel region 12. The vertical scanning circuit unit 110, the horizontal scanning circuit unit 111, the readout circuit 112, the output circuit 114, and the control pulse generation unit 115 are arranged in a region overlapping the non-pixel region in a plan view.

[0034] The arrangement of the signal lines 113, the readout circuits 112, and the output circuits 114 is not limited to that shown in Fig. 3. For example, the signal lines 113 may be arranged to extend in the row direction, and the readout circuits 112 may be arranged at the ends of the signal lines 113.

[0035] Figures 4A and 4B are examples of block diagrams including the equivalent circuits of Figures 2 and 3. Figure 4A is an example in which the signal generation unit 215 is provided in common to multiple pixels, and Figure 4B is an example in which the control signal P_CLK can be controlled for each pixel.

[0036] 4A and 4B, the photoelectric conversion element 102 having the APD 201 is provided on the sensor substrate 11, and the other members are provided on the circuit board 21.

[0037] The APD 201 generates charge pairs in response to incident light through photoelectric conversion. One of the two nodes of the APD 201 is connected to a control line (second power supply) that supplies a drive voltage VL (second voltage). The other of the two nodes of the APD 201 is connected to a control line (first power supply) that supplies a drive voltage VH (first voltage) that is higher than the voltage VL supplied to the anode. In FIGS. 4A and 4B , one node of the APD 201 is the anode, and the other node of the APD is the cathode. A reverse bias voltage is supplied to the anode and cathode of the APD 201 so that the APD 201 performs avalanche multiplication. With this voltage supplied, the charge generated by the incident light undergoes avalanche multiplication, generating an avalanche current.

[0038] When a reverse bias voltage is supplied, there are two modes: Geiger mode, in which the anode and cathode are operated at a potential difference greater than the breakdown voltage, and linear mode, in which the anode and cathode are operated at a potential difference close to or less than the breakdown voltage.

[0039] An APD operated in Geiger mode is called a SPAD. For example, the voltage VL (second voltage) is −30 V, and the voltage VH (first voltage) is 1 V. The APD 201 may be operated in either linear mode or Geiger mode. A SPAD is preferable because the potential difference is larger than that of a linear mode APD, and the effect of withstanding voltage is more pronounced.

[0040] The switch 202 is connected to a control line supplied with a drive voltage VH and the APD 201. The switch 202 is connected to one of the anode and cathode nodes of the APD. The switch 202 switches the potential difference between the anode and cathode of the APD between a first potential difference that causes avalanche multiplication and a second potential difference that does not cause avalanche multiplication. Hereinafter, switching from the second potential difference to the first potential difference is also referred to as turning on the switch 202, and switching from the first potential difference to the second potential difference is also referred to as turning off the switch 202. The switch 202 functions as a quenching element. During signal multiplication by avalanche multiplication, the switch 202 functions as a load circuit (quenching circuit) and suppresses the voltage supplied to the APD 201 to suppress avalanche multiplication (quenching operation). The switch 202 also functions to return the voltage supplied to the APD 201 to the drive voltage VH by passing a current equivalent to the voltage drop caused by the quench operation (recharge operation). In other words, the switch 202 functions as a control circuit for controlling the occurrence of avalanche multiplication in the APD 201.

[0041] 4A and 4B show a case where the switch 202 is a PMOS transistor. A control signal P_CLK for the switch 202, supplied from the signal generating unit 215, is applied to the gate electrode of the MOS transistor that constitutes the switch 202. In this embodiment, the on / off state of the switch 202 is controlled by controlling the voltage applied to the gate electrode of the switch 202.

[0042] The signal processing circuit 103 has a waveform shaping section 210, a counter circuit 211, and a selection circuit 212. In Figures 4A and 4B, the signal processing circuit 103 has the waveform shaping section 210, the counter circuit 211, and the selection circuit 212, but in this specification, it is sufficient for the signal processing circuit 103 to have at least one of the waveform shaping section 210, the counter circuit 211, and the selection circuit 212.

[0043] The waveform shaping unit 210 shapes the potential change at the cathode of the APD 201 obtained upon photon detection and outputs a pulse signal. The node on the input side of the waveform shaping unit 210 is designated nodeA, and the node on the output side is designated nodeB. The waveform shaping unit 210 changes the output potential from node nodeB depending on whether the input potential to node nodeA is equal to or higher than a predetermined value or lower. For example, in FIG. 5 , when the input potential to node nodeA is equal to or higher than a determination threshold, the output potential from node nodeB becomes low. When the input potential to node nodeA is lower than the determination threshold, the output potential from node nodeB becomes high. For example, an inverter circuit is used as the waveform shaping unit 210. While FIGS. 4A and 4B show an example in which a single inverter is used as the waveform shaping unit 210, a circuit in which multiple inverters are connected in series or another circuit with a waveform shaping effect may also be used.

[0044] It is possible to perform a quench operation and a recharge operation using the switch 202 in response to avalanche multiplication in the APD 201, but depending on the timing of photon detection, they may not be detected as an output signal. For example, assume that avalanche multiplication occurs in the APD, causing the node nodeA to go low, and a recharge operation is being performed. Generally, the decision threshold of the waveform shaping unit 210 is set to a potential higher than the potential difference at which avalanche multiplication occurs in the APD. If a photon is incident when the potential of the node nodeA is lower than the decision threshold due to the recharge operation and is at a potential at which avalanche multiplication is possible in the APD, avalanche multiplication occurs in the APD, and the voltage of nodeA drops. In other words, because the potential of nodeA drops to a voltage lower than the decision threshold, the output potential from node nodeB does not change despite the detection of a photon. Therefore, even though avalanche multiplication occurs, it is not detected as a signal. In particular, under high illuminance, photons enter continuously in a short period of time, making it difficult to determine them as a signal. As a result, even under high illuminance, the actual number of incident photons and the output signal tend to diverge.

[0045] In contrast, by applying a control signal P_CLK to the switch 202 to switch the switch 202 between its on and off states, it is possible to determine a signal even when photons continuously enter the APD in a short period of time. Fig. 5 illustrates an example in which the control signal P_CLK is a pulse signal with a repetitive cycle. In other words, Fig. 5 illustrates a configuration in which the switch 202 is switched on and off at a predetermined clock frequency. However, the effect of suppressing an increase in power consumption of a photoelectric conversion device can be obtained even if the pulse signal is not a signal with a repetitive cycle.

[0046] The counter circuit 211 counts the pulse signal output from the waveform shaping unit 210 and holds the count value. When a control pulse pRES is supplied via a drive line 213, the signal held in the counter circuit 211 is reset.

[0047] A control pulse pSEL is supplied to the selection circuit 212 from the vertical scanning circuit unit 110 in Fig. 3 via a drive line 214 (not shown in Fig. 3) in Fig. 4A and 4B, and the selection circuit 212 switches between electrical connection and disconnection between the counter circuit 211 and the signal line 113. The selection circuit 212 includes, for example, a buffer circuit for outputting a signal. The output signal OUT shown in Fig. 4A and 4B is a signal output from the pixel.

[0048] The electrical connection may be switched by disposing a switch such as a transistor between the switch 202 and the APD 201 or between the photoelectric conversion element 102 and the signal processing circuit 103. Similarly, the supply of the voltage VH or the voltage VL to the photoelectric conversion element 102 may be electrically switched using a switch such as a transistor.

[0049] In this embodiment, a configuration using the counter circuit 211 has been described. However, instead of the counter circuit 211, the photoelectric conversion device 100 may be configured to acquire pulse detection timing using a time-to-digital converter (hereinafter, referred to as TDC) and a memory. In this case, the generation timing of the pulse signal output from the waveform shaping unit 210 is converted into a digital signal by the TDC. To measure the timing of the pulse signal, a control pulse pREF (reference signal) is supplied to the TDC from the vertical scanning circuit unit 110 in FIG. 1 via a drive line. The TDC acquires, as a digital signal, a signal obtained by converting the input timing of the signal output from each pixel via the waveform shaping unit 210 into a relative time based on the control pulse pREF.

[0050] As shown in FIG. 4B , the signal generating unit 215 may be provided for each pixel. In FIG. 4B , the circuits following the waveform shaping unit 210 and the signal generating unit shown in FIG. 4A are omitted. It is assumed that the signal generating unit 215 in FIG. 4A is provided for each pixel. In FIG. 4B , a logic circuit is provided within the pixel to determine whether or not to supply a pulse signal to the switch 202. The logic circuit receives a signal P_EXP that controls the exposure period and an input signal P_CLK_IN that controls the control signal P_CLK. An inverted signal is then output. For example, when the signal P_EXP that controls the exposure period is low and the input signal P_CLK_IN is low, a high-level signal is output from the control signal P_CLK. In other words, the switch is turned off. Furthermore, when the signal P_EXP that controls the exposure period is high and the input signal P_CLK_IN is high, a low-level signal is output from the control signal P_CLK. In other words, the switch is turned on. Furthermore, when either the signal P_EXP controlling the exposure period or the input signal P_CLK_IN is at a low level, a high-level signal is output as the control signal P_CLK. In other words, the switch 202 is turned off. It is preferable to control the switch for each pixel in this manner. Note that when the circuit diagram of FIG. 4B is used, as will be described in the second embodiment below, when the exposure period P goes to a low level, the control signal P_CLK is maintained at a high level. In other words, the switch is turned off.

[0051] 5 is a diagram schematically illustrating the relationship between the control signal P_CLK of the switch, the potential of node nodeA, the potential of node nodeB, and the output signal. In this embodiment, when the control signal P_CLK is at a high level, the drive voltage VH is not easily supplied to the APD, and when the control signal P_CLK is at a low level, the drive voltage VH is supplied to the APD. The high level of the control signal P_CLK is, for example, 1 V, and the low level of the control signal P_CLK is, for example, 0 V. When the control signal P_CLK is at a high level, the switch is turned off, and when the control signal P_CLK is at a low level, the switch is turned on. The resistance value of the switch when the control signal P_CLK is at a high level is higher than the resistance value of the switch when the control signal P_CLK is at a low level. When the control signal P_CLK is at a high level, recharging is not easily performed even if avalanche multiplication occurs in the APD, so the potential supplied to the APD is a potential equal to or lower than the breakdown voltage of the APD. Therefore, the avalanche multiplication operation in the APD stops.

[0052] As shown in Figures 4A and 4B, it is preferable to configure the switch 202 using a single transistor, and to perform the quenching operation and the recharging operation using a single transistor. This makes it possible to reduce the number of circuits compared to when the quenching operation and the recharging operation are performed using different circuit elements. In particular, when each pixel has a counter circuit and the SPAD signal is read out for each pixel, it is preferable to reduce the circuit area used for the switch in order to accommodate the counter circuit, and the effect of configuring the switch 202 using a single transistor is significant.

[0053] At time t1, the control signal P_CLK changes from high to low, turning on the switch and starting the recharge operation of the APD. This causes the potential of the cathode of the APD to transition to high. Then, the potential difference between the potentials applied to the anode and cathode of the APD becomes a state in which avalanche multiplication is possible. The potential of the cathode is the same as that of node nodeA. Therefore, when the potential of the cathode transitions from low to high, the potential of node nodeA becomes equal to or greater than the determination threshold at time t2. At this time, the pulse signal output from node nodeB is inverted, transitioning from high to low. After that, a potential difference of drive voltage VH-drive voltage VL is applied to the APD 201. The control signal P_CLK transitions to high, turning off the switch.

[0054] Next, at time t3, when a photon is incident on APD 201, avalanche multiplication occurs in APD 201, and the voltage at the cathode drops. That is, the voltage at node nodeA drops. When the amount of voltage drop further increases and the voltage difference applied to APD 201 decreases, avalanche multiplication in APD 201 stops, as at time t2, and the voltage level at node nodeA does not drop by more than a certain value. When the voltage at node nodeA drops below the decision threshold, the voltage at node nodeB changes from low to high. That is, the portion of the output waveform at node nodeA that exceeds the decision threshold is waveform-shaped by waveform shaping unit 210 and output as a signal at node B. The portion is then counted by the counter circuit, and the count value of the counter signal output from the counter circuit increases by 1 LSB.

[0055] Between time t3 and time t4, photons are incident on the APD, but the switch is in the off state and the voltage applied to the APD 201 does not have a potential difference that allows avalanche multiplication, so the voltage level of node nodeA does not exceed the decision threshold.

[0056] At time t4, the control signal P_CLK changes from high to low, turning on the switch. Accordingly, a current compensating for the voltage drop from the drive voltage VH flows through node nodeA, causing the voltage at node nodeA to transition back to its original voltage level. At this time, at time t5, the voltage at node nodeA becomes equal to or greater than the determination threshold, causing the pulse signal at node nodeB to invert and transition from high to low.

[0057] At time t6, node nodeA is stabilized to its original voltage level, and the control signal P_CLK changes from low to high. Therefore, the switch is turned off. Thereafter, as described from time t1 to time t6, the potentials of the nodes and signal lines change in response to the control signal P_CLK and the incidence of photons.

[0058] The photoelectric conversion devices of the respective embodiments will be described below.

[0059] 6 to 7B, the configuration of a photoelectric conversion device and a driving method thereof according to the first embodiment will be described. In the following description, the same components are denoted by the same reference numerals, and the description will be omitted or simplified.

[0060] FIG. 6 is a diagram showing an example of the configuration of the photoelectric conversion element 102 and the signal processing circuit 103 according to the first embodiment.

[0061] In FIG. 6, the photoelectric conversion element 102 has an APD 2011 (first avalanche photodiode) and an APD 2012 (second avalanche photodiode).

[0062] Each of the APDs 2011 and 2012 generates pairs of charges in response to incident light through photoelectric conversion. One of the two nodes of the APDs 2011 and 2012 is connected to a control line that supplies a drive voltage VL (second voltage). The other of the two nodes of the APDs 2011 and 2012 is connected to a control line that supplies a drive voltage VH (first voltage) that is higher than the voltage VL supplied to the anode. A reverse bias voltage is supplied to the anodes and cathodes of the APDs 2011 and 2012 so that the APDs 2011 and 2012 perform avalanche multiplication. With this voltage supplied, charges generated by the incident light undergo avalanche multiplication, generating an avalanche current.

[0063] A PMOS transistor 2021 (first switch) serving as a switch is connected to a control line (first power supply) to which a drive voltage is supplied and one terminal of the APD 2011. Similarly, a PMOS transistor 2022 (third switch) is connected to a control line to which a drive voltage is supplied and one terminal of the APD 2012. The PMOS transistor 2021 is connected to the cathode of the APD 2011, and the PMOS transistor 2022 is connected to the cathode of the APD 2012.

[0064] Furthermore, the PMOS transistors 2021 and 2022 function as quenching elements. The PMOS transistor 2021 functions as a load circuit (quenching circuit) during signal multiplication by avalanche multiplication, suppressing the voltage supplied to the APD 2011 and suppressing avalanche multiplication (quenching operation). The PMOS transistor 2022 also functions as a load circuit during signal multiplication by avalanche multiplication, suppressing the voltage supplied to the APD 2012 and suppressing avalanche multiplication. In addition, the PMOS transistor 2021 returns the voltage supplied to the APD 2011 to the drive voltage VH by passing a current equivalent to the voltage drop caused by the quenching operation (recharge operation). The PMOS transistor 2022 also returns the voltage supplied to the APD 2012 to the drive voltage VH.

[0065] A control signal P_CLK1 for the PMOS transistor 2021, which is supplied from a signal generating unit 215 (not shown), is applied to the gate electrode of the PMOS transistor 2021. A control signal P_CLK2 for the PMOS transistor 2022 is applied to the gate electrode of the PMOS transistor 2022. In the first embodiment, the voltages applied to the gate electrodes of the PMOS transistors 2021 and 2022 are controlled to turn on and off the PMOS transistors 2021 and 2022 as switches.

[0066] The drain of an NMOS transistor 2031 (second switch) serving as a switch is connected to the cathode, which is the other terminal of the APD 2011, and the source of the NMOS transistor 2031 is grounded. The drain of an NMOS transistor 2032 (fourth switch) is connected to the cathode of the APD 2012, and the source of the NMOS transistor 2032 is grounded. In other words, a third voltage is supplied to the NMOS transistors 2031 and 2032 from a third power supply.

[0067] A PMOS transistor 2021 and an NMOS transistor 2031 are connected to the APD 2011. Both MOS transistors switch the potential difference between the anode and cathode of the APD 2011 between a first potential difference that enables avalanche multiplication and a second potential difference that does not enable avalanche multiplication. For example, assume that the voltage VL (second voltage) is −30 V, the voltage VH (first voltage) is 1 V, and the breakdown voltage of the APD 2011 is 30.5 V. When the PMOS transistor 2021 is on and the NMOS transistor 2031 is off, the reverse bias voltage supplied to the APD 2011 is VH−VL=31 V, which is greater than the breakdown voltage of 30.5 V, and therefore the APD 2011 operates as an avalanche multiplier. In this case, the first potential difference is 31 V. On the other hand, when the PMOS transistor 2021 is off and the NMOS transistor 2031 is on, the reverse bias voltage supplied to the APD 2011 is 0-VL=30 V, which is smaller than the breakdown voltage of 30.5 V. Therefore, the APD 2011 does not perform avalanche multiplication. In this case, the second potential difference is 30 V.

[0068] If the PMOS transistor 2021 and the NMOS transistor 2031 are turned on at the same time, the PMOS transistor 2021 and the NMOS transistor 2031 are shorted, causing a through current. The same occurs if the PMOS transistor 2022 and the NMOS transistor 2032 are turned on at the same time. Therefore, the PMOS transistor 2021 and the NMOS transistor 2031 are controlled so that they are not turned on at the same time. Alternatively, it is necessary to provide another switch between the voltage supply wiring and the PMOS transistor 2021 or the NMOS transistor 2031 to prevent a through current from flowing. The PMOS transistor 2022 and the NMOS transistor 2032 are controlled in the same way.

[0069] Similarly, a PMOS transistor 2022 and an NMOS transistor 2032 are connected to the APD 2012. Both MOS transistors switch the potential difference between the anode and cathode of the APD 2012 between a first potential difference that causes avalanche multiplication and a second potential difference that does not cause avalanche multiplication.

[0070] A control signal P_ACT1 for the NMOS transistor 2031, supplied from a signal generating unit 215 (not shown), is applied to the gate electrode of the NMOS transistor 2031. In the first embodiment, the voltage applied to the gate electrode of the NMOS transistor 2031 is controlled to control the on / off of the NMOS transistor 2031 as a switch. Similarly, a control signal P_ACT2 for the NMOS transistor 2032 is applied to the gate electrode of the NMOS transistor 2032.

[0071] Hereinafter, the state in which the control signal P_ACT1 turns on the NMOS transistor 2031 and the potential difference between the anode and cathode of the APD 2011 is a second potential difference that does not cause avalanche multiplication will also be referred to as inactive. On the other hand, the state in which the control signal P_ACT1 turns off the NMOS transistor 2031 and the potential difference between the anode and cathode of the APD 2011 is a first potential difference that causes avalanche multiplication will also be referred to as active.

[0072] Similarly, a state in which the control signal P_ACT2 turns on the NMOS transistor 2032 and the potential difference between the anode and cathode of the APD 2012 is a second potential difference that does not cause avalanche multiplication is also called an inactive state.A state in which the control signal P_ACT2 turns off the NMOS transistor 2032 and the potential difference between the anode and cathode of the APD 2012 is a first potential difference that causes avalanche multiplication is also called an active state.

[0073] The signal processing circuit 103 includes a waveform shaping unit 2101 , a waveform shaping unit 2102 , a counter circuit 211 , a selection circuit 212 , and an OR circuit 220 .

[0074] The waveform shaping unit 2101 shapes the potential change at the cathode of the APD 2011 obtained upon photon detection and outputs a pulse signal. The waveform shaping unit 2102 shapes the potential change at the cathode of the APD 2012 obtained upon photon detection and outputs a pulse signal. For example, inverter circuits are used as the waveform shaping unit 2101 (first pulse generation circuit) and the waveform shaping unit 2102 (second pulse generation circuit). While FIG. 6 shows an example in which a single inverter is used as the waveform shaping unit 2101 and the waveform shaping unit 2102, a circuit in which multiple inverters are connected in series or another circuit having a waveform shaping effect may also be used.

[0075] The OR circuit 220 combines the first pulse signal output from the waveform shaping unit 2101 and the second pulse signal output from the waveform shaping unit 2102 into one signal, and outputs the combined signal to the counter circuit 211. As a result, the counter circuit 211 counts the total number of photons detected by the APD 2011 and the APD 2012.

[0076] The counter circuit 211 counts the pulse signals output from the OR circuit 220 and holds the count value.

[0077] Here, the APD 2011, PMOS transistor 2021, NMOS transistor 2031, and waveform shaping unit 2101 are defined as a first pixel element. On the other hand, the APD 2012, PMOS transistor 2022, NMOS transistor 2032, and waveform shaping unit 2102 are defined as a second pixel element. In the configuration example of FIG. 6 , there are two pixel elements, but the number of pixel elements may be three or more and is not particularly limited.

[0078] Next, a method for driving the photoelectric conversion device according to the first embodiment will be described using the configuration of FIG. 6 as an example.

[0079] 4A and 4B, if the photoelectric conversion element 102 has only one APD, all charges are collected in one electrode, causing avalanche multiplication, which may degrade the device characteristics that depend on avalanche multiplication. Therefore, as shown in Figure 6, by providing one photoelectric conversion element 102 with two or more APDs and alternately or cyclically activating each APD, it is possible to suppress the degradation of the device characteristics.

[0080] As shown in Figure 6, when the photoelectric conversion element 102 has two APDs, the avalanche multiplication frequency of each APD is reduced to about half of that when there is only one APD, thereby reducing degradation of device characteristics by about two times. Also, consider a configuration (not shown) in which the photoelectric conversion element 102 further includes a third avalanche photodiode. When the photoelectric conversion element 102 has three APDs, the avalanche multiplication frequency of each APD is reduced to about one-third of that when there is only one APD, thereby reducing degradation of device characteristics by about three times. In other words, the greater the number of APDs that make up the photoelectric conversion element 102, the greater the effect of reducing degradation of device characteristics.

[0081] 7A and 7B are timing charts showing the operation of the signal processing circuit 103 according to the first embodiment.

[0082] 7A is a timing chart when the photoelectric conversion element 102 has two APDs 2011 and 2012. When the control signal P_CLK1 is at a low level, the PMOS transistor 2021 is turned on. When the control signal P_CLK2 is at a low level, the PMOS transistor 2022 is turned on. When the control signal P_ACT1 is at a high level, the NMOS transistor 2031 is turned on. When the control signal P_ACT2 is at a high level, the NMOS transistor 2032 is turned on. The control signals P_CLK1, P_CLK2, P_ACT1, and P_ACT2 are at a high level when, for example, each signal is 1 V. The control signals P_CLK1, P_CLK2, P_ACT1, and P_ACT2 are at a low level when, for example, each signal is 0 V.

[0083] When the control signals P_CLK1 and P_CLK2 are at a low level, the drive voltage VH is supplied to the APDs 2011 and 2012, and a recharge operation is performed. When the control signals P_ACT1 and P_ACT2 are at a high level, the ground voltage is supplied to the APDs 2011 and 2012, and they are in an inactive state.

[0084] 7A, during the period from time t1 to time t2, the control signal P_ACT1 is at a low level, and the APD 2011 is in an active state. Furthermore, one cycle of the control signal P_CLK1 is input, and one photon can be counted during this period. Meanwhile, the control signal P_ACT2 is at a high level, and the APD 2012 is in an inactive state.

[0085] During the period from time t2 to time t3, the control signal P_ACT2 is at a low level, and the APD 2012 is in an active state. Furthermore, one cycle of the control signal P_CLK2 is input, and one photon can be counted during this period. Meanwhile, the control signal P_ACT1 is at a high level, and the APD 2011 is in an inactive state.

[0086] Thereafter, the APD 2011 and the APD 2012 are alternately put into the active state by the control signal P_ACT1 and the control signal P_ACT2, thereby making it possible to suppress deterioration of the device characteristics.

[0087] If the PMOS transistor 2021 and the NMOS transistor 2031 are turned on at the same time, the PMOS transistor 2021 and the NMOS transistor 2031 are shorted, causing a through current. Therefore, the low level period of the control signal P_CLK1 and the high level period of the control signal P_ACT1 are controlled so as not to overlap.

[0088] At time t1, the control signal P_ACT1 transitions to low level, turning off the NMOS transistor 2031 and activating the APD 2011. By synchronizing the timing and transitioning the control signal P_CLK1 to low level, the APD 2011 performs a recharge operation.

[0089] At time t2, the control signal P_ACT1 transitions to high level, turning on the NMOS transistor 2031 and putting the APD 2011 into an inactive state, while the control signal P_CLK1 remains at high level.

[0090] After time t3, the same control is repeated so that the low level period of the control signal P_CLK1 and the high level period of the control signal P_ACT1 do not overlap.

[0091] Similarly, if the PMOS transistor 2022 and the NMOS transistor 2032 are turned on at the same time, the PMOS transistor 2022 and the NMOS transistor 2032 are shorted, causing a through current. Therefore, the low level period of the control signal P_CLK2 and the high level period of the control signal P_ACT2 are controlled so as not to overlap.

[0092] At time t1, the control signal P_ACT2 transitions to high level, turning on the NMOS transistor 2032 and putting the APD 2012 into an inactive state, while the control signal P_CLK2 remains at high level.

[0093] At time t2, the control signal P_ACT2 transitions to low level, turning off the NMOS transistor 2032 and activating the APD 2012. By synchronizing the timing and transitioning the control signal P_CLK2 to low level, the APD 2012 performs a recharge operation.

[0094] After time t3, the same control is repeated to prevent the low-level period of the control signal P_CLK2 from overlapping with the high-level period of the control signal P_ACT2. In other words, a first period in which the APD 2011 is in a standby state and an active state is followed by a second period in which the APD 2012 is in a standby state and an active state, and the first period is resumed after the second period, in a cyclical manner.

[0095] FIG. 7B is a timing chart for the case where the photoelectric conversion element 102 has three APDs and two cycles of the control signal P_CLK are input during one active period.

[0096] 7B , during the period from time t1 to time t2, the control signal P_ACT1 is at a low level, and the APDs connected to the NMOS transistors controlled by the control signal P_ACT1 are in an active state. Furthermore, the control signal P_CLK1 is input for two periods, allowing two photons to be counted during this period. Meanwhile, the control signals P_ACT2 / 3 are at a high level, and each APD connected to each NMOS transistor controlled by the control signals P_ACT2 / 3 is in an inactive state.

[0097] During the period from time t2 to time t3, the control signal P_ACT2 is at a low level, and the APDs connected to the NMOS transistors controlled by the control signal P_ACT2 are in an active state. Furthermore, two periods of the control signal P_CLK2 are input, allowing two photons to be counted during this period. Meanwhile, the control signals P_ACT1 / 3 are at a high level, and the APDs connected to the NMOS transistors controlled by the control signals P_ACT1 / 3 are in an inactive state.

[0098] During the period from time t3 to time t4, the control signal P_ACT3 is at a low level, and the APDs connected to the NMOS transistors controlled by the control signal P_ACT3 are in an active state. Furthermore, two cycles of the control signal P_CLK3 are input, and two photons can be counted during this period. Meanwhile, the control signals P_ACT1 / 2 are at a high level, and each APD connected to each NMOS transistor controlled by the control signals P_ACT1 / 2 is in an inactive state.

[0099] Thereafter, the APDs are cyclically set to the active state by the control signals P_ACT1 / 2 / 3, thereby suppressing degradation of the device characteristics. Note that the order of setting the APDs to the active state may be the control signal P_ACT1, the control signal P_ACT2, and the control signal P_ACT3, or the order may be the control signal P_ACT1, the control signal P_ACT3, and the control signal P_ACT2.

[0100] 7B , the number of pixel elements in the first embodiment may be three or more, and is not particularly limited. Furthermore, the number of cycles of the control signal P_CLK input during one active period may be one cycle or two or more cycles.

[0101] As described above, in the first embodiment, the photoelectric conversion element 102 is configured with two or more APDs, and the APDs are alternately or cyclically activated, thereby making it possible to suppress deterioration of device characteristics.

[0102] 8A to 12, the configuration of a photoelectric conversion device and a driving method thereof according to a second embodiment will be described. In the following description, the same components will be denoted by the same reference numerals, and the description thereof may be omitted.

[0103] In the first embodiment, a photoelectric conversion device was described in which the photoelectric conversion element 102 is composed of two or more APDs, and the APDs are alternately or cyclically activated. In this case, light incident on an area where an inactive APD exists cannot be detected, resulting in lower sensitivity compared to when all APDs are always activated.

[0104] 8A and 8B are conceptual diagrams showing the decrease in sensitivity when the photoelectric conversion element 102 is configured with four APDs and is cyclically set to the active state.

[0105] 8A is a plan view of a pixel 101 showing how each APD is cyclically activated in the order of APD1, APD2, APD3, and APD4, starting from the top left APD and moving clockwise. The white areas indicate the active areas of the pixel 101, and the gray areas indicate the inactive areas of the pixel 101. Charges photoelectrically converted in the inactive areas are not avalanche-multiplied and therefore cannot be detected as photons. In other words, the sensitivity of the pixel 101 is approximately one-quarter lower than when all four APDs are activated.

[0106] 8B is a plan view of a pixel 101 showing APD1, APD2, APD3, and APD4 in a constantly active state. Because there is no inactive region, the possibility of missing a photon is lower than in the case of FIG. 8A, and the sensitivity is about four times higher than when each of the four APDs is in an active state. On the other hand, in the case of FIG. 8B, the power consumption due to avalanche multiplication is also about four times higher than in the case of FIG. 8A, and the degradation rate of the device characteristics of each APD is also about four times higher.

[0107] Here, a case where the configuration in Fig. 6 is operated by the drive in Fig. 8B will be described. Consider a case where the APD 2011 and APD 2012 are always in an active state and photons are detected by both the APD 2011 and APD 2012. The OR circuit 220 takes the logic of the pulse signals output from the waveform shaping units 2101 and 2102, and outputs it as a single signal to the counter circuit 211. Therefore, photons detected by each APD are not counted multiple times.

[0108] 8A and 8B are merely conceptual diagrams, and it is not necessarily the case that all light incident on the active regions shown in white undergoes avalanche multiplication after photoelectric conversion, and that light incident on the inactive regions shown in gray does not undergo avalanche multiplication at all after photoelectric conversion. In reality, the midpoint of each APD is approximately the potential peak, and photons within the region surrounded by the peaks gather at each APD and undergo avalanche multiplication.

[0109] FIG. 9 is a cross-sectional view taken along a direction perpendicular to the surface of the substrate, cutting two pixels of the photoelectric conversion element 102 of the photoelectric conversion device according to the second embodiment.

[0110] The structure and function of the photoelectric conversion element 102 will be described. The photoelectric conversion element 102 has an N-type first semiconductor region 311, a fourth semiconductor region 314, a sixth semiconductor region 316, and a seventh semiconductor region 317. It also includes a P-type second semiconductor region 312, a third semiconductor region 313, and a fifth semiconductor region 315.

[0111] In the second embodiment, in the cross section shown in Fig. 9, an N-type first semiconductor region 311 is formed near the surface facing the light incident surface, and an N-type seventh semiconductor region 317 is formed around it. A P-type second semiconductor region 312 is formed at a position overlapping the first semiconductor region 311 and the seventh semiconductor region 317 in a planar view, thereby constituting an APD. An N-type fourth semiconductor region 314 is further disposed at a position overlapping the second semiconductor region 312 in a planar view, and an N-type sixth semiconductor region 316 is formed around it. The cross section shown in Fig. 9 shows cross sections of two APDs per photoelectric conversion element 102.

[0112] The first semiconductor region 311 constituting the APD has a higher N-type impurity concentration than the fourth semiconductor region 314 and the seventh semiconductor region 317. A PN junction is formed between the P-type second semiconductor region 312 and the N-type first semiconductor region 311. By making the impurity concentration of the second semiconductor region 312 lower than that of the first semiconductor region 311, the entire second semiconductor region 312 becomes a depletion layer region. Furthermore, this depletion layer region extends to a portion of the first semiconductor region 311, and a strong electric field is induced in the extended depletion layer region. This strong electric field causes avalanche multiplication in the depletion layer region extending to the portion of the first semiconductor region 311, and a current based on the multiplied charges is output as signal charges. Light incident on the photoelectric conversion element 102 is photoelectrically converted, and when avalanche multiplication occurs in this depletion layer region, the generated first conductivity type charges are collected in the first semiconductor region 311.

[0113] 9, the fourth semiconductor region 314 and the seventh semiconductor region 317 are formed to have approximately the same size, but the size of each semiconductor region is not limited to this. For example, the fourth semiconductor region 314 may be formed to be larger than the seventh semiconductor region 317 so that charges can be collected in the first semiconductor region 311 from a wider range.

[0114] The pixels of the photoelectric conversion element are separated by a pixel separation portion 324 having a trench structure, and a P-type fifth semiconductor region 315 formed around the pixel separation portion 324 separates adjacent photoelectric conversion elements by a potential barrier. Because the photoelectric conversion elements are also separated by the potential of the fifth semiconductor region 315, a trench structure such as the pixel separation portion 324 is not required as a pixel separation portion. Furthermore, even when the pixel separation portion 324 is provided, its depth and position are not limited to the configuration shown in FIG. 9 . The pixel separation portion 324 may be a deep trench isolation (DTI) that penetrates the semiconductor layer, or a DTI that does not penetrate the semiconductor layer. Metal may be embedded in the DTI to improve light-blocking performance. The pixel separation portion 324 may be configured to surround the entire periphery of the photoelectric conversion element in a planar view, or may be configured only on the opposite side of the photoelectric conversion element, for example. Meanwhile, no insulating separation portion such as a trench structure is provided between the APDs provided in each pixel.

[0115] A pinning film 321, a planarizing film 322, and a microlens 323 are further formed on the light incident surface side of the semiconductor layer. A filter layer (not shown) may also be disposed on the light incident surface side. The filter layer may be any of various optical filters such as a color filter, an infrared light cut filter, or a monochrome filter. The color filter may be an RGB color filter, an RGBW color filter, or the like.

[0116] FIG. 10 is a potential diagram per 1 APD of the photoelectric conversion element 102 shown in FIG.

[0117] The dotted line 70 in Fig. 10 indicates the potential distribution of the line segment FF' in Fig. 9, and the solid line 71 in Fig. 10 indicates the potential distribution of the line segment EE' in Fig. 9. Fig. 10 shows the potential as seen from the perspective of electrons, which are the main carrier charges in the N-type semiconductor region. If the main carrier charges are holes, the relationship between high and low potentials is reversed. Furthermore, depth A in Fig. 10 corresponds to height A in Fig. 9. Similarly, depth B corresponds to height B, depth C corresponds to height C, and depth D corresponds to height D, respectively.

[0118] 10, the potential height of the solid line 71 at depth A is A1, the potential height of the dotted line 70 is A2, the potential height of the solid line 71 at depth B is B1, and the potential height of the dotted line 70 is B2. Also, the potential height of the solid line 71 at depth C is C1, the potential height of the dotted line 70 is C2, and the potential height of the solid line 71 at depth D is D1, and the potential height of the dotted line 70 is D2.

[0119] 9 and 10, the potential height of the first semiconductor region 311 corresponds to A1, and the potential height near the center of the second semiconductor region 312 corresponds to B1. In addition, the potential height of the seventh semiconductor region 317 corresponds to A2, and the potential height of the outer edge of the second semiconductor region 312 corresponds to B2.

[0120] 10 , the potential gradually decreases from depth D to depth C. Then, the potential gradually increases from depth C to depth B, and the potential reaches the B2 level at depth B. Furthermore, the potential decreases from depth B to depth A, and reaches the A2 level at depth A.

[0121] On the other hand, with respect to the solid line 71, the potential gradually decreases from depth D to depth C and from depth C to depth B, reaching a B1 level at depth B. Then, the potential sharply decreases from depth B to depth A, reaching a A1 level at depth A. At depth D, the potentials of the dotted line 70 and the solid line 71 are approximately the same height, and in the regions indicated by the line segments EE' and FF', there is a potential gradient that gradually decreases toward the second surface side of the semiconductor layer 301. Therefore, charges generated in the photodetector move toward the second surface side due to the gentle potential gradient.

[0122] Here, in the avalanche diode of the second embodiment, the P-type second semiconductor region 312 has a lower impurity concentration than the N-type first semiconductor region 311, and potentials are supplied to the first semiconductor region 311 and the second semiconductor region 312 such that they are reverse biased to each other. As a result, a depletion layer region is formed on the side of the second semiconductor region 312. With this structure, the second semiconductor region 312 acts as a potential barrier for charges photoelectrically converted in the fourth semiconductor region 314, making it easier for the charges to be collected in the first semiconductor region 311.

[0123] 9 shows the second semiconductor region 312 formed over the entire surface of the photoelectric conversion element. However, for example, the second semiconductor region 312 may not be provided in the portion overlapping the first semiconductor region 311 in a plan view, and a slit through which the fourth semiconductor region 314 extends may be formed. In this case, due to a potential difference between the second semiconductor region 312 and the slit portion, the potential decreases from the line segment FF' to the line segment EE' at depth C in FIG. 9 . As a result, during the process of movement of charges photoelectrically converted in the fourth semiconductor region 314, the charges tend to move toward the first semiconductor region 311. On the other hand, when the second semiconductor region 312 is formed over the entire surface as shown in FIG. 9 , the applied voltage required to obtain a strong electric field necessary for avalanche multiplication can be lowered compared to when a slit is formed, and noise due to the formation of a localized strong electric field region can be suppressed.

[0124] The charges that have moved to the vicinity of the second semiconductor region 312 are accelerated by the steep potential gradient from depth B to depth A of the solid line 71 in FIG. 10, that is, by the strong electric field, and are avalanche multiplied.

[0125] 9 and the P-type second semiconductor region 312, i.e., from depth B to depth A of the dotted line 70 in FIG. 10, the potential distribution is such that avalanche multiplication does not occur. Therefore, the charge generated in the fourth semiconductor region 314 can be counted as signal charge without increasing the area of ​​the strong electric field region (avalanche multiplication region) relative to the size of the photodiode. Note that, although the seventh semiconductor region 317 has been described so far as having an N-type conductivity, it may also be a P-type semiconductor region as long as its concentration satisfies the above-mentioned potential relationship.

[0126] Furthermore, the charges photoelectrically converted in the second semiconductor region 312 flow into the fourth semiconductor region 314 due to the potential gradient from depth B to depth C of the dotted line 70 in FIG. 10. For the reasons described above, the fourth semiconductor region 314 has a structure in which the charges easily move to the second semiconductor region 312. Therefore, the charges photoelectrically converted in the second semiconductor region 312 move to the first semiconductor region 311 and are detected as signal charges by avalanche multiplication. Therefore, the fourth semiconductor region 314 is sensitive to the charges photoelectrically converted in the second semiconductor region 312.

[0127] 10 indicates the cross-sectional potential of the line segment FF' in FIG. 9. In the dotted line 70, the intersection of the height A and the line segment FF' in FIG. 9 is designated as A2, the intersection of the height B and the line segment FF' is designated as B2, the intersection of the height C and the line segment FF' is designated as C2, and the intersection of the height D and the line segment FF' is designated as D2. Electrons photoelectrically converted in the fourth semiconductor region 314 in FIG. 9 move along the potential D2 to C2 in FIG. 10, but the area from C2 to B2 forms a potential barrier for the electrons, making it impossible for them to overcome it. Therefore, the electrons move to the center of the fourth semiconductor region 314 in FIG. 9, indicated by the line segment EE'. The migrated electrons move along the potential gradient from C1 to B1 in FIG. 10, are avalanche-multiplied by the steep potential gradient from B1 to A1, and are detected as signal charges after passing through the first semiconductor region 311.

[0128] 9 moves along the potential gradient from potential B2 to C2 in FIG. 10. Then, as described above, the charge moves to the vicinity of the center of the fourth semiconductor region 314 shown by the line segment EE' in FIG. 9. The charge is then avalanche-multiplied by the steep potential gradient from B1 to A1. The avalanche-multiplied charge passes through the first semiconductor region 311 and is then detected as signal charge.

[0129] 11A and 11B are pixel plan views of two pixels of the photoelectric conversion element 102 of the photoelectric conversion device according to the second embodiment. Fig. 11A is a plan view seen from the surface opposite to the light incident surface, and Fig. 11B is a plan view seen from the light incident surface side. Fig. 9 can be said to be a cross-sectional view taken along line HH' in Fig. 11A.

[0130] 11A and 11B , the first semiconductor region 311, the fourth semiconductor region 314, and the seventh semiconductor region 317 are circular and arranged concentrically. This structure has the effect of suppressing local electric field concentration at the edge of the strong electric field region between the first semiconductor region 311 and the second semiconductor region 312, thereby reducing DCR. The shape of each semiconductor region is not limited to a circle, and may be, for example, a polygon with its center of gravity aligned.

[0131] Using the potential diagram in Figure 12, we will explain a method of guiding photocharges detected in an area where an inactive APD exists to an active APD to suppress a decrease in sensitivity. A solid line 71 in Figure 12 shows the potential distribution of the line segment EE' in Figure 9, and a dotted line 72 in Figure 12 shows the potential distribution of the line segment GG' in Figure 9. Here, we will explain the case where a potential is applied to the cathode so that the APD depicted on the line segment EE' is in the active state, and a potential is applied to the cathode so that the APD depicted on the line segment GG' is in the inactive state. The solid line 71 in Figure 12 is equivalent to the solid line 71 in Figure 10.

[0132] 12, the potential height of the solid line 71 at depth A is A1, the potential height of the dotted line 72 is A3, the potential height of the solid line 71 at depth B is B1, and the potential height of the dotted line 72 is B3. Also, the potential height of the solid line 71 at depth C is C1, the potential height of the dotted line 72 is C3, and the potential height of the solid line 71 at depth D is D1, and the potential height of the dotted line 72 is D3.

[0133] 12 , the potential gradually decreases from depth D to depth C and from depth C to depth B, reaching a B1 level at depth B. The potential then sharply decreases from depth B to depth A, reaching a A1 level at depth A. At depth D, the potentials of dotted line 72 and solid line 71 are approximately the same height, and in the regions indicated by line segments EE' and GG', there is a potential gradient that gradually decreases toward the second surface of semiconductor layer 301. Therefore, charges generated in the photodetector move toward the second surface due to the gentle potential gradient.

[0134] Here, by appropriately adjusting the impurity concentrations of the first semiconductor region 311 and the second semiconductor region 312, the presence or absence of a potential barrier at depth B can be controlled by the potential applied to the cathode. With respect to the dotted line 72 in Figure 12, if a lower potential is applied to the cathode of the APD on line segment GG' than to the cathode on line segment EE', the potential on line segment GG' gradually decreases from depth D to depth C. Then, the potential gradually increases from depth C to depth B, and at depth B, the potential reaches level B3. Furthermore, the potential decreases from depth B to depth A, and reaches level A3 at depth A.

[0135] Electrons photoelectrically converted in the fourth semiconductor region 314 located on the line segment GG' in FIG. 9 move along the potential D3 to C3 in FIG. 12, but are unable to overcome the potential barrier from C3 to B3. Therefore, the electrons move toward the fourth semiconductor region 314 located on the line segment EE' in FIG. 9. The electrons move along the potential gradient from C1 to B1 in FIG. 12, are avalanche-multiplied by the steep potential gradient from B1 to A1, pass through the first semiconductor region 311, and are detected as signal charges. In other words, photocharges generated near an inactive APD can also be guided to an active APD by utilizing the potential barrier, thereby suppressing a decrease in sensitivity.

[0136] As described above, in the second embodiment, the photocharges detected in the region where the inactive APDs exist are guided to the active APDs, thereby making it possible to suppress a decrease in sensitivity.

[0137] 13 to 15B, the configuration of a photoelectric conversion device according to the third embodiment will be described. In the following description, components common to the first and second embodiments will be denoted by the same reference numerals, and their description may be omitted.

[0138] FIG. 13 is a cross-sectional view taken along a direction perpendicular to the surface of the substrate, cutting two pixels of the photoelectric conversion element 102 of the photoelectric conversion device according to the third embodiment.

[0139] In the photoelectric conversion device according to this embodiment, a trench-based uneven structure 325 is formed on the surface of the semiconductor layer on the light incident side. The uneven structure 325 is surrounded by a P-type third semiconductor region 313 and scatters light incident on the photoelectric conversion element 102. Because the incident light travels obliquely within the photoelectric conversion element, an optical path length equal to or greater than the thickness of the semiconductor layer 301 can be ensured, and light with longer wavelengths can be photoelectrically converted compared to a case where the uneven structure 325 is not provided. Furthermore, the uneven structure 325 prevents reflection of incident light within the substrate, thereby improving the photoelectric conversion efficiency of incident light.

[0140] The fourth semiconductor region 314 and the uneven structure 325 are formed so as to overlap in a planar view. The area where the fourth semiconductor region 314 and the uneven structure 325 overlap in a planar view is larger than the area of ​​the portion of the fourth semiconductor region 314 that does not overlap with the uneven structure 325. Charges generated at a position far from the avalanche multiplication region formed between the first semiconductor region 311 and the fourth semiconductor region 314 take longer to travel to the avalanche multiplication region than charges generated at a position close to the avalanche multiplication region. This may result in worsening timing jitter. By arranging the fourth semiconductor region 314 and the uneven structure 325 so as to overlap in a planar view, the electric field deep in the photodiode can be increased, and the collection time of charges generated at a position far from the avalanche multiplication region can be shortened, thereby reducing timing jitter.

[0141] Furthermore, the third semiconductor region 313 three-dimensionally covers the concave-convex structure 325, thereby suppressing the generation of thermally excited charges at the interface of the concave-convex structure 325. This suppresses the DCR (Dark Count Rate) of the photoelectric conversion element 102.

[0142] FIG. 14 is an enlarged cross-sectional view of two of the trenches forming the concave-convex structure 325 of the photovoltaic device according to the third embodiment.

[0143] The trench structure is composed of a material different from that of the third semiconductor region 313. For example, if the third semiconductor region 313 is silicon, the main components constituting the trench structure are a silicon oxide film or a silicon nitride film, but metals or organic materials may also be included. The trench is formed, for example, to a depth of 0.1 to 0.6 μm from the surface of the semiconductor layer. To sufficiently enhance the diffraction effect of incident light, it is desirable that the trench depth be greater than the trench width. Here, the trench width refers to the width from the interface between the pinning film 321 and the third semiconductor region 313 to the interface between the pinning film 321 and the third semiconductor region 313 on a plane passing through the center of gravity of the trench cross section. The trench depth refers to the depth from the light incident surface of the semiconductor layer 301 to the bottom of the trench.

[0144] 14 indicates one period of the concave-convex structure 325 formed by a plurality of trenches. The distance from the center of gravity of one trench in the concave-convex structure 325 to the center of gravity of another trench adjacent to the trench in the cross-sectional view is defined as the period of the concave-convex structure 325, and the average of the periods of the concaves and convexes of the entire concave-convex structure 325 is defined as the effective period.

[0145] The trench formation process will be described below. First, a groove is formed in the third semiconductor region 313 of the semiconductor layer 301 by etching. Then, a pinning film 321 is formed on the surface of the third semiconductor region 313 and inside the trench by a method such as chemical vapor deposition. The inside of the trench covered with the pinning film 321 is filled with a filling material 332. The trench forming the concave-convex structure 325 can be filled using the same process as the trench forming the pixel separating portion 324. In this case, the sidewall of the trench forming the concave-convex structure 325 and the sidewall of the trench forming the pixel separating portion 324 will have the same impurity concentration.

[0146] The filling member 332 has voids 331 therein. Because the refractive index of the voids 331 is lower than the refractive index of the filling member 332, an optical path difference occurs between light that passes through the voids and light that passes through other parts. Compared to when no voids are provided in the filling member, the refractive index difference throughout the uneven structure 325 is greater, and the phase difference generated in light that passes through the uneven structure 325 is also greater, making it easier to strengthen the diffraction of incident light. In other words, providing voids in the filling member increases the intensity of incident light at a specific phase, resulting in the effect of improving sensitivity. Note that the filling member 332 does not necessarily have to have voids 331 therein.

[0147] 15A and 15B are pixel plan views of two pixels of the photoelectric conversion element 102 of the photoelectric conversion device according to the third embodiment. Fig. 15A is a plan view seen from the surface opposite to the light incident surface, and Fig. 15B is a plan view seen from the light incident surface side. Fig. 13 can be said to be a cross-sectional view taken along line II' in Fig. 15A.

[0148] 15B , the uneven structure 325 is formed in a lattice shape in a plan view. The uneven structure 325 is formed to overlap the first semiconductor region 311 and the fourth semiconductor region 314. However, the bottom of the trench at the intersection is located closer to the light incident surface than half the thickness of the semiconductor layer 301. Here, the trench depth is the depth from the second surface to the bottom, and can also be referred to as the depth of the recess of the uneven structure 325.

[0149] As described above, in the third embodiment, the uneven structure 325 scatters light incident on the photoelectric conversion element 102. Since the incident light travels obliquely inside the photoelectric conversion element, an optical path length equal to or greater than the thickness of the semiconductor layer 301 can be ensured, and light with a longer wavelength can be photoelectrically converted compared to a case where the uneven structure 325 is not provided.

[0150] 16 to 17B, the configuration of a photoelectric conversion device according to the fourth embodiment will be described. In the following description, components common to the first to third embodiments will be assigned the same reference numerals, and descriptions thereof may be omitted.

[0151] 16 is a cross-sectional view taken along a line perpendicular to the surface of the substrate, cutting two pixels of the photoelectric conversion element 102 of the photoelectric conversion device according to the fourth embodiment. The difference from the third embodiment is that a microlens 323 and a concavo-convex structure 325 are formed on each of the multiple APDs in each pixel.

[0152] 17A and 17B are pixel plan views of two pixels of the photoelectric conversion element 102 of the photoelectric conversion device according to the fourth embodiment.

[0153] Fig. 17A is a plan view seen from the surface opposite to the light incident surface, and Fig. 17B is a plan view seen from the light incident surface side. Fig. 16 can be said to be a cross-sectional view taken along line JJ' in Fig. 17A.

[0154] 17B, ​​the photoelectric conversion element 102 in each pixel is composed of four APDs, and each APD is formed with a microlens 323 and a concave-convex structure 325. The center of gravity of the concave-convex structure 325 is contained within the avalanche multiplication region in plan view.

[0155] When four microlenses 323 are formed in each pixel, light can be collected with a higher curvature even with the same lens thickness compared to when one microlens 323 is formed in each pixel. This allows light to be collected in an area closer to the avalanche multiplication area, thereby improving the response speed of photon detection.

[0156] 18A to 18C, a method for driving a photoelectric conversion device according to the fifth embodiment will be described. In the following description, the same reference numerals will be used to designate components common to the first to fourth embodiments, and the description thereof may be omitted.

[0157] 8A and 8B, when the photoelectric conversion element 102 is configured with two or more APDs and the APDs are alternately or cyclically activated, a reduction in sensitivity can become a problem as a side effect. However, increasing the number of APDs activated in order to suppress the reduction in sensitivity increases power consumption and accelerates the deterioration of device characteristics. In other words, there is a trade-off between sensitivity, power consumption, and device characteristics.

[0158] In the driving method of the photoelectric conversion device according to the fifth embodiment, the arrangement and number of active and inactive APDs in one pixel are changed over time. Figures 18A, 18B, and 18C are conceptual diagrams showing three examples in which the photoelectric conversion element 102 is configured with four APDs and driven in six cycles. The white areas indicate the active areas of the pixel 101, and the gray areas indicate the inactive areas of the pixel 101.

[0159] 18A shows six patterns of active and inactive regions repeated in one cycle from time t1 to time t2. In the patterns shown in Fig. 18A, the ratio of the time each APD is in the active state is 12 / 24 (= 1 / 2) compared to Fig. 8B, where each APD is always in the active state.

[0160] In this case, the sensitivity, power consumption due to avalanche multiplication, and degradation rate of device characteristics are all roughly doubled compared to the case of Fig. 8A where the ratio of time that each APD is in an active state is 1 / 4 when each APD is in a constantly active state. Also, compared to the case of Fig. 8B where four APDs are in a constantly active state, the sensitivity, power consumption due to avalanche multiplication, and degradation rate of device characteristics are all roughly 1 / 2.

[0161] 8B, the sensitivity is known to be approximately 1 / 2 times lower than in the case of FIG. 8B, and therefore, the decrease in sensitivity may be corrected by multiplying the count value of the counter circuit 211 by the reciprocal of the sensitivity, 2 / 1, in a subsequent process (not shown). In other words, the count value may be corrected according to the ratio of the period during which each APD is set to the standby state and the active state to the exposure period.

[0162] 18B shows six patterns of active and inactive regions repeated in one cycle from time t1 to time t2. In FIG. 18B, the ratio of the time each APD is in the active state is 16 / 24 (= 2 / 3) compared to the case of FIG. 8B where each APD is always in the active state.

[0163] In this case, compared to the case of Fig. 8A where the ratio of time that each APD is in an active state is 1 / 4 when each APD is in a constantly active state, the deterioration rates of the sensitivity, power consumption, and device characteristics are all approximately 2 / 3 ÷ 1 / 4 = 8 / 3 times faster.Furthermore, compared to the case of Fig. 8B where four APDs are in a constantly active state, the deterioration rates of the sensitivity, power consumption, and device characteristics are all approximately 2 / 3 ÷ 1 = 2 / 3 times faster.

[0164] It is known that the sensitivity is approximately 2 / 3 times higher than in the case of Figure 8B, so the decrease in sensitivity may be corrected by multiplying the count value of the counter circuit 211 by its reciprocal, 3 / 2, in a subsequent process not shown.

[0165] 18C shows six patterns of active and inactive regions repeated in one cycle from time t1 to time t2. In FIG. 18C, the ratio of time each APD is in the active state is 8 / 24 (= 1 / 3) compared to FIG. 8B, where each APD is always in the active state.

[0166] In this case, compared to the case of Fig. 8A where the ratio of time that each APD is in an active state is 1 / 4, the deterioration rates of the sensitivity, power consumption, and device characteristics are all approximately 1 / 3 ÷ 1 / 4 = 4 / 3 times.Furthermore, compared to the case of Fig. 8B where four APDs are always in an active state, the deterioration rates of the sensitivity, power consumption, and device characteristics are all approximately 1 / 3 ÷ 1 = 1 / 3 times.

[0167] It is known that the sensitivity is approximately 1 / 3 times lower than in the case of Figure 8B, so the decrease in sensitivity may be corrected by multiplying the count value of the counter circuit 211 by its reciprocal, 3 / 1, in a subsequent process not shown.

[0168] As described above, in the fifth embodiment, the arrangement and number of active and inactive APDs within one pixel can be changed over time, thereby improving the flexibility in setting sensitivity, power consumption, and device characteristics. This allows the photoelectric conversion device to be driven appropriately depending on which of sensitivity, power consumption, and device characteristics is prioritized. Furthermore, a decrease in sensitivity can be suppressed by correcting the count value of the counter circuit 211 through post-processing (not shown).

[0169] 8A and 8B in the second embodiment, a reduction in sensitivity can become a problem as a side effect of configuring the photoelectric conversion element 102 with two or more APDs and alternately or cyclically activating the APDs. In the method for driving a photoelectric conversion device in the sixth embodiment, in use cases where the impact of sensitivity reduction is small, the APDs are alternately or cyclically activated, thereby suppressing degradation of device characteristics.

[0170] An example of an electronic device to which the photoelectric conversion device 100 is applied is a digital camera. Digital cameras are known to have an AE (Automatic Exposure) function that automatically adjusts exposure so that a captured image is appropriately bright regardless of the brightness of the subject. To realize this function, a subsequent process (not shown) acquires subject brightness information, such as an integrated pixel value, from the photoelectric conversion device 100.

[0171] In this embodiment, the photoelectric conversion device 100 is driven using a similar concept. If a subsequent process (not shown) acquires information about the brightness of the subject and determines that the current frame has high illuminance, saturation is likely to occur even when capturing images at low sensitivity. Therefore, degradation of device characteristics is suppressed by alternately or cyclically activating each APD in the next frame. On the other hand, if the current frame is not determined to have high illuminance, all APDs are controlled to be in the active state to detect all incident photons.

[0172] Alternatively, feedforward control may be performed to determine whether or not each APD is alternately or cyclically activated depending on the photographing conditions of the digital camera, such as the standby mode, F-number, and ISO sensitivity.

[0173] When in standby mode, the photoelectric conversion device 100 is not capturing images, and there is no effect from a decrease in sensitivity. By alternately or cyclically putting each APD into an active state, deterioration of the device characteristics is suppressed.

[0174] When the F-number is small, the illuminance is likely to be high, and there is a high possibility that the counter will become saturated even when shooting at low sensitivity. Therefore, by alternately or cyclically putting each APD into an active state, deterioration of the device characteristics is suppressed.

[0175] Similarly, when the ISO sensitivity is low, the situation is one of high illumination, and there is a high possibility that the counter will become saturated even if shooting is performed at low sensitivity. Therefore, by alternately or cyclically putting each APD into an active state, deterioration of the device characteristics is suppressed.

[0176] As described above, in use cases where the effect of sensitivity degradation is small, deterioration of device characteristics can be suppressed by alternately or cyclically activating each APD.

[0177] Sixth Embodiment A sixth embodiment will be described with reference to FIGS. 19A and 19B.

[0178] In the above-described embodiments, each pixel of the photoelectric conversion element 102 includes multiple APDs. In the photoelectric conversion element 102 according to this embodiment, each pixel includes one APD. In this embodiment, power consumption is reduced by activating the avalanche diodes of pixels included in a first region of the imaging region of the photoelectric conversion device 100 and deactivating the avalanche photodiodes of pixels included in a second region. Here, the first region may be, for example, a region illuminated by light (e.g., the center of the imaging region), and the second region may be, for example, a region less illuminated by light that is closer to the periphery of the imaging region than the first region. The operation of each APD in the photoelectric conversion device according to this embodiment is similar to that described in any of the first to fifth embodiments.

[0179] 19A and 19B are schematic diagrams showing the distribution of light incident on the pixel region 12 and the distribution of the active / inactive states of the photoelectric conversion elements 102 within the pixel region 12. FIG. 19A shows the light distribution, and FIG. 19B shows which photoelectric conversion elements 102 are maintained in the active state or the inactive state. Light is particularly likely to be incident on the central portion of the pixel region 12, and light is less likely to be incident on the outer periphery. In this embodiment, power consumption can be reduced by controlling so that only the photoelectric conversion elements 102 in the region where light is incident are in the active state.

[0180] Seventh Embodiment A photoelectric conversion system according to this embodiment will be described with reference to Fig. 20. Fig. 20 is a block diagram showing a schematic configuration of the photoelectric conversion system according to this embodiment.

[0181] The photoelectric conversion device described in the above embodiment can be applied to various photoelectric conversion systems. Examples of applicable photoelectric conversion systems include digital still cameras, digital camcorders, surveillance cameras, copiers, fax machines, mobile phones, vehicle-mounted cameras, and observation satellites. Also included in the photoelectric conversion system is a camera module equipped with an optical system such as a lens and an imaging device. Figure 22 illustrates a block diagram of a digital still camera as an example of such a system.

[0182] 20 includes an image pickup device 1004, which is an example of a photoelectric conversion device, and a lens 1002 that forms an optical image of a subject on the image pickup device 1004. The photoelectric conversion system further includes an aperture 1003 that adjusts the amount of light passing through the lens 1002, and a barrier 1001 that protects the lens 1002. The lens 1002 and aperture 1003 form an optical system that focuses light on the image pickup device 1004. The image pickup device 1004 is a photoelectric conversion device according to any of the above embodiments, and converts the optical image formed by the lens 1002 into an electrical signal.

[0183] The photoelectric conversion system includes a signal processing unit 1007, which is an image generation unit that generates an image by processing an output signal output from an imaging device 1004. The signal processing unit 1007 performs various corrections and compressions as necessary to output image data. The signal processing unit 1007 may be formed in the same semiconductor layer as the imaging device 1004, or may be formed in a different semiconductor layer from the imaging device 1004. Furthermore, the imaging device 1004 and the signal processing unit 1007 may be formed in the same semiconductor layer.

[0184] The photoelectric conversion system further includes a memory unit 1010 for temporarily storing image data, and an external interface unit (external I / F unit) 1013 for communicating with an external computer or the like. The photoelectric conversion system further includes a recording medium 1012 such as a semiconductor memory for recording or reading out image data, and a recording medium control interface unit (recording medium control I / F unit) 1011 for recording or reading out data from the recording medium 1012. The recording medium 1012 may be built into the photoelectric conversion system or may be detachable.

[0185] The photoelectric conversion system further includes an overall control / calculation unit 1009 that performs various calculations and controls the entire digital still camera, and a timing generation unit 1008 that outputs various timing signals to the image capture device 1004 and the signal processing unit 1007. Here, timing signals and the like may be input from outside, and the photoelectric conversion system only needs to include at least the image capture device 1004 and the signal processing unit 1007 that processes the output signal output from the image capture device 1004.

[0186] The imaging device 1004 outputs an imaging signal to the signal processing unit 1007. The signal processing unit 1007 performs predetermined signal processing on the imaging signal output from the imaging device 1004 and outputs image data. The signal processing unit 1007 generates an image using the imaging signal.

[0187] As described above, according to this embodiment, it is possible to realize a photoelectric conversion system to which the photoelectric conversion device (image pickup device) according to any one of the above embodiments is applied.

[0188] Eighth Embodiment A photoelectric conversion system and a moving object according to this embodiment will be described with reference to Fig. 21A and Fig. 21B. Fig. 21A and Fig. 21B are diagrams showing the configurations of the photoelectric conversion system and the moving object according to this embodiment.

[0189] FIG. 21A illustrates an example of a photoelectric conversion system for an in-vehicle camera. The photoelectric conversion system 2300 includes an image capture device 2310. The image capture device 2310 is the photoelectric conversion device described in any of the above embodiments. The photoelectric conversion system 2300 also includes an image processing unit 2312 that performs image processing on multiple pieces of image data acquired by the image capture device 2310. The photoelectric conversion system 2300 also includes a parallax acquisition unit 2314 that calculates parallax (phase difference between parallax images) from the multiple pieces of image data acquired by the photoelectric conversion system 2300. The photoelectric conversion system 2300 also includes a distance acquisition unit 2316 that calculates the distance to an object based on the calculated parallax, and a collision determination unit 2318 that determines whether or not there is a possibility of a collision based on the calculated distance. Here, the parallax acquisition unit 2314 and the distance acquisition unit 2316 are examples of distance information acquisition means that acquire distance information to an object. That is, distance information may be acquired using not only the phase difference but also ToF (Time Of Flight) technology. The collision determination unit 2318 may determine the possibility of a collision using any of these distance information. The distance information acquisition means may be realized by dedicated hardware or a software module. Furthermore, it may be realized by an FPGA (Field Programmable Gate Array), an ASIC (Application Specific Integrated Circuit), or the like, or a combination thereof.

[0190] The photoelectric conversion system 2300 is connected to a vehicle information acquisition device 2320 and can acquire vehicle information such as vehicle speed, yaw rate, and steering angle. The photoelectric conversion system 2300 is also connected to a control ECU 2330, which is a control device (control unit) that outputs a control signal to generate a braking force for the vehicle based on the determination result of the collision determination unit 2318. The photoelectric conversion system 2300 is also connected to an alarm device 2340 that issues an alarm to the driver based on the determination result of the collision determination unit 2318. For example, if the determination result of the collision determination unit 2318 indicates a high collision possibility, the control ECU 2330 performs vehicle control to avoid the collision and mitigate damage by applying the brakes, releasing the accelerator, suppressing engine output, etc. The alarm device 2340 warns the user by sounding an alarm, displaying alarm information on the screen of a car navigation system, etc., or vibrating the seat belt or steering wheel.

[0191] In this embodiment, the surroundings of the vehicle, for example, the front or rear, are imaged by the photoelectric conversion system 2300. Fig. 21B shows the photoelectric conversion system when imaging the area in front of the vehicle (imaging range 2350). A vehicle information acquisition device 2320 sends instructions to the photoelectric conversion system 2300 or the imaging device 2310. This configuration can further improve the accuracy of distance measurement.

[0192] Although the above describes an example of control to prevent collision with other vehicles, the present invention can also be applied to control of automatic driving by following other vehicles, control of automatic driving to prevent deviation from a lane, etc. Furthermore, the photoelectric conversion system is not limited to vehicles such as the subject vehicle, but can be applied to moving bodies (moving devices) such as ships, aircraft, and industrial robots. In addition, the present invention can be applied not only to moving bodies but also to a wide range of devices that use object recognition, such as intelligent transport systems (ITS).

[0193] Ninth Embodiment A photoelectric conversion system according to this embodiment will be described with reference to Fig. 22. Fig. 22 is a block diagram showing an example of the configuration of a range image sensor that is a photoelectric conversion system.

[0194] 22, the distance image sensor 1401 is configured to include an optical system 1402, a photoelectric conversion device 1403, an image processing circuit 1404, a monitor 1405, and a memory 1406. The distance image sensor 1401 receives light (modulated light or pulsed light) that is projected toward the subject from a light source device 1411 and reflected from the surface of the subject, thereby obtaining a distance image according to the distance to the subject.

[0195] The optical system 1402 is configured to have one or more lenses, and guides image light (incident light) from an object to the photoelectric conversion device 1403 , forming an image on the light receiving surface (sensor portion) of the photoelectric conversion device 1403 .

[0196] The photoelectric conversion device 1403 is the photoelectric conversion device described in the above-mentioned embodiment, and a distance signal indicating the distance determined from the light receiving signal output from the photoelectric conversion device 1403 is supplied to the image processing circuit 1404.

[0197] The image processing circuit 1404 performs image processing to construct a distance image based on the distance signal supplied from the photoelectric conversion device 1403. The distance image (image data) obtained by this image processing is then supplied to a monitor 1405 for display, or supplied to a memory 1406 for storage (recording).

[0198] In the range image sensor 1401 configured in this way, by applying the above-described photoelectric conversion device, it is possible to obtain, for example, a more accurate range image as the pixel characteristics improve.

[0199] Tenth Embodiment A photoelectric conversion system according to this embodiment will be described with reference to Fig. 23. Fig. 23 is a diagram showing an example of the schematic configuration of an endoscopic surgery system, which is the photoelectric conversion system according to this embodiment.

[0200] 23 shows an operator (doctor) 1131 performing surgery on a patient 1132 on a patient bed 1133 using an endoscopic surgery system 1103. As shown in the figure, the endoscopic surgery system 1103 is composed of an endoscope 1100, a surgical tool 1110, and a cart 1134 on which various devices for endoscopic surgery are mounted.

[0201] The endoscope 1100 is composed of a lens barrel 1101, a region of a predetermined length from the tip of which is inserted into a body cavity of a patient 1132, and a camera head 1102 connected to the base end of the lens barrel 1101. In the illustrated example, the endoscope 1100 is configured as a so-called rigid lens barrel having a rigid lens barrel 1101, but the endoscope 1100 may also be configured as a so-called flexible lens barrel having a flexible lens barrel.

[0202] An opening into which an objective lens is fitted is provided at the tip of the lens barrel 1101. A light source device 1203 is connected to the endoscope 1100, and light generated by the light source device 1203 is guided to the tip of the lens barrel 1101 by a light guide extending inside the lens barrel 1101, and is irradiated via the objective lens toward an observation target inside a body cavity of a patient 1132. The endoscope 1100 may be a direct-viewing endoscope, an oblique-viewing endoscope, or a side-viewing endoscope.

[0203] An optical system and a photoelectric conversion device are provided inside the camera head 1102, and light reflected from an observation object (observation light) is focused onto the photoelectric conversion device by the optical system. The observation light is photoelectrically converted by the photoelectric conversion device to generate an electrical signal corresponding to the observation light, i.e., an image signal corresponding to the observation image. The photoelectric conversion device may be the photoelectric conversion device described in the above-described embodiment. The image signal is transmitted to a camera control unit (CCU) 1135 as RAW data.

[0204] The CCU 1135 is configured with a CPU (CentraL Processing Unit), a GPU (Graphics Processing Unit), etc., and comprehensively controls the operations of the endoscope 1100 and the display device 1136. Furthermore, the CCU 1135 receives an image signal from the camera head 1102 and performs various types of image processing on the image signal, such as development processing (demosaic processing), to display an image based on the image signal.

[0205] Under the control of the CCU 1135 , the display device 1136 displays an image based on the image signal that has been subjected to image processing by the CCU 1135 .

[0206] The light source device 1203 is configured from a light source such as an LED (Light Emitting Diode), and supplies the endoscope 1100 with irradiation light when photographing an operation site or the like.

[0207] The input device 1137 is an input interface for the endoscopic surgery system 1103. A user can input various information and instructions to the endoscopic surgery system 1103 via the input device 1137.

[0208] The treatment tool control device 1138 controls the driving of the energy treatment tool 1112 for cauterizing tissue, incising, sealing blood vessels, or the like.

[0209] The light source device 1203, which supplies illumination light to the endoscope 1100 when photographing the surgical site, can be configured from a white light source formed, for example, by an LED, a laser light source, or a combination of these. When the white light source is configured from a combination of RGB laser light sources, the output intensity and output timing of each color (each wavelength) can be controlled with high precision, allowing the light source device 1203 to adjust the white balance of the captured image. In this case, it is also possible to time-share images corresponding to each RGB by irradiating the object of observation with laser light from each RGB laser light source in a time-division manner and controlling the drive of the image sensor of the camera head 1102 in synchronization with the irradiation timing. This method allows color images to be obtained without providing a color filter to the image sensor.

[0210] Furthermore, the light source device 1203 may be controlled to change the intensity of light it outputs at predetermined time intervals. By controlling the driving of the image sensor of the camera head 1102 in synchronization with the timing of the change in light intensity to acquire images in a time-division manner and combining the images, it is possible to generate an image with a high dynamic range that is free from so-called blocked-up shadows and blown-out highlights.

[0211] The light source device 1203 may also be configured to provide light in a predetermined wavelength band corresponding to special light observation. Special light observation utilizes, for example, the wavelength dependence of light absorption in body tissue. Specifically, by irradiating light with a narrower band than the light (i.e., white light) used during normal observation, a specific tissue, such as a blood vessel on the surface of a mucous membrane, can be imaged with high contrast. Alternatively, special light observation may involve fluorescence observation, in which an image is obtained using fluorescence generated by irradiating excitation light. Fluorescence observation may involve irradiating excitation light onto a body tissue and observing the fluorescence from the body tissue, or by locally injecting a reagent such as indocyanine green (ICG) into the body tissue and irradiating the body tissue with excitation light corresponding to the fluorescent wavelength of the reagent to obtain a fluorescent image. The light source device 1203 may be configured to provide narrow-band light and / or excitation light corresponding to such special light observation.

[0212] Eleventh Embodiment A photoelectric conversion system according to this embodiment will be described with reference to FIGS. 24A and 24B . FIG. 24A is a diagram showing an example of the configuration of glasses 1600 (smart glasses) that are a photoelectric conversion system. The glasses 1600 include a photoelectric conversion device 1602. The photoelectric conversion device 1602 is the photoelectric conversion device described in the twelfth embodiment. A display device including a light-emitting device such as an OLED or LED may be provided on the rear surface of the lens 1601. The photoelectric conversion device 1602 may be one or more. A combination of multiple types of photoelectric conversion devices may also be used. The arrangement position of the photoelectric conversion device 1602 is not limited to that shown in FIG. 24A .

[0213] The glasses 1600 further include a control device 1603. The control device 1603 functions as a power source that supplies power to the photoelectric conversion device 1602 and the display device. The control device 1603 also controls the operations of the photoelectric conversion device 1602 and the display device. The lens 1601 is formed with an optical system for focusing light onto the photoelectric conversion device 1602.

[0214] FIG. 24B illustrates glasses 1610 (smart glasses) according to one application example. The glasses 1610 include a control device 1612, which is equipped with a photoelectric conversion device corresponding to the photoelectric conversion device 1602 and a display device. A lens 1611 includes an optical system for projecting light emitted from the photoelectric conversion device and the display device, and an image is projected onto the lens 1611. The control device 1612 functions as a power source for supplying power to the photoelectric conversion device and the display device, and controls the operation of the photoelectric conversion device and the display device. The control device may include a gaze detection unit for detecting the gaze of the wearer. Infrared light may be used for gaze detection. The infrared light emitter emits infrared light toward the eyeball of a user gazing at a displayed image. An imaging unit with a light-receiving element detects the reflected light of the emitted infrared light from the eyeball, thereby obtaining an image of the eyeball. A reduction unit for reducing light from the infrared light emitter to the display unit in a planar view reduces degradation of image quality.

[0215] The gaze of the user relative to the displayed image is detected from an image of the eyeball obtained by capturing infrared light. Any known method can be used for gaze detection using the image of the eyeball. As an example, a gaze detection method based on the Purkinje image formed by reflection of irradiated light on the cornea can be used.

[0216] More specifically, gaze detection processing is performed based on the pupil-corneal reflex method, which calculates a gaze vector representing the direction (rotation angle) of the eyeball based on the pupil image and Purkinje image included in the captured image of the eyeball, thereby detecting the user's gaze.

[0217] The display device of this embodiment may have a photoelectric conversion device having a light receiving element, and may control the image displayed on the display device based on information on the user's line of sight from the photoelectric conversion device.

[0218] Specifically, the display device determines a first field of view area where the user gazes and a second field of view area other than the first field of view area based on the line-of-sight information. The first field of view area and the second field of view area may be determined by a control device of the display device, or may be determined by an external control device and received. In the display area of ​​the display device, the display resolution of the first field of view area may be controlled to be higher than the display resolution of the second field of view area. In other words, the resolution of the second field of view area may be lower than that of the first field of view area.

[0219] The display area may include a first display area and a second display area different from the first display area, and a high-priority area may be determined from the first display area and the second display area based on line-of-sight information. The first field of view area and the second field of view area may be determined by a control device of the display device, or may be determined by an external control device and received. The resolution of the high-priority area may be controlled to be higher than the resolution of areas other than the high-priority area. In other words, the resolution of an area with a relatively low priority may be lowered.

[0220] Note that AI may be used to determine the first field of view area or the area with high priority. The AI ​​may be a model configured to estimate the angle of gaze and the distance to an object in the line of sight from the image of the eyeball, using as training data an image of the eyeball and the direction in which the eyeball in the image was actually looking. The AI ​​program may be included in the display device, the photoelectric conversion device, or an external device. If included in the external device, it is transmitted to the display device via communication.

[0221] When display control is performed based on visual recognition detection, the present invention is preferably applied to smart glasses that further include a photoelectric conversion device for capturing images of the outside world. The smart glasses can display captured external information in real time.

[0222] The above-described embodiments can be modified as appropriate without departing from the scope of the technical concept. Furthermore, examples in which part of the configuration of one embodiment is added to another embodiment, or examples in which part of the configuration of another embodiment is replaced with another embodiment, are also included in the embodiments of the present invention.

[0223] The disclosure of the present embodiment also includes the following configurations and methods.

[0224] (Configuration 1) A photoelectric conversion device including a first APD, the photoelectric conversion device comprising: a first pulse generating circuit that generates a first pulse signal based on an output from the first APD; a first power supply that supplies a first voltage to one terminal of the first APD via a first switch; a second power supply that supplies a second voltage different from the voltage of the first power supply to the other terminal of the first APD; and a third power supply that supplies a third voltage different from the voltages of the first power supply and the second power supply to the one terminal via a second switch. The photoelectric conversion device is characterized in that a period during which the first switch is in an on state is different from a period during which the second switch is in an on state.

[0225] (Configuration 2) The photoelectric conversion device according to Configuration 1, wherein the first APD is placed in a recharge state by turning on the first switch, and is placed in a standby state by turning off the first switch, the first APD is placed in an inactive state by turning on the second switch, and is placed in an active state by turning off the second switch.

[0226] (Configuration 3) A photoelectric conversion device having a first APD, the photoelectric conversion device further comprising: a first pulse generating circuit that generates a first pulse signal based on an output from the first APD; a first switch provided between a first power supply that supplies a first voltage and one terminal of the first APD; a second power supply that supplies a second voltage different from the first voltage; and a second switch provided between the first power supply and the one terminal of the first APD. Turning the first switch on places the first APD in a recharge state, and turning the first switch off places the first APD in a standby state. Turning the second switch on places the first APD in an inactive state, and turning the second switch off places the first APD in an active state. The photoelectric conversion device is characterized in that a period during which the first switch is on is different from a period during which the second switch is on.

[0227] (Configuration 4) A photoelectric conversion device having a second APD, further comprising: a second pulse generating circuit that generates a second pulse signal based on an output from the second APD; a third switch provided between a first power supply that supplies a first voltage and one terminal of the second APD; a second power supply that supplies a second voltage different from the first voltage; and a fourth switch provided between the first terminal and the second APD. Turning the third switch on places the second APD in a recharge state, and turning the third switch off places the second APD in a standby state. Turning the fourth switch on places the second APD in an inactive state, and turning the fourth switch off places the second APD in an active state. The photoelectric conversion device according to Configuration 3, wherein a period during which the third switch is on is different from a period during which the fourth switch is on.

[0228] (Configuration 5) The photoelectric conversion device according to Configuration 2 or 4, wherein a first period during which the first APD is in the standby state and the active state is followed by a second period during which the second APD is in the standby state and the active state, and the second switch and the fourth switch are cyclically controlled so that the first period is resumed after the second period.

[0229] (Configuration 6) The photoelectric conversion device according to Configuration 5, wherein each of the first APD and the second APD includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, and a third semiconductor region of the first conductivity type to which signal charges are transferred from the first semiconductor region. A reverse bias voltage is applied to the second semiconductor region and the third semiconductor region for avalanche multiplication of the signal charges. The photoelectric conversion device according to Configuration 5 further includes control means for transferring the signal charges to the third semiconductor region of the first APD or the second APD set to the active state.

[0230] (Configuration 7) The photoelectric conversion device according to configuration 6, wherein the control means is the second switch.

[0231] (Configuration 8) The photoelectric conversion device according to any one of configurations 5 to 7, wherein whether or not to perform the control is set in accordance with photographing conditions.

[0232] (Configuration 9) The photoelectric conversion device according to any one of Configurations 2 or 4 to 8, further comprising a counter that counts the pulse signals generated by a first pulse generation circuit, and correcting a count value of the counter in accordance with a ratio of a period during which the first APD is set to the standby state and the active state to an exposure period for acquiring one image.

[0233] (Configuration 10) The photoelectric conversion device according to any one of Configurations 2 and 4 to 9, further comprising a third APD.

[0234] (Configuration 11) The photoelectric conversion device according to any one of Configurations 2 and 4 to 10, further comprising a first pixel and a second pixel, and a separation portion between the first pixel and the second pixel.

[0235] (Configuration 12) The photoelectric conversion device according to configuration 11, wherein no insulating separation section is provided between the first APD and the second APD.

[0236] (Configuration 13) The photoelectric conversion device according to any one of Configurations 1 to 12, wherein the second switch is a switch that switches the voltage applied to the first APD to a voltage higher than a breakdown voltage of the first APD or a voltage equal to or lower than the breakdown voltage.

[0237] (Configuration 14) The photoelectric conversion device according to any one of Configurations 2 and 4 to 13, further comprising an imaging region in which a plurality of pixels are arranged in a two-dimensional array, wherein the first APDs of pixels included in a first region of the imaging region are controlled to be in the active state, and the second APDs of pixels included in a second region of the imaging region are controlled to be in the inactive state, specifically by controlling the second switch and the fourth switch.

[0238] (Configuration 15) A photoelectric conversion system comprising: the photoelectric conversion device according to any one of configurations 1 to 14; and a signal processing unit that generates an image using a signal output from the photoelectric conversion device.

[0239] (Configuration 16) A moving body including the photoelectric conversion device according to any one of Configurations 1 to 14, further comprising a control unit that controls movement of the moving body using a signal output by the photoelectric conversion device.

[0240] The present invention is not limited to the above-described embodiments, and various modifications and variations can be made without departing from the spirit and scope of the present invention. Therefore, the following claims are appended to apprise the public of the scope of the present invention.

[0241] This application claims priority based on Japanese Patent Application No. 2023-106781, filed on June 29, 2023, the entire contents of which are incorporated herein by reference.

[0242] 2011 APD 2012 APD 2101 Waveform shaping unit 2102 Waveform shaping unit 2021 PMOS transistor 2022 PMOS transistor 2031 NMOS transistor 2032 NMOS transistor

Claims

1. A photoelectric conversion device including a first avalanche photodiode, comprising: a first pulse generating circuit that generates a first pulse signal based on an output from the first avalanche photodiode; a first power supply that supplies a first voltage to one terminal of the first avalanche photodiode via a first switch; a second power supply that supplies a second voltage different from the voltage of the first power supply to the other terminal of the first avalanche photodiode; and a third power supply that supplies a third voltage different from the voltages of the first power supply and the second power supply to the one terminal via a second switch, wherein a period during which the first switch is in an on state is different from a period during which the second switch is in an on state.

2. The photoelectric conversion device according to claim 1, characterized in that the first avalanche photodiode is placed in a recharge state by turning on the first switch, the first avalanche photodiode is placed in a standby state by turning off the first switch, the first avalanche photodiode is placed in an inactive state by turning on the second switch, and the first avalanche photodiode is placed in an active state by turning off the second switch.

3. A photoelectric conversion device having a first avalanche photodiode, comprising: a first pulse generating circuit that generates a first pulse signal based on an output from the first avalanche photodiode; a first switch provided between a first power supply that supplies a first voltage and one terminal of the first avalanche photodiode; a second switch provided between a second power supply that supplies a second voltage different from the first voltage and the one terminal of the first avalanche photodiode; the first switch is turned on to place the first avalanche photodiode in a recharge state; the first switch is turned off to place the first avalanche photodiode in a standby state; the second switch is turned on to place the first avalanche photodiode in an inactive state; and the second switch is turned off to place the first avalanche photodiode in an active state; and a period during which the first switch is turned on and a period during which the second switch is turned on are different.

4. A photoelectric conversion device having a second avalanche photodiode, comprising: a second pulse generating circuit that generates a second pulse signal based on an output from the second avalanche photodiode; a third switch provided between a first power supply that supplies a first voltage and one terminal of the second avalanche photodiode; a second power supply that supplies a second voltage different from the first voltage, and a fourth switch provided between the first power supply and the one terminal of the second avalanche photodiode, wherein the second avalanche photodiode is placed in a recharge state by turning on the third switch, the second avalanche photodiode is placed in a standby state by turning off the third switch, the second avalanche photodiode is placed in an inactive state by turning on the fourth switch, and the second avalanche photodiode is placed in an active state by turning off the fourth switch, and a period during which the third switch is in an on state and a period during which the fourth switch is in an on state are different.

5. The photoelectric conversion device described in claim 4, characterized in that the second switch and the fourth switch are cyclically controlled so that after a first period during which the first avalanche photodiode is in the standby state and the active state, a second period during which the second avalanche photodiode is in the standby state and the active state occurs, and after the second period, the first period occurs again.

6. The photoelectric conversion device according to claim 5, wherein each of the first avalanche photodiode and the second avalanche photodiode comprises a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, and a third semiconductor region of the first conductivity type to which signal charges are moved from the first semiconductor region, a reverse bias voltage for avalanche multiplication of the signal charges is applied to the second semiconductor region and the third semiconductor region, and the device has control means for moving the signal charges to the third semiconductor region of the first avalanche photodiode or the second avalanche photodiode set to the active state.

7. The photoelectric conversion device according to claim 6, wherein said control means is said second switch.

8. The photoelectric conversion device according to claim 5, wherein whether or not said control is performed is set according to shooting conditions.

9. A photoelectric conversion device as described in claim 2 or claim 4, characterized in that it has a counter that counts the pulse signal generated by a first pulse generating circuit, and corrects the count value of the counter in accordance with the ratio of the period during which the first avalanche photodiode is set to the standby state and the active state to the exposure period for acquiring one image.

10. A photoelectric conversion device according to claim 2 or 4, further comprising a third avalanche photodiode.

11. The photoelectric conversion device according to claim 4, characterized in that the photoelectric conversion device has a first pixel and a second pixel, and has a separation section between the first pixel and the second pixel.

12. The photoelectric conversion device according to claim 11, wherein no insulating separation section is provided between the first avalanche photodiode and the second avalanche photodiode.

13. The photoelectric conversion device described in claim 1, characterized in that the second switch is a switch that switches the voltage applied to the first avalanche photodiode to a voltage higher than the breakdown voltage of the first avalanche photodiode or a voltage lower than the breakdown voltage.

14. The photoelectric conversion device of claim 4, further comprising an imaging area in which a plurality of pixels are arranged in a two-dimensional array, the second switch and the fourth switch being controlled so that the first avalanche photodiode of a pixel included in a first area of ​​the imaging area is brought into the active state, and the second avalanche photodiode of a pixel included in a second area of ​​the imaging area is brought into the inactive state.

15. The photoelectric conversion device according to claim 14, wherein the second region is located on the outer periphery of the imaging region relative to the first region.

16. A photoelectric conversion system comprising: a photoelectric conversion device according to any one of claims 1 to 15; and a signal processing unit that generates an image using a signal output by the photoelectric conversion device.

17. A moving body including a photoelectric conversion device according to any one of claims 1 to 15, characterized in that the moving body has a control unit that controls the movement of the moving body using a signal output by the photoelectric conversion device.

Images