Access method and access apparatus

Abstract

The embodiments of the present application relate to the technical field of computers. Provided are an access method and an access apparatus, which solve the problems of poor scalability and low performance when server nodes access data with each other. The specific solution involves: according to a first virtual address, determining an address of a second server node corresponding to the first virtual address, wherein the first virtual address is an address carried by an access request acquired by a first server node (S501); and if the address of the second server node is a second virtual address, sending the access request to the second virtual address, wherein the second virtual address is a shared virtual address of the first server node and the second server node (S502). The embodiments of the present application are used in the process of mutual data access between server nodes.

Description

Access method and access device

[0001] This application claims priority to the Chinese patent application filed with the State Intellectual Property Office on July 5, 2023, with application number 202310831471.6 and application name “Access Method and Access Device”, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The embodiments of the present application relate to the field of computer technology, and in particular to an access method and an access device. Background Art

[0003] Distributed systems or computer clusters typically consist of multiple server nodes, interconnected by high-speed links. To fully utilize the computing power of multiple server nodes in a distributed system or computer cluster, a computational task is typically split into multiple subtasks, distributed to different server nodes for computation, and then the results of each subtask are aggregated.

[0004] Computing tasks typically run as processes. The address spaces of processes deployed on different server nodes are isolated, and the operating systems (OS) on different server nodes are also isolated from each other. Therefore, efficiently, simply, securely, and reliably aggregating inter-process computation results is a significant challenge.

[0005] Summary of the Invention

[0006] The embodiments of the present application provide an access method and an access device. By dividing a shared virtual address space for a first server node and a second server node, they can safely and reliably use the shared virtual address to access each other, thereby solving the problems of poor scalability and low performance of existing implementation methods.

[0007] To achieve the above objectives, the embodiments of the present application adopt the following technical solutions.

[0008] In a first aspect, an embodiment of the present application provides an access method, the method comprising: determining the address of a second server node corresponding to the first virtual address based on a first virtual address, the first virtual address being the address carried in the access request obtained by the first server node; if the address of the second server node is a second virtual address, sending an access request to the second virtual address, the second virtual address being a shared virtual address of the first server node and the second server node.

[0009] Therefore, if the address of the second server node is a shared virtual address, such as the second virtual address, it indicates that the address of the second server node can be shared and accessed by other server nodes, such as the first server node. Compared with the existing technology that requires complex packet processing or transmission through the protocol stack, it is more efficient and has better performance. In addition, the embodiment of the present application uses a shared virtual address, which is independent of the topology of the server nodes, and is more flexible in expansion compared to the existing technology.

[0010] In addition, the correspondence between the first virtual address and the address of the second server node can be stored in the physical memory of the first server node. Accessing the physical memory of the first server node is more efficient than accessing a remote physical memory.

[0011] In one possible design, determining the address of the second server node corresponding to the first virtual address based on the first virtual address includes: determining the virtual physical address corresponding to the first virtual address based on the first virtual address, where the virtual physical address is the address of the virtual space of the first server node; and determining the address of the second server node corresponding to the virtual physical address based on the virtual physical address. Based on this, the virtual space corresponding to the virtual physical address can be divided in the first server node, where the virtual space can be much larger than the space of the local physical address, thereby expanding the physical memory space accessible to the first server node.

[0012] In a possible design, the correspondence between the first virtual address and the virtual physical address is stored in a server node page table, and the correspondence between the virtual physical address and the address of the second server node is stored in a bus page table.

[0013] In this design, the server node page table and the bus page table can be stored in the local physical memory of the first server node. When performing address translation, the first server node can improve efficiency and performance by reading the page table in the local physical memory.

[0014] In one possible design, the page table entry lengths of the server node page table and the bus page table are different. By setting different page table entry lengths, the number of page table entries can be reduced, reducing the physical memory overhead of the first server node and improving table lookup efficiency.

[0015] In one possible design, the access request also includes an access credential and an identifier of the second server node. The access credential is used to configure the access rights of the access request. In other words, it is used to limit the access scope of the first server node, making access more secure for the second server node and preventing private data leakage.

[0016] In one possible design, the method further includes: if the address of the second server node is a physical address, accessing the physical memory of the first server node based on the physical address, and the first server node and the second server node are the same server node.

[0017] In this design, if the first server node accesses the local physical memory, the physical address can be determined through the first virtual address and the correspondence between the first virtual address and the physical address.

[0018] In a second aspect, an embodiment of the present application also provides an access method, which includes: receiving an access request, the access request including a second virtual address, the second virtual address being a shared virtual address of the first server node and the second server node; determining a physical address corresponding to the second virtual address based on the second virtual address; and accessing the physical memory of the second server node based on the access request and the physical address.

[0019] Thus, different server nodes access each other through a shared virtual address. After receiving the access request, the second server node determines the physical address based on the shared virtual address to access the physical memory corresponding to the physical address. Therefore, the access method provided by the embodiment of the present application uses a shared virtual address for mutual access, which is more efficient than the existing technology that requires complex packet processing or sending through a protocol stack. Furthermore, the embodiment of the present application uses a shared virtual address, which is independent of the topology of the server node and is more flexible than the existing technology.

[0020] In addition, the correspondence between the second virtual address and the physical address can be stored in the physical memory of the second server node. Accessing the physical memory of the second server node is more efficient than accessing the remote physical memory.

[0021] In one possible design, the access request also includes an access credential used to configure access rights for the access request. Before determining the physical address corresponding to the second virtual address based on the second virtual address, the method further includes determining whether the access rights for the access request are valid based on the access credential. Specifically, the access credential can limit the access scope of the first server node, making access more secure for the second server node and preventing privacy data leakage.

[0022] In a third aspect, an embodiment of the present application also provides an access device, which includes a system address management unit and a sending unit. The system address management unit is used to determine the address of the second server node corresponding to the first virtual address based on the first virtual address, where the first virtual address is the address carried in the access request obtained by the first server node; the sending unit is used to send an access request to the second virtual address if the address of the second server node is the second virtual address, where the second virtual address is a shared virtual address of the first server node and the second server node.

[0023] The beneficial effects of the third aspect can be found in the description of the first aspect.

[0024] In one possible design, the system address management unit includes: an address management unit and a bus address management unit; the address management unit is used to determine the virtual physical address corresponding to the first virtual address based on the first virtual address, and the virtual physical address is the address of the virtual space of the first server node; the bus address management unit is used to determine the address of the second server node corresponding to the virtual physical address based on the virtual physical address.

[0025] In a possible design, the correspondence between the first virtual address and the virtual physical address is stored in a server node page table, and the correspondence between the virtual physical address and the address of the second server node is stored in a bus page table.

[0026] In one possible design, the length of a page table entry in the server node page table is different from the length of a page table entry in the bus page table.

[0027] In one possible design, the access request also includes an access credential and an identifier of the second server node, and the access credential is used to configure access rights of the access request.

[0028] In one possible design, the access device also includes an access unit; the access unit is used to access the physical memory of the first server node based on the physical address if the address of the second server node is a physical address, and the first server node and the second server node are the same server node.

[0029] In a fourth aspect, an embodiment of the present application provides an access device, the access device including a receiving unit and a bus address management unit; the receiving unit is used to receive an access request, the access request including a second virtual address, the second virtual address being a shared virtual address of the first server node and the second server node; the bus address management unit is used to determine the physical address corresponding to the second virtual address based on the second virtual address; the bus address management unit is also used to access the physical memory of the second server node based on the access request and the physical address.

[0030] The beneficial effects of the fourth aspect can be found in the description of the second aspect.

[0031] In one possible design, the access request also includes an access credential, which is used to configure access rights of the access request. The bus address management unit is further used to determine whether the access rights of the access request are valid based on the access credential.

[0032] In a fifth aspect, an embodiment of the present application provides a chip system, which includes a processor core, a system address management unit and a physical memory, wherein the processor core and the system address management unit are coupled, and the system address management unit and the physical memory are coupled.

[0033] In a sixth aspect, an embodiment of the present application provides a computer-readable storage medium, comprising computer instructions. When the computer instructions are executed on an electronic device, the electronic device executes the access method in any of the above aspects and any possible implementation methods.

[0034] In a seventh aspect, an embodiment of the present application provides a computer program product, which, when running on a computer or a processor, enables the computer or the processor to execute the access method in any of the above aspects and any possible implementation methods.

[0035] It can be understood that any of the access devices, chip systems, computer-readable storage media or computer program products provided above can be applied to the corresponding methods provided above. Therefore, the beneficial effects that can be achieved can refer to the beneficial effects in the corresponding methods and will not be repeated here.

[0036] These and other aspects of the present application will become more readily apparent from the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] FIG1 is a schematic diagram of the structure of a distributed system provided in an embodiment of the present application;

[0038] FIG2 is a schematic diagram of the structure of a server node provided in an embodiment of the present application;

[0039] FIG3 is a schematic diagram of the structure of another server node provided in an embodiment of the present application;

[0040] FIG4 is a schematic diagram of the structure of another server node provided in an embodiment of the present application;

[0041] FIG5 is a flowchart of an access method provided in an embodiment of the present application;

[0042] FIG6 is a schematic diagram of an address mapping relationship provided in an embodiment of the present application;

[0043] FIG7 is a flow chart of a first server node initiating an access request to a shared virtual address provided by an embodiment of the present application;

[0044] FIG8 is a flowchart of another method for a first server node to initiate an access request to a shared virtual address according to an embodiment of the present application;

[0045] FIG9 is a flowchart of another embodiment of the present application, in which a first server node initiates an access request to a shared virtual address;

[0046] FIG10 is a flowchart of another embodiment of the present application providing a first server node initiating an access request to a shared virtual address;

[0047] FIG11 is a structural block diagram of a server node provided in an embodiment of the present application;

[0048] FIG12 is a flow chart of a page table configuration of a server node provided in an embodiment of the present application;

[0049] FIG13 is a flowchart of another page table configuration of a server node provided in an embodiment of the present application;

[0050] FIG14 is an application scenario diagram of an access method provided in an embodiment of the present application;

[0051] FIG15 is a schematic diagram of the composition of an access device provided in an embodiment of the present application;

[0052] FIG16 is a schematic diagram showing the composition of another access device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0053] For ease of understanding, the embodiments of this application first explain the relevant concepts for reference, as shown below:

[0054] As shown in FIG1 , a distributed system 10 includes multiple servers 11, multiple computing nodes 12, an interconnection network 13, multiple clients 14, and applications 15. Each server 11 may be configured with one or more computing nodes 12. Computing nodes 12 may include, but are not limited to, graphics processors and field programmable gate arrays (FPGAs). In addition to computing nodes 12, servers 11 may also include one or more general-purpose processing units (GPUs) such as central processing units (CPUs) (not shown in FIG1 ). Each client 14 may run one or more applications 15, which may perform tasks such as corresponding data processing or analysis. Multiple clients 14 may be coupled to one or more servers 11 via an interconnection network 13, and have applications 15 executed by one or more computing nodes 12 on the servers 11. The interconnection network 13 may support different types of wired or wireless connections based on various network transmission technologies, such as remote direct memory access (RDMA) and transmission control protocol (TCP).

[0055] The technical solutions in the embodiments of the present application will be described below in conjunction with the accompanying drawings in the embodiments of the present application. In the description of the embodiments of the present application, unless otherwise specified, " / " means or, for example, A / B can mean A or B; "and / or" in this article is merely a description of the association relationship of associated objects, indicating that three relationships can exist, for example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone. In addition, in the description of the embodiments of the present application, "multiple" means two or more than two.

[0056] In the following, the terms "first" and "second" are used for descriptive purposes only and should not be understood to indicate or imply relative importance or implicitly specify the number of the technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of this embodiment, unless otherwise specified, "plurality" means two or more.

[0057] Currently, one approach to summarizing computational results is to use protocol stacks or network communications. For example, if data aggregation is required between server nodes 1 and 2, computation process 1 on server node 1 sends the computation result to computation process 2 on server node 2 via the Transmission Control Protocol or Internet Protocol (IP). After receiving the computation result from computation process 1, server node 2 aggregates it with the result from computation process 2.

[0058] However, this approach requires computing tasks to understand the interconnection topology between server nodes, hindering their scalability and portability. Furthermore, if computing task data is processed through a protocol stack, multiple software layers are involved, resulting in poor performance. For example, server node 1 needs to copy the computation result to the protocol stack before sending it. After sending the computation result to server node 2 via the network, server node 2 also needs to copy the computation result from server node 1 to its memory when receiving it. Consequently, during the data aggregation process, the computation result is copied twice, resulting in poor performance and a complex processing flow for the entire distributed network / computer cluster. Furthermore, to improve the computing power of server nodes, acceleration chips are often used for accelerated computing. For example, artificial intelligence (AI) accelerator cards or graphics processing unit (GPU) cards are added to server nodes to accelerate AI computations. In this case, the server node's central processing unit (CPU) performs logic control and does not participate in AI computations. However, acceleration chips typically cannot directly interface with the TCP / IP protocol stack or remote direct memory access, requiring customization, which is detrimental to chip design. Therefore, if the central processing unit and the acceleration chip are used for interactive processing, the process will be more complicated.

[0059] Another implementation approach is to use a supernode approach. A supernode consists of multiple nodes interconnected by high-speed links. Each node consists of a computing unit (such as a CPU or AI chip) and corresponding physical memory (such as high-bandwidth memory (HBM)). The physical memory of different nodes is uniformly addressed. The same operating system manages the multiple nodes that make up the supernode, and the nodes access the uniformly addressed physical memory through a shared page table. The essence of this approach is the operating system's non-uniform memory access (NUMA) mechanism.

[0060] However, the memory that makes up a supernode requires uniform physical addressing, and the number of chips that make up a supernode is limited, limiting scalability. Furthermore, because supernodes are managed by a single operating system and use the same page table, page table entries can only be stored in the physical memory of a particular node. Each memory access to other memory nodes requires first accessing the page table entries of another node, resulting in poor performance. Cache coherence between different nodes also poses challenges to chip design and the bandwidth of high-speed links.

[0061] Therefore, an embodiment of the present application provides an access method, which divides a shared virtual address (SVA) space for a first server node and a second server node, so that they can safely and reliably access each other using a shared virtual address, thereby solving the problems of poor scalability and low performance of existing implementation methods.

[0062] For ease of understanding, the embodiment of the present application first introduces the server node to which the access method is applied. As shown in Figure 2, Figure 2 is a structural diagram of a server node provided by an embodiment of the present application. The server node 20 may include a central processing unit core 21 (CPU core), an artificial intelligence core 22 (AI core), an address management unit 23 (memory management unit, MMU), a system address management unit 24 (system memory management unit, SMMU), an address bus 25, a bus address management unit 26 (bus memory management unit, busMMU) and a physical memory 27 (physical memoryroy). Among them, the central processing unit core 21 is responsible for logical calculations, the artificial intelligence core 22 is responsible for matrix calculations, the address management unit 23 receives the virtual address conversion request initiated by the central processing unit core 21, and converts the page table entry into a local physical address (LPA) or a virtual physical address (VPA). The system address management unit 24 receives and processes the address conversion request of the artificial intelligence core. The bus address management unit 26 receives the address conversion request of the address bus 25, and forms the converted result into an access request and sends it to the switch of the high-speed link. In addition, the bus address management unit 26 also receives access requests from the switch of the high-speed link. The bus address management unit 26 searches for the local page table entry based on the access request of the high-speed link, converts it into the physical address of the physical memory 27, and sends the access request to the address bus 25 to access the physical memory 27.

[0063] In another implementation, as shown in FIG3 , which is a schematic diagram of the structure of another server node provided in an embodiment of the present application, the server node 20 may include a central processing unit core 21, an address management unit 23, an address bus 25, and physical memory 27. The bus address management unit may not be integrated into the server node 20, but may be a new hardware unit coupled to the address bus 25 in the server node 20.

[0064] In another implementation, as shown in FIG4 , FIG4 is a structural diagram of another server node provided in an embodiment of the present application. The server node 20 includes an artificial intelligence core 22, a system address management unit 24, an address bus 25, and physical memory 27. The bus address management unit is integrated into the system address management unit 24, which simultaneously receives address access requests from the artificial intelligence core 22 and the high-speed link, performs address conversion, and initiates address access. The address bus 25 identifies the address to be accessed and either accesses the local physical memory or accesses the physical memory of the destination node via the high-speed link.

[0065] Compared to the server node shown in Figure 3, the server node shown in Figure 4 eliminates one hardware unit, saving hardware cost and space. During the server node's address translation process, the system address management unit only needs to look up a single page table entry before translating it into an external link access request. This reduces the number of page table entries, lowers system memory overhead, and improves performance.

[0066] However, the structural diagram of the server node provided in the embodiment of the present application is not limited to the above three implementation methods.

[0067] Applied to the server nodes in Figures 2, 3 or 4, the access method provided by the embodiment of the present application is introduced below, as shown in Figure 5, which is a flow chart of the access method provided by the embodiment of the present application. Among them, the server node can be a request server node and a destination server node, or the server node can be only a request server node or a destination server node. The server node that initiates the access request can be understood as the request server node, and the server node that receives the access request can be understood as the destination server node. In the embodiment of the present application, the request server node is the first server node, and the destination server node is the second server node. The method flow is as follows:

[0068] S501. A first server node determines an address of a second server node corresponding to a first virtual address based on a first virtual address, where the first virtual address is an address carried in an access request obtained by the first server node.

[0069] S502: If the address of the second server node is a second virtual address, the first server node sends an access request to the second virtual address, where the second virtual address is a shared virtual address of the first server node and the second server node.

[0070] For example, when an application or program sends an access request to a first server node, the access request includes a first virtual address. The first server node can obtain the address of a second server node based on the first virtual address. In this case, if the address of the second server node is the second virtual address, this indicates that the access request is not for accessing the local server node, and the first server node can forward the access request to the second server node corresponding to the second virtual address.

[0071] Correspondingly, in S503 , the second server node receives an access request, where the access request includes a second virtual address, and the second virtual address is a shared virtual address of the first server node and the second server node.

[0072] S504: The second server node determines a physical address corresponding to the second virtual address according to the second virtual address.

[0073] S505: The second server node accesses the physical memory of the second server node based on the access request and the physical address.

[0074] The second virtual address may be a shared virtual address. For ease of understanding, this embodiment of the present application first introduces the shared virtual address. To enable a server node to simply, securely, and reliably access shared data, the server node may apply for a segment of the global virtual address space. The global virtual address space is a virtual address space that is available to every server node in a distributed system or computer cluster.

[0075] As shown in Figure 6, Figure 6 is a schematic diagram of an address mapping relationship provided by an embodiment of the present application. Figure 6 shows a first server node and a second server node. The first server node and the second server node jointly apply for a virtual address space of the global virtual address space, for example, a virtual address space with a starting address of va1 and a length of len1. In the first server node, the shared virtual address is mapped to a first virtual address, and in the second server node, the shared virtual address is mapped to a physical address.

[0076] FIG7 shows a flowchart of the first server node initiating an access request for a shared virtual address, as applied to the server node in FIG4 . A processing element (PE) on the first server node initiates the access request, where the processing element can be a process or an executable program. Assume that the first server node initiates the access request using a shared virtual address (e.g., va) with the second server node, where the first virtual address is an address within the shared virtual address. The system address management unit in the first server node determines the second virtual address (denoted by va in FIG7 ) based on the first virtual address and the correspondence between the first virtual address and the second virtual address. The system address management unit in the first server node then sends the access request to the second server node based on the second virtual address. The second virtual address can be the same as or different from the first virtual address. After the second server node receives the access request, the bus address management unit in the second server node processes the access request from the external link switch, which includes the second virtual address. Based on the correspondence between the second virtual address and the physical address, the bus address management unit determines the physical address (denoted by pa in FIG7 ) and accesses the physical memory corresponding to the physical address.

[0077] The first server node and the second server node can be coupled via a transmission line, and the access request from the first service node can be directly sent to the second server node. Alternatively, the first server node and the second server node can be coupled via a switch, and the first service node sends the access request to the switch, which then forwards the access request to the second server node.

[0078] Optionally, step 501 may include: the first server node determines a virtual physical address corresponding to the first virtual address based on the first virtual address, where the virtual physical address is an address of a virtual space of the first server node, and the first server node determines an address of a second server node corresponding to the virtual physical address based on the virtual physical address.

[0079] The first server node may be divided into a virtual space corresponding to the virtual physical address, wherein the virtual space may be much larger than the space of the local physical address, thereby expanding the physical memory space accessible to the first server node.

[0080] FIG8 shows a flowchart of a first server node initiating an access request to a shared virtual address of a second server node, as applied to the server nodes in FIG2 . The processing unit on the first server node initiates the access request. Assume that the first server node uses the shared virtual address (denoted by va in FIG8 ) with the second server node to initiate the access request, i.e., the first virtual address is an address in the shared virtual address. The address management unit in the first server node determines the virtual-physical address (denoted by vpa in FIG8 ) based on the first virtual address and the correspondence between the first virtual address and the virtual-physical address. The bus address management unit in the first server node then determines the address of the second server node based on the virtual-physical address and the correspondence between the virtual-physical address and the address of the second server node. The address of the second server node is now the second virtual address (denoted by va in FIG8 ). The bus address management unit then sends the access request to the second server node based on the second virtual address. The bus address management unit in the second server node processes the access request from the first server node, which includes the second virtual address. Based on the correspondence between the second virtual address and the physical address, the bus address management unit determines the physical address (denoted by pa in FIG8 ) and accesses the physical memory corresponding to the physical address.

[0081] In another implementation, as shown in Figure 9, the first server node may also send the access request to the switch, which then sends the access request to the second server node. The embodiment of the present application does not limit the method of sending the access request.

[0082] The corresponding relationship between the first virtual address and the virtual physical address is stored in the server node page table, and the corresponding relationship between the virtual physical address and the address of the second server node is stored in the bus page table.

[0083] The server node page table and bus page table can be stored in the physical memory of the first server node. As shown in Figure 10, assuming that the first and second server nodes use the same global virtual address for shared access, the second server node applies for the global virtual address and locally establishes a correspondence between the shared virtual address and the local physical address, which is stored in the bus page table. The first server node also establishes a correspondence between the shared virtual address and the virtual-physical address, which is stored in the server node page table. It then establishes a correspondence between the virtual-physical address and the first virtual address, which is stored in the bus page table.

[0084] At this time, the processing unit in the first server node initiates an access request to the shared virtual address. The access request includes the first virtual address. The address management unit first searches the server node page table to obtain the address of the second server node after the first virtual address is converted. If the address of the second server node is a physical address, access to the local physical memory is initiated through the internal bus. If the address of the second server node is a virtual physical address, the virtual physical address is sent to the bus address management unit through the internal bus. The bus address management unit searches the bus page table for the second virtual address corresponding to the virtual physical address, and sends an access request to the second server node based on the second virtual address. After receiving the access request, the second server node searches the bus page table for the physical address corresponding to the second virtual address through the bus address management unit, and accesses the physical memory of the second server node based on the physical address.

[0085] The page table entry length of the server node page table is different from the page table entry length of the bus page table. The page table entry length can also be understood as the page table entry granularity. In one example, the page table entry length of the server node page table can be 4KB, and the page table entry length of the bus page table can be 2MB. Thus, by controlling the page table entry length, different numbers of server node page tables or bus page tables can be obtained.

[0086] It is understandable that the page table entry length of the server node page table and the page table entry length of the bus page table may also be the same, and this application does not impose any specific restrictions on the value of the page table entry length.

[0087] The access request also includes an access token, which is used to configure the access rights of the access request.

[0088] The access credential is stored in the bus page table of the second server node. The bus page table uses the access credential to configure access rights for the virtual address, generating the access credential. If the first and second server nodes use a shared virtual address, a mapping between the shared virtual address and the virtual physical address should be established within the first server node, the bus page table should be configured, and then a mapping between the virtual physical address and the first virtual address should be established, and the server node page table should be configured. The page table mapping entry also includes information about the access credential. Upon receiving the access request, the second server node searches the bus page table based on the access credential.

[0089] Accordingly, the second server node determines whether the access permission of the access request is valid based on the access credential.

[0090] Additionally, the same virtual address space can support multiple access credentials, granting different access permissions based on the access credentials. Access permissions may include read-write, read-only, and write-only permissions. Optionally, the method may further include: if the address of the second server node is a physical address, accessing the physical memory of the first server node based on the physical address, and the first server node and the second server node are the same server node.

[0091] Exemplarily, if the address of the second server node determined based on the first virtual address is a physical address, then the access request indicates accessing the local server node. In this case, the server node is both the first server node and the second server node, and accesses the physical memory corresponding to the physical address based on the access request.

[0092] In summary, the following describes the process of how to configure the page table of a server node. As shown in Figure 11, the server node may include a virtual-physical address management module and an address mapping module. The virtual-physical address management module is used to configure the virtual-physical address space, and the address mapping module is used to perform address mapping. The address mapping process may include the process shown in Figure 12. Figure 12 is a flowchart of a page table configuration of a server node provided in an embodiment of the present application. The flowchart is applied to the server node shown in Figure 2 or Figure 3. The first server node and the second server node will configure the idle virtual address into the dynamic address window (DAW) based on the server nodes and the size of the shared virtual address space that make up the distributed system or computer cluster. The subsequent address bus will send the access request to the virtual address to the bus address management unit according to the range of the dynamic address window, and the bus address management unit will perform address conversion.

[0093] In one implementation, assuming that only server node 1 and server node 2 share data, and the shared data size is 32MB, the virtual-physical address management module only needs to allocate 32MB of virtual-physical address space to the dynamic address window. For example, the virtual-physical address space (0xa0000000000, 32MB) is allocated to the dynamic address window of server node 1, and the virtual-physical address space (0xb0000000000, 32MB) is allocated to the dynamic address window of server node 2.

[0094] The process of the address mapping module may include the following process. As shown in S1201, process 1 is started on server node 1 (device identification (id) is 1). Process 1 includes: create_process "pid=1, shareMemSize=32M, token=0x00000001, peer_did=2, peer_token=0x00000002, total_process=2". Among them, the parameter pid is the number of process 1, shareMemSize is the size of the virtual address space shared by each process, token is the access credential of the shared memory of server node 1, peer_did is the device identification of server node 2, peer_token is the credential for accessing server node 2, and total_process is the number of started processes. When process 1 starts, it calculates the required shared virtual address space size as 64MB based on the parameters. It applies for the shared virtual address space through the operating system interface. The starting address of the shared virtual address space can be 0x1000000000, for example, mmap(0x1000000000,64MB). Thus, the virtual address space (va1 to va2) is obtained.

[0095] As shown in S1202, process 1 calls the operating system's memset(0x1000000000, 0, 32M) interface, and the operating system establishes the first 32M of the server node page table on server node 1. The page table entry size (pagesize) of the server node page table is 4k, which will add 8k 4k page table entries. Each page table entry maps a 4k virtual address to the physical address of server node 1. For example, there are 8k address mapping relationships such as (0x1000000000, 0x00100000) (0x1000001000, 0x00103000). In one example, the virtual address va = 1000000000 corresponds to the local physical address lpa = 0x00100000.

[0096] As shown in S1203, process 1 calls the address mapping module's interface set_shared(0x1000000000, 32MB, token = 0x00000001, peer_did = 2, prog = "rw"). This configures the 32MB address space of server node 1 starting at 0x1000000000, i.e., configures the permission table. The permission table can be shared with the server node with peer_did 2 for shared access. The access credential is the parameter value of the token, and the access rights are read and write.

[0097] As shown in S1204, process 1 calls the interface map_remote(0x1000000000+32M, 32M, did=2, peer_token=0x00000002) of the address mapping module to configure the 32M space starting from the virtual address 0x1000000000+32M for remote access, and the access credential is the token value. The map_remote interface includes the following steps: (1) Apply for a virtual physical address space based on the size of the space to be mapped, for example, a 32M virtual physical address space starting from vpa=0xa0000000000. (2) Configure page table mapping in the bus page table. The page table entry size is 2M, and 16 page table entries are mapped, including (0x1000000000+32M, 0xa000000000, 2M), (0x1000000000+34M, 0xa000000000+2M, 2M). (3) Configure page table mapping in the server page table to convert the virtual physical address into a virtual address. The page table entry also includes the device identifier and access credentials of the server node corresponding to the virtual address.

[0098] Start process 2 on server node 2 (device identifier 2). Process 2 includes: create_process "pid=2, shareMemSize=32M, token=0x00000002, peer_did=1, peer_token=0x00000001, total_process=2". The parameter pid is the number of process 2, shareMemSize is the size of the shared virtual address space for each process, token is the access credential for the shared memory of server node 2, peer_did is the device identifier of server node 1, peer_token is the credential for accessing server node 1, and total_process is the number of started processes. When process 2 starts, the size of the shared virtual address space required is calculated based on the parameters, which is 64M. The shared virtual address space is applied for through the operating system interface. The starting address of the shared virtual address space can be 0x1000000000, for example, mmap(0x1000000000, 64M). Get the virtual address space (va2 to va3)

[0099] As shown in S1205, process 2 calls the operating system's memset(0x1000000000+32M, 0, 32M) interface, and the operating system creates a page table entry for the 32M space starting at 0x1000000000+32M on server node 2. If the page table entry size (pagesize) is 4KB, 8,000 page table entries of 4KB each will be added. Each page table entry maps a 4KB virtual address to the physical address of server node 2. For example, there are 8,000 address mapping relationships, such as (0x1000000000+32M, 0x00100000) (0x1000001000+32M+4K, 0x00102000).

[0100] As shown in S1206, process 2 calls the address mapping module interface set_shared(0x1000000000+32M, 32M, token=0x00000002, peer_did=1, prog="rw") to configure server node 2 to have a 32M address space starting at 0x1000000000+32M, which can be shared with the server node with peer_did 1. The access credential is the parameter value of the token, and the access permission is read and write.

[0101] As shown in S1207, process 2 calls the interface map_remote(0x1000000000, 32M, did=1, peer_token=0x00000001) of the address mapping module to configure the 32M space starting from the virtual address 0x1000000000 for remote access, and the access credential is the peer_token value. Among them, the map_remote interface includes the following steps: (1) Apply for virtual physical address space according to the size of the space to be mapped, such as the 32M virtual physical address space starting from 0xb000000000. (2) Configure page table mapping in the bus page table, the size of the page table entry is 2M, and map 16 page table entries such as (0x1000000000, 0xb000000000, 2M), (0x1000000000+2M, 0xb000000000+2M, 2M). (3) Configure page table mapping in the server page table to convert the virtual physical address into a virtual address. The page table entry also includes the device identifier and access credentials of the server node corresponding to the virtual address.

[0102] Therefore, process 1 performs task calculation and writes the calculation result into 0x1000000000. When accessing the virtual address, the central processing unit converts it into a physical address through the address management unit for access.

[0103] Perform task 2 calculation and write the calculation result to 0x1000000000+32M. When accessing the virtual address, the central processing unit converts it into a physical address through the address management unit for access.

[0104] If process 1 aggregates the calculation results from process 2 and accesses address 0x1000000000+32M, the CPU converts it into a virtual physical address (0xa0000000000) through the address management unit for access. If the bus of the server node where process 1 is located finds that 0xa0000000000 is within the local dynamic address window, it forwards the access request to the bus address management unit. At this time, the access request contains did = 2, token = 0x00000002, and the virtual address is 0x1000000000+32M, indicating read-only access. The bus address management unit then composes the access request and sends it to the external high-speed link.

[0105] Server node 2 receives the access request from server node 1. The bus address management unit of server node 2 searches the page table entry based on the DID, token, and virtual address. In one implementation, because the token is valid, the permission table search is successful. The bus address management unit then searches the page table entry of server 2 using the virtual address to obtain the local physical address. In another implementation, the permission table search and page table search can be performed concurrently. If both search results are successful, the access request is valid. If either search result is unsuccessful, the access request is invalid.

[0106] Server node 2 initiates a read request for physical address 0x00100000 and returns the read data via the high-speed link to server node 1. The processing code of server node 1 performs a summary calculation on the read data.

[0107] In another implementation, as shown in FIG13 , FIG13 is a flowchart of another server node page table configuration provided in an embodiment of the present application. The flowchart is applied to the server node shown in FIG4 . Referring to the flowchart of the page table configuration shown in FIG11 , it is not necessary to configure the server node page table and the bus page table separately in the flowchart. Only one system page table needs to be configured. S1301 is the same as S1201, S1303 is the same as S1203, and S1304 is the same as S1206, so they are not described here. In addition, since the virtual address of each server node is different, the server node obtains the address of the second server node according to the conversion instruction of the system address management unit. If the address of the second server node is the second virtual address, the access request is sent to the second server node. In an embodiment of the present application, the first virtual address and the shared virtual address are the same. In another implementation, the first virtual address and the shared virtual address may also be different.

[0108] Therefore, in scenarios requiring massive computational effort, such as artificial intelligence and high-performance computing (HPC), a computational task is typically broken down into multiple subtasks. The results are then combined and the next round of iterative computation is performed until the result meets the requirements. As shown in Figure 14, assume a computational task is broken down into three subtasks and deployed on three servers: Server 1, Server 2, and Server 3. After the subtasks are completed, Server 1 stores the results in the virtual address space va1 to va2, Server 2 stores the results in the virtual address space va2 to va3, and Server 3 stores the results in the virtual address space va3 to va4. If a server needs to aggregate the results, it initiates an address access request to obtain the results from other servers. In one example, Server 1 needs to obtain the results from Server 2. Server 1 initiates an address access request to Server 2's virtual address space (the virtual address space va2 to va3). This address access request includes id2, token2, and va3, retrieving data from Server 2's virtual address space to Server 2's physical memory. In another example, server 1 needs to obtain calculation results from server 2, so server 1 initiates an address access request to the virtual address space of server 2 (the virtual address space from va3 to va4), which includes id3, token3 and va4, and obtains data from the virtual address space of server 3 to the physical memory of server 3.

[0109] It is understandable that in order to implement the above functions, the electronic device includes hardware and / or software modules corresponding to the execution of each function. In combination with the algorithm steps of each example described in the embodiments disclosed herein, the present application can be implemented in the form of hardware or a combination of hardware and computer software. Whether a function is executed in the form of hardware or computer software driving hardware depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application in combination with the embodiments, but such implementation should not be considered to be beyond the scope of this application.

[0110] In this embodiment, the electronic device can be divided into functional modules according to the above-mentioned method example. For example, each functional module can be divided according to each function, or two or more functions can be integrated into a single processing module. The above-mentioned integrated modules can be implemented in the form of hardware. It should be noted that the module division in this embodiment is illustrative and is only a logical functional division. In actual implementation, other division methods may be used.

[0111] In the case of dividing the functional modules according to their respective functions, FIG15 shows a possible composition diagram of the access device 1500 involved in the above embodiment. As shown in FIG15 , the access device 1500 may include: a system address management unit 1501 and a sending unit 1502 .

[0112] The system address management unit 1501 may be used to support the access device 1500 in executing the above-mentioned step S501 and / or other processes of the technology described herein.

[0113] The sending unit 1502 may be configured to support the access device 1500 in executing the above-mentioned step S502 and / or other processes of the technology described herein.

[0114] It should be noted that all relevant contents of each step involved in the above method embodiment can be referred to the functional description of the corresponding functional module and will not be repeated here.

[0115] The access device provided in this embodiment is used to execute the above-mentioned access method, and thus can achieve the same effect as the above-mentioned implementation method.

[0116] When integrated, access device 1500 may include a processing module, a storage module, and a communication module. The processing module may be used to control and manage the operations of access device 1500. For example, it may be used to support access device 1500 in executing the steps performed by system address management unit 1501 and transmission unit 1502. The storage module may be used to support access device 1500 in storing program code and data. The communication module may be used to support communication between access device 1500 and other devices, such as wireless access devices.

[0117] The processing module may be a processor or a controller. It may implement or execute the various exemplary logic blocks, modules, and circuits described in conjunction with the disclosure of this application. The processor may also be a combination that implements computing functions, such as a combination of one or more microprocessors, a combination of digital signal processing (DSP) and a microprocessor, and so on. The storage module may be a memory. The communication module may specifically be a device that interacts with other electronic devices, such as a radio frequency circuit, a Bluetooth chip, or a Wi-Fi chip.

[0118] In one embodiment, when the processing module is a processor and the storage module is a memory, the access device involved in this embodiment may be a server node having the structure shown in FIG. 4 .

[0119] Correspondingly, in the case of dividing each functional module according to each function, Figure 16 shows another possible composition diagram of the access device 1600 involved in the above embodiment. As shown in Figure 16, the access device 1600 may include: a receiving unit 1601 and a bus address management unit 1602.

[0120] The receiving unit 1601 may be used to support the access device 1600 in executing the above-mentioned step S503 and / or other processes of the technology described herein.

[0121] The bus address management unit 1602 may be used to support the access device 1600 in executing the above-mentioned steps S504 and S505 , and / or other processes of the technology described herein.

[0122] It should be noted that all relevant contents of each step involved in the above method embodiment can be referred to the functional description of the corresponding functional module and will not be repeated here.

[0123] The access device 1600 provided in this embodiment is used to execute the above-mentioned access method, and thus can achieve the same effect as the above-mentioned implementation method.

[0124] An embodiment of the present application further provides an electronic device comprising one or more processors and one or more memories. The one or more memories are coupled to the one or more processors, and the one or more memories are used to store computer program code. The computer program code comprises computer instructions. When the one or more processors execute the computer instructions, the electronic device executes the above-mentioned related method steps to implement the access method in the above-mentioned embodiment.

[0125] The present application also provides a chip system, which includes a processor core, a system address management unit, and physical memory. The processor core and the system address management unit are coupled, and the system address management unit is coupled to the physical memory. The system address management unit includes an address management unit and a bus address management unit, and the address management unit and the bus address management unit are coupled.

[0126] An embodiment of the present application further provides a computer storage medium storing computer instructions. When the computer instructions are executed on an electronic device, the electronic device executes the above-mentioned related method steps to implement the access method in the above-mentioned embodiment.

[0127] An embodiment of the present application further provides a computer program product. When the computer program product is run on a computer, the computer is caused to execute the above-mentioned related steps to implement the access method executed by the electronic device in the above-mentioned embodiment.

[0128] In addition, an embodiment of the present application also provides a device, which can specifically be a chip, component or module, and the device may include a connected processor and memory; wherein the memory is used to store computer-executable instructions, and when the device is running, the processor can execute the computer-executable instructions stored in the memory to enable the chip to execute the access method executed by the electronic device in the above-mentioned method embodiments.

[0129] Among them, the electronic device, computer storage medium, computer program product or chip provided in this embodiment is used to execute the corresponding method provided above. Therefore, the beneficial effects that can be achieved can refer to the beneficial effects in the corresponding method provided above, and will not be repeated here.

[0130] Through the description of the above implementation methods, technical personnel in the relevant field can understand that for the convenience and simplicity of description, only the division of the above-mentioned functional modules is used as an example. In actual applications, the above-mentioned functions can be distributed and completed by different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above.

[0131] In the several embodiments provided in this application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are merely schematic. For example, the division of the modules or units is merely a logical function division. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another device, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0132] The units described as separate components may or may not be physically separate, and the components shown as units may be one physical unit or multiple physical units, that is, they may be located in one place or distributed in multiple places. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0133] In addition, the functional units in the various embodiments of the present application may be integrated into a single processing unit, or each unit may exist physically separately, or two or more units may be integrated into a single unit. The aforementioned integrated units may be implemented in the form of hardware or software functional units.

[0134] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a readable storage medium. Based on this understanding, the technical solution of the embodiment of the present application is essentially or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for enabling a device (which can be a single-chip microcomputer, chip, etc.) or a processor (processor) to execute all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes: various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.

[0135] The above content is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this application should be included in the scope of protection of the present application. Therefore, the scope of protection of the present application should be based on the scope of protection of the claims.

Claims

1. An access method, characterized in that: The method comprises: Determine, according to the first virtual address, an address of the second server node corresponding to the first virtual address, where the first virtual address is an address carried in the access request obtained by the first server node; If the address of the second server node is a second virtual address, the access request is sent to the second virtual address, and the second virtual address is a shared virtual address of the first server node and the second server node.

2. The method according to claim 1, characterized in that The step of determining, according to the first virtual address, an address of a second server node corresponding to the first virtual address includes: Determine, according to the first virtual address, a virtual physical address corresponding to the first virtual address, wherein the virtual physical address is an address of a virtual space of the first server node; According to the virtual physical address, an address of a second server node corresponding to the virtual physical address is determined.

3. The method according to claim 2, characterized in that The correspondence between the first virtual address and the virtual physical address is stored in a server node page table, and the correspondence between the virtual physical address and the address of the second server node is stored in a bus page table.

4. The method according to claim 3, characterized in that The length of a page table entry of the server node page table is different from the length of a page table entry of the bus page table.

5. The method according to any one of claims 1 to 4, characterized in that: The access request also includes an access credential and an identifier of the second server node, wherein the access credential is used to configure access rights of the access request.

6. The method according to claim 1, characterized in that The method further comprises: If the address of the second server node is a physical address, the physical memory of the first server node is accessed based on the physical address, and the first server node and the second server node are the same server node.

7. An access method, characterized in that: The method comprises: receiving an access request, the access request comprising a second virtual address, the second virtual address being a shared virtual address of the first server node and the second server node; Determine, according to the second virtual address, a physical address corresponding to the second virtual address; Based on the access request and the physical address, access the physical memory of the second server node.

8. The method according to claim 7, characterized in that The access request further includes an access credential, and the access credential is used to configure access rights of the access request. Before determining the physical address corresponding to the second virtual address according to the second virtual address, the method further includes: A determination is made based on the access credential whether the access permission of the access request is valid.

9. An access device, characterized in that: The access device includes a system address management unit and a sending unit; The system address management unit is used to determine, according to a first virtual address, an address of a second server node corresponding to the first virtual address, where the first virtual address is an address carried in an access request obtained by the first server node; The sending unit is configured to send the access request to a second virtual address if the address of the second server node is the second virtual address, where the second virtual address is a shared virtual address of the first server node and the second server node.

10. The access device according to claim 9, characterized in that: The system address management unit includes: an address management unit and a bus address management unit; The address management unit is used to determine a virtual physical address corresponding to the first virtual address according to the first virtual address, wherein the virtual physical address is an address of a virtual space of the first server node; The bus address management unit is used to determine the address of the second server node corresponding to the virtual physical address according to the virtual physical address.

11. The access device according to claim 10, characterized in that: The correspondence between the first virtual address and the virtual physical address is stored in a server node page table, and the correspondence between the virtual physical address and the address of the second server node is stored in a bus page table.

12. The access device according to claim 11, characterized in that: The length of a page table entry of the server node page table is different from the length of a page table entry of the bus page table.

13. The access device according to any one of claims 9 to 12, characterized in that: The access request also includes an access credential and an identifier of the second server node, wherein the access credential is used to configure access rights of the access request.

14. The access device according to claim 9, characterized in that: The access device also includes an access unit; The access unit is used to access the physical memory of the first server node based on the physical address if the address of the second server node is a physical address, and the first server node and the second server node are the same server node.

15. An access device, characterized in that: The access device comprises: a receiving unit and a bus address management unit; The receiving unit is used to receive an access request, wherein the access request includes a second virtual address, and the second virtual address is a shared virtual address of the first server node and the second server node; The bus address management unit is used to determine the physical address corresponding to the second virtual address according to the second virtual address; The bus address management unit is further used to access the physical memory of the second server node based on the access request and the physical address.

16. The access device according to claim 15, characterized in that: The access request further includes an access credential, and the access credential is used to configure access rights of the access request. The bus address management unit is further used to: A determination is made based on the access credential whether the access permission of the access request is valid.

17. A chip system, characterized in that: The chip system comprises a processor core, a system address management unit and a physical memory. The processor core is coupled to the system address management unit, and the system address management unit is coupled to the physical memory.

18. The chip system according to claim 17, characterized in that: The system address management unit includes an address management unit and a bus address management unit, and the address management unit and the bus address management unit are coupled.

19. A computer-readable storage medium, characterized in that: The method comprises computer instructions, which, when executed on an electronic device, cause the electronic device to execute the method described in any one of claims 1 to 6 or claim 7 or 8.

20. A computer program product, characterized in that When the computer program product runs on a computer or a processor, the computer or the processor is caused to execute the method of any one of claims 1 to 6 or claim 7 or 8.

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