Voltage and frequency control system and method, storage medium, device, and program product

Abstract

A voltage and frequency control system and method, a storage medium, a device, and a program product, relating to the field of chips. The system comprises: a delay detection part (10), configured to detect in real time the circuit delay of a computing part (50); a frequency control part (20), configured to, according to a current power supply voltage and the circuit delay, control the frequency of a clock signal outputted to the computing part (50); a performance calculation part (30), configured to periodically detect the performance of the computing part (50) to obtain an actual performance; a power consumption level control part (40), configured to, according to a performance target and the actual performance, control a supply voltage output to the frequency control part (20) and the computing part (50).

Description

Voltage and frequency control system, method, storage medium, device and program product

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application is based on the Chinese patent application with application number 202310813520.3, application date July 4, 2023, and application name “Voltage and frequency control system, method, storage medium”, and claims the priority of the Chinese patent application. The entire content of the Chinese patent application is hereby introduced into this application as a reference. Technical Field

[0003] The embodiments of the present application relate to the field of chips, and relate to a voltage and frequency control system, method, storage medium, device and program product. Background Art

[0004] Data centers, workstations, high-performance computers, and mobile devices often utilize system-on-chips (SoCs). Therefore, SoC power management has always been a hot topic. Enabling the SoC to deliver the highest computing performance within a given power budget, or minimizing power consumption while meeting certain computing requirements, is a key optimization goal for device performance.

[0005] The performance and power consumption of an SoC are directly related to the supply voltage and operating clock frequency of its primary functional components (i.e., the computing portion). Traditional power control schemes consume significant time to determine the optimal supply voltage and operating clock frequency, resulting in long control cycles, low efficiency, and poor accuracy, hindering the full performance of the chip.

[0006] Summary of the Invention

[0007] In view of this, the embodiments of the present application propose a voltage and frequency control system, method, storage medium, device and program product. According to the voltage and frequency control system of the embodiments of the present application, the real-time frequency control of the inner loop is used to reduce circuit timing redundancy, maximize performance and optimize control efficiency, and improve the control accuracy through the periodic voltage control and periodic frequency control of the outer loop, thereby enabling better performance improvement or power consumption reduction effects.

[0008] According to one aspect of an embodiment of the present application, a voltage and frequency control system is provided, which includes a delay detection part, a frequency control part, a performance statistics part, and a performance and power consumption level control part. The system is configured to control the clock frequency and power supply voltage of the computing part. The delay detection part is configured to detect the circuit delay of the computing part in real time and output the circuit delay to the frequency control part; the frequency control part is configured to control the frequency of the clock signal output to the computing part according to the current power supply voltage and the circuit delay, and the current power supply voltage is provided by the performance and power consumption level control part; the performance statistics part is configured to periodically detect the performance of the computing part, obtain actual performance and output it to the performance and power consumption level control part; the performance and power consumption level control part is configured to control the power supply voltage output to the frequency control part and the computing part according to a preset performance target and the actual performance.

[0009] In some implementations, the delay detection part and the calculation part physically maintain the same working conditions of process characteristics, power supply voltage, and device temperature, and the real-time detection of the circuit delay of the calculation part includes: real-time detection of the circuit delay of the calculation part under the working conditions of current process characteristics, current power supply voltage, and current device temperature as the circuit delay of the calculation part.

[0010] In some implementations, controlling the frequency of the clock signal output to the computing part based on the current power supply voltage and the circuit delay includes: determining the maximum frequency under the current power supply voltage and the circuit delay, and controlling the frequency of the clock signal output to the computing part to be equal to the maximum frequency.

[0011] In some implementations, when the difference between the performance target and the actual performance is greater than a first threshold, the performance and power consumption level control part is further configured to output a first clock control instruction to the frequency control part; the frequency control part is further configured to control the frequency of the clock signal to increase by a second threshold according to the first clock control instruction; when the difference between the actual performance and the performance target is greater than the first threshold, the performance and power consumption level control part is further configured to output a second clock control instruction to the frequency control part; the frequency control part is further configured to control the frequency of the clock signal of the computing part to decrease by a third threshold according to the second clock control instruction.

[0012] In some implementations, the performance and power consumption level control part is pre-set with multiple levels of voltage values, and the higher the voltage value level, the larger the voltage value. The power supply voltage output to the frequency control part and the calculation part is controlled according to the preset performance target and the actual performance, including: when the performance target is greater than the actual performance, the voltage value level of the output power supply voltage is controlled to increase; when the performance target is less than the actual performance, the voltage value level of the output power supply voltage is controlled to decrease.

[0013] In some implementations, the system also includes a power consumption statistics part, which is configured to periodically detect the power consumption of the computing part, obtain actual power consumption and output it to the frequency control part and the performance and power consumption level control part; the frequency control part is also configured to control the frequency of the clock signal output to the computing part based on a preset power consumption benchmark and the actual power consumption, so that the first power consumption estimate value of the computing part when operating at the frequency does not exceed the power consumption benchmark; the performance and power consumption level control part is also configured to control the power supply voltage output to the frequency control part and the computing part based on a preset power consumption benchmark and the actual power consumption.

[0014] In some implementations, controlling the frequency of the clock signal output to the computing part based on a preset power consumption benchmark and the actual power consumption includes: when the difference between the actual power consumption and the power consumption benchmark is greater than a fourth threshold, controlling the frequency of the output clock signal to be equal to the product of the maximum frequency value and a preset coefficient, and the value of the preset coefficient is less than 1.

[0015] In some implementations, the performance and power consumption level control portion is pre-set with multiple levels of voltage values, where a higher voltage level indicates a larger voltage value. Controlling the power supply voltage output to the frequency control portion and the calculation portion based on the preset performance target and the actual performance includes: determining a voltage value level of a first target power supply voltage when the performance target is greater than the actual performance, such that the voltage value level of the first target power supply voltage is higher than the voltage value level of the current power supply voltage; determining a voltage value level of the first target power supply voltage when the performance target is less than the actual performance, such that the voltage value level of the first target power supply voltage is lower than the voltage value level of the current power supply voltage; determining a first power consumption estimate when the calculation portion operates at the first target power supply voltage; controlling the power supply voltage output to the frequency control portion and the calculation portion to be equal to the first target power supply voltage when the first power consumption estimate is less than the power consumption reference; and controlling the power supply voltage output to the frequency control portion and the calculation portion based on the preset power consumption reference and the actual power consumption when the first power consumption estimate is greater than the power consumption reference.

[0016] In some implementations, controlling the power supply voltage output to the frequency control part and the calculation part based on a preset power consumption benchmark and the actual power consumption includes: when the difference between the actual power consumption and the power consumption benchmark is greater than a fifth threshold, determining the voltage value level of the second target power supply voltage so that the second power consumption estimate of the calculation part when operating at the second target power supply voltage is less than the power consumption benchmark, and the difference between the second power consumption estimate and the power consumption benchmark is minimized; and controlling the power supply voltage output to the frequency control part and the calculation part to be equal to the second target power supply voltage.

[0017] In some implementations, the performance and power consumption level control part is further configured to obtain an analysis report at the end of the current cycle based on one or more of the actual performance, actual power consumption, changes in the output power supply voltage, and output instructions obtained in the current cycle, and the analysis report is used to adjust the performance target and the power consumption benchmark used in the next cycle.

[0018] Another aspect of an embodiment of the present application provides a voltage and frequency control method, which is applied to a voltage and frequency control system, the system including a delay detection part, a frequency control part, a performance statistics part, and a performance and power consumption level control part, the system being configured to control the clock frequency and power supply voltage of the computing part, the method including: detecting the circuit delay of the computing part in real time by the delay detection part, and outputting the circuit delay to the frequency control part; controlling the frequency of the clock signal output to the computing part according to the current power supply voltage and the circuit delay by the frequency control part, the current power supply voltage being provided by the performance and power consumption level control part; periodically detecting the performance of the computing part by the performance statistics part, obtaining the actual performance and outputting it to the performance and power consumption level control part; controlling the power supply voltage output to the frequency control part and the computing part according to a preset performance target and the actual performance by the performance and power consumption level control part.

[0019] In some implementations, the delay detection part and the calculation part physically maintain the same working conditions of process characteristics, power supply voltage, and device temperature, and the real-time detection of the circuit delay of the calculation part includes: real-time detection of the circuit delay of the calculation part under the working conditions of current process characteristics, current power supply voltage, and current device temperature as the circuit delay of the calculation part.

[0020] In some implementations, controlling the frequency of the clock signal output to the computing part based on the current power supply voltage and the circuit delay includes: determining the maximum frequency under the current power supply voltage and the circuit delay, and controlling the frequency of the clock signal output to the computing part to be equal to the maximum frequency.

[0021] In some implementations, the method further includes: outputting a first clock control instruction to the frequency control part through the performance and power consumption level control part when the difference between the performance target and the actual performance is greater than a first threshold; controlling the frequency value of the clock signal to increase by a second threshold according to the first clock control instruction through the frequency control part; outputting a second clock control instruction to the frequency control part through the performance and power consumption level control part when the difference between the actual performance and the performance target is greater than the first threshold; controlling the frequency value of the clock signal of the computing part to decrease by a third threshold according to the second clock control instruction through the frequency control part.

[0022] In some implementations, the performance and power consumption level control part is pre-set with multiple levels of voltage values, and the higher the voltage value level, the larger the voltage value. The power supply voltage output to the frequency control part and the calculation part is controlled according to the preset performance target and the actual performance, including: when the performance target is greater than the actual performance, the voltage value level of the output power supply voltage is controlled to increase; when the performance target is less than the actual performance, the voltage value level of the output power supply voltage is controlled to decrease.

[0023] In some implementations, the system also includes a power consumption statistics part, and the method also includes: periodically detecting the power consumption of the computing part through the power consumption statistics part, obtaining the actual power consumption and outputting it to the frequency control part and the performance and power consumption level control part; controlling the frequency of the clock signal output to the computing part according to a preset power consumption benchmark and the actual power consumption through the frequency control part, so that the first power consumption estimate value of the computing part when operating at the frequency does not exceed the power consumption benchmark; controlling the power supply voltage output to the frequency control part and the computing part according to the preset power consumption benchmark and the actual power consumption through the performance and power consumption level control part.

[0024] In some implementations, controlling the frequency of the clock signal output to the computing part based on a preset power consumption benchmark and the actual power consumption includes: when the difference between the actual power consumption and the power consumption benchmark is greater than a fourth threshold, controlling the frequency of the output clock signal to be equal to the product of the maximum frequency value and a preset coefficient, and the value of the preset coefficient is less than 1.

[0025] In some implementations, the performance and power consumption level control portion is pre-set with multiple levels of voltage values, where a higher voltage level indicates a larger voltage value. Controlling the power supply voltage output to the frequency control portion and the calculation portion based on the preset performance target and the actual performance includes: determining a voltage value level of a first target power supply voltage when the performance target is greater than the actual performance, such that the voltage value level of the first target power supply voltage is higher than the voltage value level of the current power supply voltage; determining a voltage value level of the first target power supply voltage when the performance target is less than the actual performance, such that the voltage value level of the first target power supply voltage is lower than the voltage value level of the current power supply voltage; determining a first power consumption estimate when the calculation portion operates at the first target power supply voltage; controlling the power supply voltage output to the frequency control portion and the calculation portion to be equal to the first target power supply voltage when the first power consumption estimate is less than the power consumption reference; and controlling the power supply voltage output to the frequency control portion and the calculation portion based on the preset power consumption reference and the actual power consumption when the first power consumption estimate is greater than the power consumption reference.

[0026] In some implementations, controlling the power supply voltage output to the frequency control part and the calculation part based on a preset power consumption benchmark and the actual power consumption includes: when the difference between the actual power consumption and the power consumption benchmark is greater than a fifth threshold, determining the voltage value level of the second target power supply voltage so that the second power consumption estimate of the calculation part when operating at the second target power supply voltage is less than the power consumption benchmark, and the difference between the second power consumption estimate and the power consumption benchmark is minimized; and controlling the power supply voltage output to the frequency control part and the calculation part to be equal to the second target power supply voltage.

[0027] In some implementations, the method further includes: obtaining an analysis report by the performance and power consumption level control part at the end of the current cycle based on one or more of the actual performance, actual power consumption, changes in the output power supply voltage, and output instructions obtained in the current cycle, and the analysis report is used to adjust the performance target and the power consumption benchmark used in the next cycle.

[0028] According to another aspect of the embodiments of the present application, a non-volatile computer-readable storage medium is provided, on which computer program instructions are stored, wherein the computer program instructions implement the steps in the above method when executed by a processor.

[0029] In another aspect of the embodiments of the present application, a computer program product is provided, including a computer program or instructions, which implement the steps in the above method when executed by a processor.

[0030] In another aspect of the embodiments of the present application, an electronic device is provided, including a processor and a memory, wherein the memory stores a computer program that can be run on the processor, and when the processor executes the program, the steps in the above method are implemented.

[0031] According to the voltage and frequency control system of the embodiment of the present application, the time required to detect circuit delay is greatly reduced compared to detecting process, supply voltage, and temperature, thereby improving detection efficiency. The circuit delay characteristic determines the maximum operating clock frequency of the calculation part under a certain supply voltage. Therefore, the frequency control part uses the supply voltage and delay to control the frequency of the clock signal, and can achieve the same accuracy as using the process, supply voltage, and temperature to determine the frequency of the clock signal. The real-time acquisition of circuit delay enables the frequency control part to also achieve real-time frequency control, thereby improving the frequency control efficiency while meeting accuracy. The performance statistics part periodically detects the performance of the calculation part, obtains the actual performance, and outputs it to the performance and power consumption level control part. The performance and power consumption level control part controls the supply voltage output to the frequency control part and the calculation part based on the preset performance target and actual performance, realizing periodic supply voltage control and forming a closed control loop. And because the control is based on the preset performance target and actual performance, the control of the supply voltage is more accurate. And the supply voltage has a direct impact on the frequency of the clock signal, thus achieving more accurate adjustment of the supply voltage and clock signal frequency. The voltage and frequency control system of the embodiment of the present application reduces circuit timing redundancy, maximizes performance, and optimizes control efficiency through the real-time frequency control of the inner loop's delay detection part and the frequency control part. The periodic voltage control and periodic frequency control are performed through the performance statistics part and the performance and power consumption level control part of the outer loop to improve the control accuracy, thereby being able to take into account both performance and control efficiency improvements. Therefore, the combination of the inner loop and the outer loop achieves both efficiency and accuracy, which can make the performance improvement effect better.

[0032] Other features and aspects of the embodiments of the present application will become apparent from the following detailed description of exemplary embodiments with reference to the accompanying drawings.

[0033] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate exemplary embodiments, features, and aspects of the application and, together with the description, serve to explain the principles of the application.

[0035] FIG1 is a schematic diagram showing the structure of a voltage and frequency control system according to an embodiment of the present application.

[0036] FIG2 shows an exemplary workflow of a voltage and frequency control system according to an embodiment of the present application.

[0037] FIG3 is a schematic diagram showing the structure of a voltage and frequency control system according to an embodiment of the present application.

[0038] FIG4 is a schematic diagram showing a flow chart of a voltage and frequency control method according to an embodiment of the present application.

[0039] FIG5 shows a block diagram of an electronic device 1900 according to an embodiment of the present application. DETAILED DESCRIPTION

[0040] Various exemplary embodiments, features, and aspects of the present application will be described in detail below with reference to the accompanying drawings. The same reference numerals in the accompanying drawings represent elements with the same or similar functions. Although various aspects of the embodiments are shown in the accompanying drawings, the drawings are not necessarily drawn to scale unless otherwise indicated.

[0041] The word “exemplary” is used exclusively herein to mean “serving as an example, example, or illustration.” Any embodiment described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other embodiments.

[0042] In addition, numerous specific details are provided in the detailed description below to better illustrate the present application. Those skilled in the art will appreciate that the present application can be practiced without certain specific details. In some instances, methods, means, components, and circuits well known to those skilled in the art are not described in detail in order to highlight the main purpose of the present application.

[0043] Several traditional power consumption control solutions are introduced below.

[0044] The earliest power consumption control solution was dynamic voltage and frequency scaling (DVFS). Its basic idea is to dynamically adjust the chip's supply voltage and operating clock frequency based on the computing power requirements of the application. When the computing load is high and high performance is required, the supply voltage and operating clock frequency are increased to meet performance requirements. When the computing load is light and high performance is not required, the supply voltage and operating clock frequency are minimized to reduce power consumption, achieving the goal of meeting system performance while minimizing power consumption.

[0045] The supply voltage and operating clock frequency of DVFS are typically pre-set, which is poorly adapted to actual application scenarios. Building on the dynamic voltage and frequency adjustment scheme, related technologies have proposed adaptive voltage and frequency scaling (AVFS). This scheme controls the optimal supply voltage and operating clock frequency for each chip based on its process characteristics, operating temperature fluctuations, power supply fluctuations, and power supply noise. This maximizes the operating clock frequency to deliver the highest computing performance. While meeting performance requirements, it minimizes product power consumption, or provides higher computing performance within a given power budget.

[0046] The following introduces two control systems using AVFS in related technologies.

[0047] The control system of the related technology 1 determines the working clock frequency of the computing part according to the performance target, and outputs the working clock frequency information to the AVFS controller through instructions. According to the instructions, the AVFS controller controls the sensor to sample the process P, temperature T, and voltage V of the chip in real time, and obtains the process P, temperature T, and voltage V obtained by the sampling. The AVFS controller is pre-set with a frequency-voltage configuration table obtained by fitting the measured data. The frequency-voltage configuration table can indicate the optimal working clock frequency and power supply voltage under various combinations of process P, temperature T, and voltage V. Therefore, combined with the currently sampled process P, temperature T, voltage V and the preset frequency-voltage configuration table, it can be determined to what value the power supply voltage needs to be controlled, and the power supply voltage of this value and the working clock frequency determined according to the performance target can be applied to the computing part.

[0048] The solution of related technology 1 relies on sensors to detect chip process, voltage, temperature, and other information separately. On the one hand, the detection itself takes a certain amount of time, which limits the control speed of voltage and frequency. This results in a long overall control cycle (usually at the level of several milliseconds (ms) or tens of milliseconds (ms)), and power consumption and performance cannot be optimized and controlled in a timely manner. On the other hand, the statistical process of the frequency and voltage configuration table is very complicated and must be fitted based on a large amount of measured data. The measured data is usually collected from multiple different chips under different combinations of process P, temperature T, and voltage V. The fitting method only uses a single rule to make an overall approximation for all data samples (such as meeting the minimum mean square error, etc.). Therefore, the fitting result may not be optimal for a specific chip, and sometimes the deviation is relatively large, resulting in the voltage and frequency control accuracy may not be satisfactory. Therefore, for the characteristics of a specific chip, there may be performance redundancy of varying degrees.

[0049] Based on the control system of related technology one, the control system of technology two adds registers that can cache process P, temperature T, and voltage V, and enables the sensor to periodically collect process P, temperature T, and voltage V and cache them in the register. Each time the AVFS controller receives a frequency modulation instruction, it can directly obtain the process P, temperature T, and voltage V stored in the register and perform subsequent processing. For the entire workflow, the control cycle of a single voltage and frequency can be reduced, but the degree of reduction is very limited, still in the millisecond level. The pre-cached process P, temperature T, and voltage V are not necessarily consistent with the actual process P, temperature T, and voltage V when the instruction is received, so the accuracy of voltage and frequency control may be worse.

[0050] In summary, in traditional power consumption control solutions, determining the optimal power supply voltage and operating clock frequency takes a lot of time, resulting in a long control cycle, low control efficiency, and poor accuracy, which prevents the chip from fully utilizing its performance.

[0051] In view of this, the embodiments of the present application propose a voltage and frequency control system, method, storage medium, device and program product. According to the voltage and frequency control system of the embodiments of the present application, the real-time frequency control of the inner loop is used to reduce circuit timing redundancy, maximize performance, and optimize control efficiency. The periodic voltage control and periodic frequency control of the outer loop are used to improve the control accuracy, thereby achieving both performance and control efficiency improvements.

[0052] In some embodiments, when there are other requirements for power consumption, the periodic voltage control and periodic frequency control of the outer loop can also be combined with the power consumption requirements to control the voltage, so as to achieve a better power consumption reduction effect and improve the performance-power-consumption ratio of the system.

[0053] Fig. 1 is a schematic diagram showing the structure of a voltage and frequency control system according to an embodiment of the present application. An exemplary application scenario of the voltage and frequency control system will be described below with reference to Fig. 1 .

[0054] As shown in Figure 1, the voltage and frequency control system may include a delay detection section 10, a frequency control section 20, a performance statistics section 30, and a performance and power consumption level control section 40. These sections may be implemented using either software or hardware, and this embodiment of the present application does not limit this.

[0055] This application scenario also includes a hardware computing component 50, which can be the functional component of a system-on-chip (SoC) that provides computing power, such as a processor core. The performance of computing component 50 depends on its operating clock frequency; higher operating clock frequencies improve performance. The power consumption of computing component 50 is affected by the supply voltage and operating clock frequency, with higher supply voltages or operating clock frequencies also increasing power consumption. The voltage and frequency control system is configured to control the clock frequency and supply voltage of computing component 50 to ensure that the power consumption or performance of computing component 50 meets the required requirements.

[0056] The computing unit 50 typically operates under certain process, supply voltage, and device temperature conditions. These conditions vary from chip to chip, and even within the same chip, even with the same process, the supply voltage and device temperature can vary at different times. These conditions directly affect the circuit delay of the computing unit 50, which in turn determines the maximum operating clock frequency of the computing unit 50.

[0057] In the embodiment of the present application, the delay detection part 10 and the calculation part 50 are under the same operating conditions of process, supply voltage, and device temperature. That is, if the delay detection part 10 itself is a hardware component, it can be located in the silicon area or electronic device where the calculation part 50 is located. To ensure that the temperature of the delay detection part 10 and the calculation part 50 is the same, the delay detection part 10 (or the processor that implements the delay detection part 10) and the calculation part 50 can be physically adjacent. In the example of Figure 1, the delay detection part 10 can be a hardware component, and the calculation part 50 and the delay detection part 10 can both be located on the electronic device 1.

[0058] When the frequency control section 20, the performance statistics section 30, and the performance and power consumption level control section 40 are hardware components, they can be provided in the silicon region or electronic device where the computing section 50 is located, or in other electronic devices that can communicate with the electronic device where the computing section 50 is located. In the example of FIG1 , the frequency control section 20, the performance statistics section 30, and the performance and power consumption level control section 40 can be provided together on an electronic device 2 that can communicate with the electronic device 1. The frequency control section 20 and the performance statistics section 30 can be hardware components, and the performance and power consumption level control section 40 can be a software component. The performance and power consumption level control section 40 can be implemented by a processor (not shown) on the electronic device 2.

[0059] The delay detection section 10 can communicate with the frequency control section 20 and the calculation section 50. The frequency control section 20 can communicate with the delay detection section 10 and the performance and power level control section 40. The performance statistics section 30 can communicate with the performance and power level control section 40 and the calculation section 50. The performance and power level control section 40 can communicate with the frequency control section 20 and the performance statistics section 30. The calculation section 50 can communicate with the delay detection section 10, the frequency control section 20, and the performance statistics section 30. For specific communication details, please refer to the relevant description of FIG. 2 below.

[0060] The following describes an exemplary working method of the voltage and frequency control system according to an embodiment of the present application. FIG2 shows an exemplary working process of the voltage and frequency control system according to an embodiment of the present application.

[0061] As shown in FIG2 , in some implementations, the delay detection section 10 is configured to detect the circuit delay of the calculation section 50 in real time and output the circuit delay to the frequency control section 20 ;

[0062] The frequency control section 20 is configured to control the frequency of the clock signal output to the calculation section 50 according to the current power supply voltage and circuit delay, the current power supply voltage being provided by the performance and power consumption level control section 40;

[0063] The performance statistics section 30 is configured to periodically detect the performance of the calculation section 50 , obtain actual performance, and output it to the performance and power consumption level control section 40 ;

[0064] The performance and power consumption level control section 40 is configured to control the supply voltage output to the frequency control section 20 and the calculation section 50 according to a preset performance target and actual performance, so that the final actual performance approaches the performance target.

[0065] For example, in an embodiment of the present application, the delay detection part 10 and the frequency control part 20 jointly implement real-time inner-loop control of the frequency of the clock signal of the computing part 50, and the frequency control part 20, the performance statistics part 30, and the performance and power consumption level control part 40 jointly implement periodic outer-loop control of the power supply voltage and the frequency of the clock signal of the computing part 50.

[0066] The following describes an exemplary method of inner-loop control of the frequency of the clock signal of the computing part 50 according to an embodiment of the present application in conjunction with FIG. 2 .

[0067] In some implementations, the delay detection part 10 and the calculation part 50 physically maintain the same working conditions of process characteristics, supply voltage, and device temperature.

[0068] Real-time detection of circuit delays in the calculation part, including:

[0069] The circuit delay of the calculation part 50 is detected in real time under the working conditions of the current process characteristics, the current power supply voltage and the current device temperature.

[0070] For example, since the delay detection section 10 and the calculation section 50 are operated under the same process, power supply voltage, and device temperature, the circuit delay of the delay detection section 10 and the circuit delay of the calculation section 50 at the same time are consistent. In this case, the delay detection section 10 can detect its own circuit delay under the current process, power supply voltage, and temperature conditions in real time and output the detected circuit delay to the frequency control section 20. Circuit delay detection can be implemented based on relevant technologies. For example, it can be implemented using a key timing path simulation method in relevant technologies, that is, simulating the key timing path in the calculation section 50 and using a delay detection chain composed of minimum delay units to detect changes in the path timing, thereby determining the circuit delay based on the timing changes. Alternatively, a fixed-frequency clock signal can be used, and a delay detection chain composed of minimum delay units can be used to detect changes in the rising or falling edges of the clock signal, thereby determining the circuit delay based on the changes in the rising or falling edges of the clock signal. The circuit delay can be represented by a multi-bit binary code (the larger the circuit delay, the larger the decimal value corresponding to the binary code) and provided to the frequency control section 20. The detection time cost of circuit delay is very low, usually in nanoseconds.

[0071] Since the delay detection part and the calculation part use the same process, power supply voltage, and device temperature, the circuit delay of the delay detection part itself and the circuit delay of the calculation part can be consistent. By detecting the circuit delay of the delay detection part itself, the circuit delay of the calculation part can be detected, which can further reduce time costs and improve control efficiency.

[0072] Those skilled in the art should understand that there are many ways to implement circuit delay detection. As long as the circuit delay can promptly reflect changes in process, power supply voltage, and device temperature conditions, and can promptly reflect the circuit delay of the calculation part 50, the embodiment of the present application does not limit the specific detection method adopted by the delay detection part 10.

[0073] The frequency control part 20 and the computing part 50 have the same power supply voltage, and both are provided by the performance and power consumption level control part 40. Therefore, the current power supply voltage of the frequency control part 20 is also the current power supply voltage of the computing part 50. The frequency control part 20 can control the frequency of the clock signal output to the computing part 50 based on the current power supply voltage and circuit delay. Its exemplary control method can be found in the relevant description below. Since the delay detection part 10 detects the circuit delay in real time, the circuit delay is also transmitted to the frequency control part 20 in real time. The frequency control part 20 determines the frequency of the clock signal in real time, so the inner loop control is a more efficient control.

[0074] 2 , an exemplary method of outer loop control of the power supply voltage and the frequency of the clock signal of the computing part 50 according to an embodiment of the present application will be described.

[0075] The performance statistics section 30 can periodically detect the performance (referring to computing performance) of the computing section 50, obtain actual performance (referring to actual computing performance) and output it to the performance and power consumption level control section 40. Performance can refer to computing performance such as computing efficiency and memory access utilization of the computing section 50. For example, the computing section 50 is typically provided with at least one performance counter, each of which is configured to detect the performance of a portion of the circuitry of the computing section 50. The performance detection criteria of each performance counter may be the same or different. The counting results of the performance counters directly indicate the quality of the performance. The performance statistics section 30 can periodically obtain the counting results of each performance counter according to a preset performance statistics period (which may be around tens of microseconds (μs) or hundreds of microseconds (μs)). Based on these counting results, the performance statistics section 30 can determine the actual performance of the computing section 50 by weighted averaging. The weight of the counting result of each performance counter can be determined based on the performance detection criteria of the performance counter and / or parameters such as the area of ​​the portion of circuitry corresponding to the performance counter.

[0076] The user can preset a performance target for the computing part 50. The performance target indicates that the user hopes that the actual performance of the computing part will reach or exceed the performance target. The performance and power consumption level control part 40 can control the power supply voltage output to the frequency control part 20 and the computing part 50 based on the preset performance target and actual performance. Its exemplary control method can be found in the relevant description below. Since the performance statistics part 30 periodically detects the performance of the computing part 50, the actual performance obtained is also periodically transmitted to the performance and power consumption level control part 40. The performance and power consumption level control part 40 periodically controls the output power supply voltage, and the control period and the actual performance acquisition period can be similar, for example, it may be on the order of tens of microseconds (μs) or hundreds of microseconds (μs). The power supply voltage has a direct impact on the frequency of the clock signal, and thus the control of the frequency of the clock signal is also achieved at the same time.

[0077] According to the voltage and frequency control system of the application embodiment, the time required to detect circuit delay is greatly reduced compared to detecting process, supply voltage, and temperature, thereby improving detection efficiency. The circuit delay characteristics determine the maximum operating clock frequency of the calculation part under a certain supply voltage. Therefore, the frequency control part uses the supply voltage and delay to control the frequency of the clock signal, and can achieve the same accuracy as using the process, supply voltage, and temperature to determine the frequency of the clock signal. The real-time acquisition of circuit delay enables the frequency control part to also achieve real-time frequency control, thereby improving the frequency control efficiency while meeting accuracy. The performance statistics part periodically detects the performance of the calculation part, obtains the actual performance, and outputs it to the performance and power consumption level control part. The performance and power consumption level control part controls the supply voltage output to the frequency control part and the calculation part based on the preset performance target and actual performance, realizing periodic supply voltage control and forming a closed control loop. And because the control is based on the preset performance target and actual performance, the control of the supply voltage is more accurate. And the supply voltage has a direct impact on the frequency of the clock signal, thus achieving more accurate adjustment of the supply voltage and clock signal frequency. The voltage and frequency control system of the embodiment of the present application reduces circuit timing redundancy, maximizes performance, and optimizes control efficiency through the real-time frequency control of the inner loop's delay detection part and the frequency control part. The periodic voltage control and periodic frequency control are performed through the performance statistics part and the performance and power consumption level control part of the outer loop to improve the control accuracy, thereby being able to take into account both performance and control efficiency improvements. Therefore, the combination of the inner loop and the outer loop achieves both efficiency and accuracy, which can make the performance improvement effect better.

[0078] Compared with the millisecond-level process, temperature, and voltage detection of the related art 1, the embodiment of the present application only takes a few nanoseconds to complete the delay detection, which greatly reduces the detection time.

[0079] Compared with the second related technology, the voltage control period of the embodiment of the present application is only limited by the period setting of the performance statistics part and the time required for the performance statistics part to complete the acquisition of actual performance. Therefore, the voltage control period can be as low as tens of microseconds or hundreds of microseconds, which is much smaller than the millisecond-level voltage control period of the second related technology.

[0080] Compared to Related Art 1 and Related Art 2, the embodiment of the present application does not require pre-fitting of a frequency-voltage configuration table, thereby reducing data processing costs and avoiding the problem of reduced accuracy caused by using a frequency-voltage configuration table. This greatly improves the accuracy of performance and power consumption control.

[0081] An exemplary control method for the frequency of the clock signal in the inner loop control is described below.

[0082] In some implementations, controlling the frequency of a clock signal output to the computing portion based on a current power supply voltage and a circuit delay includes:

[0083] The maximum frequency under the current power supply voltage and circuit delay is determined, and the frequency of the clock signal output to the calculation part is controlled to be equal to the maximum frequency.

[0084] For example, without considering performance targets and power consumption requirements, the purpose of inner-loop control is to control the frequency of the clock signal so that the computing component can achieve maximum performance under current operating conditions (supply voltage, device temperature, and process characteristics). The higher the clock signal frequency, the higher the computing component's performance. Therefore, the frequency control unit 20 controls the frequency of the clock signal output to the computing component 50 based on the current supply voltage and delay. This can be done by determining the maximum frequency under the current supply voltage and circuit delay. Since circuit delay is inherently related to current operating conditions, the maximum frequency under the current supply voltage and circuit delay is also the maximum frequency under the current operating conditions. The frequency of the clock signal output to the computing component 50 is then controlled to be equal to the maximum frequency. Under a given supply voltage, the correlation between circuit delay and maximum frequency is known: the smaller the circuit delay, the greater the maximum frequency. Therefore, based on this known correlation, the maximum frequency can be uniquely determined using the supply voltage and circuit delay.

[0085] For example, the frequency control unit 20 may include a clock frequency generation circuit (not shown) of related art, which generates and outputs a clock signal. The time required to generate and output the clock signal may be in the nanosecond (ns) level.

[0086] In this way, the performance potential of the computing part under a certain power supply voltage can be fully utilized.

[0087] The following describes an exemplary control method for the power supply voltage in the outer loop control.

[0088] In some implementations, the performance and power consumption level control portion is pre-set with multiple levels of voltage values, and the higher the voltage level, the greater the voltage value.

[0089] The controlling of the supply voltage output to the frequency control part and the calculation part according to the preset performance target and the actual performance includes:

[0090] When the performance target is greater than the actual performance, the voltage level of the power supply voltage of the control output is increased;

[0091] When the performance target is less than the actual performance, the voltage level of the output power supply voltage is controlled to be reduced.

[0092] For example, without considering power consumption requirements, the purpose of outer-loop control is to adjust the supply voltage based on the feedback of current actual performance, so that the actual performance of the computing section 50 at the adjusted supply voltage more closely approaches the set performance target. The control period of the outer-loop control depends on the performance statistics period and the time required for supply voltage control. The control period of the outer-loop control can be as low as tens to hundreds of microseconds, which is much shorter than the traditional AVFS control period. To this end, the performance and power consumption level control section 40 can be pre-set with multiple voltage levels, with the voltage value increasing with higher levels, to implement voltage level control. A higher supply voltage corresponds to higher performance of the computing section 50. Therefore, the supply voltage output to the frequency control section and the computing section can be controlled based on the preset performance target and actual performance. This can be achieved by increasing the output voltage level when the performance target exceeds the actual performance and decreasing the output voltage level when the performance target falls short of the actual performance. For example, a proportional-integral-derivative control algorithm similar to the related art can be employed to ensure that the supply voltage reaches a certain voltage level.

[0093] The supply voltage is output to both the frequency control section 20 and the calculation section 50. When the supply voltage is higher, the maximum frequency value determined by the frequency control section 20 is also higher, thereby increasing the frequency of the clock signal output to the calculation section 50. Therefore, the performance of the calculation section 50 is improved.

[0094] This approach allows the preset performance targets to be achieved at the lowest supply voltage, thus reducing power consumption. Combined with inner-loop control, the computing component can more quickly approach performance targets at lower supply voltage levels and power consumption, significantly improving the computing power-to-power ratio.

[0095] In some implementations, if the difference between the performance target and the actual performance is greater than a first threshold, the performance and power consumption level control portion is further configured to output a first clock control instruction to the frequency control portion;

[0096] The frequency control section is further configured to control the frequency of the clock signal to increase by a second threshold value according to the first clock control instruction;

[0097] In the case where the difference between the actual performance and the performance target is greater than the first threshold, the performance and power consumption level control section is further configured to output a second clock control instruction to the frequency control section;

[0098] The frequency control section is further configured to control the value of the frequency of the clock signal of the calculation section to be lowered by a third threshold value according to the second clock control instruction.

[0099] For example, since the power supply voltage is output to the frequency control part 20, and the frequency control part 20 has the ability to directly control the frequency of the clock signal, therefore, when the gap between the performance target and the actual performance is too large, the frequency control capability of the frequency control part 20 can be used to control the power supply voltage of the computing part 50 while also controlling the frequency of the clock signal of the computing part 50, thereby improving the control efficiency.

[0100] For example, a first threshold can be preset. If the difference between the performance target and the actual performance is greater than the first threshold, it indicates that the performance of the computing part 50 is lower than the performance requirement. To improve the performance of the computing part 50, the performance and power consumption level control part 40 can further output a first clock control instruction to the frequency control part 20, and the frequency control part 20 can control the clock frequency to increase by a second threshold according to the first clock control instruction. The second threshold can be preset, that is, the first clock control instruction can be used to force the frequency of the clock signal to increase by a certain value.

[0101] Similarly, if the difference between the actual performance and the performance target is greater than the first threshold, it indicates that the performance of the computing unit 50 exceeds the performance requirement, and higher performance may result in greater power consumption. To reduce the performance of the computing unit 50, and therefore reduce power consumption, the performance and power consumption level control unit 40 can also output a second clock control instruction to the frequency control unit 20, and the frequency control unit 20 can control the clock frequency to decrease by a third threshold value based on the second clock control instruction. The third threshold value can be pre-set, that is, the second clock control instruction can be used to force the clock signal frequency to decrease by a certain value.

[0102] The first threshold, the second threshold, and the third threshold can be set according to the requirements of the application scenario. The embodiment of the present application does not limit the specific values ​​of the first threshold, the second threshold, and the third threshold.

[0103] For the frequency control part 20, the control method of controlling the frequency of the clock signal based on the power supply voltage and circuit delay (reaching the maximum frequency) is different from the control method of controlling the frequency of the clock signal based on the performance target and actual performance (increasing the second threshold or lowering the third threshold). Therefore, although both control the frequency of the clock signal, the two do not conflict.

[0104] In this way, the computational part can be accelerated to reach the performance target.

[0105] In some application scenarios, users may wish to ensure that the power consumption of the computing portion does not exceed a preset power consumption benchmark. To meet this user requirement, the voltage and frequency control system of the present embodiment also features accurate power consumption control. Figure 3 shows a schematic diagram of the structure of the voltage and frequency control system according to the present embodiment.

[0106] In some implementations, the system further includes a power consumption statistics section 60 , which is configured to periodically detect the power consumption of the calculation section 50 , obtain actual power consumption, and output the actual power consumption to the frequency control section 20 and the performance and power consumption level control section 40 ;

[0107] The frequency control section 20 is further configured to control the frequency of the clock signal output to the calculation section 50 based on a preset power consumption reference and actual power consumption, so that the first power consumption estimate value of the calculation section 50 when operating at the frequency does not exceed the power consumption reference;

[0108] The performance and power consumption level control section 40 is further configured to control the power supply voltage output to the frequency control section 20 and the calculation section 50 according to a preset power consumption reference and actual power consumption.

[0109] As shown in Figure 3, the power consumption statistics section 60 can periodically detect the power consumption of the calculation section 50, obtain the actual power consumption and output it to the frequency control section 20 and the performance and power consumption level control section 40. For example, the calculation section 50 is usually provided with at least one power consumption counter, each of which is configured to detect the power consumption of a portion of the circuit of the calculation section 50. The power consumption detection standards of each power consumption counter may be the same or different. The counting result of the power consumption counter directly indicates the amount of power consumption. The power consumption statistics section 60 can periodically obtain the counting results of each power consumption counter according to a preset power consumption statistics period (which may be around tens of microseconds (μs) or hundreds of microseconds (μs)). Based on these counting results, the power consumption statistics section 60 can determine the actual power consumption of the calculation section 50 through weighted averaging and certain calculations. The weight of the counting result of each power consumption counter can be determined based on the power consumption detection standard of the power consumption counter and / or parameters such as the area of ​​the portion of the circuit corresponding to the power consumption counter.

[0110] The power consumption statistics period of the power consumption statistics part 60 and the performance statistics period of the performance statistics part 30 may be the same as or different from each other, and this embodiment of the present application does not impose any limitation on this.

[0111] The user can preset a power consumption benchmark for the computing section 50. The power consumption benchmark indicates that the user wishes the actual power consumption of the computing section 50 to not exceed the power consumption benchmark. The frequency control section 20 can periodically control the frequency of the clock signal output to the computing section 50 based on the preset power consumption benchmark and actual power consumption, so that the first power consumption estimate of the computing section 50 when operating at the frequency does not exceed the power consumption benchmark. An exemplary control method can be found in the relevant description below. Real-time frequency control based on the power consumption benchmark and actual power consumption is also equivalent to real-time power consumption control, which can keep actual power consumption below the power consumption benchmark, meet system power consumption requirements, and make the system more stable and reliable.

[0112] The performance and power consumption level control section 40 can periodically control the power supply voltage output to the frequency control section 20 and the computing section 50 based on a preset power consumption benchmark and actual power consumption to prevent the actual power consumption of the computing section from exceeding the power consumption benchmark requirements. If the performance target is not considered, the power supply voltage can be controlled to a maximum power supply voltage that ensures that the actual power consumption of the computing section does not exceed the power consumption benchmark requirements. As described above, the performance and power consumption level control section 40 can also control the power supply voltage based on the performance target and actual performance. Therefore, when the voltage and frequency control system includes the power consumption statistics section 60, the performance and power consumption level control section 40 has two power supply voltage control methods. Examples of the two control methods can be found in the further description below.

[0113] In this way, based on the performance target, the power consumption benchmark is further considered, so that the control of power consumption is more precise.

[0114] The following describes an exemplary manner in which the frequency control portion controls the frequency of the clock signal output to the calculation portion based on a preset power consumption reference and actual power consumption.

[0115] In some implementations, controlling the frequency of a clock signal output to the computing part according to a preset power consumption benchmark and actual power consumption includes:

[0116] When the difference between the actual power consumption and the power consumption reference is greater than a fourth threshold, the frequency of the output clock signal is controlled to be equal to the product of the maximum frequency and a preset coefficient, and the value of the preset coefficient is less than 1.

[0117] For example, although the clock signal frequency and supply voltage have been controlled based on the power consumption benchmark and actual power consumption, in theory, the actual power consumption of the computing part 50 at this frequency and supply voltage will not exceed the power consumption benchmark. However, the actual operating conditions of the computing part 50 are constantly changing, which means that the actual power consumption of the computing part 50 may still exceed the power consumption benchmark. To address this, a fourth threshold can be pre-set. It can be assumed that when the difference between the actual power consumption and the power consumption benchmark is less than or equal to the fourth threshold, the actual power consumption is within a relatively safe range, and the efficiency of controlling the clock signal frequency and supply voltage using the power consumption benchmark and actual power consumption is still acceptable. However, if the difference between the actual power consumption and the power consumption benchmark is greater than the fourth threshold, it indicates that the actual power consumption is excessive, which risks damaging the computing part 50 and also places significant pressure on the power supply and heat dissipation of the computing part. In this case, controlling the clock signal frequency and supply voltage using the power consumption benchmark and actual power consumption may be slow, and the clock signal frequency needs to be reduced as soon as possible.

[0118] To accelerate the reduction rate of the clock signal frequency, the frequency control unit 20 can be configured to control the frequency of the output clock signal to be equal to the product of the maximum frequency and a preset coefficient when the difference between the actual power consumption and the power consumption reference is greater than a fourth threshold, where the value of the preset coefficient is less than 1. The product of the maximum frequency and the preset coefficient can represent a low-frequency clock signal. The preset coefficient can be set to a small value so that the frequency of the low-frequency clock signal is lower than the frequency of the current clock signal. The calculation unit 50 operates under the low-frequency clock signal, and its actual power consumption does not exceed the power consumption reference.

[0119] For the frequency control unit 20, the control method for controlling the clock signal frequency based on the power consumption benchmark and actual power consumption (reducing it to the product of the maximum frequency and a preset coefficient) and the control method for controlling the clock signal frequency based on the supply voltage and circuit delay (reaching the maximum frequency) are both control methods for controlling the frequency to a specific value, and therefore may cause a conflict. In the event of a conflict, satisfying the power consumption benchmark takes priority, that is, controlling the clock signal frequency to be reduced to the product of the maximum frequency and the preset coefficient.

[0120] In this way, when the power consumption of the computing part is high, the power consumption can be reduced more quickly.

[0121] As can be seen from the above description, when the voltage and frequency control system includes the power consumption statistics part 60, there are two ways to control the supply voltage, one of which can be regarded as a response to the received actual performance and the other as a response to the received actual power consumption.

[0122] The following describes an exemplary method in which the frequency performance and power consumption level control part controls the power supply voltage output to the frequency control part and the calculation part according to preset performance targets and actual performance when the voltage and frequency control system includes a power consumption statistics part.

[0123] In some implementations, the performance and power consumption level control section 40 is pre-set with multiple levels of voltage values, and the higher the voltage level, the greater the voltage value.

[0124] Controlling the supply voltage output to the frequency control section 20 and the calculation section 50 according to the preset performance target and the actual performance includes:

[0125] When the performance target is greater than the actual performance, determining a voltage level of the first target power supply voltage so that the voltage level of the first target power supply voltage is higher than the voltage level of the current power supply voltage;

[0126] When the performance target is lower than the actual performance, determining a voltage level of the first target power supply voltage so that the voltage level of the first target power supply voltage is lower than the voltage level of the current power supply voltage;

[0127] determining a first power consumption estimate of the computing portion 50 when operating at a first target supply voltage;

[0128] When the first power consumption estimate value is less than the power consumption reference, the power supply voltage output to the frequency control part 20 and the calculation part 50 is controlled to be equal to the first target power supply voltage;

[0129] In the case where the first power consumption estimation value is greater than the power consumption reference, the power supply voltage output to the frequency control part 20 and the calculation part 50 is controlled according to the preset power consumption reference and the actual power consumption.

[0130] For example, the power supply voltage of the computing part 50 has a significant impact on the power consumption of the computing part 50. The relationship between the two is shown in formulas (1) to (3):

[0131] P total =P dynamic +P static (1)

[0132] P dynamic =α·C load ·F clk ·V 2 (2)

[0133] Among them, F clk represents the frequency of the clock signal, V represents the supply voltage, C load represents the equivalent load capacitance of the calculation part 50, α represents the circuit inversion factor, V th represents the threshold voltage of the calculation part 50, V T represents the thermal voltage of the calculation part 50, that is, the potential difference caused by the temperature difference, and β and γ represent the process parameters of the calculation part 50. dynamic represents the power consumption of the computing part 50 when it operates under the power supply voltage and the frequency of the clock signal, P static Indicates the additional power consumption caused by process and temperature, P total represents the total power consumption of the computing section 50 .

[0134] Under the premise of considering the power consumption benchmark, the purpose of the outer loop control is to ensure that the actual performance of the computing part 50 is closer to the set performance target under the premise that the power consumption of the computing part 50 under the controlled power supply voltage does not exceed the power consumption benchmark.

[0135] To this end, the performance and power consumption level control unit 40 can be pre-set with multiple levels of voltage values, and the voltage value is set to increase with the higher the level, so as to implement level control of the voltage value. The number of levels can be set according to actual needs, and the voltage value difference between adjacent levels can be set to 10mV, 5mV, or other values. The embodiment of the present application does not limit the specific number of levels or the voltage value difference between adjacent levels.

[0136] The higher the supply voltage, the higher the performance of the computing section 50. Therefore, to control the supply voltage output to the frequency control section 20 and the computing section 50 based on a preset performance target and actual performance, a target voltage level can be determined based on the performance target and actual performance, and then a determination is made as to whether the estimated power consumption of the computing section at that voltage level exceeds a power consumption benchmark. If the power consumption benchmark is not exceeded, the supply voltage is controlled to be equal to the voltage value of that voltage level. If the power consumption benchmark is exceeded, the supply voltage control method is determined based on the power consumption benchmark and actual power consumption (an example of which is described below).

[0137] For example, when the performance target is greater than the actual performance, the voltage value level of the first target supply voltage (that is, the target voltage value level) can be determined so that the voltage value level of the first target supply voltage is higher than the voltage value level of the current supply voltage; when the performance target is less than the actual performance, the voltage value level of the first target supply voltage (that is, the target voltage value level) can be determined so that the voltage value level of the first target supply voltage is lower than the voltage value level of the current supply voltage.

[0138] Next, a first power consumption estimate is determined when the computing portion operates at a first target power supply voltage. If the first power consumption estimate is less than a power consumption reference, the power supply voltage output to the frequency control portion 20 and the computing portion 50 is controlled to be equal to the first target power supply voltage. For example, a proportional-integral-differential control algorithm similar to that of related art can be employed to ensure that the power supply voltage reaches a certain voltage value. If the first power consumption estimate is greater than the power consumption reference, the power supply voltage output to the frequency control portion 20 and the computing portion 50 is controlled based on a preset power consumption reference and actual power consumption (an example of which is described below).

[0139] In this way, the power consumption of the computing part under the power supply voltage can be ensured not to exceed the power consumption benchmark, thereby providing stronger protection for the computing part.

[0140] Those skilled in the art will appreciate that, in the case where the voltage and frequency control system does not include the power consumption statistics section 60, as long as a power consumption benchmark is preset, the performance and power consumption level control section 40 can still complete the determination of the voltage value level of the first target power supply voltage, and the determination of the first power consumption estimate when the calculation section 50 operates at the first target power supply voltage. In the case where the first power consumption estimate is less than the power consumption benchmark, the power supply voltage output to the frequency control section 20 and the calculation section 50 can still be controlled to be equal to the first target power supply voltage. In the case where the first power consumption estimate is greater than the power consumption benchmark, the voltage value level of the output power supply voltage can be directly controlled to be reduced, and a third clock control instruction can be issued. The frequency control section 20 can also control the frequency of the clock signal to be reduced by a certain value (e.g., a preset sixth threshold, etc.) according to the third clock control instruction.

[0141] The following describes an exemplary method in which the frequency performance and power consumption level control part controls the power supply voltage output to the frequency control part and the calculation part according to the preset actual power consumption and power consumption benchmark when the voltage and frequency control system includes a power consumption statistics part.

[0142] In some implementations, controlling the supply voltage output to the frequency control part 20 and the calculation part 50 according to a preset power consumption reference and actual power consumption includes:

[0143] When the difference between the actual power consumption and the power consumption reference is greater than a fifth threshold, determining a voltage level of the second target power supply voltage so that a second power consumption estimate when the computing part operates at the second target power supply voltage is less than the power consumption reference, and the difference between the second power consumption estimate and the power consumption reference is minimized;

[0144] The power supply voltage output to the frequency control part 20 and the calculation part 50 is controlled to be equal to the second target power supply voltage.

[0145] For example, when the performance of computing section 50 meets the performance target, the power consumption of computing section 50 may not necessarily meet the power consumption benchmark. However, when the power consumption of computing section 50 meets the power consumption benchmark, the current performance is deemed acceptable to the user, regardless of whether the performance of computing section 50 meets the performance target. Therefore, when the difference between the actual power consumption and the power consumption benchmark is greater than the fifth threshold, the voltage level of the second target power supply voltage can be determined, and a second power consumption estimate when computing section 50 operates at the second target power supply voltage can be determined. The voltage level of the second target power supply voltage at which the second power consumption estimate is less than the power consumption benchmark and the difference between the second power consumption estimate and the power consumption benchmark is minimized is selected as the determined second target power supply voltage level. The power supply voltage output to frequency control section 20 and computing section 50 is controlled to be equal to the second target power supply voltage. At this point, the performance of computing section 50 at the second target power supply voltage has reached the maximum performance under the power consumption benchmark, and therefore, it is not necessary to determine whether the performance at this point meets the performance target.

[0146] In this way, while ensuring that the power consumption of the computing part under the power supply voltage does not exceed the power consumption benchmark, the power supply voltage can be maximized, so that the computing part can achieve optimal performance.

[0147] Those skilled in the art should understand that when the voltage and frequency control system includes a power consumption statistics part 60, the performance and power consumption level control part 40 may also output a first clock control instruction and a second clock control instruction when the conditions described above are met, so as to make the control more efficient.

[0148] In some implementations, the performance and power consumption level control part 40 is also configured to obtain an analysis report at the end of the current cycle based on one or more of the actual performance, actual power consumption, changes in the output power supply voltage, and output instructions obtained in the current cycle, and the analysis report is used to adjust the performance target and power consumption benchmark used in the next cycle.

[0149] For example, the current cycle may refer to the performance statistics cycle of the performance statistics part 30, in which case an analysis report may be obtained based on one or more of the actual performance obtained in the current cycle, the change in the output power supply voltage, and the output instructions; the current cycle may also refer to the power consumption statistics cycle of the power consumption statistics part 60, in which case an analysis report may be obtained based on one or more of the actual power consumption obtained in the current cycle, the change in the output power supply voltage, and the output instructions.

[0150] If the preset performance target and the preset power consumption benchmark are output by a certain device (such as a user device) to the performance and power consumption level control part 40, the performance and power consumption level control part 40 can feed back the analysis report to the device. The device adjusts the performance target and power consumption benchmark used in the next cycle based on the analysis report and the preset performance target and preset power consumption benchmark of the current cycle, and then outputs them to the performance and power consumption level control part 40. If the preset performance target and the preset power consumption benchmark are determined by the performance and power consumption level control part 40 itself, the performance and power consumption level control part 40 can directly adjust the performance target and power consumption benchmark used in the next cycle based on the analysis report and the preset performance target and preset power consumption benchmark of the current cycle. The embodiment of the present application does not limit the execution object of the step of using the analysis report to adjust the performance target and power consumption benchmark used in the next cycle.

[0151] In this way, performance targets and power consumption baselines can be updated in a timely manner.

[0152] An embodiment of the present application further provides a voltage and frequency control method. FIG4 is a schematic diagram showing a process of the voltage and frequency control method according to an embodiment of the present application.

[0153] As shown in FIG4 , the method is applied to a voltage and frequency control system. The system includes a delay detection portion, a frequency control portion, a performance statistics portion, and a performance and power consumption level control portion. The system is configured to control the clock frequency and supply voltage of a computing portion. The method includes steps S41 to S44:

[0154] Step S41, detecting the circuit delay of the calculation part in real time through the delay detection part, and outputting the circuit delay to the frequency control part;

[0155] Step S42, controlling the frequency of the clock signal output to the calculation part according to the current power supply voltage and the circuit delay by the frequency control part, wherein the current power supply voltage is provided by the performance and power consumption level control part;

[0156] Step S43, periodically detecting the performance of the calculation part through the performance statistics part, obtaining actual performance and outputting it to the performance and power consumption level control part;

[0157] Step S44 , controlling the power supply voltage output to the frequency control part and the calculation part according to a preset performance target and the actual performance through the performance and power consumption level control part.

[0158] In some implementations, the delay detection part and the calculation part physically maintain the same working conditions of process characteristics, power supply voltage, and device temperature, and the real-time detection of the circuit delay of the calculation part includes: real-time detection of the circuit delay of the calculation part under the working conditions of current process characteristics, current power supply voltage, and current device temperature as the circuit delay of the calculation part.

[0159] In some implementations, controlling the frequency of the clock signal output to the computing part based on the current power supply voltage and the circuit delay includes: determining the maximum frequency under the current power supply voltage and the circuit delay, and controlling the frequency of the clock signal output to the computing part to be equal to the maximum frequency.

[0160] In some implementations, the method further includes: outputting a first clock control instruction to the frequency control part through the performance and power consumption level control part when the difference between the performance target and the actual performance is greater than a first threshold; controlling the frequency value of the clock signal to increase by a second threshold according to the first clock control instruction through the frequency control part; outputting a second clock control instruction to the frequency control part through the performance and power consumption level control part when the difference between the actual performance and the performance target is greater than the first threshold; controlling the frequency value of the clock signal of the computing part to decrease by a third threshold according to the second clock control instruction through the frequency control part.

[0161] In some implementations, the performance and power consumption level control part is pre-set with multiple levels of voltage values, and the higher the voltage value level, the larger the voltage value. The power supply voltage output to the frequency control part and the calculation part is controlled according to the preset performance target and the actual performance, including: when the performance target is greater than the actual performance, the voltage value level of the output power supply voltage is controlled to increase; when the performance target is less than the actual performance, the voltage value level of the output power supply voltage is controlled to decrease.

[0162] In some implementations, the system also includes a power consumption statistics part, and the method also includes: periodically detecting the power consumption of the computing part through the power consumption statistics part, obtaining the actual power consumption and outputting it to the frequency control part and the performance and power consumption level control part; controlling the frequency of the clock signal output to the computing part according to a preset power consumption benchmark and the actual power consumption through the frequency control part, so that the first power consumption estimate value of the computing part when operating at the frequency does not exceed the power consumption benchmark; controlling the power supply voltage output to the frequency control part and the computing part according to the preset power consumption benchmark and the actual power consumption through the performance and power consumption level control part.

[0163] In some implementations, controlling the frequency of the clock signal output to the computing part based on a preset power consumption benchmark and the actual power consumption includes: when the difference between the actual power consumption and the power consumption benchmark is greater than a fourth threshold, controlling the frequency of the output clock signal to be equal to the product of the maximum frequency value and a preset coefficient, and the value of the preset coefficient is less than 1.

[0164] In some implementations, the performance and power consumption level control portion is pre-set with multiple levels of voltage values, where a higher voltage level increases the voltage value. Controlling the power supply voltage output to the frequency control portion and the calculation portion based on the preset performance target and the actual performance includes: determining a voltage value level of a first target power supply voltage when the performance target is greater than the actual performance, such that the voltage value level of the first target power supply voltage is higher than the voltage value level of the current power supply voltage; determining a voltage value level of the first target power supply voltage when the performance target is less than the actual performance, such that the voltage value level of the first target power supply voltage is lower than the voltage value level of the current power supply voltage; determining a first power consumption estimate when the calculation portion operates at the first target power supply voltage; controlling the power supply voltage output to the frequency control portion and the calculation portion to be equal to the first target power supply voltage when the first power consumption estimate is less than the power consumption reference; and controlling the power supply voltage output to the frequency control portion and the calculation portion based on the preset power consumption reference and the actual power consumption when the first power consumption estimate is greater than the power consumption reference.

[0165] In some implementations, controlling the power supply voltage output to the frequency control part and the calculation part based on a preset power consumption benchmark and the actual power consumption includes: when the difference between the actual power consumption and the power consumption benchmark is greater than a fifth threshold, determining the voltage value level of the second target power supply voltage so that the second power consumption estimate of the calculation part when operating at the second target power supply voltage is less than the power consumption benchmark, and the difference between the second power consumption estimate and the power consumption benchmark is minimized; and controlling the power supply voltage output to the frequency control part and the calculation part to be equal to the second target power supply voltage.

[0166] In some implementations, the method further includes: at the end of the current cycle, the performance and power consumption level control part obtains an analysis report based on one or more of the actual performance, actual power consumption, changes in the output power supply voltage, and output instructions obtained in the current cycle, and the analysis report is used to adjust the performance target and the power consumption benchmark used in the next cycle.

[0167] In some embodiments, the method provided by the embodiments of the present application can be executed by the parts included in the above system embodiments, and its specific implementation can refer to the description of the above system embodiments.

[0168] The present application also provides a computer-readable storage medium having computer program instructions stored thereon, wherein the computer program instructions, when executed by a processor, implement the steps of the method in any of the above embodiments. The computer-readable storage medium may be a volatile or non-volatile computer-readable storage medium.

[0169] An embodiment of the present application further provides a computer program product, including a computer program or instructions, which, when executed by a processor, implements the steps of the method in any of the above embodiments.

[0170] An embodiment of the present application further provides an electronic device, including a processor and a memory, wherein the memory stores a computer program that can be run on the processor, and when the processor executes the program, the steps in the method of any of the above embodiments are implemented.

[0171] FIG5 shows a block diagram of an electronic device 1900 according to an embodiment of the present application. For example, the electronic device 1900 can be provided as a server or a terminal device. Referring to FIG5 , the electronic device 1900 includes a processing component 1922, which includes one or more processors, and a memory resource represented by a memory 1932, which is configured to store instructions executable by the processing component 1922, such as an application. The application stored in the memory 1932 can include one or more parts, each corresponding to a set of instructions. In addition, the processing component 1922 is configured to execute instructions to perform the above method.

[0172] The electronic device 1900 may further include a power supply component 1926 configured to perform power management of the electronic device 1900, a wired or wireless network interface 1950 configured to connect the electronic device 1900 to a network, and an input / output interface 1958 (I / O interface). The electronic device 1900 may operate based on an operating system stored in the memory 1932, such as Windows Server™, Mac OS X™, Unix™, Linux™, FreeBSD™, or the like.

[0173] In an exemplary embodiment, a non-volatile computer-readable storage medium is also provided, such as a memory 1932 including computer program instructions that can be executed by the processing component 1922 of the electronic device 1900 to perform the above method.

[0174] The present application may be a system, method and / or computer program product. The computer program product may include a computer-readable storage medium carrying computer-readable program instructions for causing a processor to implement various aspects of the present application.

[0175] A computer-readable storage medium may be a tangible device that can hold and store instructions for use by an instruction execution device. A computer-readable storage medium may be, for example, but not limited to, an electrical storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination thereof. More specific examples (a non-exhaustive list) of computer-readable storage media include: a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM) or flash memory, a static random access memory (RAM), a portable compact disc read-only memory (CD-ROM), a digital versatile disc (DVD), a memory stick, a floppy disk, a mechanical encoding device, such as a punch card or a raised structure in a groove on which instructions are stored, and any suitable combination thereof. The computer-readable storage medium used herein is not to be construed as a transient signal per se, such as a radio wave or other freely propagating electromagnetic wave, an electromagnetic wave propagating through a waveguide or other transmission medium (e.g., light pulses through a fiber optic cable), or an electrical signal transmitted through wires.

[0176] The computer-readable program instructions described herein can be downloaded from a computer-readable storage medium to each computing / processing device, or downloaded to an external computer or external storage device via a network, such as the Internet, a local area network, a wide area network, and / or a wireless network. The network can include copper transmission cables, fiber optic transmission, wireless transmission, routers, firewalls, switches, gateway computers, and / or edge servers. The network adapter card or network interface in each computing / processing device receives the computer-readable program instructions from the network and forwards the computer-readable program instructions to be stored in the computer-readable storage medium in each computing / processing device.

[0177] The computer program instructions for performing the operations of the present application may be assembly instructions, instruction set architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, state setting data, or source code or object code written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Smalltalk, C++, and conventional procedural programming languages ​​such as "C" or similar programming languages. The computer-readable program instructions may be executed entirely on the user's computer, partially on the user's computer, as a separate software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer via any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., via the Internet using an Internet service provider). In some embodiments, by utilizing the state information of computer-readable program instructions to personalize an electronic circuit, such as a programmable logic circuit, a field programmable gate array (FPGA), or a programmable logic array (PLA), the electronic circuit can execute the computer-readable program instructions, thereby implementing various aspects of the present application.

[0178] Various aspects of the present application are described herein with reference to flowcharts and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the present application. It should be understood that each block of the flowcharts and / or block diagrams, and combinations of blocks in the flowcharts and / or block diagrams, can be implemented by computer-readable program instructions.

[0179] These computer-readable program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, thereby producing a machine, so that when these instructions are executed by the processor of the computer or other programmable data processing device, a device is generated that implements the functions / actions specified in one or more blocks in the flowchart and / or block diagram. These computer-readable program instructions can also be stored in a computer-readable storage medium, where these instructions cause the computer, programmable data processing device, and / or other device to operate in a specific manner. Thus, the computer-readable medium storing the instructions comprises an article of manufacture that includes instructions for implementing various aspects of the functions / actions specified in one or more blocks in the flowchart and / or block diagram.

[0180] Computer-readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other device so that a series of operational steps are performed on the computer, other programmable data processing apparatus, or other device to produce a computer-implemented process, thereby causing the instructions executed on the computer, other programmable data processing apparatus, or other device to implement the functions / actions specified in one or more blocks in the flowchart and / or block diagram.

[0181] The flow charts and block diagrams in the accompanying drawings show the possible architecture, functions and operations of the system, method and computer program product according to multiple embodiments of the present application. In this regard, each box in the flow chart or block diagram can represent a part, a program segment or an instruction, and the part of the part, program segment or instruction comprises one or more executable instructions for realizing the logical function of the specification. In some alternative implementations, the function marked in the box can also occur in a sequence different from that marked in the accompanying drawings. For example, two continuous boxes can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the function involved. It should also be noted that each box in the block diagram and / or flow chart, and the combination of the boxes in the block diagram and / or flow chart can be implemented by a special hardware-based system that performs the function or action of the specification, or can be implemented by a combination of special hardware and computer instructions.

[0182] While various embodiments of the present application have been described above, the above descriptions are illustrative, non-exhaustive, and not intended to be limiting of the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments. The terminology used herein is selected to best explain the principles of the embodiments, their practical applications, or technological improvements in the marketplace, or to enable others skilled in the art to understand the embodiments disclosed herein. Industrial Applicability

[0183] The present invention relates to the field of chips and provides a voltage and frequency control system, method, storage medium, device, and program product. The system includes: a delay detection portion configured to detect the circuit delay of the circuit under the working conditions of current process characteristics, current supply voltage, and current device temperature in real time, as the circuit delay of the calculation portion, and output the circuit delay to a frequency control portion; a frequency control portion configured to control the frequency of a clock signal output to the calculation portion based on the current supply voltage and circuit delay, where the current supply voltage is provided by a performance and power level control portion; a performance statistics portion configured to periodically detect the performance of the calculation portion, obtain actual performance, and output it to the performance and power level control portion; and a performance and power level control portion configured to control the supply voltage output to the frequency control portion and the calculation portion based on a preset performance target and actual performance. According to the voltage and frequency control system of the present invention, the real-time frequency control of the inner loop reduces circuit timing redundancy, maximizes performance, and optimizes control efficiency. The periodic voltage control and periodic frequency control of the outer loop improve control accuracy, thereby achieving better performance improvement or power consumption reduction.

Claims

1. A voltage and frequency control system, the system comprising a delay detection part, a frequency control part, a performance statistics part, and a performance and power consumption level control part, the system being configured to control the clock frequency and supply voltage of a computing part, The delay detection part is configured to detect the circuit delay of the calculation part in real time and output the circuit delay to the frequency control part; The frequency control section is configured to control the frequency of the clock signal output to the calculation section according to a current power supply voltage and the circuit delay, wherein the current power supply voltage is provided by the performance and power consumption level control section; The performance statistics section is configured to periodically detect the performance of the calculation section, obtain the actual performance and output it to the performance and power consumption level control section; The performance and power consumption level control section is configured to control the supply voltage output to the frequency control section and the calculation section according to a preset performance target and the actual performance.

2. The system according to claim 1, wherein: The delay detection part and the calculation part physically maintain the same working conditions of process characteristics, power supply voltage and device temperature. The real-time detection of the circuit delay of the calculation part includes: The circuit delay of the circuit itself under the working conditions of the current process characteristics, the current power supply voltage and the current device temperature is detected in real time as the circuit delay of the calculation part.

3. The system according to claim 1, wherein: The step of controlling the frequency of the clock signal output to the calculation part according to the current power supply voltage and the circuit delay comprises: The maximum frequency under the current power supply voltage and the circuit delay is determined, and the frequency of the clock signal output to the calculation part is controlled to be equal to the maximum frequency.

4. The system according to claim 1, wherein: In the case where the difference between the performance target and the actual performance is greater than a first threshold, the performance and power consumption level control section is further configured to output a first clock control instruction to the frequency control section; The frequency control section is further configured to control the value of the frequency of the clock signal to increase a second threshold value according to the first clock control instruction; In the case where the difference between the actual performance and the performance target is greater than a first threshold, the performance and power consumption level control section is further configured to output a second clock control instruction to the frequency control section; The frequency control section is further configured to control the value of the frequency of the clock signal of the calculation section to decrease by a third threshold value according to the second clock control instruction.

5. The system according to claim 1, wherein: The performance and power consumption level control part is pre-set with multiple levels of voltage values, and the higher the voltage value level, the greater the voltage value. The controlling the supply voltage output to the frequency control part and the calculation part according to the preset performance target and the actual performance includes: When the performance target is greater than the actual performance, the voltage level of the output power supply voltage is controlled to increase; When the performance target is less than the actual performance, the voltage level of the output power supply voltage is controlled to be reduced.

6. The system according to claim 1, wherein: The system also includes a power consumption statistics part, The power consumption statistics section is configured to periodically detect the power consumption of the calculation section, obtain the actual power consumption and output it to the frequency control section and the performance and power consumption level control section; The frequency control part is further configured to control the frequency of the clock signal output to the calculation part according to a preset power consumption reference and the actual power consumption, so that the first power consumption estimation value of the calculation part when operating at the frequency does not exceed the power consumption reference; The performance and power consumption level control section is further configured to control the supply voltage output to the frequency control section and the calculation section according to a preset power consumption reference and the actual power consumption.

7. The system according to claim 6, wherein: The step of controlling the frequency of the clock signal output to the calculation part according to the preset power consumption reference and the actual power consumption comprises: When the difference between the actual power consumption and the power consumption reference is greater than a fourth threshold, the frequency of the clock signal output is controlled to be equal to the product of the maximum frequency and a preset coefficient, and the value of the preset coefficient is less than 1.

8. The system according to claim 7, wherein: The performance and power consumption level control part is pre-set with multiple levels of voltage values, and the higher the voltage value level, the greater the voltage value. The controlling the supply voltage output to the frequency control part and the calculation part according to the preset performance target and the actual performance includes: In a case where the performance target is greater than the actual performance, determining a voltage value level of a first target power supply voltage so that the voltage value level of the first target power supply voltage is higher than the voltage value level of the current power supply voltage; In a case where the performance target is less than the actual performance, determining a voltage value level of a first target power supply voltage so that the voltage value level of the first target power supply voltage is lower than the voltage value level of the current power supply voltage; determining a first power consumption estimate of the computing portion when operating at the first target supply voltage; When the first power consumption estimation value is less than the power consumption reference, controlling the power supply voltage output to the frequency control part and the calculation part to be equal to the first target power supply voltage; In a case where the first power consumption estimation value is greater than the power consumption reference, the power supply voltage output to the frequency control part and the calculation part is controlled according to a preset power consumption reference and the actual power consumption.

9. The system according to claim 8, wherein: The controlling the power supply voltage output to the frequency control part and the calculation part according to the preset power consumption reference and the actual power consumption comprises: In the case where the difference between the actual power consumption and the power consumption reference is greater than a fifth threshold, determining a voltage value level of a second target power supply voltage so that a second power consumption estimate when the calculation part works under the second target power supply voltage is less than the power consumption reference, and the difference between the second power consumption estimate and the power consumption reference is minimized; The power supply voltage output to the frequency control section and the calculation section is controlled to be equal to the second target power supply voltage.

10. The system according to any one of claims 6 to 9, wherein: The performance and power consumption level control section is further configured to: At the end of the current cycle, an analysis report is obtained based on one or more of the actual performance, actual power consumption, changes in the output power supply voltage, and output instructions obtained in the current cycle. The analysis report is used to adjust the performance target and the power consumption benchmark used in the next cycle.

11. A voltage and frequency control method, the method is applied to a voltage and frequency control system, the system comprises a delay detection part, a frequency control part, a performance statistics part, a performance and power consumption level control part, the system is configured to control the clock frequency and supply voltage of the computing part, the method comprises: The delay detection part detects the circuit delay of the calculation part in real time, and outputs the circuit delay to the frequency control part; Controlling the frequency of the clock signal output to the computing part according to the current power supply voltage and the circuit delay by the frequency control part, wherein the current power supply voltage is provided by the performance and power consumption level control part; The performance of the computing part is periodically detected by the performance statistics part, the actual performance is obtained and output to the performance and power consumption level control part; The performance and power consumption level control part controls the supply voltage output to the frequency control part and the calculation part according to the preset performance target and the actual performance.

12. A non-volatile computer-readable storage medium having computer program instructions stored thereon, wherein the computer program instructions implement the steps of the method of claim 11 when executed by a processor.

13. An electronic device comprising a processor and a memory, wherein the memory stores a computer program executable on the processor, and the processor implements the steps in the method according to claim 11 when executing the program.

14. A computer program product, comprising a computer program or instructions, which, when executed by a processor, implements the steps in the method according to claim 11.

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