Secondary battery protection circuit and protection method

Abstract

This secondary battery protection circuit (1) protects a battery pack (2) in which a plurality of secondary batteries are connected in series, by disconnecting a charge path to the battery pack or a discharge path from the battery pack. The secondary battery protection circuit comprises: first detection circuits that are overcharge detection circuits (11–14) for detecting overcharging of the plurality of secondary batteries and / or overdischarge detection circuits (11–14) for detecting overdischarging from the plurality of secondary batteries, and that output a first detection signal when detection occurs; second detection circuits (21–24) that detect disconnection between the plurality of secondary batteries and the protection circuit and output a second detection signal when detection occurs; and protection control circuits (40–60) that prevent disconnection of the charge path or the discharge path on the basis of the first detection signal and the second detection signal from the time the protection circuit is activated until the disconnection is no longer detected.

Description

Secondary battery protection circuit and protection method

[0001] The present invention relates to a protection circuit and a protection method for a secondary battery.

[0002] 2. Description of the Related Art Conventionally, a protection circuit for a secondary battery has been put into practical use to monitor the voltage of the secondary battery and prevent overcharging or overdischarging.

[0003] Fig. 7 is a block diagram showing an example of the configuration of a secondary battery protection circuit 101 and its peripheral circuitry according to Prior Art 1. In Fig. 7, the secondary battery protection circuit 101 is a protection circuit for an assembled battery 2A, which consists of two series-connected secondary batteries B11 and B12, and which supplies power from a charging device 3 via terminals T21 and T22 to charge the assembled battery 2A, or which supplies power from the assembled battery 2A to a load 3 (the reference numeral 3 denotes, for example, a load or a charging device of an electronic device) via terminals T21 and T22. The protection circuit 101 includes resistors R11 and R12 and capacitors C11 and C12 for measuring the battery voltages of the secondary batteries B11 and B12. The secondary battery protection circuit 101 monitors the battery voltages of the secondary batteries B11 and B12 and also monitors the output voltage using resistor R11 connected to terminal T22. Based on the monitored voltages, the circuit controls overcharging or overdischarging of the secondary batteries B11 and B12 by turning on or off MOS transistors Q11 and Q12, which serve as charge / discharge switches.

[0004] 8 is a block diagram showing an example of the configuration of a secondary battery protection circuit 102 and its peripheral circuitry according to Conventional Example 2. In FIG. 8, the secondary battery protection circuit 102 is a protection circuit for a battery pack 2B, which is made up of three series-connected secondary batteries B21-B23. The battery pack 2B is charged by supplying power from a charging device 3 via fuses F1 and F2 and terminals T21 and T22 to the battery pack 2B, or the battery pack 2B supplies power to a load 3 via fuses F1 and F2 and terminals T21 and T22 from the battery pack 2B. The protection circuit 102 includes resistors R20-R23 and capacitors C20-C23. Resistors R21 and C21, resistors R22 and C22, and resistors R23 and C23 are low-pass filters for voltage measurement, and resistor R20 and C20 are low-pass filters for suppressing power supply voltage fluctuations. In addition, the secondary battery protection circuit 102 monitors the battery voltage of each of the secondary batteries B21 to B23, and based on the monitored voltage, controls the secondary batteries B11 and B12 to stop charging and discharging by blowing the fuses F1 and F2 using heat generated by the heater resistor R1 via the MOS transistor Q1, which is a switching transistor.

[0005] Patent No. 7101851

[0006] In the secondary battery protection circuit of Conventional Example 2, if a false detection occurs even once, the fuses F1 and F2 will blow and the circuit will not be usable again. Therefore, it is necessary to prevent false detection from occurring even when multiple secondary batteries are connected to each terminal of the protection circuit.

[0007] Furthermore, when fuses F1 and F2 are not used and charging and discharging are controlled by turning on / off a switching transistor, as in the protection circuit for a secondary battery according to Conventional Example 1, false detection will not cause an irreversible reaction, but it is desirable that malfunction itself not occur.

[0008] In a secondary battery protection circuit that prevents false detection of the secondary battery and protection circuit being partially connected at startup based solely on the voltage described above, there is a possibility that false detection cannot be prevented when only the intermediate terminal is not connected. Also, if a function is implemented to detect a disconnection between the secondary battery and protection circuit and prohibit charging / discharging to provide protection, there is a problem in that a partially connected state is determined to be a disconnection state.

[0009] SUMMARY OF THE INVENTION The present invention aims to solve the above problems and provide a protection circuit and protection method for a secondary battery that can prevent erroneous detection during connection at startup and provide a protection function by detecting disconnection after connection.

[0010] A secondary battery protection circuit according to a first aspect of the present invention is a secondary battery protection circuit that protects an assembled battery in which multiple secondary batteries are connected in series by cutting off a charging path to the assembled battery or a discharging path from the assembled battery, and includes: an overcharge detection circuit that detects overcharging of the multiple secondary batteries; and an overdischarge detection circuit that detects overdischarging from the multiple secondary batteries, the first detection circuit being at least one first detection circuit that outputs a first detection signal upon detection; a second detection circuit that detects a break between the multiple secondary batteries and the protection circuit and outputs a second detection signal upon detection; and a protection control circuit that stops cutting off the charging path or the discharging path based on the first and second detection signals from the time the protection circuit is started until the break is no longer detected.

[0011] Furthermore, a secondary battery protection circuit according to a second aspect of the present invention is a secondary battery protection circuit that protects an assembled battery in which multiple secondary batteries are connected in series by cutting off a charging path to the assembled battery or a discharging path from the assembled battery, and includes at least one first detection circuit selected from an overcharge detection circuit that detects overcharging of the multiple secondary batteries and an overdischarge detection circuit that detects overdischarging from the multiple secondary batteries, the first detection circuit outputting a first detection signal upon detection; a second detection circuit that detects a break between the multiple secondary batteries and the protection circuit and outputs a second detection signal upon detection; and a protection control circuit that stops the detection operation of the first detection circuit from the time the protection circuit is started until the break is no longer detected, and stops cutting off the charging path or the discharging path based on the second detection signal.

[0012] Therefore, according to one embodiment of the secondary battery protection circuit of the present invention, when the protection circuit is started up, the presence or absence of a disconnection is used to determine whether or not the connection is in progress, thereby preventing erroneous detection during connection at start-up and providing protection by detecting a disconnection after connection.

[0013] FIG. 1 is a block diagram showing an example of the configuration of a secondary battery protection circuit 1 and its peripheral circuits according to embodiment 1. FIG. 2 is a block diagram showing an example of the configuration of a secondary battery protection circuit 1A and its peripheral circuits according to embodiment 2. FIG. 3 is a block diagram showing an example of the configuration of a secondary battery protection circuit 1B and its peripheral circuits according to embodiment 3. FIG. 4 is a block diagram showing an example of the configuration of a secondary battery protection circuit 1C and its peripheral circuits according to embodiment 4. FIG. 5 is a block diagram showing an example of the detailed configuration of open circuit detection circuits 21, 22 of FIG. 1. FIG. 6 is a flowchart showing protection processing executed by the secondary battery protection circuit 1 of FIG. 1. FIG. 7 is a block diagram showing an example of the configuration of a secondary battery protection circuit and its peripheral circuits according to conventional example 1. FIG. 8 is a block diagram showing an example of the configuration of a secondary battery protection circuit and its peripheral circuits according to conventional example 2.

[0014] Hereinafter, embodiments and modifications of the present invention will be described with reference to the drawings, in which the same or similar components are designated by the same reference numerals.

[0015] First Embodiment FIG. 1 is a block diagram showing an example of the configuration of a protection circuit for a secondary battery (hereinafter referred to as a protection circuit) 1 and its peripheral circuits according to a first embodiment.

[0016] 1, protection circuit 1 is configured, for example, by a semiconductor IC, and monitors the voltages V1 to V4 of, for example, four secondary batteries B1 to B4 connected in series to detect (1) an overcharge state of each of the secondary batteries B1 to B4, (2) an overdischarge state of each of the secondary batteries B1 to B4, and (3) an open circuit state between each of the secondary batteries B1 to B4 and protection circuit 1. Here, protection circuit 1 is configured not to detect an overcharge state or an overdischarge state of the secondary batteries when an open circuit state occurs during initial connection (referring to when protection circuit 1 and some terminals of each secondary battery are connected. Note that because power for protection circuit 1 is supplied from secondary batteries B1 to B4, activation of protection circuit 1 and connection to secondary batteries B1 to B4 are substantially simultaneous), but is configured to detect an overcharge state or an overdischarge state of the secondary batteries when an open circuit state does not occur during initial connection (or when the open circuit state is no longer present). As a result, the protection circuit 1 according to the first embodiment aims to provide a protection function by preventing erroneous detection during connection at startup and detecting disconnection after connection.

[0017] Here, the battery pack 2, which is made up of four secondary batteries B1 to B4, is connected to, for example, a load of an electronic device or a charging device 3 via a fuse circuit FC and terminals T21 and T22, and during protection operation, the protection circuit 1 generates an H-level protection signal St11 to turn on the switch MOS transistor Q1, and the heat generated by the heater resistor R1 melts the fuse circuit FC, which is made up of a series circuit of fuses F1 and F2, thereby protecting the load, charging device 3, or the battery pack 2. The battery pack 2, protection circuit 1, fuse circuit FC, resistor R1, and MOS transistor Q1 together make up a battery device.

[0018] The protection circuit 1 in Fig. 1 has input terminals T1 to T5 and output terminals T11 and T12. The protection circuit 1 is configured to include an overcharge and overdischarge detection unit 10, a disconnection detection unit 20, a latch control unit 40, a latch circuit unit 50, and a protection logic circuit unit 60. Here, the overcharge and overdischarge detection unit 10 includes four overcharge and overdischarge detection circuits 11 to 14 and two OR gates OR1 and OR2. The disconnection detection unit 20 includes four disconnection detection circuits 21 to 24 and an OR gate OR3. The latch control unit 40 includes a startup pulse generation circuit 30, three detection delay circuits 31 to 33, three recovery delay circuits 41 to 43, and three OR gates OR11 to OR13. The latch circuit unit 50 includes an overcharge latch circuit 51, an overdischarge latch circuit 52, a disconnection latch circuit 53, and a startup latch circuit 54. The protection logic circuit unit 60 includes two OR gates OR21 and OR22, and two AND gates AND1 and AND2.

[0019] The positive electrode of secondary battery B1 (i.e., the positive electrode of battery pack 2) is connected to the load or charging device 3 of the electronic device via fuse circuit FC and external terminal T21, and is also connected to the positive terminals of overcharge and overdischarge detection circuit 11 and open circuit detection circuit 21 via input terminal T1. The negative electrode of secondary battery B1 and the positive electrode of secondary battery B2 are connected to each other and are connected to the negative terminals of overcharge and overdischarge detection circuit 11 and open circuit detection circuit 21 and the positive terminals of overcharge and overdischarge detection circuit 12 and open circuit detection circuit 22 via input terminal T2. The negative electrode of secondary battery B2 and the positive electrode of secondary battery B3 are connected to each other and are connected to the negative terminals of overcharge and overdischarge detection circuit 12 and open circuit detection circuit 22 and the positive terminals of overcharge and overdischarge detection circuit 13 and open circuit detection circuit 23 via input terminal T3. The negative electrode of secondary battery B3 and the positive electrode of secondary battery B4 are connected to each other and are connected via input terminal T4 to the negative terminals of overcharge and overdischarge detection circuit 13 and open circuit detection circuit 23 and to the positive terminals of overcharge and overdischarge detection circuit 14 and open circuit detection circuit 24. The negative electrode of secondary battery B4 (i.e., the negative electrode of battery pack 2) is connected to the load of the electronic device or charging device 3 via external terminal T22, and to the negative terminals of overcharge and overdischarge detection circuit 14 and open circuit detection circuit 24 via input terminal T5.

[0020] The overcharge and overdischarge detection circuit 11 performs overcharge detection processing and overdischarge detection processing based on the input voltage V1. The overcharge and overdischarge detection circuit 11 generates an H-level overcharge detection signal S11 when the input voltage V1 is equal to or greater than Vthc (overcharge detection threshold), and generates an L-level overcharge detection signal S11 when the input voltage V1 is less than Vthc. The overcharge detection signal S11 is output as an overcharge detection signal S10 to the detection delay circuit 31 and the recovery delay circuit 41 via an OR gate OR1. The overcharge and overdischarge detection circuit 11 generates an H-level overdischarge detection signal S21 when the input voltage V1 is equal to or less than Vthd (overdischarge detection threshold; Vthd<Vthc), and generates an L-level overdischarge detection signal S21 when the input voltage V1 is greater than Vthd. The overdischarge detection signal S21 is output as an overdischarge detection signal S20 to the detection delay circuit 32 and the recovery delay circuit 42 via an OR gate OR2.

[0021] The overcharge and overdischarge detection circuit 12 performs overcharge detection processing and overdischarge detection processing based on the input voltage V2. The overcharge and overdischarge detection circuit 12 generates an H-level overcharge detection signal S12 when the input voltage V2 is equal to or greater than Vthc (overcharge detection threshold), and generates an L-level overcharge detection signal S12 when the input voltage V2 is less than Vthc. The overcharge detection signal S12 is output as an overcharge detection signal S10 to the detection delay circuit 31 and the recovery delay circuit 41 via an OR gate OR1. The overcharge and overdischarge detection circuit 12 generates an H-level overdischarge detection signal S22 when the input voltage V2 is equal to or less than Vthd (overdischarge detection threshold), and generates an L-level overdischarge detection signal S22 when the input voltage V2 is greater than Vthd. The overdischarge detection signal S22 is output as an overdischarge detection signal S20 to the detection delay circuit 32 and the recovery delay circuit 42 via an OR gate OR2.

[0022] The overcharge and overdischarge detection circuit 13 performs overcharge detection processing and overdischarge detection processing based on the input voltage V3. The overcharge and overdischarge detection circuit 13 generates an H-level overcharge detection signal S13 when the input voltage V3 is equal to or greater than Vthc (overcharge detection threshold), and generates an L-level overcharge detection signal S13 when the input voltage V3 is less than Vthc. The overcharge detection signal S13 is output as an overcharge detection signal S10 to the detection delay circuit 31 and the recovery delay circuit 41 via an OR gate OR1. The overcharge and overdischarge detection circuit 13 generates an H-level overdischarge detection signal S23 when the input voltage V3 is equal to or less than Vthd (overdischarge detection threshold), and generates an L-level overdischarge detection signal S23 when the input voltage V3 is greater than Vthd. The overdischarge detection signal S23 is output as an overdischarge detection signal S20 to the detection delay circuit 32 and the recovery delay circuit 42 via an OR gate OR2.

[0023] The overcharge and overdischarge detection circuit 14 performs overcharge detection processing and overdischarge detection processing based on the input voltage V4. The overcharge and overdischarge detection circuit 14 generates an H-level overcharge detection signal S14 when the input voltage V4 is equal to or greater than Vthc (overcharge detection threshold), and generates an L-level overcharge detection signal S14 when the input voltage V4 is less than Vthc. The overcharge detection signal S14 is output as an overcharge detection signal S10 to the detection delay circuit 31 and the recovery delay circuit 41 via an OR gate OR1. The overcharge and overdischarge detection circuit 14 generates an H-level overdischarge detection signal S24 when the input voltage V4 is equal to or less than Vthd (overdischarge detection threshold), and generates an L-level overdischarge detection signal S24 when the input voltage V4 is greater than Vthd. The overdischarge detection signal S24 is output as an overdischarge detection signal S20 to the detection delay circuit 32 and the recovery delay circuit 42 via an OR gate OR2.

[0024] Fig. 5 is a block diagram showing a detailed configuration example of the disconnection detection circuits 21 and 22 in Fig. 1. Note that the disconnection detection circuits 23 to 24 are configured in the same manner. Here, the disconnection detection circuits 21 to 24 include control circuits 21A to 24A, respectively, and control signals are transmitted and received between adjacent control circuits (21A, 22A), (22A, 23A), and (23A, 24A) among the control circuits 21A to 24A.

[0025] 5, the open circuit detection circuit 21 includes a series circuit of a resistor R31 and a switch SW1 connected between input terminals T1 and T2, a voltage monitor 21B, and a control circuit 21A. The voltage monitor 21B detects the voltage between the input terminals T1 and T2 and outputs the detected voltage to the control circuit 21A. The control circuit 21A performs the following first and second open circuit detection operations to send and receive control signals to and from the control circuit 22A of the open circuit detection circuit 22 to control the switches SW1 and SW2, and performs open circuit detection processing to determine whether the line connected to the input terminal T1 or T2 is open based on the detected voltage of the voltage monitor 21B.

[0026] The open circuit detection circuit 22 includes a series circuit of a resistor R32 and a switch SW2 connected between the input terminals T2 and T3, a voltage monitor 22B, and a control circuit 22A. The voltage monitor 22B detects the voltage between the input terminals T2 and T3 and outputs the detected voltage to the control circuit 22A. The control circuit 22A performs the following first and second open circuit detection operations to send and receive control signals to and from the control circuit 21A of the open circuit detection circuit 21 to control the switches SW1 and SW2, and performs open circuit detection processing to determine whether the line connected to the input terminal T2 or T3 is open based on the detected voltage of the voltage monitor 22B.

[0027] Here, the switches SW1 and SW2 are normally turned off.

[0028] (1) First Open-Circuit Detection Operation: Here, control circuit 21A turns on switch SW1, and control circuit 22A turns off switch SW2. If the line connected to input terminal T1 is open, the potential of input terminal T1 approaches the potential of input terminal T2, reducing the voltage input to voltage monitor 21B. When the detected voltage of voltage monitor 21B falls below a predetermined open-circuit detection threshold voltage (e.g., a positive voltage near 0, such as 0.1 V), it is determined that the line connected to input terminal T1 is open (open circuit detected). On the other hand, if the line connected to input terminal T2 is open, the potential of input terminal T2 approaches the potential of input terminal T1, reducing the voltage input to voltage monitor 21B. When the detected voltage falls below the predetermined open-circuit detection threshold voltage of voltage monitor 21B (e.g., a positive voltage near 0, such as 0.1 V), it is determined that the line connected to input terminal T2 is open (open circuit detected).

[0029] (2) Second Disconnection Detection Operation Here, control circuit 21A turns off switch SW1, and control circuit 22A turns on switch SW2. If the line connected to input terminal T2 is disconnected, the potential of input terminal T2 approaches the potential of input terminal T3, thereby reducing the voltage input to voltage monitor 22B. When the detected voltage of voltage monitor 22B falls below a predetermined disconnection detection threshold voltage (e.g., a positive voltage near 0, such as 0.1 V), it is determined that the line connected to input terminal T2 is disconnected (disconnection detected). On the other hand, if the line connected to input terminal T3 is disconnected, the potential of input terminal T3 approaches the potential of input terminal T2, thereby reducing the voltage input to voltage monitor 22B. When the detected voltage falls below the predetermined disconnection detection threshold voltage of voltage monitor 22B (e.g., a positive voltage near 0, such as 0.1 V), it is determined that the line connected to input terminal T3 is disconnected (disconnection detected).

[0030] The disconnection detection circuits 23 to 24 are configured and operate in the same manner as the disconnection detection circuits 21 to 22. Each of the disconnection detection circuits 21 to 24 operates as follows when a disconnection is detected and when no disconnection is detected.

[0031] The disconnection detection circuit 21 generates a disconnection detection signal S1 at H level when a disconnection is detected, and generates a disconnection detection signal S1 at L level when no disconnection is detected. The disconnection detection signal S1 is output as a disconnection detection signal S5 to the detection delay circuit 33 and the recovery delay circuit 43 via an OR gate OR3.

[0032] The break detection circuit 22 generates a break detection signal S2 of H level when a break is detected, and generates a break detection signal S2 of L level when no break is detected. The break detection signal S2 is output as a break detection signal S5 to the detection delay circuit 33 and the recovery delay circuit 43 via an OR gate OR3.

[0033] The disconnection detection circuit 23 generates a disconnection detection signal S3 at H level when a disconnection is detected, and generates a disconnection detection signal S3 at L level when no disconnection is detected. The disconnection detection signal S3 is output as a disconnection detection signal S5 to the detection delay circuit 33 and the recovery delay circuit 43 via an AND gate AND3.

[0034] The break detection circuit 24 generates a break detection signal S4 of H level when a break is detected, and generates a break detection signal S4 of L level when no break is detected. The break detection signal S4 is output as a break detection signal S5 to the detection delay circuit 33 and the recovery delay circuit 43 via an OR gate OR3.

[0035] When at least two of the input terminals T1 to T5 are connected to the secondary batteries B1 to B4, the power supply to the protection circuit 1 is turned on and the protection circuit 1 is started up, the startup pulse generating circuit 30 generates a H-level startup pulse signal S30, which is a one-shot pulse, and outputs it to the reset terminal of the overcharge latch circuit 51 via the OR gate OR11, to the reset terminal of the overdischarge latch circuit 52 via the OR gate OR12, and to the set terminal of the open circuit latch circuit 53 via the OR gate OR13.

[0036] The detection delay circuit 31 delays the input overcharge detection signal S10 by a predetermined delay time TM1 and then outputs it to the set terminal of the overcharge latch circuit 51. The recovery delay circuit 41 delays the input overcharge detection signal S10 by a predetermined delay time TM2 and then outputs it to the reset terminal of the overcharge latch circuit 51 via the OR gate OR11.

[0037] The detection delay circuit 32 delays the input over-discharge detection signal S20 by a predetermined delay time TM11 and then outputs it to the set terminal of the over-discharge latch circuit 52. The recovery delay circuit 42 delays the input over-discharge detection signal S20 by a predetermined delay time TM12 and then outputs it to the reset terminal of the over-discharge latch circuit 52 via the OR gate OR12.

[0038] The detection delay circuit 33 delays the input breakage detection signal S5 by a predetermined delay time TM21, and then outputs the signal to the set terminal of the breakage latch circuit 53 via the OR gate OR13. The recovery delay circuit 43 delays the input breakage detection signal S5 by a predetermined delay time TM22, and then outputs the signal to the reset terminal of the breakage latch circuit 53.

[0039] It is also possible to configure the protection circuit 1 so as not to provide the delay times TM1, TM11, TM21 provided by the detection delay circuits 31 to 33 and the delay times TM2, TM12, TM22 provided by the recovery delay circuits 41 to 43. By configuring the protection circuit 1 as in this embodiment, it is possible to prevent erroneous detection of the overcharge detection signal S10, the overdischarge detection signal S20, and the open circuit detection signal S5 due to noise or the like in the power supply of the protection circuit 1 when charging and discharging the secondary battery.

[0040] The overcharge latch circuit 51, the overdischarge latch circuit 52, the disconnection latch circuit 53, and the startup latch circuit 54 are each composed of a set-reset (SR) type latch circuit. In response to an H-level signal input to a set terminal, each latch circuit 51 to 54 latches a binary signal of H-level value "1" and outputs H-level binary signals S51 to S54 from an output terminal Q, and also outputs L-level inverted binary signals S51B to S54B from an inverted output terminal QB. In response to an H-level signal input to a reset terminal, each latch circuit 51 to 54 resets the latched binary signal to an L-level binary signal and outputs an L-level binary signal from an output terminal Q, and also outputs H-level inverted binary signals S51B to S54B from an inverted output terminal QB.

[0041] The binary signal S51 from the overcharge latch circuit 51 is input to the gate of the switch MOS transistor Q1 as a protection control signal St11 via the OR gate OR21, the AND gate AND1, and the output terminal T11. The binary signal S52 from the overdischarge latch circuit 52 is output to the external terminal T23 as a protection control signal St12 via the OR gate OR22, the AND gate AND2, and the output terminal T12. The inverted binary signal S53B from the open circuit latch circuit 53 is output to the reset terminal of the startup latch circuit 54. The inverted binary signal S54B from the startup latch circuit 54 is output to the gate of the switch MOS transistor Q1 via the AND gate AND1 and the output terminal T11, and is also output to the external terminal T23 via the AND gate AND2 and the output terminal T12.

[0042] The protection circuit 1 configured as described above has the following functions: (1) a function (disconnection detection unit 20) for detecting disconnections between each of the secondary batteries B1 to B4 and the protection circuit 1; (2) a function (overcharge and overdischarge detection unit 10) for detecting an overcharged state of each of the secondary batteries B1 to B4; and (3) a function (overcharge and overdischarge detection unit 10) for detecting an overdischarged state of each of the secondary batteries B1 to B4. These detection signals, i.e., an overcharge detection signal S10, an overdischarge detection signal S20, and a disconnection detection signal S5, are output via a latch control unit 40, a latch circuit unit 50, and a protection logic circuit unit 60. Here, when an overcharge or disconnection is detected, the protection logic circuit unit 60 generates an H-level protection signal St11 to turn on the switch MOS transistor Q1, and the heat generated by the heater resistor R1 blows the fuse circuit FC, which is made up of a series circuit of fuses F1 and F2, thereby protecting the load, the charging device 3, or the battery pack 2.

[0043] Fig. 6 is a flowchart showing the protection process executed by the secondary battery protection circuit 1 of Fig. 1. The protection process of this embodiment will be described below with reference to Fig. 6.

[0044] The protection circuit 1 is characterized by including a startup latch circuit 54 that generates and latches a startup pulse signal S30 at startup, and generates and outputs an H-level binary signal S54 and an L-level inverted binary signal S54B.

[0045] When the power supply to the protection circuit 1 is turned on to start the protection circuit 1 (YES in S1), an H-level startup pulse signal S30 is generated from the startup pulse generating circuit 30. This causes the startup latch circuit 54 to latch an H-level binary signal, and an L-level inverted binary signal S54B is output from the inverting output terminal QB of the startup latch circuit 54 to the AND gates AND1 and AND2 (S2). The L-level inverted binary signal S54B is input to the AND gates AND1 and AND2, respectively, causing the AND gates AND1 and AND2 to output L-level protection control signals St11 and St12. In this way, the AND gates AND1 and AND2 disable the protection functions that cause the protection control signals St11 and St12 to be H, resulting in a "startup mask state" (S3).

[0046] Next, when secondary batteries B1 to B4 are connected to all input terminals T1 to T5, an L-level disconnection detection signal S5 from the disconnection detection unit 20 is input to the recovery delay circuit 43 of the latch control unit 40, an H-level signal is input to the reset terminal of the disconnection latch circuit 53, and the system recovers from the disconnection detection state (YES in S4), and an H-level inverted binary signal S53B is input to the reset terminal of the startup latch circuit 54, resetting the startup latch circuit 54. As a result, an H-level inverted binary signal S54B from the startup latch circuit 54 is input to the AND gates AND1 and AND2, which releases the mask (S5), allowing H-level protection control signals St11 and St12 based on the disconnection detection signal S5 and the overcharge detection signal S10 or overdischarge detection signal S20 to be output from the output terminals T11 and T12, which are charge / discharge control terminals, and the protection function is enabled. After this, the normal disconnection detection process, overcharge detection process, and overdischarge detection process are executed (S6).

[0047] Therefore, according to the first embodiment, false detections due to disconnection detection, overcharge detection, and overdischarge detection do not occur during startup of the protection circuit 1, and once the normal state is reached, the protection functions based on disconnection detection, overcharge detection, and overdischarge detection become effective. This makes it possible to provide a protection circuit for a secondary battery that can both prevent false detections during connection at startup and provide protection by detecting disconnection after connection.

[0048] In embodiment 1, the control circuit including the latch control unit 40, the latch circuit unit 50, and the protection logic circuit unit 60 is an example of a "protection control circuit" that prevents erroneous detection during connection at startup and performs protection processing by detecting disconnections after connection.

[0049] (Embodiment 2) Figure 2 is a block diagram showing an example of the configuration of a protection circuit 1A for a secondary battery and its peripheral circuitry according to embodiment 2. In Figure 2, the protection circuit 1A for a secondary battery and its peripheral circuitry according to embodiment 2 differ from the protection circuit 1 and its peripheral circuitry of Figure 1 in the following respects: (1) A protection logic circuit unit 60A is provided instead of the protection logic circuit unit 60 in the protection circuit 1A. Compared to the protection logic circuit unit 60, the protection logic circuit unit 60A further includes inverters INV1 and INV2, and output terminals T31 and T32 instead of the output terminals T11 and T12. (2) In the peripheral circuitry of the protection circuit 1A, charge / discharge switch MOS transistors (hereinafter referred to as MOS transistors) Q11 and Q12 are provided instead of the fuse circuit FC, resistor R1, and switch MOS transistor Q1. The differences are described below.

[0050] 2 , when an overcharge or an open circuit is detected, the protection logic circuit unit 60A generates an L-level protection signal St31 to turn off the MOS transistor Q12 via the output terminal T31, thereby protecting the load, the charging device 3, or the assembled battery 2. When an overdischarge or an open circuit is detected, the protection logic circuit unit 60A generates an L-level protection signal St32 to turn off the MOS transistor Q11 via the output terminal T32, thereby protecting the load, the charging device 3, or the assembled battery 2. In this way, a "temporary protection process" is performed for the load, the charging device 3, or the assembled battery 2.

[0051] The protection circuit 1A configured as above has the same effects as the protection circuit 1, except that it performs "temporary protection processing."

[0052] Therefore, according to the second embodiment, false detections due to disconnection detection, overcharge detection, and overdischarge detection do not occur during startup of the protection circuit 1A, and once the normal state is reached, the protection functions based on disconnection detection, overcharge detection, and overdischarge detection become effective. This makes it possible to provide a protection circuit for a secondary battery that can both prevent false detections during connection at startup and provide protection by detecting disconnection after connection.

[0053] In embodiment 2, the control circuit including the latch control unit 40, the latch circuit unit 50, and the protection logic circuit unit 60A is an example of a "protection control circuit" that prevents erroneous detection during connection at startup, performs protection processing by detecting disconnections after connection, and executes the "temporary protection processing."

[0054] (Embodiment 3) Figure 3 is a block diagram showing an example of the configuration of a secondary battery protection circuit 1B and its peripheral circuitry according to embodiment 3. In Figure 3, the secondary battery protection circuit 1B and its peripheral circuitry according to embodiment 3 differ from the protection circuit 1 and its peripheral circuitry of Figure 1 in the following respects: (1) In the protection circuit 1B, the overcharge and overdischarge detection unit 10 is replaced with an overcharge and overdischarge detection unit 10A. (2) Compared to the overcharge and overdischarge detection unit 10, the overcharge and overdischarge detection unit 10A is replaced with overcharge and overdischarge detection circuits 11A to 14A instead of the overcharge and overdischarge detection circuits 11 to 14. The overcharge and overdischarge detection circuits 11A to 14A further include an enable terminal EN for inputting an enable signal or a disable signal that selectively switches their operating state between "operating" and "non-operating," respectively. (3) In place of the protection logic circuit unit 60, a protection logic circuit unit 60B is included. In the protection logic circuit section 60B, the inverted binary signal S54B from the start-up latch circuit 54 is input as a disable signal Sd to the enable terminal EN of each of the overcharge and overdischarge detection circuits 11A to 14A. The differences will be described below.

[0055] 3, when the "masked state at startup" (S3 in FIG. 6) is reached, an L-level inverted binary signal S54B is input as a disable signal Sd to the enable terminal EN of each of the overcharge and overdischarge detection circuits 11A to 14A. Therefore, the operation of the overcharge and overdischarge detection circuits 11A to 14A can be stopped during connection at startup. This makes it possible to prevent malfunctions in the overcharge detection process and overdischarge detection process by the overcharge and overdischarge detection circuits 11A to 14A during connection at startup.

[0056] The protection circuit 1B configured as above has the same effects as the protection circuit 1, except that it stops the operation of the overcharge and overdischarge detection circuits 11A to 14A during connection at startup.

[0057] Therefore, according to the third embodiment, erroneous detections due to disconnection detection, overcharge detection, and overdischarge detection do not occur while the protection circuit 1B is activated, and once the normal state is reached, the protection functions due to disconnection detection, overcharge detection, and overdischarge detection become effective. This makes it possible to provide a protection circuit for a secondary battery that can both prevent erroneous detections during connection at startup and provide protection by detecting disconnection after connection.

[0058] In embodiment 3, the control circuit including the latch control unit 40, the latch circuit unit 50, and the protection logic circuit unit 60B is an example of a "protection control circuit" that prevents erroneous detection during connection at startup and performs protection processing by detecting disconnections after connection.

[0059] (Embodiment 4) Figure 4 is a block diagram showing an example of the configuration of a secondary battery protection circuit 1C and its peripheral circuitry according to embodiment 4. In Figure 4, the secondary battery protection circuit 1C and its peripheral circuitry according to embodiment 4 differ from the protection circuit 1A and its peripheral circuitry of Figure 2 in the following respects: (1) In the protection circuit 1C, the overcharge and overdischarge detection unit 10 is replaced with an overcharge and overdischarge detection unit 10A. (2) Compared to the overcharge and overdischarge detection unit 10, the overcharge and overdischarge detection unit 10A is replaced with overcharge and overdischarge detection circuits 11A to 14A instead of the overcharge and overdischarge detection circuits 11 to 14. The overcharge and overdischarge detection circuits 11A to 14A further include an enable terminal EN for inputting an enable signal or a disable signal that selectively switches their operating state between "operating" and "non-operating," respectively. (3) In place of the protection logic circuit unit 60A, a protection logic circuit unit 60C is included. In the protection logic circuit section 60C, the inverted binary signal S54B from the start-up latch circuit 54 is output as a disable signal Sd to the enable terminal EN of each of the overcharge and overdischarge detection circuits 11A to 14A. The differences will be described below.

[0060] 3, when the "masked state at startup" (S3 in FIG. 6) is reached, an L-level inverted binary signal S54B is input as a disable signal Sd to the enable terminal EN of each of the overcharge and overdischarge detection circuits 11A to 14A. Therefore, the operation of the overcharge and overdischarge detection circuits 11A to 14A can be stopped during connection at startup. This makes it possible to prevent malfunctions in the overcharge detection process and overdischarge detection process by the overcharge and overdischarge detection circuits 11A to 14A during connection at startup.

[0061] The protection circuit 1C configured as above has the same effects as the protection circuit 1A, except that it stops the operation of the overcharge and overdischarge detection circuits 11A to 14A during connection at startup.

[0062] Therefore, according to the fourth embodiment, false detections due to disconnection detection, overcharge detection, and overdischarge detection do not occur while the protection circuit 1C is running, and once the normal state is reached, the protection functions based on disconnection detection, overcharge detection, and overdischarge detection become effective. This makes it possible to provide a protection circuit for a secondary battery that can both prevent false detections during connection at startup and provide protection by detecting disconnection after connection.

[0063] In embodiment 4, the control circuit including the latch control unit 40, the latch circuit unit 50, and the protection logic circuit unit 60C is an example of a "protection control circuit" that prevents erroneous detection during connection at startup, performs protection processing by detecting disconnections after connection, and executes the "temporary protection processing."

[0064] (Modification) In the above embodiment, the overcharge detection process and the overdischarge detection process are executed, but the present invention is not limited to this, and may be configured to execute at least one of the overcharge detection process and the overdischarge detection process.

[0065] As described above in detail, according to the secondary battery protection circuit of the present invention, when the protection circuit is started up, the presence or absence of a disconnection is used to determine whether or not the battery is currently connected, thereby preventing erroneous detection during connection at start-up and providing a protection function by detecting a disconnection after connection.

[0066] 1, 1A to 1C Secondary battery protection circuit (protection circuit) 2, 2A, 2B Assembled battery 3 Load or charging device 10, 10A Overcharge and overdischarge detection section 11 to 14, 11A to 14A Overcharge and overdischarge detection circuit 20 Open circuit detection section 21 to 24 Open circuit detection circuit 21A to 24A Control circuit 21B to 24B Voltage monitor 30 Start-up pulse generation circuit 31 to 33 Detection delay circuit 40 Latch control section 41 to 43 Recovery delay circuit 50 Latch circuit section 51 Overcharge latch circuit 52 Overdischarge latch circuit 53 Open circuit latch circuit 54 Start-up latch circuit 60 to 60C Protection logic circuit section 101 Protection circuit 102 Protection circuit AND1 to AND2 AND gate B1 to B23 Secondary battery C1 to C23 Capacitor F1, F2 Fuses OR1 to OR22 OR gates Q1 to Q12 MOS transistors R1 to R32 Resistors SW1, SW2 Switches T1 to T23 Terminals

Claims

1. A protection circuit for a secondary battery that protects an assembled battery in which multiple secondary batteries are connected in series by cutting off a charging path to the assembled battery or a discharging path from the assembled battery, comprising: at least one first detection circuit of an overcharge detection circuit that detects overcharging of the multiple secondary batteries and an over-discharge detection circuit that detects over-discharging from the multiple secondary batteries, the first detection circuit outputting a first detection signal upon detection; a second detection circuit that detects a break between the multiple secondary batteries and the protection circuit and outputs a second detection signal upon detection; and a protection control circuit that stops cutting off the charging path or the discharging path based on the first and second detection signals from the time the protection circuit is started until the break is no longer detected.

2. A protection circuit for a secondary battery that protects an assembled battery in which multiple secondary batteries are connected in series by cutting off a charging path to the assembled battery or a discharging path from the assembled battery, comprising: at least one first detection circuit of an overcharge detection circuit that detects overcharging of the multiple secondary batteries and an overdischarge detection circuit that detects overdischarge from the multiple secondary batteries, the first detection circuit outputting a first detection signal upon detection; a second detection circuit that detects a break between the multiple secondary batteries and the protection circuit and outputs a second detection signal upon detection; and a protection control circuit that stops the detection operation of the first detection circuit from the time the protection circuit is started until the break is no longer detected, and stops cutting off the charging path or the discharging path based on the second detection signal.

3. The protection circuit for a secondary battery according to claim 1 or 2, wherein the protection control circuit protects the assembled battery by blowing a fuse circuit in the charging path or the discharging path.

4. The protection circuit for a secondary battery according to claim 1 or 2, wherein the protection control circuit protects the assembled battery by turning off a switch transistor in the charging path or the discharging path.

5. A method for protecting a secondary battery for a protection circuit that protects a battery pack in which multiple secondary batteries are connected in series by cutting a charging path to the battery pack or a discharging path from the battery pack, wherein the protection circuit comprises at least one first detection circuit of an overcharge detection circuit that detects overcharging of the multiple secondary batteries and an overdischarge detection circuit that detects overdischarge from the multiple secondary batteries, the first detection circuit outputting a first detection signal upon detection, and a second detection circuit that detects a break between the multiple secondary batteries and the protection circuit and outputs a second detection signal upon detection, the protection method including a protection control circuit stopping cutting the charging path or the discharging path based on the first and second detection signals from the time the protection circuit is activated until the break is no longer detected.

6. A method for protecting a secondary battery for a protection circuit that protects a battery pack in which multiple secondary batteries are connected in series by cutting a charging path to the battery pack or a discharging path from the battery pack, wherein the protection circuit comprises at least one first detection circuit of an overcharge detection circuit that detects overcharging of the multiple secondary batteries and an overdischarge detection circuit that detects overdischarge from the multiple secondary batteries, the first detection circuit outputting a first detection signal upon detection, and a second detection circuit that detects a break between the multiple secondary batteries and the protection circuit and outputs a second detection signal upon detection, the protection method including a protection control circuit stopping the detection operation of the first detection circuit from the time the protection circuit is started until the break is no longer detected, and stopping cutting the charging path or the discharging path based on the second detection signal.

7. The method for protecting a secondary battery according to claim 5 or 6, further comprising the step of: the protection control circuit protecting the battery pack by blowing a fuse circuit in the charging path or the discharging path.

8. The method for protecting a secondary battery according to claim 5 or 6, further comprising the step of: the protection control circuit protecting the assembled battery by turning off a switch transistor in the charging path or the discharging path.

Images