Light-emitting device having excellent light efficiency, and manufacturing method therefor

Abstract

A light-emitting device having excellent light efficiency, and a manufacturing method therefor are disclosed. According to one embodiment of the present invention, the provided light-emitting device comprises: a substrate; an n-type cladding layer deposited on the substrate and implemented with a semiconductor material doped with an n-type dopant; an active layer which is deposited on the n-type cladding layer, and in which electrons provided from the n-type cladding layer and holes meet and recombine and light is generated; a p-type semiconductor layer which is deposited on the active layer and which provides holes to the active layer; a protective layer which is implemented with a material having a light transmittance and an electric conductivity of a visible light wavelength band that are greater than or equal to a first preset reference value and a second preset reference value, respectively, and which is deposited on the p-type semiconductor so as to protect the p-type semiconductor from the outside; and electrodes formed on each of the n-type cladding layer and the protective layer.

Description

Light-emitting device with excellent luminous efficiency and method for manufacturing the same

[0001] The present invention relates to a light-emitting device having excellent luminous efficiency and a method for manufacturing the same.

[0002] The content described in this section merely provides background information for the present embodiment and does not constitute prior art.

[0003] Light-emitting diodes (LEDs) are inorganic light sources, widely used in various fields such as display devices, vehicle lamps, and general lighting. With their long lifespan, low power consumption, and fast response times, LEDs are rapidly replacing existing light sources.

[0004] Light-emitting diodes (LEDs) can typically produce a variety of colors using a mixture of blue, green, and red. LEDs used in various devices contain multiple pixels to produce a variety of images or colors. Each pixel has blue, green, and red subpixels. The combination of these subpixels determines the color of the pixel, and the combination of each pixel produces an image.

[0005] Conventional light-emitting diodes (LEDs) have typically been manufactured using nitride semiconductors. These nitride semiconductor-based LEDs have demonstrated relatively superior luminous efficiency compared to those based on other conventional materials.

[0006] However, conventional nitride semiconductor-based light-emitting diodes have the following structural problems.

[0007] First, nitride semiconductor-based light-emitting diodes experience internal pressure that tends to compress or expand due to differences in the lattice constants of the materials. This internal pressure (strain) generates a piezoelectric field within the active layer, which significantly reduces the internal luminescence efficiency of the light-emitting device.

[0008] Another problem arises from the fact that the density and mobility of holes injected into the p-semiconductor layer are significantly lower than those of electrons injected into the n-semiconductor layer. This results in a significantly smaller number of holes injected into the active layer than electrons, leading to excess electrons accumulating at the interface between the active layer and the p-semiconductor layer. These accumulated electrons generate a piezoelectric field, significantly reducing the probability of electrons and holes combining to generate light. Furthermore, as the injection current increases, more electrons than holes accumulate in the active layer, further reducing the internal quantum efficiency for generating light.

[0009] In this way, the aforementioned lattice constant mismatch and imbalance between holes and electrons generate internal pressure, which in turn generates an electric field within the active layer. This electric field impedes the flow of injected holes and electrons, hindering their combination and reducing the probability of light generation.

[0010] One embodiment of the present invention aims to provide a light-emitting device and a method for manufacturing the same, which improve light efficiency by controlling the lattice constant and improving the density of holes in order to reduce internal pressure caused by density imbalance and lattice constant mismatch between holes and electrons in an active layer.

[0011] One embodiment of the present invention aims to provide a light-emitting device and a method for manufacturing the same, which improve light efficiency by reducing the generation of internal pressure and improving the density of holes by having a hybrid cladding layer made of different materials.

[0012] One embodiment of the present invention aims to provide a light-emitting device having improved light efficiency by reducing the generation of internal pressure and improving the density of holes by having a cladding layer of a heterogeneous material such as zinc oxide (ZnO), and a method for manufacturing the same.

[0013] One embodiment of the present invention aims to provide a light-emitting device having excellent light output, including a reflective electrode having excellent reflectivity, and a method for manufacturing the same.

[0014] In addition, one embodiment of the present invention aims to provide a light-emitting device with improved light output and a method for manufacturing the same by making current flow uniform and minimizing interference of output light due to electrodes.

[0015] According to one aspect of the present invention, a light-emitting device is provided, comprising: a substrate; an n-type cladding layer deposited on the substrate and implemented with a semiconductor material doped with an n-type dopant; an active layer deposited on the n-type cladding layer in which holes and electrons provided from the n-type cladding layer meet and recombine to generate light; a p-type semiconductor layer deposited on the active layer and providing holes to the active layer; a protective layer deposited on the p-type semiconductor and implemented with a material having a light transmittance and an electrical conductivity in a visible light wavelength band equal to or higher than a first preset reference value and a second preset reference value, respectively; and an electrode formed on the n-type cladding layer and the protective layer, respectively.

[0016] According to one aspect of the present invention, a method for manufacturing a light-emitting device is provided, comprising: a deposition process for sequentially depositing an n-type cladding layer, an active layer, a p-type semiconductor layer, and a protective layer on a substrate; an etching process for etching one surface of the n-type cladding layer, the active layer, the p-type semiconductor layer, and the protective layer, and etching a portion of the n-type cladding layer in a vertical direction from the protective layer; and a forming process for forming a first electrode on the protective layer and a second electrode on the n-type cladding layer exposed to the outside by the etching process.

[0017] According to one aspect of the present invention, a light-emitting device is provided, comprising: a substrate; an n-type cladding layer deposited on the substrate and implemented with a semiconductor material doped with an n-type dopant; an active layer deposited on the n-type cladding layer in which holes and electrons provided from the n-type cladding layer meet and combine to generate light; a p-type cladding layer deposited on the active layer and implemented with a semiconductor material different from the n-type cladding layer and providing holes to the active layer; a protective layer deposited on the p-type cladding layer and implemented with a material having a light transmittance and an electrical conductivity in a visible light wavelength band equal to or greater than a first preset reference value and a second preset reference value, respectively; and an electrode formed on the n-type cladding layer and the protective layer, respectively.

[0018] According to one aspect of the present invention, a method for manufacturing a light-emitting device is provided, comprising: a deposition process for sequentially depositing an n-type cladding layer, an active layer, a p-type cladding layer, and a protective layer on a substrate; an etching process for etching one surface of the n-type cladding layer, the active layer, the p-type cladding layer, and the protective layer, and a vertical etching process for etching a portion of the n-type cladding layer from the protective layer; and a forming process for forming a first electrode on the protective layer and a second electrode on the n-type cladding layer exposed to the outside by the etching process, wherein the p-type cladding layer is implemented with a semiconductor of a different material from the n-type cladding layer.

[0019] According to one aspect of the present invention, a light-emitting device is provided, comprising: a substrate; an n-type cladding layer deposited on the substrate and made of a semiconductor material doped with an n-type dopant; an active layer deposited on the n-type cladding layer, in which holes and electrons provided from the n-type cladding layer meet and recombine to generate light; a p-type semiconductor layer deposited on the active layer and providing holes to the active layer; a first electrode deposited on the p-type semiconductor layer, supplying current to the p-type semiconductor layer and reflecting light generated in the active layer toward the n-type cladding layer; and a second electrode deposited on the n-type cladding layer, supplying electrons to the n-type cladding layer and improving light extraction efficiency.

[0020] According to one aspect of the present invention, a light-emitting device is provided, comprising: a substrate; an n-type cladding layer deposited on the substrate and made of a semiconductor material doped with an n-type dopant; an active layer deposited on the n-type cladding layer, in which holes and electrons provided from the n-type cladding layer meet and recombine to generate light; a p-type semiconductor layer deposited on the active layer and providing holes to the active layer; a first electrode deposited on the p-type semiconductor layer, which supplies current to the p-type semiconductor layer and reflects light generated in the active layer toward the n-type cladding layer; and a second electrode deposited on the n-type cladding layer, which supplies electrons to the n-type cladding layer and improves light extraction efficiency, wherein the first electrode and the second electrode perform the function of electrodes, and at the same time, include a metal electrode that reflects light incident thereon; and a protective layer deposited on the metal electrode, which protects the metal electrode from an external environment.

[0021] According to one aspect of the present invention, a light emitting device comprises a substrate, an n-type cladding layer deposited on the substrate and implemented with a semiconductor material doped with an n-type dopant, an active layer deposited on the n-type cladding layer and generating light by recombining holes and electrons provided from the n-type cladding layer, a p-type semiconductor layer deposited on the active layer and providing holes to the active layer, a first electrode deposited on the p-type semiconductor layer and supplying current to the p-type semiconductor layer and reflecting light generated in the active layer toward the n-type cladding layer, and a second electrode deposited on the n-type cladding layer and supplying electrons to the n-type cladding layer and improving light extraction efficiency, wherein the first electrode and the second electrode perform the function of an electrode and at the same time include a metal electrode reflecting light incident thereon, a protective layer deposited on the metal electrode and protecting the metal electrode from an external environment, and a metal electrode layer deposited between the p-type semiconductor layer or the n-type cladding layer and the metal electrode and improving contact force of the metal electrode. Provides a light emitting element.

[0022] According to one aspect of the present invention, a light-emitting device is provided, comprising: a substrate; an n-type cladding layer deposited on the substrate and made of a semiconductor material doped with an n-type dopant; an active layer deposited on the n-type cladding layer, in which holes and electrons provided from the n-type cladding layer meet and recombine to generate light; a p-type semiconductor layer deposited on the active layer and providing holes to the active layer; a first electrode deposited on the p-type semiconductor layer, which supplies current to the p-type semiconductor layer and reflects light generated in the active layer toward the n-type cladding layer; a second electrode deposited on the n-type cladding layer, which supplies electrons to the n-type cladding layer and improves light extraction efficiency; and an insulating film laminated on side surfaces of the n-type cladding layer, the active layer, and the p-type semiconductor layer, and side surfaces and a portion of an upper surface of the first electrode and the second electrode, thereby protecting each component from the outside.

[0023] According to one aspect of the present invention, a method for manufacturing a light-emitting device is provided, comprising: an etching process for etching up to a position of an n-type cladding layer for forming a mesa structure of a pn junction using a wafer having a layer structure sequentially composed of an n-type cladding layer, an active layer, and a p-type semiconductor layer on a substrate; a deposition process for forming a first electrode on an upper surface of the mesa structure and a second electrode on the n-type cladding layer exposed to the outside by the etching process; and a lamination process for laminating an insulating film on side surfaces of the n-type cladding layer, the active layer, and the p-type semiconductor layer and side surfaces and a portion of the upper surfaces of the first electrode and the second electrode.

[0024] According to one aspect of the present invention, in a method for manufacturing a light-emitting device, unlike the above-described method, the first electrode and the second electrode can be formed by different processes. That is, a method for manufacturing a light-emitting device is provided, characterized in that it includes a first deposition process in which a first electrode is sequentially deposited on the upper surface of a p-type semiconductor layer in a specific region where an n-type cladding layer, an active layer, a p-type semiconductor layer, and a pn junction mesa are to be formed on a substrate, an etching process in which etching is performed in the form of a mesa structure up to a position of the active layer, the p-type semiconductor layer, the first electrode, and the n-type cladding layer, a second deposition process in which a second electrode is deposited on the n-type cladding layer exposed to the outside by the etching process, and a lamination process in which an insulating film is laminated on side surfaces of the n-type cladding layer, the active layer, and the p-type semiconductor layer and on side surfaces and a portion of the upper surfaces of the first electrode and the second electrode.

[0025] According to one aspect of the present invention, a light-emitting device is provided, comprising: a substrate; an n-type cladding layer deposited on the substrate and implemented with a semiconductor material doped with an n-type dopant; an active layer deposited on the n-type cladding layer in which holes and electrons provided from the n-type cladding layer meet and recombine to generate light; a p-type semiconductor layer deposited on the active layer and providing holes to the active layer while inhibiting or blocking the supply of holes to a certain region; a transparent electrode deposited on the p-type semiconductor layer and supplying holes to the p-type semiconductor layer; a first electrode formed on the transparent electrode; and a second electrode deposited on the n-type cladding layer and supplying electrons to the n-type cladding layer.

[0026] According to one aspect of the present invention, a light emitting device comprises a substrate, an n-type cladding layer deposited on the substrate and implemented with a semiconductor material doped with an n-type dopant, an active layer deposited on the n-type cladding layer in which holes and electrons provided from the n-type cladding layer meet and recombine to generate light, a p-type semiconductor layer deposited on the active layer and providing holes to the active layer while inhibiting or blocking the supply of holes to a certain region, a transparent electrode deposited on the p-type semiconductor layer and supplying holes to the p-type semiconductor layer, a first electrode formed on the transparent electrode, and a second electrode deposited on the n-type cladding layer and supplying electrons to the n-type cladding layer, wherein the p-type semiconductor layer is deposited on the active layer with a semiconductor material doped with a p-type dopant and includes a current flow blocking portion that blocks the flow of current, more specifically, holes, and a p-type oxide layer deposited on the p-type cladding layer. A light emitting device characterized by including:

[0027] According to one aspect of the present invention, a light emitting device comprises a substrate, an n-type cladding layer deposited on the substrate and implemented with a semiconductor material doped with an n-type dopant, an active layer deposited on the n-type cladding layer in which holes and electrons provided from the n-type cladding layer meet and recombine to generate light, a p-type semiconductor layer deposited on the active layer and providing holes to the active layer but inhibiting or blocking the supply of holes to a certain region, a transparent electrode deposited on the p-type semiconductor layer and supplying holes to the p-type semiconductor layer, a first electrode formed on the transparent electrode, and a second electrode deposited on the n-type cladding layer and supplying electrons to the n-type cladding layer, wherein the p-type semiconductor layer is deposited on the active layer with a semiconductor material doped with a p-type dopant and includes a current flow blocking portion for blocking the flow of current or holes and a leakage current prevention portion for blocking the generation of leakage current, and implemented with a zinc oxide (ZnO)-based compound, wherein the p-type A light emitting device is provided, characterized by including a p-type oxide layer deposited on a cladding layer.

[0028] According to one aspect of the present invention, a method for manufacturing a light-emitting device is provided, comprising: a first deposition process in which an n-type cladding layer, an active layer, and a p-type cladding layer are sequentially deposited on a substrate; a treatment process in which a plasma treatment or an ion / electron implantation process using oxygen or a gas containing oxygen is performed on a predetermined region in the p-type cladding layer; a second deposition process in which a p-type oxide layer and a transparent electrode are deposited on the p-type cladding layer; an etching process in which etching is performed in the form of a mesa structure from the transparent electrode to a position of the n-type cladding layer; and a metal electrode forming process in which a first electrode is formed on the transparent electrode and a second electrode is formed on the n-type cladding layer exposed to the outside, respectively.

[0029] According to one aspect of the present invention, a method for manufacturing a light-emitting device is provided, comprising: a first deposition process in which an n-type cladding layer, an active layer, and a p-type cladding layer are sequentially deposited on a substrate; a first processing process in which a plasma treatment or an ion / electron implantation process using oxygen or an oxygen-containing gas is performed on a predetermined region in the p-type cladding layer; a second deposition process in which a p-type oxide layer and a transparent electrode are deposited on the p-type cladding layer; an etching process in which etching is performed in the form of a mesa structure from the transparent electrode to a position of the n-type cladding layer; a second processing process in which a plasma treatment is performed using oxygen or an oxygen-containing gas; and a forming process in which a first electrode is formed on the transparent electrode and a second electrode is formed on the n-type cladding layer exposed to the outside, respectively.

[0030] As described above, according to one aspect of the present invention, there is an advantage in that the generation of internal pressure can be reduced and the density of holes can be improved, thereby improving light efficiency.

[0031] According to one aspect of the present invention, there is an advantage in that the hybrid cladding layer implemented with semiconductor materials of different materials can improve light efficiency by reducing the generation of internal pressure and improving the density of holes.

[0032] According to one aspect of the present invention, there is an advantage in that the cladding layer of a heterogeneous material such as zinc oxide (ZnO) can reduce the generation of internal pressure and improve the density of holes, thereby improving light efficiency.

[0033] According to one aspect of the present invention, there is an advantage in that it can have excellent light output by including a reflective electrode that makes current flow uniform and has excellent reflectivity.

[0034] In addition, according to one aspect of the present invention, there is an advantage in that light output can be improved by minimizing interference of output light caused by an opaque metal electrode.

[0035] FIG. 1 is a drawing showing the configuration of a light-emitting device according to the first embodiment of the present invention.

[0036] FIG. 2 is a drawing illustrating the configuration of a p-type semiconductor layer according to the first embodiment of the present invention.

[0037] FIG. 3 is a graph showing the internal quantum efficiency of a light-emitting device according to the first embodiment of the present invention and a conventional light-emitting device.

[0038] FIG. 4 is a drawing comparing the internal characteristics of the active layer of a light-emitting device according to the first embodiment of the present invention and a conventional light-emitting device.

[0039] Figures 5 to 10 are drawings illustrating a manufacturing process of a light-emitting device according to the first embodiment of the present invention.

[0040] Fig. 11 is a drawing showing the configuration of a light-emitting element according to a second embodiment of the present invention.

[0041] FIGS. 12 and 13 are diagrams illustrating the configuration and energy band characteristics of an active layer according to a second embodiment of the present invention.

[0042] FIG. 14 is a drawing illustrating the configuration of a p-type cladding layer according to a second embodiment of the present invention.

[0043] Figures 15 to 17 are drawings illustrating a manufacturing process of a light-emitting device according to a second embodiment of the present invention.

[0044] Fig. 18 is a diagram illustrating a change in luminous intensity according to an applied current of a light-emitting element according to a second embodiment of the present invention.

[0045] Fig. 19 is a drawing showing the configuration of a light-emitting element according to a third embodiment of the present invention.

[0046] Figure 20 is a drawing showing the configuration of an electrode layer according to a third embodiment of the present invention.

[0047] Figure 21 is a graph showing the voltage and current characteristics of electrodes implemented with different components.

[0048] Figure 22 is a graph showing the voltage and current characteristics of an Al or Al / Ag based ohmic electrode.

[0049] Figures 23 and 24 are drawings showing the structure of an electrode according to a third embodiment of the present invention.

[0050] Figures 25 and 26 are drawings illustrating a manufacturing process of a light-emitting device according to a third embodiment of the present invention.

[0051] Fig. 27 is a drawing showing the configuration of a light-emitting element according to the fourth embodiment of the present invention.

[0052] Fig. 28 is a drawing showing the configuration of a p-type semiconductor layer according to the fourth or fifth embodiment of the present invention.

[0053] Fig. 29 is a plan view of a p-type semiconductor layer according to the fourth or fifth embodiment of the present invention.

[0054] Figure 30 is a drawing comparing the light efficiency of a light emitting device according to the fourth embodiment of the present invention and a conventional light emitting device.

[0055] Figures 31 to 37 are drawings illustrating a manufacturing process of a light-emitting device according to one embodiment of the present invention.

[0056] Fig. 38 is a drawing showing the configuration of a light-emitting element according to the fifth embodiment of the present invention.

[0057] The present invention is susceptible to various modifications and embodiments. Specific embodiments are illustrated and described in detail in the drawings. However, this is not intended to limit the present invention to specific embodiments, but rather to encompass all modifications, equivalents, and alternatives falling within the spirit and technical scope of the present invention. Throughout the description of each drawing, similar reference numerals have been used to designate similar components.

[0058] Terms such as first, second, A, and B may be used to describe various components, but these components should not be limited by these terms. These terms are used solely to distinguish one component from another. For example, without departing from the scope of the present invention, a first component may be referred to as a second component, and similarly, a second component may also be referred to as a first component. The term "and / or" includes a combination of multiple related items described herein or any of multiple related items described herein.

[0059] When a component is referred to as being "connected" or "connected" to another component, it should be understood that it may be directly connected or connected to that other component, but that there may be other components intervening. Conversely, when a component is referred to as being "directly connected" or "connected" to another component, it should be understood that there are no other components intervening.

[0060] The terminology used in this application is solely for the purpose of describing specific embodiments and is not intended to limit the present invention. Singular expressions include plural expressions unless the context clearly dictates otherwise. It should be understood that terms such as "comprise" or "have" in this application do not preclude the presence or possibility of addition of features, numbers, steps, operations, components, parts, or combinations thereof described in the specification.

[0061] Unless otherwise defined, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art to which the present invention belongs.

[0062] Terms defined in commonly used dictionaries should be interpreted to have a meaning consistent with their meaning in the context of the relevant technology, and will not be interpreted in an idealized or overly formal sense unless expressly defined in this application.

[0063] In addition, each configuration, process, procedure or method included in each embodiment of the present invention may be shared within a scope that is not technically inconsistent with each other.

[0064] FIG. 1 is a drawing illustrating the configuration of a light-emitting device according to one embodiment of the present invention.

[0065] Referring to FIG. 1, a light emitting device (100) according to one embodiment of the present invention includes a substrate (110), an n-type cladding layer (120), an active layer (130), a p-type semiconductor layer (140), a protective layer (150), and electrodes (160, 165).

[0066] The substrate (110) grows an n-type cladding layer (120) on top of itself. The substrate (110) may be made of sapphire, but is not necessarily limited thereto, and may be replaced with any material capable of growing gallium nitride (GaN).

[0067] The n-type cladding layer (120) is deposited on the substrate (110) and is implemented with a semiconductor material doped with an n-type dopant to provide electrons to the active layer (130). The n-type cladding layer (120) can be deposited on the substrate (110) by an epitaxy single crystal deposition method. The n-type cladding layer (120) can be implemented with n-type gallium nitride (n-GaN), but is not necessarily limited thereto and can be replaced with n-type InGaN, n-type AlGaN, or n-type AlInGaN, or a combination thereof.

[0068] The active layer (130) is deposited on the n-type cladding layer (120). In the active layer (130), electrons provided from the n-type cladding layer (120) and holes provided from the p-type semiconductor layer (140) meet and recombine to generate light. The active layer (130) is implemented with a well layer (not shown) having a relatively small energy band gap and a barrier layer (not shown) having a relatively large energy band gap. The active layer (130) may be implemented with an InGaN layer, an InGaN / GaN, or a GaN / AlGaN layer having different In concentrations, or may be implemented with a combination thereof.

[0069] The p-type semiconductor layer (140) is deposited on the active layer (130) and provides holes to the active layer (130). At this time, since the p-type semiconductor layer (140) is implemented with the structure shown in Fig. 2, the internal pressure (strain) can be minimized and the transfer rate of holes to the active layer (130) can be improved.

[0070] FIG. 2 is a drawing showing the configuration of a p-type semiconductor layer according to one embodiment of the present invention, and FIG. 4 is a drawing comparing the internal characteristics of the active layer of a light-emitting device according to one embodiment of the present invention and a conventional light-emitting device.

[0071] Referring to FIG. 2, a p-type semiconductor layer (140) according to one embodiment of the present invention includes a p-type cladding layer (210), an internal pressure relief layer (220), and a hole transport rate enhancement layer (230).

[0072] The p-type cladding layer (210) is deposited immediately on top of the active layer (130), and is implemented with a semiconductor material doped with a p-type dopant to provide holes to be transferred to the active layer (130). The p-type cladding layer (210) can be deposited on the active layer (130) by an epitaxy single crystal deposition method. The p-type cladding layer (210) can be implemented with p-type gallium nitride (p-GaN) as in the related art, but is not necessarily limited thereto, and can be replaced with p-type InGaN, p-type AlGaN, or p-type AlInGaN, or a combination thereof.

[0073] The internal pressure relief layer (220) is deposited on the p-type cladding layer (210) with a preset thickness to minimize internal pressure that may occur between the active layer (130) and the p-type cladding layer (210).

[0074] The internal pressure relief layer (220) may be deposited on the p-type cladding layer (210) by chemical vapor deposition (CVD), molecular beam epitaxy (MBE), pulsed laser deposition (PLD), or a hybrid method (HBD: Hybrid Beam Deposition) of each deposition method. In particular, since the internal pressure relief layer is implemented with a zinc oxide-based compound (to be described later) to solve the above-mentioned problem, it may be preferable to deposit it by the HBD method developed with a dedicated oxide deposition equipment.

[0075] The internal pressure relief layer (220) is implemented with a zinc oxide (ZnO) compound. The internal pressure relief layer may be implemented with zinc oxide (ZnO) having a hexagonal crystal structure, or may be implemented with an oxide containing zinc (Zn) and elements of Group 2 and Group 6 in the periodic table. For example, the internal pressure relief layer (220) may be implemented with ZnO, BeZnO, MgZnO, BeMgZnO, ZnSO , ZnSeO, ZnSSeO , ZnCdO, or ZnCdSeO . The internal pressure relief layer (220) implemented in this way has physical properties, electrical properties, and optical properties that are quite similar to those of the p-type cladding layer (210), but has a larger crystal lattice constant and a higher hole concentration compared to them. The internal pressure relief layer (220) can reduce the internal pressure existing between the active layer (130) and the p-type cladding layer (210). When the internal pressure existing between the active layer (130) and the p-type cladding layer (210) is reduced, an effect as illustrated in FIG. 4 may occur. Referring to FIG. 4, it can be confirmed that the light-emitting element (100) has a relatively small flat band voltage and piezo voltage compared to a conventional LED, and thus has a relatively wide depletion layer width. Accordingly, the injection of holes into the active layer (130) becomes easier, and the internal quantum efficiency can also be significantly increased.

[0076] The internal pressure relief layer (220) can be deposited on the p-type cladding layer (210) to a preset thickness. Here, the preset thickness can be 10 to 1000 nm, and more preferably 50 to 200 nm.

[0077] The internal pressure relief layer (220) can be doped with p-type impurities at a preset concentration to inject more holes into the active layer (130) or can generate Zn vacancies without impurity doping.

[0078] The internal pressure relief layer (220) may be doped with p-type impurities in a preset concentration range. The doped impurities may be p-type acceptor impurities, and may be, for example, one or more of H, Li, Na, K, Rb, Cs, Fr, Cu, Ag, N, P, As, Sb, and Bi. Such p-type acceptor impurities may be doped into a zinc oxide-based compound to form the internal pressure relief layer (220), and may be doped at a preset concentration. The preset concentration is 1*10 17 1*10 20 atom / cm -3 It can be 5*10, more preferably 18 5*10 19 atom / cm -3 It could be.

[0079] Meanwhile, the internal pressure relief layer (220) can generate Zn vacancies without doping with impurities. The internal pressure relief layer (220) can be formed by depositing an undoped zinc oxide-based compound on the surface of the p-type cladding layer and then heat-treating it in a gas atmosphere containing oxygen. The heat treatment can be performed in the atmosphere at a temperature of 400 to 700°C, more preferably, at a temperature of 450 to 550°C, for 1 to 600 minutes, more preferably, 10 to 60 minutes. When the zinc oxide-based compound is heat-treated in the aforementioned atmosphere, a phenomenon occurs where the content of metal atoms constituting the zinc oxide-based compound, for example, zinc, becomes insufficient, so that the hole concentration of the internal pressure relief layer (220) can be improved. The internal pressure relief layer (220) goes through the aforementioned process, and can minimize the internal pressure that may occur between the active layer (130) and the p-type cladding layer (210), and facilitate the injection of holes into the active layer (130).

[0080] The hole transfer rate enhancement layer (230) is deposited on the internal pressure relief layer (220) with a preset thickness to form an ohmic contact so that a low contact resistance is formed between the internal pressure relief layer (220) and the protective layer (150).

[0081] The hole transport rate enhancement layer (230) is also implemented with a zinc oxide (ZnO) compound like the internal pressure relief layer (220) and is deposited to a preset thickness. P-type impurities, n-type impurities, or p-type / n-type impurities may be doped into the hole transport rate enhancement layer (230). The hole transport rate enhancement layer (230) may be doped with impurities based on a rapid thermal annealing process, a plasma treatment / ion implantation process, or a process using an acid or base solution. In order to allow photons generated in the active layer (130) to flow well through a tunneling effect without being absorbed by themselves, the preset thickness may be 50 nm or less, and more preferably, may be in the range of 1 to 10 nm.

[0082] The hole transport rate enhancement layer (230) is doped with an impurity of a preset concentration. Here, the preset concentration may be a concentration that changes the energy band gap to form an ohmic contact between the internal pressure relief layer (220) and the protective layer (150), and may be 1*10 19 atom / cm -3 It can be more than 5*10, more specifically 19 1*10 21 atom / cm -3It can be. The impurities doped into the hole transport rate enhancement layer (230) are acceptor impurities, and may be one or more of H, Li, Na, K, Rb, Cs, Fr, Cu, Ag, N, P, As, Sb, and Bi. More preferably, the acceptor impurities may be N, P, or As, and even more preferably, N or As. Meanwhile, the impurities doped into the hole transport rate enhancement layer (230) are donor impurities, and may be one or more of B, Al, Ga, In, Ti, F, Cl, Br, and I. More preferably, the donor impurities may be Al, Ga, or In. Alternatively, the impurities doped into the hole transport rate enhancement layer (230) may include one or more of each of an acceptor impurity and a donor impurity. Such impurities are doped into the hole transport rate enhancement layer (230) at a concentration higher than a preset concentration.

[0083] The aforementioned impurities may be formed by performing surface treatment with plasma on the surface of the internal pressure relief layer (220) or by performing an ion implantation process to dope the hole transport rate enhancement layer (230) to a preset concentration. By the ion implantation process, the (above-mentioned) impurities of the preset concentration may be implanted and doped into the hole transport rate enhancement layer (230) to a preset thickness.

[0084] Alternatively, the hole transport rate enhancement layer (230) can be formed by depositing the internal pressure relief layer (220) on the p-type cladding layer (210) and then performing a high-temperature heat treatment process or a rapid heat treatment process at 300 to 1000°C in a gas atmosphere containing the aforementioned impurity molecules.

[0085] Alternatively, the hole transport rate enhancement layer (230) can be formed by depositing the internal pressure relief layer (220) on the p-type cladding layer (210) and then surface-treating the internal pressure relief layer (220) with an acid or base solution containing the aforementioned impurity molecules.

[0086] By including the above-described configuration (210 to 230), the p-type semiconductor layer (140) minimizes the internal pressure that may occur between the active layer (130) and the p-type cladding layer (210), and allows more holes to be transferred to the active layer, while forming an ohmic contact between itself and the protective layer (150) so that the protective layer (150) can be smoothly deposited. In particular, the p-type semiconductor layer (140) can inject a relatively larger amount of holes into the active layer (130) than before, so that electrons that are excessively supplied to the active layer (130) and accumulated within the active layer (130) can be removed. Therefore, the p-type semiconductor layer (140) can remove the piezoelectric field formed in the active layer (130) by the accumulated electrons, thereby improving the luminous efficiency.

[0087] The protective layer (150) is deposited on the p-type semiconductor layer (140) to protect the p-type semiconductor layer (140) from the outside. The p-type semiconductor layer (140), especially the internal pressure relief layer (220) and the hole transport rate enhancement layer (230) within the p-type semiconductor layer (140), are made of the aforementioned components and react with most acid and base chemicals. Accordingly, the protective layer (150) is deposited on the p-type semiconductor layer (140) to protect the p-type semiconductor layer (140) from the outside. Meanwhile, since the protective layer (150) is deposited on the p-type semiconductor layer (140), it must not interfere with the propagation of light generated from the active layer (130), and at the same time, it must diffuse the current injected from the electrode (165) so that holes can be uniformly transferred to the active layer (130) throughout the entire area of ​​the p-type semiconductor layer (140). Accordingly, the protective layer (150) is implemented with a material having a light transmittance in the visible light wavelength band equal to or higher than a preset first reference value and an electrical conductivity equal to or higher than a preset second reference value. For example, the protective layer (150) may be implemented with ITO, NiO, GaZnO, InZnO, InGaZnO, or graphene. The protective layer (150) is implemented with the above-described components and is deposited on the p-type semiconductor layer (140) by a physical vapor deposition (PVD) or chemical vapor deposition (CVD) method including E-Beam deposition or sputtering. The protective layer (150) may be deposited with a preset thickness, for example, in a thickness range of 10 to 1000 nm.

[0088] As the protective layer (150) is implemented in this manner, holes can be uniformly injected from the p-type semiconductor layer (140) to the active layer (130) while protecting the p-type semiconductor layer (140) from the outside.

[0089] Electrodes (160, 165) are formed on the n-type cladding layer (120) and the protective layer (150), respectively, to supply current to each component (120, 150). The electrode (160) is formed on the n-type cladding layer (120) that is etched and exposed to the outside, and the electrode (165) is formed on the protective layer (150). The electrodes (160, 165) may be formed of one or more metals selected from Al, Ag, Cr, Cu, Mo, Ni, Pd, Ti, and W, or alloys thereof. In particular, since the electrode (165) is positioned in the direction in which light is irradiated from the active layer (130), it may be formed of Al or Ag having excellent reflectivity.

[0090] As the light emitting element (100) includes the above-described configuration, it can be confirmed that it has excellent quantum efficiency (light efficiency) as shown in FIG. 3.

[0091] FIG. 3 is a graph showing the internal quantum efficiency of a light-emitting device according to one embodiment of the present invention and a conventional light-emitting device.

[0092] Referring to FIG. 3, it can be confirmed that the internal quantum efficiency of the light-emitting element (100) is improved by more than 30% compared to the conventional one.

[0093] Figures 5 to 10 are drawings illustrating a manufacturing process of a light-emitting device according to one embodiment of the present invention. Manufacturing of the light-emitting device (100) can be performed by a light-emitting device manufacturing apparatus.

[0094] Referring to FIGS. 5 to 8, an n-type cladding layer (120), an active layer (130), a p-type semiconductor layer (140), and a protective layer (150) are sequentially deposited on a substrate (110).

[0095] Referring to Fig. 9, etching is performed on one side of the active layer (130), the p-type semiconductor layer (140), the protective layer (150), and the n-type cladding layer (120). The etching is performed vertically from the protective layer (150) to a portion of the n-type cladding layer (120).

[0096] Referring to Fig. 10, as etching progresses, an electrode (160) is formed on the exposed n-type cladding layer (120) and an electrode (165) is formed on the protective layer (150).

[0097] Fig. 11 is a drawing showing the configuration of a light-emitting element according to a second embodiment of the present invention.

[0098] Referring to FIG. 11, a light-emitting device (1100) according to a second embodiment of the present invention includes a substrate (110), an n-type cladding layer (120), an active layer (1110), a p-type cladding layer (1120), a protective layer (150), and electrodes (160, 165). Since the substrate (110), the n-type cladding layer (120), the protective layer (150), and the electrodes (160, 165) are the same as those in the light-emitting device (100), a repeated description thereof will be omitted.

[0099] The active layer (1110) is deposited on the n-type cladding layer (120) like the active layer (130), and electrons provided from the n-type cladding layer (120) and holes provided from the p-type cladding layer (140) combine to generate light. The active layer (130) is implemented with a well layer (Quantum Well) having a relatively small energy band gap and a barrier layer (Quantum Barrier) having a relatively large energy band gap. The active layer (130) can be implemented with an InGaN layer, an InGaN / GaN, or a GaN / AlGaN layer having different In concentrations, or can be implemented with a combination of these.

[0100] In particular, the active layer (1110) includes a barrier layer at the outermost portion of the active layer (1110). The outermost barrier layer is implemented with a thickness greater than a preset thickness in order to block oxygen from entering the interior of the active layer (1110). However, in order to secure the density and mobility of electrons and holes, the outermost barrier layer close to the n-type cladding layer (120) may be implemented to be doped with an n-type dopant, and the outermost barrier layer close to the p-type cladding layer (140) may be doped with a p-type dopant. By being implemented in this way, the active layer (1110) can prevent oxygen from entering its interior. The active layer (1110) can prevent oxygen from entering even without including an additional layer (e.g., a protective layer, etc.) that separately prevents oxygen from entering the exterior of the active layer (1110). The specific structure of the active layer (1110) is illustrated in FIGS. 12 and 13.

[0101] FIGS. 12 and 13 are diagrams illustrating the configuration and energy band characteristics of an active layer according to a second embodiment of the present invention.

[0102] As can be seen in Fig. 12, the well layer (1220) is implemented to have a relatively small energy band gap, and the barrier layers (1210, 1230) are implemented to have a relatively large energy band gap.

[0103] At this time, as described above, the outermost barrier layer (1210, hereinafter referred to as the first barrier layer) close to the n-type cladding layer and the outermost barrier layer (1230, hereinafter referred to as the second barrier layer) close to the p-type cladding layer are implemented to have a thickness greater than a preset thickness. In addition, the first barrier layer (1210) is formed with 1*10 n-type impurities such as Si or Ge to secure the density and mobility of electrons. 16 1*10 20 cm -3 It is implemented with GaN, InGaN or AlGaN doped with a concentration of 1*10, and the second barrier layer (1230) is made of p-type impurities such as Mg to secure hole density and mobility. 16 1*1020 cm -3 It is implemented with GaN, InGaN or AlGaN doped with a concentration of .

[0104] Alternatively, as illustrated in FIG. 13, a plurality of well layers (1220a to 1220n) and a plurality of barrier layers (1310a to 1310n) are deposited between the first barrier layer (1210) and the second barrier layer (1220), and the active layer (1110) can be implemented as a multi-quantum well.

[0105] Since the active layer (1110) has this structure, conventional GaN-based light-emitting devices do not need to include an EBL (Electron Blocking Layer) between the active layer and the p-type cladding layer to control the flow of electrons.

[0106] Referring again to FIG. 11, the p-type cladding layer (1120) is deposited on the active layer (1110), particularly, the second barrier layer (1230), and provides holes to the active layer (1110). At this time, since the p-type cladding layer (1120) is implemented with the structure shown in FIG. 14, the internal pressure (strain) can be minimized and the transfer rate of holes to the active layer (1110) can also be improved.

[0107] FIG. 14 is a drawing illustrating the configuration of a p-type cladding layer according to a second embodiment of the present invention.

[0108] Referring to FIG. 14, the p-type cladding layer (1120) according to the second embodiment of the present invention includes an internal pressure relief layer (1410) and a hole transport rate enhancement layer (1420).

[0109] The internal pressure relief layer (1410) has the same characteristics as the internal pressure relief layer (220) except that it is deposited immediately on top of the second barrier layer (230).

[0110] The hole transport rate enhancement layer (1420) also has the same characteristics as the hole transport rate enhancement layer (230).

[0111] By including the above-described configuration (1410 and 1420) of the p-type cladding layer (1120), the internal pressure that may occur between the active layer (1110) and itself is minimized, the hole transfer rate is significantly improved, and an ohmic contact is formed between the p-type cladding layer (1120) and the protective layer (150) is deposited.

[0112] As the light emitting element (1100) includes the above-described configuration, it can be confirmed that it has the characteristics of light emitting intensity as in FIG. 18.

[0113] Fig. 18 is a diagram illustrating a change in luminous intensity according to an applied current of a light-emitting element according to a second embodiment of the present invention.

[0114] Referring to Fig. 18, it can be confirmed that the light emitting element (1100) outputs light in the blue wavelength band, and it can be confirmed that the light emission intensity also increases as the amount of injected current increases.

[0115] Figures 15 to 17 are drawings illustrating a manufacturing process of a light-emitting device according to a second embodiment of the present invention.

[0116] Referring to FIGS. 15 to 17, an n-type cladding layer (120), an active layer (130), a p-type semiconductor layer (140), and a protective layer (150) are sequentially deposited on a substrate (110). More specifically, an internal pressure relief layer (1410) and a hole transport rate enhancement layer (1420) are deposited on the active layer (130).

[0117] Thereafter, a light-emitting device is manufactured according to the same process as described above with reference to FIGS. 9 and 10.

[0118] Fig. 19 is a drawing showing the configuration of a light-emitting element according to a third embodiment of the present invention.

[0119] Referring to FIG. 19, a light-emitting device (1900) according to an embodiment of the present invention includes a substrate (110), an n-type cladding layer (120), an active layer (130), a p-type semiconductor layer (140), electrodes (150, 155), and an insulating film (1910). The substrate (110), the n-type cladding layer (120), the active layer (130), and the electrodes (150, 155) in the light-emitting device (1900) according to an embodiment of the present invention are the same as those in the light-emitting device (100), and therefore, a repeated description thereof will be omitted. Meanwhile, the p-type semiconductor layer (140) in the light-emitting device (1900) according to one embodiment of the present invention is implemented with the same configuration as that in the light-emitting device (100), and is implemented in the same manner except that the hole transport rate enhancement layer (230) is doped with an impurity of a preset concentration for the purpose of forming an ohmic contact between the internal pressure relief layer (220) and the electrode (150).

[0120] The electrode (150) is deposited on the p-type semiconductor layer (140), more specifically, the hole transport rate enhancement layer (230), and supplies current to the p-type semiconductor layer (140). The electrode (150) is made of a metal having excellent reflectivity, and reflects light generated in the active layer (130) toward the n-type cladding layer (120). The electrode (150) can be typically formed by deposition using an EB (Electron Beam) method, an evaporation method, or a sputtering method. The electrode (150) has the configuration illustrated in FIG. 20a or FIG. 20b and performs the aforementioned operation.

[0121] Figure 20 is a drawing showing the configuration of an electrode layer according to a third embodiment of the present invention.

[0122] Referring to FIG. 20a, an electrode layer (150, also 155 described below) according to one embodiment of the present invention includes a metal electrode (2010) and a protective layer (2020).

[0123] The metal electrode (2010) functions as an electrode and reflects light incident on it. The metal electrode (2010) is deposited on the hole transport rate enhancement layer (230) and reflects light incident on it. The metal electrode (2010) may be made of aluminum (Al) or may include aluminum (Al) and silver (Ag). When made of aluminum, the metal electrode (2010) may be made to have a thickness of 20 to 10,000 nm. When made of aluminum and silver, the metal electrode (2010) may be made to have aluminum having a thickness of less than 10 nm first deposited, and then silver may be deposited on the aluminum to have a thickness of 200 to 1,000 nm.

[0124] A protective layer (2020) is deposited on the metal electrode (2010) to protect the metal electrode (2010) from the external environment. As described above, the metal electrode (2010) is formed of aluminum or silver, which are metals with excellent reflectivity, to reflect light incident thereon. However, the metal forming the metal electrode (2010) is prone to oxidation and has the property of easily chemically reacting with water or other chemicals. Accordingly, the protective layer (2020) is deposited on the metal electrode (2010) to minimize exposure of the metal electrode (2010) to the external environment. The protective layer (2020) is formed of aluminum (Al), which has low reactivity with other components. It may be implemented with titanium (Ti), chromium (Cr), nickel (Ni), copper (Cu), palladium (Pd), molybdenum (Mo), tantalum (Ta), tungsten (W), rhenium (Re), platinum (Pt), or gold (Au), or may be implemented with an alloy of the aforementioned components.

[0125] As the electrode layer (150) has this structure, it can transmit current to the p-type semiconductor layer (140) and reflect light incident on it while having high stability.

[0126] Meanwhile, the electrode layer (150) according to one embodiment of the present invention can be implemented as shown in FIG. 20b.

[0127] Referring to FIG. 20b, an electrode layer (150, also 155 described below) according to one embodiment of the present invention may further include a metal contact layer (2030) in addition to a metal electrode (2010) and a protective layer (2020).

[0128] Even if the metal electrode (2010) is deposited on the hole transport enhancement layer (230), there is a concern that it may be easily peeled off due to relatively weak contact force. Therefore, in order to improve the contact force of the metal electrode (2010) on the hole transport enhancement layer (230), a metal contact layer (2030) may be preferentially deposited between the two layers (230, 2010). The metal contact layer (2030) may be made of aluminum (Al) and may be deposited in the form of a thin film having a thickness of less than 10 nm. Alternatively, the metal contact layer (2030) may be implemented in a form in which an additional metal layer made of chromium (Cr), titanium (Ti), palladium (Pd), or molybdenum (Mo) having a thickness of less than 2 nm is preferentially deposited on the hole transport enhancement layer (230) to further improve the contact force, and then an aluminum (Al) layer having a thickness of less than 10 nm is deposited on the additional metal layer. The metal electrode (2010) and the protective layer (2020) can be deposited on the metal contact layer (2030), so that the contact force of the metal electrode (2010) and the protective layer (2020) can be further improved.

[0129] Referring again to FIG. 19, the electrode (150) has the structure described above and performs the operation described above. At this time, the electrode (150) may have the structure depicted in FIG. 23 or 24 when deposited on the p-type semiconductor layer (140).

[0130] Figures 23 and 24 are drawings showing the structure of an electrode according to a third embodiment of the present invention.

[0131] Referring to FIG. 23, an electrode (150) according to one embodiment of the present invention may have a structure in which it is evenly deposited on a p-type semiconductor layer (140), more specifically, a hole transport rate enhancement layer (230).

[0132] Meanwhile, referring to FIG. 24, before the electrode (150) is deposited, etching may be performed on a portion of the internal pressure relief layer (220) and the hole transport rate enhancement layer (230) or at preset intervals. Accordingly, a portion of the p-type cladding layer (210) may be exposed. The deposition of the electrode (150) may be performed while the internal pressure relief layer (220) and the hole transport rate enhancement layer (230) are etched. Accordingly, the electrode (150) may directly contact a portion of the p-type cladding layer (210), so that current may be more efficiently transmitted directly to the p-type cladding layer (210) without passing through the internal pressure relief layer (220) and the hole transport rate enhancement layer (230).

[0133] Referring again to FIG. 19, the electrode (155) is deposited on the n-type cladding layer (120) and supplies electrons to the n-type cladding layer (120). The electrode (155) can be formed by deposition using a typical EB (Electron Beam) method, an evaporation method, or a sputtering method. Similarly, the electrode (155) is also made of a metal with excellent reflectivity like the electrode (150), thereby improving light extraction efficiency. Structurally, light generated in the active layer (130) does not directly reach the electrode (155). However, the light generated in the active layer (130) is trapped within the light-emitting element (100) due to the difference in refractive index between the light-emitting element (100) and the air. Accordingly, a large amount of light generated and emitted from the active layer (130) can also be incident on the electrode (155). The electrode (155) is implemented with a metal having excellent reflectivity, thereby improving the light output characteristics of the light-emitting element (100) by reflecting light rather than absorbing it.

[0134] As illustrated in FIG. 20a, the electrode (155) may include the aforementioned reflective electrode (2010) and protective layer (2020), or as illustrated in FIG. 20b, the electrode (155) may further include a metal contact layer (2030) in addition to the metal electrode (2010) and protective layer (2020). Accordingly, the electrode (155) has the electrical characteristics illustrated in FIG. 21 or 22.

[0135] Fig. 21 is a graph showing the voltage and current characteristics of electrodes implemented with different components, and Fig. 22 is a graph showing the voltage and current characteristics of an Al or Al / Ag-based ohmic electrode.

[0136] Referring to Fig. 21, it can be confirmed that even if a metal electrode (2010) including aluminum (Al) or aluminum (Al) and silver (Ag) is deposited first on the n-type cladding layer (120), a high-quality ohmic contact is formed. However, if a metal contact layer (2030) made of chromium (Cr) or the like is deposited first and then the metal electrode (2010) or the like is deposited, a more stable contact force is achieved and a high-quality ohmic contact can be formed.

[0137] Meanwhile, referring to FIG. 22, silver (Ag) is the metal with the best reflectivity, but when deposited on the n-type cladding layer (120), an ohmic contact is not formed, so there may be difficulties in using it as an n-type metal electrode (2010). However, as described above, the metal electrode (2010) is implemented to include silver together with aluminum, so that a high-quality ohmic contact can be formed. In addition, a metal contact layer (2030) may be additionally deposited between the two (230, 2010) so as to form a better ohmic contact. Accordingly, the electrodes (150, 155) can form an excellent ohmic contact with the p-type semiconductor layer (140).

[0138] Referring again to FIG. 19, an insulating film (1910) is laminated on the side surfaces of the n-type cladding layer (120), the active layer (130), and the p-type semiconductor layer (140), as well as the side surfaces and a portion of the upper surface of the electrodes (150, 155), thereby protecting each component within the light-emitting element (100) from the outside and electrically isolating the n-type region and the p-type region.

[0139] Figures 25 and 26 are drawings illustrating a manufacturing process of a light-emitting device according to a third embodiment of the present invention.

[0140] The manufacturing process illustrated in Figures 5 to 9 is performed.

[0141] Referring to Figure 25, etching is performed and an electrode (155) is deposited on the exposed n-type cladding layer (120).

[0142] Referring to Fig. 26, an insulating film (1910) is laminated on the side surfaces of the n-type cladding layer (120), the active layer (130), and the p-type semiconductor layer (140), as well as the side surfaces and part of the upper surface of the electrodes (150, 155).

[0143] Fig. 27 is a drawing showing the configuration of a light-emitting element according to the fourth embodiment of the present invention.

[0144] Referring to FIG. 27, a light-emitting device (2700) according to a fourth embodiment of the present invention includes a substrate (2710), an n-type cladding layer (2720), an active layer (2730), a p-type semiconductor layer (2740), a transparent electrode (2750), and electrodes (2760, 2765). The substrate (2710), the n-type cladding layer (2720), and the active layer (2730) are implemented with the same configuration as the substrate (110), the n-type cladding layer (120), and the active layer (130) and can perform the same operation.

[0145] The p-type semiconductor layer (2740) is deposited on the active layer (2730) and provides holes to the active layer (2730). At this time, since the p-type semiconductor layer (2740) is implemented with the structure shown in Fig. 28, the light output of the light-emitting element can be improved by preventing light from being output onto the electrode (2765, electrode positioned far from the substrate) positioned in the direction in which light is output.

[0146] FIG. 28 is a drawing showing the configuration of a p-type semiconductor layer according to the fourth or fifth embodiment of the present invention, FIG. 29 is a plan view of a p-type semiconductor layer according to the fourth or fifth embodiment of the present invention, and FIG. 30 is a drawing comparing the light efficiency of a light-emitting device according to the fourth embodiment of the present invention and a conventional light-emitting device.

[0147] Referring to FIG. 28, the p-type semiconductor layer (2740) according to the fourth or fifth embodiment of the present invention includes a p-type cladding layer (2810) and a p-type oxide layer (2820). The p-type cladding layer (2810) and the p-type oxide layer (2820) are implemented with the same configuration as the p-type cladding layer (210) and the internal pressure relief layer (220), respectively, and can perform the same operation.

[0148] Meanwhile, a current flow obstruction portion (2830) having an area equal to or larger than the area of ​​the electrode (2765) is formed vertically below an area in the p-type cladding layer (2810), more specifically, in a region where the electrode (2765) is to be placed. The current flow obstruction portion (2830) is formed through a plasma treatment or an ion / electron implantation process using oxygen or a gas containing oxygen. The process is performed at a position that coincides with the center of the electrode (2765) on the p-type cladding layer (2810) for an area equal to or larger than the entire (cross-sectional) area of ​​the electrode (2765). When the plasma treatment or the ion / electron implantation process is performed in the p-type cladding layer (2810), the physical characteristics (mainly, characteristics that affect the flow of current or electrical characteristics) of the p-type cladding layer (2810) change due to this treatment so as to obstruct the flow of current (holes). In the area where the plasma treatment or injection process is performed, the flow of current (here, holes) is impeded. Thereafter, when a p-type oxide layer (2820) is deposited on the p-type cladding layer (2810) whose physical properties have changed, the components constituting the p-type oxide layer (2820) affect the area where the physical properties of the p-type cladding layer (2810) have changed, and a current flow impeding portion (2830) within the p-type cladding layer (2810) is completed. This can be clearly confirmed in FIG. 29. Referring to FIG. 29, it can be confirmed that when the p-type oxide layer (2820) is deposited on the p-type cladding layer (2810), a current flow impeding portion (2830) is formed at the boundary between the two (2810, 2820). The current flow impeding portion (2830) blocks most of the current or completely blocks the current. Since the current flow blocking portion (2830) is not implemented by adding a separate thin film layer on the p-type cladding layer (2810), no additional deposition process is required.

[0149] Since a current flow obstruction portion (2830) is formed vertically below the electrode (2765) with an area at least the same as that of the electrode, when the p-type cladding layer (2810) transfers holes to the active layer (2730), the holes are transferred to all areas of the active layer (2730) except for the area where the current flow obstruction portion (2830) is formed. Accordingly, when holes and electrons recombine in the active layer (2730) and light is emitted, the light generated in the remaining areas except for the area where the electrode (2765) is located can freely leave the active layer without significant obstruction by the electrode (2765). As can be confirmed in FIG. 30, the light-emitting element (2700) can be confirmed to have an improved light output of about 7% compared to a conventional light-emitting element.

[0150] Referring again to FIG. 27, a transparent electrode (2750) is laminated on a p-type semiconductor layer (2740), more specifically, a p-type oxide layer (2820), and supplies current to the p-type semiconductor layer (2740). In order to supply current (holes) from the p-type semiconductor layer (2740) to the entire region of the active layer (2730) except for the current flow obstruction region (2830), a transparent electrode (2750) having excellent electrical conductivity and transparency is laminated on the p-type oxide layer (2820). The transparent electrode (2750) may be implemented with ITO, NiO, GaZnO, InZnO, or InGaZnO so as to have transparency and excellent electrical conductivity.

[0151] Electrodes (2760, 2765) are formed on the n-type cladding layer (2720) and the transparent electrode (2750), respectively, to supply current to each component (2720, 2750). The electrode (2760) is formed on the n-type cladding layer (2720) that is etched and exposed to the outside, and the electrode (2765) is formed on the transparent electrode (2750). The electrodes (2760, 2765) may be implemented with one or more metals selected from Al, Ag, Cr, Cu, Mo, Ni, Pd, Ti, and W, or alloys thereof.

[0152] Since the light emitting element (2700) includes the above-described configuration, excellent light output can be secured by minimizing the light irradiated to the electrode (2765).

[0153] Figures 31 to 37 are drawings illustrating a manufacturing process of a light-emitting device according to a fourth embodiment of the present invention. The manufacturing of the light-emitting device (2700) can be performed by a light-emitting device manufacturing apparatus.

[0154] Referring to FIGS. 31 and 32, an n-type cladding layer (2720), an active layer (2730), and a p-type cladding layer (2810) are sequentially deposited on a substrate (2710).

[0155] Referring to FIG. 33, after the p-type cladding layer (2810) is deposited, a plasma treatment or ion / electron implantation process is performed in an area where a current flow obstruction portion (2830) is to be formed (at least the same area as the vertically lower portion of the electrode (2765)).

[0156] Referring to Figure 34, a p-type oxide layer (2820) is deposited on a p-type cladding layer (2810). Accordingly, a current flow impeding portion (2830) is formed within the p-type cladding layer (2810).

[0157] Referring to Figure 35, a transparent electrode (2750) is laminated on a p-type oxide layer (2820).

[0158] Referring to Figure 36, etching is performed in the form of a mesa structure from the transparent electrode (2750) to a position of the n-type cladding layer (2720).

[0159] Referring to Figure 37, as etching progresses, an electrode (2760) is formed on the exposed n-type cladding layer (2720) and an electrode (2765) is formed on the transparent electrode (2750).

[0160] Fig. 38 is a drawing showing the configuration of a light-emitting element according to the fifth embodiment of the present invention.

[0161] Referring to FIG. 38, a light emitting device (3800) according to the fifth embodiment of the present invention may further include a leakage current prevention unit (3810) within a p-type cladding layer (2810).

[0162] The p-type cladding layer (2810) within the light-emitting element (3800) may further include leakage current prevention sections (3810) at both ends. When the light-emitting element has a mesa structure, a problem may arise where unintended current is injected into the edge region of the mesa, such as the p-type cladding layer (2810).

[0163] To prevent such problems, the p-type cladding layer (2810) may further include leakage current prevention portions (3810) at both ends. As described above with reference to FIG. 36, when etching is performed in the form of a mesa structure from the transparent electrode (2750) to a position of the n-type cladding layer (2720) and the side of the p-type cladding layer (2810) is exposed to the outside, additional plasma treatment may be performed using oxygen or a gas containing oxygen. Even if the plasma treatment is performed, the physical characteristics of the p-type oxide layer (2820) (mainly, characteristics affecting the flow of current or electrical characteristics) do not change, and only the physical characteristics of the p-type cladding layer (2810) change. Accordingly, the area of ​​the p-type cladding layer (2810) where the p-type oxide layer (2820) is deposited and not fully exposed to the outside does not experience a change in physical properties, but as etching progresses, a change in physical properties occurs in the side surfaces (ends) exposed to the outside and a predetermined area therefrom. The area of ​​the predetermined area from both ends of the p-type cladding layer (2810) is implemented as a leakage current prevention section (3810) through the aforementioned process, and, like the current flow blocking section (2830), blocks the flow of current.

[0164] The p-type cladding layer (2810) can additionally include a leakage current prevention section (3810) to block the occurrence of leakage current toward both ends, thereby further improving the light output of the light-emitting element (3800).

[0165] The above description is merely an example of the technical idea of ​​the present embodiment, and those skilled in the art will appreciate that various modifications and variations can be made without departing from the essential characteristics of the present embodiment. Therefore, the present embodiments are not intended to limit the technical idea of ​​the present embodiment, but rather to explain it, and the scope of the technical idea of ​​the present embodiment is not limited by these embodiments. The scope of protection of the present embodiment should be interpreted by the claims below, and all technical ideas within a scope equivalent thereto should be interpreted as being included in the scope of rights of the present embodiment.

[0166]

[0167] CROSS-REFERENCE TO RELATED APPLICATION

[0168]

[0169] This patent is the result of research conducted with the support of the National Research Foundation of Korea (NRF) with funding from the Korean government (Ministry of Science and ICT) in 2023 (Project ID: 1711195422, Subproject ID: 2022M3H4A3A01082883, Project Name: Development of Source Technology for 5μm-Class InGaN Red Micro LED with External Quantum Efficiency of 30%).

[0170]

[0171] This patent application claims priority under 35 USC § 119(a) to Korean Patent Application No. 10-2023-0096662, filed in Korea on July 25, 2023, Korean Patent Application No. 10-2023-0106792, filed in Korea on August 16, 2023, Korean Patent Application No. 10-2023-0128003, filed in Korea on September 25, 2023, and Korean Patent Application No. 10-2024-0046343, filed in Korea on April 5, 2024, all of which are incorporated by reference herein. In addition, if this patent application claims priority in a country other than the United States for the same reasons as above, all contents thereof are incorporated by reference into this patent application.

Claims

1. In light-emitting devices, substrate; An n-type cladding layer deposited on the substrate and implemented with a semiconductor material doped with an n-type dopant; An active layer deposited on the n-type cladding layer, in which holes and electrons provided from the n-type cladding layer meet and recombine to generate light; A p-type semiconductor layer deposited on the active layer and providing holes to the active layer; A protective layer formed of a material having a light transmittance and an electrical conductivity in the visible light wavelength band equal to or greater than a first preset reference value and a second preset reference value, respectively, and deposited on the p-type semiconductor to protect the p-type semiconductor from the outside; and Electrodes formed on the n-type cladding layer and the protective layer, respectively A light-emitting device characterized by including:

2. In paragraph 1, The above n-type cladding layer is, A light-emitting device characterized by being implemented with any one of n-type GaN, n-type InGaN, n-type AlGaN, or n-type AlInGaN, or a combination thereof.

3. In paragraph 1, The above p-type semiconductor layer is, A light-emitting device characterized by relieving internal pressure (strain) generated by deposition on the above active layer.

4. In paragraph 1, The above p-type semiconductor layer is, A light-emitting element characterized by being in ohmic contact with the above protective layer.

5. In paragraph 1, The above protective layer is, A light-emitting device characterized by being implemented with ITO, NiO, GaZnO, InZnO, InGaZnO or graphene.

6. In paragraph 1, The above electrodes are, A light-emitting device characterized in that it is implemented with one or more metals selected from Al, Ag, Cr, Cu, Mo, Ni, Pd, Ti, and W, or an alloy thereof.

7. In a method for manufacturing a light-emitting element, A deposition process for sequentially depositing an n-type cladding layer, an active layer, a p-type semiconductor layer, and a protective layer on a substrate; An etching process in which one side of the n-type cladding layer, the active layer, the p-type semiconductor layer, and the protective layer are etched, and a part of the n-type cladding layer is etched vertically from the protective layer; and A formation process of forming a first electrode on the protective layer and a second electrode on the n-type cladding layer exposed to the outside by the etching process. A method for manufacturing a light-emitting device, characterized by including:

8. In paragraph 7, The above n-type cladding layer is, A method for manufacturing a light-emitting device characterized by deposition using an epitaxy single crystal deposition method.

9. In paragraph 7, The above p-type semiconductor layer is, A method for manufacturing a light-emitting device characterized by improving the concentration of holes injected into an active layer and reducing the internal pressure formed in the active layer.

10. In paragraph 7, The above protective layer is, A method for manufacturing a light-emitting device, characterized in that the light transmittance and electrical conductivity in the visible light wavelength band are implemented using a material having a first preset standard value and a second preset standard value or higher, respectively.

11. In paragraph 10, The above protective layer is, A method for manufacturing a light-emitting device characterized by deposition using physical vapor deposition (PVD), chemical vapor deposition (CVD), two-beam deposition, or sputtering.

12. In paragraph 7, The above first electrode, A method for manufacturing a light-emitting device, characterized in that the light-emitting device is implemented with a metal having a reflectivity higher than a preset standard.

Images