Cache management method and apparatus, device, and storage medium

Abstract

The present disclosure relates to the technical field of storage, and provides a cache management method and apparatus, a device, and a storage medium. The method is applied to a cache system. The cache system comprises n cache layers. Among the n cache layers, the IO speed of an (i+1)-th layer is lower than the IO speed of an i-th layer, wherein i is a positive integer and less than n. Each of the n cache layers comprises a cold area and a hot area. The method comprises: when data is added to the cache system, storing the data into the cold area of a first layer in a cache block form, and when the remaining cache space in the cold area of the i-th layer is insufficient, using a first-in first-out mechanism to move cache blocks in the cold area of the i-th layer to the cold area of the (i+1)-th layer. Whenever an exchange condition is satisfied, exchange processing is performed on a hit cache block in the hot area of the (i+1)-th layer and a missed cache block in the hot area of the i-th layer. By adopting the solution provided by the present disclosure, varying working conditions of the cache system can be dealt with as much as possible.

Description

Cache management method, device, equipment and storage medium

[0001] This disclosure claims priority to Chinese patent applications with application number 202310973215.0 filed on August 3, 2023, entitled “Method, apparatus and cluster for adaptive local multi-device cache system management” and application number 202311427797.9 filed on October 30, 2023, entitled “Method, apparatus, device and storage medium for cache management”, the entire contents of which are incorporated by reference into this disclosure. Technical Field

[0002] The present disclosure relates to the technical field of data storage, and in particular to a cache management method, apparatus, device, and storage medium. Background Art

[0003] In the current scenario of a storage and computing separation architecture, when a computing device faces a large analytical request, it needs to transfer the data to the computing device through the network for subsequent processing. The network overhead of large-scale data transmission is relatively large, and network input and output (IO) has become a bottleneck in computing performance. Although there is a cache (buffer) in the memory of the computing device for caching data, the cache space is usually limited, and the acceleration effect for scenarios with large amounts of data is not obvious. With the widespread use of large-capacity storage devices, large-capacity storage devices such as solid state disks (SSDs) in computing devices are used to expand cache capacity and improve cache hit rates, thereby reducing network IO times. However, a multi-device cache system will inevitably bring management complexity. Therefore, it is necessary to provide a multi-device cache management method.

[0004] Summary of the Invention

[0005] The present disclosure provides a cache management method, apparatus, device, and storage medium, which can manage a cache system. The technical solution is as follows.

[0006] In a first aspect, the present disclosure provides a cache management method, which is applied to a cache system, wherein the cache system includes n cache layers, the input and output (IO) speed of the i+1th layer of the n cache layers is lower than the IO speed of the i-th layer, i is a positive integer and less than n, each of the n cache layers includes a cold zone and a hot zone, and n is greater than or equal to 2. The method includes: when data is added to the cache system, the data is stored in the cold zone of the first layer in the form of cache blocks; when there is insufficient remaining cache space in the cold zone of the i-th layer, a first-in-first-out mechanism is used to move the cache blocks in the cold zone of the i-th layer to the cold zone of the i+1th layer; for the cold zone of each layer from the second to the nth layer, if the first cache block in the cold zone is hot data, the first cache block is moved to the hot zone of the same layer as the cold zone; and whenever an exchange condition is met, a hit cache block in the hot zone of the i+1th layer is exchanged with a missed cache block in the hot zone of the i-th layer.

[0007] In the solution shown in the present disclosure, the cache system includes n cache layers, the IO speeds of the n cache layers are different, each cache layer includes a cold zone and a hot zone, and the cache blocks in the n cache layers can be adaptively moved between cache layers and within the cold zone and hot zone of the same layer based on the current working conditions, so that a good cache hit effect can be achieved even in changing working conditions.

[0008] In an optional manner, the method further includes: for the hot zone of each layer in the n cache layers, if the second cache block in the hot zone is hit, the logical information of the second cache block is moved before the cursor of the hot zone, wherein, at the start time, the cursor is located at the head of the hot zone, and the logical information includes the storage address information of the second cache block; the pair of cache blocks hit in the hot zone of the i+1th layer and cache blocks not hit in the hot zone of the i-th layer are exchanged, including: the third cache block and the fourth cache block are exchanged, wherein the third cache block includes the cache block to which the logical information before the cursor in the hot zone of the i+1th layer belongs, and the fourth cache block includes the cache block to which the logical information after the cursor in the hot zone of the i-th layer belongs.

[0009] The solution shown in the present disclosure can manage cache blocks more conveniently by setting a cursor to distinguish hotter cache blocks in a hot zone.

[0010] In an optional manner, an exchange process is performed on the third cache block and the fourth cache block, including: if the number of third cache blocks is less than the number of fourth cache blocks, the third cache block is moved to a partial area in the hot zone of the i-th layer where the fourth cache block is stored, and the cache blocks stored in the partial area are moved to an area in the i+1 layer where the third cache block is stored; if the number of third cache blocks is equal to the number of fourth cache blocks, the third cache block is moved to an area in the hot zone of the i-th layer where the fourth cache block is stored, and the fourth cache block is moved to an area in the i+1 layer where the third cache block is stored; if the number of third cache blocks is greater than the number of fourth cache blocks, a part of the cache blocks in the third cache block is moved to a storage area in the hot zone of the i-th layer where the fourth cache block is stored, and the fourth cache block is moved to an area in the i+1 layer where the part of the cache blocks is stored.

[0011] In an optional manner, for the cold zone of each layer from the 2nd to the nth layer, if the first cache block in the cold zone is hot data, the first cache block is added to the hot zone of the same layer as the cold zone, including: for the cold zone of each layer from the 2nd to the nth layer, if the first cache block in the cold zone is hot data, the logical information of the first cache block is moved after the cursor of the hot zone of the same layer as the cold zone, wherein the logical information of the first cache block includes the storage address information of the first cache block.

[0012] In the solution shown in the present disclosure, when there is a cursor in the hot zone, if the cache block in the cold zone is hot data, the cache block is moved to the back of the cursor in the hot zone to distinguish it from the hotter cache blocks in the hot zone.

[0013] In an optional embodiment, the method further includes: if a cache block in the cold zone of the i+1th layer is hit, the cache space of the cold zone of each layer from the 1st layer to the i-th layer is expanded toward the hot zone; if a cache block in the hot zone of the i+1th layer is hit, the cache space of the hot zone of each layer from the 1st layer to the i-th layer is expanded toward the cold zone.

[0014] In the solution disclosed herein, if a cache block in the cold zone of the i+1th layer is hit, it indicates that the space in the cold zone of the layers 1 to 1 may not be large enough. Therefore, the cache space in the cold zone of each layer from 1 to 1 is expanded toward the hot zone, leaving sufficient space for the upper layer. If a cache block in the hot zone of the i+1th layer is hit, it indicates that the space in the hot zone of the layers 1 to 1 may not be large enough. Therefore, the cache space in the hot zone of each layer from 1 to 1 is expanded toward the hot zone, leaving sufficient space for the upper layer. In this way, cache blocks with a high probability of being hit can be stored in the layer with the highest IO speed as much as possible.

[0015] In an optional manner, a first-in-first-out mechanism is adopted to move the cache block in the cold zone of the i-th layer to the cold zone of the i+1-th layer, and obtain the logical information at the tail of the logical information sequence of the cold zone of the i-th layer, wherein the logical information sequence records the logical information of the cache block in the cold zone of the i-th layer and is arranged from front to back according to the order in which the cache blocks are added to the cold zone of the i-th layer; through the transport thread, the fifth cache block to which the logical information at the tail belongs is asynchronously moved to the cold zone of the i+1-th layer; the logical information of the fifth cache block is updated, and the updated logical information is placed at the head of the logical information sequence of the cold zone of the i+1-th layer.

[0016] In the solution disclosed herein, cache blocks between levels are asynchronously transferred, which can effectively alleviate the situation where high-speed IO devices wait for low-speed IO devices when the IO speeds between levels are different.

[0017] In an optional manner, a transfer thread is used to asynchronously exchange the cache blocks that are hit in the hot zone of the (i+1)th layer with the cache blocks that are not hit in the hot zone of the i-th layer.

[0018] In the solution disclosed herein, cache blocks between levels are asynchronously transferred, which can effectively alleviate the situation where high-speed IO devices wait for low-speed IO devices when the IO speeds between levels are different.

[0019] In an optional manner, the method further includes: when the exchange time point is reached, determining that the exchange condition is satisfied; or, among the n cache layers, there are M layers and N layers, and the number of cache blocks hit in the hot zone of the M layer is greater than the number of cache blocks not hit in the hot zone of the N layer, determining that the exchange condition is satisfied, wherein the M layer is adjacent to the N layer, and the IO speed of the M layer is lower than the IO speed of the N layer; or, among the n cache layers, there is a K layer whose hot zone has a cache block hit count greater than a number threshold, and whose hot zone has a cache block hit count less than the number threshold, determining that the exchange condition is satisfied, wherein the K layer is adjacent to the Q layer, and the IO speed of the K layer is lower than the IO speed of the Q layer.

[0020] In an optional manner, the method further includes: when the first cache block is hit, determining that the first cache block is hot data.

[0021] In the solution disclosed herein, since the cold zone adopts a first-in-first-out mechanism, and newly added cache blocks are first cached in the first layer, as new cache blocks are continuously added, cache blocks that were added earlier to the cache system will continue to move backward in the cold zone of the same layer until the first cache block is moved to the next layer. The cache blocks are gradually moving backward, which is equivalent to the continuous passage of time. When a new cache block is just added to the first layer and moves to the cold zone of the second layer, it has already moved the length of the entire cold zone on the first layer. If the cache block is hit again in the second layer, the cache block has met the condition of being accessed again after a period of time and is identified as hot data. In this way, hot data is data that has been accessed within a period of time and will be accessed again after a period of time. This can prevent data that has been frequently accessed for a short period of time and is no longer accessed from entering the hot zone.

[0022] In an optional manner, the transmission bandwidth of the nth layer is not lower than the network bandwidth.

[0023] In the solution shown in the present disclosure, the transmission bandwidth of the layer with the worst IO speed is not lower than the network bandwidth, so reading data from the cache system as a whole is faster than reading data from a remote device.

[0024] In the second aspect, the present disclosure provides a cache management device, which has the function of implementing the first aspect or any optional method of the first aspect. The device includes at least one module, and the at least one module is used to implement the cache management method provided by the above-mentioned first aspect or any optional method of the first aspect.

[0025] In some embodiments, the modules in the cache management apparatus are implemented by software, and the modules in the cache management apparatus are program modules. In other embodiments, the modules in the cache management apparatus are implemented by hardware or firmware.

[0026] In a third aspect, the present disclosure provides a computing device comprising a processor and a memory, wherein the processor is configured to execute instructions stored in the memory so that the computing device implements the cache management method provided in the first aspect and any optional manner of the first aspect.

[0027] In a fourth aspect, the present disclosure provides a computer-readable storage medium comprising computer program instructions. When the computer program instructions are executed by a computing device, the computing device implements the cache management method provided in the first aspect and any optional manner of the first aspect.

[0028] In a fifth aspect, the present disclosure provides a computer program product, comprising computer program instructions stored in a computer-readable storage medium. A processor of a computing device reads the computer program instructions from the computer-readable storage medium and executes the computer program instructions, causing the computing device to implement the cache management method provided in the first aspect and any optional embodiment of the first aspect. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] FIG1 is a schematic diagram of a system architecture provided by an exemplary embodiment of the present disclosure;

[0030] FIG2 is a schematic diagram of a cache system provided by an exemplary embodiment of the present disclosure;

[0031] FIG3 is a schematic diagram of partitions of a cache system provided by an exemplary embodiment of the present disclosure;

[0032] FIG4 is a schematic diagram of a method flow for cache management provided by an exemplary embodiment of the present disclosure;

[0033] FIG5 is a schematic diagram of cold zone data moving between layers provided by an exemplary embodiment of the present disclosure;

[0034] FIG6 is a schematic diagram of hot zone data moving within a hot zone provided by an exemplary embodiment of the present disclosure;

[0035] FIG7 is a schematic diagram of inter-layer exchange of hot zone data provided by an exemplary embodiment of the present disclosure;

[0036] FIG8 is a schematic diagram of hot zone data after inter-layer exchange provided by an exemplary embodiment of the present disclosure;

[0037] FIG9 is a schematic diagram of cold zone data being hit and moving provided by an exemplary embodiment of the present disclosure;

[0038] FIG10 is a schematic diagram of the expansion of a cold zone into a hot zone according to an exemplary embodiment of the present disclosure;

[0039] FIG11 is a schematic diagram of the expansion of a hot zone into a cold zone according to an exemplary embodiment of the present disclosure;

[0040] FIG12 is an application diagram of a cache system provided by an exemplary embodiment of the present disclosure;

[0041] FIG13 is a schematic structural diagram of a cache management apparatus provided by an exemplary embodiment of the present disclosure;

[0042] FIG14 is a schematic diagram of the structure of a computing device provided by an exemplary embodiment of the present disclosure. DETAILED DESCRIPTION

[0043] In order to make the objectives, technical solutions and advantages of the present disclosure more clear, the embodiments of the present disclosure will be further described in detail below with reference to the accompanying drawings.

[0044] The following is an explanation of some terminology concepts involved in the embodiments of the present disclosure.

[0045] 1. Exclusive mode: In a cache system with multiple cache layers, the cache content of each layer is stored in a mutually exclusive manner. In other words, in exclusive mode, the same cache content will not appear in multiple cache layers.

[0046] 2. Inclusive mode: In a cache system with multiple cache layers, cache content is organized in a way that is inclusive. In other words, in inclusive mode, content stored in higher cache layers is stored in lower cache layers.

[0047] The following describes the background of the embodiments of the present disclosure.

[0048] In cloud scenarios with a separate storage and computing architecture, when computing devices face large analytical requests, they must transfer data from remote devices to the computing device over the network for subsequent processing. The network overhead associated with large amounts of data flow is high, and network I / O becomes a bottleneck for computing performance. Although computing devices already have buffers in their memory for caching data, this space is typically limited, making the acceleration effect in scenarios with large amounts of data insignificant. Therefore, as business data volumes continue to grow, cache capacity must inevitably be expanded to improve the cache hit rate and reduce network I / O to meet business needs. However, high-speed storage devices are relatively expensive, and building a cache system with larger capacity and lower unit cache cost by leveraging the varying storage characteristics of different devices (such as device capacity and read / write speeds) remains an unresolved issue. Furthermore, multi-device cache systems inevitably introduce complexity and scalability challenges, and improper design can lead to issues such as delayed caching. Furthermore, in real-world applications, workloads are diverse and fluctuate frequently, while most cache algorithms rely on fixed, manually set parameters that are unable to adapt to fluctuating workloads. Therefore, in a multi-device cache system, it is necessary to provide a cache management method that is suitable for repeatedly changing workloads.

[0049] Based on this, an embodiment of the present disclosure provides a cache management method, in which the cache system is a multi-level cache system, and the data cached in the cache system can adaptively change between cache layers according to specific working conditions, so that a good cache hit effect can be achieved even in changing working conditions.

[0050] The solution provided by the embodiment of the present disclosure is described below in the order of execution subject, system architecture, cache system, method flow and device.

[0051] 1. Executing entity.

[0052] The execution subject of the cache management method is a cache management device, which is a hardware device, such as a computing device such as a server or terminal, or a software device, such as a software program running on a computing device.

[0053] 2. System architecture.

[0054] FIG1 provides a schematic diagram of the system architecture of cache management. Referring to FIG1 , the system architecture of cache management includes a computing device and a remote device. The computing device is a server or terminal, etc., and the remote device is a server or server cluster, etc. The remote device provides an object storage service (OBS) for persistent storage. The computing device and the remote device are connected via a wired or wireless network. A cache system is deployed on the computing device, and the remote device is used to persistently store data. When an upper-layer application writes data to the computing device, the computing device sends the data to the remote device, so that the remote device persistently stores the data. When the data to be accessed by the upper-layer application does not exist in the cache system of the computing device, the data is obtained from the remote device and returned to the upper-layer application.

[0055] 3. Cache system.

[0056] The cache system is deployed on a computing device. Figure 2 provides a schematic diagram of the cache system. Referring to Figure 2, the cache system includes n cache layers, where n is greater than or equal to 2. The n cache layers represent n types of storage resources, with each layer representing a different type of storage resource. From top to bottom, the n cache layers include layers 1 through n. The I / O speed of layers 1 through n decreases, and the access popularity of data also decreases as the I / O speed decreases. That is, the I / O speed of layer i+1 is lower than that of layer i, where i is a positive integer less than n. The top cache layer has the best storage characteristics but may have a smaller cache space. For example, if n is 3, layer 1 is the memory, layer 2 is one or more SSDs plugged into the computing device, and layer 3 is one or more hard disk drives (HDDs) plugged into the computing device. For another example, if n is 2, layer 1 is one or more SSDs plugged into the computing device, and layer 2 is one or more HDDs plugged into the computing device.

[0057] In a cache system, for layer i, all layers below it (i+1 to n) are equivalent to the logical cache area of ​​that layer. This indicates that the cache space capacity of layer i is insufficient and cache eviction is required. The evicted data is cached in layers i+1 to n. This logical cache area can also be considered an abstract ghost cache. For an abstract ghost cache, all layers above it are called abstract caches. For example, in Figure 2, n is 3. Figure 2 (a) indicates that layers 2 and 3 are the abstract ghost cache of layer 1, Figure 2 (b) indicates that layer 3 is the abstract ghost cache of layer 2, Figure 2 (c) indicates that layers 1 and 2 are the abstract cache of layer 3, and Figure 2 (d) indicates that layer 1 is the abstract cache of layer 2.

[0058] When the cache system is launched, you can configure the devices in each cache layer using a configuration file. You can subsequently add or remove devices from each cache layer by modifying the configuration file. Furthermore, you can change the cache size of each cache layer by modifying the capacity in the configuration file. After modifying the configuration file, restart the cache system to load the configuration file and update the local cache.

[0059] With the above cache system, multiple cache layers with different IO speeds can coordinate with each other to manage multi-layer cache.

[0060] Referring to the cache system shown in Figure 3, each of the n cache layers includes a cold zone and a hot zone. The cold zone is used to store cold data, which refers to data that is accessed only once or frequently over a period of time and subsequently not accessed again. The hot zone is used to store hot data, which refers to data that has been accessed at least once and will be accessed again over a period of time. Both hot and cold zones store data in the form of cache blocks. In Figure 3, the capacity of the cold and hot zones in each layer is shown as equal. In reality, these are dynamically adjusted and may or may not be the same.

[0061] In an optional manner, the transmission bandwidth of the nth layer is not lower than the network bandwidth. In this way, the transmission bandwidth of the layer with the worst IO speed is not lower than the network bandwidth, so reading data from the cache system as a whole is faster than reading data from a remote device.

[0062] In an optional approach, the cache system should cache as much data as possible, and use an exclusive mode for cache management between each layer.

[0063] In an optional manner, in the cache system, the cache space increases layer by layer from the 1st layer to the nth layer from top to bottom.

[0064] 4. Method flow: For the method flow, please refer to steps 401 to 404 shown in FIG4 .

[0065] Step 401: When data is added to the cache system, the data is stored in the cold area of ​​the first layer in the form of cache blocks.

[0066] In this embodiment, the computing device receives a data read request for reading data A, confirms that data A does not exist in the cache system, reads data A from the remote device via the network, and adds data A to the cache system. Alternatively, the computing device receives a data write request for writing data A, adds data A to the cache system, and writes data A to the remote device. If the remote write fails, the local cache content is invalidated.

[0067] When a computing device adds data A to the cache system, it stores data A in the cold zone of the first layer of multiple cache layers in the form of a cache block. If the amount of data A is larger than the size of a cache block, data A is split into multiple parts, each of which is stored as a cache block. If the amount of data A is less than or equal to the size of a cache block, data A is stored in a cache block. A cache block is the basic storage unit of the cache system, which can also be understood as the minimum storage unit. The size of a cache block is set according to actual needs, for example, a cache block size of 4MB, 8MB, or 16MB. The computing device also records the logical information of the cache block of data A and places this logical information at the head of the logical information of the cold zone of the first layer to indicate that the cache block of data A was added to the cache system later. This logical information includes information such as the storage address of the cache block of data A in the first layer and is used to manage the cache block.

[0068] In addition, the computing device also records metadata information of data A, which includes information such as the storage address information of data A in the first layer, so that data A can be found when data A is subsequently read from the cache system.

[0069] It should be noted that in the embodiment of the present disclosure, by setting a larger cache block, the effect of data pre-reading can be achieved, thereby improving the hit rate of the cache system. For example, the amount of data requested by the upper-layer application each time is 8k, and the cache block is larger than 8k. The computing device loads the cache block to which the data requested this time belongs into the cache system. The next time the upper-layer application requests other contents of the cache block, it can be read directly from the cache system without having to obtain it from the remote device. This not only reduces the number of interactions with the remote device, but also improves the hit rate of the cache system. In addition, setting a larger cache block can also reduce the number of cache blocks managed by the cache system, thereby reducing the amount of metadata information.

[0070] In step 402, when the remaining cache space in the cold zone of the i-th layer is insufficient, a first-in-first-out mechanism is adopted to move the cache blocks in the cold zone of the i-th layer to the cold zone of the (i+1)th layer.

[0071] In this embodiment, if the remaining cache space in the cold zone of layer i is less than a capacity threshold, it is determined that the remaining cache space is insufficient. A first-in-first-out mechanism is employed to determine the cache block or blocks that were first added to the cold zone of layer i and move these cache blocks or blocks to the cold zone of layer i+1. For example, if data is added to the cold zone of layer 1 in step 401 and the remaining cache space in the cold zone of layer 1 is insufficient, the cache block or blocks that were first added to the cold zone of layer 1 are moved to the cold zone of layer 2 to allow the newly added data to be cached in the cold zone of layer 1. In this way, data in cold zones of different layers can be adjusted.

[0072] In addition, when the remaining cache space in the cold zone of the nth layer is less than the capacity threshold, a first-in-first-out mechanism is adopted to delete one or more cache blocks that were first added to the cold zone of the nth layer.

[0073] Step 403 : For each cold zone in the second to nth layers, if the first cache block in the cold zone is hot data, move the first cache block to a hot zone in the same layer as the cold zone.

[0074] In this embodiment, for the cold zone of the jth layer among the 2nd to nth layers, if the first cache block in the cold zone of the jth layer is hot data, the first cache block is added to the hot zone of the jth layer, where j is greater than or equal to 2 and less than or equal to n. In this way, the hot data in the cold zone can be moved to the hot zone.

[0075] Among them, the first cache block in the cold zone of layer j is hit, and it has been hit at least once before layer j. The first cache block is identified as hot data. The reason is: when the cache area stored on a certain layer is hit in the cold zone, this is at least the second time the cache block is accessed (the first access is when it was added to the cache system). If the layer is not the first layer, it means that the cache block is a cache block eliminated from the upper layer. The cache space size in the cold zone is used to indirectly represent the concept of time. At this time, if it is accessed again, it means that the condition of being accessed after a period of time is met. The cache block is identified as hot data and is moved to the hot zone of the same layer. The reason why the cache space size of the cold zone described here indirectly represents the concept of time is that the cold zone adopts a first-in-first-out mechanism, and the newly added cache blocks are first cached in the first layer. As new cache blocks are continuously added, the cache blocks that were added earlier to the cache system will continue to move backward in the cold zone of the same layer until the first cache blocks are moved to the next layer. The cache blocks are gradually moving backward, which is equivalent to the continuous passage of time. When a new cache block is just added to the first layer and moves to the cold zone of the second layer, it has moved the length of the entire cold zone on the first layer. If the cache block is hit again in the second layer, the cache block has met the condition of being accessed again after a period of time and is identified as hot data.

[0076] It should be noted that step 403 is for the cold areas from the 2nd layer to the nth layer. This is because the IO speed of the 1st layer is the highest, and both the cold area and the hot area of ​​the 1st layer can be read quickly, so the hot data in the cold area of ​​the 1st layer will not be directly moved to the hot area of ​​the 1st layer.

[0077] Step 404 : Whenever a swap condition is met, swap the cache blocks that are hit in the hot zone of the (i+1)th layer with the cache blocks that are not hit in the hot zone of the i-th layer.

[0078] In this embodiment, the computing device determines the hit cache blocks in the hot zone of the i+1th layer whenever the exchange condition is met, where the hit cache blocks refer to the accessed cache blocks, and determines the miss cache blocks in the hot zone of the i-th layer, where the miss cache blocks refer to the cache blocks that are not accessed, and performs exchange processing on the hit cache blocks in the hot zone of the i+1th layer and the miss cache blocks in the hot zone of the i-th layer, so that the cache blocks that are frequently hit in the lower layer are moved to the cache layer with higher IO speed as much as possible.

[0079] Using the process shown in Figure 4, cold and hot zones are managed separately. This ensures that cold data in the cache system resides only in the cold zone. Furthermore, newly added cold zone cache blocks are only replaced in the cold zone when replacing existing cache blocks. Over time, these blocks are eliminated from the cache system from top to bottom, ultimately being removed from the cache system without affecting hot data in the hot zone. This reduces large-scale cache contamination caused by sequentially scanning large tables. In this way, the cold zone primarily serves as a filter, screening out hot data and moving it to the hot zone for management. The hot zone stores frequently accessed cache blocks for as long as possible, resulting in a higher hit rate for the cache system and reducing the number of access requests to remote devices. Furthermore, cache blocks in the hot zone interact with each other between adjacent cache layers, allowing hotter data to move to cache layers with higher I / O speeds. This results in a layer-by-layer decrease in cache block heat, leveraging the varying I / O speeds of multiple cache layers to maximize storage benefits.

[0080] The process shown in FIG4 is described in detail below.

[0081] In an optional manner, when moving the cache block in the cold zone of the i-th layer to the cold zone of the i+1-th layer in step 402, the cache block is moved according to the logical information sequence. The processing process is as follows:

[0082] Each layer's cold zone corresponds to a logical information sequence, which records the logical information of the cache blocks stored in the corresponding cold zone. Whenever a cache block enters the cold zone of a certain layer, the logical information of the cache block is added to the head of the logical information sequence. In this way, the logical information in the logical information sequence is arranged from front to back according to the order in which the cache blocks are added. The order of the logical information in the logical information sequence can reflect the order in which the cache blocks are added to the cache system.

[0083] When a cache block in the cold zone of layer i is moved to the cold zone of layer i+1, the computing device obtains the logical information sequence of the cold zone of layer i, determines the logical information at the end of the logical information sequence, and determines the cache block to which the logical information belongs. To distinguish, the cache block is referred to as cache block 1, and the background transfer thread is called to asynchronously move cache block 1 to the cold zone of layer i+1 for storage, and update the logical information, placing the updated logical information at the head of the logical information sequence of the cold zone of layer i+1. In this way, since the transfer process is performed asynchronously, when faced with IO speed differences between adjacent layers, it can effectively alleviate the situation where high-speed IO devices wait for low-speed IO devices.

[0084] In addition, in order to avoid insufficient space when adding a new cache block, while waiting for the cache block in the cold zone of the i-th layer to move to the cold zone of the i+1-th layer, if the transfer speed of the transfer thread is slower than the current addition of the new cache block, the cache block at the end of the logical information sequence of the cold zone of the i-th layer is directly deleted, so that the new cache block can be added quickly.

[0085] Optionally, as shown in Figure 5, a fixed-length buffer is set at the end of the cold zone of each layer. The buffer size set for multiple cache layers may be the same, or the buffers set for multiple cache layers may be completely different, or the buffers set for multiple cache layers may be partially the same. Here, "fixed-length buffer" means that for the same layer, the space of the cold zone and the hot zone may change continuously with access, but the size of the buffer will not change. For example, a layer changes from 40% cold zone + 60% hot zone to 50% cold zone + 50% hot zone, and the buffer is 50M.

[0086] In the cold zone of each layer, as cache blocks are added, the first cache block added logically enters the tail buffer. The physical storage address of the first cache block added does not change, but the logical information of the first cache block added is moved to the tail of the logical information sequence. For the buffer of a certain layer, when it is determined from the logical information sequence that a cache block begins to enter the buffer, the background transfer thread is called to asynchronously move the cache block entering the buffer to the cold zone of the next layer for storage, and update the logical information of the cache block after the move, and place the updated logical information at the head of the logical information sequence of the cold zone of the next layer. In this way, it is equivalent to reserving a small amount of space (i.e., buffer) in each layer as a buffer. If this part of the buffer is no longer empty, the content in this part of the buffer will be moved to the lower layer. This ensures that when a new cache block is added, there is always enough space to store it directly without waiting for the current layer to vacate space before inserting it. This can avoid the thread inserting new data being blocked due to waiting for the current layer data to move.

[0087] In addition, in some cases, the speed of adding new cache blocks is too fast, and the asynchronous transfer thread may not have time to clear the cache blocks in the buffer. In this case, if you want to add new cache blocks, you need to wait for free space to be cleared. Therefore, directly deleting the cache blocks in the buffer and clearing free space for new cache blocks to be added can save the time of adding new cache blocks.

[0088] Here, moving the cache block in the cold zone of the i-th layer to the cold zone of the i+1-th layer may be referred to as a demote process.

[0089] In an optional manner, the swap condition refers to a trigger condition that may improve the cache hit rate at the cache layer after the swap is performed. There are multiple swap conditions, and three feasible methods are provided below:

[0090] Method 1: exchange is performed regularly, and the exchange condition is determined to be satisfied every time a preset exchange time point is reached. For example, the exchange is performed periodically, and the exchange time point is reached every other period.

[0091] Method 2: Among the n cache layers, there are M and N layers. The number of hit cache blocks in the hot zone of M layer is greater than the number of missed cache blocks in the hot zone of N layer. M layer is adjacent to N layer, and the IO speed of M layer is lower than that of N layer. This means that there are more hit cache blocks in the lower layer. In order to increase the probability of being hit in the layer with high IO speed, the hit cache blocks in the lower layer are exchanged with the missed cache blocks in the upper layer.

[0092] Method 3: Among n cache layers, there are K and Q layers. The number of cache block hits in the hot zone of K layer is greater than the number threshold, while the number of cache block hits in the hot zone of Q layer is less than the number threshold. K and Q layers are adjacent, and the I / O speed of K layer is lower than that of Q layer. This indicates that the lower layer is frequently hit. To increase the probability of hits in the higher-speed layer, the cache blocks in the lower layer that have been hit are swapped with the cache blocks in the upper layer that have not been hit. The number threshold can be set according to actual needs, for example, 20 times.

[0093] In an optional manner, the process of cache block swapping in the hot zone in step 404 is as follows:

[0094] Each layer of hot zone also corresponds to a logical information sequence. For the logical information sequence of a hot zone in a certain layer, the logical information sequence records the logical information of the cache blocks stored in the hot zone of that layer. And a cursor is set in the logical information sequence of the hot zone of each layer. The cursor can be considered as a mark. The cursor is used to divide the cache blocks that are hotter in the hot zone within a period of time. When the cache system starts working, the cursor of the hot zone of each layer is located at the head of the hot zone. When a cache block in the hot zone is accessed and hit, the computing device moves the logical information of the cache block to the front of the cursor, see Figure 6. For example, the logical information of the cache block is moved to the front of the cursor, and to the front. In this way, the cursor divides the hot zone into two parts. The part before the cursor is called the candidate area. The cache blocks in the candidate area are considered to be hotter cache blocks and are used to exchange with the cache blocks after the cursor in the upper hot zone. The cache blocks after the cursor are considered to be less hot cache blocks and are used to exchange with the cache blocks before the cursor in the lower hot zone. In this way, the hotter cache blocks in the lower layer are moved up to the layer with higher IO speed, and the less hot cache blocks in the upper layer are moved down to the layer with lower IO speed.

[0095] In step 404, the computing device determines the cache block to which the logical information before the cursor in the hot zone of the i+1th layer belongs, which is referred to as the third cache block for the convenience of description, and determines the cache block to which the logical information after the cursor in the hot zone of the i-th layer belongs, which is referred to as the fourth cache block for the convenience of description. If the number of third cache blocks is less than the number of fourth cache blocks, the third cache block is moved to the partial area of ​​the hot zone of the i-th layer where the fourth cache block is stored, and the cache blocks stored in this partial area are moved to the area of ​​the third cache block stored in the i+1th layer. In this way, the entire third cache block is exchanged with the partial cache blocks in the fourth cache block. If the number of third cache blocks is equal to the number of fourth cache blocks, the third cache block is moved to the area of ​​the hot zone of the i-th layer where the fourth cache block is stored, and the fourth cache block is moved to the area of ​​the third cache block stored in the i+1th layer. In this way, the entire third cache block is exchanged with the entire fourth cache block. If the number of the third cache blocks is greater than the number of the fourth cache blocks, then some of the cache blocks in the third cache block are moved to the storage area of ​​the fourth cache block in the hot zone of the i-th layer. The number of these partial cache blocks is the same as the number of the fourth cache blocks, and the fourth cache block is moved to the area of ​​the i+1-th layer where these partial cache blocks are stored. Optionally, these partial cache blocks are the cache blocks that are at the front before the cursor. In this way, it is equivalent to exchanging all of the partial cache blocks in the third cache block with the fourth cache block. For example, referring to FIG7 , in a cache system including three cache layers, cache block 1 after the cursor of the first layer is exchanged with cache block 2 before the cursor of the second layer, exchanging one cache block, and cache block 3 and cache block 4 after the cursor of the second layer are exchanged with cache block 5 and cache block 6 before the cursor of the third layer, exchanging two cache blocks. FIG8 provides a schematic diagram after the exchange.

[0096] After the swap is completed, the cache blocks are sorted by the background thread, and the cursor is reinserted into the head of the logical information sequence of the hot zone, starting a new round of cursor movement. For example, for the i+1th layer, the cache blocks before the current cursor are A and B, and the cache blocks after the cursor are C and D. This is equivalent to A and B being the hotter cache blocks in the hot zone during this period, and C and D being the less hot cache blocks during this period. To achieve better returns, A and B are moved to the i-th layer, and the less hot cache blocks E and F in the i-th layer are moved to the i+1th layer. At this time, the order is cursor-EFCD. At this time, a new round of cursor movement begins. Assuming E is hit again, it becomes E-cursor-FCD.

[0097] Here, moving the cache block in the hot zone of the i+1th layer to the hot zone of the ith layer can be called a promote process, and moving the cache block in the hot zone of the ith layer to the hot zone of the i+1th layer can be called a demote process.

[0098] Optionally, when cache blocks are moved between hot zones in upper and lower layers, cache blocks can be asynchronously swapped between adjacent layers through a transfer thread, thereby reducing the waiting time for cache block movement.

[0099] In an optional manner, when a cursor exists in the hot zone, the process of moving the cache block in the cold zone to the hot zone in step 403 is as follows:

[0100] In layers 2 through n, if the first cache block in a cold zone of a layer is hot data, the logical information of the first cache block is determined, and a hot zone in the same layer as the cold zone is identified, and the logical information of the first cache block is moved after the cursor of the hot zone. For example, referring to Figure 9 , in a cache system with three cache layers, if a cache block in the cold zone of the third layer is hit, it is moved to the hot zone of the third layer, to the end after the cursor. If the first cache block is hit again subsequently, it is moved before the cursor.

[0101] In an optional approach, in a cache system, when a cache block is hit in a certain layer, it is equivalent to hitting the abstract ghost cache of the abstract cache corresponding to the current hit layer, which suggests that the cache space of the abstract cache above the abstract ghost cache is not large enough. If the upper layer space is large enough, then the cache block is more likely to exist in a higher layer, and will hit at a higher level, obtaining a higher hit benefit, and correspondingly, it is less likely to hit the abstract ghost cache at the current lower layer. Therefore, in order to increase the probability of hitting at the layer with high IO speed, the cache space of the upper layer is adaptively adjusted in the horizontal direction. The processing process is as follows:

[0102] If a cache block in the cold zone of the i+1th layer is hit, it means that the space in the cold zone from the 1st layer to the i-th layer may not be large enough, so the cache space in the cold zone of each layer from the 1st layer to the i-th layer is expanded to the hot zone so that the upper layer has enough space. For example, referring to Figure 10, in a cache system including 3 cache layers, if a cache block in the cold zone of the 3rd layer is hit, its logical information will be moved to the hot zone of the 3rd layer, and the cold zones of the 1st and 2nd layers will be expanded to the hot zone. When expanding to the hot zone, the expansion amount of each layer from the 1st layer to the i-th layer is the same, or the expansion amount of each layer from the 1st layer to the i-th layer is not exactly the same. For example, the cold zone of each layer from the 1st layer to the i-th layer expands by the size of one or more cache blocks, and the corresponding hot zone reduces the size of one or more cache blocks.

[0103] If a cache block in the hot zone of the i+1th layer is hit, it means that the space in the hot zone of the 1st to the ith layer may not be large enough, so the cache space of the hot zone of each layer from the 1st to the ith layer is expanded to the cold zone so that there is enough space in the upper layer. For example, referring to Figure 11, in a cache system including three cache layers, a data block in the hot zone of the 3rd layer is hit, and the hot zones of the 1st and 2nd layers are expanded to the cold zone. When expanding to the cold zone, the expansion amount of each layer from the 1st to the ith layer is the same, or the expansion amount of each layer from the 1st to the ith layer is not exactly the same. For example, the hot zone of each layer from the 1st to the ith layer is expanded by the size of one or more cache blocks, and the corresponding cold zone is reduced by the size of one or more cache blocks.

[0104] Optionally, after a cache block in the hot zone of the i+1th layer is hit, the logical information of the cache block is moved to the head of the logical information sequence of the hot zone, so that it will not be eliminated when the cache block at the tail is eliminated, so that the hotter cache content in the hot zone has a longer life cycle.

[0105] In this way, adaptive horizontal cache space adjustment can be achieved.

[0106] It should be noted that for each cache block, when it moves from the cold area to the hot area of ​​the same layer, or moves within the hot area of ​​the same layer, or moves within the cold area of ​​the same layer, only the position of the logical information in the logical information sequence changes, and the storage address (i.e., the physical address) of the cache block is not changed.

[0107] The following example illustrates the application of the cache system to the Gauss database.

[0108] 12 , the multi-level cache system includes a multi-level device module (not shown in the figure), a cache management interface module, an IO processing module, a cache monitoring module, and a cache data sorting module.

[0109] Multi-level device module: Primarily composed of user-defined devices at various levels, such as Layer 0, Layer 1 (e.g., SSD), Layer 2 (e.g., HDD), or more. Except for Layer 0 (memory), Layers 1 through n comprise the multiple cache layers in the cache system of this disclosed embodiment. Layer 0 memory cache requires compatibility with existing systems, while Layers 1 through n are determined by device speed and employ a pluggable management strategy. Memory here refers to random access memory (RAM).

[0110] Users can configure the cache system based on their needs. The cache system provides a configuration file. By modifying the configuration file, you can add or remove cache tiers. By modifying the allocated capacity in the configuration file, you can change the cache space size at each tier. After modifying the configuration file, restart the cache system to load the configuration file and readjust the local cache.

[0111] Layer 0 is used as the buffer pool of the Gauss database. Data first enters the buffer pool and is managed. Data between Layer 1-Layer N is maintained in exclusive mode, and data in Layer 0 is maintained in inclusive mode for the lower layers.

[0112] Cache management interface module: This module is primarily responsible for providing interfaces for various operations to upper layers. For example, it provides interfaces for upper-layer applications to write, read, and modify data, as well as interfaces for maintaining cache metadata and logical information.

[0113] IO processing module: Consists of an IO scheduler and a writer thread. The IO scheduler implements internal IO requests using asynchronous direct IO, collecting and processing upper-layer IO requests and data movement IO requests issued by the cache data integration module.

[0114] In addition, if there is column-stored data, it needs to be written back to the remote device in a timely manner for persistent storage. Therefore, the write-back request for column-stored data is not completed through the asynchronous direct IO of the IO queues (queues) 1-n corresponding to each cache layer. The IO processing module adds the request to the remote queue (remote queue) for operation. At the same time, in order to keep the data in the cache system correct, the modification of the column-stored content also needs to be completed through local IO to write the new version of the data back to the local cache system. Among them, column-stored data refers to data stored in columns. Here, each layer of storage device corresponds to an IO queue, and each IO queue corresponds to one or more work units for executing tasks in the IO queue. In addition, the IO processing module also includes a management unit for managing the IO queue.

[0115] The writer thread flushes row-stored data from memory. It checks the contents of dirty pages in Layer 0, collects and organizes them, submits them to the local cache system through the I / O processing module, and writes them back to the local cache system. Reading and writing local row-stored data, as well as reading local column-stored data, are all completed through queues 1-n of the I / O processing module. The remote writer thread periodically flushes row-stored data from the local cache system to remote devices.

[0116] Cache Monitoring Module: This module is responsible for monitoring data collection and triggering cache data movement between layers. By collecting and analyzing key metrics during cache system usage, the cache monitoring module provides a basis for multi-layer data movement. It can also subsequently adjust cache replacement strategies at both layers based on these key metrics.

[0117] Furthermore, maintenance personnel can intuitively understand the effectiveness of the cache system's target usage based on the specific conditions of the cached data. The cache monitoring module can also determine the movement of cached data based on the distribution of data across multiple cache layers. By triggering the cache data sorting module, cached data in the cache system can be placed at the appropriate level, maximizing benefits.

[0118] The Cache Data Sorting Module is primarily responsible for moving cached data between multiple cache layers. For example, frequently hit cache blocks in the lower layer are moved to faster cache devices in the upper layer for backup. When performing this movement and sorting, the Cache Data Integration Module initiates cache data movement I / O, which is then executed by the I / O Processing Module.

[0119] FIG12 illustrates the column memory as an example. The row memory can also use the cache system. The process is similar to that of the column memory and will not be described again here.

[0120] Step 1201: A user thread in a computing device calls a cache management interface module to request data A.

[0121] In step 1202, the user thread searches for data A in the global metadata information. The global metadata information includes data metadata and cache management control information. The data metadata is used to find the data, and the cache management control information is used to manage cache blocks. The cache management control information includes cache block logical information. Furthermore, the user thread can lock data A in the global metadata information to ensure data consistency.

[0122] Step 1203: Apply for space A from the memory to store data A in the memory.

[0123] In step 1204, if data A exists in the local cache system, the IO processing module requests data A and writes data A to memory space A. If data A does not exist in the cache system, the request is added to the remote queue, data A is retrieved from the remote device, data A is written to memory space A, and data A is written to the cold zone of the first layer of the cache system.

[0124] Step 1205, return the result of data A from space A to the user thread.

[0125] In Figure 12, the user thread can also modify data A. When modifying data, the modified data is written back to the remote device from the cache system, and the data in the local cache system is invalidated. When writing back to the remote device, a new task is added to the remote queue to flush the modified data back to the remote device.

[0126] In the disclosed embodiment, the sizes of the cold and hot zones of each layer in the cache system are dynamically adjusted, and there is no need to configure the ratio parameters of the cold and hot zones. For example, after the cache system is online, the first layer is all used by the cold zone. As the cache blocks in the cold zone of the first layer move to the lower layer, and the cache blocks in the cold zone of the second layer are hit, the cache blocks hit in the second layer are added to the hot zone of the second layer. Subsequently, during the vertical adjustment process, cache blocks will be added to the hot zone of the first layer. In this way, the sizes of the cold and hot zones of each layer change dynamically, maintaining a dynamic balance, and can adaptively change in the horizontal and vertical directions according to the working conditions. Therefore, there can be a better cache hit effect in changing working conditions. Moreover, asynchronous transfer of cache blocks can be applicable to the movement of cache blocks between cache layers with different IO speeds. Moreover, the new cold data and hot data identification strategy can better distinguish the truly effective hot data in the cache system and improve the cache hit rate.

[0127] In addition, the disclosed embodiments provide a forensic perspective.

[0128] Forensic perspective 1: Forensics from an adaptive perspective.

[0129] a. Parameter quantity evidence collection: In the embodiment of the present disclosure, relatively few parameters need to be configured, and there is no need to configure the ratio parameters of the cold zone and the hot zone. Therefore, evidence can be collected from the perspective of parameter quantity.

[0130] b. Adaptive Adjustment of Cold and Hot Zones: Specific workflows can be used to demonstrate adaptive adjustment of hot and cold zones. For example, the default initial cold-to-hot zone ratio is 1:1. A random workload is first used to fill all cold and hot zones in the cache, followed by a large table sequential scan workflow. In this scenario, only the hot zone data remains uncontaminated. A comparison of cache contents before and after the large table scan reveals adaptive adjustment of the cold-to-hot zone ratio.

[0131] Forensic perspective 2: Forensics from the perspective of asynchronous data movement.

[0132] a. Demote strategy evidence: First, we can collect evidence from the perspective of demote. The demote strategy fills data from the top layer downwards. By observing the movement of cache blocks, we can determine which layer the cache is filled from.

[0133] b. Specific parameter configuration forensics Asynchronous data transfer mechanism: Asynchronous data transfer leads to the configuration of specific parameters (such as the buffer of each cold zone).

[0134] c. Workload Forensics: Asynchronous Data Transfer Mechanisms: Specific workloads can be used to test for asynchronous data transfer. For example, if only cache content up to the cache capacity of layer 1 is input, and if the input cache content appears in layer 2, but layer 1 lacks the content that appeared in layer 2, then an asynchronous transfer mechanism is preemptively transferring layer 1 data. This method can also be used to measure the buffer size of each layer's cold zone.

[0135] 5. Cache management device.

[0136] Figure 13 is a structural diagram of a cache management device provided by an embodiment of the present disclosure. The device is applied to a cache system, which includes n cache layers, wherein the input and output IO speed of the i+1th layer in the n cache layers is lower than the IO speed of the ith layer, i is a positive integer and is less than n, and each layer in the n cache layers includes a cold zone and a hot zone, and n is greater than or equal to 2. The device can be implemented as part or all of the device through software, hardware, or a combination of both. The device provided by an embodiment of the present disclosure can implement the process shown in Figure 4 of the embodiment of the present disclosure, and the device includes a write module 1310 and a transport module 1320, wherein:

[0137] A writing module 1310 is configured to store data in a cold zone of the first layer in the form of cache blocks when data is added to the cache system;

[0138] The transport module 1320 is configured to: when the remaining cache space in the cold zone of the i-th layer is insufficient, adopt a first-in-first-out mechanism to move the cache blocks in the cold zone of the i-th layer to the cold zone of the (i+1)th layer;

[0139] For a cold zone in each layer from the second layer to the nth layer, if the first cache block in the cold zone is hot data, move the first cache block to a hot zone in the same layer as the cold zone;

[0140] Whenever a swap condition is met, a swap process is performed on the hit cache block in the hot zone of the (i+1)th layer and the miss cache block in the hot zone of the i-th layer.

[0141] In an optional manner, the transport module 1320 is further configured to:

[0142] For each hot zone in the n cache layers, if a second cache block in the hot zone is hit, logical information of the second cache block is moved before a cursor of the hot zone, wherein at a start time, the cursor is located at a head of the hot zone, and the logical information includes storage address information of the second cache block;

[0143] The transport module 1320 is used to:

[0144] An exchange process is performed on the third cache block and the fourth cache block, wherein the third cache block includes the cache block to which the logical information before the cursor in the hot zone of the i+1th layer belongs, and the fourth cache block includes the cache block to which the logical information after the cursor in the hot zone of the i-th layer belongs.

[0145] In an optional manner, the transport module 1320 is used to:

[0146] If the number of the third cache blocks is less than the number of the fourth cache blocks, the third cache blocks are moved to a partial area of ​​the hot zone of the i-th layer where the fourth cache blocks are stored, and the cache blocks stored in the partial area are moved to an area of ​​the i+1-th layer where the third cache blocks are stored;

[0147] If the number of the third cache blocks is equal to the number of the fourth cache blocks, the third cache blocks are moved to the area where the fourth cache blocks are stored in the hot zone of the i-th layer, and the fourth cache blocks are moved to the area where the third cache blocks are stored in the (i+1)th layer;

[0148] If the number of the third cache blocks is greater than the number of the fourth cache blocks, some of the third cache blocks are moved to the storage area of ​​the fourth cache blocks in the hot zone of the i-th layer, and the fourth cache blocks are moved to the area of ​​the i+1-th layer where the some cache blocks are stored.

[0149] In an optional manner, the transport module 1320 is used to:

[0150] For the cold zone of each layer from the 2nd layer to the nth layer, if the first cache block in the cold zone is hot data, the logical information of the first cache block is moved after the cursor of the hot zone located in the same layer as the cold zone, wherein the logical information of the first cache block includes the storage address information of the first cache block.

[0151] In an optional manner, the transport module 1320 is further configured to:

[0152] If a cache block in the cold zone of the i+1th layer is hit, the cache space of the cold zone of each layer from the 1st layer to the i-th layer is expanded to the hot zone;

[0153] If the cache block in the hot zone of the i+1th layer is hit, the cache space of the hot zone of each layer from the 1st layer to the i-th layer is expanded to the cold zone.

[0154] In an optional manner, the transport module 1320 is used to:

[0155] Obtaining logical information at the end of a logical information sequence of the cold zone of the i-th layer, wherein the logical information sequence records the logical information of the cache blocks in the cold zone of the i-th layer and is arranged from front to back in the order in which the cache blocks are stored in the cold zone of the i-th layer;

[0156] Asynchronously moving the fifth cache block to which the tail logical information belongs to the cold zone of the (i+1)th layer through a transfer thread;

[0157] The logic information of the fifth cache block is updated, and the updated logic information is placed at the head of the logic information sequence of the cold zone of the (i+1)th layer.

[0158] In an optional manner, the transport module 1320 is used to:

[0159] The cache blocks hit in the hot zone of the (i+1)th layer and the cache blocks not hit in the hot zone of the i-th layer are asynchronously exchanged through the transfer thread.

[0160] In an optional manner, the transport module 1320 is further configured to:

[0161] When the exchange time point is reached, determining that the exchange condition is satisfied; or,

[0162] Among the n cache layers, there are an M layer and an N layer, the number of cache blocks hit in the hot zone of the M layer is greater than the number of cache blocks missed in the hot zone of the N layer, and it is determined that the exchange condition is satisfied, wherein the M layer is adjacent to the N layer, and the IO speed of the M layer is lower than the IO speed of the N layer; or,

[0163] Among the n cache layers, if the number of cache block hits in the hot zone of the K layer is greater than a number threshold, and the number of cache block hits in the hot zone of the Q layer is less than the number threshold, it is determined that the exchange condition is met, wherein the K layer is adjacent to the Q layer, and the IO speed of the K layer is lower than the IO speed of the Q layer.

[0164] In an optional manner, the transport module 1320 is further configured to:

[0165] When the first cache block is hit, the first cache block is determined to be hot data.

[0166] In an optional manner, the transmission bandwidth of the nth layer is not lower than the network bandwidth.

[0167] The above division of the cache management device is schematic. Both the write module 1310 and the transfer module 1320 can be implemented in software or hardware. For example, the implementation of the write module 1310 will be described below using the write module 1310 as an example. Similarly, the implementation of the transfer module 1320 can refer to the implementation of the write module 1310.

[0168] As an example of a software functional unit, a module can include code running on a computing instance. A computing instance can include at least one of a physical host (computing device), a virtual machine, or a container. Furthermore, the computing instance can be a single instance. For example, the module can include code running on a single host, virtual machine, or container.

[0169] The cache management device may be a computing device, such as a server. Alternatively, the cache management device may be implemented using an application-specific integrated circuit (ASIC) or a programmable logic device (PLD). The PLD may be a complex programmable logical device (CPLD), a field-programmable gate array (FPGA), a generic array logic (GAL), or any combination thereof.

[0170] The present disclosure also provides a computing device 100. As shown in FIG14 , computing device 100 includes a bus 102, a processor 104, a memory 106, and a communication interface 108. Processor 104, memory 106, and communication interface 108 communicate with each other via bus 102. Computing device 100 may be a server or a terminal device. It should be understood that the present disclosure does not limit the number of processors and memories in computing device 100.

[0171] Bus 102 may be a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus, among others. Buses may be classified as address buses, data buses, control buses, and the like. For ease of illustration, FIG14 illustrates a single bus line, but this does not imply a single bus or type of bus. Bus 102 may include a path for transmitting information between various components of computing device 100 (e.g., memory 106, processor 104, and communication interface 108).

[0172] The processor 104 may include any one or more processors such as a central processing unit (CPU), a graphics processing unit (GPU), a microprocessor (MP), or a digital signal processor (DSP).

[0173] The memory 106 may include a volatile memory, such as a RAM, or a non-volatile memory, such as a read-only memory (ROM), a flash memory, a HDD, or an SSD.

[0174] The memory 106 stores executable program code, and the processor 104 executes the executable program code to implement the functions of the aforementioned writing module 1310 and the transfer module 1320, thereby implementing the cache management method. In other words, the memory 106 stores instructions for executing the cache management method.

[0175] The communication interface 108 uses a transceiver module such as, but not limited to, a network interface card or a transceiver to implement communication between the computing device 100 and other devices or a communication network.

[0176] The present disclosure also provides a computer program product including instructions. The computer program product may be software or a program product including computer program instructions that can be executed on a computing device or stored in any available medium. When the computer program product is executed on a computing device, the computing device performs a cache management method.

[0177] The present disclosure also provides a computer-readable storage medium. The computer-readable storage medium can be any available medium capable of being stored by a computing device, or a data storage device such as a data center that includes one or more available media. The available medium can be a magnetic medium (e.g., a floppy disk, a hard disk, a magnetic tape), an optical medium (e.g., a digital versatile disc (DVD)), or a semiconductor medium (e.g., a solid-state drive). The computer-readable storage medium includes instructions that instruct the computing device to execute the cache management method.

[0178] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present disclosure, rather than to limit them. Although the present disclosure has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the protection scope of the technical solutions of the various embodiments of the present disclosure.

Claims

1. A cache management method, characterized in that: The method is applied to a cache system, the cache system includes n cache layers, the input and output IO speed of the i+1th layer of the n cache layers is lower than the IO speed of the ith layer, i is a positive integer and is less than n, each layer of the n cache layers includes a cold area and a hot area, n is greater than or equal to 2, and the method includes: When data is added to the cache system, the data is stored in the cold area of ​​the first layer in the form of cache blocks; When there is insufficient remaining cache space in the cold zone of the i-th layer, a first-in-first-out mechanism is adopted to move the cache blocks in the cold zone of the i-th layer to the cold zone of the i+1-th layer; For a cold zone of each layer from the second layer to the nth layer, if the first cache block in the cold zone is hot data, move the first cache block to a hot zone belonging to the same layer as the cold zone; Whenever a swap condition is met, a swap process is performed on the hit cache block in the hot zone of the i+1th layer and the miss cache block in the hot zone of the ith layer.

2. The method according to claim 1, characterized in that The method further comprises: For a hot zone in each of the n cache layers, if a second cache block in the hot zone is hit, logical information of the second cache block is moved before a cursor of the hot zone, wherein at a start time, the cursor is located at a head of the hot zone, and the logical information includes storage address information of the second cache block; The performing of the exchange process on the hit cache block in the hot zone of the i+1th layer and the unhit cache block in the hot zone of the ith layer comprises: An exchange process is performed on the third cache block and the fourth cache block, wherein the third cache block includes the cache block to which the logical information before the cursor in the hot zone of the i+1th layer belongs, and the fourth cache block includes the cache block to which the logical information after the cursor in the hot zone of the i-th layer belongs.

3. The method according to claim 2, characterized in that The performing the exchange process on the third cache block and the fourth cache block includes: If the number of the third cache blocks is less than the number of the fourth cache blocks, the third cache blocks are moved to a partial area of ​​the hot zone of the i-th layer where the fourth cache blocks are stored, and the cache blocks stored in the partial area are moved to an area of ​​the i+1-th layer where the third cache blocks are stored; If the number of the third cache blocks is equal to the number of the fourth cache blocks, the third cache blocks are moved to the area where the fourth cache blocks are stored in the hot zone of the i-th layer, and the fourth cache blocks are moved to the area where the third cache blocks are stored in the i+1-th layer; If the number of the third cache blocks is greater than the number of the fourth cache blocks, some of the third cache blocks are moved to the storage area of ​​the fourth cache blocks in the hot zone of the i-th layer, and the fourth cache blocks are moved to the area of ​​the i+1-th layer where the some cache blocks are stored.

4. The method according to claim 2 or 3, characterized in that: For the cold zone of each layer from the second layer to the nth layer, when the first cache block in the cold zone is hot data, moving the first cache block to a hot zone belonging to the same layer as the cold zone comprises: For the cold zone of each layer from the 2nd layer to the nth layer, if the first cache block in the cold zone is hot data, the logical information of the first cache block is moved after the cursor of the hot zone located at the same layer as the cold zone, wherein the logical information of the first cache block includes the storage address information of the first cache block.

5. The method according to any one of claims 1 to 4, characterized in that: The method further comprises: If the cache block in the cold zone of the i+1th layer is hit, the cache space of the cold zone of each layer from the 1st layer to the i-th layer is expanded to the hot zone; If the cache block in the hot zone of the i+1th layer is hit, the cache space of the hot zone of each layer from the 1st layer to the i-th layer is expanded to the cold zone.

6. The method according to any one of claims 1 to 5, characterized in that: The adopting a first-in-first-out mechanism to move the cache blocks in the cold zone of the i-th layer to the cold zone of the i+1-th layer includes: Acquire the logic information at the tail of the logic information sequence of the cold zone of the i-th layer, wherein the logic information sequence records the logic information of the cache blocks in the cold zone of the i-th layer and is arranged from front to back according to the order in which the cache blocks are stored in the cold zone of the i-th layer; Asynchronously moving the fifth cache block to which the tail logical information belongs to the cold zone of the i+1th layer through a transfer thread; The logic information of the fifth cache block is updated, and the updated logic information is placed at the head of the logic information sequence of the cold zone of the (i+1)th layer.

7. The method according to any one of claims 1 to 6, characterized in that: The performing of the exchange process on the hit cache block in the hot zone of the i+1th layer and the unhit cache block in the hot zone of the ith layer comprises: By using the transfer thread, the hit cache blocks in the hot zone of the i+1th layer and the miss cache blocks in the hot zone of the ith layer are asynchronously exchanged.

8. The method according to any one of claims 1 to 7, characterized in that: The method further comprises: When the exchange time point is reached, determining that the exchange condition is satisfied; or, Among the n cache layers, if the number of cache blocks hit in the hot zone of the M layer is greater than the number of cache blocks not hit in the hot zone of the N layer, it is determined that the exchange condition is satisfied, wherein the M layer is adjacent to the N layer, and the IO speed of the M layer is lower than the IO speed of the N layer; or, Among the n cache layers, if the number of cache block hits in the hot zone of the K layer is greater than the number threshold, and the number of cache block hits in the hot zone of the Q layer is less than the number threshold, it is determined that the exchange condition is met, wherein the K layer is adjacent to the Q layer, and the IO speed of the K layer is lower than the IO speed of the Q layer.

9. The method according to any one of claims 1 to 8, characterized in that: The method further comprises: When the first cache block is hit, it is determined that the first cache block is hot data.

10. The method according to any one of claims 1 to 9, characterized in that: The transmission bandwidth of the nth layer is not lower than the network bandwidth.

11. A cache management device, characterized in that: The device is applied to a cache system, the cache system includes n cache layers, the input and output IO speed of the i+1th layer of the n cache layers is lower than the IO speed of the ith layer, i is a positive integer and is less than n, each layer of the n cache layers includes a cold area and a hot area, n is greater than or equal to 2, and the device includes: A writing module, used for storing the data in the cold area of ​​the first layer in the form of cache blocks when the data is added to the cache system; A transport module is used to: when there is insufficient remaining cache space in the cold zone of the i-th layer, use a first-in-first-out mechanism to move the cache blocks in the cold zone of the i-th layer to the cold zone of the i+1-th layer; For a cold zone of each layer from the second layer to the nth layer, if the first cache block in the cold zone is hot data, move the first cache block to a hot zone belonging to the same layer as the cold zone; Whenever a swap condition is met, a swap process is performed on the hit cache block in the hot zone of the i+1th layer and the miss cache block in the hot zone of the ith layer.

12. The device according to claim 11, characterized in that The transport module is also used for: For a hot zone in each of the n cache layers, if a second cache block in the hot zone is hit, logical information of the second cache block is moved before a cursor of the hot zone, wherein at a start time, the cursor is located at a head of the hot zone, and the logical information includes storage address information of the second cache block; The transport module is used for: An exchange process is performed on the third cache block and the fourth cache block, wherein the third cache block includes the cache block to which the logical information before the cursor in the hot zone of the i+1th layer belongs, and the fourth cache block includes the cache block to which the logical information after the cursor in the hot zone of the i-th layer belongs.

13. The device according to claim 12, characterized in that The transport module is used for: If the number of the third cache blocks is less than the number of the fourth cache blocks, the third cache blocks are moved to a partial area of ​​the hot zone of the i-th layer where the fourth cache blocks are stored, and the cache blocks stored in the partial area are moved to an area of ​​the i+1-th layer where the third cache blocks are stored; If the number of the third cache blocks is equal to the number of the fourth cache blocks, the third cache blocks are moved to the area where the fourth cache blocks are stored in the hot zone of the i-th layer, and the fourth cache blocks are moved to the area where the third cache blocks are stored in the i+1-th layer; If the number of the third cache blocks is greater than the number of the fourth cache blocks, some of the third cache blocks are moved to the storage area of ​​the fourth cache blocks in the hot zone of the i-th layer, and the fourth cache blocks are moved to the area of ​​the i+1-th layer where the some cache blocks are stored.

14. The device according to claim 12 or 13, characterized in that The transport module is used for: For the cold zone of each layer from the 2nd layer to the nth layer, if the first cache block in the cold zone is hot data, the logical information of the first cache block is moved after the cursor of the hot zone located at the same layer as the cold zone, wherein the logical information of the first cache block includes the storage address information of the first cache block.

15. The device according to any one of claims 11 to 14, characterized in that The transport module is also used for: If the cache block in the cold zone of the i+1th layer is hit, the cache space of the cold zone of each layer from the 1st layer to the i-th layer is expanded to the hot zone; If the cache block in the hot zone of the i+1th layer is hit, the cache space of the hot zone of each layer from the 1st layer to the i-th layer is expanded to the cold zone.

16. The device according to any one of claims 11 to 15, characterized in that The transport module is used for: Acquire the logic information at the tail of the logic information sequence of the cold zone of the i-th layer, wherein the logic information sequence records the logic information of the cache blocks in the cold zone of the i-th layer and is arranged from front to back according to the order in which the cache blocks are stored in the cold zone of the i-th layer; Asynchronously moving the fifth cache block to which the tail logical information belongs to the cold zone of the i+1th layer through a transfer thread; The logic information of the fifth cache block is updated, and the updated logic information is placed at the head of the logic information sequence of the cold zone of the (i+1)th layer.

17. The device according to any one of claims 11 to 16, characterized in that The transport module is used for: By using the transfer thread, the hit cache blocks in the hot zone of the i+1th layer and the miss cache blocks in the hot zone of the ith layer are asynchronously exchanged.

18. The device according to any one of claims 11 to 17, characterized in that The transport module is also used for: When the exchange time point is reached, determining that the exchange condition is satisfied; or, Among the n cache layers, if the number of cache blocks hit in the hot zone of the M layer is greater than the number of cache blocks not hit in the hot zone of the N layer, it is determined that the exchange condition is satisfied, wherein the M layer is adjacent to the N layer, and the IO speed of the M layer is lower than the IO speed of the N layer; or, Among the n cache layers, if the number of cache block hits in the hot zone of the K layer is greater than the number threshold, and the number of cache block hits in the hot zone of the Q layer is less than the number threshold, it is determined that the exchange condition is met, wherein the K layer is adjacent to the Q layer, and the IO speed of the K layer is lower than the IO speed of the Q layer.

19. The device according to any one of claims 11 to 18, characterized in that The transport module is also used for: When the first cache block is hit, it is determined that the first cache block is hot data.

20. The device according to any one of claims 11 to 19, characterized in that The transmission bandwidth of the nth layer is not lower than the network bandwidth.

21. A computing device, characterized in that The computing device includes a processor and a memory; The processor is configured to execute instructions stored in the memory, so that the computing device performs the method according to any one of claims 1 to 10.

22. A computer-readable storage medium, characterized in that: The method comprises computer program instructions, and when the computer program instructions are executed by a computing device, the computing device performs the method according to any one of claims 1 to 10.

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