DC / DC converter
The stop determination circuit in the DC/DC converter addresses the issue of current imbalances and overheating by detecting differences in transformer coil currents and halting the operation, effectively protecting the input capacitor during power-running and regeneration.
Patent Information
- Application Number
- PCT/JP2023/027858
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2023-07-28
- Publication Date
- 2025-02-06
AI Technical Summary
In DC/DC converters with open loop control, abnormalities such as disconnection in transformer circuits lead to impedance imbalance, causing large current fluctuations through the input capacitor, potentially overheating and failing it, and existing detection methods like overcurrent sensing or temperature sensing with internal sensors are costly or ineffective.
Incorporating a stop determination circuit that detects the difference between currents flowing through parallel transformer coils and outputs a stop signal to halt the transforming operation, using detection circuits for each coil and operational amplifiers to compare voltages and determine when to stop the process, thereby protecting the input capacitor.
Effectively stops the transforming operation when current imbalances occur, reducing heat generation and protecting the input capacitor during both power-running and regeneration, using a simple configuration with detection circuits and operational amplifiers to detect and respond to current differences.
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Figure JP2023027858_06022025_PF_FP_ABST
Abstract
Description
DC / DC converter
[0001] The present disclosure relates to a DC / DC converter that transforms DC power.
[0002] Some DC / DC converters include an input port, an input-side capacitor, a transformer circuit, an output port, and a switch control circuit. The transformer circuit includes a switch and a coil. The switch control circuit controls the transforming operation of the transformer circuit by controlling the switch.
[0003] International Publication No. 2019 / 167271
[0004] The present inventors have noticed that when a certain configuration is adopted in such a DC / DC converter, the following problem may occur. That is, in this configuration, a first transformer circuit and a second transformer circuit are connected in parallel to each other with respect to the input port and the input-side capacitor. The switch control circuit controls the switch of the first transformer circuit without feedback of the current value of the first transformer circuit. The switch control circuit also controls the switch of the second transformer circuit without feedback of the current value of the second transformer circuit. That is, the switch control circuit performs open-loop control of the transformation operations of the first transformer circuit and the second transformer circuit. In this case, the following problem may occur.
[0005] If an abnormality such as a wire break or other fault occurs in either the first or second transformer circuit, an imbalance occurs between the impedance of the first transformer circuit and the impedance of the second transformer circuit. In this case, due to open-loop control, the magnitude of the current differs between when current flows through the first transformer circuit and when current flows through the second transformer circuit. This results in a large current fluctuation range between these two states. This fluctuation range increases the current flowing in and out of the input capacitor. This flow may cause the input capacitor to heat up, potentially leading to a failure of the input capacitor. Therefore, when such an abnormality occurs, it is necessary to quickly detect the abnormality and protect the input capacitor.
[0006] However, the method of detecting an abnormality based on an overcurrent cannot detect an abnormality when current repeatedly flows in and out of the input capacitor within a range where an overcurrent is not detected. Also, the method of detecting the temperature of the input capacitor using a temperature sensor requires that the temperature sensor be installed inside the input capacitor, which leads to increased costs.
[0007] The present disclosure has been made in view of the above circumstances, and aims to protect an input-side capacitor using an appropriate method when an abnormality occurs in a DC / DC converter that performs open-loop control of its transformation operation.
[0008] The DC / DC converter of the present disclosure comprises an input port, an input-side capacitor, a first transformer circuit, a second transformer circuit, an output port, and a switch control circuit, wherein the first transformer circuit includes a first switch and a first coil, and the second transformer circuit includes a second switch and a second coil, the first coil and the second coil are connected in parallel to the input port and the input-side capacitor, and the switch control circuit performs open-loop control of the transformation operation by the first transformer circuit and the second transformer circuit by controlling the first switch and the second switch, and power transformed by the transformation operation is output from the output port. The DC / DC converter also comprises: a first detection circuit that detects a first current flowing through the first coil; a second detection circuit that detects a second current flowing through the second coil; and a stop determination circuit that stops the transformation operation based on the difference between the first current and the second current.
[0009] 1 is a circuit diagram showing a DC / DC converter of a first embodiment; FIG. 2 is a circuit diagram showing a stop determination circuit; FIG. 3 is a circuit diagram showing a first state during powering; FIG. 4 is a circuit diagram showing a second state during powering; FIG. 5 is a graph showing the transition of each current during powering; FIG. 6 is a graph showing the transition of each current in the event of an abnormality during powering; FIG. 7 is a graph showing the transition of each current before and after stop control is performed; FIG. 8 is a circuit diagram showing a first state during regeneration; FIG. 9 is a circuit diagram showing a second state during regeneration; FIG. 10 is a graph showing the transition of each current during regeneration;
[0010] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. However, the present disclosure is not limited to the following embodiments and can be appropriately modified and implemented within the scope of the present disclosure.
[0011] 1, the DC / DC converter Dcv has input ports Pi+, Pi- and output ports Po+, Po-. Hereinafter, the positive terminal of the input ports Pi+, Pi- will be simply referred to as the "input port Pi+", and the negative terminal will be simply referred to as the "input port Pi-". Furthermore, the positive terminal of the output ports Po+, Po- will be simply referred to as the "output port Po+", and the negative terminal will be simply referred to as the "output port Po-".
[0012] A DC power supply Ps is electrically connected to the input ports Pi+ and Pi-, and an amplifier AP for driving the robot Rb is electrically connected to the output ports Po+ and Po-.
[0013] The DC / DC converter Dcv further includes an input-side capacitor Ci, a first transformer circuit Tc1, a second transformer circuit Tc2, and an output-side capacitor Co. The first transformer circuit Tc1 includes a first upper switch Q1U, a first lower switch Q1D, and a first coil L1. The second transformer circuit Tc2 includes a second upper switch Q2U, a second lower switch Q2D, and a second coil L2.
[0014] Hereinafter, the first upper switch Q1U and the first lower switch Q1D will be collectively referred to as the "first switches Q1U, Q1D." Additionally, the second upper switch Q2U and the second lower switch Q2D will be collectively referred to as the "second switches Q2U, Q2D." Additionally, the first upper switch Q1U, the first lower switch Q1D, the second upper switch Q2U, and the second lower switch Q2D will be collectively referred to as the "respective switches Q1U, Q1D, Q2U, Q2D." Each of the switches Q1U, Q1D, Q2U, and Q2D is a semiconductor switch such as a transistor.
[0015] One end of the first coil L1 is electrically connected via a first upper switch Q1U to the positive terminals of the input ports Pi+, Pi- and the input capacitor Co. Furthermore, this end is electrically connected via a first lower switch Q1D to the negative terminals of the input ports Pi+, Pi-, the input capacitor Co, the output capacitor Ci, and the output ports Po+, Po-. The other end of the first coil L1 is electrically connected to the positive terminals of the output capacitor Co and the output ports Po+, Po-.
[0016] One end of the second coil L2 is electrically connected via the second upper switch Q2U to the positive terminals of the input ports Pi+, Pi- and the input capacitor Co. Furthermore, this end is electrically connected via the second lower switch Q2D to the negative terminals of the input ports Pi+, Pi-, the input capacitor Co, the output capacitor Ci, and the output ports Po+, Po-. The other end of the second coil L2 is electrically connected to the positive terminals of the output capacitor Co and the output ports Po+, Po-.
[0017] As a result of the above, the input ports Pi+, Pi- and the input-side capacitor Ci are electrically connected to the output-side capacitor Co and the output ports Po+, Po- via the first coil L1 and the second coil L2 in parallel. In other words, the first coil L1 and the second coil L2 are connected in parallel to the input ports Pi+, Pi- and the input-side capacitor Ci.
[0018] In this embodiment, each of the switches Q1U, Q1D, Q2U, and Q2D has a parasitic diode. That is, the first upper switch Q1U has a parasitic diode that allows current to flow from the first coil L1 to the input capacitor Ci and the input port Pi+. The second upper switch Q2U has a parasitic diode that allows current to flow from the second coil L2 to the input capacitor Ci and the input port Pi+. The first lower switch Q1D has a parasitic diode that allows current to flow from the output capacitor Co and the output port Po- to the first coil L1. The second lower switch Q2D has a parasitic diode that allows current to flow from the output capacitor Co and the output port Po- to the second coil L2.
[0019] However, instead of the above, semiconductor switches that do not have parasitic diodes, such as IGBTs, may be used as each of the switches Q1U, Q1D, Q2U, and Q2D, and freewheel diodes may be electrically connected in parallel to each of the switches Q1U, Q1D, Q2U, and Q2D.
[0020] Hereinafter, the current flowing from the DC power supply Ps to the input port Pi+ will be referred to as the "input current Ii." Furthermore, the current flowing from the electrical connection point ei between the input port Pi+ and the input-side capacitor Ci to the electrical connection point eu between the first upper switch Q1U and the second upper switch Q2U will be referred to as the "input-side current Iis." Furthermore, the current flowing through the first upper switch Q1U will be referred to as the "first upper current Iq1u," and the current flowing through the first lower switch Q1D will be referred to as the "first lower current Iq1d." Furthermore, the current flowing through the second upper switch Q2U will be referred to as the "second upper current Iq2u," and the current flowing through the second lower switch Q2D will be referred to as the "second lower current Iq2d." Furthermore, the current flowing through the first coil L1 will be referred to as the "first current It1," and the current flowing through the second coil L2 will be referred to as the "second current It2."
[0021] The DC / DC converter Dcv further includes a switch control circuit Sc. The switch control circuit Sc controls the first switches Q1U and Q1D without feedback of the value of the first current It1. The switch control circuit Sc also controls the second switches Q2U and Q2D without feedback of the value of the second current It2. In other words, the switch control circuit Sc performs open-loop control of the transformation operations of the first transformer circuit Tc1 and the second transformer circuit Tc2.
[0022] By this open loop control, during power running, the power input to the input ports Pi+, Pi- is stepped down and output from the output ports Po+, Po-. On the other hand, during regeneration, the power input to the output ports Po+, Po- is stepped up and output from the input ports Pi+, Pi-, in the opposite way to Figure 1.
[0023] Hereinafter, as shown in FIG. 3, a state in which the first upper switch Q1U and the second lower switch Q2D are ON and the first lower switch Q1D and the second upper switch Q2U are OFF will be referred to as a "first state s1." Also, as shown in FIG. 4, a state in which the first upper switch Q1U and the second lower switch Q2D are OFF and the first lower switch Q1D and the second upper switch Q2U are ON will be referred to as a "second state s2." Note that in FIGS. 3 and 4, the switches Q1U, Q1D, Q2U, and Q2D, which are semiconductor switches, are represented by symbols representing mechanical switches to facilitate visibility of the ON and OFF states of the switches Q1U, Q1D, Q2U, and Q2D. This also applies to FIGS. 8 and 9, which will be described later.
[0024] During powering, when a current flows from the input port Pi+ to the output port Po+ shown in FIG. 1 , the switch control circuit Sc alternates between a first state s1 shown in FIG. 3 and a second state s2 shown in FIG. 4 . In the first state s1 shown in FIG. 3 , the first current It1 increases and the second current It2 decreases. On the other hand, in the second state s2 shown in FIG. 4 , the first current It1 decreases and the second current It2 increases. As a result, as shown in FIG. 5 , the first current It1 and the second current It2 transition with a phase difference of 180° from each other.
[0025] 5, the first current It1 is the sum of the first upper current Iq1u in the first state s1 and the first lower current Iq1d in the second state s2, and the second current It2 is the sum of the second lower current Iq2d in the first state s1 and the second upper current Iq2u in the second state s2.
[0026] The input current Iis is the sum of the first upper current Iq1u in the first state s1 and the second upper current Iq2u in the second state s2. That is, the input current Iis is the sum of the first current It1 in the first state s1 and the second current It2 in the second state s2. This is related to the problem to be solved in this embodiment, which will be described later.
[0027] During regeneration, in a state in which a current flows from the output port Po+ to the input port Pi+ in the opposite direction to the arrow shown in Fig. 1, the switch control circuit Sc alternates between a first state s1 shown in Fig. 8 and a second state s2 shown in Fig. 9. As a result, even during regeneration, the first current It1 and the second current It2 transition with a phase difference of 180° from each other, as shown in Fig. 10.
[0028] In this embodiment, the time for which the first state s1 is maintained is equal to the time for which the second state s2 is maintained, whether during power generation or regeneration. Therefore, the duty ratio of each of the switches Q1U, Q1D, Q2U, and Q2D is approximately 50%. More specifically, the duty ratio of each of the switches Q1U, Q1D, Q2U, and Q2D is shorter than 50% by the amount of dead time.
[0029] The dead time here refers to the time when both the upper switch and the lower switch are turned OFF for an instant when switching from one of the first state s1 and the second state s2 to the other. During the dead time during powering shown in Figure 1, current flows through each of the lower switches Q1D and Q2D due to the parasitic diodes of each of the lower switches Q1D and Q2D. On the other hand, during the dead time during regeneration, when current flows in the opposite direction to Figure 1, current flows through each of the upper switches Q1U and Q2U due to the parasitic diodes of each of the upper switches Q1U and Q2U.
[0030] Since the duty ratio of each of the switches Q1U, Q1D, Q2U, and Q2D is approximately 50%, the voltage input to the input ports Pi+ and Pi- is reduced to approximately half and output from the output ports Po+ and Po- during powering as shown in Fig. 1. On the other hand, during regeneration when current flows in the opposite direction to Fig. 1, the voltage input to the output ports Po+ and Po- is boosted to approximately double and output from the input ports Pi+ and Pi-.
[0031] Next, a problem to be solved by this embodiment will be described. When an abnormality such as a disconnection or other failure occurs in either the first transformer circuit Tc1 or the second transformer circuit Tc2 shown in Fig. 1, an imbalance occurs between the impedance of the first transformer circuit Tc1 and the impedance of the second transformer circuit Tc2. In this case, because of the open-loop control, the magnitudes of the first current It1 and the second current It2 may diverge from each other, as shown in Fig. 6.
[0032] As described above, the input current Iis is the sum of the first current It1 in the first state s1 and the second current It2 in the second state s2. Therefore, as shown in FIG. 6 , if the magnitudes of the first current It1 and the second current It2 deviate from each other, the fluctuation range ΔIis of the input current Iis becomes larger than that in the normal state shown in FIG. 5 . The fluctuation range ΔIis shown in FIG. 6 increases the current flowing into and out of the input capacitor Ci. This flow may cause the input capacitor Ci to heat up, potentially leading to a breakdown of the input capacitor Ci. Therefore, when such an abnormality occurs, it is necessary to quickly detect the abnormality and protect the input capacitor Ci.
[0033] To solve the above problems, as shown in FIG. 1, the DC / DC converter Dcv further includes a first detection circuit A1, a second detection circuit A2, and a stop determination circuit Jc.
[0034] The first detection circuit A1 detects the first current It1 by detecting the current in a portion electrically connected in series with the first coil L1, and outputs a "first voltage V1" as a voltage based on the magnitude of the detected first current It1. The second detection circuit A2 detects the second current It2 by detecting the current in a portion electrically connected in series with the second coil L2, and outputs a second voltage V2 as a voltage based on the magnitude of the detected second current It2.
[0035] The stop determination circuit Jc outputs a stop signal Vb to the switch control circuit Sc based on the difference between the first voltage V1 and the second voltage V2. The stop signal Vb is a signal for stopping the voltage transformation operation. In other words, the stop determination circuit Jc stops the voltage transformation operation based on the difference between the first current It1 and the second current It2.
[0036] Next, the stop determination circuit Jc will be described in detail with reference to Figure 2. The stop determination circuit Jc includes first to third operational amplifiers Ap1 to Ap3, first to ninth resistors R1 to R9 as electrical resistors, first and second diodes Do1 and Do2, and a constant voltage source Pth.
[0037] The output terminal of the first detection circuit A1 is electrically connected to the inverting input terminal of the first operational amplifier Ap1 via a first resistor R1 and to the non-inverting input terminal of the second operational amplifier Ap2 via a fourth resistor R4. The output terminal of the second detection circuit A2 is electrically connected to the non-inverting input terminal of the first operational amplifier Ap1 via a second resistor R2 and to the inverting input terminal of the second operational amplifier Ap2 via a third resistor R3. The non-inverting input terminal of the first operational amplifier Ap1 is electrically connected to ground via a fifth resistor R5. The non-inverting input terminal of the second operational amplifier Ap2 is electrically connected to ground via a sixth resistor R6.
[0038] The output terminal of the first operational amplifier Ap1 is electrically connected to the anode electrode of the first diode Do1, the cathode electrode of which is electrically connected to the inverting input terminal of the first operational amplifier Ap1 via a seventh resistor R7 and to the non-inverting input terminal of the third operational amplifier Ap3.
[0039] The output terminal of the second operational amplifier Ap2 is electrically connected to the anode electrode of the second diode Do2, the cathode electrode of which is electrically connected to the inverting input terminal of the second operational amplifier Ap2 via an eighth resistor R8, and is also electrically connected to the non-inverting input terminal of the third operational amplifier Ap3.
[0040] The non-inverting input terminal of the third operational amplifier Ap3 is electrically connected to ground via a ninth resistor R9. The inverting input terminal of the third operational amplifier Ap3 is electrically connected to a constant voltage source Pth, and receives a threshold voltage Vth.
[0041] With the above circuit configuration, the first operational amplifier Ap1 outputs a "first differential voltage ΔV1" as a voltage based on the value (V1-V2) obtained by subtracting the second voltage V2 from the first voltage V1. On the other hand, the second operational amplifier Ap2 outputs a "second differential voltage ΔV2" as a voltage based on the value (V2-V1) obtained by subtracting the first voltage V1 from the second voltage V2. The third operational amplifier Ap3 outputs a voltage as the stop signal Vb on the condition that the larger of the first differential voltage ΔV1 and the second differential voltage ΔV2 is greater than the threshold voltage Vth.
[0042] As a result of the above, the stop determination circuit Jc outputs a stop signal Vb on the condition that the absolute value of the difference (It1-It2) between the value of the first current It1 and the value of the second current It2 is greater than the threshold value Ith, as shown in Figure 7.
[0043] When the switch control circuit Sc shown in Fig. 1 receives the stop signal Vb, it executes stop control. This stop control is a control to stop the voltage transformation operation by controlling each of the switches Q1U, Q1D, Q2U, and Q2D. More specifically, the stop control is performed, for example, as follows.
[0044] 3 and 4, the switch control circuit Sc fixes the switches Q1U, Q1D, Q2U, and Q2D to OFF through stop control. Even in this case, current flows through the first lower switch Q1D and the second lower switch Q2D due to the parasitic diodes.
[0045] The above stop control maintains free-wheeling in the closed circuit including the first lower switch Q1D and the first coil L1 and the closed circuit including the second lower switch Q2D and the second coil L2, thereby reducing the first current It1 and the second current It2 to zero and stopping the transforming operation, as shown in FIG.
[0046] On the other hand, when the switch control circuit Sc receives the stop signal Vb during regeneration shown in Figures 8 and 9, it performs stop control to fix each of the switches Q1U, Q1D, Q2U, and Q2D to OFF. Even in this case, current flows through the first upper switch Q1U and the second upper switch Q2U due to parasitic diodes. By performing the above stop control, the first current It1 and the second current It2 are reduced to zero, and the transforming operation is stopped, just as in the case of powering.
[0047] As shown in Fig. 1, an alarm device Nd is provided outside the DC / DC converter Dcv. The stop determination circuit Jc also outputs a stop signal Vb to the alarm device Nd. Upon receiving the stop signal Vb, the alarm device Nd issues an alarm. The alarm may be, for example, a screen display alarm, an audible alarm, or both.
[0048] The configuration and effects of this embodiment will be summarized below.
[0049] The switch control circuit Sc shown in Fig. 1 controls the switches Q1U, Q1D, Q2U, and Q2D to perform open-loop control of the transforming operation of the first transformer circuit Tc1 and the second transformer circuit Tc2. The first detection circuit A1 detects a first current It1 flowing through the first coil L1. The second detection circuit A2 detects a second current It2 flowing through the second coil L2. The stop determination circuit Jc stops the transforming operation based on the difference between the first current It1 and the second current It2.
[0050] Therefore, as shown in Fig. 7, in the event of an abnormality in which the value of the first current It1 and the value of the second current It2 diverge, that is, in the event of an abnormality in which the current flowing into or out of the input-side capacitor Ci shown in Fig. 1 becomes large, the transforming operation can be stopped. This makes it possible to suppress heat generation in the input-side capacitor Ci due to the flow of current therein and protect the input-side capacitor Ci. As described above, according to this embodiment, it is possible to protect the input-side capacitor Ci by an appropriate method in the event of an abnormality in a DC / DC converter that performs open-loop control of the transforming operation.
[0051] 1 stops the transformer operation based on the difference between the first current It1 and the second current It2, whether during power generation or regeneration, thereby protecting the input capacitor Ci in the event of an abnormality.
[0052] The stop determination circuit Jc outputs a stop signal Vb to the switch control circuit Sc based on the difference between the first current It1 and the second current It2. Upon receiving the stop signal Vb, the switch control circuit Sc stops the voltage transformation operation by controlling the switches Q1U, Q1D, Q2U, and Q2D. Therefore, the voltage transformation operation can be stopped with a simple configuration that simply outputs the stop signal Vb to the switch control circuit Sc.
[0053] As shown in FIG. 2 , the first detection circuit A1 outputs a first voltage V1 based on the magnitude of the first current It1. The second detection circuit A2 outputs a second voltage V2 based on the magnitude of the second current It2. The first operational amplifier Ap1 outputs a first differential voltage ΔV1 based on the value (V1-V2) obtained by subtracting the second voltage V2 from the first voltage V1. The second operational amplifier Ap2 outputs a second differential voltage ΔV2 based on the value (V2-V1) obtained by subtracting the first voltage V1 from the second voltage V2. The third operational amplifier Ap3 outputs a voltage as a stop signal Vb, provided that the larger of the first differential voltage ΔV1 and the second differential voltage ΔV2 is greater than the threshold voltage Vth. Therefore, the stop determination circuit Jc can be realized with a simple configuration using three operational amplifiers Ap1, Ap2, and Ap3.
[0054] As a result, the stop determination circuit Jc stops the voltage transformation operation on the condition that the absolute value of the difference (It1-It2) between the value of the first current It1 and the value of the second current It2 is greater than the threshold value Ith, as shown in Fig. 7. Therefore, when the absolute value of the difference (It1-It2) becomes greater than the threshold value Ith, the voltage transformation operation can be stopped promptly.
[0055] 1, the stop determination circuit Jc outputs a predetermined stop signal Vb not only to the switch control circuit Sc but also to the alarm device Nd. The alarm device Nd issues an alarm upon receiving the stop signal Vb. This allows an operator or the like to recognize an abnormality in the DC / DC converter Dcv based on the alarm.
[0056] Second Embodiment Next, a second embodiment will be described with reference to Figures 11 and 12. This embodiment will be described based on the first embodiment, focusing on differences from the first embodiment, and descriptions of the same or similar aspects to the first embodiment will be omitted as appropriate.
[0057] The stop determination circuit Jc of this embodiment shown in Figure 11 outputs a stop signal on the condition that the absolute value of the value that increases as the difference between the first current It1 value and the second current It2 value (It1-It2) is greater than a threshold value, rather than the absolute value of the difference itself.
[0058] Specifically, the stop determination circuit Jc of this embodiment further includes a first capacitor C1 and a second capacitor C2. The output terminal of the first operational amplifier Ap1 is electrically connected in parallel with a seventh resistor R7 to the inverting input terminal of the first operational amplifier Ap1 via the first capacitor C1. The seventh resistor R7 may be interpreted as a "first feedback resistor." The output terminal of the second operational amplifier Ap2 is electrically connected in parallel with an eighth resistor R8 to the inverting input terminal of the second operational amplifier Ap2 via the second capacitor C2. The eighth resistor R8 may be interpreted as a "second feedback resistor."
[0059] As a result of the above, the first differential voltage ΔV1 increases according to the cumulative value (V1-V2) of the first voltage V1 minus the second voltage V2. On the other hand, the second differential voltage ΔV2 increases according to the cumulative value (V2-V1) of the second voltage V2 minus the first voltage V1. The third operational amplifier Ap3 outputs the stop signal Vb on the condition that the larger of the first differential voltage ΔV1 and the second differential voltage ΔV2 exceeds the threshold voltage Vth.
[0060] As a result of the above, the stop determination circuit Jc stops the voltage transformation operation when the absolute value of the value that increases as the difference (It1-It2) between the first current It1 value and the second current It2 value accumulates, rather than the absolute value of the difference (It1-It2), is greater than the threshold value. Therefore, as shown in FIG. 12, the timing at which the voltage transformation operation is stopped is delayed compared to the first embodiment. This makes it possible to suppress the adverse effect of stopping the voltage transformation operation even when the absolute value of the difference (It1-It2) temporarily exceeds the threshold value Ith due to a disturbance or the like.
[0061] Moreover, this embodiment can be realized with a simple configuration by simply adding a first capacitor C1 and a second capacitor C2 to the state of the first embodiment shown in Fig. 2, as shown in Fig. 11. In other words, the stop determination circuit Jc can be realized with a simple configuration using three operational amplifiers Ap1, Ap2, and Ap3 and two capacitors C1 and C2.
[0062] The above-described embodiment can be modified, for example, as follows. The DC / DC converter Dcv may be modified to a converter capable of voltage transformation in only one direction, that is, power running, instead of in both directions, that is, power running and regeneration. In this case, each of the first lower switch and the second lower switch may be replaced with a diode.
[0063] Instead of the stop determination circuit Jc outputting the stop signal Vb to the switch control circuit Sc, the stop determination circuit Jc may directly switch OFF each of the switches Q1U, Q1D, Q2U, and Q2D.
[0064] According to the above embodiment, the DC / DC converters shown in Supplementary Notes 1 to 9 below can be realized.
[0065] [Supplementary Note 1] A power supply includes input ports (Pi+, Pi-), an input-side capacitor (Ci), a first transformer circuit (Tc1), a second transformer circuit (Tc2), output ports (Po+, Po-), and a switch control circuit (Sc), wherein the first transformer circuit (Tc1) includes first switches (Q1U, Q1D) and a first coil (L1), and the second transformer circuit (Tc2) includes second switches (Q2U, Q2D) and a second coil (L2), and the first coil (L1) and the second coil (L2) are connected in parallel to the input ports (Pi+, Pi-) and the input-side capacitor (Ci), the switch control circuit (Sc) performs open-loop control of a transformation operation by the first transformer circuit (Tc1) and the second transformer circuit (Tc2) by controlling the first switches (Q1U, Q1D) and the second switches (Q2U, Q2D), and power transformed by the transformation operation is output from the output ports (Po+, Po-); the DC / DC converter (Dcv) comprises: a first detection circuit (A1) that detects a first current (It1) as a current flowing through the first coil (L1); a second detection circuit (A2) that detects a second current (It2) as a current flowing through the second coil (L2); and a stop determination circuit (Jc) that stops the transformation operation based on a difference between the first current (It1) and the second current (It2).
[0066] [Supplementary Note 2] The first switches (Q1U, Q1D) include a first upper switch (Q1U) and a first lower switch (Q1D), The second switches (Q2U, Q2D) include a second upper switch (Q2U) and a second lower switch (Q2D), One end of the first coil (L1) is electrically connected to positive terminals of the input ports (Pi+, Pi-) and the input-side capacitor (Ci) via the first upper switch (Q1U), and is also electrically connected to negative terminals of the input ports (Pi+, Pi-), the input-side capacitor (Ci), and the output ports (Po+, Po-) via the first lower switch (Q1D), one end of the second coil (L2) is electrically connected to the positive terminals of the input ports (Pi+, Pi-) and the input-side capacitor (Ci) via the second upper switch (Q2U), and is also electrically connected to the negative terminals of the input ports (Pi+, Pi-), the input-side capacitor (Ci), and the output ports (Po+, Po-) via the second lower switch (Q2D).
[0067] [Supplementary Note 3] The DC / DC converter (Dcv) according to Supplementary Note 1 or 2, wherein during powering, the DC / DC converter (Dcv) transforms the power input to the input ports (Pi+, Pi-) and outputs it from the output ports (Po+, Po-), and during regeneration, transforms the power input to the output ports (Po+, Po-) and outputs it from the input ports (Pi+, Pi-), and the stop determination circuit (Jc) stops the transformation operation based on the difference between the first current (It1) and the second current (It2) both during powering and during regeneration.
[0068] [Supplementary Note 4] The DC / DC converter (Dcv) according to any one of Supplementary Notes 1 to 3, wherein the stop determination circuit (Jc) outputs a predetermined stop signal (Vb) to the switch control circuit (Sc) based on the difference, and the switch control circuit (Sc) stops the voltage transformation operation by controlling the first switches (Q1U, Q1D) and the second switches (Q2U, Q2D) upon receiving the stop signal (Vb).
[0069] [Supplementary Note 5] The first detection circuit (A1) outputs a first voltage (V1) based on the magnitude of the first current (It1), The second detection circuit (A2) outputs a second voltage (V2) based on the magnitude of the second current (It2), The stop determination circuit (Jc) includes: a first operational amplifier (Ap1) that outputs a first differential voltage (ΔV1) based on a value (V1-V2) obtained by subtracting the second voltage (V2) from the first voltage (V1), A second operational amplifier (Ap2) that outputs a second differential voltage (ΔV2) based on a value (V2-V1) obtained by subtracting the first voltage (V1) from the second voltage (V2), and A third operational amplifier (Ap3) that outputs a voltage as the stop signal (Vb) on condition that the larger of the first differential voltage (ΔV1) and the second differential voltage (ΔV2) is greater than a threshold voltage (Vth). 5. The DC / DC converter (Dcv) according to claim 4.
[0070] [Supplementary Note 6] The DC / DC converter (Dcv) according to any one of Supplementary Notes 1 to 5, wherein the stop determination circuit stops the transforming operation on condition that an absolute value of a difference (It1-It2) between a value of the first current (It1) and a value of the second current (It2) is greater than a threshold value (Ith).
[0071] [Supplementary Note 7] The DC / DC converter (Dcv) according to any one of Supplementary Notes 1 to 5, wherein the stop determination circuit stops the transforming operation on condition that an absolute value of an accumulated increase in a difference (It1-It2) between a value of the first current (It1) and a value of the second current (It2) is greater than a threshold value.
[0072] [Supplementary Note 8] The DC / DC converter (Dcv) according to Supplementary Note 5, wherein the stop determination circuit stops the transforming operation on condition that an absolute value of an increasing cumulative value of a difference (It1-It2) between the value of the first current (It1) and the value of the second current (It2) is greater than a threshold value, wherein an output terminal of the first operational amplifier (Ap1) is electrically connected to an inverting input terminal of the first operational amplifier (Ap1) via a first feedback resistor (R7) and a first capacitor (C1) connected in parallel, and wherein an output terminal of the second operational amplifier (Ap2) is electrically connected to an inverting input terminal of the second operational amplifier (Ap2) via a second feedback resistor (R8) and a second capacitor (C2) connected in parallel.
[0073] [Supplementary Note 9] The DC / DC converter (Dcv) according to any one of Supplementary Notes 1 to 8, wherein the stop determination circuit (Jc) outputs a predetermined signal (Vb) to a predetermined alarm device (Nd) when stopping the voltage transformation operation, and the alarm device (Nd) issues an alarm upon receiving the signal (Vb).
[0074] A1 First detection circuit A2 Second detection circuit Ap1 First operational amplifier Ap2 Second operational amplifier Ap3 Third operational amplifier C1 First capacitor C2 Second capacitor Ci Input capacitor Dcv DC / DC converter It1 First current It2 Second current Ith Threshold value Jc Stop determination circuit L1 First coil L2 Second coil Nd Alarm device Pi+ Input port Pi- Input port Po+ Output port Po- Output port Q1U First upper switch (first switch) Q1D First lower switch (first switch) Q2U Second upper switch (second switch) Q2D Second lower switch (second switch) R7 Seventh resistor (first feedback resistor) R8 Eighth resistor (second feedback resistor) Sc Switch control circuit Tc1 First transformer circuit Tc2 Second transformer circuit V1 First voltage V2: Second voltage Vb: Stop signal (predetermined signal) Vth: Threshold voltage ΔV1: First differential voltage ΔV2: Second differential voltage
Claims
1. A DC / DC converter comprising: an input port, an input side capacitor, a first transformer circuit, a second transformer circuit, an output port, and a switch control circuit, wherein the first transformer circuit includes a first switch and a first coil, and the second transformer circuit includes a second switch and a second coil, the first coil and the second coil are connected in parallel to the input port and the input side capacitor, and the switch control circuit performs open-loop control of a transformation operation by the first transformer circuit and the second transformer circuit by controlling the first switch and the second switch, and power transformed by the transformation operation is output from the output port. The DC / DC converter comprises: a first detection circuit that detects a first current as a current flowing through the first coil; a second detection circuit that detects a second current as a current flowing through the second coil; and a stop determination circuit that stops the transformation operation based on a difference between the first current and the second current.
2. The DC / DC converter as described in claim 1, wherein the first switch includes a first upper switch and a first lower switch, the second switch includes a second upper switch and a second lower switch, one end of the first coil is electrically connected to the positive terminal of the input port and the input side capacitor via the first upper switch, and is electrically connected to the negative terminal of the input port, the input side capacitor, and the output port via the first lower switch, and one end of the second coil is electrically connected to the positive terminal of the input port and the input side capacitor via the second upper switch, and is electrically connected to the negative terminal of the input port, the input side capacitor, and the output port via the second lower switch.
3. A DC / DC converter as claimed in claim 1 or 2, wherein the DC / DC converter transforms the power input to the input port and outputs it from the output port during power running, and transforms the power input to the output port and outputs it from the input port during regeneration, and the stop determination circuit stops the transformation operation based on the difference between the first current and the second current both during power running and during regeneration.
4. The DC / DC converter according to any one of claims 1 to 3, wherein the stop determination circuit outputs a predetermined stop signal to the switch control circuit based on the difference, and upon receiving the stop signal, the switch control circuit stops the voltage transformation operation by controlling the first switch and the second switch.
5. The DC / DC converter according to claim 4, wherein the first detection circuit outputs a first voltage based on the magnitude of the first current, the second detection circuit outputs a second voltage based on the magnitude of the second current, and the stop determination circuit includes: a first operational amplifier that outputs a first differential voltage based on a value obtained by subtracting the second voltage from the first voltage, a second operational amplifier that outputs a second differential voltage based on a value obtained by subtracting the first voltage from the second voltage, and a third operational amplifier that outputs a voltage as the stop signal on condition that the larger of the first differential voltage and the second differential voltage is greater than a threshold voltage.
6. The DC / DC converter according to any one of claims 1 to 5, wherein the stop determination circuit stops the transforming operation on condition that an absolute value of a difference between a value of the first current and a value of the second current is greater than a threshold value.
7. The DC / DC converter according to any one of claims 1 to 5, wherein the stop determination circuit stops the transformation operation on condition that an absolute value of an increase in accordance with an accumulation of a difference between the value of the first current and the value of the second current is greater than a threshold value.
8. The DC / DC converter according to claim 5, wherein the stop determination circuit stops the transformation operation on condition that an absolute value of an increase according to an accumulation of a difference between the value of the first current and the value of the second current is greater than a threshold value, the output terminal of the first operational amplifier is electrically connected to an inverting input terminal of the first operational amplifier via a first feedback resistor and a first capacitor in parallel, and the output terminal of the second operational amplifier is electrically connected to an inverting input terminal of the second operational amplifier via a second feedback resistor and a second capacitor in parallel.
9. The DC / DC converter according to any one of claims 1 to 8, wherein the stop determination circuit outputs a predetermined signal to a predetermined alarm device when the transforming operation is to be stopped, and the alarm device issues an alarm when it receives the signal.
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