Capacitively coupled power and signal scheme for gate drive

The capacitive coupled power and signal scheme addresses the challenge of integrating isolation barriers for power and control signal transfer in MEMS devices by using capacitive or magnetic coupling techniques, achieving high-speed and efficient signal transfer on an integrated circuit die.

WO2025029909A1PCT designated stage expired Publication Date: 2025-02-06MENLO MICROSYSTEMS INC
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Patent Information

Application Number
PCT/US2024/040368
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-07-31
Filing Date
2024-07-31
Publication Date
2025-02-06

AI Technical Summary

Technical Problem

Conventional power transistors and microelectromechanical system (MEMS) devices require an isolation barrier for transferring power and control signals, which is typically achieved using large components that cannot be integrated on a single integrated circuit die.

Method used

A capacitive coupled power and signal scheme that uses capacitive coupling, magnetic transformer coupling, or combinations thereof to transfer power and control signals across an isolation barrier, allowing for integration on an integrated circuit die.

Benefits of technology

This solution enables high-speed gate control signaling with response times less than 1 ps, robust noise rejection, and efficient power transfer, with measured results showing 90V gate drive signals and output power of 10mW with less than 20mW input.

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Abstract

A system for transferring power and a control signal across an isolation barrier comprises a first domain that generates a carrier signal and modulates the carrier signal with the control signal to produce a modulated signal, and a second domain that recovers DC power from the modulated signal and recovers the control signal from the modulated signal to produce a recovered control signal. The first domain may convey the modulated signal through the isolation barrier and to the second domain. The first domain may comprise an encoder that modulates the carrier signal by varying the duty cycle of the carrier signal. The recovered control signal may comprise a first MEMS switch gate drive signal and a second MEMS switch gate drive signal, and the second domain may synchronizes the first MEMS switch gate drive signal to the second MEMS switch gate drive signal.
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Description

Capacitively Coupled Power and Signal Scheme for Gate DriveRELATED APPLICATIONS

[0001] This application claims the benefit of U.S. Provisional Application No. 63 / 529,948, filed on 31 July 2023. The entire teachings of the above application(s) are incorporated herein by reference.BACKGROUND

[0002] Power switching microelectromechanical system (MEMS) devices with gate drivers require the transfer of (i) operating power and (ii) control signal(s) across an isolation barrier. Conventional power transistors including Si, GaN, and SiC also have this requirement of an isolation barrier.

[0003] Implementation of the isolation barrier is typically accomplished using components that are substantially larger than the footprint of an integrated circuit die, which precludes incorporation of such components on an integrated circuit.SUMMARY

[0004] The embodiments disclosed herein are directed to a system for transferring power and a control signal across an isolation barrier. The components used to implement the isolation barrier and to transfer the operating power and control signals across that barrier are small enough to be incorporated on an integrated circuit die along with associated circuit components on either side of the isolation barrier. Isolation implemented with capacitive coupling, capacitive coupling with high frequency isolation, magnetic transformer coupling, or combinations of these coupling techniques are discussed herein.

[0005] The example embodiments are directed to powering and controlling power switching microelectromechanical system (MEMS) devices across an isolation barrier. Conventional power transistors, including those using Si, GaN, and SiC based technologies, may also have an isolation barrier requirement, and many of the concepts and circuit details described herein may be used for these applications as well.

[0006] Capacitive and magnetic coupling circuits may be driven by high frequency electrical pulses and can utilize rectifiers to recover DC power transferred across the isolation barrier. The gate control signal can be encoded through modulation of the drive pulses. Themodulation can be pulse duty cycle, pulse phase, or pulse frequency modulation. DC power transfer is continuous regardless of switch control signal state (i.e., on or off). Simulation and measured results show that this technique yields high speed gate control signaling (e.g., response time of less than 1 ps) and is robust in rejecting noise. Results for MEMS power switches have been shown where the gate drive signal can be as high as 90V with measured power consumption producing lOmW of output with less than 20mW input using discrete parts. Simulated results using custom transistors show power consumption can be less than 15mW.

[0007] Different degrees of isolation can be achieved using capacitors, capacitors in series with inductors or inductive beads, transformers, or combinations thereof. Capacitors tend to be significantly smaller (physically) than inductors for the same amount of energy storage and are therefore preferred from a size standpoint. Magnetic components such as transformers, however, may be used in some embodiments to achieve a greater degree of isolation. Transformers may also provide a primary / secondary turns ratio which offers voltage gain. Voltage gain may alternatively be obtained using capacitor / diode multiplication techniques. These can be incorporated into the rectifier circuit with minimal additional components. Circuits with doubling, tripling, and quadrupling have been designed and simulated, eliminating the need for a transformer.

[0008] In addition to the transfer of DC power, a digital control signal also needs to be transferred. A logic signal may be encoded by, for example, modulating the switching pulse duty cycle, phase, or frequency of a carrier signal. For capacitive coupling, duty cycle modulation may be used. Transformer coupling, however, cannot handle a duty cycle significantly different from 50% so phase or frequency modulation may be preferred. Circuits of the prior art may transfer power or the control signal across an isolation barrier, but not both with the same circuit.

[0009] The objective of the disclosed system for transferring power and a control signal across the isolation barrier is to provide synchronized switching logic signals and switching MEMS drive signals that are subject only to (i) logic delay mismatch and (2) mismatch of the MEMS drivers. This synchronization ensures that the voltages distributed across the MEMS switches are substantially equal, and the impact of individual circuit and temperature variations don’t cause the entire voltage being switched to appear across a single MEMS switch, which could cause failure of the MEMS series stacking circuit.

[0010] Another embodiment may replace the isolation capacitor pair for each MEMS switch with a coupled inductor. In the case of the coupled inductor the pair of the complementary switching signals must have equal (50%) duty ratio to avoid inductor saturation. The switching command signal for this embodiment can be encoded by either phase shift between the switching signals or a significant frequency shift (for example by a factor of two). The logic signal recovery circuit would use a similar combination of analog and digital circuit blocks such as analog comparators, RC low pass filters and logic gates.

[0011] In one aspect, the invention may be a system for transferring power and a control signal across an isolation barrier, comprising a first domain that generates a carrier signal and modulates the carrier signal with the control signal to produce a modulated signal, and a second domain that (i) recovers DC power from the modulated signal, and (ii) recovers the control signal from the modulated signal to produce a recovered control signal. The first domain may convey the modulated signal through the isolation barrier and to the second domain.

[0012] The first domain may comprise an encoder that modulates the carrier signal by varying the duty cycle of the carrier signal. The first domain may comprise an encoder that modulates the carrier signal by varying the frequency of the carrier signal. The first domain may comprise an encoder that modulates the carrier signal by varying the phase of the carrier signal. The carrier signal may comprise two complementary digital signals. The isolation barrier may comprise one or more capacitors, each connected in series between the first domain and the second domain. Each of the one or more capacitors may be less than or equal to InF.

[0013] The second domain may comprise a rectifier that recovers DC power from the modulated signal, and the DC power may be isolated from the first domain. The second domain may comprise a decoder that recovers the control signal encoded on the modulated signal. The recovered control signal may comprise a first MEMS switch gate drive signal and a second MEMS switch gate drive signal. The second domain may synchronize the first MEMS switch gate drive signal to the second MEMS switch gate drive signal. The system of claim 9, wherein the first MEMS switch gate drive signal is synchronized with the second MEMS switch gate drive signal to within 1 pS.

[0014] In another aspect, the invention may be a system for conveying power and a control signal across an isolation barrier, comprising an encoder that generates a signal and modulates control information onto the signal to produce a modulated signal and a decoderthat receives the modulated signal from the encoder through the isolation barrier, recovers the control information from the modulated signal, and extracts DC power from the modulated signal.

[0015] The isolation barrier may comprise one or more capacitors, each connected in series between the encoder and the decoder. Each of the one or more capacitors may be less than or equal to InF. The carrier signal may comprise two complementary digital signals. The decoder may comprise a full bridge rectifier for extracting the DC power from the modulated signal. The recovered control information may comprise a first MEMS switch gate drive signal and a second MEMS switch gate drive signal, and the decoder may synchronize the first MEMS switch gate drive signal to the second MEMS switch gate drive signal. The carrier signal may be modulated by varying the duty cycle of the carrier signal.

[0016] In another aspect, the invention may be a method of transferring power and a control signal across an isolation barrier. The method may comprise generating a carrier signal and modulating the carrier signal with the control signal to produce a modulated signal, conveying the modulated signal through an isolation barrier to produce an isolated signal, recovering DC power from the modulated signal, and recovering the control signal from the modulated signal to produce a recovered control signal.

[0017] The method may further comprise recovering the control signal as a first MEMS switch gate drive signal and a second MEMS switch gate drive signal. The method may also comprise synchronizing the first MEMS switch gate drive signal to the second MEMS switch gate drive signal. The method may further comprise rectifying the modulated signal to recover the DC power from the modulated signal.BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The patent or application file contains at least one drawing executed in color.Copies of this patent or patent application publication with color drawing(s) will be provided by the Office upon request and payment of the necessary fee.

[0019] The foregoing will be apparent from the following more particular description of example embodiments, as illustrated in the accompanying drawings in which like referencecharacters refer to the same parts throughout the different views. The drawings are not necessarily to scale, emphasis instead being placed upon illustrating embodiments.

[0020] FIG. 1 shows an example embodiment of system for transferring power and the MEMS gate control signal across an isolation barrier.

[0021] FIG. 2 shows a detailed circuit of a decoder configured for duty cycle modulation.

[0022] FIG. 3 and FIG. 4 show simulation waveforms for control signal transfer using the phase modulation implementation.

[0023] FIG. 5 shows measured waveforms of this implementation for a rising edge transition of the MEMS gate drive signal.

[0024] FIG. 6 shows measured waveforms of this FIG. 1 implementation for a falling edge transition.

[0025] FIG. 7 shows another example embodiment of system 700 for transferring power and the MEMS gate control signal across an isolation barrier.DETAILED DESCRIPTION

[0026] A description of example embodiments follows.

[0027] The embodiments disclosed herein are directed to implementation of an isolation barrier, and the transfer of operating power and a gate control signal across the isolation barrier. The example embodiments disclose the isolation implemented with capacitors, and a control signal conveyed across the isolation barrier through duty cycle modulation.

[0028] FIG. 1 shows an example embodiment of system 100 for transferring power and the MEMS gate control signal across an isolation barrier, comprising an encoder 102, a first buffer 104, a second buffer 106, a pair of isolation capacitors 108, 110, a rectifier 112 (i.e., a DC power recovery circuit), and a decoder 114. The example circuit shown in Figure 1 provides isolation using capacitors 102, 104 (Cisol and CIso2) may be augmented with an additional high frequency blocking element like an inductive bead or inductor. A transformer may also be added to get higher isolation.

[0029] The rectifier 112 (also referred to as a DC power recovery circuit) produces an isolated DC power supply relative to a node VoutM, which provides power to each MEMS power stage. In one embodiment, the rectifier 112 may be a simple diode full bridge circuit. The rectifier 112 powers the decoder 114 and the MEMS driver circuit (also referred to as a MEMS power stage), which may include integrated charge pumps to boost a low voltage DC (e.g., 5V) to a much higher voltage (e.g., 90V) needed to turn on the MEMS switches.

[0030] The decoder 114 (also referred to as a logic signal recovery circuit) may use a combination of analog and digital circuits to re-create the pre-modulation switching logic signal for each MEMS driver circuit.

[0031] Duty cycle modulation and phase modulation are two example implementations of the encoder and decoder blocks, although other suitable modulation techniques may be used. The duty cycle of a waveform is the percentage of the ratio of pulse duration to the total period of the waveform. A duty ratio encoding circuit generates a digital signal that encodes the control signal to turn the MEMS on or off. For a binary example, a 75% duty cycle may represent a first binary state (e.g., switch off) and 25% duty cycle may represent a second binary state (e.g., switch on). The encoded digital signal then drives an isolating capacitor that provides the isolation of the MEMS driver circuits. In an example phase modulation system, a phase offset of one digital signal may be used to represent the first binary state and a different phase offset may be used to represent the second binary state. For a phase modulation system, two complementary carrier signals may be used so that the control information is conveyed in the phase relationship between the two carrier signals.

[0032] In FIG. 2, the detailed circuit of the decoder is shown for the duty cycle modulation. The RC circuits 202, 204 provide high frequency noise suppression. The logic circuit 206 provides latching action to prevent chattering of the output at transitions. The example rectifier block 112 in FIG. 1 has three implementations that produce a multiple of the input voltage.

[0033] FIG. 3 and FIG. 4 show simulation waveforms for control signal transfer using the phase modulation implementation. In FIG. 3, a first pulse switching waveform 302 and a second pulse switching waveform 304 are shown with phase delay between them. The control input waveform 306 shows the control input going from low to high, the decoded control output waveform 308 is the decoded control output with a response time of about 100ns, which is well below the 1 pS requirement for this application. The MEMS switches, by contrast, have a delay in the order of a couple of microseconds.

[0034] Prior to the rising edge of decoded control output waveform 308, the first pulse switching waveform 302 leads the second pulse switching waveform 304 by the phase delay < / )l After the rising edge of decoded control output waveform 308, the first pulse switching waveform 302 lags the second pulse switching waveform 304 by the phase delay < / >2.

[0035] The example circuit shown in FIG. 1 was also implemented using duty cycle modulation with the measured transition timing of the gate drive ranging from 0 to 90 volts for a MEMS power switch application. FIG. 5 shows measured waveforms of this implementation for a rising edge transition of the MEMS gate drive signal. The upper waveform 502 shows one of the drive pulses (5V pulses in this example embodiment) with duty cycle modulation going from 25% to 75%. The lower waveform 504 shows the decoded 90V gate drive signal going from low to high, with a response time of a couple of ps to drive the MEMS power switch gate.

[0036] FIG. 6 shows measured waveforms of this FIG. 1 implementation for a falling edge transition. The upper waveform 602 shows one of the drive pulses (5 V pulses in this example embodiment) with duty cycle modulation going from 75% to 25%. The lower waveform 504 shows the decoded 90V gate drive signal going from high to low, with a response time t2of a couple of ps to drive the MEMS power switch gate. A portion of the losses are a function of the capacitance and the pulse switching frequency chosen. Using better pulse driver switches and diodes cannot improve the efficiency beyond this theoretical, bound given by equation (1): h = Pout / Pin = l-I0Ut / (2CfsVin) =l-2mA / (2* lOOpF* 10MHz*5V) = 80% (1) where Iois the output current, C is the capacitance of each isolation capacitor, fsis the pulse frequency, and V;nis the input voltage.

[0037] The equation (1) analysis shows that the Cisol and CIso2 isolation capacitors as low as lOOpF is practical with a pulse frequency of 10MHz. In addition to the losses in the capacitors, there are conduction and switching losses in the encoder transistors and losses in the rectifier. In an ASIC implementation the encoder transistors are optimally sized. The losses in the rectifier can be minimized for an ASIC implementation using optimally sized MOSFETs rather than Schottky diodes. An implementation of the example embodiments achieved an efficiency of 55% at lOmW of DC output power. Simulations reached efficiencies of 50% using commercially available bipolar junction transistors (BJTs) and Schottky diodes at multiple output voltage levels. Simulations show that an efficiency of 75% is achievable with an application specific integrated circuit (ASIC) implementation. Existing isolated DC-to-DC power converters typically have much higher standby power (~100Mw), so the efficiency for a lOMw gate drive application is significantly lower. Further, there is aneed for miniaturization and this circuit is suitable for integration in a low voltage integrated circuit (IC) process with the high voltages restricted to the coupling capacitors.

[0038] FIG. 7 shows another example embodiment of system 700 for transferring power and the MEMS gate control signal across an isolation barrier, comprising a clock generator 702, a duty ratio encoder block 704, capacitor block 706, logic signal recovery blocks 708a, 708b (also referred to as decoder), and DC power recovery blocks 710a, 710b (also referred to as rectifier). The system 700 provides control signals onoffdetl2 and onoffdet34 to the MEMS power stage 712. Synchronization of control signals onoffdetl2 and onoffdet34 is important because the MEMS switches need to be turned on at (or nearly at) the same time - otherwise differences in voltages across the MEMS switches may lead to what is referred to as hot switching, which can cause damage the MEMS switches.

[0039] While example embodiments have been particularly shown and described, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the scope of the embodiments encompassed by the appended claims.

Claims

CLAIMSWhat is claimed is:

1. A system for transferring power and a control signal across an isolation barrier, comprising: a first domain that generates a carrier signal and modulates the carrier signal with the control signal to produce a modulated signal; a second domain that (i) recovers DC power from the modulated signal, and (ii) recovers the control signal from the modulated signal to produce a recovered control signal; the first domain conveys the modulated signal through the isolation barrier and to the second domain.

2. The system of claim 1, wherein the first domain comprises an encoder that modulates the carrier signal by varying the duty cycle of the carrier signal.

3. The system of claim 1, wherein the first domain comprises an encoder that modulates the carrier signal by varying the frequency of the carrier signal.

4. The system of claim 1, wherein the first domain comprises an encoder that modulates the carrier signal by varying the phase of the carrier signal.

5. The system of claim 1, wherein the carrier signal comprises two complementary digital signals.

6. The system of claim 1, wherein the isolation barrier comprises one or more capacitors, each connected in series between the first domain and the second domain.

7. The system of claim 6, wherein each of the one or more capacitors is less than or equal to InF.

8. The system of claim 1, wherein the second domain comprises a rectifier that recovers DC power from the modulated signal, and wherein the DC power is isolated from the first domain, and a decoder that recovers the control signal encoded on the modulated signal.

9. The system of claim 1, wherein the recovered control signal comprises a first MEMS switch gate drive signal and a second MEMS switch gate drive signal, and wherein the second domain synchronizes the first MEMS switch gate drive signal to the second MEMS switch gate drive signal.

10. The system of claim 9, wherein the first MEMS switch gate drive signal is synchronized with the second MEMS switch gate drive signal to within 1 pS.

11. A system for conveying power and a control signal across an isolation barrier, comprising: an encoder that generates a signal and modulates control information onto the signal to produce a modulated signal; a decoder that receives the modulated signal from the encoder through the isolation barrier, recovers the control information from the modulated signal, and extracts DC power from the modulated signal.

12. The system of claim 11, wherein the isolation barrier comprises one or more capacitors, each connected in series between the encoder and the decoder.

13. The system of claim 12, wherein each of the one or more capacitors is less than or equal to InF.

14. The system of claim 11, wherein the carrier signal comprises two complementary digital signals.

15. The system of claim 11, wherein the decoder comprises a full bridge rectifier for extracting the DC power from the modulated signal.

16. The system of claim 11, wherein the recovered control information comprises a first MEMS switch gate drive signal and a second MEMS switch gate drive signal, and wherein the decoder synchronizes the first MEMS switch gate drive signal to the second MEMS switch gate drive signal.

17. The system of claim 11, wherein the carrier signal is modulated by varying the duty cycle of the carrier signal.

18. A method of transferring power and a control signal across an isolation barrier, comprising: generating a carrier signal and modulating the carrier signal with the control signal to produce a modulated signal; conveying the modulated signal through an isolation barrier to produce an isolated signal; recovering DC power from the modulated signal; and recovering the control signal from the modulated signal to produce a recovered control signal.

19. The method of claim 18, further comprising: recovering the control signal as a first MEMS switch gate drive signal and a second MEMS switch gate drive signal; and synchronizing the first MEMS switch gate drive signal to the second MEMS switch gate drive signal.

20. The method of claim 18, further comprising rectifying the modulated signal to recover the DC power from the modulated signal.

Citation Information

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