Band-gap reference current source, low dropout regulator and power manager

Abstract

Provided in the present application are a band-gap reference current source, a low dropout regulator and a power manager, which are applied to the technical field of power chips. The band-gap reference current source uses dual band-gap references to form a band-gap reference loop, and uses an operational amplifier clamping unit to implement clamping adjustment, so as to generate a reference current that is in direct proportion to the temperature, which is conducive to using the reference current to perform linear voltage stabilization subsequently, such that the regulator has a relatively high loading capacity, a very low quiescent current and a relatively high power noise suppression ratio, thereby improving the overall efficiency of a voltage-stabilizing circuit, and also greatly reducing the layout area.

Description

A bandgap reference current source, low voltage drop linear regulator and power supply manager Technical Field

[0001] The present application relates to the technical field of power supply chips, and in particular to a bandgap reference current source, a low voltage dropout linear regulator, and a power supply manager. Background Art

[0002] The main functional circuit units of the existing low dropout regulator (LDO) include: reference source, error amplifier, feedback resistor network, protection circuit, enable circuit, bias power supply, etc. Among them, the MOS tube type LDO mainly uses the constant current region of the MOS tube to adjust V GS Voltage, so that the MOS tube is in different current states, to achieve the purpose of controlling the output current and stabilizing the output voltage. However, under the existing structure and voltage regulation principle, the LDO output voltage is easily affected.

[0003] Therefore, the structure and circuit performance of LDO need to be improved and enhanced. Summary of the Invention

[0004] In view of this, the embodiments of this specification provide a bandgap reference current source, a low-dropout linear regulator, and a power manager, forming a new reference current source in an LDO structure that can provide a reference current proportional to temperature, which is beneficial for reducing the impact of the functional circuits within the LDO on the output voltage, has a high power supply rejection ratio, high load capacity, and is beneficial for improving the overall circuit performance of the LDO.

[0005] The embodiments of this specification provide the following technical solutions:

[0006] The embodiments of the present invention provide a bandgap reference current source, including: a first bandgap reference circuit, a second bandgap reference circuit, and an operational amplifier clamping circuit; the first bandgap reference circuit includes a first resistor, a first MOS transistor, a second MOS transistor, and a first triode; the second bandgap reference circuit includes a second resistor, a third MOS transistor, a fourth MOS transistor, a second triode, and a third resistor; the operational amplifier clamping circuit includes an operational amplifier circuit;

[0007] One end of the first resistor is connected to the input power supply, and the other end of the first resistor is connected to the source of the first MOS transistor; the gate of the first MOS transistor is connected to the gate of the third MOS transistor, the drain of the first MOS transistor, and the first differential input terminal of the operational amplifier circuit, and the drain of the first MOS transistor is connected to the drain of the second MOS transistor; the gate of the second MOS transistor is connected to the gate of the fourth MOS transistor, the base of the first transistor, and the base of the second transistor, and the source of the second MOS transistor is connected to the collector of the first transistor; the emitter of the first transistor is connected to the power ground; one end of the second resistor is connected to the input power supply, and the other end of the second resistor is connected to the source of the third MOS transistor; the drain of the third MOS transistor is connected to the second differential input terminal of the operational amplifier circuit and the drain of the fourth MOS transistor; the source of the fourth MOS transistor is connected to the collector of the second transistor; the emitter of the second transistor is connected to the power ground through the third resistor; the output terminal of the operational amplifier circuit is connected to the source of the first MOS transistor and the source of the third MOS transistor; the base of the first transistor serves as the output terminal of a constant current source to provide an output current proportional to temperature.

[0008] Preferably, the operational amplifier circuit includes a fifth MOS transistor, a sixth MOS transistor, a seventh MOS transistor, an eighth MOS transistor and a ninth MOS transistor;

[0009] The source of the fifth MOS tube is connected to the input power supply, the drain of the fifth MOS tube is connected to the source of the sixth MOS tube and the source of the seventh MOS tube; the gate of the sixth MOS tube serves as the first differential input terminal of the operational amplifier circuit; the gate of the seventh MOS tube serves as the second differential input terminal of the operational amplifier circuit; the eighth MOS tube and the ninth MOS tube form a current mirror, wherein the drain of the eighth MOS tube is connected to the drain of the sixth MOS tube, the gate of the eighth MOS tube, and the gate of the ninth MOS tube, the drain of the ninth MOS tube is connected to the drain of the seventh MOS tube, the source of the eighth MOS tube and the source of the ninth MOS tube are connected to the power ground; the drain of the ninth MOS tube serves as the output terminal of the operational amplifier circuit;

[0010] The gate of the fifth MOS transistor is used for power-on control so as to turn on the fifth MOS transistor after the input power is powered on to form a static current of the operational amplifier circuit.

[0011] Preferably, the operational amplifier circuit further includes a tenth MOS transistor and an eleventh MOS transistor, the gate of the tenth MOS transistor and the gate of the eleventh MOS transistor are connected to the drain of the ninth MOS transistor, and the source of the tenth MOS transistor and the source of the eleventh MOS transistor are connected to the power ground; the drain of the tenth MOS transistor is connected to the source of the first MOS transistor as the first output terminal of the operational amplifier circuit, and the drain of the eleventh MOS transistor is connected to the source of the third MOS transistor as the second output terminal of the operational amplifier circuit.

[0012] Preferably, the bandgap reference current source further includes a startup circuit, which includes a fourth resistor and a twelfth MOS transistor, wherein the drain of the twelfth MOS transistor is connected to the gate of the first MOS transistor and the drain of the fourth MOS transistor, the gate of the twelfth MOS transistor is connected to the power ground, and the source of the twelfth MOS transistor is connected to the power ground through the fourth resistor; wherein the twelfth MOS transistor is a depletion-type MOS transistor.

[0013] Preferably, the startup circuit further includes a fifth resistor and a thirteenth MOS transistor, one end of the fifth resistor is connected to the input power supply, the other end of the fifth resistor is connected to the source of the thirteenth MOS transistor, the drain of the thirteenth MOS transistor is connected to the source of the twelfth MOS transistor, and the gate of the thirteenth MOS transistor is connected to the drain of the first MOS transistor.

[0014] Preferably, the startup circuit further includes a fourteenth MOS transistor, the drain of the fourteenth MOS transistor is connected to the source of the thirteenth MOS transistor, the source of the fourteenth MOS transistor is connected to the power ground, and the gate of the fourteenth MOS transistor is connected to the output end of the operational amplifier circuit.

[0015] Preferably, the second MOS transistor and the fourth MOS transistor are depletion-type MOS transistors;

[0016] And / or, the resistance values ​​of the first resistor and the second resistor are equal;

[0017] And / or, the first MOS transistor and the third MOS transistor are a matched pair of transistors;

[0018] And / or, the second MOS transistor and the fourth MOS transistor are a matching pair of transistors.

[0019] The embodiment of this specification further provides a low voltage dropout linear regulator, comprising:

[0020] A bandgap reference current source as described in any one of the descriptions;

[0021] Power MOS tube;

[0022] an adjusting circuit, wherein the adjusting circuit comprises a third triode and a sixth resistor;

[0023] The output end of the bandgap reference current source is connected to the base of the third triode, the emitter of the third triode is connected to the power ground, the collector of the third triode is connected to the base of the third triode and one end of the sixth resistor, the other end of the sixth resistor is connected to the drain of the power MOS tube, the source of the power MOS tube is connected to the input power supply, the drain of the power MOS tube serves as the output end of the voltage regulator, and the gate of the power MOS tube is used for power-on control to turn on the power MOS tube after the input power supply is powered on to provide an output voltage to the outside through the output end of the voltage regulator.

[0024] Preferably, the low voltage difference linear regulator also includes a filter capacitor and / or a Maitreya capacitor, wherein the filter capacitor is connected between the drain of the power MOS tube and the power ground for output filtering of the regulator; the Maitreya capacitor is connected between the gate and drain of the power MOS tube to filter the power MOS tube.

[0025] An embodiment of this specification also provides a power manager, comprising: a bandgap reference current source as described in any one of the items in this specification, or a low-voltage dropout linear regulator as described in any one of the items in this specification; wherein the bandgap reference constant current source is used to provide an output current proportional to the temperature; and the low-voltage dropout linear regulator is used to provide a supply voltage.

[0026] Compared with the prior art, the at least one technical solution adopted in the embodiments of this specification can achieve the following beneficial effects:

[0027] Based on the traditional LDO circuit, this invention proposes a bandgap reference current source to form an LDO structure, enabling the LDO to generate a temperature-independent reference voltage. Furthermore, by combining the LDO loop with the bandgap reference loop, this invention has a higher load capacity than traditional bandgap reference circuits, and exhibits significantly lower quiescent current and higher power supply noise rejection ratio than traditional LDOs, thereby improving the overall efficiency of the LDO circuit. Furthermore, based on this bandgap structure, since it only has one loop, this invention significantly reduces the layout area compared to traditional LDOs. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following briefly introduces the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0029] FIG1 is a schematic structural diagram of a bandgap reference current source and a low-dropout linear regulator in the present application;

[0030] FIG2 is a schematic diagram showing how the current in the bandgap reference circuit is affected by the base voltage in the present application. DETAILED DESCRIPTION

[0031] The embodiments of the present application are described in detail below with reference to the accompanying drawings.

[0032] The following describes the embodiments of the present application through specific examples, and those skilled in the art can easily understand other advantages and effects of the present application from the contents disclosed in this specification. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. The present application can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present application. It should be noted that, in the absence of conflict, the features in the following embodiments and embodiments can be combined with each other. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without making creative work are within the scope of protection of this application.

[0033] It should be noted that various aspects of the embodiments within the scope of the appended claims are described below. It should be apparent that the aspects described herein can be embodied in a wide variety of forms, and any specific structure and / or function described herein is merely illustrative. Based on this application, it should be understood by those skilled in the art that an aspect described herein can be implemented independently of any other aspect, and two or more of these aspects can be combined in various ways. For example, any number and aspect described herein can be used to implement an apparatus and / or practice a method. In addition, other structures and / or functionalities other than one or more of the aspects described herein can be used to implement this apparatus and / or practice this method.

[0034] It should also be noted that the illustrations provided in the following embodiments are only schematic illustrations of the basic concept of the present application. The illustrations only show components related to the present application and are not drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component can be changed at will, and the component layout type may also be more complicated.

[0035] Additionally, in the following description, specific details are provided to provide a thorough understanding of the examples, however, one skilled in the art will appreciate that the examples can be practiced without these specific details.

[0036] The existing LDO adjusts the VGS voltage to put the MOS tube in different current states, that is, it uses the constant current region of the MOS tube to achieve constant current control, thereby achieving the purpose of output voltage stability.

[0037] Due to the inherent characteristics of MOS, the above structure and working principle are limited, which makes the output voltage easily affected.

[0038] In view of this, the inventors conducted in-depth research and improvement exploration on the structure and working principle of the linear regulator and found that: in the existing LDO structure, because the current source required for voltage regulation is implemented by utilizing the constant current region of the MOS tube, it is easily affected by various factors, such as input voltage, load changes, etc., and these influences on the current source are difficult to offset or reduce by other means, resulting in current fluctuations used for voltage regulation control, which in turn causes fluctuations in the output voltage, affecting the circuit performance improvement of the LDO.

[0039] Based on this, the embodiments of this specification propose a reference current source solution that can be used for LDO: as shown in Figure 1, in the LDO structure, two bandgap references (i.e., a first bandgap reference and a second bandgap reference) are used to form a new bandgap loop unit, and an op amp clamp is used to clamp and adjust the bandgap, so that the bandgap reference unit can generate a proportional to absolute temperature (PTAT) reference current, eliminating other possible influences on the current. This is conducive to the subsequent use of a temperature coefficient-related circuit to compensate the PTAT reference current for the temperature coefficient to obtain a temperature-independent reference voltage. That is, the LDO can obtain an output voltage that is not affected by temperature, which greatly improves the temperature coefficient suppression performance of the linear regulator, improves the stability of the regulated output voltage, and can enhance the performance of the LDO circuit.

[0040] Furthermore, the bandgap reference LDO structure of the present invention has only one loop and occupies a smaller area in the layout.

[0041] The following describes the technical solutions provided by various embodiments of the present application in conjunction with the accompanying drawings.

[0042] The present invention will be further described in detail below with reference to the accompanying drawings.

[0043] The reference design circuit is shown in FIG1 , which is a bandgap reference current source including: a first bandgap reference circuit, a second bandgap reference circuit, and an operational amplifier clamping circuit.

[0044] As shown in FIG1 , the first bandgap reference circuit includes a first resistor R3, a first MOS transistor M2A, a second MOS transistor M2C, and a first transistor Q2; the second bandgap reference circuit includes a second resistor R1, a third MOS transistor M2B, a fourth MOS transistor M2D, a second transistor Q1, and a third resistor R2; the operational amplifier clamp circuit includes an operational amplifier circuit; wherein one end of the first resistor R3 is connected to the input power supply, and the other end of the first resistor R3 is connected to the source of the first MOS transistor M2A; the gate of the first MOS transistor M2A is connected to the gate of the third MOS transistor M2B, the drain of the first MOS transistor M2A, and the first differential input terminal of the operational amplifier circuit, the drain of the first MOS transistor M2A is connected to the drain of the second MOS transistor M2C; the gate of the second MOS transistor M2C is connected to the gate of the fourth MOS transistor M2D, the base of the first transistor Q2, and the gate of the fourth MOS transistor M2D. The first transistor Q2 is connected to the power supply ground (i.e., GND); one end of the second resistor R1 is connected to the input power supply (i.e., VIN), and the other end of the second resistor R1 is connected to the source of the third MOS transistor M2B; the drain of the third MOS transistor M2B is connected to the second differential input terminal of the operational amplifier circuit and the drain of the fourth MOS transistor M2D; the source of the fourth MOS transistor M2D is connected to the collector of the second transistor Q1; the emitter of the second transistor Q1 is connected to the power supply ground through the third resistor R2; the output end of the operational amplifier circuit is connected to the source of the first MOS transistor M2A and the source of the third MOS transistor M2B; the base of the first transistor Q2 serves as the output end of the current source to provide an output current proportional to the temperature.

[0045] In the aforementioned bandgap reference unit, the first and second bandgap references each include resistors R1 and R3 of equal value. One end of each resistor is connected to the voltage "VIN," and the other end is connected to the sources of current mirror transistors M2B and M2A, respectively. The drains of the current mirror transistors M2A and M2B are connected to the drains of the pair of transistors M2C and M2D, respectively.

[0046] Furthermore, transistors M2C and M2D are depletion-mode MOS transistors (with a Vth of approximately -100mV). Their gates are connected to the bases of transistors Q1 and Q2, while their sources are connected to the collectors of transistors Q2 and Q1, respectively. The emitter of transistor Q2 is connected to GND, while the emitter of transistor Q1 is connected to one end of resistor R2, the other end of which is connected to GND.

[0047] In some implementations, the operational amplifier circuit may be the five-tube amplifier circuit shown in FIG1 , or may be other circuit forms.

[0048] The following is an example of a five-transistor amplifier circuit. As shown in FIG1 , the operational amplifier circuit includes a fifth MOS transistor M1A, a sixth MOS transistor M1B, a seventh MOS transistor M1C, an eighth MOS transistor M1D, and a ninth MOS transistor M1E.

[0049] The source of the fifth MOS transistor M1A is connected to the input power supply, the drain of the fifth MOS transistor M1A is connected to the source of the sixth MOS transistor M1B and the source of the seventh MOS transistor M1C; the gate of the sixth MOS transistor M1B serves as the first differential input terminal of the operational amplifier circuit; the gate of the seventh MOS transistor M1C serves as the second differential input terminal of the operational amplifier circuit; the eighth MOS transistor M1D and the ninth MOS transistor M1E constitute a current mirror in the operational amplifier circuit, wherein the drain of the eighth MOS transistor M1D is connected to the drain of the sixth MOS transistor M1B, the gate of the eighth MOS transistor M1D, and the gate of the ninth MOS transistor M1E, the drain of the ninth MOS transistor M1E is connected to the drain of the seventh MOS transistor M1C, the source of the eighth MOS transistor M1D and the source of the ninth MOS transistor M1E are connected to the power ground; and the drain of the ninth MOS transistor M1E serves as the output terminal of the operational amplifier circuit.

[0050] In addition, the gate of the fifth MOS transistor M1A is used for power-on control so as to turn on the fifth MOS transistor M1A after the input power is powered on to form a static current of the operational amplifier circuit.

[0051] Furthermore, the operational amplifier circuit further includes a tenth MOS transistor M1F and an eleventh MOS transistor M1G. The gates of the tenth MOS transistor M1F and the eleventh MOS transistor M1G are connected to the drain of the ninth MOS transistor M1E, and the sources of the tenth MOS transistor M1F and the eleventh MOS transistor M1G are connected to the power ground. The drain of the tenth MOS transistor M1F serves as a first output terminal of the operational amplifier circuit and is connected to the source of the first MOS transistor M2A. The drain of the eleventh MOS transistor M1G serves as a second output terminal of the operational amplifier circuit and is connected to the source of the third MOS transistor M1B.

[0052] The function of the op amp clamp unit is to ensure that the voltages at the differential input terminals of the op amp are approximately equal through the bandgap reference loop when the circuit is working normally, thereby ensuring the normal operation of the bandgap reference.

[0053] Specifically, M1A's source is connected to VIN, and its drain is connected to the sources of the amplifier's differential input pair (M1B and M1C). At this point, M1A can provide quiescent current for the five-transistor amplifier. The gates of the differential input pair (M1B and M1C) serve as the op amp's differential inputs and are connected to the drains of M2A and M2B, respectively, in the bandgap reference unit. The drains of the differential input pair (M1B and M1C) are connected to the drains of the current mirrors (M1D and M1E), respectively. The sources of the current mirrors (M1D and M1E) are connected to the reference ground (GND).

[0054] In some examples, the bandgap reference current source may further include a startup circuit, wherein the startup circuit includes a fourth resistor R5 and a twelfth MOS transistor M3B, wherein the drain of the twelfth MOS transistor M3B is connected to the gate of the first MOS transistor M2A and the drain of the fourth MOS transistor M2D, the gate of the twelfth MOS transistor M3B is connected to the power ground, and the source of the twelfth MOS transistor M3B is connected to the power ground through the fourth resistor R5; wherein the twelfth MOS transistor M3B is a depletion-type MOS transistor.

[0055] In some examples, the startup circuit further includes a fifth resistor R4 and a thirteenth MOS transistor M3A, one end of the fifth resistor R4 is connected to the input power supply, the other end of the fifth resistor R4 is connected to the source of the thirteenth MOS transistor M3A, the drain and source of the thirteenth MOS transistor M3A are connected to each other, and the gate of the thirteenth MOS transistor M3A is connected to the drain of the first MOS transistor M2A.

[0056] In some examples, the startup circuit further includes a fourteenth MOS transistor M3C, a drain of the fourteenth MOS transistor M3C is connected to the source of the thirteenth MOS transistor M3B, a source of the fourteenth MOS transistor M3C is connected to the power ground, and a gate of the fourteenth MOS transistor M3C is connected to the output end of the operational amplifier circuit (such as the drain of M1E in the aforementioned example).

[0057] It should be noted that the connections for M3A, M3B, and M3C in the startup unit, as well as the current-limiting resistors R4 and R5, are as follows: one end of R4 is connected to the voltage "VIN," and the other end is connected to the source of M3A. M3A's gate is connected to the gate of the op amp's differential input transistor M1B, and its drain is connected to the source of M3B and one end of R5. In practice, M3B uses a depletion-type MOSFET (Vth approximately -100mV). Its drain can also be connected to subsequent circuitry (such as the gate of M4A in the output unit) and the drain of M2D in the bandgap reference unit. Its gate is connected to the voltage "GND." The other end of R5 is connected to the voltage "GND."

[0058] Based on the same inventive concept, this specification also provides a low voltage dropout linear regulator, and a low voltage dropout linear regulator based on the current source of the above example.

[0059] As shown in FIG1 , a low voltage dropout linear regulator includes: a bandgap reference current source as described in any of the above examples, a power MOS transistor, and an adjustment circuit, wherein the adjustment circuit includes a third transistor Q3 and a sixth resistor R6 .

[0060] The output end of the bandgap reference current source (such as the base of Q2 in the aforementioned example) is connected to the base of the third triode Q3, the emitter of the third triode Q3 is connected to the power ground, the collector of the third triode Q3 is connected to the base of the third triode Q3 and one end of the sixth resistor R6, the other end of the sixth resistor R6 is connected to the drain of the power MOS tube M4A, the source of the power MOS tube M4A is connected to the input power supply, the drain of the power MOS tube M4A serves as the output end (i.e., VOUT) of the voltage regulator, and the gate of the power MOS tube M4A is used for power-on control so that after the input power supply is powered on, the power MOS tube M4A is turned on to provide an output voltage to the outside through the output end of the voltage regulator.

[0061] Compared with the existing bandgap reference circuit, the bandgap reference LDO of the present invention has a stronger load capacity and a smaller load regulation rate, and has a wider range of applications.

[0062] In some examples, the low-voltage difference linear regulator also includes a filter capacitor C2 and / or a Miller capacitor C1, wherein the filter capacitor C2 is connected between the drain of the power MOS tube M4A and the power ground for output filtering of the regulator; the Miller capacitor C1 is connected between the gate and drain of the power MOS tube M4A to implement a Miller compensation capacitor for the power MOS tube M4A, which is used to compensate for the phase margin of the circuit and make the circuit more stable.

[0063] In practice, the capacitor can be a plate capacitor. In this case, the source of power transistor M4A is connected to voltage "VIN", the gate is connected to the upper plate of capacitor C1, and the drain is connected to the lower plate of capacitor C1, the upper plate of stabilizing capacitor C2, and one end of resistor R6. The other end of resistor R6 is connected to the base and collector of transistor Q3, and the emitter of Q3 is connected to voltage "GND". The lower plate of stabilizing capacitor C2 is connected to voltage "GND".

[0064] Based on the same inventive concept, this specification also provides a power manager, comprising: a bandgap reference current source as described in any of the foregoing examples in this specification, or a low-voltage dropout linear regulator as described in any of the foregoing examples in this specification, wherein the bandgap reference constant current source is used to provide an output current proportional to the temperature; and the low-voltage dropout linear regulator is used to provide a supply voltage.

[0065] The working principle of the circuit unit shown in FIG1 is explained below:

[0066] 1. M2C, M2D, and M3B are depletion-type MOS transistors with a threshold voltage of approximately -100mV.

[0067] 2. The bandgap reference unit (the first bandgap reference and the second bandgap reference) is used to generate a bandgap reference PTAT current, which is copied to the output unit through a transistor current mirror.

[0068] 3. The function of the op amp clamp unit is to ensure that the voltages at the differential input terminals of the op amp are approximately equal through the bandgap reference loop when the circuit is operating normally, thereby ensuring the normal operation of the bandgap reference.

[0069] 4. Operating Principle of the Startup Unit: The startup unit is used to initially start the entire circuit. When the circuit is operating normally, the startup unit is inactive to reduce static losses. When the circuit is not operating normally, the gate and source of M3B in the startup unit are both zero. At this point, the VGS voltage of the MOS transistor is zero because its Vth is -100mV, putting it in the on-state. Because M3B is in the on-state, it pulls down the voltage at the drain and the point where it connects to the drain (the gates of transistors M4A and M1A). When input voltage VIN is applied, the absolute value of the VGS of transistors M4A and M1A increases, turning them on. Static current flows through the circuit, and the circuit begins operating. When the circuit is operating normally, current flows through branches R4, M3A, and R5. This current flows through resistor R5, generating a voltage across the resistor's upper end and the source of M3B. This voltage reduces the VGS of M3B to less than -100mV, so when the circuit is operating normally, M3B is off. To minimize the static current when the circuit is working, the branch (composed of R4, M3A, and R5) can be current limited as in the previous example. This current limiting operation is performed through R5 and M3C. During normal operation, M3C conducts part of the current while increasing the resistance of resistor R5 to limit the current of the branch.

[0070] 5. The LDO circuit can output a temperature-independent bandgap reference voltage of approximately 1.25V (this can be adjusted as needed by adjusting resistor R6, but this is not a limitation here). The bandgap reference unit in the circuit generates a reference current PTAT, which is transmitted to the output unit through transistor current mirrors Q1, Q2, and Q3. It combines with resistor R6 to generate a voltage with a positive temperature coefficient. The sum of this voltage and the negative temperature coefficient voltage VBE generated by transistor Q3 equals the output voltage. The input differential pair in the op amp unit clamps the voltage, ensuring that the drain voltages of transistors M2C and M2D in the bandgap reference unit are approximately equal. Furthermore, the depletion-mode MOS transistors M2C and M2D in the bandgap reference unit further ensure that the collector voltages of transistors Q1 and Q2 are equal, ensuring that transistors Q1 and Q2 operate in their saturation region.

[0071] 6. Design a negative feedback loop within the circuit based on the transistor's operating characteristics (see Figure 2 for an example). For example, as shown in Figure 1, when the output voltage suddenly increases, the base voltages of transistors Q1 and Q2 are pulled higher. Figure 2 shows that the current flowing through Q2 is higher than the current flowing through Q1. The branch current on Q2 is replicated to the drain of MOS transistor M2B via current mirrors M2A and M2B. At this point, the pull-up current of MOS transistor M2D is greater than the pull-down current, raising the drain voltage of MOS transistor M2D. Simultaneously, the gate voltage of M4A, connected to the drain of M2D, is also raised. Because M4A is a PMOS transistor, when the gate voltage increases, the pull-up force weakens, and M4A's drain output voltage VOUT decreases. This forms a negative feedback loop to stabilize the circuit.

[0072] 7. In the circuit diagram shown in Figure 1, MOS transistor M4A is the power transistor of the circuit. The size of the power transistor determines the load capacity of the circuit. Capacitor C1 in the circuit diagram shown in Figure 1 is the Miller compensation capacitor introduced into the circuit to compensate for the phase margin of the circuit and make the circuit more stable.

[0073] In this specification, the same or similar parts between the various embodiments can be referred to each other, and each embodiment focuses on the differences from other embodiments. In particular, for the embodiments described later, the description is relatively simple, and the relevant parts can be referred to the partial description of the previous embodiments.

[0074] The above description is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in the present application should be included in the scope of protection of the present application. Therefore, the scope of protection of the present application should be based on the scope of protection of the claims.

Claims

1. A bandgap reference current source, characterized in that: include: A first bandgap reference circuit, a second bandgap reference circuit, and an operational amplifier clamping circuit; The first bandgap reference circuit includes a first resistor, a first MOS transistor, a second MOS transistor and a first triode; the second bandgap reference circuit includes a second resistor, a third MOS transistor, a fourth MOS transistor, a second triode and a third resistor; the operational amplifier clamp circuit includes an operational amplifier circuit; Among them, one end of the first resistor is connected to the input power supply, and the other end of the first resistor is connected to the source of the first MOS tube; the gate of the first MOS tube is connected to the gate of the third MOS tube, the drain of the first MOS tube and the first differential input end of the operational amplifier circuit, and the drain of the first MOS tube is connected to the drain of the second MOS tube; the gate of the second MOS tube is connected to the gate of the fourth MOS tube, the base of the first triode and the base of the second triode, and the source of the second MOS tube is connected to the collector of the first triode; the emitter of the first triode is connected to the power ground; one end of the second resistor is connected to the input power supply, and the other end of the second resistor is connected to the source of the third MOS tube; the drain of the third MOS tube is connected to the second differential input end of the operational amplifier circuit and the drain of the fourth MOS tube; the source of the fourth MOS tube is connected to the collector of the second triode; the emitter of the second triode is connected to the power ground through the third resistor; the output end of the operational amplifier circuit is connected to the source of the first MOS tube and the source of the third MOS tube; the base of the first triode is used as the output end of the current source to provide an output current proportional to the temperature to the outside.

2. The bandgap reference current source according to claim 1, characterized in that: The operational amplifier circuit includes a fifth MOS tube, a sixth MOS tube, a seventh MOS tube, an eighth MOS tube and a ninth MOS tube; The source of the fifth MOS tube is connected to the input power supply, the drain of the fifth MOS tube is connected to the source of the sixth MOS tube and the source of the seventh MOS tube; the gate of the sixth MOS tube serves as the first differential input terminal of the operational amplifier circuit; the gate of the seventh MOS tube serves as the second differential input terminal of the operational amplifier circuit; the eighth MOS tube and the ninth MOS tube constitute a current mirror, wherein the drain of the eighth MOS tube is connected to the drain of the sixth MOS tube, the gate of the eighth MOS tube and the gate of the ninth MOS tube, the drain of the ninth MOS tube is connected to the drain of the seventh MOS tube, the source of the eighth MOS tube and the source of the ninth MOS tube are connected to the power ground; the drain of the ninth MOS tube serves as the output terminal of the operational amplifier circuit; The gate of the fifth MOS tube is used for power-on control so as to turn on the fifth MOS tube after the input power is powered on to form a static current of the operational amplifier circuit.

3. The bandgap reference current source according to claim 2, characterized in that: The operational amplifier circuit also includes a tenth MOS tube and an eleventh MOS tube. The gate of the tenth MOS tube and the gate of the eleventh MOS tube are connected to the drain of the ninth MOS tube, and the source of the tenth MOS tube and the source of the eleventh MOS tube are connected to the power ground; the drain of the tenth MOS tube is connected to the source of the first MOS tube as the first output end of the operational amplifier circuit, and the drain of the eleventh MOS tube is connected to the source of the third MOS tube as the second output end of the operational amplifier circuit.

4. The bandgap reference current source according to claim 1, characterized in that: The bandgap reference current source also includes a startup circuit, which includes a fourth resistor and a twelfth MOS tube, the drain of the twelfth MOS tube is connected to the gate of the first MOS tube and the drain of the fourth MOS tube, the gate of the twelfth MOS tube is connected to the power ground, and the source of the twelfth MOS tube is connected to the power ground through the fourth resistor; The twelfth MOS tube is a depletion type MOS tube.

5. The bandgap reference current source according to claim 4, characterized in that: The startup circuit also includes a fifth resistor and a thirteenth MOS tube, one end of the fifth resistor is connected to the input power supply, the other end of the fifth resistor is connected to the source of the thirteenth MOS tube, the drain of the thirteenth MOS tube is connected to the source of the twelfth MOS tube, and the gate of the thirteenth MOS tube is connected to the drain of the first MOS tube.

6. The bandgap reference current source according to claim 5, characterized in that: The startup circuit also includes a fourteenth MOS tube, the drain of the fourteenth MOS tube is connected to the source of the thirteenth MOS tube, the source of the fourteenth MOS tube is connected to the power ground, and the gate of the fourteenth MOS tube is connected to the output end of the operational amplifier circuit.

7. The bandgap reference current source according to any one of claims 1 to 6, characterized in that: The second MOS tube and the fourth MOS tube are depletion type MOS tubes; And / or, the resistance values ​​of the first resistor and the second resistor are equal; And / or, the first MOS transistor and the third MOS transistor are a matching pair of transistors; And / or, the second MOS transistor and the fourth MOS transistor are a matching pair of transistors.

8. A low voltage dropout linear regulator, characterized in that: include: The bandgap reference current source as claimed in any one of claims 1 to 7; Power MOS tube; An adjustment circuit, wherein the adjustment circuit comprises a third triode and a sixth resistor; Among them, the output end of the bandgap reference current source is connected to the base of the third triode, the emitter of the third triode is connected to the power ground, the collector of the third triode is connected to the base of the third triode and one end of the sixth resistor, the other end of the sixth resistor is connected to the drain of the power MOS tube, the source of the power MOS tube is connected to the input power supply, the drain of the power MOS tube serves as the output end of the voltage regulator, and the gate of the power MOS tube is used for power-on control to turn on the power MOS tube after the input power supply is powered on to provide an output voltage to the outside through the output end of the voltage regulator.

9. The low voltage dropout linear regulator according to claim 8, characterized in that: The low voltage difference linear regulator also includes a filter capacitor and / or a Maitreya capacitor, wherein the filter capacitor is connected between the drain of the power MOS tube and the power ground for output filtering of the regulator; the Maitreya capacitor is connected between the gate and drain of the power MOS tube to the power MOS tube.

10. A power manager, characterized in that: include: A bandgap reference current source as described in any one of claims 1 to 7, or a low-dropout linear regulator as described in any one of claims 8 to 9, wherein the bandgap reference constant current source is used to provide an output current proportional to the temperature; and the low-dropout linear regulator is used to provide a supply voltage.

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