Display device, display device control method and display device control program

WO2025037799A1PCT designated stage expired Publication Date: 2025-02-20SAMSUNG ELECTRONICS CO LTD

Patent Information

Application Number
PCT/KR2024/011121
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-08-17
Filing Date
2024-07-30
Publication Date
2025-02-20

Smart Images

  • Figure KR2024011121_20022025_PF_FP_ABST
    Figure KR2024011121_20022025_PF_FP_ABST
Patent Text Reader

Abstract

Provided is a display device capable of alleviating image quality degradation caused by instability in operation of an electrochromic element when a driving voltage is switched through the electrochromic element by means of a driving circuit. The display device according to one embodiment of the present document comprises: an image display device having a plurality of pixels; a dimming device which has a dimming image display unit having a plurality of dimming pixels, and which switches the transmittance of each dimming pixel; and a control unit for switching, to low transmittance, the transmittance of dimming pixels in a corresponding area of the dimming image display unit that corresponds to an object area in an image, wherein: the dimming pixel has an electrochromic element and a pixel circuit; the pixel circuit includes a driving circuit that is electrically connected to one electrode of the electrochromic element and that outputs a driving voltage to the electrode according to a signal voltage, a switching transistor for outputting the signal voltage to an input of the driving circuit according to an input scan signal, and a capacitive element connected to the input of the driving circuit so as to maintain the signal voltage output to the driving circuit; and the driving circuit can be a CMOS circuit using a transistor having enhanced characteristics.
Need to check novelty before this filing date? Find Prior Art

Description

Display device, control method of display device and control program of display device

[0001] The present disclosure relates to a display device, a control method for the display device, and a control program for the display device.

[0002] An electrochromic device is a device that switches between a light-blocking state and a light-transmitting state by switching the driving voltage applied between electrodes.

[0003] A driving circuit using a CMOS (Complementary Metal-Oxide Semiconductor) circuit is proposed as a driving circuit that supplies a driving voltage to an electrochromic element. The driving circuit is installed in each dimming pixel including an electrochromic element.

[0004] For example, Japanese Patent Publication No. 2004-518159 discloses a CMOS circuit as a configuration of a driving circuit that transmits a voltage corresponding to a data voltage to an electrochromic optical switching element. The CMOS circuit is composed of an n-type field effect transistor and a p-type field effect transistor. The two field effect transistors of the CMOS circuit are respectively connected to a positive voltage line and a negative voltage line. The CMOS circuit outputs a voltage of a positive voltage line or a voltage of a negative voltage line to the electrochromic optical switching element according to a data voltage input to the CMOS circuit.

[0005] However, a shoot-through current may flow in a CMOS circuit that constitutes a driving circuit that applies a driving voltage to an electrochromic element when the driving voltage is switched. This shoot-through current may flow into the electrochromic element, causing the operation of the electrochromic element to become unstable. For example, when a signal (e.g., a signal for switching the electrochromic element from a transparent state to a light-blocking state, or vice versa) is input to a driving transistor that is set to supply current to the electrochromic element, a voltage may be applied to one electrode of the electrochromic element, causing a temporary, uncontrolled current to flow in, which may cause the response of the electrochromic element to become unstable.

[0006] According to various embodiments of the present disclosure, it is an object to provide a display device, a control method for the display device, and a control program for the display device that can improve image quality deterioration caused by operational instability of an electrochromic element when a driving voltage to the electrochromic element is switched by a driving circuit (e.g., when a signal for switching the electrochromic element from a transparent state to a light-blocking state, or vice versa, is applied to a driving transistor).

[0007] A display device according to one embodiment of the present disclosure includes an image display device including a plurality of pixels and set to display an image, and a dimming image display unit including a plurality of dimming pixels, and a dimming device set to switch the transmittance of each dimming pixel of the dimming image display unit, and a control circuit set to switch the transmittance of the dimming pixel of a corresponding area of ​​the dimming image display unit corresponding to an object area in the image to a low transmittance, wherein the dimming pixel includes an electrochromic element and a pixel circuit, and the pixel circuit includes a driving circuit electrically connected to one electrode of the electrochromic element and applying a driving voltage to the electrode according to a voltage input to the pixel circuit, a switching transistor applying the voltage to the driving circuit according to a scan signal input to the pixel circuit, and a capacitive element electrically connected to the input of the driving circuit and maintaining the voltage output to the driving circuit, and the driving circuit includes a circuit related to a transistor having an enhancement characteristic (e.g., an enhancement type MOSFET, having a gate-source relationship) It may include a CMOS circuit using a transistor that has the characteristic of being OFF when the voltage (Vgs) is 0 V and that the drain current (Ids) does not flow.

[0008] According to various embodiments of the present disclosure, a display device can be provided that can improve image quality deterioration caused by operational instability of an electrochromic element when a driving voltage to the electrochromic element is switched by the driving circuit, based on including a driving circuit that is electrically connected to one electrode of an electrochromic element and outputs a driving voltage to a corresponding electrode of the electrochromic element according to a signal voltage input to the driving circuit.

[0009] Figure 1a is an exemplary drawing showing the configuration of an electrochromic device.

[0010] Figure 1b is an exemplary drawing showing the configuration of an electrochromic device.

[0011] Figure 1c is an exemplary drawing showing the configuration of an electrochromic device.

[0012] Figure 2 is an exemplary drawing showing the configuration of a dimming image display device (including a dimming image display unit).

[0013] Fig. 3 is an exemplary drawing showing the configuration of a dimming image display device (including a dimming image display unit).

[0014] Figure 4 is a block diagram showing the hardware configuration of the display device.

[0015] Figure 5 is a perspective view showing the positional relationship between the image display unit of the image display device and the image display unit of the image display device.

[0016] Figure 6 is a block diagram showing the hardware configuration of the control unit of the display device.

[0017] Figure 7 is an explanatory diagram to explain an example of a situation in which a display device is used.

[0018] Figure 8 is an explanatory diagram to explain another example of a situation in which the display device is used.

[0019] Figure 9a is an explanatory diagram of a comparative example for explaining the through-current flowing in a CMOS circuit using a TFT having a depression characteristic.

[0020] Figure 9b is an explanatory diagram of a comparative example for explaining the through-current flowing in a CMOS circuit using a TFT having a depression characteristic.

[0021] Figure 9c is an explanatory diagram of a comparative example for explaining the through-current flowing in a CMOS circuit using a TFT having a depression characteristic.

[0022] Figure 10 is a diagram showing the transfer characteristics of PMOS and NMOS of the CMOS circuit of the driving circuit.

[0023] Figure 11 is a diagram showing the through current that occurs when the signal voltage input to the driving circuit is switched.

[0024] Figure 12a is a diagram showing a light-emitting pixel circuit.

[0025] Figure 12b is a diagram showing a timing chart of an operation of writing a signal voltage to a light-emitting pixel.

[0026] Fig. 12C is a diagram showing the state of the electrochromic element of the light-emitting pixel in which the signal voltage is written in the timing chart of Fig. 12B.

[0027] Figure 13 is a drawing showing a flow chart for the operation of the display device.

[0028] Figure 14a is a diagram showing a light-emitting pixel circuit.

[0029] Figure 14b is a diagram showing a timing chart of an operation of writing a signal voltage to a light-emitting pixel.

[0030] Fig. 14c is a diagram showing the state of the electrochromic element of the light-emitting pixel in which the signal voltage is written in the timing chart of Fig. 14b.

[0031] Figure 15 is a flowchart showing the operation of a light-emitting image display device.

[0032] Figure 16a is a diagram showing a light-emitting pixel circuit.

[0033] Figure 16b is a diagram showing a timing chart of an operation of writing a signal voltage to a light-emitting pixel.

[0034] Figure 16c is an explanatory diagram explaining the order of each row in which the signal voltage and reset voltage are written to the light-emitting pixels.

[0035] Figure 17 is a flowchart showing the operation of a lighting image display device.

[0036] Figure 18a is a diagram showing a light control pixel circuit.

[0037] Figure 18b is a diagram showing a timing chart of an operation of writing a signal voltage to a light-emitting pixel.

[0038] Fig. 18c is a diagram showing the state of the electrochromic element of each light-emitting pixel before and after the signal voltage is written in the timing chart of Fig. 12a.

[0039] Figure 19 is a flowchart showing the operation of a lighting image display device.

[0040] Hereinafter, based on the drawings, a light-emitting pixel circuit for driving an electrochromic element, a display device, a control method for the display device, and a control program for the display device will be described in detail. The described embodiments are merely exemplary, and various modifications are possible from these embodiments. Hereinafter, in the drawings, the same reference numerals denote the same components, and the sizes of each component in the drawings are exaggerated for clarity and convenience of explanation.

[0041] Hereinafter, the expression “upper” or “upper” includes not only things that are directly above / below / left / right in contact, but also things that are directly above / below / left / right in non-contact.

[0042] Terms like "first" and "second" are used to describe various components, but are used to distinguish one component from another. These terms do not specify whether the components are of different materials or structures.

[0043] Singular expressions include plural expressions unless the context clearly indicates otherwise. Furthermore, when a part is said to "include" a component, this does not exclude other components, but rather may additionally include other components, unless the contrary is specifically stated.

[0044] Additionally, terms such as “unit” and “module” described in this specification mean a unit that processes one or more functions and operations, which are implemented by hardware or software, or by a combination of hardware and software.

[0045] (First embodiment)

[0046] Electrochromic element (110)

[0047] Figures 1a to 1c are drawings showing the configuration of an electrochromic element (110). Figure 1a shows the state of the electrochromic element (110) when no voltage is applied. Figure 1b shows the state of the electrochromic element (110) in a light-shielding state. Figure 1c shows the state of the electrochromic element (110) in a transparent state (light-transmitting state).

[0048] According to one embodiment of the present disclosure, an electrochromic element (110) may include a first substrate (10), a first electrode (20) (e.g., an anode) formed on the first substrate (10), a second substrate (50), and a second electrode (40) (e.g., a cathode) formed on the second substrate (50). According to one embodiment of the present disclosure, the electrochromic element (110) may include an electrolyte layer (30) sealed between the opposing first electrode (20) and second electrode (40). According to one embodiment of the present disclosure, the electrolyte layer (30) may include an electrochromic material. According to one embodiment of the present disclosure, the electrochromic element (110) is installed between the first substrate (10) and the second substrate (50), and may include a bank material (60) for sealing the electrolyte layer (30) for each light-emitting pixel (100) (see FIG. 2, etc.). However, according to one embodiment of the present disclosure, the bank material (60) may not be provided.

[0049] According to one embodiment of the present disclosure, the first substrate (10) and the second substrate (50) may include an insulating substrate having light-transmitting properties. According to one embodiment of the present disclosure, the first substrate (10) and the second substrate may be composed of, for example, glass or resin.

[0050] According to one embodiment of the present disclosure, the first electrode (20) and the second electrode (40) may include a transparent electrode film having light-transmitting properties. According to one embodiment of the present disclosure, the transparent electrode film may be configured to include, for example, at least one of ITO (Indium Tin Oxide), IZO (Indium Zinc Oxide), SnO2, and ZnO.

[0051] According to one embodiment of the present disclosure, the electrolyte layer (30) may be configured to include an electrolyte, an electrochromic material, a mediator (e.g., a medium), and a solvent. According to one embodiment of the present disclosure, the electrolyte included in the electrolyte layer (30) may have a function of promoting oxidation and reduction of the electrochromic material. According to one embodiment of the present disclosure, the electrolyte may include a supporting electrolyte (e.g., an electrolyte that is not electrolyzed but is added to a solution to increase the electrical conductivity of the solution). According to one embodiment of the present disclosure, the electrolyte may include, for example, a lithium salt, a potassium salt, a sodium salt, and the like. According to one embodiment of the present disclosure, the lithium salt may include, for example, lithium chloride (LiCl), lithium bromide (LiBr), lithium iodide (LiI), lithium tetrafluoroborate (LiBF4), and lithium perchlorate (LiClO4). According to one embodiment of the present disclosure, the potassium salt may include potassium chloride (KCl), potassium bromide (KBr), potassium iodide (KI), and the like. According to one embodiment of the present disclosure, the sodium salt may include sodium chloride (NaCl), sodium bromide (NaBr), sodium iodide (NaI), and the like. The electrolyte may include bromine, for example, tetrabutyl ammonium bromide (TBABr), and the like.

[0052] According to one embodiment of the present disclosure, the electrochromic material may include a substance that causes an electrochemical redox reaction. According to one embodiment of the present disclosure, the electrochromic material may cause deposition on an electrode surface and dissolution into an electrolyte layer (30) through electrochemical oxidation and reduction reactions. According to one embodiment of the present disclosure, the electrochromic material may include one or more metal elements selected from the group consisting of silver (Ag), bismuth (Bi), chromium (Cr), iron (Fe), cadmium (Cd), cobalt (Co), nickel (Ni), tin (Sn), lead (Pb), and copper (Cu).

[0053] According to one embodiment of the present disclosure, the mediator may include a material capable of performing redox electrochemical reactions with lower energy than the electrochromic material. For example, the oxidizing agent of the mediator may promote dissolution of the electrochromic material into the electrolyte layer (30) by donating and receiving electrons from the electrochromic material, such as silver. For example, a salt of copper (II) ion may be used as the mediator, and specifically, copper chloride (CuCl2), copper sulfate (CuSO4), or copper bromide (CuBr2) may be used.

[0054] According to one embodiment of the present disclosure, the solvent can dissolve the electrolyte, the electrochromic material, and the mediator, and stably maintain them. According to one embodiment of the present disclosure, the solvent may be, for example, a polar solvent, an organic solvent, an ionic liquid, an ion-conductive polymer, a polymer electrolyte, and the like. The solvent may be, for example, DMSO (Dimethyl sulfoxide), propylene carbonate, N,N-dimethylformamide, tetrahydrofuran, acetonitrile, polyvinyl sulfate, polystyrene sulfonic acid, or polyacrylic acid.

[0055] Additionally, a sealing material (e.g., a sealing material) (not shown) may be arranged in a frame shape along the periphery of the first substrate (10) and the second substrate (50). An electrolyte layer (30) may be filled in the space surrounded by the first substrate (10), the second substrate (50), and the sealing material. The sealing material may include, for example, an ultraviolet-curable resin or a thermosetting resin.

[0056] As illustrated in FIG. 1a, when no voltage is applied between the first electrode (20) and the second electrode (40), an electrochromic material including metal ions (m+) such as silver ions may be dissolved in the electrolyte layer (30).

[0057] As illustrated in FIG. 1b, when a voltage is applied between the first electrode (20) and the second electrode (40) so that the first electrode (20) becomes an anode, the metal ions (m+) in the electrolyte layer (30) are reduced, and a metal (m), such as silver, for example, may be deposited on the surface of the second electrode (40). At this time, the light transmittance of the electrochromic element (110) may be reduced to about 1%. That is, the electrochromic element (110) may be in a light-shielding state. In the light-shielding state, the deposited metal (m) may reflect visible light, forming a mirror surface on the surface of the second electrode (40).

[0058] As illustrated in Fig. 1c, when a voltage is applied between the first electrode (20) and the second electrode (40) so that the first electrode (20) becomes a cathode, the metal (m) deposited on the surface of the second electrode (40) can be oxidized to become a metal ion (m+). At this time, the light transmittance of the electrochromic element (110) can increase to about 75%. That is, the electrochromic element (110) can become transparent.

[0059] Hereinafter, the state of the electrochromic element (110), including the light-blocking state and the transparent state, may also be simply referred to as “the state of the electrochromic element (110).”

[0060] <Dimmer image display device (1)>

[0061] FIG. 2 and FIG. 3 are drawings showing the configuration of a dimming image display device (1). The dimming image display device (1) may include a plurality of dimming pixels (100) arranged at substantially equal intervals in the row direction and the column direction. As shown in FIG. 2, the dimming pixel (100) may include an electrochromic element (110) and a dimming pixel circuit (70). According to one embodiment of the present disclosure, the dimming pixel circuit (70) may include a driving circuit (120), a capacitive element (130), and a switching transistor (140). According to one embodiment of the present disclosure, the driving circuit (120), the capacitive element (130), and the switching transistor (140) may be formed on a semiconductor substrate (not shown) as a circuit pattern using, for example, a general semiconductor process. According to one embodiment of the present disclosure, the semiconductor substrate may be mounted on a light-transmitting substrate (not shown) together with the electrochromic element (110).

[0062] According to one embodiment of the present disclosure, an image displayed by a plurality of light-emitting pixels (100) may be referred to as a light-emitting image (7) (see FIG. 7, etc.).

[0063] According to one embodiment of the present disclosure, the electrochromic element (110) may be expressed as an equivalent circuit in which a capacitive element and a resistive element are connected in parallel.

[0064] According to one embodiment of the present disclosure, the driving circuit (120) may include a CMOS circuit. According to one embodiment of the present disclosure, an output terminal of the driving circuit (120) may be electrically connected to a first electrode (20), which is one electrode of the electrochromic element (110). According to one embodiment of the present disclosure, a second electrode (40), which is another electrode of the electrochromic element (110), may be connected to a ground line (GND), and a ground potential (Vss) may be applied thereto. According to one embodiment of the present disclosure, an input terminal of the driving circuit (120) may be electrically connected to an output terminal of a switching transistor (140), and may be connected to a signal line to which a dimming signal voltage (Vsig) is supplied through the switching transistor (140). According to one embodiment of the present disclosure, the driving circuit (120) is connected to a first power line and a second power line, and a first power voltage (Vcc1) can be supplied from the first power line, and a second power voltage (Vcc2) can be supplied from the second power line.

[0065] According to one embodiment of the present disclosure, the switching transistor (140) may include at least one MOS (e.g., NMOS (n-channel MOS transistor)), and a drain electrode may be connected to a signal line, a source electrode may be connected to an input terminal of the driving circuit (120), and a gate electrode may be connected to a scan signal line. In addition, according to one embodiment of the present disclosure, a capacitive element (130) may be connected between the input terminal of the driving circuit (120) and the source electrode of the switching transistor (140). According to one embodiment of the present disclosure, the switching transistor (140) may output a dimming signal voltage (Vsig) supplied from the signal line to the drain electrode toward the input terminal of the driving circuit (120) according to a scan signal (Vscan) input to the gate electrode. At this time, the dimming signal voltage (Vsig) output to the input of the driving circuit (120) may be maintained by the capacitive element (130). According to one embodiment of the present disclosure, when a dimming signal voltage (Vsig) is input, the driving circuit (120) can output a driving voltage toward the first electrode (20) of the electrochromic element (110) according to the input dimming signal voltage (Vsig). For example, the driving circuit (120) can output a first power supply voltage (Vcc1) or a second power supply voltage (Vcc2) as the driving voltage toward the first electrode (20) of the electrochromic element (110) according to the dimming signal voltage (Vsig).

[0066] According to one embodiment of the present disclosure, the first power supply voltage (Vcc1) may be, for example, +4 V. According to one embodiment of the present disclosure, the second power supply voltage (Vcc2) may be, for example, -4 V. According to one embodiment of the present disclosure, the scan signal (Vscan) may include a pulse voltage having a High of +10 V and a Low of -13 V. According to one embodiment of the present disclosure, the dimming signal voltage (Vsig) may include a pulse voltage having a High of +10 V and a Low of -10 V.

[0067] According to one embodiment of the present disclosure, when a first power supply voltage (Vcc1) is output as a high driving voltage to a first electrode (20) of an electrochromic element (110), the electrochromic element (110) can be in a light-blocking state. According to one embodiment of the present disclosure, when a second power supply voltage (Vcc2) is output as a low driving voltage to a first electrode (20) of an electrochromic element (110), the electrochromic element (110) can be in a transparent state.

[0068] According to one embodiment of the present disclosure, a scan signal line supplying a scan signal (Vscan) may be provided for each row. For example, the same scan signal line may be connected to all the illumination pixels (100) of one row (e.g., the illumination pixels (111) and (112), etc.), and a different scan signal line may be connected to all the illumination pixels (100) of another row (e.g., the illumination pixels (121) and (122), etc.). According to one embodiment of the present disclosure, substantially the same scan signal (Vscan) may be provided to the illumination pixels (100) of the same row. According to one embodiment of the present disclosure, a signal line supplying a illumination signal voltage (Vsig) may be provided for each column. For example, the same signal line may be connected to all the dimming pixels (e.g., the dimming pixels (111) and (121)) in one column, and different signal lines may be connected to all the dimming pixels (e.g., the dimming pixels (121) and (122)) in another column. According to one embodiment of the present disclosure, the same dimming signal voltage (Vsig) may be provided to the dimming pixels (100) in the same column. According to one embodiment of the present disclosure, the dimming signal voltage (Vsig) may include a signal in which a voltage for writing to each dimming pixel (100) is time-division multiplexed in synchronization with the scan signal (Vscan). Accordingly, the dimming signal voltage (Vsig) may be applied to each dimming pixel (100) in each row. For example, a dimming signal voltage (Vsig) corresponding to a frame of one dimming image can be applied to the dimming pixel (100) for each row (e.g., maintained by a capacitive element (130)).

[0069] As illustrated in FIG. 3, the dimming image display device (1) may include a control unit (1000), a dimming signal driving circuit unit (2000) (column driver), and a scan signal driving circuit unit (3000) (row driver). According to one embodiment of the present disclosure, the control unit (1000) is configured to include a CPU, a memory, a storage, and a power circuit, and may control the dimming signal driving circuit unit (2000) and the scan signal driving circuit unit (3000). According to one embodiment of the present disclosure, the control unit (1000) may include a computer. According to one embodiment of the present disclosure, the dimming scan signal (Vscan) may be supplied or output to each dimming pixel (100) through a wire by the scan signal driving circuit unit (3000). According to one embodiment of the present disclosure, the dimming signal voltage (Vsig) may be supplied or output to each dimming pixel (100) through a wire by the dimming signal driving circuit unit (2000). According to one embodiment of the present disclosure, a first power supply voltage (Vcc1), a second power supply voltage (Vcc2), and a ground potential (Vss) may be generated, for example, by a control unit (1000) and supplied to each dimming pixel (100) through wiring. In addition, the first power supply voltage (Vcc1), the second power supply voltage (Vcc2), and a ground potential (Vss) may be supplied or output to each dimming pixel (100) through wiring via a dimming signal driving circuit unit (2000) or a scan signal driving circuit unit (3000). According to one embodiment of the present disclosure, a plurality of dimming pixels (100) included in a dimming image display device (1) may constitute a dimming image display unit (4000) (see FIG. 4).

[0070] <Display device (5)>

[0071] Fig. 4 is a block diagram showing the hardware configuration of a display device (5) including a dimming image display device (1) and an image display device (2). Fig. 5 is a perspective view showing the positional relationship between the dimming image display unit (4000) of the dimming image display device (1) and the image display unit (7000) of the image display device (2). Fig. 6 is a block diagram showing the hardware configuration of the control unit (1000) of the display device (5).

[0072] According to one embodiment of the present disclosure, a display device (5) includes a dimming image display device (1) and an image display device (2). The dimming image display device (1) has a dimming image display unit (4000) including a plurality of dimming pixels (100). The image display device (2) includes an image display unit (7000), an image signal driving circuit unit (5000), an image scanning signal driving circuit unit (6000), and a control unit (1000). In addition, the dimming image display device (1) and the image display device (2) may share one control unit (1000).

[0073] <Control Unit (1000)>

[0074] According to one embodiment of the present disclosure, the control unit (1000) may include a CPU (Central Processing Unit) (1001), a ROM (Read Only Memory) (1002), a RAM (Random Access Memory) (1003), storage (1004), a communication interface (1005), a power circuit (1006), and a signal generation unit (1007). Each component may be interconnected via a bus.

[0075] The CPU (1001) controls each component of the display device (5) and performs various operation processing according to the program recorded in the ROM (1002) and storage (1004). The details of the function of the CPU (1001) will be described later.

[0076] According to one embodiment of the present disclosure, ROM (1002) can store various programs and various data.

[0077] According to one embodiment of the present disclosure, RAM (1003) can temporarily store programs or data as a work area.

[0078] According to one embodiment of the present disclosure, storage (1004) is configured as a solid state drive (SDD) or the like, and can store various programs including an operating system and various data.

[0079] According to one embodiment of the present disclosure, the communication interface (1005) may include an interface for communicating with another device. As the communication interface (1005), a communication interface conforming to various wired or wireless standards may be used.

[0080] According to one embodiment of the present disclosure, the power circuit (1006) can generate and output a power voltage (a first power voltage (Vcc1), a second power voltage (Vcc2), etc.). According to one embodiment of the present disclosure, for example, a BGR (Bandgap Reference) circuit can be used in the power circuit.

[0081] According to one embodiment of the present disclosure, the signal generation unit (1007) generates and outputs an image signal, an image scan signal, a dimming signal, and a dimming scan signal. The image signal and the image scan signal may include a signal for causing the image display unit (7000) to display an image (9). According to one embodiment of the present disclosure, the signal generation unit (1007) may generate the image signal and the image scan signal based on image data under the control of the CPU (1001). The image signal and the image scan signal may include a signal for causing the image display unit (7000) to display an image (9). According to one embodiment of the present disclosure, the signal generation unit (1007) may generate the dimming signal and the dimming scan signal based on dimming data under the control of the CPU (1001). According to one embodiment of the present disclosure, the dimming signal and the dimming scan signal may include a signal for causing the dimming image display unit (4000) to display a dimming image (7). According to one embodiment of the present disclosure, image data and dimming data may be received from an external device (not shown) via a communication interface (1005). According to one embodiment of the present disclosure, the image data may include data corresponding to an image (9). For example, the image data may include data defining the color of each pixel (7001) for each frame of the image (9). According to one embodiment of the present disclosure, the dimming data may include data corresponding to a dimming image (7). For example, the dimming data may include data defining a light-blocking state or a transparent state for each dimming pixel (100) for each frame of the dimming image (7).

[0082] According to one embodiment of the present disclosure, the image signal driving circuit unit (5000) can generate an image signal voltage (Vi) based on an image signal output from the control unit (1000) and output the image signal voltage to the image display unit (7000). According to one embodiment of the present disclosure, the image scanning signal driving circuit unit (6000) can generate an image scanning signal voltage (Vsi) based on an image scanning signal output from the control unit (1000) and output the image scanning signal voltage to the image display unit (7000).

[0083] According to one embodiment of the present disclosure, the image display unit (7000) includes a plurality of pixels (7001), and can display an image (9) (see FIG. 7, etc.) by the plurality of pixels (7001).

[0084] According to one embodiment of the present disclosure, the dimming signal driving circuit unit (2000) can generate a dimming signal voltage (Vsig) based on a dimming signal output from the control unit (1000) and output it to the dimming image display unit (4000). According to one embodiment of the present disclosure, the dimming scan signal driving circuit unit (3000) can generate a dimming scan signal voltage (Vscan) based on a dimming scan signal output from the control unit (1000) and output it to the dimming image display unit (4000).

[0085] According to one embodiment of the present disclosure, the dimming image display unit (4000) can display a dimming image (7) by a plurality of dimming pixels (100).

[0086] For example, the control unit (1000) may generate a first power voltage (Vcc1) and a second power voltage (Vcc2) and various power voltages for a dimming scan signal or a dimming signal by the power circuit, and supply various signals to the dimming image display unit (4000) through the dimming signal driving circuit unit (2000) or the dimming scan signal driving circuit unit (3000). According to one embodiment of the present disclosure, the control unit (1000) may supply various signals to the image display unit (7000) through the image signal driving circuit unit (5000) or the image scanning signal driving circuit unit (6000) using the power voltage generated by the power circuit.

[0087] According to one embodiment of the present disclosure, the dimming image display unit (4000) and the image display unit (7000) have the same size, and can be arranged so that the image (9) and the dimming image (7) overlap each other when viewed in a common vertical line direction (arrow direction in FIG. 5) that is a common vertical line direction of both from the dimming image display unit (4000) to the image display unit (7000). That is, the dimming image display unit (4000) and the image display unit (7000) can be arranged so that two vertical lines passing through their respective centers overlap each other. Accordingly, when viewed in the common vertical line direction, the dimming image (7) is arranged in the background of the image (9), so that the background of the pixel (100) in the image (9), which corresponds to the pixel (100) in the transparent state of the dimming image (7), becomes transparent. Meanwhile, the background of the pixel (100) in the image (9), corresponding to the pixel (100) in the shaded state of the light image (7), becomes opaque.

[0088] According to one embodiment of the present disclosure, each pixel (7001) of the image display unit (7000) may include a red light-emitting element, a green light-emitting element, and a blue light-emitting element. Accordingly, the image display unit (7000) may display a color image (9).

[0089] According to one embodiment of the present disclosure, the CPU (1001) can block the light-emitting pixels (100) of the area (hereinafter, referred to as “corresponding area (199)”) of the light-emitting image display unit (4000) corresponding to the object area (99) (see FIG. 7, etc.) of the image (9), and can make the area of ​​the light-emitting image display unit (4000) other than the corresponding area transparent. That is, the CPU (1001) can switch the transmittance of the light-emitting pixels (100) of the corresponding area (199) to low transmittance (e.g., second transmittance), and switch the transmittance of the area of ​​the light-emitting pixels (100) other than the corresponding area (199) to high transmittance (e.g., first transmittance). The object area (99) can be arbitrarily set as an area where the background will be blocking. For example, the object area (99) is an area of ​​a still image and an area where specific information or a drawing is displayed.

[0090] Fig. 7 is an explanatory diagram illustrating an example of a situation in which a display device (5) is used. The example of Fig. 7 exemplifies an embodiment in which a display device (5) is used on a guidance screen at a hotel front desk. In Fig. 7, a light-emitting pixel (100) in a light-blocking state is represented in black, and a light-emitting pixel (100) in a transparent state is represented in white.

[0091] In Fig. 7, an area of ​​a still image in which a guide or map is displayed among images (9) is set as an object area (99), and a light-emitting pixel (100) of a corresponding area (199) of a light-emitting image display unit (4000) corresponding to the object area (99) can be in a light-blocking state.

[0092] According to one embodiment of the present disclosure, information on an object area (99) may be included in the illumination data. For example, the illumination data may include data defining a light-blocking state or a transparent state for each light-blocking pixel (100) for each frame of the illumination image (7). Accordingly, a light-blocking pixel (100) defined as a light-blocking state may correspond to an object area (99). The CPU (1001) may set the object area (99) based on the illumination data.

[0093] According to one embodiment of the present disclosure, the CPU (1001) may detect an object area (99) based on the image (9). In this case, the illumination data becomes unnecessary. According to one embodiment of the present disclosure, the CPU (1001) may detect and set an area of ​​a still image detected by, for example, a time difference method or a background difference method as an object area (99). According to one embodiment of the present disclosure, the CPU (1001) may detect and set an area of ​​a still image in the image (9) as an object area (99) by using a learning-completed model of a neural network that has been trained to detect an area of ​​a still image in the image (9) from the image (9).

[0094] According to one embodiment of the present disclosure, the CPU (1001) can determine whether to set the object area (99) to a light-blocking state (low transmittance). According to one embodiment of the present disclosure, the CPU (1001) can determine whether to set the object area (99) to a light-blocking state, for example, based on an instruction from a user. According to one embodiment of the present disclosure, if the CPU (1001) determines that the object area (99) is to be light-blocked, it can set the light-control pixels (100) of the corresponding area (199) to a light-blocking state. According to one embodiment of the present disclosure, if the CPU (1001) determines that the object area is not to be light-blocked, it can set all the light-control pixels (100) of the light-control image display unit (400) to a transparent state.

[0095] Fig. 8 is an explanatory diagram illustrating another example of a situation in which a display device (5) is used. The example of Fig. 8 exemplifies an embodiment in which a display device (5) is used on a navigation screen positioned in front of a vehicle's windshield. In Fig. 8, a transparent illumination pixel (100) is displayed in white.

[0096] In Fig. 8, since it is determined by the CPU (1001) that the object area (99) is not to be shaded, all of the light-emitting pixels (100), including the light-emitting pixels (100) of the corresponding area (199) corresponding to the object area (99) of the still image in which road traffic information or a map appears in the image (9), are in a transparent state.

[0097] In the present embodiment, a TFT (Thin Film Transistor) having enhancement characteristics may be used in the CMOS circuit of the driving circuit (120). For example, the CMOS circuit of the driving circuit (120) may include a PMOS (p-channel MOS transistor) and an NMOS (n-channel MOS transistor) having enhancement characteristics. The electrochromic element (110) according to one embodiment of the present document may include a current-driven element (e.g., an element to which current must be applied in order to switch between a transparent state (ON state) and a light-blocking state (OFF state)). Therefore, a PMOS (e.g., a p-channel MOS transistor) and an NMOS (e.g., an n-channel MOS transistor) may be required for polarity inversion of the electrochromic element (110).

[0098] According to various embodiments of the present document, when the driving circuit (120) switches the driving voltage (e.g., when changing from a first transmittance to a second transmittance), it is possible to suppress a through current that may flow in the CMOS circuit of the driving circuit (120). In addition, it is possible to prevent the operation (110) of the electrochromic element (110) from becoming unstable due to this uncontrolled through current flowing into the electrochromic element (110).

[0099] FIGS. 9A to 9C are explanatory diagrams of comparative examples for explaining the through current flowing in a CMOS circuit using a TFT having a depression characteristic (e.g., a circuit related to a depression type MOSFET).

[0100] Fig. 9a shows the transfer characteristics of a PMOS and NMOS having depression characteristics. Fig. 9b shows the through current flowing in a CMOS circuit using a TFT having depression characteristics. Fig. 9c shows the through current flowing in an electrochromic element (110) connected to a CMOS circuit. As shown in Fig. 9a, the PMOS and NMOS having depression characteristics do not turn off when the gate-source voltage (Vgs) is 0 V, and the drain current (Ids) flows. Therefore, when the input to the CMOS circuit switches from High to Low, both the PMOS and NMOS cause current to flow (e.g., turn on) near their respective gate threshold voltages (Vth_p, Vth_n) and cause the drain current (Ids) to flow. This causes the through current indicated by the arrow in Fig. 9b to occur. As shown in Fig. 9c, when an electrochromic element (110) is connected to a CMOS circuit, an uncontrolled through current indicated by an arrow flows into the electrochromic element (110), making the operation of the electrochromic element (110) unstable.

[0101] Fig. 10 is a diagram showing the transfer characteristics of the PMOS and NMOS of the CMOS circuit of the driving circuit (120) of the present embodiment. As shown in Fig. 10, the PMOS and NMOS having the enhancement characteristic are turned off when the gate-source voltage (Vgs) is 0 V, and the drain current (Ids) does not flow. Therefore, when the input to the driving circuit (120) switches from High to Low, both the PMOS and NMOS are turned off, and the drain current (Ids) does not flow. For example, the CMOS circuit of the driving circuit (120) becomes high resistance in a region where the input driving voltage (corresponding to Vgs) becomes a value between the gate threshold voltage (Vth_p) of the PMOS and the gate threshold voltage (Vth_n) of the NMOS. Therefore, even if the dimming signal voltage (Vsig) input to the driving circuit (120) switches, the generation of a through current can be suppressed.

[0102] Fig. 11 is a diagram showing the penetration current that occurs when the dimming signal voltage (Vsig) input to the driving circuit (120) is switched. In Fig. 11, the dashed line represents the penetration current that flows in the CMOS circuit of the comparative example. The solid line represents the penetration current that flows in the CMOS circuit of the driving circuit (120) of the present embodiment. Since the CMOS circuit of the comparative example is composed of PMOS and NMOS having depression characteristics, a relatively large penetration current is generated, and the penetration current flows into the electrochromic element (110), thereby making the operation of the electrochromic element (110) unstable. On the other hand, since the CMOS circuit of the driving circuit (120) of the present embodiment is composed of PMOS and NMOS having enhancement characteristics, the penetration current can be suppressed.

[0103] The dimming image display device (1) displays a dimming image by turning the electrochromic element (110) of each dimming pixel into a light-blocking state or a transparent state for each frame of the dimming image based on dimming image data.

[0104] <Application operation of the dimming signal voltage (Vsig) to the dimming pixel (100)>

[0105] An operation of applying a dimming signal voltage (Vsig) to a dimming pixel (100) is described.

[0106] Fig. 12a is a diagram showing a light-emitting pixel circuit (70) of a light-emitting pixel (100). In Fig. 12a, an electrochromic element (110) is also shown. Fig. 12b is a diagram showing a timing chart of an application operation of a light-emitting signal voltage (Vsig) to the light-emitting pixel (100). Fig. 12c is a diagram showing the state of the electrochromic element (110) of the light-emitting pixel (100) in which the light-emitting signal voltage (Vsig) is written in the timing chart of Fig. 12b. In Fig. 12c, a light-blocking state is represented by black, and a transparent state is represented by white.

[0107] In Fig. 12b, a timing chart for writing a dimming signal voltage (Vsig) to each of three arbitrary dimming pixels (100) arranged in the column direction is illustrated. n, n + 1, and n + 2 represent row numbers. Hereinafter, for the sake of simplicity, the description will focus on the operation of writing a dimming signal voltage (Vsig) to the dimming pixels (100) of row numbers n, n + 1, and n + 2 in an arbitrary column.

[0108] As described above, the scan signal line supplying the scan signal (Vscan) is installed for each row. Therefore, the dimming signal voltage (Vsig) is written to the dimming pixel (100) for each row. When the scan signal is High (+10 V), the switching transistor (140) is conducted, and the dimming signal voltage (Vsig) is maintained in the capacitor element (130), so that the dimming signal voltage (Vsig) is written to the dimming pixel (100). In the example of Fig. 12B, the dimming signal voltage (Vsig) is written to the dimming pixel (100) in the order of row n, row n + 1, and row n + 2. The scan signal (Vscan) for writing the dimming signal voltage (Vsig) to the dimming pixel (100) of row n is indicated as Vscan_n. The scan signal (Vscan) for writing the dimming signal voltage (Vsig) to the dimming pixel (100) of the n + 1 row is indicated as Vscan_n + 1. The scan signal (Vscan) for writing the dimming signal voltage (Vsig) to the dimming pixel (100) of the n + 2 row is indicated as Vscan_n + 2.

[0109] The dimming signal voltage (Vsig) for writing to each dimming pixel (100) is time-division multiplexed. In the example of Fig. 12B, the dimming signal voltage (Vsig(+10V)) for turning the dimming pixels (100) of the nth row into a dark state, the dimming signal voltage (Vsig(-10V)) for turning the dimming pixels (100) of the n+1 row into a transparent state, and the dimming signal voltage (Vsig(+10V)) for turning the dimming pixels (100) of the n+2 row into a dark state are illustrated as a dimming signal voltage (Vsig) that is time-division multiplexed.

[0110] At the timing when the switching transistors (140) of each row are sequentially turned on by the scan signal (Vscan), the dimming signal voltage (Vsig) is sequentially written to the dimming pixels (100) of each row. As a result, the dimming signal voltage (Vsig) is maintained in the capacitor element (130), so that nodeA becomes a voltage corresponding to the dimming signal voltage (Vsig). Specifically, when the dimming signal voltage (Vsig) for turning the electrochromic element (110) of the dimming pixel (100) into a light-blocking state is written, nodeA becomes +10 V. When the dimming signal voltage (Vsig) for turning the electrochromic element (110) of the dimming pixel (100) into a transparent state is written, nodeA becomes -10 V.

[0111] NodeB of the n-row light-emitting pixel (100) is written with a light-emitting signal voltage (Vsig (+10 V)) to block the electrochromic element (110) of the n-row light-emitting pixel (100), thereby becoming a driving voltage (+4 V) output by the driving circuit (120) according to the light-emitting signal voltage (Vsig). In addition, Fig. 12B also shows the voltage of nodeC, which is a ground potential (Vss). NodeB of the light-emitting pixel (100) of the n + 1 row becomes a driving voltage (-4 V) output by the driving circuit (120) according to the light-emitting signal voltage (Vsig) by writing a light-emitting signal voltage (Vsig (-10 V)) for making the electrochromic element (110) of the light-emitting pixel (100) of the n + 1 row transparent. NodeB of the light-emitting pixel (100) of the n + 2 row becomes a driving voltage (+4 V) output by the driving circuit (120) according to the light-emitting signal voltage (Vsig) by writing a light-emitting signal voltage (Vsig (+10 V)) for making the light-emitting pixel (100) of the n + 2 row darkened.

[0112] Depending on the driving voltage (voltage of node B), the state of the electrochromic element (110) of each light-emitting pixel (100) is switched. In Fig. 12B, when the state of the electrochromic element (110) is switched, the current (I) flowing in the electrochromic element (110) EC ) is shown.

[0113] As illustrated in FIG. 12c, when a scan signal (Vscan_n) is input to the n-row light-emitting pixel (100) and the light-emitting signal voltage (Vsig) is written, the electrochromic element (110) of the n-row light-emitting pixel (100) is turned into a light-blocking state. When a scan signal (Vscan_n+1) is input to the n+1-row light-emitting pixel (100) and the light-emitting signal voltage (Vsig) is written, the electrochromic element (110) of the n+1-row light-emitting pixel (100) is turned into a transparent state. When a scan signal (Vscan_n+2) is input to the n+2-row light-emitting pixel (100) and the light-emitting signal voltage (Vsig) is written, the electrochromic element (110) of the n+2-row light-emitting pixel (100) is turned into a light-blocking state.

[0114] Fig. 13 is a drawing showing a flowchart of the operation of the display device (5). This flowchart can be executed by the CPU (1001) based on a program.

[0115] The CPU (1001) determines whether there is input of dimming data (S1). That is, the CPU (1001) determines whether dimming data has been input via the communication interface (1005).

[0116] When the CPU (1001) determines that there is input of dimming data (S1: YES), it generates a dimming signal and a dimming scan signal based on the dimming data (S2).

[0117] If the CPU (1001) determines that there is no input of dimming data (S1: NO), it stores n frames of image data in the storage (1004) (S3). n can be set according to the response speed of the electrochromic element. For example, the CPU (1001) stores image data every 10 frames. The control unit (1000) can store n frames of image data and sequentially update the stored image data with new image data.

[0118] The CPU (1001) determines whether there is an object area (99) in the image (9) based on the image data of n frames (S4). If the CPU (1001) determines that there is no object area (99) (S4: NO), it generates a dimming signal that sets all of the dimming pixels (100) to a transparent state (S5). In step S5, a dimming signal that sets all of the dimming pixels (100) to a light-blocking state may be generated.

[0119] If the CPU (1001) determines that there is an object area (99) in the image (9) (S4: YES), the CPU (1001) determines whether to block the corresponding area (199) corresponding to the object area (99) (S6). If the CPU (1001) determines that the corresponding area (199) corresponding to the object area (99) is not to be blocked (S6: NO), the CPU (1001) generates a dimming signal that sets all of the dimming pixels (100) to a transparent state (S5). As described above, in step S5, the dimming signal that sets all of the dimming pixels (100) to a block state may be generated.

[0120] When the CPU (1001) determines that the corresponding area (199) corresponding to the object area (99) is in a shaded state (S6: YES), it generates a dimming signal that sets the dimming pixel (100) of the corresponding area (199) corresponding to the object area (99) to a shaded state (S7).

[0121] (Second embodiment)

[0122] A second embodiment will be described. This embodiment differs from the first embodiment in that a reset circuit (150) (see Fig. 14A) is provided for floating the output of the drive circuit (120) at a predetermined timing. Since this embodiment is otherwise identical to the first embodiment, any redundant description will be omitted or simplified.

[0123] Fig. 14a is a diagram showing a light-emitting pixel circuit (70) of a light-emitting pixel (100). An electrochromic element (110) is also shown in Fig. 14A. Fig. 14b is a diagram showing a timing chart of a writing operation of a light-emitting signal voltage (Vsig) for the light-emitting pixel (100). Fig. 14c is a diagram showing the state of the electrochromic element (110) of the light-emitting pixel (100) to which the light-emitting signal voltage (Vsig) is written in the timing chart of Fig. 14B. In Fig. 14c, a light-blocking state is represented by black, and a transparent state is represented by white.

[0124] As illustrated in FIG. 14A, the light control pixel circuit (70) may include a driving circuit (120), a capacitor element (130), a switching transistor (140), and a reset circuit (150). The reset circuit (150) is connected between an input of the driving circuit (120) and a reset voltage line to which a reset voltage (Vrst) is supplied. When a reset signal (Vscan2) is input from the reset signal line, the reset circuit (150) outputs the supplied reset voltage (Vrst) to the input of the driving circuit (120). The reset voltage (Vrst) is a voltage that is input to the input of the driving circuit (120) and floats the output of the driving circuit (120). That is, the reset voltage (Vrst) is a voltage that is input to the input of the driving circuit (120) and turns off both the PMOS and NMOS of the CMOS circuit of the driving circuit (120). The reset circuit (150) may be composed of, for example, an NMOS. In this case, the source electrode of the NMOS of the reset circuit (150) is connected to a reset voltage line, the drain electrode is connected to the input of the driving circuit (120), and the gate electrode is connected to a reset signal line.

[0125] A reset signal line supplying a reset signal (Vscan2) may be provided for each row. Therefore, the output of the driving circuit (120) may be made floating for each row based on the reset signal (Vscan2). Since the output of the driving circuit (120) is made floating, one electrode of the electrochromic element (110) is made floating, so that the leakage current flowing in the electrochromic element (110) can be blocked. The leakage current flowing in the electrochromic element (110) continues to flow even after the state of the electrochromic element (110) is switched to either light-blocking or transparent. As a result, the leakage current flowing in the electrochromic element (110) of each light-dimming pixel (100) flows to the first power voltage (Vcc1) to which the other electrode of the electrochromic element (110) is connected, so that a voltage drop occurs in the first power voltage (Vcc1). Due to this, the response time (time required for switching states) of the electrochromic element (110) increases. In the present embodiment, at the timing (timing at which the response time has elapsed) when the electrochromic element (110) of the light-control pixel (100) switches from a transparent state to a light-shielding state or from a light-shielding state to a transparent state, the leakage current flowing in the electrochromic element (110) is cut off by the reset signal (Vscan2). This suppresses the voltage drop of the first power supply voltage (Vcc1) due to the leakage current, and prevents an increase in the response time of the electrochromic element (110).

[0126] Fig. 14b shows a timing chart for writing a dimming signal voltage (Vsig) to each of a plurality of arbitrary dimming pixels (100) arranged in the column direction. n, n + 1, . . . , n + m represent row numbers. Hereinafter, in order to simplify the explanation, the writing operation of the dimming signal voltage (Vsig) to the dimming pixels (100) of row numbers n, n + 1, . . . , n + m in any one column will be described, similarly to the explanation of the first embodiment. In Fig. 14b, the subscript q of the dimming signal voltage (Vsig) represents the column number of the corresponding arbitrary one column.

[0127] A scan signal line supplying a scan signal (Vscan) is provided for each row. Therefore, a dimming signal voltage (Vsig) is written to the dimming pixel (100) for each row. When the scan signal is High (+10 V), the switching transistor (140) conducts, and the dimming signal voltage (Vsig) is maintained in the capacitor element (130), thereby writing the dimming signal voltage (Vsig) to the dimming pixel (100). In the example of Fig. 14B, the dimming signal voltage (Vsig) is written to the dimming pixel (100) in the order of row n, row n + 1, row n + m, and so on. The scan signal (Vscan) for writing the dimming signal voltage (Vsig) to the dimming pixel (100) of row n is indicated as Vscan_n. The scan signal (Vscan) for writing the dimming signal voltage (Vsig) to the dimming pixel (100) of the n + 1 row is indicated as Vscan_n + 1. The scan signal (Vscan) for writing the dimming signal voltage (Vsig) to the dimming pixel (100) of the n + m row is indicated as Vscan_n + m.

[0128] The dimming signal voltage (Vsig) for writing to each dimming pixel (100) is time-division multiplexed. In the example of Fig. 14B, the dimming signal voltage (Vsig (+10 V)) for turning the dimming pixels (100) of the n rows into a light-blocking state and the dimming signal voltage (Vsig (-10 V)) for turning the dimming pixels (100) of the n + 1 rows into a transparent state are illustrated as a dimming signal voltage (Vsig) that is time-division multiplexed.

[0129] At the timing when the switching transistors (140) of each row are sequentially turned on by the scan signal (Vscan), the dimming signal voltage (Vsig) is sequentially written to the dimming pixels (100) of each row. As a result, the dimming signal voltage (Vsig) is maintained in the capacitor element (130), so that nodeA becomes a voltage corresponding to the dimming signal voltage (Vsig).

[0130] NodeB of the n-row dimming pixel (100) is written with a dimming signal voltage (Vsig (+10V)) for turning the n-row dimming pixel (100) into a light-blocking state, and thus becomes a driving voltage (+4V) output by the driving circuit (120) according to the dimming signal voltage (Vsig). In addition, Fig. 14B also shows the voltage of nodeC, which is the ground potential (Vss). NodeB of the n+1-row dimming pixel (100) is written with a dimming signal voltage (Vsig (-10V)) for turning the n+1-row dimming pixel (100) into a transparent state, and thus becomes a driving voltage (-4V) output by the driving circuit (120) according to the dimming signal voltage (Vsig). Node B of the light-emitting pixel (100) of the n + m rows is written with a light-emitting signal voltage (Vsig (-10V)) to make the light-emitting pixel (100) of the n + m rows transparent, so that the driving voltage (-4V) output by the driving circuit (120) according to the light-emitting signal voltage (Vsig) is generated.

[0131] At the timing when the electrochromic element (110) of the light-emitting pixel (100) switches from a transparent state to a light-blocking state, or from a light-blocking state to a transparent state, the output of the driving circuit (120) of the corresponding light-emitting pixel (100) is set to floating by the reset signal (Vscan2). In the example of Fig. 14B, for example, after the state of the electrochromic element (110) of the light-emitting pixel (100) of the nth row switches, the reset signal (Vscan2) to the light-emitting pixel (100) of the nth row is set to High, thereby setting the voltage of the input (nodeA) of the driving circuit (120) to a reset voltage (Vrst) (e.g., 0 V). Accordingly, the output (nodeB) of the driving circuit (120) is set to floating. That is, the timing at which the reset signal (Vscan2) is set to High is the timing after the electrochromic element (110) of one row of the light-emitting pixels (100) has switched to either a transparent state or a light-blocking state. It is preferable that this timing be the timing at which the scanning signal that conducts the switching transistor (140) of any of the light-emitting pixels (100) is not input to the input of the switching transistor (140). This timing can be adjusted by trimming based on experiments, etc.

[0132] Depending on the driving voltage (voltage of node B), the state of the electrochromic element (110) of each light-emitting pixel (100) is switched. In Fig. 14B, when the state of the electrochromic element (110) is switched, the current (I) flowing in the electrochromic element (110) EC ) is shown. In the light control pixel (100) to which the reset signal (Vscan2) is input, after the reset signal (Vscan2) is input, the current (I EC ) will not flow.

[0133] As illustrated in FIG. 14c, when a scan signal (Vscan_n) is input to the n-row light-emitting pixel (100) and the light-emitting signal voltage (Vsig) is written, the electrochromic element (110) of the n-row light-emitting pixel (100) is turned off. At this time, the reset signal (Vscan2) is not input to the n-row light-emitting pixel (100). When a scan signal (Vscan_n + 1) is input to the n+1-row light-emitting pixel (100) and the light-emitting signal voltage (Vsig) is written, the electrochromic element (110) of the n+1-row light-emitting pixel (100) is turned on. At this time, the reset signal (Vscan2) is not input to the n+1-row light-emitting pixel (100). When a scan signal (Vscan_n + m) is input to the light-emitting pixel (100) of the n + m row and the light-emitting signal voltage (Vsig) is written, the electrochromic element (110) of the light-emitting pixel (100) of the n + m row becomes transparent. At this time, the reset signal (Vscan2) is not input to the light-emitting pixel (100) of the n + m row. When a scan signal (Vscan_n + m + 1) is input to the light-emitting pixel (100) of the n + m + 1 row and the light-emitting signal voltage (Vsig) is written, the electrochromic element (110) of the light-emitting pixel (100) of the n + m + 1 row becomes light-shielded. At this time, the reset signal (Vscan2) is not input to the light-emitting pixel (100) of the n + m + 1 row.

[0134] Fig. 15 is a drawing showing a flow chart of the operation of a dimming image display device (1). This flow chart can be executed by a control unit (1000) based on a program.

[0135] The control unit (1000) writes a dimming signal voltage (Vsig) to any n rows of dimming pixels (100) (S101).

[0136] The control unit (1000) determines whether the reaction of the electrochromic element (110) of the n-row light-emitting pixels (100) is completed (S102). That is, the control unit (1000) determines whether the electrochromic element (110) of the n-row light-emitting pixels (100) has completed the transition from a transparent state to a light-blocking state, or from a light-blocking state to a transparent state. In addition, determining whether the transition operation is completed can be accomplished by experimentally obtaining in advance the response time of the electrochromic element (110) (the response time for changing from a transparent state to a light-blocking state, or the response time for changing from a light-blocking state to a transparent state) of the light-emitting pixel (100), the characteristics of the electrochromic element (110), and other factors such as the dependence on the ambient temperature, and storing the corresponding data in the storage (1004) of the control unit (1000) for use. As described above, the electrochromic element (110) according to one embodiment of the present disclosure may require current to be supplied. As such, a delay due to a voltage drop (IR-Drop) may occur as the current is supplied. However, according to the display device according to various embodiments of the present disclosure, since each light-dimming pixel (100) is divided, the pixel area may be relatively small, and thus the influence of the voltage drop may be reduced. In addition, since the display device (e.g., the electrochromic element (110)) can be partially set to an Off state, the response time may be reduced compared to the conventional technology that requires switching the entire screen to an Off state.

[0137] If the control unit (1000) determines that the reaction of the electrochromic element (110) of the light-emitting pixel (100) of the nth row is not completed (S102: NO), it writes a light-emitting signal voltage (Vsig) to the light-emitting pixel (100) of another row (e.g., a row below the nth row) (S104).

[0138] When the control unit (1000) determines that the reaction of the electrochromic element (110) of the n-row light-emitting pixel (100) is completed (S102: YES), it writes a reset voltage (Vrst) to the n-row light-emitting pixel (100) (S103).

[0139] (Third embodiment)

[0140] A third embodiment will be described. This embodiment differs from the second embodiment in that, instead of using a reset circuit (150), the reset voltage (Vrst) is time-divisionally superimposed on the dimming signal voltage (Vsig), thereby causing the output of the driving circuit (120) to float at a predetermined timing. Since this embodiment is otherwise the same as the second embodiment, any redundant description will be omitted or simplified.

[0141] Fig. 16A is a diagram showing a light control pixel circuit (70) of a light control pixel (100). The light control pixel circuit (70) of the present embodiment is the same as that of the first embodiment. In Fig. 16A, an electrochromic element (110) is also illustrated. Fig. 16B is a diagram showing a timing chart of a writing operation of a light control signal voltage (Vsig) to a light control pixel (100). Fig. 16C is an explanatory diagram for explaining the order of writing the light control signal voltage (Vsig) and the reset voltage (Vrst) to the light control pixel (100) for each row.

[0142] As illustrated in FIG. 16A, the photodiode circuit (70) may include a driving circuit (120), a capacitive element (130), and a switching transistor (140). Since the reset circuit (150) is not present, the aperture ratio of the photodiode (100) can be increased compared to the second embodiment. The aperture ratio is defined as the area of ​​the electrochromic element (110) divided by the area of ​​the photodiode (100).

[0143] Fig. 16B illustrates a timing chart for writing a dimming signal voltage (Vsig) to each of a plurality of arbitrary dimming pixels (100) arranged in the column direction. n, n + 1,. . . , n + m represent row numbers. Hereinafter, in order to simplify the explanation, the writing operation of the dimming signal voltage (Vsig) to the dimming pixels (100) of row numbers n, n + 1,. . . , n + m in any one column will be described, similarly to the explanation of the first embodiment. In Fig. 16B, the subscript q of the dimming signal voltage (Vsig) represents the column number of any one column.

[0144] A scan signal line supplying a scan signal (Vscan) is provided for each row. Therefore, a dimming signal voltage (Vsig) is written to the dimming pixel (100) for each row. When the scan signal is High (+10 V), the switching transistor (140) is conducted, and the dimming signal voltage (Vsig) is maintained in the capacitor element (130), so that the dimming signal voltage (Vsig) is written to the dimming pixel (100). In the example of Fig. 16B, the dimming signal voltage (Vsig) is written to the dimming pixel (100) in the order of row n, row n + 1, row n + m, and so on. The scan signal (Vscan) for writing the dimming signal voltage (Vsig) to the dimming pixel (100) of row n is indicated as Vscan_n. The scan signal (Vscan) for writing the dimming signal voltage (Vsig) to the dimming pixel (100) of the n + 1 row is indicated as Vscan_n + 1. The scan signal (Vscan) for writing the dimming signal voltage (Vsig) to the dimming pixel (100) of the n + m row is indicated as Vscan_n + m.

[0145] The dimming signal voltage (Vsig) for writing to each dimming pixel (100) is time-division multiplexed. In the example of Fig. 16B, the dimming signal voltage (Vsig (+10 V)) for turning the dimming pixels (100) of the n rows into a light-blocking state and the dimming signal voltage (Vsig (-10 V)) for turning the dimming pixels (100) of the n + 1 rows into a transparent state are illustrated as a dimming signal voltage (Vsig) that is time-division multiplexed.

[0146] In this embodiment, the reset voltage (Vrst) is further superimposed on the dimming signal voltage (Vsig) by time division multiplexing. The reset voltage (Vrst) superimposed on the dimming signal voltage (Vsig) is written to the dimming pixel (100) by causing the switching transistor (140) of the dimming pixel (100) to be conducted by the scan signal (Vscan) and being held in the capacitance element (130) of the dimming pixel (100).

[0147] At the timing when the switching transistors (140) of each row are sequentially turned on by the scan signal (Vscan), the dimming signal voltage (Vsig) is sequentially written to the dimming pixels (100) of each row. As a result, the dimming signal voltage (Vsig) is maintained in the capacitor element (130), so that nodeA becomes a voltage corresponding to the dimming signal voltage (Vsig).

[0148] After the dimming signal voltage (Vsig) is written to the dimming pixel (100) of one row (e.g., row n), at a timing before the dimming signal voltage (Vsig) is written to the next row (e.g., row n + 1), the dimming signal voltage (Vsig) is set as a reset voltage (Vrst), and the output of the driving circuit (120) of the dimming pixel (100) of row n - k, which is the row k rows before (k stages above) for the corresponding row, is set to floating. Row n - k is a row in which the electrochromic element (110) is changing (reaction is being completed) from a transparent state to a light-blocking state, or from a light-blocking state to a transparent state, when the dimming signal voltage (Vsig) is written to the dimming pixel (100) of row n. It is preferable that the n - k row is the row closest to the n row among the rows in which the electrochromic element (110) is switching from a transparent state to a light-blocking state, or from a light-blocking state to a transparent state, when a light-blocking signal voltage (Vsig) is written to the light-blocking pixel (100) of the n row. The value of k can be determined based on experiments, etc.

[0149] As illustrated in Fig. 16c, for example, after a dimming signal voltage (Vsig) is written to a dimming pixel (100) of the nth stage (nth row), a reset voltage (Vrst) is written to a dimming pixel of the nth - kth stage (nth - kth row). Then, the writing of the dimming signal voltage (Vsig) and the reset voltage (Vrst) is repeated until the final stage (final row).

[0150] In the example of the timing chart of Fig. 16b, nodeB of the dimming pixel (100) in the nth row is written with a dimming signal voltage (Vsig (+10V)) for turning the dimming pixel (100) in the nth row into a dark state, thereby becoming a driving voltage (+4V) output by the driving circuit (120) according to the dimming signal voltage (Vsig). In addition, Fig. 16B also shows the voltage of nodeC, which is the ground potential (Vss). NodeB of the dimming pixel (100) in the n+1st row is written with a dimming signal voltage (Vsig (-10V)) for turning the dimming pixel (100) in the n+1st column into a transparent state, thereby becoming a driving voltage (-4V) output by the driving circuit (120) according to the dimming signal voltage (Vsig). Node B of the n + m column's light-emitting pixel (100) is written with a light-emitting signal voltage (Vsig (-10V)) to make the n + m column's light-emitting pixel (100) transparent, so that the driving voltage (-4V) output by the driving circuit (120) according to the light-emitting signal voltage (Vsig) is generated.

[0151] Depending on the driving voltage (voltage of node B), the state of the electrochromic element (110) of each light-emitting pixel (100) is switched. In Fig. 16B, when the state of the electrochromic element (110) is switched, the current (I) flowing in the electrochromic element (110) EC ) is shown. In the light-emitting pixel (100) in which the reset voltage (Vrst) is written, after the reset voltage (Vrst) is written, the current (I EC ) will not flow.

[0152] Fig. 17 is a drawing showing a flow chart for the operation of a dimming image display device (1). This flow chart can be executed by a control unit (1000) based on a program.

[0153] The control unit (1000) writes a dimming signal voltage (Vsig) to any n rows of dimming pixels (100) (S201).

[0154] The control unit (1000) writes a reset voltage to the light-emitting pixels (100) of rows n - k (S202). As described above, rows n - k are rows in which the electrochromic element (110) is switched from a transparent state to a light-blocking state, or from a light-blocking state to a transparent state, when the light-emitting signal voltage (Vsig) is written to the light-emitting pixels (100) of row n. The value of k can be stored in advance in the storage of the control unit (1000) and used.

[0155] (Fourth embodiment)

[0156] A fourth embodiment will be described. This embodiment differs from the first embodiment in that, in this embodiment, when a light control pixel (100) that has become transparent in one frame of a light control image remains transparent in the next frame, the light control signal voltage (Vsig) is not written to the light control pixel (100). Since other aspects of this embodiment are the same as those of the first embodiment, any redundant description will be omitted or simplified.

[0157] Fig. 18A is a diagram showing a light control pixel circuit (70) of a light control pixel (100). The light control pixel circuit (70) of the present embodiment is the same as that of the first embodiment. In Fig. 18A, an electrochromic element (110) is also illustrated. Fig. 18B is a diagram showing a timing chart of a writing operation of a light control signal voltage (Vsig) for a light control pixel (100). Fig. 18C is a diagram showing the state of the electrochromic element (110) of each light control pixel (100) before and after the light control signal voltage (Vsig) is written in the timing chart of Fig. 18B. In Fig. 18C, a light-blocking state is represented by black, and a transparent state is represented by white.

[0158] As illustrated in Fig. 18a, the dimming pixel circuit (70) may include a driving circuit (120), a capacitive element (130), and a switching transistor (140). As described below, a reset voltage (Vrst) is superimposed on the dimming signal voltage (Vsig) supplied to the switching transistor (140) by time division multiplexing.

[0159] In Fig. 18B, a timing chart for writing a dimming signal voltage (Vsig) to each of a plurality of arbitrary dimming pixels (100) arranged in the column direction is illustrated. n, n + 1, n + 2 represent row numbers. Hereinafter, in order to simplify the explanation, unless otherwise specified, the explanation will focus on the dimming signal voltage (Vsig) writing operation for the dimming pixels (100) of row numbers n, n + 1, n + 2 in any one column, similar to the explanation of the first embodiment. In Fig. 18B, the subscript m of the dimming signal voltage (Vsig) represents the column number of the corresponding arbitrary one column.

[0160] A scan signal line supplying a scan signal (Vscan) is provided for each row. Therefore, a dimming signal voltage (Vsig) is written to the dimming pixel (100) for each row. When the scan signal is High (+10 V), the switching transistor (140) is turned on (turned ON), and the dimming signal voltage (Vsig) is maintained in the capacitor element (130), thereby writing the dimming signal voltage (Vsig) to the dimming pixel (100). In the example of Fig. 18B, the dimming signal voltage (Vsig) is written to the dimming pixel (100) in the order of row n, row n + 1, and row n + 2. The scan signal (Vscan) for writing the dimming signal voltage (Vsig) to the dimming pixel (100) of row n is indicated as Vscan_n. The scan signal (Vscan) for writing the dimming signal voltage (Vsig) to the dimming pixel (100) of the n + 1 row is indicated as Vscan_n + 1. The scan signal (Vscan) for writing the dimming signal voltage (Vsig) to the dimming pixel (100) of the n + 2 row is indicated as Vscan_n + 2. Since the electrochromic element (110) according to one embodiment of the present disclosure is an element set to switch between the ON state and the OFF state without requiring a grayscale expression of three or more stages, digital control (e.g., a state in which the OFF state is designated as 0 and the ON state is designated as 1 and controlled) can be applied.

[0161] The dimming signal voltage (Vsig) is time-division multiplexed with the dimming signal voltage (Vsig) and the reset voltage (Vrst) for writing to each dimming pixel (100). In the example of Fig. 18B, the dimming signal voltage (Vsig(+10V)) for changing the dimming pixels (100) of the n row from a transparent state to a light-blocking state, the reset voltage (Vrst) (e.g., 0V) for maintaining the transparent state of the dimming pixels (100) of the n + 1 row, and the dimming signal voltage (Vsig(+10V)) for changing the dimming pixels (100) of the n + 2 row from a light-blocking state to a transparent state are exemplified as a dimming signal voltage (Vsig) that is time-division multiplexed.

[0162] In the present embodiment, as described above, the reset voltage (Vrst) is superimposed on the dimming signal voltage (Vsig) by time division multiplexing. The reset voltage (Vrst) superimposed on the dimming signal voltage (Vsig) is maintained in the capacitance element (130) of the dimming pixel (100) by the switching transistor (140) of the dimming pixel (100) being turned on by the scan signal (Vscan). Accordingly, the reset voltage (Vrst) is input to the driving circuit (120), so that the output of the driving circuit (120) becomes floating (high impedance).

[0163] At the timing when the switching transistors (140) of each row are sequentially turned on by the scan signal (Vscan), the dimming signal voltage (Vsig) is sequentially written to the dimming pixels (100) of each row. As a result, the dimming signal voltage (Vsig) is maintained in the capacitor element (130), so that nodeA becomes a voltage corresponding to the dimming signal voltage (Vsig).

[0164] The control unit (1000) supplies a reset voltage (Vrst) as a dimming signal voltage (Vsig) to the dimming pixel (100) that is transparent in the frame of the current dimming image and will remain transparent in the next frame. Therefore, since the dimming signal voltage (Vsig) is not rewritten to the corresponding dimming pixel (100) in the corresponding next frame, unnecessary power consumption due to rewriting can be suppressed. Specifically, by supplying a driving voltage (e.g., -4 V) for making the electrochromic element (110) transparent by rewriting, a leakage current flowing in the electrochromic element (110) can be blocked, thereby suppressing unnecessary power consumption.

[0165] As illustrated in FIG. 18c, for example, there are cases where a light-emitting pixel (100) in which an electrochromic element (110) is transparent in the previous frame (Frame_a) also becomes transparent in the next frame (Frame_(a+1)). That is, there may be a light-emitting pixel (100) including an electrochromic element (110) that is transparent in the current frame and also becomes transparent in the next frame. As described above, in this case, the control unit (1000) supplies a reset voltage (Vrst) as a light-emitting signal voltage (Vsig) to the light-emitting pixel (100), thereby making the output of the driving circuit (120) of the light-emitting pixel (100) high impedance. The electrochromic element (110) has a memory property in a transparent state. For this reason, the electrochromic element (110) in a transparent state maintains the transparent state even if a driving voltage to make the electrochromic element (110) transparent is not supplied.

[0166] Fig. 19 is a drawing showing a flow chart of the operation of a dimming image display device (1). This flow chart can be executed by a control unit (1000) based on a program.

[0167] The control unit (1000) determines for each light-emitting pixel (100) whether the current frame includes an electrochromic element (110) in a transparent state (S301).

[0168] If the control unit (1000) determines that the target light-emitting pixel (100) is not a light-emitting pixel (100) that includes an electrochromic element (110) in a transparent state in the current frame (S301: NO), it executes the processing of step S301.

[0169] If the control unit (1000) determines that the target light-emitting pixel (100) is a light-emitting pixel (100) that includes an electrochromic element (110) that is in a transparent state in the current frame (S301: YES), it determines whether the corresponding light-emitting pixel (100) is a light-emitting pixel (100) that includes an electrochromic element (110) that becomes transparent in the next frame (S302).

[0170] If the control unit (1000) determines that the target light-emitting pixel (100) is not a light-emitting pixel (100) including an electrochromic element (110) that becomes transparent in the next frame (S302: NO), it executes the processing of step S301.

[0171] If the control unit (1000) determines that the target light-emitting pixel (100) is a light-emitting pixel (100) including an electrochromic element (110) that becomes transparent in the next frame (S302: YES), it inputs a reset voltage to the corresponding light-emitting pixel (100) (S303).

[0172] The embodiment has the following effects:

[0173] A driving circuit connected to one electrode of an electrochromic element and outputting a driving voltage to the corresponding electrode according to an input signal voltage is made of a CMOS circuit using a transistor having an enhancement characteristic. This makes it possible to improve image quality deterioration caused by operational instability of the electrochromic element when the driving voltage to the electrochromic element is switched by the driving circuit.

[0174] In addition, the electrochromic material of the electrochromic element includes one or more metal elements selected from the group consisting of silver, bismuth, chromium, iron, cadmium, cobalt, nickel, tin, lead, and copper. Therefore, even when using an electrochromic element whose instability of the electrochromic element (110) increases due to the through current of the driving circuit, the operational instability of the electrochromic element when the driving voltage to the electrochromic element by the driving circuit is switched can be effectively improved.

[0175] In addition, a reset circuit is installed that outputs the supplied reset voltage as an input to the driving circuit when a reset signal is input, and the output of the driving circuit is set to float when the reset signal is input. Therefore, when inputting a signal voltage to a light-emitting pixel, leakage current from the light-emitting pixel of another stage can be blocked, so that voltage drop of a power supply, etc. due to leakage current can be suppressed.

[0176] In addition, a plurality of light-emitting pixels are two-dimensionally arranged to form a plurality of rows and a plurality of columns, and inputs of switching transistors of the same row are connected to each other. A scan signal for conducting the switching transistor is input to the input of the switching transistor of the light-emitting pixel forming one row, and a signal voltage supplied to the switching transistor is output to the driving circuit. Thereafter, before inputting the scan signal to the input of the switching transistor of the light-emitting pixel forming the corresponding one row, the scan signal is input to the input of the switching transistor of the light-emitting pixel forming the corresponding row, and a reset voltage is supplied to the switching transistor of the light-emitting pixel forming another row in which the electrochromic element has been switched to either a transparent state or a light-blocking state to input the scan signal, thereby outputting the reset voltage to the driving circuit. Accordingly, when writing the signal voltage to the light-emitting pixel, since leakage current in the light-emitting pixel of another stage can be blocked, a voltage drop of a power supply, etc. due to leakage current can be suppressed, and a decrease in the aperture ratio (e.g., the ratio of the total screen area of ​​the display device to the area where information can be displayed) can be prevented.

[0177] In addition, a reset voltage is output to the input of a driving circuit of a light-emitting pixel including an electrochromic element that is transparent in the current light-emitting image frame and also becomes transparent in the next light-emitting image frame when the next light-emitting image frame is to be displayed. Therefore, unnecessary power consumption during rewriting can be suppressed.

[0178] The above-described embodiments are merely illustrative, and those skilled in the art will understand that various modifications and equivalent alternative embodiments are possible. Therefore, the disclosed embodiments should be considered illustrative rather than restrictive. The scope of the claims is set forth in the claims, and all configurations within the scope equivalent to the claims should be construed as being included within the scope of the claims.

Claims

1. In the display device, An image display device configured to display an image having multiple pixels; A light-emitting image display device comprising a plurality of light-emitting pixels, wherein a light-emitting device is set to switch the transmittance of each light-emitting pixel of the light-emitting image display device, and A control circuit is included that is set to switch the transmittance of the light-emitting pixel of the area of ​​the light-emitting image display device corresponding to the object area in the image from the first transmittance to the second transmittance, The above-mentioned light-emitting pixel includes an electrochromic element and a pixel circuit, The above pixel circuit, A driving circuit electrically connected to one electrode of the electrochromic element and set to apply a driving voltage to the one electrode according to a signal voltage; A switching transistor set to apply the signal voltage to the input terminal of the driving circuit according to the injection signal, and A capacitive element electrically connected to the input terminal of the driving circuit and set to maintain the signal voltage applied to the driving circuit, A display device, characterized in that the above driving circuit includes a CMOS circuit using a transistor having enhance characteristics.

2. In paragraph 1, A display device, characterized in that the control circuit is set to detect the object area based on the image and change the transmittance of the light-emitting pixel of the corresponding area corresponding to the detected object area from the first transmittance to the second transmittance.

3. In paragraph 1, The above control circuit, Determine whether the object area is set to change to the second transmittance, and based on the object area being set to change to the second transmittance, change the transmittance of the light-emitting pixel of the corresponding area to the second transmittance, A display device characterized in that the light-dimming pixels are set to be controlled so that the light-dimming pixels have the light-dimming pixels set to have the light-dimming pixels set to have the first light-dimming pixels, based on the object area being set not to change to the second light-dimming pixels.

4. In paragraph 1, The above electrochromic device, Contains two electrodes opposing each other, A display device characterized in that the electrochromic material included between the two electrodes includes an electrolyte layer including an electrochromic material including at least one metal element selected from the group consisting of silver, bismuth, chromium, iron, cadmium, cobalt, nickel, tin, lead, and copper.

5. In paragraph 1, A reset circuit is included that outputs a supplied reset voltage to the input of the driving circuit when a reset signal is input, A display device, characterized in that the reset voltage is a voltage that is output toward the input terminal of the driving circuit, thereby causing the output of the driving circuit to float.

6. In paragraph 5, A plurality of pixels each having the pixel circuit according to claim 5, and the plurality of pixels are two-dimensionally arranged to form a plurality of rows and a plurality of columns, The inputs of the above switching transistors in the same row are interconnected, The inputs of the above reset circuits in the same row are interconnected, A display device characterized by including a control unit that inputs the scan signal for conducting the switching transistor to the input of the switching transistor of the pixel constituting one row, outputs the signal voltage supplied to the switching transistor to the input of the driving circuit, thereby causing the electrochromic element of the pixel constituting one row to be switched to either a transparent state or a light-blocking state, and then inputs the reset signal to the input of the reset circuit of the pixel constituting one row.

7. In paragraph 1, A plurality of pixels each having the pixel circuit according to claim 1, wherein the plurality of pixels are two-dimensionally arranged to form a plurality of rows and a plurality of columns, The inputs of the above switching transistors in the same row are interconnected, A control unit for inputting the scan signal for conducting the switching transistor to the input of the switching transistor of the pixel constituting one row, and outputting the signal voltage supplied to the switching transistor to the driving circuit, and then, before inputting the scan signal to the input of the switching transistor of the pixel constituting one row, inputting the scan signal by supplying a reset voltage to the switching transistor of the pixel constituting another row, wherein the electrochromic element is switched to either a transparent state or a light-blocking state, thereby outputting the reset voltage to the driving circuit. A display device, characterized in that the reset voltage is a voltage that floats the output of the CMOS circuit by being output to the input of the driving circuit.

8. In paragraph 1, A plurality of pixels each having the pixel circuit according to claim 1, A display device in which the control unit outputs the reset voltage to the input of the driving circuit of the pixel including the electrochromic element that is transparent in the current image frame and also becomes transparent in the next image frame when displaying the next image frame.

9. A control method by the control unit of the display device according to Article 1, A control method, characterized by including a step (a) of detecting the object area based on the image and switching the transmittance of the light-emitting pixel of the corresponding area corresponding to the detected object area to low transmittance.

10. In paragraph 9, Step (b) for determining whether to make the above object area low-transmittance, A control method characterized in that the step (b) includes a step (c) of, when it is determined that the object area has low transmittance, switching the transmittance of the light-emitting pixels of the corresponding area to low transmittance, and when it is determined that the object area does not have low transmittance, switching the transmittance of all the light-emitting pixels to high transmittance.

11. Electrochromic elements, A driving circuit connected to one electrode of the above electrochromic element and outputting a driving voltage to the electrode according to an input signal voltage; A switching transistor that outputs the supplied signal voltage to the input of the driving circuit according to the input scanning signal, A capacitive element connected to the input of the driving circuit and maintaining the signal voltage output to the driving circuit, A plurality of pixels including a reset circuit that outputs a supplied reset voltage to the input of the driving circuit when a reset signal is input, A control method of a display device in which a plurality of said pixels are two-dimensionally arranged to form a plurality of rows and a plurality of columns, inputs of said switching transistors of the same row are interconnected, and inputs of said reset circuits of the same row are interconnected, A step of inputting the scan signal for conducting the switching transistor to the input of the switching transistor of the pixel constituting one row, and outputting the signal voltage supplied to the switching transistor to the input of the driving circuit, thereby causing the electrochromic element of the pixel constituting one row to be switched to either a transparent state or a light-blocking state, and then inputting the reset signal to the input of the reset circuit of the pixel constituting one row, A control method for a display device, characterized in that the reset voltage is a voltage that floats the output of the driving circuit by being output to the input of the driving circuit.

12. In paragraph 11, A control method for a display device, characterized in that it further includes a step of outputting the reset voltage to the input of the driving circuit of the pixel including the electrochromic element that is transparent in the current image frame and also becomes transparent in the next image frame when displaying the next image frame.

13. A computer-readable non-transitory recording medium configured to store instructions executed by the display device according to paragraph 1, A computer-readable non-transitory recording medium, characterized in that the instructions include instructions for detecting the object area based on the image and changing the transmittance of the light-emitting pixel of the corresponding area corresponding to the detected object area to low transmittance.

14. The above instructions, An instruction for determining whether to make the above object area low-transmittance, and A computer-readable non-transitory recording medium characterized by including instructions for, when it is determined that the object area is set to low transmittance, switching the transmittance of the light-emitting pixels of the corresponding area to low transmittance, and when it is determined that the object area is not set to low transmittance, switching the transmittance of all the light-emitting pixels to high transmittance.

15. In paragraph 13, The above instructions are, The above control circuit includes an instruction for detecting the object area based on the image, and A computer-readable non-transitory recording medium, characterized in that it includes instructions for changing the transmittance of the light-emitting pixel of the corresponding area corresponding to the detected object area from the first transmittance to the second transmittance.

Citation Information

Patent Citations

  • active matrix electrochromic display

    JP2004518159A

  • Active matrix electrochromic display device

    KR1020020081421A

  • Transparent display apparatus and method for controlling same

    KR1020140088041A

  • Electrochromic display device

    KR1020180062319A

  • Pulse stretcher circuitry

    KR102723642B1

Cited By

  • Driving circuit and control method of sun glasses with variable-color lenses

    CN119882316A