Pixel driving circuit for display panel, control method for pixel driving circuit, and display panel

Abstract

The present application provides a pixel driving circuit for a display panel, a control method for a pixel driving circuit, and a display panel. The pixel driving circuit comprises a driving transistor, a light-emitting device, and a pulse width modulation module. A discharge transistor of the pulse width modulation module is electrically connected to a control end of the driving transistor and a first switch; the first switch is used for disconnecting or connecting an output end of the discharge transistor and a third voltage end on the basis of an external control signal; and the display panel comprises an external detection module used for detecting the potential of the output end of the discharge transistor.

Description

Pixel driving circuit and control method for display panel, and display panel Technical Field

[0001] The present application relates to the field of display technology, and in particular to a pixel driving circuit applied to a display panel, a control method thereof, and a display panel. Background Art

[0002] There are two types of existing pulse-width modulation (PWM) drive circuits, as shown in Figures 1A and 1B. One type is a sub-field splitting circuit, which divides a frame into multiple sub-fields and utilizes the combination of sub-fields to achieve a linear increase in brightness with increasing grayscale during PWM drive. The other type uses a sweeping control signal combined with the data voltage applied to the gate of transistor T4 during the initial stage to control the light-emitting duration of the light-emitting device. Both types of circuits can achieve PWM drive, but they can only provide external compensation for the driving transistor T2 and do not detect the threshold voltage of the discharge transistor T4. Consequently, external compensation cannot be used to compensate the discharge transistor T4. This results in different on-times for the driving transistor T2 of each sub-pixel in the display panel, leading to uneven display. SUMMARY OF THE INVENTION

[0003] The embodiments of the present application provide a pixel driving circuit and a control method thereof for a display panel, and a display panel, which can improve the problem that the existing pixel driving circuit has no detection of the threshold voltage of the discharge transistor, resulting in no basis for compensating the threshold voltage of the discharge transistor and uneven brightness.

[0004] An embodiment of the present application provides a pixel driving circuit for a display panel, the pixel driving circuit comprising a driving transistor, a light-emitting device, and a pulse width modulation module. The input and output terminals of the driving transistor are electrically connected between a first voltage terminal and a second voltage terminal, and the light-emitting device is electrically connected between the input terminal of the driving transistor and the first voltage terminal. The pulse width modulation module comprises a discharge transistor, a first switch, an initial voltage transmission module, and a pulse width modulation voltage transmission module. The discharge transistor is electrically connected between the control terminal of the driving transistor and the first switch. The first switch is configured to disconnect or connect the output terminal of the discharge transistor and a third voltage terminal based on an external control signal. The input terminal of the discharge transistor is connected to the output terminal of the initial voltage transmission module, and the control terminal of the discharge transistor is connected to the output terminal of the pulse width modulation voltage transmission module. The display panel further comprises an external detection module connected to the pixel driving circuit, the external detection module being configured to detect the potential of the output terminal of the discharge transistor.

[0005] The present application also provides a method for controlling a pixel driving circuit, which is configured to control any of the above-mentioned pixel driving circuits, including: the first switch disconnects the electrical connection between the output end of the discharge transistor and the third voltage end according to the external control signal; the discharge transistor is turned on according to the pulse width modulation voltage output by the pulse width modulation voltage transmission module, so that the output end of the initial voltage transmission module is electrically connected to the output end of the discharge transistor, and the external detection module detects the potential of the output end of the discharge transistor.

[0006] The present application also provides a display panel comprising any of the aforementioned pixel driving circuits and an external detection module, wherein the external detection module is electrically connected to the output terminal of the discharge transistor and configured to output the external control signal and detect the potential of the output terminal of the discharge transistor.

[0007] Embodiments of the present application provide a pixel driving circuit and control method for a display panel, as well as a display panel. A pulse width modulation module includes a discharge transistor and a first switch, so that the first switch can disconnect the electrical connection between the output terminal of the discharge transistor and a third voltage terminal according to an external control signal. When the control terminal of the discharge transistor receives a pulse width modulation voltage output by a pulse width modulation voltage transmission module and is turned on, the input terminal of the discharge transistor receives an initial voltage transmitted by an initial voltage transmission module, thereby charging the output terminal of the discharge transistor. An external detection module is then used to detect the potential of the output terminal of the discharge transistor to obtain a threshold voltage of the discharge transistor, thereby detecting the threshold voltage of the discharge transistor. This improves the problem that existing pixel driving circuits cannot detect the threshold voltage of the discharge transistor, resulting in a display panel using the pixel driving circuit having no basis for compensating the threshold voltage of the discharge transistor and uneven brightness. Beneficial effects

[0008] Compared to the prior art, the present application provides a display panel and a display device, wherein the display panel includes a plurality of data lines, a plurality of fan-out lines, and a plurality of virtual lines located in a display area of ​​the display panel. The plurality of data lines include a plurality of first data lines, and the plurality of fan-out lines are electrically connected to the plurality of first data lines; the plurality of virtual lines include a plurality of first virtual lines alternately arranged with the plurality of first data lines, and a plurality of second virtual lines located on the extension lines of the plurality of fan-out lines. By arranging a plurality of first virtual lines alternately arranged with the first data lines in the display area, and arranging a plurality of second virtual lines on the extension lines of the fan-out lines, the wiring distribution density in the display area is improved, thereby improving the problem of uneven display when the screen is off due to uneven distribution of metal patterns. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] 1A and 1B are schematic structural diagrams of a pixel driving circuit in the prior art;

[0010] FIG2 is a schematic diagram of a display panel provided in an embodiment of the present application;

[0011] 3A to 3C are schematic structural diagrams of a pixel driving circuit provided in an embodiment of the present application;

[0012] FIG4 is a flow chart of a pixel driving circuit provided in an embodiment of the present application;

[0013] 5A and 5B are timing diagrams of a pixel driving circuit provided in an embodiment of the present application. Modes for Carrying Out the Invention

[0014] To make the purpose, technical solutions and effects of this application clearer and more specific, the following further describes this application in detail with reference to the accompanying drawings and examples. It should be understood that the specific examples described herein are only used to explain this application and are not intended to limit this application.

[0015] 1A and 1B are schematic structural diagrams of a pixel driving circuit in the prior art, wherein DL represents a data line, SL represents a scan line, DiL represents a discharge control line, VDD represents a first voltage terminal, VSS represents a second voltage terminal, Vne represents a discharge voltage terminal, Vref represents a third voltage terminal, T1 to T5 represent transistors, and C1 to C3 represent capacitors.

[0016] FIG2 is a schematic diagram of a display panel provided by an embodiment of the present application. The present application provides a display panel including a plurality of sub-pixels Pi and an external detection module 100 .

[0017] Optionally, the display panel includes a self-luminous display panel.

[0018] Optionally, the sub-pixel Pi includes the pixel driving circuit. FIG. 3A to FIG. 3C are schematic structural diagrams of a pixel driving circuit provided in an embodiment of the present application. The pixel driving circuit is applied to the display panel and includes a driving transistor Tdr, a light-emitting device Di, and a pulse width modulation module 200.

[0019] An input terminal and an output terminal of the driving transistor Tdr are electrically connected between a first voltage terminal VDD and a second voltage terminal VSS. The driving transistor Tdr is configured to generate a driving current to drive the light emitting device Di to emit light.

[0020] Optionally, the light emitting device Di is electrically connected between the input terminal of the driving transistor Tdr and the first voltage terminal VDD. Optionally, the light emitting device Di includes an organic light emitting diode, a sub-millimeter light emitting diode, a micro light emitting diode, etc.

[0021] The pulse width modulation module 200 is electrically connected to the driving transistor Tdr. The pulse width modulation module 200 is configured to control the duration for the driving transistor Tdr to drive the light emitting device Di to emit light according to a sweep signal Swe.

[0022] The PWM module 200 includes a discharge transistor Tdc and a first switch Swi. The discharge transistor Tdc is electrically connected between the control terminal of the driving transistor Tdr and the first switch Swi. The first switch Swi is electrically connected between the discharge transistor Tdc and a third voltage terminal Vref.

[0023] In which, the first switch Swi is configured to disconnect the output terminal of the discharge transistor Tdc from the third voltage terminal Vref, or connect the output terminal of the discharge transistor Tdc to the third voltage terminal Vref according to the external control signal EC. The input terminal of the discharge transistor Tdc is configured to receive the initial voltage Vi. The control terminal of the discharge transistor Tdc is configured to receive the pulse width modulation voltage Vpwm to turn on the discharge transistor Tdc. The potential of the output terminal of the discharge transistor Tdc is configured to be detected by the external detection module 100.

[0024] By causing the first switch Swi to electrically disconnect the output terminal of the discharge transistor Tdc from the third voltage terminal Vref in response to the external control signal EC, the initial voltage Vi received by the input terminal of the discharge transistor Tdc can charge the output terminal of the discharge transistor Tdc when the control terminal of the discharge transistor Tdc receives the pulse-width modulation voltage Vpwm and is turned on. The initial voltage Vi stops charging the output terminal of the discharge transistor Tdc until the voltage difference between the control terminal and the output terminal of the discharge transistor Tdc equals the threshold voltage Vth of the discharge transistor Tdc. Therefore, by utilizing the external detection module 100 to detect the potential of the output terminal of the discharge transistor Tdc, and combining the information that charging of the output terminal of the discharge transistor Tdc is stopped when the voltage difference between the control terminal and the output terminal of the discharge transistor Tdc equals the threshold voltage Vth of the discharge transistor Tdc, the threshold voltage Vth of the discharge transistor Tdc can be obtained. This enables detection of the threshold voltage Vth of the discharge transistor Tdc, thereby improving the problem that the existing pixel driving circuit fails to detect the threshold voltage Vth of the discharge transistor Tdc, resulting in a display panel using the pixel driving circuit having no basis for compensating for the threshold voltage Vth of the discharge transistor Tdc and uneven brightness.

[0025] Optionally, the first switch Swi can be set in the form of a transistor, that is, the first switch Swi has a control end, an input end and an output end, the control end of the first switch Swi is configured to receive the external control signal EC, and the input end and the output end of the first switch Swi are electrically connected between the output end of the discharge transistor Tdc and the third voltage end Vref.

[0026] Optionally, the external detection module 100 is electrically connected to the output terminal of the discharge transistor Tdc. The external detection module 100 is configured to output the external control signal EC and detect the potential of the output terminal of the discharge transistor Tdc, thereby cooperating with the pixel driving circuit to detect and compensate for the threshold voltage Vth of the discharge transistor Tdc. Optionally, the pulse width modulation module 200 further includes an initial voltage transmission module 201 and a pulse width modulation voltage transmission module 202. The input terminal of the discharge transistor Tdc is connected to the output terminal of the initial voltage transmission module 201, and the control terminal of the discharge transistor Tdc is connected to the output terminal of the pulse width modulation voltage transmission module 202. The initial voltage transmission module 201 is configured to transmit the initial voltage Vi to the control terminal of the drive transistor Tdr and the input terminal of the discharge transistor Tdc according to the detection control signal Cont. The pulse width modulation voltage transmission module 202 is configured to output the pulse width modulation voltage Vpwm to the control terminal of the discharge transistor Tdc according to the pulse width modulation signal SPWM.

[0027] Optionally, the initial voltage transmission module 201 includes an initial transistor Ti1 , and the pulse width modulation voltage transmission module 202 includes a first data transistor Tda1 .

[0028] The input terminal of the initial transistor Ti1 is electrically connected to the initial voltage terminal VI that transmits the initial voltage Vi. The output terminal of the initial transistor Ti1 is electrically connected to the control terminal of the driving transistor Tdr and the output terminal of the initial voltage transmission module 201. The control terminal of the initial transistor Ti1 is electrically connected to the detection control line CL that transmits the detection control signal Cont. The initial transistor Ti1 is configured to transmit the initial voltage Vi to the control terminal of the driving transistor Tdr and the input terminal of the discharge transistor Tdc according to the detection control signal Cont, so as to reset the potentials of the control terminal of the driving transistor Tdr and the input terminal of the discharge transistor Tdc using the initial voltage Vi, and to charge the output terminal of the discharge transistor Tdc using the initial voltage Vi when the first switch Swi is off and the discharge transistor Tdc is on.

[0029] The input terminal of the first data transistor Tda1 is electrically connected to the data line DL that transmits the pulse width modulation voltage Vpwm, the output terminal of the first data transistor Tda1 is electrically connected to the control terminal of the discharge transistor Tdc, and the control terminal of the first data transistor Tda1 is electrically connected to the pulse width modulation control line WL that transmits the pulse width modulation signal SPWM. The first data transistor Tda1 is configured to output the pulse width modulation voltage Vpwm to the control terminal of the discharge transistor Tdc according to the pulse width modulation signal SPWM, thereby controlling the discharge transistor Tdc to be turned on or off by the pulse width modulation voltage Vpwm.

[0030] Optionally, in order to enable the pulse width modulation module 200 to control the light emitting duration of the light emitting device Di, the pulse width modulation module 200 further includes a potential coupling module 203, which is configured to couple the sweep signal Swe to the control end of the discharge transistor Tdc.

[0031] Optionally, the potential coupling module 203 includes a first capacitor C1, wherein a first end of the first capacitor C1 is electrically connected to the control end of the discharge transistor Tdc, and a second end of the first capacitor C1 is electrically connected to a frequency sweep control line SwL that transmits a frequency sweep signal Swe. The frequency sweep signal Swe is coupled to the control end of the discharge transistor Tdc via the first capacitor C1, so that when the discharge transistor Tdc is turned on, the third voltage end Vref is electrically connected to the control end of the drive transistor Tdr, thereby controlling the drive transistor Tdr to be turned off, so that no driving current flows between the first voltage end VDD and the second voltage end VSS through the light-emitting device Di, thereby controlling the light-emitting device Di to stop emitting light.

[0032] Optionally, please continue to refer to Figures 3A to 3C. The pixel driving circuit further includes a pulse amplitude modulation module 300. The pulse amplitude modulation module 300 is electrically connected to the driving transistor Tdr. The pulse amplitude modulation module 300 is configured to couple a pulse amplitude modulation voltage Vpam to the control terminal of the driving transistor Tdr according to a pulse amplitude modulation signal SPAM to control the amplitude of the driving current generated by the driving transistor Tdr.

[0033] Optionally, the pulse amplitude modulation module 300 includes a compensation transistor Tc, a second data transistor Tda2, a second capacitor C2, and a third capacitor C3.

[0034] The control terminal of the compensation transistor Tc is electrically connected to the compensation control line BL, the input terminal of the compensation transistor Tc is electrically connected to the input terminal of the driving transistor Tdr, and the output terminal of the compensation transistor Tc is electrically connected to the control terminal of the driving transistor Tdr. The compensation transistor Tc is configured to cause the driving transistor Tdr to be diode-connected according to the compensation control signal Comp transmitted by the compensation control line BL.

[0035] The input end of the second data transistor Tda2 is electrically connected to the data line DL that transmits the pulse amplitude modulation voltage Vpam, the output end of the second data transistor Tda2 is electrically connected to the control end of the driving transistor Tdr, and the control end of the second data transistor Tda2 is electrically connected to the pulse amplitude modulation control line AL that transmits the pulse amplitude modulation signal SPAM. The second data transistor Tda2 is configured to output the pulse amplitude modulation voltage Vpam to the second capacitor C2 according to the pulse amplitude modulation signal SPAM, so as to couple the potential of the control end of the driving transistor Tdr through the second capacitor C2.

[0036] A first end of the second capacitor C2 is electrically connected to the output end of the second data transistor Tda2, and a second end of the second capacitor C2 is electrically connected to the control end of the driving transistor Tdr; a first end of the third capacitor C3 is electrically connected to the control end of the driving transistor Tdr, and a second end of the second capacitor C2 is electrically connected to the second voltage end VSS.

[0037] Optionally, the pulse amplitude modulation module 300 further includes a reset transistor Ti2, wherein an input end of the reset transistor Ti2 is electrically connected to the data line DL, an output end of the reset transistor Ti2 is electrically connected to the first end of the second capacitor C2, and a control end of the reset transistor Ti2 is electrically connected to the reset control line ReL. The reset transistor Ti2 is configured to transmit a reset signal transmitted by the data line DL to the first end of the second capacitor C2 according to a reset control signal Res transmitted by the reset control line ReL, so as to cooperate with the initial transistor Ti1 to reset the potential across the second capacitor C2.

[0038] Optionally, to prevent the light-emitting device Di from erroneously emitting light, the first voltage transmitted by the first voltage terminal VDD has a first voltage value V1 and a second voltage value V2, wherein the second voltage value V2 is greater than the first voltage value V1; and the voltage value transmitted by the second voltage terminal VSS is less than the second voltage value V2 and greater than or equal to the first voltage value V1. The first voltage terminal VDD has the second voltage value V2 when the driving transistor Tdr controls the light-emitting device Di to emit light.

[0039] Optionally, the first voltage value V1 may be 0 V, and the second voltage value V2 may be 12 V. The voltage value supplied by the third voltage terminal may be equal to the voltage value supplied by the second voltage terminal.

[0040] FIG4 is a flow chart of a pixel driving circuit provided in an embodiment of the present application. The present application also provides a method for controlling a pixel driving circuit, which is configured to control any of the above-mentioned pixel driving circuits. The method for controlling a pixel driving circuit includes:

[0041] The first switch Swi disconnects the electrical connection between the output terminal of the discharge transistor Tdc and the third voltage terminal Vref according to the external control signal EC;

[0042] The discharge transistor Tdc is turned on in response to the pulse-width modulated voltage Vpwm output by the pulse-width modulated voltage transmission module 202, electrically connecting the output terminal of the initial voltage transmission module 201 to the output terminal of the discharge transistor Tdc. The external detection module 100 detects the potential at the output terminal of the discharge transistor Tdc. Specifically, the control terminal of the discharge transistor Tdc receives the pulse-width modulated voltage Vpwm to turn on the discharge transistor Tdc. The input terminal of the discharge transistor Tdc receives the initial voltage Vi, causing the initial voltage Vi to be output to the output terminal of the discharge transistor Tdc, so that the potential at the output terminal of the discharge transistor Tdc can be detected by the external detection module 100.

[0043] Optionally, when the pixel driving circuit is applied to a display panel, the first switch Swi may disconnect the electrical connection between the output end of the discharge transistor Tdc and the third voltage end Vref according to the external control signal EC when the display panel is turned on, so as to detect the threshold voltage Vth of the discharge transistor Tdc, and store the detected threshold voltage Vth of the discharge transistor Tdc in the external detection module 100, so as to compensate the threshold voltage Vth of the discharge transistor Tdc according to the data stored in the external detection module 100 when the light-emitting device Di emits light. By detecting the threshold voltage Vth of the discharge transistor Tdc only once when the display panel is powered on, the threshold voltage Vth information detected at power-on can be used for compensation during the stages when the light-emitting device Di performs multiple displays. This helps reduce power consumption. Detecting the threshold voltage Vth of the discharge transistor Tdc no longer occupies time for light emission or threshold voltage Vth compensation. This can improve the duty cycle of the pulse width modulation signal SPWM caused by the internal compensation threshold voltage Vth or light emission time occupied by detecting the threshold voltage Vth of the discharge transistor Tdc. This can further reduce the duty cycle of the pulse width modulation signal SPWM when the display panel displays low grayscale images, potentially causing display problems such as flicker to be observed by the human eye.

[0044] Optionally, the pixel driving circuit further includes a pulse amplitude modulation module 300 electrically connected to the driving transistor Tdr. Accordingly, referring to FIG. 4 , after the discharge transistor Tdc is turned on in response to the pulse width modulation voltage Vpwm output by the pulse width modulation voltage transmission module 202, electrically connecting the output terminal of the initial voltage transmission module 201 to the output terminal of the discharge transistor Tdc, and the external detection module 100 detects the potential of the output terminal of the discharge transistor Tdc, the circuit further includes:

[0045] The pulse amplitude modulation module 300 receives a pulse amplitude modulation signal SPAM and couples a pulse amplitude modulation voltage Vpam to the control terminal of the driving transistor Tdr, so that the driving transistor Tdr controls the amplitude of the driving current according to the pulse amplitude modulation voltage Vpam;

[0046] The pulse width modulation module 200 receives the sweep signal Swe and couples the control terminal potential of the discharge transistor Tdc to electrically connect the third voltage terminal Vref and the control terminal of the driving transistor Tdr when the discharge transistor Tdc is turned on, thereby controlling the driving transistor Tdr to stop driving the light-emitting device Di to emit light.

[0047] Optionally, the pulse amplitude modulation module 300 includes a first capacitor C1, wherein a first end of the first capacitor C1 is electrically connected to the control end of the discharge transistor Tdc, and a second end of the first capacitor C1 is electrically connected to a sweep control line SwL that transmits the sweep signal Swe. The sweep signal Swe is coupled to the potential of the control end of the discharge transistor Tdc via the first capacitor C1, so that the pulse width modulation module 200 is coupled to the potential of the control end of the discharge transistor Tdc via the first capacitor C1.

[0048] Figures 5A and 5B are timing diagrams of a pixel driving circuit provided in an embodiment of the present application. Taking the case where each transistor included in the pixel driving circuit is an N-type transistor as an example, the control method of the pixel driving circuit is described. Figure 5A is a timing diagram of the pixel driving circuit implementing detection of the threshold voltage Vth of the discharge transistor Tdc, and Figure 5B is a timing diagram of the pixel driving circuit implementing control of the light-emitting device Di. Data represents the signal transmitted by the data line DL.

[0049] Continuing to refer to FIG. 3A to FIG. 3C and FIG. 5A , the threshold voltage Vth of the discharge transistor Tdc is detected through an initialization phase ta1 and a detection phase ta2 .

[0050] Please continue to refer to Figures 3B and 5A. In the initialization stage ta1: the first switch Swi is closed according to the external control signal EC; the detection control signal Cont and the pulse width modulation signal SPWM are high, so that the initial transistor Ti1 is turned on according to the detection control signal Cont, and the first data transistor Tda1 is turned on according to the pulse width modulation signal SPWM. The initial voltage Vi is transmitted to the input end of the discharge transistor Tdc through the initial transistor Ti1, and the pulse width modulation voltage Vpwm transmitted by the data line DL is transmitted to the control end of the discharge transistor Tdc.

[0051] Continuing with FIG3C and FIG5A , during the detection phase ta2 , the first switch Swi electrically disconnects the output terminal of the discharge transistor Tdc from the third voltage terminal Vref at the boundary between the initialization phase ta1 and the detection phase ta2 , according to the external control signal EC. The discharge transistor Tdc remains on, and the initial voltage Vi is transmitted to the output terminal of the discharge transistor Tdc via the input terminal of the discharge transistor Tdc to charge the output terminal of the discharge transistor Tdc until the voltage difference Vgs between the control terminal and the output terminal of the discharge transistor Tdc equals the threshold voltage Vth of the discharge transistor Tdc (i.e., Vgs=Vth). At this point, the initial voltage Vi stops charging the output terminal of the discharge transistor Tdc. The external detection module 100 detects the potential of the output terminal of the discharge transistor Tdc and determines the threshold voltage Vth of the discharge transistor Tdc based on the voltage difference between the control terminal and the output terminal of the discharge transistor Tdc being equal to the threshold voltage Vth of the discharge transistor Tdc.

[0052] In the initialization phase ta1 and the detection phase ta2 , the compensation transistor Tc is turned off according to the compensation control signal Comp, the second data transistor Tda2 is turned off according to the pulse amplitude modulation signal SPAM, and the reset transistor Ti2 is turned off according to the reset control signal Res.

[0053] 3A to 3C and 5B , the control of the light-emitting device Di goes through a reset phase t1, a compensation phase t2, a data writing phase t3, and a light-emitting phase t4. During the control phase of the light-emitting device Di, the first switch Swi is closed according to the external control signal EC to electrically connect the output end of the discharge transistor Tdc to the third voltage end Vref.

[0054] In the reset stage t1: the reset control signal Res and the detection control signal Cont have a high level, the reset transistor Ti2 is turned on according to the reset control signal Res, the initial transistor Ti1 is turned on according to the detection control signal Cont, the initial voltage Vi is transmitted to the control end of the driving transistor Tdr, and the reset signal transmitted by the data line DL is transmitted to the first end of the second capacitor C2, so as to initialize the potential across the third capacitor C3 using the initial voltage Vi and the voltage provided by the third voltage end Vref, and initialize the potential across the second capacitor C2 using the initial voltage Vi and the voltage corresponding to the reset signal.

[0055] In the compensation stage t2: the compensation control signal Comp has a high level, the compensation transistor Tc is turned on, so that the driving transistor Tdr is in a diode connection, and the potential of the control terminal of the driving transistor Tdr is pulled down by the third voltage terminal Vref until the difference between the voltage at the control terminal of the driving transistor Tdr and the voltage provided by the third voltage terminal Vref is equal to the threshold voltage Vth_T2 of the driving transistor Tdr. Then, the third voltage terminal Vref stops pulling down the potential of the control terminal of the driving transistor Tdr, so that the voltage Vg_T2 of the control terminal of the driving transistor Tdr is the sum of the voltage provided by the third voltage terminal Vref and the threshold voltage Vth_T2 of the driving transistor Tdr (i.e., Vg_T2=Vref+Vth_T2). The threshold voltage Vth_T2 of the driving transistor Tdr is stored in the second end of the second capacitor C2, thereby achieving internal compensation for the threshold voltage Vth_T2 of the driving transistor Tdr.

[0056] During the data writing phase t3, the pulse-width modulation signal SPWM is at a high level, the first data transistor Tda1 is turned on, and the pulse-width modulation voltage Vpwm transmitted by the data line DL is transmitted to the control terminal of the discharge transistor Tdc via the first data transistor Tda1, causing the voltage at the control terminal of the discharge transistor Tdc to be the pulse-width modulation voltage Vpwm. Subsequently, the frequency sweep signal Swe changes from a high level to a low level. The change in the frequency sweep signal Swe is coupled to the control terminal of the discharge transistor Tdc via the first capacitor C1, causing the potential of the control terminal of the discharge transistor Tdc to be pulled low, turning off the discharge transistor Tdc. Afterwards, the pulse amplitude modulation signal SPAM is at a high level, the second data transistor Tda2 is turned on, and the pulse amplitude modulation voltage Vpam is transmitted to the first end of the second capacitor C2 via the second data transistor Tda2, and is coupled to the control end of the driving transistor Tdr via the second capacitor C2, so that the voltage at the control end of the driving transistor Tdr is changed from the sum of the voltage provided by the third voltage end Vref and the threshold voltage Vth of the driving transistor Tdr to the sum of the voltage provided by the third voltage end Vref, the threshold voltage Vth of the driving transistor Tdr, and the pulse amplitude modulation voltage Vpam (i.e., Vg_T2=Vref+Vth_T2+Vpam).

[0057] The light emitting stage t4: the driving transistor Tdr is turned on, and the driving current Ids=K*(Vgs_T2-Vth_T2) flowing through the light emitting device Di emits light 2 =K*(Vpam+Vref+Vth_T2-VSS-Vth_T2) 2 =K*(SPAM_data+Vref-VSS) 2 Therefore, the driving current flowing through the light emitting device Di is no longer affected by the threshold voltage Vth_T2 of the driving transistor Tdr. ox μ n W) / 2L; C ox 、μ n , W and L represent the channel capacitance per unit area, channel mobility, channel width and channel length, respectively.

[0058] Optionally, the voltage value corresponding to the sweep signal Swe can be gradually increased during the light-emitting stage to couple the control terminal potential of the discharge transistor Tdc through the first capacitor C1 until the discharge transistor Tdc is turned on, and the voltage provided by the third voltage terminal Vref is transmitted to the control terminal of the driving transistor Tdr through the discharge transistor Tdc, so that the driving transistor Tdr is turned off, thereby controlling the light-emitting device Di to stop emitting light, thereby achieving control of the light-emitting duration of the light-emitting device Di.

[0059] Optionally, different pulse width modulation voltages Vpwm may be transmitted to the control terminal of the discharge transistor Tdc during the data writing phase t3 to control the opening time of the discharge transistor Tdc, thereby controlling the light emitting duration of the light emitting device Di at different grayscales.

[0060] Optionally, the external detection module 100 is configured to detect the threshold voltage Vth of the discharge transistor Tdc when the display panel is turned on, so as to reduce power consumption and improve flickering and other problems.

[0061] Optionally, the external detection module 100 can also be configured to superimpose the detected and stored threshold voltage Vth of the discharge transistor Tdc on the signal Data transmitted by the data line DL during the stage when the display panel controls the sub-pixel Pi to realize display (i.e., corresponding to the stage t1 to t4 shown in FIG5B ), so as to achieve a compensation effect for the threshold voltage Vth of the discharge transistor Tdc and improve the display quality of the display panel.

[0062] This document uses specific examples to illustrate the principles and implementation methods of this application. The description of the above embodiments is only used to help understand the method and core ideas of this application. At the same time, for technical personnel in this field, based on the ideas of this application, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as limiting this application.

Claims

1. A pixel driving circuit for a display panel, wherein: The pixel driving circuit comprises: A driving transistor, wherein an input terminal and an output terminal of the driving transistor are electrically connected between the first voltage terminal and the second voltage terminal; a light emitting device, electrically connected between the input terminal of the driving transistor and the first voltage terminal; A pulse width modulation module, comprising a discharge transistor, a first switch, an initial voltage transmission module and a pulse width modulation voltage transmission module, wherein the discharge transistor is electrically connected between the control terminal of the driving transistor and the first switch; wherein the first switch is configured to disconnect or connect the output terminal of the discharge transistor and the third voltage terminal according to an external control signal, the input terminal of the discharge transistor is connected to the output terminal of the initial voltage transmission module, and the control terminal of the discharge transistor is connected to the output terminal of the pulse width modulation voltage transmission module; Wherein, the display panel further comprises an external detection module connected to the pixel driving circuit, and the external detection module is configured to detect the potential of the output end of the discharge transistor.

2. The pixel driving circuit according to claim 1, wherein: The initial voltage transmission module includes an initial transistor, an input end of the initial transistor is electrically connected to an initial voltage end, an output end of the initial transistor is electrically connected to a control end of the driving transistor and an output end of the initial voltage transmission module, and the control end of the initial transistor is electrically connected to a detection control line; The pulse width modulation voltage transmission module includes a first data transistor, an input end of the first data transistor is electrically connected to a data line, an output end of the first data transistor is electrically connected to an output end of the pulse width modulation voltage transmission module, and a control end of the first data transistor is electrically connected to a pulse width modulation control line.

3. The pixel driving circuit according to claim 2, wherein: The pulse width modulation module also includes: A first capacitor, wherein a first end of the first capacitor is electrically connected to the control end of the discharge transistor, and a second end of the first capacitor is electrically connected to the frequency sweep control line.

4. The pixel driving circuit according to claim 1, wherein: Also included is a pulse amplitude modulation module, the pulse amplitude modulation module comprising: a compensation transistor, wherein a control terminal of the compensation transistor is electrically connected to a compensation control line, an input terminal of the compensation transistor is electrically connected to an input terminal of the driving transistor, and an output terminal of the compensation transistor is electrically connected to a control terminal of the driving transistor; a second data transistor, wherein an input terminal of the second data transistor is electrically connected to a data line, an output terminal of the second data transistor is electrically connected to a control terminal of the driving transistor, and a control terminal of the second data transistor is electrically connected to a pulse amplitude modulation control line; a second capacitor, wherein a first end of the second capacitor is electrically connected to the output end of the second data transistor, and a second end of the second capacitor is electrically connected to the control end of the driving transistor; and A third capacitor, wherein a first end of the third capacitor is electrically connected to the control end of the driving transistor, and a second end of the second capacitor is electrically connected to the second voltage end.

5. The pixel driving circuit according to claim 4, wherein: The pulse amplitude modulation module also includes: A reset transistor, wherein an input end of the reset transistor is electrically connected to the data line, an output end of the reset transistor is electrically connected to the first end of the second capacitor, and a control end of the reset transistor is electrically connected to a reset control line.

6. The pixel driving circuit according to claim 1, wherein: The first voltage transmitted by the first voltage terminal has a first voltage value and a second voltage value, and the second voltage value is greater than the first voltage value; The voltage value transmitted by the second voltage terminal is less than the second voltage value and greater than or equal to the first voltage value; Wherein, the first voltage terminal has the second voltage value when the driving transistor controls the light-emitting device to emit light.

7. A method for controlling a pixel driving circuit, wherein: is configured to control the pixel driving circuit as claimed in claim 1, comprising: The first switch disconnects the electrical connection between the output terminal of the discharge transistor and the third voltage terminal according to the external control signal; The discharge transistor is turned on according to the pulse width modulation voltage output by the pulse width modulation voltage transmission module, so that the output end of the initial voltage transmission module is electrically connected to the output end of the discharge transistor, and the external detection module detects the potential of the output end of the discharge transistor.

8. The control method of the pixel driving circuit according to claim 7, wherein: The pixel driving circuit also includes a pulse amplitude modulation module electrically connected to the driving transistor; Wherein, after the discharge transistor is turned on according to the pulse width modulation voltage output by the pulse width modulation voltage transmission module, so that the output end of the initial voltage transmission module is electrically connected to the output end of the discharge transistor, and the external detection module detects the potential of the output end of the discharge transistor, it also includes: coupling a pulse amplitude modulation voltage to a control terminal of the driving transistor through the pulse amplitude modulation module, so that the driving transistor controls the amplitude of the driving current according to the pulse amplitude modulation voltage; The discharge transistor control terminal potential is coupled through the pulse width modulation module to electrically connect the third voltage terminal and the control terminal of the driving transistor when the discharge transistor is turned on, so as to control the driving transistor to stop driving the light emitting device to emit light.

9. The control method of the pixel driving circuit according to claim 8, wherein: The pulse amplitude modulation module includes a first capacitor, a first end of the first capacitor is electrically connected to the control end of the discharge transistor, and a second end of the first capacitor is electrically connected to the frequency sweep control line; The pulse width modulation module couples the potential of the control end of the discharge transistor through the first capacitor.

10. A display panel, wherein: include: A pixel driving circuit, wherein the pixel driving circuit comprises a driving transistor, a light emitting device and a pulse width modulation module; The input terminal and the output terminal of the driving transistor are electrically connected between the first voltage terminal and the second voltage terminal; the light emitting device is electrically connected between the input terminal of the driving transistor and the first voltage terminal; The pulse width modulation module includes a discharge transistor, a first switch, an initial voltage transmission module and a pulse width modulation voltage transmission module, wherein the discharge transistor is electrically connected between the control terminal of the driving transistor and the first switch; wherein the first switch is configured to disconnect or connect the output terminal of the discharge transistor and the third voltage terminal according to an external control signal, the input terminal of the discharge transistor is connected to the output terminal of the initial voltage transmission module, and the control terminal of the discharge transistor is connected to the output terminal of the pulse width modulation voltage transmission module; and The external detection module is electrically connected to the output end of the discharge transistor, and is configured to output the external control signal and detect the potential of the output end of the discharge transistor.

11. The display panel according to claim 10, wherein: The initial voltage transmission module includes an initial transistor, an input end of the initial transistor is electrically connected to an initial voltage end, an output end of the initial transistor is electrically connected to a control end of the driving transistor and an output end of the initial voltage transmission module, and the control end of the initial transistor is electrically connected to a detection control line; The pulse width modulation voltage transmission module includes a first data transistor, an input end of the first data transistor is electrically connected to a data line, an output end of the first data transistor is electrically connected to an output end of the pulse width modulation voltage transmission module, and a control end of the first data transistor is electrically connected to a pulse width modulation control line.

12. The display panel according to claim 11, wherein: The pulse width modulation module also includes: A first capacitor, wherein a first end of the first capacitor is electrically connected to the control end of the discharge transistor, and a second end of the first capacitor is electrically connected to the frequency sweep control line.

13. The display panel according to claim 10, wherein: The pixel driving circuit further includes a pulse amplitude modulation module, and the pulse amplitude modulation module includes: a compensation transistor, wherein a control terminal of the compensation transistor is electrically connected to a compensation control line, an input terminal of the compensation transistor is electrically connected to an input terminal of the driving transistor, and an output terminal of the compensation transistor is electrically connected to a control terminal of the driving transistor; a second data transistor, wherein an input terminal of the second data transistor is electrically connected to a data line, an output terminal of the second data transistor is electrically connected to a control terminal of the driving transistor, and a control terminal of the second data transistor is electrically connected to a pulse amplitude modulation control line; a second capacitor, wherein a first end of the second capacitor is electrically connected to the output end of the second data transistor, and a second end of the second capacitor is electrically connected to the control end of the driving transistor; and A third capacitor, wherein a first end of the third capacitor is electrically connected to the control end of the driving transistor, and a second end of the second capacitor is electrically connected to the second voltage end.

14. The display panel according to claim 13, wherein: The pulse amplitude modulation module also includes: A reset transistor, wherein an input end of the reset transistor is electrically connected to the data line, an output end of the reset transistor is electrically connected to the first end of the second capacitor, and a control end of the reset transistor is electrically connected to a reset control line.

15. The display panel according to claim 10, wherein: The first voltage transmitted by the first voltage terminal has a first voltage value and a second voltage value, and the second voltage value is greater than the first voltage value; The voltage value transmitted by the second voltage terminal is less than the second voltage value and greater than or equal to the first voltage value; Wherein, the first voltage terminal has the second voltage value when the driving transistor controls the light-emitting device to emit light.

Images