Digital twin system for target controller

Abstract

Provided in the present application is a digital twin system for a target controller, the system comprising a system operating layer, an environment construction layer, a test layer and an analysis layer, wherein the system operating layer is used for simulating the operating state of a digital twin target controller; the environment construction layer is used for building a system operating environment; the test layer is used for transmitting a test instruction to the system operating layer, so as to perform a simulated test in the system operating layer; and the analysis layer receives returned test data transmitted by the test layer, and performs fault cause analysis and recording on fault-related data in the returned test data. The digital twin system for a target controller in the present application virtualizes the operating state of the target controller on a host computer, so that embedded development no longer relies on customized hardware; the hardware design, software functionality and system performance of the system can be verified in advance before real hardware is manufactured; and timely optimization can be performed after design defects are found, so that the number of iterations of product research and development is reduced, and the research and development cost is saved on.

Description

A digital twin system of target controller Technical Field

[0001] The present application relates to a target controller digital twin system. Background Art

[0002] In the field of rail transit, the target controller replaces the relay circuits and monitoring circuits in the traditional computer interlocking system to realize the driving and collection of trackside equipment such as switches, signal machines, and electronic coding equipment.

[0003] With the widespread adoption of target controllers in national railways and urban rail transit, their long R&D cycles and high resource consumption are becoming bottlenecks, hindering their development progress. Because target controllers run embedded software on a customized motherboard, development costs are high and customization cycles are long. Hardware design issues with target controllers require significant time to correct. Target controllers feature distributed and two-by-two-out-of-two systems, offering flexible and adaptable configurations and a wide variety of loads. Verifying diverse application scenarios requires building complex experimental environments and investing significant hardware resources. Limited by hardware resources and lab space, the target controller R&D and testing teams are limited in the number of real-world environments they can build. Development, debugging, and testing tasks often lead to resource conflicts, delaying project progress and preventing them from adapting to the growing demand for new target controllers. Summary of the Invention

[0004] The purpose of the present invention is to provide a target controller digital twin system with the advantages of low R&D cost and short R&D cycle.

[0005] To achieve the above objectives, the present invention provides a target controller digital twin system, which comprises:

[0006] The system operation layer loads the CPU module to simulate the operating status of the target controller of the digital twin.

[0007] An environment construction layer, in which binary code is loaded to implement the construction of the system operation environment in the system operation layer;

[0008] The test layer is used to transmit the test instructions to the system operation layer to perform simulation tests in the system operation layer, and the test layer uploads the test return data generated after the test is completed;

[0009] The analysis layer receives the test return data transmitted by the test layer, and performs fault cause analysis and records the fault-related data in the test return data.

[0010] Preferably, the system operation layer utilizes software to simulate the embedded kernel on the host computer to achieve simulation of registers, memory and instruction sets.

[0011] Preferably, the embedded core is an MCF54418 embedded core, and the instruction set is a Cold Fire V4 instruction set.

[0012] Preferably, the system operation layer executes embedded software on the host computer, and the embedded software includes ReWorks CERT operating system and application software.

[0013] Preferably, the system operation layer includes a safety communication module and a GUEST module, and the operation states of the safety communication module and the GUEST module are simulated in the system operation layer.

[0014] Preferably, the system operation layer is used to simulate a processing unit including a VCU as a core and peripheral functional circuits, and the peripheral functional circuits are used to simulate external signals as inputs of the VCU.

[0015] Preferably, the VCU has a dual-channel architecture, each channel is provided with a CPU, and high-frequency 2oo2 interactive communication is achieved between the dual channels by simulating an internal serial port.

[0016] Preferably, external network communication, serial port communication and CAN communication interfaces are set between the target controller digital twin system and the external interlocking system, and the CAN communication interface of the system operation layer is used to connect and communicate with the CAN bus of the real target controller system.

[0017] Preferably, the secure communication module includes a plurality of external network ports and internal network ports, the external network ports are used for external network communication, and the internal network ports are used for communication with the secure communication module of another module.

[0018] Preferably, the secure communication module and the GUEST module operate independently of each other.

[0019] Preferably, the environment construction layer reads predefined application design input files, constructs hardware device resources according to the application design input files, forms a multi-configuration item multi-machine test environment, virtually runs multiple CPUs and peripherals in the host computer, and deploys binary application files and binary application data files to the secure communication module and the GUEST module.

[0020] Preferably, the system operation layer, the environment construction layer, the test layer and the analysis layer are physically isolated from each other. The system operation layer, the environment construction layer, the test layer and the analysis layer can all operate independently, and can also be interconnected in real time through interfaces.

[0021] In summary, compared with the prior art, the target controller digital twin system provided by the present invention has the following beneficial effects:

[0022] The target controller digital twin system of the present application makes embedded development work no longer rely on customized hardware by realizing the running status of the virtual target controller on the host computer. The system's hardware design, software functions and system performance can be verified in advance when the real hardware is not manufactured, and timely optimization can be carried out after design defects are discovered, reducing the number of iterations of product development and saving R&D costs; based on digital twin technology, system function testing, software stability testing and software reliability testing are performed, effectively alleviating the resource conflicts caused by development and debugging work and testing work faced by existing systems, and shortening the R&D cycle; in addition, a multi-configuration item and multi-machine test environment is formed according to the needs of the application scenario, which can realize the restoration of complex on-site scenes when troubleshooting, quickly reproduce on-site problems, and locate the cause of the fault in time, reducing the manpower consumption of after-sales work and reducing the maintenance cost of the real system. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 is a structural diagram of the digital twin system of the target controller of this application.

[0024] FIG2 is a schematic diagram of the modeling of the VCU in the target controller of this application. Implementation Method

[0025] The technical solutions, structural features, achieved objectives and effects of the embodiments of the present invention will be described in detail below with reference to FIG1 and FIG2 of the embodiments of the present invention.

[0026] It should be noted that the drawings are in a very simplified form and use non-precise proportions. They are only used to conveniently and clearly assist in explaining the embodiments of the present invention, and are not used to limit the conditions for the implementation of the present invention. Therefore, they have no substantive technical significance. Any structural modification, change in proportional relationship or adjustment of size should still fall within the scope of the technical content disclosed in the present invention without affecting the efficacy and purpose that can be achieved by the present invention.

[0027] It should be noted that, in the present invention, relational terms such as first and second, etc. are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus comprising a series of elements includes not only the elements explicitly listed, but also other elements not explicitly listed, or elements inherent to such process, method, article, or apparatus.

[0028] As shown in Figure 1, the present invention provides a target controller digital twin system, comprising a system operation layer, an environment construction layer, a test layer, and an analysis layer. The system operation layer is the core of the entire target controller digital twin system. A virtual CPU module is dynamically loaded within the system operation layer, which is used to simulate the operating state of the digital twin target controller. The environment construction layer is the foundation of the system operation layer and is located below the system operation layer to ensure the operation of the system operation layer. Binary code is loaded within the environment construction layer to implement the construction of the system operation environment. The environment construction layer reads predefined application design input files, constructs hardware device resources based on the application design input files, and forms a multi-configuration multi-machine test environment. It virtually runs multiple CPUs and peripherals in the host computer and deploys binary application files and binary application data files to the secure communication module and the guest module. The test layer is located between the system operation layer and the analysis layer. Specifically, the test layer is located below the system operation layer and above the analysis layer. The test layer transmits test instructions to the system operation layer according to test requirements and transmits test return data to the analysis layer. The analysis layer sits at the top level of the entire system. After a test is executed, it receives the test return data transmitted by the test layer, analyzes and records the fault-related data in the test return data, and outputs the test results. Based on digital twin technology, the system operation layer, environment construction layer, test layer, and analysis layer utilize the hardware resources of the host computer device to simulate the hardware and software functions of the target controller. This software simulation is embedded in the target machine environment, achieving virtualization of a complete, real-world system.

[0029] The system runtime layer uses software to simulate an embedded kernel on the host computer, simulating registers, memory, and instruction sets, and configuring CPU frequency, memory, and other parameters. The embedded kernel is the MCF54418 embedded kernel, and the instruction set is the Cold Fire V4 instruction set. The existing target controller uses the MCF54418 embedded kernel, which is simulated within the system runtime layer. This narrows the gap between the simulated results of the target controller's digital twin system and the actual target controller's output, improving the similarity between the digital twin system and the actual target controller.

[0030] The system runtime layer executes embedded software on the host computer, including the ReWorks CERT operating system and application software. Applications run directly in the system runtime layer, generating output identical to real-world results when given the same hardware input conditions and runtime as a real target controller.

[0031] The system operation layer includes a safety communication module and a guest module, which are used to simulate their operational status. The guest module refers to the board responsible for controlling various signaling devices in the target control system (such as the state acquisition board, turnout drive board, and signal light drive board). It controls outdoor signaling devices based on drive commands and collects their status. Based on the structural characteristics of the safety communication module and guest module in the real target controller, both modules utilize the Vital Control Unit (VCU) as the core processing unit, expanding various peripheral functional circuits. These simulated external signals serve as inputs to the target controller's digital twin system. After being input into the system, these simulated external signals are processed within the VCU. Furthermore, the target controller's digital twin system is configured with a corresponding operational environment and communication protocol based on scenario requirements. It connects to other test systems through interface management to form a closed-loop operational environment. Based on the two-in-two architecture of the real target controller, a virtual VCU module with a dual-channel architecture is constructed, with a CPU for each channel. Two-out-of-two (2-out-of-2) communication in the real target controller involves two identical computation units taking two results and outputting them if they match. If they differ, the results are not output. Each channel uses a virtual MCF54418 CPU as its core processor, and the two channels communicate with each other via a simulated internal serial port, achieving high-frequency 2oo2 (2-out-of-2) communication. The VCU in the system runtime layer simulates the VCU in the real target controller, and VCU operations are performed based on the CPU loaded in the system runtime layer.

[0032] The safety communication module and guest module operate independently. To simulate scenarios such as board power-on, power-off, or removal, either safety communication module or guest module can be started or stopped independently at any time. To simulate single-channel failures, either safety communication module or guest module CPU can be stopped independently at any time.

[0033] External network communication, serial communication, and CAN communication interfaces are set up between the system operation layer and external interlocking systems, such as iLOCK-II, TACS, and TIS. The CAN communication interface of the system operation layer is used to connect and communicate with the CAN bus of the actual target controller system. iLOCK-II (Intelligent Inter Locking System-II, second-generation safe intelligent computer interlocking system) is a new generation of two-by-two intelligent safety computer interlocking system. It utilizes a high-performance wayside safety platform and integrates technologies such as parallel drive and acquisition, information security sharing, multiple redundancy, and bumpless switching, meeting user requirements for high performance, scalability, and easy maintenance. TACS (Train Autonomous Circumambulate System, based on train-to-train communication) is a signaling system that enables autonomous resource management and active separation protection based on train operation plans and real-time positions. This system achieves safety, efficiency, and economy through train-to-ground interlocking and train-to-train coordination. TIS (Train Control Center and Interlocking Integrated System) integrates the functions of the train control center and computer interlocking system. It controls wayside equipment through electronic actuators or relay interfaces, effectively reducing the number of ground signaling devices and reducing their complexity. CAN (Controller Area Network) is a serial communication protocol bus designed for real-time applications that uses twisted-pair cables for signal transmission. The system configures the number of serial ports and baud rate, the number of Ethernet ports and IP addresses, and the number of CAN buses and their parameters based on scenario requirements. Two virtual CAN buses support communication with real CAN buses, meeting the requirements for scenarios where a target controller consists of some virtual modules and some real modules. Multiple communication protocols are supported, configured based on scenario requirements. RSSP-I and FSFB2 protocols are supported for network communication with real devices in security subsystems such as IPS-200, RMU, and TISPS. SNMP, TFTP, UDP, and SNTP protocols are supported for network communication with real devices in maintenance systems such as SDM (System Diagnosis Maintenance System), CMSS (Centralized Maintenance Support System), and IOM (Integrated Operational Maintenance System). Network communication with the host computer of the simulation test system is standardized by setting up simulation interfaces.The Interlocking Processing System-200 (IPS-200), the second-generation interlocking processing system, is the core subsystem of iLOCK-II, providing functions such as input and output management, logical operations, and safety checks. The Resource Management Unit (RMU) allocates and releases resources and their associated resources according to resource management commands, communicates with target controllers within its jurisdiction, and controls and manages the target controller devices. The TISPS (Train Control and Interlocking Integrated System Processing Subsystem) is the core processing unit of the TIS equipment, integrating the train control center subsystem with interlocking logic operations and control functions to achieve integrated train control and interlocking. The Railway Signal Safety Protocol-I (RSSP-I) is a specification for secure communication between railway signaling equipment. The RSSP-I secure communication protocol defines the functional structure and protocol for communication between equipment in a closed transmission system. The RSSP-I secure communication protocol primarily identifies and protects against the following security threats: data frame duplication, data frame loss, data frame insertion, data frame out of sequence, data frame errors, and data frame transmission timeouts. The FSFB2 (Fail Safe Field Bus second generation) protocol consists of two main layers: a security layer and an application layer. The FSFB / 2 security layer can be implemented on a conventional data link layer and is used to transmit secure data within an open transmission system. The security layer is the core of the FSFB / 2 protocol, primarily responsible for protecting against potential threats in open transmission systems and ensuring secure data transmission. The FSFB / 2 application layer utilizes the services provided by the security layer to implement data exchange. The Simple Network Management Protocol (SNMP) offers the advantages of simplicity and scalability. It includes a database schema, an application layer protocol, and data files. The SNMP management protocol not only enhances the effectiveness of network management systems but also enables real-time management and monitoring of network resources. TFTP (Trivial File Transfer Protocol) is a protocol within the TCP / IP suite used for simple file transfers between clients and servers, providing uncomplicated and low-cost file transfer services. UDP (User Datagram Protocol) provides a method for applications to send encapsulated IP packets without establishing a connection.SNTP (Simple Network Time Protocol) is adapted from NTP and is mainly used to synchronize computer clocks on the Internet.

[0034] The environment construction layer builds and deploys the system operating environment, reads predefined application design input files, virtualizes the hardware device resources of the target controller according to the file content, composes a multi-configuration multi-machine test environment according to the needs of the application scenario, virtually runs multiple CPUs and their peripherals in the host computer, and deploys binary application files and binary application data files to the virtualized security communication module and GUEST module of the target controller.

[0035] The test layer manages test cases, completes fault injection according to test requirements, generates test instructions and transmits them to the system operation layer. The analysis layer receives and manages the test return data, analyzes and records fault-related data, and outputs debugging information and test results through the RS232 serial port or network port.

[0036] The system operation layer, environment construction layer, test layer, and analysis layer are highly cohesive and loosely coupled. Each layer encapsulates a portion of the system's functionality and provides interfaces for other layers to access its encapsulated functionality. This achieves physical isolation between layers, facilitating functional expansion and system integration. Each layer can operate independently or be interconnected in real time through interfaces, enabling multiple operating modes based on the needs of different usage scenarios.

[0037] The secure communication module includes multiple external network ports and internal network ports. The external network ports are used for external network communication, and the internal network ports are used to communicate with the secure communication module of another module. In this embodiment, the secure communication module provides three external network ports to realize external network communication of the target controller, and provides one internal network port to realize internal network communication with another secure communication module in the system. For each channel, the binary code and electronic stamp of the secure communication module are stored in the Flash of the virtual VCU. The secure communication module reads the configuration data through two SPI (Serial Peripheral Interface) channels and stores it in other virtual Flash peripherals. Inside the secure communication module, data is exchanged with the GUEST module in the system through two virtual CAN buses.

[0038] The overall architecture of the guest module is similar to that of the safety communication module, but the guest module of the actual target controller contains numerous hardware components, including relays, self-test circuits, ADC digital sampling, and FPGAs. At the system operation layer, based on the structure of each guest module, external signals are simulated to implement functions such as module self-test, drive command execution and feedback, and the acquisition of switching and analog values, providing the necessary self-test and operational conditions for the system.

[0039] As shown in Figure 2, a simulation project is built using a visual graphical modeling and simulation development environment interface to simulate the VCU's internal design and the interactions between multiple VCUs. The VCU_0 module describes the VCU's dual CPU layout, drawing the system architecture based on core, RAM, SPI, UART, Flash, NET, GPIO, and CAN peripherals. VCU_1 describes the communication between multiple VCUs via the CAN_linker.

[0040] The target controller digital twin system of this embodiment addresses the technical problems of existing target controllers, such as high R&D costs, long R&D cycles, easy resource conflicts, and the need to build complex experimental environments. By designing a virtual digital twin system and establishing a mapping relationship between the digital twin system and the real target controller, the mirror image of the physical target controller is realized at the digital level, the operating results of the real target controller device are predicted, and the R&D direction is corrected in a timely manner, thereby reducing R&D costs and improving R&D efficiency. By virtualizing the running state of the target controller on the host computer, embedded development work no longer relies on customized hardware. The hardware design, software functions and system performance of the system can be verified in advance when the real hardware is not manufactured. After the design defects are discovered, timely optimization is carried out, reducing the number of iterations of product development and saving R&D costs. The target controller digital twin system of this embodiment supports multiple communication protocols. When conducting laboratory simulation tests of systems such as iLOCK-II, TACS, and TIS, it realizes the rapid construction and deployment of the overall test environment, saving the hardware resources, laboratory space and time costs required for the existing equipment to build the environment. In addition, the target controller digital twin system of this embodiment performs system function testing, software stability testing and software reliability testing based on digital twin technology, effectively alleviating the resource conflicts caused by the development and debugging work and testing work faced by the existing system, shortening the R&D cycle. At the same time, the target controller digital twin system of this embodiment can also be used to form a multi-configuration multi-machine test environment according to the needs of the application scenario, realizing the restoration of complex on-site scenes when troubleshooting, quickly reproducing on-site problems, and promptly locating the cause of the fault, reducing the manpower consumption of after-sales work and reducing the maintenance cost of the real system.

[0041] The target controller digital twin system of this embodiment can be used in the research and development, testing, after-sales and other work of the target controller, effectively reducing the number of iterations of product research and development, alleviating the resource conflicts caused by development and debugging work and testing work, quickly locating on-site faults, reducing the manpower consumption of after-sales work, and reducing the maintenance cost of the real system.

[0042] Although the present invention has been described in detail through the above preferred embodiments, it should be understood that the above description is not intended to limit the present invention. After reading the above description, various modifications and substitutions of the present invention will become apparent to those skilled in the art. Therefore, the scope of protection of the present invention should be defined by the appended claims.

Claims

1. A target controller digital twin system, characterized in that: The target controller digital twin system includes: A system operation layer, wherein the system operation layer loads a CPU module to simulate the operation status of the target controller of the digital twin; An environment construction layer, in which binary code is loaded to implement the construction of the system operation environment in the system operation layer; The test layer is used to transmit the test instructions to the system operation layer to perform simulation tests in the system operation layer, and the test layer uploads the test return data generated after the test is completed; The analysis layer receives the test return data transmitted by the test layer, and performs fault cause analysis and records the fault-related data in the test return data.

2. The target controller digital twin system according to claim 1, characterized in that: The system operation layer utilizes software to simulate the embedded kernel on the host computer to achieve simulation of registers, memory and instruction sets.

3. The target controller digital twin system according to claim 2, characterized in that: The embedded kernel is the MCF54418 embedded kernel, and the instruction set is the Cold Fire V4 instruction set.

4. The target controller digital twin system according to claim 2, characterized in that: The system operation layer executes embedded software on the host computer, and the embedded software includes ReWorks CERT operating system and application software.

5. The target controller digital twin system according to claim 1, characterized in that: The system operation layer includes a safety communication module and a GUEST module, and the operation states of the safety communication module and the GUEST module are simulated in the system operation layer.

6. The target controller digital twin system according to claim 5, characterized in that: The system operation layer is used to simulate a processing unit including a VCU as a core and a peripheral functional circuit, and the peripheral functional circuit is used to simulate an external signal as an input of the VCU.

7. The target controller digital twin system according to claim 6, characterized in that: The VCU is a dual-channel architecture, each channel is provided with a CPU, and high-frequency 2oo2 interactive communication is achieved between the dual channels by simulating an internal serial port.

8. The target controller digital twin system according to claim 7, characterized in that: External network communication, serial port communication and CAN communication interfaces are arranged between the system operation layer and the external interlocking system. The CAN communication interface of the system operation layer is used for connecting and communicating with the CAN bus of the real target controller system.

9. The target controller digital twin system according to claim 8, characterized in that: The secure communication module includes a plurality of external network ports and internal network ports, wherein the external network ports are used for external network communication, and the internal network ports are used for communication with the secure communication module of another module.

10. The target controller digital twin system according to claim 5, characterized in that: The secure communication module and the GUEST module operate independently of each other.

11. The target controller digital twin system according to claim 5, characterized in that: The environment construction layer reads the predefined application design input file, builds hardware device resources according to the application design input file, forms a multi-configuration item multi-machine test environment, virtually runs multiple CPUs and peripherals in the host computer, and deploys binary application files and binary application data files to the secure communication module and the GUEST module.

12. The target controller digital twin system according to claim 1, characterized in that: The system operation layer, the environment construction layer, the test layer and the analysis layer are physically isolated from each other. The system operation layer, the environment construction layer, the test layer and the analysis layer can all operate independently, and can also be interconnected in real time through interfaces.

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