Optical module, and preparation method for optical chip

Abstract

An optical module (200), and a preparation method for an optical chip (900). The optical module (200) comprises an optical chip (900) and an optical fiber (101). The optical chip (900) comprises a first substrate (9101), a first buried layer (9102) provided on the first substrate (9101), a first cladding layer (9103) provided on the first buried layer (9102), a second cladding layer (9203) provided on the first cladding layer (9103), and a second buried layer (9202) provided on the second cladding layer (9203), wherein a first waveguide (905) that is away from the first substrate (9101), and a first metal electrode group are provided inside the first cladding layer (9103), and there is a first gap between the first waveguide (905) and the first substrate (9101); and a second waveguide (904) that is away from the first cladding layer (9103) and a second metal electrode group that is close to the first cladding layer (9103) are provided inside the second cladding layer (9203), the second metal electrode group is bonded to the first metal electrode group, the second waveguide (904) is coupled to the first waveguide (905), there is a second gap between the second waveguide and the first waveguide, and the optical fiber (101) is coupled to the first waveguide (905). The optical chip (900) has two substrates (9101, 9201), so as to integrate, in the optical chip (900), the first waveguide (905) that is very far away from the substrates, thereby increasing the distances between the first waveguide (905) and the substrates, and reducing the leakage loss of the substrates.

Description

Method for preparing optical module and optical chip

[0001] This application claims priority from application number 202311085828.7 filed with the China Patent Office on August 25, 2023; the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The present disclosure relates to the field of optical fiber communication technology, and in particular to a method for preparing an optical module and an optical chip. Background Art

[0003] Optical communication technology is used in emerging services and applications such as cloud computing, mobile internet, and video. Optical modules are devices that convert optical and electrical signals and are key components in optical communication equipment. Due to their small size, high integration density, and low cost, optical chips have become a mainstream solution for high-speed optical modules, enabling electro-optical to photoelectric conversion.

[0004] Summary of the Invention

[0005] The present disclosure provides an optical module, comprising:

[0006] circuit boards;

[0007] a light source electrically connected to the circuit board, the light source being configured to generate light that does not carry a signal;

[0008] an optical chip optically connected to the light source, the optical chip being configured to receive light generated by the light source that does not carry a signal, and to receive an external optical signal; wherein the optical chip comprises:

[0009] a first substrate;

[0010] a first buried layer, disposed on the first substrate along an epitaxial growth direction;

[0011] a first cladding layer disposed on the first buried layer along an epitaxial growth direction, wherein a first waveguide and a first metal electrode group are disposed in the first cladding layer, the first waveguide and the first metal electrode group are away from the first substrate, and a first gap is formed between the first waveguide and the first substrate;

[0012] a second cladding layer, disposed on the first cladding layer along an epitaxial growth direction, wherein a second waveguide and a second metal electrode group are disposed in the second cladding layer, the second waveguide being away from the first cladding layer, the second waveguide being coupled to the first waveguide, and a second gap being defined between the first waveguide and the second waveguide; and the second metal electrode group being close to the first cladding layer, and being bonded to the first metal electrode group.

[0013] a second buried layer, disposed on the second cladding layer along an epitaxial growth direction, wherein one side of the second waveguide is in contact with and connected to the second buried layer;

[0014] An optical fiber is coupled to the first waveguide and is used to transmit an optical signal.

[0015] The present disclosure also provides a method for preparing an optical chip, the method comprising:

[0016] growing a first buried layer along the first substrate;

[0017] growing a first cladding layer along the first buried layer, and forming a first waveguide by high-temperature deposition in the first cladding layer, with a first gap between the first waveguide and the first substrate;

[0018] forming a first metal electrode group within the first cladding layer;

[0019] growing a second buried layer along the second substrate;

[0020] depositing a grating coupler, a second waveguide, a modulator, a third waveguide, an adjustable attenuator and a detector on the second buried layer;

[0021] growing a second cladding layer on the grating coupler, the second waveguide, the modulator, the third waveguide, the adjustable attenuator, and the detector, and forming a second metal electrode group in the second cladding layer;

[0022] Etching via holes in the second cladding layer, wherein the modulator, the adjustable attenuator and the detector are electrically connected to the second metal electrode group through the via holes;

[0023] flipping the second cladding layer and placing it on the first cladding layer, and bonding the first metal electrode group and the second metal electrode group to form a second gap between the first waveguide and the second waveguide;

[0024] removing the second substrate and growing a third cladding layer on the second buried layer;

[0025] A third metal electrode group is formed in the third cladding layer, and via holes are etched in the third cladding layer, the second buried layer, and the second cladding layer. The third metal electrode group is electrically connected to the second metal electrode group through the via holes.

[0026] As can be seen from the above embodiments, the optical module provided by the embodiments of the present disclosure includes a circuit board, a light source electrically connected to the circuit board, an optical chip and an optical fiber, the light source is used to generate light that does not carry a signal, the optical chip is optically connected to the light source, the optical chip is used to receive the light that does not carry a signal generated by the light source, modulate the light that does not carry a signal, and couple the modulated signal light to the optical fiber, and the optical chip is used to receive an external optical signal transmitted by the optical fiber to realize the conversion of the photoelectric signal; the optical chip includes a first substrate, a first buried layer, a first cladding layer, a second cladding layer and a second buried layer, and the first buried layer is arranged on the first cladding layer along the epitaxial growth direction. On a substrate, a first cladding is arranged on a first buried layer along an epitaxial growth direction, a first waveguide and a first metal electrode group are arranged in the first cladding, the first waveguide and the first metal electrode group are far away from the first substrate, and a first gap is formed between the first waveguide and the first substrate; that is, the first waveguide is deposited on the first substrate of a wafer using an LPCVD process, and a silicon waveguide is not deposited on the wafer. Compared with first depositing the silicon waveguide and then depositing the first waveguide on a wafer, this can increase the distance between the first waveguide and the first substrate, prevent light transmitted by the first waveguide from leaking to the first substrate, and thus reduce substrate leakage loss. The second cladding is arranged on the first cladding along the epitaxial growth direction, the second buried layer is arranged on the second cladding along the epitaxial growth direction, the second waveguide and the second metal electrode group are arranged in the second cladding, the second waveguide is away from the first cladding, and there is a second gap between the second waveguide and the first waveguide, and the second waveguide is coupled to the first waveguide; the second metal electrode group is close to the first cladding, and the second metal electrode group is bonded to the first metal electrode group to achieve a bonding connection between the second cladding and the first cladding; that is, the second waveguide and the second metal electrode group are deposited on another wafer, and the silicon nitride waveguide is not deposited on the wafer, which can avoid the high temperature during the deposition of the silicon nitride waveguide affecting the metal electrode.

[0027] The optical chip disclosed in the present invention has two wafers, a first waveguide is deposited on one wafer, and a second waveguide is deposited on the other wafer, thereby preventing the high temperature during the deposition of the first waveguide from affecting the functional devices and metal electrodes in the wafers. The wafer containing the first waveguide is then placed at the bottom, and the wafer containing the second waveguide is placed at the top to bond them together to form an optical chip. In this way, the first waveguide, which is very far away from the substrate, is integrated into the optical chip, increasing the distance between the first waveguide and the substrate, preventing the light transmitted by the first waveguide from leaking to the substrate, and reducing substrate leakage loss. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the following briefly introduces the drawings required for use in the embodiments or descriptions of the prior art. Obviously, the drawings described below are only some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0029] FIG1 is a partial structural diagram of an optical communication system provided according to some embodiments of the present disclosure;

[0030] FIG2 is a partial structural diagram of a host computer provided according to some embodiments of the present disclosure;

[0031] FIG3 is a structural diagram of an optical module provided according to some embodiments of the present disclosure;

[0032] FIG4 is an exploded view of an optical module according to some embodiments of the present disclosure;

[0033] FIG5 is a partial structural diagram of an optical module provided according to some embodiments of the present disclosure;

[0034] FIG6 is a partial cross-sectional view 1 of an optical chip in an optical module according to some embodiments of the present disclosure;

[0035] FIG7 is a second partial cross-sectional view of an optical chip in an optical module according to some embodiments of the present disclosure;

[0036] FIG8 is a first cross-sectional view of an optical chip in an optical module according to some embodiments of the present disclosure;

[0037] FIG9 is a second cross-sectional view of an optical chip in an optical module according to some embodiments of the present disclosure;

[0038] FIG10 is a flow chart of a method for preparing an optical chip according to some embodiments of the present disclosure;

[0039] FIG11 is a partial structural block diagram of an optical module provided according to some embodiments of the present disclosure. DETAILED DESCRIPTION

[0040] The following will be combined with the accompanying drawings to clearly and completely describe the technical solutions in some embodiments of the present disclosure. Obviously, the embodiments described are only some embodiments of the present disclosure, not all embodiments. Based on the embodiments provided by the present disclosure, all other embodiments obtained by ordinary technicians in this field are within the scope of protection of the present disclosure.

[0041] Unless the context requires otherwise, throughout the specification and claims, the term "comprise" and its other forms, such as the third person singular form "comprises" and the present participle form "comprising", are to be interpreted as open and inclusive, that is, "including, but not limited to". In the description of the specification, the terms "one embodiment", "some embodiments", "exemplary embodiments", "example", "specific example" or "some examples" are intended to indicate that the particular features, structures, materials or characteristics associated with the embodiment or example are included in at least one embodiment or example of the present disclosure. The schematic representation of the above terms does not necessarily refer to the same embodiment or example. In addition, the particular features, structures, materials or characteristics may be included in any one or more embodiments or examples in any appropriate manner.

[0042] In the following, the terms "first" and "second" are used for descriptive purposes only and should not be understood to indicate or imply relative importance or implicitly specify the number of the technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the embodiments of the present disclosure, unless otherwise specified, "plurality" means two or more.

[0043] When describing some embodiments, the expressions "coupled" and "connected" and their derivatives may be used. For example, when describing some embodiments, the term "connected" may be used to indicate that two or more components are in direct physical or electrical contact with each other. For another example, when describing some embodiments, the term "coupled" may be used to indicate that two or more components are in direct physical or electrical contact. However, the term "coupled" or "communicatively coupled" may also refer to two or more components that are not in direct contact with each other, but still cooperate or interact with each other. The embodiments disclosed herein are not necessarily limited to the contents of this document.

[0044] “At least one of A, B and C” has the same meaning as “at least one of A, B or C” and both include the following combinations of A, B and C: A only, B only, C only, the combination of A and B, the combination of A and C, the combination of B and C, and the combination of A, B and C.

[0045] “A and / or B” includes the following three combinations: A only, B only, and a combination of A and B.

[0046] The use of "adapted to" or "configured to" herein is intended to be open and inclusive language that does not exclude devices adapted or configured to perform additional tasks or steps.

[0047] As used herein, "about," "substantially," or "approximately" includes the stated value and an average value that is within an acceptable range of deviation from the particular value as determined by one of ordinary skill in the art taking into account the measurements in question and the errors associated with the measurement of the particular quantity (i.e., the limitations of the measurement system).

[0048] In optical communication technology, to establish information transmission between information processing devices, it is necessary to load the information onto light and use the propagation of light to achieve information transmission. Here, the light loaded with information is an optical signal. When transmitting optical signals within information transmission equipment, they can reduce optical power loss, thereby enabling high-speed, long-distance, and low-cost information transmission. The signals that information processing equipment can recognize and process are electrical signals. Information processing equipment typically includes optical network units (ONUs), gateways, routers, switches, mobile phones, computers, servers, tablets, televisions, etc., and information transmission equipment typically includes optical fibers and optical waveguides.

[0049] Optical modules can convert optical signals into electrical signals between information processing devices and information transmission devices. For example, at least one of the optical signal input or output ends of an optical module is connected to an optical fiber, and at least one of the electrical signal input or output ends of the optical module is connected to an optical network terminal. A first optical signal from the optical fiber is transmitted to the optical module, which converts the first optical signal into a first electrical signal and transmits the first electrical signal to the optical network terminal. A second electrical signal from the optical network terminal is transmitted to the optical module, which converts the second electrical signal into a second optical signal and transmits the second optical signal to the optical fiber. Because multiple information processing devices can transmit information via electrical signals, at least one of the multiple information processing devices needs to be directly connected to the optical module, rather than all of them. Here, the information processing device directly connected to the optical module is referred to as the optical module's host computer. Furthermore, the optical signal input or output end of the optical module can be referred to as an optical port, and the electrical signal input or output end of the optical module can be referred to as an electrical port.

[0050] Figure 1 is a partial structural diagram of an optical communication system provided according to some embodiments of the present disclosure. As shown in Figure 1, the optical communication system mainly includes a remote information processing device 1000, a local information processing device 2000, a host computer 100, an optical module 200, an optical fiber 101, and a network cable 103.

[0051] One end of optical fiber 101 extends toward remote information processing device 1000, and the other end of optical fiber 101 is connected to optical module 200 through the optical port of optical module 200. Optical signals can be totally reflected in optical fiber 101, and the propagation of the optical signal in the direction of total reflection can almost maintain the original optical power. The optical signal undergoes multiple total reflections in optical fiber 101 to transmit the optical signal from remote information processing device 1000 to optical module 200, and vice versa, thereby achieving long-distance, low-power information transmission.

[0052] The optical communication system may include one or more optical fibers 101, and the optical fibers 101 may be detachably connected or fixedly connected to the optical module 200. The host computer 100 is configured to provide data signals to the optical module 200, receive data signals from the optical module 200, or monitor or control the operating status of the optical module 200.

[0053] The host computer 100 includes a substantially rectangular housing and an optical module interface 102 disposed on the housing. The optical module interface 102 is configured to connect to the optical module 200 to establish a unidirectional or bidirectional electrical signal connection between the host computer 100 and the optical module 200.

[0054] The host computer 100 also includes an external electrical interface that can access an electrical signal network. For example, the external electrical interface includes a Universal Serial Bus (USB) interface or a network cable interface 104. The network cable interface 104 is configured to access a network cable 103 so that the host computer 100 establishes a unidirectional or bidirectional electrical signal connection with the network cable 103. One end of the network cable 103 is connected to the local information processing device 2000, and the other end of the network cable 103 is connected to the host computer 100, so that an electrical signal connection is established between the local information processing device 2000 and the host computer 100 via the network cable 103. For example, a third electrical signal emitted by the local information processing device 2000 is transmitted to the host computer 100 via the network cable 103. The host computer 100 generates a second electrical signal based on the third electrical signal. The second electrical signal from the host computer 100 is transmitted to the optical module 200. The optical module 200 converts the second electrical signal into a second optical signal and transmits the second optical signal to the optical fiber 101. The second optical signal is then transmitted to the remote information processing device 1000 via the optical fiber 101. For example, a first optical signal from the remote information processing device 1000 is transmitted through the optical fiber 101. The first optical signal from the optical fiber 101 is transmitted to the optical module 200. The optical module 200 converts the first optical signal into a first electrical signal. The optical module 200 transmits the first electrical signal to the host computer 100. The host computer 100 generates a fourth electrical signal based on the first electrical signal and transmits the fourth electrical signal to the local information processing device 2000. It should be noted that optical modules are tools for converting optical signals into electrical signals. During this conversion process, the information does not change, but the encoding and decoding methods of the information can change.

[0055] In addition to the optical network terminal, the host computer 100 also includes an optical line terminal (OLT), an optical network device (ONT), or a data center server.

[0056] FIG2 is a partial structural diagram of a host computer provided according to some embodiments of the present disclosure. In order to clearly show the connection relationship between the optical module 200 and the host computer 100, FIG2 only shows the structure of the host computer 100 related to the optical module 200. As shown in FIG2, the host computer 100 also includes a PCB circuit board 105 disposed in the housing, a cage 106 disposed on the surface of the PCB circuit board 105, a heat sink 107 disposed on the cage 106, and an electrical connector disposed inside the cage 106. The electrical connector is configured to connect to the electrical port of the optical module 200; the heat sink 107 has a protruding structure such as fins that increase the heat dissipation area.

[0057] The optical module 200 is inserted into the cage 106 of the host computer 100. The cage 106 secures the optical module 200. Heat generated by the optical module 200 is transferred to the cage 106 and then dissipated through the heat sink 107. After the optical module 200 is inserted into the cage 106, the electrical port of the optical module 200 connects with the electrical connector inside the cage 106, thereby establishing a bidirectional electrical signal connection between the optical module 200 and the host computer 100. Furthermore, the optical port of the optical module 200 connects to the optical fiber 101, thereby establishing a bidirectional optical signal connection between the optical module 200 and the optical fiber 101.

[0058] Figure 3 is a structural diagram of an optical module according to some embodiments of the present disclosure, and Figure 4 is an exploded view of an optical module according to some embodiments of the present disclosure. As shown in Figures 3 and 4, optical module 200 includes a housing, a circuit board 300 disposed within the housing, an optical chip 900, a light source 1100, a fiber optic adapter 700, and an optical fiber connecting the optical chip 900 and the fiber optic adapter 700, but the present disclosure is not limited thereto.

[0059] The housing includes an upper housing 201 and a lower housing 202 . The upper housing 201 covers the lower housing 202 to form the housing having two openings 204 and 205 . The outer contour of the housing is generally a square.

[0060] In some embodiments, the lower shell 202 includes a base plate 2021 and two lower side plates 2022 located on both sides of the base plate 2021 and arranged perpendicular to the base plate 2021; the upper shell 201 includes a cover plate 2011, and the cover plate 2011 covers the two lower side plates 2022 of the lower shell 202 to form the above-mentioned shell.

[0061] In some embodiments, the lower shell 202 includes a base plate 2021 and two lower side plates 2022 located on both sides of the base plate 2021 and arranged perpendicularly to the base plate 2021; the upper shell 201 includes a cover plate 2011 and two upper side plates located on both sides of the cover plate 2011 and arranged perpendicularly to the cover plate 2011. The two upper side plates are combined with the two lower side plates 2022 to achieve the upper shell 201 covering the lower shell 202.

[0062] The direction of the line connecting the two openings 204 and 205 can be consistent with the length of the optical module 200, or it can be inconsistent with the length of the optical module 200. For example, opening 204 is located at the end of the optical module 200 (the left end in Figure 3), and opening 205 is also located at the end of the optical module 200 (the right end in Figure 3). Alternatively, opening 204 is located at the end of the optical module 200, while opening 205 is located on the side of the optical module 200. Opening 204 is an electrical port, from which the gold finger 301 of the circuit board 300 extends and is inserted into the electrical connector of the host computer 100; opening 205 is an optical port, configured to receive an external optical fiber 101, so that the optical fiber 101 can connect to the optical chip 900 in the optical module 200.

[0063] The combined assembly of upper and lower housings 201 and 202 facilitates installation of the circuit board 300, optical chip 900, light source 1100, fiber adapter 700, and the optical fiber connecting the optical chip 900 and the fiber adapter 700 within the housing. These components are encapsulated and protected by the upper and lower housings 201 and 202. Furthermore, when assembling the circuit board 300, optical chip 900, light source 1100, fiber adapter 700, and the optical fiber connecting the optical chip 900 and the fiber adapter 700, the combined assembly of upper and lower housings 201 and 202 facilitates the placement of positioning components, heat dissipation components, and electromagnetic shielding components for these components, facilitating automated production.

[0064] In some embodiments, the upper shell 201 and the lower shell 202 are made of metal materials, which facilitates electromagnetic shielding and heat dissipation.

[0065] In some embodiments, the optical module 200 further includes an unlocking component 600 located outside its housing. The unlocking component 600 is configured to achieve a fixed connection between the optical module 200 and the host computer 100, or to release the fixed connection between the optical module 200 and the host computer 100.

[0066] For example, the unlocking component 600 is located on the outside of the two lower side panels 2022 of the lower housing 202 and includes a snap-fit ​​component that mates with the cage 106 of the host computer 100. When the optical module 200 is inserted into the cage 106, the snap-fit ​​component of the unlocking component 600 secures the optical module 200 in the cage 106. When the unlocking component 600 is pulled, the snap-fit ​​component of the unlocking component 600 moves accordingly, thereby changing the connection between the snap-fit ​​component and the host computer, thereby releasing the optical module 200 from the cage 106 and allowing the optical module 200 to be removed from the cage 106.

[0067] The circuit board 300 includes circuit traces, electronic components, and chips. The electronic components and chips are connected according to the circuit design through the circuit traces to achieve functions such as power supply, electrical signal transmission, and grounding. Electronic components may include, for example, capacitors, resistors, transistors, and metal-oxide-semiconductor field-effect transistors (MOSFETs). Chips may include, for example, microcontroller units (MCUs), laser driver chips, transimpedance amplifiers (TIAs), limiting amplifiers (LAs), clock and data recovery chips (CDRs), power management chips, and digital signal processing (DSP) chips.

[0068] The circuit board 300 is generally a rigid circuit board. Due to its relatively hard material, the rigid circuit board can also realize the load-bearing function. For example, the rigid circuit board can stably carry the above-mentioned electronic components and chips; the rigid circuit board can also be inserted into the electrical connector in the cage 106 of the host computer 100.

[0069] The circuit board 300 also includes a gold finger 301 formed on its end surface, and the gold finger 301 is composed of a plurality of independent pins. The circuit board 300 is inserted into the cage 106, and the gold finger 301 is connected to the electrical connector in the cage 106. The gold finger 301 can be set only on the surface of one side of the circuit board 300 (for example, the upper surface shown in Figure 4), or it can be set on the upper and lower surfaces of the circuit board 300 to provide a larger number of pins, thereby adapting to occasions where a large number of pins are required. The gold finger 301 is configured to establish an electrical connection with the host computer to achieve power supply, grounding, two-wire synchronous serial (Inter-Integrated Circuit, I2C) signal transmission, data signal transmission, etc. Of course, flexible circuit boards are also used in some optical modules. Flexible circuit boards are generally used in conjunction with rigid circuit boards to supplement rigid circuit boards.

[0070] In some embodiments, the optical chip 900 and the light source 1100 are physically separated from the circuit board 300 and then electrically connected to the circuit board 300 through a flexible circuit board or electrical connectors.

[0071] In some embodiments, the optical chip 900 and the light source 1100 may be directly disposed on the circuit board 300. For example, the optical chip 900 and the light source 1100 may be disposed on a surface of the circuit board 300 or on a side of the circuit board 300.

[0072] Figure 5 is a partial structural diagram of an optical module provided according to some embodiments of the present disclosure. As shown in Figure 5, an optical chip 900 is disposed on a circuit board 300. The optical chip 900 is electrically connected to the circuit board 300, for example, by wire bonding. The periphery of the optical chip 900 is connected to the circuit board 300 via multiple conductive lines. Therefore, the optical chip 900 is generally disposed on the surface of the circuit board 300.

[0073] The optical chip 900 and the light source 1100 can be optically connected through an optical fiber ribbon. The optical chip 900 receives the light that does not carry a signal from the light source 1100 through the optical fiber ribbon, and the optical chip 900 modulates the light that does not carry a signal to obtain signal light. The optical chip 900 and the light source 1100 can also be directly end-face coupled. The optical chip 900 directly receives the light that does not carry a signal from the light source 1100, and the optical chip 900 modulates the light that does not carry a signal.

[0074] The optical chip 900 and the optical fiber adapter 700 can be optically connected via a transmitting optical fiber and a receiving optical fiber. The optical fiber adapter 700 also optically connects to the optical fiber outside the optical module. The signal light modulated by the optical chip 900 is transmitted via the transmitting optical fiber to the optical fiber adapter 700, and then to the external optical fiber 101 to transmit the light. The light transmitted by the external optical fiber is then transmitted via the optical fiber adapter 700 to the receiving optical fiber, and then to the optical chip 900 via the receiving optical fiber. The optical chip 900 converts the received optical signal into an electrical signal to receive the light.

[0075] In some embodiments, the optical chip 900 is a silicon photonic chip, which is provided with an input optical port, an output optical port, a monitoring optical port, a high-speed electrical signal interface, and a DC bias signal interface, etc., wherein the input optical port includes a first input optical port and a second input optical port. The first input optical port is used to couple the light output by the light source 1100 into the silicon photonic chip, the second input optical port is used to couple the signal light transmitted by the optical fiber outside the optical module into the silicon photonic chip, and the output optical port is used to couple the signal light modulated by the silicon photonic chip out of the optical chip 900.

[0076] The optical chip 900 is manufactured using a traditional silicon photonics process. In order to obtain better device performance, it is usually necessary to develop a process for integrating low-pressure chemical vapor deposition (LPCVD) SiN into the silicon photonics chip to integrate SiN waveguides into the optical chip and achieve coupling connection between the optical chip 900 and the optical fiber through the SiN waveguides.

[0077] However, when the optical chip 900 is prepared using the silicon photonics process, functional devices such as silicon waveguides and modulators are first deposited on the silicon substrate. Since the deposition of LPCVD SiN requires ultra-high temperature, in order to avoid deformation or ablation of the metal electrodes in the optical chip 900 caused by the high temperature during SiN deposition, the SiN waveguide must be deposited in the early stage of the silicon photonics process. That is, after the deposition of the silicon waveguide is completed, the SiN waveguide is deposited on top of the silicon waveguide using the LPCVD process, and then metal electrodes and other active and passive devices are formed on top of the SiN waveguide. Since the metal electrodes and other devices need to be connected to the silicon waveguide, the distance between the metal electrodes and other devices and the silicon waveguide is relatively close, making the distance between the SiN waveguide and the silicon waveguide very close, which causes the SiN waveguide to be very close to the silicon substrate, increasing the substrate leakage loss.

[0078] To solve the above problems, the present disclosure performs silicon photonics processing on two wafers. SiN waveguides are deposited on one wafer without depositing silicon waveguides, thereby preventing the high temperature during SiN waveguide deposition from affecting the functional devices and metal electrodes in the wafer. Silicon waveguides are deposited on the other wafer without depositing SiN waveguides. The two wafers are bonded together so that the SiN waveguides are located at the bottom and the silicon waveguides are located at the top. In this way, SiN waveguides that are very far away from the substrate can be integrated in the optical chip 900, increasing the distance between the SiN waveguides and the substrate, preventing light transmitted by the first waveguide from leaking to the substrate, and reducing substrate leakage loss.

[0079] Figure 6 is a partial cross-sectional view of an optical chip in an optical module according to some embodiments of the present disclosure, and Figure 7 is a partial cross-sectional view of an optical chip in an optical module according to some embodiments of the present disclosure. As shown in Figures 6 and 7, in the embodiments of the present disclosure, the optical chip 900 includes a first substrate 9101, a first buried layer 9102, and a first cladding layer 9103. The first buried layer 9102 is disposed on the first substrate 9101 along the epitaxial growth direction, and the first cladding layer 9103 is disposed on the first buried layer 9102 along the epitaxial growth direction, such that the first substrate 9101, the first buried layer 9102, and the first cladding layer 9103 are disposed sequentially from bottom to top.

[0080] A first bonding surface 9104 is provided on a side of the first cladding 9103 away from the first substrate 9101 . A first waveguide 905 is provided in the first cladding 9103 . The first waveguide 905 is adjacent to the first bonding surface 9104 , and a first gap is defined between the first waveguide 905 and the first substrate 9101 .

[0081] The first gap may be formed by the first buried layer 9102, or by the first buried layer 9102 and a portion of the first cladding 9103. For example, when the first waveguide 905 is located at one end of the first cladding 9103 close to the first buried layer 9102, and one end of the first waveguide 905 is exposed at the bottom of the first cladding 9103 (the side facing the first buried layer 9102), the first gap is formed by the first buried layer 9102. When the first waveguide 905 is located within the first cladding 9103 and has a certain distance from the bottom of the first cladding 9103, the first gap is formed by the first buried layer 9102 and a portion of the first cladding 9103.

[0082] In some embodiments, the first waveguide 905 is deposited on the first cladding 9103 using an LPCVD process. The first waveguide 905 is a silicon nitride waveguide. Since no silicon waveguide is provided in the first cladding 9103, the deposition of the first waveguide 905 can be performed in the early stage of the silicon photonics process. In addition, the first waveguide 905 is very far away from the first substrate 9101, which can reduce the leakage of light transmitted by the first waveguide 905 to the first substrate 9101, thereby reducing substrate leakage loss.

[0083] In some embodiments, the first buried layer 9102 has a first height H1, the first cladding layer 9103 has a second height H2, the second height H2 is greater than the first height H1, and the first gap between the first waveguide 905 and the first substrate 9101 may be equal to the sum of the first height H1 and the second height H2, so as to increase the size of the first gap through the first buried layer 9102, thereby further reducing the substrate leakage loss.

[0084] In some embodiments, the first height H1 ranges from 2 μm to 4 μm. For example, the first height H1 can be 2 μm, 3 μm, or 4 μm, or other suitable values. The second height H2 ranges from 2 μm to 8 μm. For example, the second height H2 can be 2 μm, 4 μm, 6 μm, or 8 μm, or other suitable values. The first gap between the first waveguide 905 and the first substrate 9101 ranges from 4 μm to 12 μm. When configured, the first gap between the first waveguide 905 and the first substrate 9101 can be 4 μm, 6 μm, 8 μm, or 12 μm, or other suitable gaps.

[0085] In some embodiments, the first substrate 9101 may be a silicon substrate. Of course, other materials may also be used for the first substrate 9101. The first buried layer 9102 is an insulating layer. The insulating layer may be made of silicon dioxide. In other examples, the insulating layer may be made of silicon nitride or silicon oxynitride. The insulating layer provides full dielectric isolation between the first cladding layer 9103 and the first substrate 9101, reducing the leakage of light transmitted by the first waveguide 905 into the first substrate 9101, thereby further reducing substrate leakage loss.

[0086] A first metal electrode group is also provided in the first cladding 9103. The first metal electrode group is adjacent to the first bonding surface 9104. The first metal electrode group can be deposited in the later stage of the silicon photonic process, that is, the first waveguide 905 is first deposited in the first cladding 9103, and then the first metal electrode group is formed in the first cladding 9103. In this way, the high temperature during the deposition of the first waveguide 905 will not affect the first metal electrode group.

[0087] In some examples, the first metal electrode group may include a first metal electrode 9105, a fifth metal electrode 9106, and a sixth metal electrode 9107. The first metal electrode 9105, the fifth metal electrode 9106, and the sixth metal electrode 9107 may be located on one side of the first waveguide 905. The first metal electrode 9105 may be located between the fifth metal electrode 9106 and the sixth metal electrode 9107. The fifth metal electrode 9106 may be adjacent to the first waveguide 905, and the sixth metal electrode 9107 may be away from the first waveguide 905.

[0088] 7 , the optical chip 900 further includes a second substrate 9201, a second buried layer 9202 and a second cladding 9203. The second buried layer 9202 is arranged on the second substrate 9201 along the epitaxial growth direction, and the second cladding 9203 is arranged on the second buried layer 9202 along the epitaxial growth direction, so that the second substrate 9201, the second buried layer 9202 and the second cladding 9203 are arranged in sequence from bottom to top.

[0089] A second bonding surface 9204 is provided on the side of the second cladding 9203 away from the second substrate 9201. The second bonding surface 9204 is bonded to the first bonding surface 9104 so as to set the second cladding 9203 on the first cladding 9103 along the epitaxial growth direction to form a bonded optical chip 900.

[0090] In some embodiments, the second substrate 9201 may be a silicon substrate. In other examples, the second substrate 9201 may be made of other materials, such as silicon germanium, as long as it can be removed in subsequent steps. The second buried layer 9202 is an insulating layer, which may be made of silicon dioxide, silicon nitride, silicon oxynitride, or the like.

[0091] In some embodiments, the second buried layer 9202 has a third height H3, and the second cladding layer 9203 has a fourth height H4, wherein the third height H3 may be less than or equal to the first height H1, and the fourth height H4 is less than the first gap.

[0092] In some embodiments, the third height H3 is in the range of 2 μm to 4 μm. For example, the third height H3 can be 2 μm, 3 μm, or 4 μm. The fourth height H4 is less than 1 μm. For example, the fourth height H4 can be 0.1 μm, 0.3 μm, 0.6 μm, or 1 μm.

[0093] In some embodiments, the optical chip 900 may further include a top silicon layer. Along the epitaxial growth direction, the top silicon layer is located on a second buried layer 9202, and a second cladding layer 9203 is located on the top silicon layer. The second buried layer 9202 can achieve full dielectric isolation between the top silicon layer and the second substrate 9201, thereby reducing parasitic capacitance and improving operating speed. Furthermore, the reduced parasitic capacitance can also reduce leakage and power consumption of devices implemented on the top silicon layer.

[0094] The top layer of silicon can be patterned, photolithographically etched, and etched to form silicon optical devices such as silicon waveguides and gratings. Active or passive devices such as modulators, photodetectors, and attenuators can also be formed. A dielectric layer (such as the second cladding 9203) is then covered over the silicon optical devices, silicon optical active devices, silicon optical passive devices, etc., and then flattened so that the second cladding 9203 wraps the silicon optical devices, silicon optical active devices, silicon optical passive devices, etc.

[0095] In some embodiments, functional devices such as silicon waveguides, gratings, modulators, photodetectors, and attenuators may be deposited on the second buried layer 9202, and then a second cladding 9203 may be covered on the functional devices so that the second cladding 9203 wraps the functional devices.

[0096] Illustratively, a grating coupler 901, a third waveguide 902, a modulator 903, and a second waveguide 904 are disposed within the second cladding 9203. The grating coupler 901, the third waveguide 902, the modulator 903, and the second waveguide 904 are located on the side where the second cladding 9203 connects to the second buried layer 9202. The grating coupler 901 is located near one edge of the second cladding 9203. The grating coupler 901 is optically connected to the light source 1100 so that the light outputted by the light source 1100 without carrying a signal is coupled to the optical chip 900 via the grating coupler 901. The second waveguide 904 and the third waveguide 902 are both silicon waveguides.

[0097] In some examples, a second cladding layer 7202 may be further provided between the bottom of the grating coupler 901, the third waveguide 902, the modulator 903, and the second waveguide 904 and the second buried layer 9202. That is, a certain distance is provided between the bottom of the grating coupler 901, the third waveguide 902, the modulator 903, and the second waveguide 904 and the second buried layer 9202. In other words, the grating coupler 901, the third waveguide 902, the modulator 903, and the second waveguide 904 are completely enclosed in the second cladding layer 9203.

[0098] The input end of the third waveguide 902 is connected to the grating coupler 901, and the output end of the third waveguide 902 is connected to the input end of the modulator 903. The third waveguide 902 couples the non-signal light input by the grating coupler 901 to the modulator 903. The modulator 903 modulates the non-signal light to obtain modulated signal light.

[0099] In some embodiments, when modulating light that does not carry a signal, the modulator 903 needs to receive an electrical signal. To output the electrical signal to the modulator 903, a second metal electrode group is further disposed within the second cladding layer 9203. In some examples, the top of the second metal electrode group can extend to the top surface of the second cladding layer 9203 (facing away from the second buried layer 9202). In other examples, a certain distance can be provided between the second metal electrode group and the top surface of the second cladding layer 9203. The presently disclosed embodiments do not limit the position of the second metal electrode group.

[0100] Illustratively, the second metal electrode group may include a second metal electrode 9205 , which is adjacent to the second bonding surface 9204 , and is electrically connected to the modulator 903 through a via hole, so as to output an electrical signal to the modulator 903 through the second metal electrode 9205 .

[0101] Figure 8 is a cross-sectional view of an optical chip in an optical module according to some embodiments of the present disclosure. As shown in Figure 8, a first substrate 9101, a first buried layer 9102, and a first cladding layer 9103 are sequentially arranged from bottom to top. A first waveguide 905 and a first metal electrode group are arranged within the first cladding layer 9103. A second substrate 9201, a second buried layer 9202, and a second cladding layer 9203 are sequentially arranged from bottom to top. A grating coupler 901, a third waveguide 902, a modulator 903, a second waveguide 904, and a second metal electrode group are arranged within the second cladding layer 9203. The first substrate 9101 is then placed downward, the second substrate 9201 is flipped over, and the first bonding surface 9104 on the upper surface of the first cladding layer 9103 is bonded to the second bonding surface 9204 on the upper surface of the second cladding layer 9203. The first and second metal electrode groups are then bonded together using high temperature and high pressure.

[0102] After bonding the first cladding layer 9103 and the flipped second cladding layer 9203 together, the first cladding layer 9103 and the second cladding layer 9203 are located between the first buried layer 9102 and the second buried layer 9202, and the distance H2' between the first buried layer 9102 and the second buried layer 9202 is the sum of the second height H2 and the fourth height H4.

[0103] Figure 9 is a second cross-sectional view of an optical chip in an optical module according to some embodiments of the present disclosure. As shown in Figure 9, a second waveguide 904 is located above a first waveguide 905, with a second gap H6 between the second waveguide 904 and the first waveguide 905. The output end of the modulator 903 is connected to one end of the second waveguide 904, and the other end of the second waveguide 904 is coupled to the first waveguide 905. The modulated signal light of the modulator 903 is transmitted to the first waveguide 905 via the second waveguide 904. The first waveguide 905 couples the signal light to an optical fiber, which then transmits the signal light to the external optical fiber 101 via the optical fiber, thereby transmitting the signal light.

[0104] In some embodiments, the second waveguide 904 is a silicon waveguide and the first waveguide 905 is a silicon nitride waveguide, so as to achieve a coupling connection between the second waveguide 904 and the first waveguide 905, so that light transmitted by the second waveguide 904 can be coupled to the first waveguide 905, or light transmitted by the first waveguide 905 can be coupled to the second waveguide 904.

[0105] In some embodiments, the fourth height H4 of the second cladding layer 9203 is equal to the second gap H6, such that the second gap H6 between the second waveguide 904 and the first waveguide 905 is less than 1 μm.

[0106] During setting, the distance between the first waveguide 905 and the first bonding surface 9104 , as well as the distance between the second waveguide 904 and the second bonding surface 9204 , can be controlled so that the distance between the first waveguide 905 and the second waveguide 904 meets actual requirements.

[0107] In some embodiments, an adjustable attenuator 907 and a detector 908 may also be disposed within the second cladding 9203. In the cross-sectional view shown in FIG8 , the modulator 903 may be located between the adjustable attenuator 907 and the detector 908. After the first cladding 9103 and the second cladding 9203 are bonded together, the adjustable attenuator 907 may be coupled to the first waveguide 905. The adjustable attenuator 907 is configured to receive and attenuate the received optical signal transmitted by the first waveguide 905. Specifically, the received optical signal transmitted by the external optical fiber 101 is coupled to the adjustable attenuator 907 via the first waveguide 905, and the adjustable attenuator 907 attenuates the received optical signal.

[0108] The detector 908 is connected to the adjustable attenuator 907 , and is used to convert the received optical signal after attenuation processing into an electrical signal to achieve photoelectric conversion and realize light reception.

[0109] 7 and 8 , in some embodiments, the second metal electrode group may further include a third metal electrode 9206 and a fourth metal electrode 9207. The third metal electrode 9206 and the fourth metal electrode 9207 are adjacent to the second bonding surface 9204, and the second metal electrode 9205 is located between the third metal electrode 9206 and the fourth metal electrode 9207. The third metal electrode 9206 is electrically connected to the adjustable attenuator 907 through a via, and the fourth metal electrode 9207 is electrically connected to the detector 908 through a via to transmit electrical signals to the adjustable attenuator 907 and the detector 908.

[0110] 6 and 8 , in some examples, the first metal electrode group may further include a fifth metal electrode 9106 and a sixth metal electrode 9107. When the first cladding 9103 and the second cladding 9203 are bonded together, the first metal electrode 9105 and the second metal electrode 9205 are bonded together, the fifth metal electrode 9106 and the third metal electrode 9206 are bonded together, and the sixth metal electrode 9107 and the fourth metal electrode 9207 are bonded together to achieve a bonding connection between the first metal electrode group and the second metal electrode group.

[0111] 9 , after the first cladding layer 9103 and the second cladding layer 9203 are bonded together, the second substrate 9201 can be removed, and then a multi-layer metal structure can be further fabricated above the second buried layer 9202 along the epitaxial growth direction to form the final optical chip 900 .

[0112] Exemplarily, the optical chip 900 may further include a third cladding 930. Along the epitaxial growth direction, the third cladding 930 is located on the second buried layer 9202. The third cladding 930 has a fifth height H5. A third metal electrode group is arranged in the third cladding 930. The third metal electrode group includes a seventh metal electrode 9301, an eighth metal electrode 9302 and a ninth metal electrode 9303. The seventh metal electrode 9301 is electrically connected to the second metal electrode 9205 through a via to transmit an electrical signal to the modulator 903; the eighth metal electrode 9302 is electrically connected to the third metal electrode 9206 through a via to transmit an electrical signal to the adjustable attenuator 907; the ninth metal electrode 9303 is electrically connected to the fourth metal electrode 9207 through a via to transmit an electrical signal to the detector 908.

[0113] When setting, the third metal electrode group can be located at any position along the height direction of the third cladding 930. For example, there is a certain distance between the top of the third metal electrode layer and the top surface of the third cladding 930, or the top of the third metal electrode layer extends to the top surface of the third cladding 930. The embodiment of the present disclosure does not limit the position of the third metal electrode layer in the third cladding 930.

[0114] In some embodiments, when growing the third cladding layer 930 on the second buried layer 9202, part of the second buried layer 9202 can be removed to reduce the thickness of the second buried layer 9202 so that the height of the second buried layer 9202 is H3', H3'<H3, so as to facilitate electrical connection between the metal electrode in the third cladding layer 930 and the metal electrode in the second cladding layer 9203.

[0115] In the disclosed embodiment, one first waveguide 905 may be disposed within the first cladding 9103, or multiple (two or more) first waveguides 905 may be disposed within the first cladding 9103. In one arrangement, the multiple first waveguides 905 may be arranged side by side in a direction perpendicular to the paper (as shown in FIG9 ); the second cladding 9203 may also be provided with multiple second waveguides 904, which are arranged side by side in a direction perpendicular to the paper. In other words, the multiple first waveguides 905 are equidistant from the first substrate 9101, and the multiple second waveguides 904 are equidistant from the multiple first waveguides 905.

[0116] For example, two first waveguides 905 may be provided in the first cladding 9103, and one first waveguide 905 may be used as an output optical waveguide. The light not carrying a signal output by the light source 1100 is coupled to the third waveguide 902 through the grating coupler 901. The third waveguide 902 transmits the light not carrying a signal to the modulator 903. The modulator 903 modulates the light not carrying a signal, and the modulated signal light is transmitted to the second waveguide 904. The second waveguide 904 couples the signal light to the first waveguide 905. The first waveguide 905 couples the signal light to the optical fiber, thereby realizing light emission.

[0117] Another first waveguide 905 can be used as an input optical waveguide. The received optical signal transmitted by the optical fiber is coupled to the adjustable attenuator 907 of the optical chip 900 via the first waveguide 905. The adjustable attenuator 907 attenuates the received optical signal. The attenuated received optical signal is transmitted to the detector 908. The detector 908 converts the received optical signal into an electrical signal, thereby realizing light reception.

[0118] As another setting method, when multiple (two or more) first waveguides 905 are arranged in the first cladding 9103, the multiple first waveguides 905 can be arranged up and down along the epitaxial growth direction, and the spacing between adjacent first waveguides 905 can be less than 1.5μm. There is a first gap between the first waveguide 905 close to the first substrate 9101 and the first substrate 9101, and the size range of the first gap is 4μm to 12μm. For example, the size of the first gap can be 4μm, 5μm or 6μm or other suitable values; there is a second gap between the first waveguide 905 close to the first bonding surface 9104 and the second waveguide 904, and the second gap is less than 1μm. For example, the second gap can be 0.2μm, 0.4μm, 0.6μm or 1μm or other suitable values.

[0119] In some embodiments, two first waveguides 905 are disposed in the first cladding 9103, one first waveguide 905 is adjacent to the first bonding surface 9104, and the other first waveguide 905 is adjacent to the first substrate 9101. The two first waveguides 905 are disposed in the up-down direction, a second gap is defined between the first waveguide 905 adjacent to the first bonding surface 904 and the second waveguide 904, and a first gap is defined between the first waveguide 905 adjacent to the first substrate 9101 and the first substrate 9101. The gap between the two first waveguides 905 is less than 1.5 μm.

[0120] A first waveguide 905 serves as an output optical waveguide. The light output by the light source 1100 that does not carry a signal is coupled to the third waveguide 902 through the grating coupler 901. The third waveguide 902 transmits the light that does not carry a signal to the modulator 903. The modulator 903 modulates the light that does not carry a signal. The modulated signal light is transmitted to the second waveguide 904. The second waveguide 904 couples the signal light to the first waveguide 905. The first waveguide 905 couples the signal light to the optical fiber, thereby realizing light emission.

[0121] Another first waveguide 905 serves as an input optical waveguide. The received optical signal transmitted by the optical fiber is coupled to the adjustable attenuator 907 of the optical chip 900 via the first waveguide 905. The adjustable attenuator 907 attenuates the received optical signal. The attenuated received optical signal is transmitted to the detector 908. The detector 908 converts the received optical signal into an electrical signal, thereby realizing light reception.

[0122] In the optical module provided by the present disclosure, the optical chip has two wafers. SiN waveguides are deposited on one wafer using the LPCVD process, and silicon waveguides, various functional devices and metal electrodes are deposited on the other wafer using the silicon photonic process. This avoids the high temperature during the deposition of the SiN waveguides affecting the functional devices and metal electrodes on the wafers. In this way, the SiN waveguides that are very far away from the substrate are integrated into the optical chip, that is, the first waveguide 905 (i.e., SiN waveguide) and the second waveguide 904 (i.e., silicon waveguide) are respectively arranged on different wafers, and finally formed by bonding. The completed optical chip allows the second waveguide 904 to be located above the first waveguide 905. In this way, devices such as the modulator 903 can be arranged close to one side of the second waveguide 904. For example, the modulator 903 and the second waveguide 904 are both formed in the second cladding 9203 and are not affected by the position of the first waveguide 904. Therefore, the distance between the SiN waveguide and the substrate can be increased by increasing the thickness of the first cladding 9103 and the first buried layer 9102, thereby preventing light transmitted by the SiN waveguide from leaking into the substrate and reducing substrate leakage loss.

[0123] Based on the optical module described in the above embodiment, the embodiment of the present disclosure also provides a method for preparing an optical chip, which deposits a SiN waveguide on one wafer, integrates a silicon waveguide, various functional devices and metal electrodes on another wafer, and bonds the two completed wafers together, thereby increasing the distance between the SiN waveguide and the substrate, preventing light transmitted by the SiN waveguide from leaking to the substrate, and reducing substrate leakage loss.

[0124] FIG10 is a flow chart of a method for preparing an optical chip according to some embodiments of the present disclosure. As shown in FIG10 , the method for preparing an optical chip according to an embodiment of the present disclosure includes:

[0125] S10: growing a first buried layer along the first substrate.

[0126] S20: growing a first cladding layer along the first buried layer, and forming a first waveguide by high-temperature deposition in the first cladding layer, with a first gap between the first waveguide and the first substrate.

[0127] S30: forming a first metal electrode group in the first cladding layer.

[0128] S40: growing a second buried layer along the second substrate.

[0129] S50: depositing a grating coupler, a second waveguide, a modulator, a third waveguide, a tuning attenuator, and a detector on the second buried layer.

[0130] S60: growing a second cladding on the grating coupler, the second waveguide, the modulator, the third waveguide, the adjustable attenuator and the detector, and forming a second metal electrode group in the second cladding.

[0131] S70: etching via holes in the second cladding layer, and electrically connecting the modulator, the adjustable attenuator, and the detector to the second metal electrode group through the via holes.

[0132] S80: flipping the second cladding layer and placing it on the first cladding layer, bonding the first metal electrode group and the second metal electrode group to form a second gap between the first waveguide and the second waveguide.

[0133] S90: removing the second substrate, and growing a third cladding layer on the second buried layer.

[0134] S100: forming a third metal electrode group in the third cladding layer, etching via holes in the third cladding layer, the second buried layer and the second cladding layer, and electrically connecting the third metal electrode group to the second metal electrode group through the via holes.

[0135] Figure 11 is a partial structural block diagram of an optical module provided according to some embodiments of the present disclosure. As shown in Figure 11, after the optical chip 900 is manufactured using the optical chip manufacturing method described in the above embodiments, one end of the grating coupler 901 is optically connected to the light source 1100, and the other end of the grating coupler 901 is connected to one end of the third waveguide 902, so that the light output by the light source 1100 without carrying a signal is coupled to the third waveguide 902 through the grating coupler 901; the other end of the third waveguide 902 is connected to the modulator 903, so that the light transmitted by the third waveguide 902 without carrying a signal is coupled to the modulator 903, and the modulator 903 modulates the light without carrying a signal to obtain signal light.

[0136] The modulator 903 is connected to one end of the second waveguide 904, the other end of the second waveguide 904 is coupled to the first waveguide 905, and the first waveguide 905 is coupled to the optical fiber, so that the modulated signal light is coupled into the optical fiber through the second waveguide 904 and the first waveguide 905, and then transmitted to the external optical fiber 101 via the optical fiber, thereby realizing light emission.

[0137] In some embodiments, the optical chip 900 further includes a fourth waveguide 906, an adjustable attenuator 907, and a detector 908. The fourth waveguide 906 is adjacent to the second optical input port of the optical chip 900. The fourth waveguide 906 has the same structure as the first waveguide 905. One end of the fourth waveguide 906 is coupled to an optical fiber, and the other end of the fourth waveguide 906 is connected to the adjustable attenuator 907. The fourth waveguide 906 couples a received optical signal transmitted by the optical fiber to the adjustable attenuator 907, which then attenuates the received optical signal. It is understood that the fourth waveguide 906 can be another first waveguide 905 or another additional waveguide, and this is not a limitation herein.

[0138] The detector 908 is connected to the adjustable attenuator 907 , and the detector 908 converts the received optical signal after attenuation processing into an electrical signal to realize photoelectric conversion, thereby realizing light reception.

[0139] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present disclosure, rather than to limit them. Although the present disclosure has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments of the present disclosure.

Claims

1. An optical module, comprising: Circuit boards; A light source, electrically connected to the circuit board, the light source being used to generate light that does not carry a signal; an optical chip, optically connected to the light source, and configured to receive light generated by the light source that does not carry a signal, and to receive an external optical signal; wherein the optical chip comprises: a first substrate; A first buried layer is arranged on the first substrate along the epitaxial growth direction; A first cladding layer is arranged on the first buried layer along the epitaxial growth direction, wherein a first waveguide and a first metal electrode group are arranged in the first cladding layer, the first waveguide and the first metal electrode group are far away from the first substrate, and a first gap is formed between the first waveguide and the first substrate; A second cladding is arranged on the first cladding along the epitaxial growth direction, a second waveguide and a second metal electrode group are arranged in the second cladding, the second waveguide is far away from the first cladding, the second waveguide is coupled to the first waveguide, and a second gap is provided between the first waveguide and the second waveguide; the second metal electrode group is close to the first cladding, and the second metal electrode group is bonded to the first metal electrode group; A second buried layer is arranged on the second cladding layer along the epitaxial growth direction, and one side of the second waveguide is in contact with and connected to the second buried layer; An optical fiber is coupled to the first waveguide and is used to transmit an optical signal.

2. The optical module according to claim 1, wherein: The second cladding is also provided with: A grating coupler, used to couple the light generated by the light source and not carrying a signal to the optical chip; a third waveguide, an input end of which is connected to the grating coupler, and the third waveguide is used to transmit the light not carrying a signal; A modulator is connected to the output end of the third waveguide, and the modulator is used to modulate the light not carrying a signal and output a signal light, and the signal light is coupled to the first waveguide through the second waveguide.

3. The optical module according to claim 2, wherein: The first metal electrode group includes a first metal electrode, the second metal electrode group includes a second metal electrode, the second metal electrode is electrically connected to the modulator through a via hole, and the second metal electrode is bonded to the first metal electrode.

4. The optical module according to claim 1, wherein: The first buried layer has a first height, the first cladding layer has a second height, and the second height is greater than the first height; The second buried layer has a third height, the second cladding layer has a fourth height, the third height is not greater than the first height, and the fourth height is equal to the second gap.

5. The optical module according to claim 4, wherein: The first height has a size range of 2 to 4 μm, the second height has a size range of 2 to 8 μm, the third height has a size range of 2 to 4 μm, and the fourth height is less than 1 μm.

6. The optical module according to claim 5, wherein: The first height is 2 μm, the second height is 4 μm, the third height is 1.5 μm, and the fourth height is 0.8 μm.

7. The optical module according to claim 1, wherein: The second cladding also includes: an adjustable attenuator, coupled to the first waveguide, the adjustable attenuator being electrically connected to the third metal electrode in the second metal electrode group, and the adjustable attenuator being used to receive the received optical signal transmitted by the first waveguide, and performing attenuation processing on the received optical signal; A detector is connected to the adjustable attenuator, the detector is electrically connected to the fourth metal electrode in the second metal electrode group, and the detector is used to convert the received light signal into an electrical signal.

8. The optical module according to claim 7, wherein: The optical chip further includes a third cladding layer, which is arranged on the second buried layer along the epitaxial growth direction. A third metal electrode group is arranged in the third cladding layer, and the third metal electrode group is electrically connected to the second metal electrode group through a via hole.

9. The optical module according to claim 2, wherein: The first waveguide is a silicon nitride waveguide, and the second waveguide and the third waveguide are silicon waveguides.

10. A method for preparing an optical chip, the method comprising: growing a first buried layer along the first substrate; Growing a first cladding layer along the first buried layer, and forming a first waveguide by high-temperature deposition in the first cladding layer, wherein a first gap is provided between the first waveguide and the first substrate; forming a first metal electrode group in the first cladding layer; growing a second buried layer along the second substrate; Depositing a grating coupler, a second waveguide, a modulator, a third waveguide, an adjustable attenuator and a detector on the second buried layer; Growing a second cladding on the grating coupler, the second waveguide, the modulator, the third waveguide, the adjustable attenuator and the detector, and forming a second metal electrode group in the second cladding; Etching via holes in the second cladding layer, wherein the modulator, the adjustable attenuator and the detector are electrically connected to the second metal electrode group through the via holes; flipping the second cladding layer and placing it on the first cladding layer, and bonding the first metal electrode group to the second metal electrode group so that a second gap exists between the first waveguide and the second waveguide; removing the second substrate, and growing a third cladding layer on the second buried layer; A third metal electrode group is formed in the third cladding layer, and via holes are etched in the third cladding layer, the second buried layer and the second cladding layer. The third metal electrode group is electrically connected to the second metal electrode group through the via holes.

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