Bias voltage generation circuit and amplifier circuit

WO2025047120A1PCT designated stage expired Publication Date: 2025-03-06FUJIKURA LTD
View PDF 7 Cites 0 Cited by

Patent Information

Application Number
PCT/JP2024/024373
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-09-01
Filing Date
2024-07-05
Publication Date
2025-03-06

Smart Images

  • Figure JP2024024373_06032025_PF_FP_ABST
    Figure JP2024024373_06032025_PF_FP_ABST
Patent Text Reader

Abstract

This bias voltage generation circuit comprises a first circuit and a second circuit connected in series to a voltage source. The bias voltage generation circuit outputs a bias voltage obtained by dividing a power supply voltage by a first resistance value of the first circuit and a second resistance value of the second circuit. Either or both of the first resistance value and the second resistance value have a predetermined tendency of change with respect to change in the ambient temperature.
Need to check novelty before this filing date? Find Prior Art

Description

Bias voltage generating circuit and amplifier circuit

[0001] The present invention relates to a bias voltage generating circuit and an amplifier circuit. This application claims priority to Japanese Patent Application No. 2023-142179, filed on September 1, 2023, the contents of which are incorporated herein by reference.

[0002] A typical source-grounded CMOS amplifier circuit is disclosed in Figure 7.20 of the following non-patent document 1. This source-grounded CMOS amplifier circuit is most commonly used as a high-frequency signal amplifier circuit, and is composed of a source-grounded CMOS transistor and a load resistor.

[0003] A high-frequency signal is input to the gate of a CMOS transistor via a DC-blocking capacitor, and the amplified high-frequency signal is output from the drain of the CMOS transistor. A bias voltage optimally set to achieve signal amplification objectives such as high gain and high linearity is applied to the gate of the CMOS transistor. In other words, this bias voltage is generated by dividing the power supply voltage using two resistors connected in series to the power supply.

[0004] Behzad Razavi, “Fundamentals of Microelectronics”, Second Edition, WILEY, 2013

[0005] However, since the bias voltage in the background art is generated by resistive voltage division and is therefore fixed, the amplification characteristics of amplifying elements such as CMOS transistors change with changes in ambient temperature, so the background art cannot maintain constant amplification characteristics when the ambient temperature changes.

[0006] The present invention has been made in view of the above circumstances, and has as its object to provide a bias voltage generating circuit and an amplifier circuit that are capable of suppressing changes in amplification characteristics when the ambient temperature changes.

[0007] A bias voltage generation circuit according to a first aspect of the present invention comprises a first circuit and a second circuit connected in series to a voltage source, and outputs a bias voltage obtained by dividing a power supply voltage by a first resistance value of the first circuit and a second resistance value of the second circuit, wherein either or both of the first resistance value and the second resistance value have a predetermined tendency to change in response to changes in ambient temperature.

[0008] A bias voltage generating circuit according to a second aspect of the present invention is the bias voltage generating circuit according to the first aspect, wherein the first resistance value does not change depending on the ambient temperature, and the second resistance value increases as the ambient temperature rises.

[0009] A bias voltage generating circuit according to a third aspect of the present invention is the bias voltage generating circuit according to the first or second aspect, further comprising a third circuit provided between the voltage source and the first circuit and having a third resistance value, wherein the third resistance value has a predetermined tendency to change with changes in the ambient temperature.

[0010] A bias voltage generating circuit according to a fourth aspect of the present invention is the bias voltage generating circuit according to the third aspect, wherein the first resistance value does not change depending on the ambient temperature, the second resistance value increases as the ambient temperature rises, and the third resistance value decreases as the ambient temperature rises.

[0011] A bias voltage generating circuit according to a fifth aspect of the present invention is the bias voltage generating circuit according to any one of the first to fourth aspects, further comprising a switch for turning on / off a connection to the voltage source.

[0012] A bias voltage generation circuit according to a sixth aspect of the present invention is the bias voltage generation circuit according to any one of the first to fifth aspects, wherein the first circuit is a single resistor and the second circuit is a single resistor.

[0013] An amplifier circuit according to one aspect of the present invention includes the bias voltage generating circuit according to any one of the first to sixth aspects.

[0014] According to the above aspects of the present invention, it is possible to provide a bias voltage generating circuit and an amplifier circuit that are capable of suppressing changes in amplification characteristics when the ambient temperature changes.

[0015] FIG. 1 is a circuit diagram showing the configuration of an amplifier circuit and a bias voltage generation circuit according to a first embodiment of the present invention; FIG. 2 is a characteristic diagram showing the resistance value characteristics of the bias voltage generation circuit according to the first embodiment of the present invention; FIG. 3 is a characteristic diagram showing the gain characteristics of the amplifier circuit according to the first embodiment of the present invention; FIG. 4 is a circuit diagram showing the configuration of an amplifier circuit and a bias voltage generation circuit according to a second embodiment of the present invention; FIG. 5 is a characteristic diagram showing the resistance value characteristics of the bias voltage generation circuit according to the second embodiment of the present invention; and FIG. 6 is a characteristic diagram showing the gain characteristics of the amplifier circuit according to the second embodiment of the present invention.

[0016] Hereinafter, embodiments of the present invention will be described with reference to the drawings. [First Embodiment] First, a first embodiment of the present invention will be described with reference to Fig. 1. An amplifier circuit A1 according to the first embodiment is a high-frequency amplifier circuit that amplifies a high-frequency signal input from an external device.

[0017] 1, the amplifier circuit A1 includes a control terminal Tcnt, an input terminal Tin, a first transistor 1, a first resistor 2, a second resistor 3, a coupling capacitor 4, a second transistor 5, a third resistor 6, and an output terminal Tout. Among the components of the amplifier circuit A1, the first transistor 1, the first resistor 2, the second resistor 3, and the control terminal Tcnt constitute a bias voltage generation circuit B1 according to the first embodiment.

[0018] The control terminal Tcnt is connected to the gate terminal of the first transistor 1 inside the amplifier circuit A1. The control terminal Tcnt is also connected to a control device (not shown) outside the amplifier circuit A1. The control device controls the operation of the amplifier circuit A1 by supplying a control signal to the control terminal Tcnt. In other words, the control terminal Tcnt is a terminal for receiving a control signal supplied from the control device.

[0019] The input terminal Tin is connected to a first end (one end) of a coupling capacitor 4 inside the amplifier circuit A1. The input terminal Tin is also connected to a signal source (not shown) outside the amplifier circuit A1. The signal source supplies a high-frequency signal of a predetermined frequency to the input terminal Tin as a signal to be amplified.

[0020] As shown in the figure, the first transistor 1 is a p-type MOS (Metal Oxide Semiconductor) transistor. The gate terminal of the first transistor 1 is connected to the control terminal Tcnt, and the source terminal is connected to a voltage source V DD (power supply), and the drain terminal is connected to the first end (one end) of the first resistor 2.

[0021] The first transistor 1 is a switch that turns on (conducting) / off (non-conducting) the connection between the power supply and the first resistor 2 based on a control signal input from the outside to the control terminal Tcnt. In other words, the first transistor 1 is an electronic switch that selects whether or not to apply the gate bias voltage Vb to the second transistor 5 based on the control signal.

[0022] For example, when the amplifier circuit A1 does not need to function, the first transistor 1 is set to the OFF state (non-conducting state). That is, when the amplifier circuit A1 does not need to function, the first transistor 1 cuts off the current flowing to the bias voltage generation circuit B1, thereby realizing power saving in the amplifier circuit A1.

[0023] The first resistor 2 has a predetermined first resistance value R1. That is, the first resistor 2 has a first resistance value R1 that does not change depending on the ambient temperature Tj. The first resistor 2 has a first end connected to the drain terminal of the first transistor 1 and a second end (other end) connected to a first end (one end) of the second resistor 3, a second end (other end) of the coupling capacitor 4, and a gate terminal of the second transistor 5.

[0024] The first resistor 2 corresponds to the first circuit in the present invention. That is, the first resistance value R1 corresponds to the first resistance value in the present invention. Therefore, the first resistor 2 may have a first resistance value R1(Tj) that has a predetermined tendency to change with changes in the ambient temperature Tj, as necessary.

[0025] The second resistor 3 has a predetermined second resistance value R2(Tj). That is, the second resistor 3 has the second resistance value R2(Tj) that changes depending on the ambient temperature Tj. The second resistor 3 has a first end connected to the second end of the first resistor 2, the second end of the coupling capacitor 4, and the gate terminal of the second transistor 5, and a second end (the other end) grounded.

[0026] The second resistance value R2(Tj) corresponds to the second resistance value of the present invention. The second resistor 3 is a temperature-dependent resistor whose second resistance value R2(Tj) exhibits a predetermined tendency to change with changes in the ambient temperature Tj. The second resistor 3 corresponds to the second circuit of the present invention.

[0027] Although details will be described later, the second resistance value R2(Tj) is set so as to suppress fluctuations in the gain of the second transistor 5 due to changes in the ambient temperature Tj, for example. A typical bias voltage generation circuit employs a resistor whose resistance value does not depend on temperature. The bias voltage generation circuit B1 according to this embodiment employs a second resistor 3 having a temperature-dependent second resistance value R2(Tj) so that the gain of the second transistor 5 does not fluctuate due to changes in the ambient temperature Tj.

[0028] The coupling capacitor 4 has a first end connected to the input terminal Tin, and a second end connected to the second end of the first resistor 2, the first end of the second resistor 3, and the gate terminal of the second transistor 5. The coupling capacitor 4 allows a high-frequency signal (amplified signal), which is an AC signal, to pass from the first end to the second end, but blocks a DC signal from passing from the first end to the second end.

[0029] Here, in the bias voltage generating circuit B1 of the first embodiment, when the first transistor 1 is set to the ON state (conducting state), the first resistor 2 (first circuit) and the second resistor 3 (second circuit) connected in series to the voltage source function as a resistive voltage divider circuit for the power supply voltage.

[0030] The ON resistance of the first transistor 1 is set to be sufficiently small compared to the first resistance value R1 and the second resistance value R2(Tj). The input resistance of the second transistor 5 is set to be sufficiently large compared to the first resistance value R1 and the second resistance value R2(Tj).

[0031] Furthermore, since the amplifier circuit A1 according to the first embodiment is provided with the coupling capacitor 4, the DC voltage at the gate terminal of the second transistor 5, i.e., the gate bias voltage Vb of the second transistor 5, is set solely by the bias voltage generation circuit B1. That is, the gate bias voltage Vb is a value obtained by resistively dividing the power supply voltage by the first resistance value R1 and the second resistance value R2 (Tj).

[0032] As shown in the figure, the second transistor 5 is an n-type MOS (Metal Oxide Semiconductor) transistor. The second transistor 5 has a gate terminal connected to the second end of the first resistor 2, a first end of the second resistor 3, and a second end of the coupling capacitor 4, a source terminal grounded, and a drain terminal connected to a first end (one end) of the third resistor 6 and the output terminal Tout.

[0033] The second transistor 5 is an amplifying transistor that amplifies a high-frequency signal (amplified signal) supplied to its gate terminal via the input terminal Tin and the coupling capacitor 4 under a gate bias voltage Vb and outputs the amplified signal to its drain terminal. That is, the amplifier circuit A1 according to the first embodiment is a common-source amplifier circuit.

[0034] The third resistor 6 has a predetermined third resistance value R3. The third resistance value R3 does not change according to the ambient temperature Tj, similar to the first resistor 2 described above. In other words, the third resistor 6 is a resistor that does not have temperature dependency. The third resistor 6 has a first end connected to the drain terminal of the second transistor 5 and the output terminal Tout, and a second end (the other end) connected to the voltage source V DD is connected to.

[0035] The output terminal Tout is connected inside the amplifier circuit A1 to the drain terminal of the second transistor 5 and the first end of the third resistor 6. The output terminal Tout is also connected outside the amplifier circuit A1 to a subsequent circuit (not shown). In other words, the output terminal Tout is a connection terminal for supplying the high-frequency signal amplified by the amplifier circuit A1 to the subsequent circuit.

[0036] Next, the operations of the amplifier circuit A1 and the bias voltage generating circuit B1 according to the first embodiment will be described in detail with reference to FIGS. 2A and 2B.

[0037] As shown in FIG. 2A, the first resistance value R1 of the first resistor 2 in the bias voltage generating circuit B1 does not change even when the ambient temperature Tj changes. That is, the first resistance value R1 has no temperature dependency. In contrast, as shown in FIG. 2A, the second resistance value R2(Tj) of the second resistor 3 changes when the ambient temperature Tj changes. That is, the second resistance value R2(Tj) has a resistance characteristic that increases linearly as the ambient temperature Tj rises.

[0038] Due to the first resistance value R1 and the second resistance value R2 (Tj), the gate bias voltage Vb generated by the bias voltage generating circuit B1 has temperature dependency as shown in Fig. 2B. That is, the gate bias voltage Vb has a voltage characteristic that increases linearly as the ambient temperature Tj rises.

[0039] Here, the second transistor 5 has a gain characteristic in which the gain decreases linearly as the ambient temperature Tj increases, as is well known in the element performance of an n-type MOS (Metal Oxide Semiconductor) transistor.

[0040] In response to such gain characteristics, the bias voltage generation circuit B1 according to the first embodiment increases the gate bias voltage Vb of the second transistor 5 as the ambient temperature Tj rises. Therefore, the bias voltage generation circuit B1 suppresses a decrease in the gain of the second transistor 5 due to an increase in the ambient temperature Tj, and suppresses fluctuations in the gain of the second transistor 5 even when the ambient temperature Tj changes, as shown in FIG. 2B .

[0041] That is, according to the first embodiment, by selecting the second resistor 3 of the bias voltage generating circuit B1 so as to constant the gain of the second transistor 5, it is possible to suppress fluctuations in the gain of the second transistor 5 even when the ambient temperature Tj changes. Note that fluctuations in the gain of the second transistor 5 change the amplification characteristics of the second transistor 5, such as distortion of the high-frequency signal amplified by the second transistor 5.

[0042] According to the first embodiment, a bias voltage generation circuit B1 includes a first resistor 2 (first circuit) and a second resistor 3 (second circuit) connected in series to a voltage source, and outputs a gate bias voltage Vb obtained by dividing a power supply voltage using a first resistance value R1 (first resistance) of the first resistor 2 (first circuit) and a second resistance value R2 (Tj) (second resistance) of the second resistor 3 (second circuit). Either or both of the first resistance value R1 (first resistance) and the second resistance value R2 (second resistance) have a predetermined tendency to change with changes in ambient temperature Tj. Therefore, it is possible to suppress changes in the amplification characteristics of the second transistor 5 when the ambient temperature Tj changes.

[0043] Second Embodiment Next, a second embodiment of the present invention will be described. As shown in FIG. 3 , an amplifier circuit A2 according to the second embodiment includes a fourth resistor 7 and a third transistor 8 in addition to the components included in the amplifier circuit A1 according to the first embodiment.

[0044] That is, the drain terminal of the first transistor 1 in the amplifier circuit A2 is connected to the first end (one end) of the fourth resistor 7. Also, the first end of the first resistor 2 in the amplifier circuit A2 is connected to the second end (the other end) of the fourth resistor 7 and the gate terminal of the third transistor 8.

[0045] The second transistor 5 in the amplifier circuit A2 has a drain terminal connected to the source terminal of the third transistor 8. The third resistor 6 in the amplifier circuit A2 has a first terminal connected to the drain terminal of the third transistor 8 and the output terminal Tout. The output terminal Tout in the amplifier circuit A2 is connected to the first terminal of the third resistor 6 and the drain terminal of the third transistor 8.

[0046] The fourth resistor 7 has a predetermined fourth resistance value R4(Tj). That is, the fourth resistor 7 has a fourth resistance value R4(Tj) that changes depending on the ambient temperature Tj. The fourth resistor 7 is provided between the first transistor 1 and the first resistor 2 as shown in the figure. The fourth resistor 7, the first resistor 2, and the second resistor 3 form a series resistance circuit.

[0047] The fourth resistor 7 has a first end connected to the drain terminal of the first transistor 1, and a second end connected to the first end of the first resistor 2 and the gate terminal of the third transistor 8. The fourth resistor 7 is a temperature-dependent resistor whose fourth resistance value R4(Tj) has a predetermined tendency to change with changes in the ambient temperature Tj.

[0048] The fourth resistor 7 corresponds to the third circuit in the present invention. The fourth resistance value R4(Tj) corresponds to the third resistor in the present invention. As with the second resistor 3 in the first embodiment, the fourth resistor 7 is set so that the fourth resistance value R4(Tj) suppresses gain fluctuations of the second transistor 5 caused by changes in the ambient temperature Tj.

[0049] That is, in the bias voltage generating circuit B2 according to the second embodiment, in addition to the second resistor 3 having a temperature-dependent second resistance value R2(Tj), a fourth resistor 7 having a temperature-dependent fourth resistance value R4(Tj) is employed so that the gain of the second transistor 5 does not fluctuate with changes in the ambient temperature Tj.

[0050] As shown in the figure, the third transistor 8 is an n-type MOS (Metal Oxide Semiconductor) transistor. As shown in the figure, the third transistor 8 is provided between the second transistor 5 and the third resistor 6 and is cascode-connected to the second transistor 5. That is, the third transistor 8 has a gate terminal connected to a first end of the first resistor 2 and a second end of the fourth resistor 7, a source terminal connected to the drain terminal of the second transistor 5, and a drain terminal connected to a first end of the third resistor 6 and the output terminal Tout.

[0051] Next, the operations of the amplifier circuit A2 and the bias voltage generating circuit B2 according to the second embodiment will be described with reference to FIGS. 4A and 4B.

[0052] As shown in Fig. 4A, the first resistance value R1 of the first resistor 2 in the bias voltage generating circuit B2 does not change even when the ambient temperature Tj changes. In contrast, as shown in Fig. 4A, the second resistance value R2(Tj) of the second resistor 3 changes when the ambient temperature Tj changes. That is, the second resistance value R2(Tj) has a positive resistance characteristic that increases linearly as the ambient temperature Tj rises.

[0053] 4A, the fourth resistor 7 changes its fourth resistance value R4(Tj) when the ambient temperature Tj changes. That is, the fourth resistance value R4(Tj) has a resistance characteristic opposite to that of the second resistance value R2(Tj), and has a negative resistance characteristic that decreases linearly as the ambient temperature Tj increases.

[0054] Due to the first resistance value R1, the second resistance value R2(Tj), and the fourth resistance value R4(Tj), the gate bias voltage Vb generated by the bias voltage generation circuit B2 has temperature dependency as shown in Fig. 4B. That is, the gate bias voltage Vb of the second transistor 5 has a voltage characteristic that increases linearly as the ambient temperature Tj rises.

[0055] Therefore, according to the second embodiment, by optimally setting the rate of change of the second resistance value R2(Tj) and the rate of change of the fourth resistance value R4(Tj), it is possible to achieve a state in which the gain of the second transistor 5 does not fluctuate even if the ambient temperature Tj changes.

[0056] The fourth resistor 7 in the bias voltage generating circuit B2 has a fourth resistance value R4(Tj) that changes when the ambient temperature Tj changes. That is, the fourth resistance value R4(Tj) has a resistance characteristic that decreases linearly as the ambient temperature Tj increases.

[0057] Due to the first resistance value R1, the second resistance value R2(Tj), and the fourth resistance value R4(Tj), the gate bias voltage Vc generated by the bias voltage generating circuit B2 has a voltage characteristic that increases linearly as the ambient temperature Tj rises.

[0058] The third transistor 8 has a gain characteristic in which the gain decreases linearly as the ambient temperature Tj increases, as is well known in the element performance of an n-type MOS (Metal Oxide Semiconductor) transistor.

[0059] In response to such gain characteristics, the bias voltage generation circuit B2 according to the second embodiment increases the gate bias voltage Vc of the third transistor 8 as the ambient temperature Tj rises. Therefore, the bias voltage generation circuit B2 suppresses a decrease in the gain of the third transistor 8 due to an increase in the ambient temperature Tj, and suppresses fluctuations in the gain of the third transistor 8 even when the ambient temperature Tj changes.

[0060] That is, according to the second embodiment, by selecting the fourth resistor 7 of the bias voltage generating circuit B2 so as to constant the gain of the third transistor 8, it is possible to suppress fluctuations in the gain of the third transistor 8 even when the ambient temperature Tj changes. Note that fluctuations in the gain of the third transistor 8 change the amplification characteristics of the third transistor 8, such as distortion of the high-frequency signal amplified by the third transistor 8.

[0061] According to the second embodiment, the bias voltage generating circuit B2 includes a first resistor 2 (first circuit), a second resistor 3 (second circuit), and a fourth resistor 7 (third circuit) connected in series to a voltage source, and outputs a gate bias voltage Vc obtained by dividing the power supply voltage by a first resistance value R1 (first resistance value) of the first resistor 2 (first circuit), a second resistance value R2 (Tj) (second resistance value) of the second resistor 3 (second circuit), and a fourth resistance value R4 (Tj) (third resistance value) of the fourth resistor 7 (third circuit). Therefore, it is possible to suppress changes in the amplification characteristics of the third transistor 8 when the ambient temperature Tj changes.

[0062] The present invention is not limited to the first and second embodiments, and the following modifications are possible, for example. (1) In the above embodiments, the case where the gate bias voltage Vb increases linearly with an increase in the ambient temperature Tj has been described, but the present invention is not limited to this. For example, if the second transistor 5 has a characteristic in which the gain increases linearly as the ambient temperature Tj increases, one or both of the first resistor and the second resistor may be set so that the gate bias voltage Vb decreases linearly with an increase in the ambient temperature Tj.

[0063] (2) In the above embodiments, a single first resistor 2 is used as the first circuit and a single second resistor 3 is used as the second circuit, but the present invention is not limited to this. For example, a resistive circuit in which a plurality of resistors are interconnected may be used as the first circuit and the second circuit.

[0064] (3) In the above embodiments, a resistor whose resistance value changes with changes in the ambient temperature Tj is used as the second resistor 3 of the first resistor 2 and the second resistor 3. However, the present invention is not limited to this. In other words, both the first resistor 2 and the second resistor 3 may be resistors whose resistance value changes with changes in the ambient temperature Tj.

[0065] For example, the first resistor 2 may be a resistor having a first resistance value R1(Tj) that decreases linearly as the ambient temperature Tj increases, and the second resistor 3 may be a resistor having a second resistance value R2(Tj) that increases linearly as the ambient temperature Tj increases.

[0066] (4) In the above embodiments, a p-type MOS (Metal Oxide Semiconductor) transistor is used as the first transistor 1 and an n-type MOS (Metal Oxide Semiconductor) transistor is used as the second transistor 5. However, the present invention is not limited to this. For example, a PNP bipolar transistor may be used as the first transistor 1 and an NPN bipolar transistor may be used as the second transistor 5.

[0067] (5) In the above embodiments, a common-source amplifier circuit using the second transistor 5 is used, but the present invention is not limited to this. Various configurations of the amplifier circuit can be used.

[0068] (6) In each of the above embodiments, the bias voltage generation circuit B1 includes the control terminal Tcnt and the first transistor 1. However, the present invention is not limited to this. That is, if necessary, the control terminal Tcnt and the first transistor 1 may be omitted, and the first end of the first resistor 2 may be directly connected to the voltage source.

[0069] A1, A2 amplifier circuit, B1, B2 bias voltage generating circuit, Tcnt control terminal, Tin input terminal, Tout output terminal, 1 first transistor, 2 first resistor, 3 second resistor, 4 coupling capacitor, 5 second transistor, 6 third resistor, 7 fourth resistor, 8 third transistor

Claims

1. A bias voltage generation circuit comprising a first circuit and a second circuit connected in series to a voltage source, which outputs a bias voltage obtained by dividing the power supply voltage by a first resistance value of the first circuit and a second resistance value of the second circuit, wherein either or both of the first resistance value and the second resistance value have a predetermined tendency to change in response to changes in ambient temperature.

2. A bias voltage generating circuit as claimed in claim 1, wherein said first resistance value does not change according to said ambient temperature, and said second resistance value increases with an increase in said ambient temperature.

3. A bias voltage generating circuit as claimed in claim 1 or 2, further comprising a third circuit provided between said voltage source and said first circuit and having a third resistance value, said third resistance value having a predetermined tendency to change with respect to changes in said ambient temperature.

4. A bias voltage generating circuit as described in claim 3, wherein said first resistance value does not change according to said ambient temperature, said second resistance value increases as said ambient temperature increases, and said third resistance value decreases as said ambient temperature increases.

5. A bias voltage generating circuit according to any one of claims 1 to 4, further comprising a switch for turning on / off a connection to the voltage source.

6. A bias voltage generating circuit according to any one of claims 1 to 5, wherein the first circuit is a single resistor and the second circuit is a single resistor.

7. An amplifier circuit comprising the bias voltage generating circuit according to any one of claims 1 to 6.

Citation Information

Patent Citations

  • Bias circuit of power amplifier

    CN110971201A

  • Microwave amplifier

    JP1982083910A

  • Low noise converter for receiving satellite broadcast

    JP1993267957A

  • Amplifier

    JP2000134043A

  • Fet amplifier

    JP2001284974A