Display device

Abstract

This display device may include a reference current generating circuit and a plurality of light-emitting circuits. The reference current generating circuit may include a constant current source configured to generate a reference current. The plurality of light-emitting circuits are provided in a plurality of subpixels, and may be electrically connected to the reference current generating circuit. Each of the plurality of light-emitting circuits generates a light-emitting current by using the reference current to cause a light-emitting element to emit light, and adjusts a light-emitting time of the light-emitting element by using digital data and a program signal. The reference current and the light-emitting current may be constant currents.

Description

display device

[0001] The embodiment relates to a display device.

[0002] The display market is growing, and its range of applications is continuously expanding. Along with this expansion, product resolutions and features are diversifying.

[0003] As product specifications become more diverse, the driving methods for displays are also becoming more complex.

[0004] Driver ICs used to drive display devices are designed specifically for their specific applications. Therefore, the design's application potential is limited, requiring a custom driver IC for each product.

[0005] Existing display devices employ various methods to ensure uniformity. For example, internal compensation is performed by configuring a light-emitting circuit in each pixel (or subpixel), or external compensation is performed using a specific method.

[0006] Meanwhile, most of the circuit configurations for the operation of the light-emitting circuit have their own capacitors built into the light-emitting circuit, ensuring constant current characteristics.

[0007] Figure 1 is a circuit diagram illustrating a conventional light-emitting circuit.

[0008] As illustrated in Fig. 1, a conventional light-emitting circuit includes a driving transistor (M1), a scan transistor (M2), a sensing transistor (M3), and a capacitor (CSTG).

[0009] When the scan transistor (M2) is turned on in response to the scan signal (SCAN), the data signal (VDATA) is supplied to the driving transistor (M1) via the scan transistor (M2). The driving transistor (M1) supplies a light-emitting current corresponding to the data signal (VDATA) to the light-emitting element (ED), so that the light-emitting element (ED) emits light.

[0010] The capacitor (CSTG) supplies the light emitting current as a constant current to the light emitting element (ED).

[0011] When the sensing transistor (M3) is turned on in response to the sensing control signal (SEN), the luminescence current flowing in the driving transistor (M1) is detected as a sensing signal (VSEN). The characteristics of the corresponding luminescence circuit are calibrated or compensated using the sensing signal (VSEN).

[0012] Meanwhile, the light-emitting circuit of an active matrix display device controls brightness using either the pulse amplitude modulation (PWM) method itself or a PWM method utilizing the pulse amplitude modulation (PAM) method. In these cases, a capacitor is necessarily included within each pixel (or subpixel).

[0013] If the light-emitting circuit is designed to have a capacitor inside every pixel, limitations such as area may arise, or additional problems may arise due to the capacitor inside each pixel.

[0014] The present invention aims to solve the above-mentioned and other problems.

[0015] Another object of the invention is to provide a display device having a novel structure.

[0016] Another object of the present invention is to provide a display device that provides a novel driving method.

[0017] Another object of the present invention is to provide a display device in which a capacitor is not provided in a light-emitting circuit.

[0018] Another object of the present invention is to provide a display device that does not require a display driving circuit including a converter that converts digital data into analog data.

[0019] The technical problems of the embodiment are not limited to those described in this article, but include those that can be understood through the description of the invention.

[0020] According to one aspect of the embodiment to achieve the above or other purposes, a display device including a plurality of subpixels includes: a reference current generation circuit including a constant current source that generates a reference current; and a plurality of light-emitting circuits provided in the plurality of subpixels and electrically connected to the reference current generation circuit; wherein the plurality of light-emitting circuits each generate a light-emitting current using the reference current to emit light from a light-emitting element, and control a light-emitting time of the light-emitting element using digital data and a program signal, and the reference current and the light-emitting current are constant currents.

[0021] The above reference current generation circuit may include a first transistor connected to the constant current source, and the plurality of light-emitting circuits may each include a first transistor constituting a mirror circuit with the first transistor of the reference current generation circuit.

[0022] The aspect ratio of the first transistor of each of the plurality of light-emitting circuits may be greater than or equal to the aspect ratio of the first transistor of the reference current generation circuit.

[0023] The light emitting element and the first transistor of each of the plurality of light emitting circuits may be connected between a first power line and a second power line, a first power voltage may be supplied to the first power line, and a second power voltage lower than the first power voltage may be supplied to the second power line.

[0024] The first transistor of the reference current generation circuit and the first transistor of each of the plurality of light-emitting circuits may be NMOS transistors commonly connected to the second power line.

[0025] The first transistor of the reference current generation circuit and the first transistor of each of the plurality of light-emitting circuits may be PMOS transistors commonly connected to the first power line.

[0026] The above reference current generation circuit may include a switch connected to the first transistor to turn the reference current on / off.

[0027] Each of the plurality of light-emitting circuits may include a switch that is connected to the first transistor and turns the light-emitting current on / off.

[0028] The second on-period of the above luminescent current may be included within the first on-period of the above reference current.

[0029] The plurality of light-emitting circuits may further include a digital storage that generates a control signal for switching the switches of each of the plurality of light-emitting circuits using the digital data.

[0030] The switch of the reference current generation circuit may include at least one of a second transistor or a third transistor, and each of the switches of the plurality of light-emitting circuits may include at least one of the second transistor or the third transistor.

[0031] The second transistor of the reference current generation circuit and the second transistor of the plurality of light-emitting circuits may be NMOS transistors, and the third transistor of the reference current generation circuit and the third transistor of each of the plurality of light-emitting circuits may be PMOS transistors.

[0032] The constant current source of the reference current generation circuit may include a fourth transistor connected to the one or more transistors of the reference current generation circuit.

[0033] The display device may further include a voltage generation circuit connected to the reference current generation circuit and providing a reference voltage for controlling the reference current.

[0034] The voltage generation circuit includes a plurality of first transistors connected to each other between a third power line and a fourth power line, wherein the plurality of first transistors are each diode-connected, and one of the plurality of first transistors can form a current mirror circuit with the fourth transistor of the reference current generation circuit.

[0035] The voltage generation circuit may further include a second transistor connected to another of the plurality of first transistors and having a gate commonly connected to at least one transistor of the reference current generation circuit.

[0036] The current control transistor is further included, which is connected between one of the plurality of first transistors and the third power line, and has a gate commonly connected to the second transistor of the voltage generation circuit and the at least one transistor of the reference current generation circuit; and the current control transistor may have a different conductivity type from the at least one transistor of the reference current generation circuit.

[0037] The display device may further include a selection switch that selects one of the reference voltage and an external voltage and outputs the selected voltage to the reference current generation circuit.

[0038] The effects of the display device according to the embodiment are described as follows.

[0039] According to at least one of the embodiments, a reference current generated by a reference current generating circuit is copied to generate a reference current for emitting light of each light-emitting element of a plurality of subpixels, and the light-emitting time of the light-emitting element is controlled using digital data and a program signal, so that a capacitor that is essentially provided in each subpixel in the past is not required, and the size of the light-emitting circuit is reduced, thereby increasing the light-emitting area and increasing the brightness. Since a converter for converting digital data into an analog voltage is not required, the circuit structure can be simplified.

[0040] According to at least one of the embodiments, the aspect ratio of the transistor of the light-emitting circuit constituting the current mirror circuit can be designed to be larger than the aspect ratio of the transistor of the reference current generation circuit. Therefore, by designing the aspect ratio of the transistor of the reference current generation circuit to be small, a relatively small reference current can be generated, thereby reducing the burden of generating the reference current, reducing the size of the reference current generation circuit, and reducing power consumption. In addition, since the light-emitting current of each of the plurality of light-emitting circuits has a large value, the contrast ratio can be improved and high brightness can be realized.

[0041] According to at least one of the embodiments, a plurality of subpixels may be connected between a first power line and a second power line. Each of the plurality of subpixels may include at least one light-emitting element and a light-emitting circuit connected to the light-emitting element. The first power line or the second power line may be commonly connected to a reference current generation circuit and the plurality of light-emitting circuits. In this case, a transistor of the reference current generation circuit constituting the current mirror circuit and a transistor of each of the plurality of light-emitting circuits may commonly use a second power voltage supplied to the second power line. Therefore, since the transistor of the reference current generation circuit and the transistor of each of the plurality of light-emitting circuits are simultaneously affected by an IR drop related to the second power voltage, they are not affected by a change in the light-emitting current of each of the plurality of subpixels, and thus, poor image quality can be prevented.

[0042] According to at least one of the embodiments, the reference current generation circuit can generate different reference currents based on different reference voltages selected by the selection switch. The reference current generated by the reference current generation circuit can be variably adjusted, so that a luminous current having a desired intensity can be accurately and easily obtained from each of the plurality of subpixels. Accordingly, the contrast ratio and brightness can be precisely and accurately controlled, thereby improving image quality.

[0043] According to at least one of the embodiments, the gate of one transistor of the voltage generation circuit is connected to the gate of the second transistor of the reference current generation circuit, so that they can be turned on / off simultaneously by the same control signal. For example, during a non-emitting period, i.e., an off period, one transistor of the voltage generation circuit and the second transistor of the reference current generation circuit can be turned off. Accordingly, since a constant current does not flow in the voltage generation circuit and a reference current does not flow in the reference current generation circuit, power consumption can be reduced.

[0044] According to at least one of the embodiments, a current control transistor is provided between a transistor of a voltage generation circuit constituting a current mirror circuit and a transistor of a reference current generation circuit, and the current control transistor may have a different conductivity type from a second transistor of the reference current generation circuit. When the current control transistor is turned on during an off period, a constant current does not flow in the voltage generation circuit and a reference current does not flow in the reference current generation circuit, thereby reducing power consumption.

[0045] Further scope of applicability of the embodiments will become apparent from the detailed description below. However, since various changes and modifications within the spirit and scope of the embodiments will be readily apparent to those skilled in the art, it should be understood that the detailed description and specific embodiments, such as preferred embodiments, are given by way of example only.

[0046] Figure 1 is a circuit diagram illustrating a conventional light-emitting circuit.

[0047] FIG. 2 is a block diagram illustrating a display device according to the first embodiment.

[0048] FIG. 3 is a block diagram illustrating a display device according to a second embodiment.

[0049] Figure 4 illustrates a timing diagram according to an embodiment.

[0050] FIG. 5 is a block diagram illustrating a display device according to a third embodiment.

[0051] Fig. 6 is a block diagram illustrating a display device according to the fourth embodiment.

[0052] Fig. 7 is a block diagram illustrating a display device according to the fifth embodiment.

[0053] Fig. 8 is a block diagram illustrating a display device according to the sixth embodiment.

[0054] Fig. 9 is a block diagram illustrating a display device according to the seventh embodiment.

[0055] Fig. 10 is a block diagram illustrating a display device according to the eighth embodiment.

[0056] Fig. 11 is a block diagram illustrating a display device according to the ninth embodiment.

[0057] Fig. 12 is a block diagram illustrating a display device according to the 10th embodiment.

[0058] Fig. 13 is a block diagram illustrating a display device according to the 11th embodiment.

[0059] Fig. 14 is a block diagram illustrating a display device according to the 12th embodiment.

[0060] Fig. 15 is a block diagram illustrating a display device according to the 13th embodiment.

[0061] Fig. 16 is a block diagram illustrating a display device according to the 14th embodiment.

[0062] Figure 17 illustrates a timing diagram according to an embodiment.

[0063] The sizes, shapes, and dimensions of components depicted in the drawings may differ from the actual components. Furthermore, even if the same components are depicted with different sizes, shapes, and dimensions across drawings, this is merely an example within the drawings, and the same components may have the same sizes, shapes, and dimensions across drawings.

[0064] Hereinafter, embodiments disclosed in the present specification will be described in detail with reference to the attached drawings. Regardless of the drawing numbers, identical or similar components will be given the same reference numbers and redundant descriptions thereof will be omitted. The suffixes 'module' and 'part' used for components in the following description are given or used interchangeably in consideration of the ease of writing the specification, and do not have distinct meanings or roles in themselves. In addition, the attached drawings are intended to make it easier to understand the embodiments disclosed in the present specification, and the technical ideas disclosed in the present specification are not limited by the attached drawings. In addition, when an element such as a layer, region, or substrate is referred to as existing 'on' another element, this includes that it may be directly on the other element or that other intermediate elements may exist therebetween.

[0065] Hereinafter, “~module”, “~part”, device, etc. may be composed of “~circuit” or “integrated circuit”. “~module”, “~part”, device, etc. may be used interchangeably with “~circuit” or “integrated circuit”.

[0066] Although the light-emitting element is described below as being provided separately from the light-emitting circuit, the light-emitting element may be included in the light-emitting circuit.

[0067] FIG. 2 is a block diagram illustrating a display device according to the first embodiment.

[0068] Referring to FIG. 2, the display device according to the first embodiment may include a reference current generation circuit (110), a plurality of light-emitting circuits (130-1 to 130-N), a plurality of light-emitting elements (120-1 to 120-N), etc.

[0069] A display device according to the first embodiment may include a display panel. The display panel may include a plurality of pixels. The display panel may include a plurality of subpixels (SP-1 to SP-N).

[0070] Although the drawing shows a plurality of subpixels (SP-1 to SP-N) arranged in a row along the horizontal direction, the plurality of subpixels (SP-1 to SP-N) may be arranged in a row along the vertical direction or in a matrix form.

[0071] The plurality of subpixels (SP-1 to SP-N) may include a plurality of red subpixels, a plurality of green subpixels, and a plurality of blue subpixels. A unit pixel may be formed by adjacent red subpixels, green subpixels, and blue subpixels. In the drawing, SP-1 may be a red subpixel, SP-2 may be a green subpixel, and SP-3 may be a blue subpixel, but this is not limited thereto.

[0072] A red subpixel can emit red light, a green subpixel can emit green light, and a blue subpixel can emit blue light. In addition, the plurality of subpixels (SP-1 to SP-N) may further include a plurality of transparent subpixels that emit transparent light.

[0073] Each of the plurality of subpixels (SP-1 to SP-N) may include at least one light-emitting element (120-1 to 120-N). The light-emitting elements (120-1 to 120-N) may include an organic light-emitting element, a semiconductor light-emitting element, a micro LED (hereinafter, μ-LED), etc.

[0074] For example, a red subpixel may include at least one red light-emitting element for emitting red light. For example, a green subpixel may include at least one green light-emitting element for emitting green light. For example, a blue subpixel may include at least one blue light-emitting element for emitting blue light.

[0075] A plurality of light-emitting circuits (130-1 to 130-N) may be included in a plurality of subpixels (SP-1 to SP-N). The plurality of light-emitting circuits (130-1 to 130-N) may drive a plurality of light-emitting elements (120-1 to 120-N) of the plurality of subpixels (SP-1 to SP-N) to emit light of a plurality of colors. To this end, the plurality of light-emitting circuits (130-1 to 130-N) in the plurality of subpixels (SP-1 to SP-N) may be electrically connected to the plurality of light-emitting elements (120-1 to 120-N).

[0076] A plurality of light-emitting circuits (130-1 to 130-N) can generate a plurality of light-emitting currents (IEM1 to IEMN) to supply to a plurality of light-emitting elements (120-1 to 120-N). The light-emitting currents (IEM1 to IEMN) may be referred to as driving currents.

[0077] For example, in the first subpixel (SP-1), the first light-emitting circuit (130-1) can be electrically connected to the first light-emitting element (120-1) to supply a first light-emitting current (IEM1) to the first light-emitting element (120-1) and drive at least the first light-emitting element (120-1) to emit a first color light. For example, in the second subpixel (SP-2), the second light-emitting circuit (130-2) can be electrically connected to at least one second light-emitting element (120-2) to supply a second light-emitting current (IEM2) to the second light-emitting element (120-2) and drive the second light-emitting element (120-2) to emit a second color light. In the third subpixel (SP-3), the third light-emitting circuit (130-3) is electrically connected to the third light-emitting element (120-3), and a third light-emitting current (IEM3) is supplied to the third light-emitting element (120-3) to drive the second light-emitting element (120-3) to emit a third color light. For example, the first color light may be red light, the second color light may be green light, and the third color light may be blue light, but this is not limited thereto.

[0078] In an embodiment, the light-emitting circuits (130-1 to 130-N) may be implemented as integrated circuits (hereinafter referred to as “ICs”), chips, or packages, or may be formed directly on the panel using a semiconductor process. The plurality of light-emitting circuits (130-1 to 130-N) may be implemented as individual ICs or may be implemented as a single integrated IC.

[0079] In an embodiment, the light emitting elements (120-1 to 120-N) in each subpixel (SP-1 to SP-N) may be included in a light emitting circuit (130-1 to 130-N). That is, the light emitting elements (120-1 to 120-N) may be included in the light emitting circuit (130-1 to 130-N) and may be implemented as an IC, chip, or package.

[0080] In each subpixel (SP-1 to SP-N), the light-emitting elements (120-1 to 120-N) and the light-emitting circuits (130-1 to 130-N) may be electrically connected between a first power line (141) and a second power line (142). For example, one side of the light-emitting elements (120-1 to 120-N) may be electrically connected to the first power line (141), the other side of the light-emitting elements (120-1 to 120-N) may be connected to one side of the light-emitting circuits (130-1 to 130-N), and the other side of the light-emitting circuits (130-1 to 130-N) may be electrically connected to the second power line (142).

[0081] A first power supply voltage (EVDD) may be supplied to a first power supply line (141), and a second power supply voltage (EVSS) may be supplied to a second power supply line (142). The first power supply voltage (EVDD) may be a high-potential voltage and may be higher than the second power supply voltage (EVSS), which is a low-potential voltage. The second power supply voltage (EVSS) may be, for example, grounded or 0 V, but is not limited thereto.

[0082] Meanwhile, the reference current generation circuit (110) can generate a reference current. The reference current generation circuit (110) can be electrically connected to a plurality of subpixels (SP-1 to SP-N).

[0083] The reference current can be used to generate a plurality of emission currents (IEM1 to IEMN) flowing in the plurality of subpixels (SP-1 to SP-N). That is, a plurality of emission currents (IEM1 to IEMN) flowing in the plurality of subpixels (SP-1 to SP-N) can be generated using the reference current. In an embodiment, the emission currents (IEM1 to IEMN) corresponding to the reference current can be generated in each of the plurality of subpixels (SP-1 to SP-N) using a current mirror method. To this end, a current mirror circuit can be configured by a transistor of the reference current generation circuit (110) and a transistor of each of the plurality of emission circuits (130-1 to 130-N). The transistor of the reference current generation circuit (110) can be diode-connected. The transistor of the reference current generation circuit (110) and the transistor of each of the plurality of emission circuits (130-1 to 130-N) can have gates commonly connected.

[0084] The reference current and the emission current (IEM1 to IEMN) can be constant currents. Constant current can mean that a constant current flows even when the voltage applied to both terminals changes.

[0085] The light emission current (IEM1 to IEMN) may be a current corresponding to the reference current. The plurality of light emission currents (IEM1 to IEMN) flowing in the plurality of subpixels (SP-1 to SP-N) may be equal to or greater than the reference current. That is, the plurality of light emission circuits (130-1 to 130-N) may generate light emission currents (IEM1 to IEMN) equal to or greater than the reference current according to a preset ratio, i.e., a radiation ratio.

[0086] By designing the aspect ratio of each transistor of the plurality of light-emitting circuits (130-1 to 130-N) differently with respect to the aspect ratio of the transistor of the reference current generation circuit (110), the radiation ratio can be determined.

[0087] For example, when the aspect ratio of the transistors of the light-emitting circuits (130-1 to 130-N) is the same as the aspect ratio of the transistors of the reference current generating circuit (110), the radiation ratio is 1, and thus the light-emitting currents (IEM1 to IEMN) generated in the plurality of light-emitting circuits (130-1 to 130-N) can be the same as the reference current. For example, when the aspect ratio of the transistors of the light-emitting circuits (130-1 to 130-N) is greater than the aspect ratio of the transistors of the reference current generating circuit (110), the radiation ratio has a value greater than 1, and thus the light-emitting currents (IEM1 to IEMN) generated in the light-emitting circuits (130-1 to 130-N) can be greater than the reference current.

[0088] Accordingly, by freely designing the aspect ratio of each transistor of a plurality of light-emitting circuits (130-1 to 130-N), the light-emitting current (IEM1 to IEMN) required for the corresponding subpixel (SP-1) can be accurately and easily obtained.

[0089] According to an embodiment, the aspect ratio of the transistors of the light-emitting circuits (130-1 to 130-N) can be designed to be larger than the aspect ratio of the transistors of the reference current generation circuit (110). Therefore, by designing the aspect ratio of the transistors of the reference current generation circuit (110) to be small, a relatively small reference current can be generated, thereby reducing the burden of generating the reference current, reducing the size of the reference current generation circuit (110), and reducing power consumption. In addition, since the plurality of light-emitting currents (IEM1 to IEMN) of the plurality of light-emitting circuits (130-1 to 130-N) have large values, the contrast ratio can be improved and high brightness can be implemented.

[0090] Meanwhile, the reference current generation circuit (110) may be electrically connected between the third power line (143) and the second power line (142). The third power voltage (PVDD) may be supplied to the third power line (143). The third power voltage (PVDD) is a high-potential voltage and may be different from the first power voltage (EVDD). For example, the third power voltage (PVDD) may be lower than the first power voltage (EVDD), but is not limited thereto.

[0091] The second power line (142) may be commonly connected to the reference current generation circuit (110) and the plurality of light-emitting circuits (130-1 to 130-N). In this case, the transistor of the reference current generation circuit (110) constituting the current mirror circuit and the plurality of transistors of the plurality of light-emitting circuits (130-1 to 130-N) may commonly use the second power voltage (EVSS) supplied to the second power line (142). Therefore, since the transistor of the reference current generation circuit (110) and the plurality of transistors of the plurality of light-emitting circuits (130-1 to 130-N) are simultaneously affected by the IR drop related to the second power voltage (EVSS), they are not affected by the change in the light-emitting current (IEM1 to IEMN) of each of the plurality of subpixels (SP-1 to SP-N), so that poor image quality can be prevented.

[0092] Meanwhile, although the second power line (142) is commonly connected to the reference current generation circuit (110) and the plurality of light-emitting circuits (130-1 to 130-N), the third power line (143) may be connected only to the reference current generation circuit (110) and not electrically connected to the plurality of light-emitting circuits (130-1 to 130-N). Accordingly, the reference current is not affected by the IR drop associated with the second power voltage (EVSS) supplied to the second power line (142), so that an accurate and constant reference current can be obtained.

[0093] Meanwhile, the plurality of light-emitting circuits (130-1 to 130-N) may control the on period (or light-emitting period) of the light-emitting elements (120-1 to 120-N) using digital data and program signals, respectively, thereby enabling grayscale expression of an image. For example, the digital data may include a signal regarding on / off of the light-emitting elements (120-1 to 120-N). For example, the digital data may include “1” as on of the light-emitting elements (120-1 to 120-N) and “0” as off of the light-emitting elements (120-1 to 120-N), but is not limited thereto.

[0094] When the light-emitting elements (120-1 to 120-N) are turned on, the light-emitting elements (120-1 to 120-N) may emit light, and when the light-emitting elements (120-1 to 120-N) are turned off, the light-emitting elements (120-1 to 120-N) may stop emitting light. For example, the program signal may include grayscale information, etc., as a control signal for writing input data.

[0095] According to digital data, light-emitting elements (120-1 to 120-N) are turned on, and by controlling the on-period of the light-emitting elements (120-1 to 120-N) according to a program signal, an image having a desired grayscale can be displayed. For example, as the on-period increases, an image having a higher grayscale can be displayed. By emitting light-emitting elements (120-1 to 120-N) with different on-periods for the same subpixel (SP-1) in each frame, an image having different grayscales can be displayed for each frame.

[0096] In the drawing, the G node may be a node between the gate of the transistor of the reference current generation circuit (110) constituting the current mirror circuit and the gate of each transistor of the plurality of light-emitting circuits (130-1 to 130-N).

[0097] A predetermined voltage can be generated at the G node through the transistor of the reference current generation circuit (110) by the reference current generated in the reference current generation circuit (110). A plurality of light-emitting currents (IEM1 to IEMN) can be generated in the transistors of the plurality of light-emitting elements (120-1 to 120-N) by the predetermined voltage. In this case, as described above, since the aspect ratio of the transistors of the light-emitting elements (120-1 to 120-N) is designed to be the same as or different from the aspect ratio of the transistors of the reference current generation circuit (110), the same or different light-emitting currents (IEM1 to IEMN) can be generated in the transistors of each of the plurality of light-emitting elements (120-1 to 120-N) based on the voltage on the G node.

[0098] Meanwhile, in the embodiment, a plurality of subpixels (SP-1 to SP-N) can be driven simultaneously. That is, a plurality of subpixels (SP-1 to SP-N) are driven simultaneously within one frame, and the on period of the light-emitting elements (120-1 to 120-N) of each of the plurality of subpixels (SP-1 to SP-N) is controlled so that images of different grayscale levels can be displayed on each of the subpixels (SP-1 to SP-N).

[0099] Meanwhile, although not shown, the display device according to the first embodiment may include a voltage generation circuit. The voltage generation circuit may be connected to a reference current generation circuit (110) and output a reference voltage for generating a reference current. The reference current generation circuit (110) may generate a reference current based on the reference voltage provided by the voltage generation circuit (150).

[0100] Meanwhile, the display panel may include a display area including a plurality of pixels (or a plurality of subpixels (SP-1 to SP-N)) and a non-display area excluding the display area.

[0101] A voltage generation circuit (150) and a reference current generation circuit (110) may be provided on a display panel. The voltage generation circuit (150) and the reference current generation circuit (110) may be implemented as a single IC or individual ICs.

[0102] The voltage generation circuit (150) and the reference current generation circuit (110) may be provided in an area between adjacent sub-pixels within the display area. For example, the voltage generation circuit (150) and the reference current generation circuit (110) may be provided in the display area.

[0103] The voltage generation circuit (150) and the reference current generation circuit (110) may be provided in one area of ​​the non-display area.

[0104] Fig. 3 is a block diagram illustrating a display device according to a second embodiment. Although the drawing illustrates one subpixel (SP-1) among the plurality of subpixels (SP-1 to SP-N) illustrated in Fig. 2, other subpixels (SP-2 to SP-N) may also have the same or similar circuit structure as the corresponding subpixel (SP-1).

[0105] Referring to FIG. 3, a display device according to the second embodiment may include a reference current generation circuit (110), a light-emitting circuit (130-1), at least one light-emitting element (120-1), etc. The light-emitting circuit (130-1) and the light-emitting element (120-1) may be included in a subpixel (SP-1). Alternatively, the light-emitting circuit (130-1) may not be included in the subpixel (SP-1).

[0106] The reference current generation circuit (110) can be electrically connected to the corresponding subpixel (SP-1). The reference current generation circuit (110) can be electrically connected to the light-emitting circuit (130-1) to generate a light-emitting current (IEM1) in the light-emitting circuit (130-1). That is, based on the reference current (IREF) generated by the reference current generation circuit (110), the light-emitting current (IEM1) is generated in the corresponding subpixel (SP-1), and the light-emitting element (120-1) can emit light by the generated light-emitting current (IEM1).

[0107] The reference current generation circuit (110) may include a constant current source (111), a first transistor (T1), switches (S1, S2), etc.

[0108] The constant current source (111) may be a source that generates a constant current. In an embodiment, the constant current may be used as a reference current (IREF) to generate a light emitting current (IEM1) in the light emitting circuit (130-1).

[0109] The first transistor (T1) may be electrically connected to a constant current source (111). The first transistor (T1) may be diode-connected. That is, the gate and drain of the first transistor (T1) may be commonly connected. The reference current (IREF) generated by the constant current source (111) may flow through the first transistor (T1).

[0110] Switches (S1, S2) are connected to the first transistor (T1) and can control the on / off of the reference current (IREF). Turning on the reference current (IREF) may mean that the reference current (IREF) flows to the first transistor (T1), and turning off the reference current (IREF) may mean that the reference current (IREF) does not flow to the first transistor (T1).

[0111] The switch may include a first switch (S1) and a second switch (S2). The first switch (S1) may be connected between a first transistor (T1) and a second power line (142), and the second switch (S2) may be connected between a constant current source (111) and the first transistor (T1).

[0112] The first switch (S1) and the second switch (S2) can be turned on or off simultaneously by the first control signal (D1, D2). When the first switch (S1) and the second switch (S2) are in an open state by the first control signal (D1, D2), the reference current (IREF) does not flow to the first transistor (T1), which may mean that the reference current (IREF) is turned off. When the first switch (S1) and the second switch (S2) are in a closed state by the first control signal (D1, D2), the reference current (IREF) flows to the first transistor (T1), which may mean that the reference current (IREF) is turned on. The time period during which the reference current (IREF) flows to the first transistor (T1) may be defined as an on period. The time period during which the reference current (IREF) does not flow to the first transistor (T1) may be defined as an off period.

[0113] For example, the cycle can be divided into an on period and an off period. The cycle can be, for example, one frame, but is not limited thereto. During the on period, the first switch (S1) and the second switch (S2) are in a closed state, so that the reference current (IREF) can flow to the first transistor (T1). During the off period, the first switch (S1) and the second switch (S2) are in an open state, so that the reference current (IREF) cannot flow to the first transistor (T1).

[0114] Meanwhile, a light-emitting circuit (130-1) and a light-emitting element (120-1) may be included in the subpixel (SP-1). The light-emitting element (120-1) may not be included in the subpixel (SP-1).

[0115] The light-emitting circuit (130-1) can drive the light-emitting element (120-1) to emit light. To this end, the light-emitting circuit (130-1) generates a light-emitting current (IEM1), and the light-emitting element (120-1) can emit light by the generated light-emitting current (IEM1).

[0116] The light emitting circuit (130-1) may include a first transistor (T11), switches (SW11, SW12), digital storage (135-1), etc.

[0117] The first transistor (T11) of the light-emitting circuit (130-1) may be connected to the light-emitting element (120-1). The light-emitting element (120-1) and the light-emitting circuit (130-1) may be connected between a first power line (141) and a second power line (142). For example, the anode electrode of the light-emitting element (120-1) may be electrically connected to the first power line (141), the cathode electrode of the light-emitting element (120-1) may be electrically connected to the drain of the first transistor (T11), and the source of the first transistor (T11) may be electrically connected to the second power line (142).

[0118] The first transistor (T11) can generate a luminescence current (IEM1). The luminescence current (IEM1) can be generated based on a reference current (IREF) generated by a reference current generation circuit (110). The first transistor (T11) can generate a luminescence current (IEM1) corresponding to the reference current (IREF) generated by the reference current generation circuit (110). The first transistor (T11) can generate a luminescence current (IEM1) that is a copy of the reference current (IREF). When the luminescence current (IEM1) is generated by the first transistor (T11), the light-emitting element (120-1) can emit light by the luminescence current (IEM1).

[0119] A current mirror circuit can be configured by the first transistor (T1) of the reference current generation circuit (110) and the first transistor (T11) of the light-emitting circuit (130-1). In the current mirror circuit, a light-emitting current (IEM1) can be generated in the first transistor (T11) of the light-emitting circuit (130-1) in response to the reference current (IREF) flowing in the first transistor (T1) of the reference current generation circuit (110). At this time, the light-emitting current (IEM1) can be equal to or greater than the reference current (IREF).

[0120] In the embodiment, the first transistor (T1) of the reference current generation circuit (110) and the first transistor (T11) of the light-emitting circuit (130-1) may be MOS transistors. The first transistor (T1) of the reference current generation circuit (110) and the first transistor (T11) of the light-emitting circuit (130-1) may be MOS transistors of the same conductivity type. The first transistor (T1) of the reference current generation circuit (110) and the first transistor (T11) of the light-emitting circuit (130-1) may be NMOS transistors, but are not limited thereto.

[0121] The first transistor (T1) of the reference current generation circuit (110) is diode-connected, and the gate of the first transistor (T1) of the reference current generation circuit (110) and the gate of the first transistor (T11) of the light-emitting circuit (130-1) can be commonly connected to the G node. In addition, the source of the first transistor (T1) of the reference current generation circuit (110) and the source of the first transistor (T11) of the light-emitting circuit (130-1) can be commonly connected to the second power line (142).

[0122] In this case, the reference current (IREF) flowing in the reference current generation circuit (110) can be expressed by mathematical expression 1, and the light emission current (IEM1) flowing in the light emission circuit (130-1) can be expressed by mathematical expression 2.

[0123]

[0124]

[0125] From mathematical expression 1, the voltage of node G (V G ) can be produced. That is, the first transistor (T1) of the reference current generation circuit (110) may be a conversion element that converts the reference current (IREF) into a voltage of the G node.

[0126] The first transistor (T11) of the light-emitting circuit (130-1) may be a conversion element that converts the voltage of the G node into a light-emitting current (IEM1).

[0127] From mathematical expressions 1 and 2, the process constant (μ, C) in the first transistor (T1) of the reference current generation circuit (110) and the first transistor (T11) of the light-emitting circuit (130-1) ox ) and aspect ratio (W D / L D , W E / L E ) are the same, the reference current (IREF) and the emission current (IEM1) may be the same. In this case, the reference current (IREF) may be copied as is and generated as the emission current (IEM1) in the emission circuit (130-1).

[0128] In contrast, the process constant (μ, C) in the first transistor (T1) of the reference current generation circuit (110) and the first transistor (T11) of the light-emitting circuit (130-1) ox ) are the same, but the aspect ratio (W D / L D , W E / L E ) are different, the reference current (IREF) and the emission current (IEM1) may be different. For example, the aspect ratio (W) of the first transistor (T11) of the emission circuit (130-1) E / L E ) is the aspect ratio (W) of the first transistor (T1) of the reference current generation circuit (110). D / L D), the luminescent current (IEM1) may be greater than the reference current (IREF). For convenience, the aspect ratio (W) of the first transistor (T1) of the reference current generation circuit (110) D / L D ) is named as the first aspect ratio, and the aspect ratio (W) of the first transistor (T11) of the light-emitting circuit (130-1) E / L E ) can be named the second aspect ratio.

[0129] Therefore, the first aspect ratio (W D / L D ) is designed to be small, so that a small reference current (IREF) can be generated in the reference current generation circuit (110). Accordingly, the burden of generating the reference current is reduced, the size of the reference current generation circuit (110) is reduced, and power consumption can be reduced.

[0130] Also, the second aspect ratio (W E / L E ) is designed to be large, so that a large luminescent current (IEM1) can be generated in the luminescent circuit (130-1). Accordingly, since the luminescent element (120-1) emits light through the large luminescent current (IEM1), the contrast ratio can be improved and high brightness can be realized.

[0131] Meanwhile, the switches (SW11, SW12) of the light-emitting circuit (130-1) are connected to the first transistor (T11) to control the on / off of the light-emitting current (IEM1). The switches may include a first switch (SW11) and a second switch (SW12). The first switch (SW11) may be connected between the first transistor (T11) and the second power line (142), and the second switch (SW12) may be connected between the light-emitting element (120-1) and the first transistor (T11).

[0132] The first switch (SW11) and the second switch (SW12) can be turned on or off simultaneously by the second control signal (C11, C12). When the first switch (SW11) and the second switch (SW12) are in an open state by the second control signal (C11, C12), the luminescence current (IEM1) does not flow to the first transistor (T11), which may mean that the luminescence current (IEM1) is turned off. When the first switch (SW11) and the second switch (SW12) are in a closed state by the second control signal (C11, C12), the luminescence current (IEM1) flows to the first transistor (T11), which may mean that the luminescence current (IEM1) is turned on. The time during which the luminescence current (IEM1) flows to the first transistor (T11) may be defined as an on period. The time period during which the emission current (IEM1) does not flow through the first transistor (T11) can be defined as an off period.

[0133] For example, it can be divided into an on period and an off period by period. A period can be, for example, one frame, but is not limited thereto. During the on period, the first switch (SW11) and the second switch (SW12) are in a closed state, so that the light emission current (IEM1) can flow to the first transistor (T11). During the off period, the first switch (SW11) and the second switch (SW12) are in an open state, so that the light emission current (IEM1) can not flow to the first transistor (T11).

[0134] For convenience of explanation, the ON period in which the reference current (IREF) flows through the first transistor (T1) of the reference current generation circuit (110) may be named a first ON period (SS1), and the ON period in which the light emission current (IEM1) flows through the first transistor (T11) of the light emission circuit (130-1) may be named a second ON period (SS2).

[0135] As illustrated in FIG. 4, when the switches (S1, S2) of the reference current generation circuit (110) are in a closed state in response to the first control signal (D1, D2), the reference current (IREF) can flow to the first transistor (T1) of the reference current generation circuit (110) during the first on-period (SS1). When the switches (SW11, SW12) of the light-emitting circuit (130-1) are in a closed state in response to the second control signal (C11, C12), the light-emitting current (IEM1) can flow to the first transistor (T11) of the light-emitting circuit (130-1) during the second on-period (SS2).

[0136] The second on-period (SS2) may be included within the first on-period (SS1). The width of the second on-period (SS2) may be greater than the width of the first on-period (SS1). The rising time of the first on-period (SS1) may be faster than the rising time of the second on-period (SS2), and the falling time of the first on-period (SS1) may be slower than the falling time of the second on-period (SS2).

[0137] Meanwhile, digital storage (135-1) may be included in the light-emitting circuit (130-1), but is not limited thereto.

[0138] Digital storage (135-1) can generate a second control signal (C11, C12) for switching the switches (SW11, SW12) of the light-emitting circuit (130-1) using digital data (DM-1) and a program signal.

[0139] In response to the second control signal (C11, C12), the switches (SW11, SW12) can be turned on / off. When the switches (SW11, SW12) are in a closed state during the second on period (SS2) in response to the second control signal (C11, C12), a light-emitting current (IEM1) is generated in the first transistor (T11), and the light-emitting element (120-1) can emit light by the generated light-emitting current (IEM1).

[0140] Since the switches (SW11, SW12) are maintained in a closed state during the second on period (SS2), the light emitting element (120-1) can emit light during the second on period (SS2).

[0141] The second ON period (SS2) may be determined by a program signal, but is not limited thereto. The program signal may include grayscale information for determining the second ON period (SS2). Accordingly, a second control signal (C11, C12) having a second ON period (SS2) may be generated based on the digital data (DM-1) and the program signal. For example, the larger the grayscale, the larger the second ON period (SS2). Accordingly, by changing the width of the second ON period (SS2), an image having a desired grayscale can be displayed.

[0142] Meanwhile, a first control signal (D1, D2) for maintaining the switches (S1, S2) of the reference current generation circuit (110) in a closed state during the first on period (SS1) may be provided from an external source, such as a host, a data processing device, a processor, a controller, etc.

[0143] According to an embodiment, a constant current, a light emission current (IEM1), may be generated in the first transistor (T11) of the light emission circuit (130-1) in response to a reference current (IREF) generated in the reference current generation circuit (110). At this time, a second on-period (SS2) is determined or controlled based on digital data (DM-1) and a program signal, and the light emission element (120-1) emits light during the second on-period (SS2), thereby allowing images having different grayscales to be displayed. For example, as the second on-period (SS2) increases, an image having a higher grayscale may be displayed.

[0144] FIG. 5 is a block diagram illustrating a display device according to a third embodiment.

[0145] The third embodiment is similar to the second embodiment (Fig. 3) except that the first transistor (T1) of the reference current generation circuit (110) and the first transistor (T11) of the light-emitting circuit (130-1) are PMOS transistors. In the third embodiment, components having the same functions as those of the second embodiment (Fig. 3) are given the same reference numerals, and detailed descriptions are omitted. Descriptions omitted in the third embodiment can be easily understood from the description of the second embodiment (Fig. 3).

[0146] Referring to FIG. 5, a display device according to a third embodiment may include a reference current generation circuit (110), a light-emitting circuit (130-1), at least one light-emitting element (120-1), and the like. The light-emitting circuit (130-1) and the light-emitting element (120-1) may be included in a subpixel (SP-1). Alternatively, the light-emitting circuit (130-1) may not be included in the subpixel (SP-1).

[0147] The reference current generation circuit (110) may include a constant current source (111), a first transistor (T1), switches (S1, S2), etc.

[0148] The light emitting circuit (130-1) may include a first transistor (T11), switches (SW11, SW12), digital storage (135-1), etc.

[0149] Unlike the second embodiment (Fig. 3), in the third embodiment, the first transistor (T1) of the reference current generation circuit (110) and the first transistor (T11) of the light-emitting circuit (130-1) may be PMOS transistors.

[0150] In the reference current generation circuit (110), one side of the second switch (S2) may be connected to the first power line (141), and the other side of the second switch (S2) may be connected to the source of the first transistor (T1). The drain of the first transistor (T1) may be connected to one side of the first switch (S1), the other side of the first switch (S1) may be connected to one side of a constant current source (111), and the other side of the constant current source (111) may be connected to a fourth power line (144). The fourth power voltage (PVSS) may be supplied to the fourth power line (144). The fourth power voltage (PVSS) may be grounded or 0 V.

[0151] In the light-emitting circuit (130-1), one side of the second switch (SW12) may be connected to the first power line (141), and the other side of the second switch (SW12) may be connected to the source of the first transistor (T11). The drain of the first transistor (T11) may be connected to one side of the first switch (SW11), the other side of the first switch (SW11) may be connected to one side of a constant current source (111), and the other side of the constant current source (111) may be connected to the second power line (142).

[0152] Meanwhile, a current mirror circuit can be configured by the first transistor (T1) of the reference current generation circuit (110) and the first transistor (T11) of the light-emitting circuit (130-1).

[0153] To this end, the first transistor (T1) of the reference current generation circuit (110) may be diode-connected, and the gate of the first transistor (T1) of the reference current generation circuit (110) and the gate of the first transistor (T11) of the light-emitting circuit (130-1) may be connected to the G node. In addition, the first power line (141) may be commonly connected to the source of the first transistor (T1) of the reference current generation circuit (110) and the source of the first transistor (T11) of the light-emitting circuit (130-1).

[0154] In this case, the voltage of the G node is obtained by the reference current (IREF) flowing in the first transistor (T1) of the reference current generation circuit (110), and the light emission current (IEM1) can be generated in the first transistor (T11) of the light emission circuit (130-1) based on the voltage of the G node. That is, by the configuration of the current mirror circuit, the reference current (IREF) of the reference current generation circuit (110) can be copied and generated as the light emission current (IEM1) in the light emission circuit (130-1). At this time, the copy ratio is the aspect ratio of the first transistor (T11) of the light emission circuit (130-1), i.e., the second aspect ratio (W E / L E ) of the first transistor (T1) of the reference current generation circuit (110), i.e., the first aspect ratio (W D / L D ) can be defined as the value divided by the second aspect ratio (W E / L E ) is the first aspect ratio (W D / L D ), so that the luminous current (IEM1) can be equal to or greater than the reference current (IREF).

[0155] A reference current (IREF) may be generated as a constant current from a constant current source (111) of a reference current generation circuit (110). In this case, a light emission current (IEM1) may be generated in a first transistor (T11) of a light emission circuit (130-1) in response to the reference current (IREF) flowing in a first transistor (T1) of the reference current generation circuit (110). The light emission element (120-1) may emit light by the generated light emission current (IEM1). At this time, the light emission element (120-1) may emit light while the switches (SW11, SW12) are in a closed state in response to a second control signal (C11, C12) provided from the digital storage (135-1), that is, during the second on-period (SS2). Therefore, an image of a desired grayscale may be displayed by the light emission element (120-1) that emits light during the second on-period (SS2).

[0156] Fig. 6 is a block diagram illustrating a display device according to the fourth embodiment.

[0157] The fourth embodiment is identical to the second embodiment (Fig. 3) except for the voltage generation circuit (150). Components having the same functions as those of the second embodiment (Fig. 3) in the fourth embodiment are assigned the same reference numerals, and detailed descriptions are omitted. Any omitted descriptions in the fourth embodiment can be readily understood from the description of the second embodiment (Fig. 3). The fourth embodiment can also be applied to the third embodiment.

[0158] Referring to FIG. 6, a display device according to the fourth embodiment may include a voltage generation circuit (150), a reference current generation circuit (110), a light-emitting circuit (130-1), at least one light-emitting element (120-1), and the like. The light-emitting circuit (130-1) and the light-emitting element (120-1) may be included in a subpixel (SP-1). Alternatively, the light-emitting circuit (130-1) may not be included in the subpixel (SP-1).

[0159] Since the reference current generation circuit (110), light emitting circuit (130-1), and light emitting element (120-1) have already been described, a detailed description is omitted.

[0160] The voltage generation circuit (150) is connected to the reference current generation circuit (110) and can provide a reference voltage (VREF) for controlling or determining the reference current (IREF). That is, the reference current (IREF) generated by the reference current generation circuit (110) can be determined by the reference voltage (VREF) provided by the voltage generation circuit (150). For example, the larger the reference voltage (VREF), the larger the reference current (IREF) can be.

[0161] The voltage generation circuit (150) can output a reference voltage (VREF) to the X node. The reference current generation circuit (110) can generate a reference current (IREF) based on the voltage of the X node, i.e., the reference voltage (VREF) output from the voltage generation circuit (150).

[0162] For convenience, the X node may be named the first node, the G node may be named the second node, or vice versa.

[0163] According to the fourth embodiment, the voltage generation circuit (150) provides a reference voltage (VREF) for regulating or determining the reference current (IREF) of the reference current generation circuit (110), thereby facilitating the regulation of the reference current (IREF) of the reference current generation circuit (110).

[0164] Meanwhile, the voltage generation circuit (150) can be applied equally to the third embodiment (Fig. 5).

[0165] Fig. 7 is a block diagram illustrating a display device according to the fifth embodiment.

[0166] The fifth embodiment is identical to the second embodiment (Fig. 3) except for a plurality of subpixels (SP-1 to SP-N) each including light-emitting elements (120-1 to 120-N) and light-emitting circuits (130-1 to 130-N). In the fifth embodiment, components having the same functions as those in the second embodiment (Fig. 3) are given the same reference numerals, and detailed descriptions are omitted. Descriptions omitted in the fifth embodiment can be readily understood from the description of the second embodiment (Fig. 3).

[0167] Referring to FIG. 7, a display device according to the fifth embodiment may include a voltage generation circuit (150), a reference current generation circuit (110), a plurality of light-emitting circuits (130-1 to 130-N), a plurality of light-emitting elements (120-1 to 120-N), etc.

[0168] A reference current generation circuit (110) and a plurality of subpixels (SP-1 to SP-N) may be provided on a display panel. The plurality of subpixels (SP-1 to SP-N) may be connected between a first power line (141) and a second power line (142).

[0169] The plurality of subpixels (SP-1 to SP-N) may include a plurality of light-emitting circuits (130-1 to 130-N), a plurality of light-emitting elements (120-1 to 120-N), etc. One side of the plurality of light-emitting elements (120-1 to 120-N) may be electrically connected to a first power line (141), the other side of the plurality of light-emitting elements (120-1 to 120-N) may be electrically connected to one side of the plurality of light-emitting circuits (130-1 to 130-N), and the other side of the plurality of light-emitting circuits (130-1 to 130-N) may be electrically connected to a second power line (142).

[0170] The plurality of light-emitting circuits (130-1 to 130-N) may include first transistors (T11 to TN1), switches (SW11 to SWN1, SW12 to SWN2), digital storage (135-1 to 135-N), etc.

[0171] The switch may include a first switch (SW11 to SWN1) and / or a second switch (SWN2). For example, the first switch (SW11 to SWN1) may be connected between the source of the first transistor (T11 to TN1) and the second power line (142), and the second switch (SWN2) may be connected between the drain of the first transistor (T11 to TN1) and the plurality of light-emitting elements (120-1 to 120-N).

[0172] Meanwhile, the reference current generation circuit (110) can be electrically connected to a plurality of subpixels (SP-1 to SP-N).

[0173] The reference current generation circuit (110) may include a constant current source (111), a first transistor (T1), switches (S1, S2), etc.

[0174] The switch may include a first switch (S1) and / or a second switch (S2). For example, the first switch (S1) may be connected between the source of the first transistor (T1) and the second power line (142), and the second switch (S2) may be connected between the drain of the first transistor (T1) and the constant current source (111).

[0175] A current mirror circuit can be configured by a first transistor (T1) of a reference current generation circuit (110) and a plurality of first transistors (T11 to TN1) of a plurality of light-emitting circuits (130-1 to 130-N). The first transistor (T1) of the reference current generation circuit (110) and the plurality of first transistors (T11 to TN1) of a plurality of light-emitting circuits (130-1 to 130-N) can be NMOS transistors.

[0176] The first transistor (T1) of the reference current generation circuit (110) may be diode-connected. The gate of the first transistor (T1) of the reference current generation circuit (110) and the gates of the plurality of first transistors (T11 to TN1) of the plurality of light-emitting circuits (130-1 to 130-N) may be commonly connected to the G node. The second power line (142) may be commonly connected to the reference current generation circuit (110) and the plurality of first transistors (T11 to TN1) of the plurality of light-emitting circuits (130-1 to 130-N).

[0177] In this case, the reference current (IREF) generated in the reference current generation circuit (110) is copied, so that a plurality of light-emitting currents (IEM1 to IEMN) can be generated in a plurality of light-emitting circuits (130-1 to 130-N) of a plurality of subpixels (SP-1 to SP-N). At this time, the plurality of light-emitting currents (IEM1 to IEMN) can be the same or different depending on the copy ratio. When the copy ratio is 1, the plurality of light-emitting currents (IEM1 to IEMN) are all the same and can also be the same as the reference current (IREF). When the copy ratios are different, the plurality of light-emitting currents (IEM1 to IEMN) can be different. When the copy ratio is greater than 1, the plurality of light-emitting currents (IEM1 to IEMN) can be greater than the reference current (IREF).

[0178] Therefore, the aspect ratio (W) of the plurality of first transistors (T11 to TN1) of the plurality of light-emitting circuits (130-1 to 130-N) E / L E ) of the first transistor (T1) of the reference current generation circuit (110) is the aspect ratio (W D / L D ), a plurality of identical or different luminescent currents (IEM1 to IEMN) can be generated in a plurality of luminescent circuits (130-1 to 130-N). The plurality of luminescent currents (IEM1 to IEMN) can be constant currents.

[0179] According to the fifth embodiment, a plurality of light-emitting currents (IEM1 to IEMN) for emitting light from a plurality of light-emitting elements (120-1 to 120-N) of a plurality of subpixels (SP-1 to SP-N) are simultaneously generated using a reference current (IREF) generated from a single reference current generating circuit (110), thereby greatly simplifying the circuit structure and making it easy and highly efficient to drive a plurality of subpixels (SP-1 to SP-N).

[0180] According to the fifth embodiment, by adjusting the multiple radiance ratios of the multiple light-emitting circuits (130-1 to 130-N), the same or different multiple light-emitting currents (IEM1 to IEMN) can be generated in each of the multiple light-emitting circuits (130-1 to 130-N) of the multiple subpixels (SP-1 to SP-N), so that the image quality can be improved through optimal grayscale expression or optimal brightness implementation.

[0181] Fig. 8 is a block diagram illustrating a display device according to the sixth embodiment.

[0182] The sixth embodiment is identical to the fourth embodiment (Fig. 6) except that the switch (S1) of the reference current generation circuit (110) and the switch (SW11) of the light-emitting circuit (130-1) are each provided with one switch. In the sixth embodiment, the same reference numerals are assigned to components having the same functions as in the fourth embodiment (Fig. 6), and detailed descriptions are omitted. The omitted descriptions in the sixth embodiment can be easily understood from the description of the fourth embodiment (Fig. 6). The sixth embodiment can also be applied to the fifth embodiment.

[0183] Referring to FIG. 8, a display device according to the sixth embodiment may include a voltage generation circuit (150), a reference current generation circuit (110), a light-emitting circuit (130-1), at least one light-emitting element (120-1), etc.

[0184] The second switch (S2) of the reference current generation circuit (110) provided in the fourth embodiment (Fig. 6) and the second switch (SW12) of each of the light-emitting circuits (130-1) may be omitted in the sixth embodiment.

[0185] A current mirror circuit can be configured by the first transistor (T1) of the reference current generation circuit (110) and the first transistor (T11) of the light-emitting circuit (130-1). The first transistor (T1) of the reference current generation circuit (110) and the first transistor (T11) of the light-emitting circuit (130-1) can be NMOS transistors.

[0186] In the reference current generation circuit (110), the constant current source (111) may include a PMOS transistor. In this case, the third power line (143) may be commonly connected to the voltage generation circuit (150) and the reference current generation circuit (110).

[0187] In the reference current generation circuit (110), the drain of the first transistor (T1) can be directly connected to a constant current source (111). In the reference current generation circuit (110), the source of the first transistor (T1) can be electrically connected to one side of the first switch (S1), and the other side of the first switch (S1) can be connected to the second power line (142).

[0188] In the light-emitting circuit (130-1), the drain of the first transistor (T11) may be directly connected to the light-emitting element (120-1). In the light-emitting circuit (130-1), the source of the first transistor (T11) may be connected to one side of the first switch (SW11), and the other side of the first switch (SW11) may be connected to the second power line (142).

[0189] As illustrated in Fig. 4, the first switch (S1) of the reference current generation circuit (110) may be in a closed state during the first on-period (SS1), and the first switch (SW11) of the light-emitting circuit (130-1) may be in a closed state during the second on-period (SS2). Accordingly, the light-emitting element (120-1) may emit light at least during the second on-period (SS2), and an image having a grayscale corresponding to the second on-period (SS2) may be displayed.

[0190] Fig. 9 is a block diagram illustrating a display device according to the seventh embodiment.

[0191] The seventh embodiment is identical to the fourth embodiment (Fig. 6) except that each of the switch (S2) of the reference current generation circuit (110) and the switch (SW12) of the light-emitting circuit (130-1) is provided. In the seventh embodiment, the same reference numerals are assigned to components having the same functions as in the fourth embodiment (Fig. 6), and detailed descriptions are omitted. The omitted descriptions in the seventh embodiment can be easily understood from the description of the fourth embodiment (Fig. 6). The seventh embodiment can also be applied to the fifth embodiment.

[0192] Referring to FIG. 9, a display device according to the seventh embodiment may include a voltage generation circuit (150), a reference current generation circuit (110), a light-emitting circuit (130-1), at least one light-emitting element (120-1), etc.

[0193] The first switch (S1) of the reference current generation circuit (110) provided in the fourth embodiment (Fig. 6) and the first switch (SW11) of each of the light-emitting circuits (130-1) may be omitted in the seventh embodiment.

[0194] A current mirror circuit can be configured by the first transistor (T1) of the reference current generation circuit (110) and the first transistor (T11) of the light-emitting circuit (130-1). The first transistor (T1) of the reference current generation circuit (110) and the first transistor (T11) of the light-emitting circuit (130-1) can be NMOS transistors.

[0195] In the reference current generation circuit (110), one side of the second switch (S2) is electrically connected to a constant current source (111), the other side of the second switch (S2) is electrically connected to a drain of the first transistor (T1), and the source of the first transistor (T1) can be directly connected to a second power line (142).

[0196] In the light-emitting circuit (130-1), one side of the second switch (SW12) is electrically connected to the light-emitting element (120-1), the other side of the second switch (SW12) is electrically connected to the drain of the first transistor (T11), and the source of the first transistor (T11) can be directly connected to the second power line (142).

[0197] As illustrated in FIG. 4, the second switch (S2) of the reference current generation circuit (110) may be in a closed state during the first on-period (SS1), and the second switch (SW12) of the light-emitting circuit (130-1) may be in a closed state during the second on-period (SS2). Accordingly, the light-emitting element (120-1) may emit light at least during the second on-period (SS2), and an image having a grayscale corresponding to the second on-period (SS2) may be displayed.

[0198] Fig. 10 is a block diagram illustrating a display device according to the eighth embodiment.

[0199] The eighth embodiment is similar to the fourth embodiment (Fig. 6) except that the first transistor (T1) of the reference current generation circuit (110) and the first transistor (T11) of the light-emitting circuit (130-1) are PMOS transistors. In the eighth embodiment, components having the same functions as those in the fourth embodiment (Fig. 6) are given the same reference numerals, and detailed descriptions are omitted. The omitted descriptions in the eighth embodiment can be easily understood from the description of the fourth embodiment (Fig. 6). The eighth embodiment can be equally applied to the fifth embodiment (Fig. 7), the sixth embodiment (Fig. 8), and the seventh embodiment (Fig. 9).

[0200] Referring to FIG. 10, a display device according to the eighth embodiment may include a voltage generation circuit (150), a reference current generation circuit (110), a light-emitting circuit (130-1), at least one light-emitting element (120-1), etc.

[0201] The reference current generation circuit (110) and the light emitting circuit (130-1) may each be provided with two switches (S1, S2, SW11, SW12), but one switch may also be provided.

[0202] A current mirror circuit may be configured by the first transistor (T1) of the reference current generation circuit (110) and the first transistor (T11) of the light-emitting circuit (130-1). The first transistor (T1) of the reference current generation circuit (110) and the first transistor (T11) of the light-emitting circuit (130-1) may be PMOS transistors. In this case, the first power line (141) may be commonly connected to one side of the reference current generation circuit (110) and one side of the light-emitting circuit (130-1). The other side of the reference current generation circuit (110) may be electrically connected to the fourth power line (144), and the other side of the light-emitting circuit (130-1) may be electrically connected to the second power line (142).

[0203] In the reference current generation circuit (110), the constant current source (111) may include an NMOS transistor. In this case, the fourth power line (144) may be commonly connected to the voltage generation circuit (150) and the reference current generation circuit (110).

[0204] In the reference current generation circuit (110), one side of the second switch (S2) may be electrically connected to the first power line (141), and the other side of the second switch (S2) may be electrically connected to the source of the first transistor (T1). The drain of the first transistor (T1) may be electrically connected to one side of the first switch (S1), the other side of the first switch (S1) may be electrically connected to one side of a constant current source (111), and the other side of the constant current source (111) may be electrically connected to the fourth power line (144).

[0205] Fig. 11 is a block diagram illustrating a display device according to the ninth embodiment.

[0206] The ninth embodiment is similar to the fourth embodiment (Fig. 6) except for the selection switch (161). Components having the same functions as those of the fourth embodiment (Fig. 6) in the ninth embodiment are given the same reference numerals, and detailed descriptions are omitted. Any omitted descriptions in the ninth embodiment can be readily understood from the description of the fourth embodiment (Fig. 6). The ninth embodiment can be equally applied to the fifth embodiment (Fig. 7), the sixth embodiment (Fig. 8), and the seventh embodiment (Fig. 9).

[0207] Referring to FIG. 11, a display device according to the ninth embodiment may include a voltage generation circuit (150), a reference current generation circuit (110), a light-emitting circuit (130-1), at least one light-emitting element (120-1), a selection switch (161), etc.

[0208] Since the voltage generation circuit (150), the reference current generation circuit (110), the light emitting circuit (130-1), and the light emitting element (120-1) have already been described, a detailed description thereof is omitted.

[0209] In the reference current generation circuit (110), the constant current source (111) may include a PMOS transistor. In this case, the third power line (143) may be commonly connected to the voltage generation circuit (150) and the reference current generation circuit (110).

[0210] The selection switch (161) can select one of the reference voltage (VREF) and the external voltage (VON) and output the selected voltage to the reference current generation circuit (110).

[0211] The selection switch (161) may be configured as an analog multiplexer. The analog multiplexer may be configured to include at least one NMOS transistor and at least one PMOS transistor.

[0212] As illustrated in FIG. 11, the reference voltage (VREF) may be provided from a voltage generation circuit (150). The external voltage (VON) may be provided from a host, data processing device, processor, controller, etc.

[0213] Although the drawing shows that one external voltage (VON) is provided, multiple external voltages that are different from each other may be provided, and one of the multiple external voltages as well as the reference voltage (VREF) may be selected by the selection switch (161).

[0214] The selection switch (161) may be connected between the voltage generation circuit (150) and the reference current generation circuit (110). For example, a first input side of the selection switch (161) may be electrically connected to an output side of the voltage generation circuit (150), and a second input side of the selection switch (161) may be electrically connected to an output side of an external device such as a host. The output side of the selection switch (161) may be electrically connected to a constant current source (111) of the reference current generation circuit (110) via an X node.

[0215] According to the ninth embodiment, the reference current generation circuit (110) can generate different reference currents (IREF) based on different reference voltages (VREF) selected by the selection switch (161). The reference current (IREF) generated by the reference current generation circuit (110) can be variously adjusted, so that the light emitting current (IEM1) having the intensity required for the subpixel (SP-1) can be accurately and easily obtained. Accordingly, the contrast ratio can be precisely and accurately controlled, so that the image quality can be improved.

[0216] Fig. 12 is a block diagram illustrating a display device according to the 10th embodiment.

[0217] The tenth embodiment is similar to the ninth embodiment (Fig. 11) except that the first transistor (T1) of the reference current generation circuit (110) and the first transistor (T11) of the light-emitting circuit (130-1) are PMOS transistors. In addition, the tenth embodiment is identical to the eighth embodiment (Fig. 10) except for the selection switch (162). In the tenth embodiment, components having the same functions as those in the eighth embodiment (Fig. 10) and the ninth embodiment (Fig. 11) are given the same drawing reference numerals, and detailed descriptions are omitted. Descriptions omitted in the tenth embodiment can be easily understood from the descriptions of the eighth embodiment (Fig. 10) and the ninth embodiment (Fig. 11).

[0218] Referring to FIG. 12, a display device according to the 10th embodiment may include a voltage generation circuit (150), a reference current generation circuit (110), a light-emitting circuit (130-1), at least one light-emitting element (120-1), a selection switch (162), etc.

[0219] Since the voltage generation circuit (150), the reference current generation circuit (110), the light emitting circuit (130-1), and the light emitting element (120-1) have already been described, a detailed description thereof is omitted.

[0220] In the reference current generation circuit (110), the constant current source (111) may include an NMOS transistor. In this case, the fourth power line (144) may be commonly connected to the voltage generation circuit (150) and the reference current generation circuit (110).

[0221] The selection switch (162) can select one of the reference voltage (VREF) and the external voltage (VON) and output the selected voltage to the reference current generation circuit (110).

[0222] As illustrated in FIG. 12, the reference voltage (VREF) may be provided from a voltage generation circuit (150). The external voltage (VON) may be provided from a host, data processing device, processor, controller, etc.

[0223] Although the drawing shows that one external voltage (VON) is provided, multiple different external voltages may be provided, and one of the multiple external voltages as well as the reference voltage (VREF) may be selected by the selection switch (162).

[0224] The selection switch (162) may be connected between the voltage generation circuit (150) and the reference current generation circuit (110). For example, a first input side of the selection switch (162) may be electrically connected to an output side of the voltage generation circuit (150), and a second input side of the selection switch (162) may be electrically connected to an output side of an external device such as a host. The output side of the selection switch (162) may be electrically connected to a constant current source (111) of the reference current generation circuit (110) via an X node.

[0225] According to the tenth embodiment, the reference current generation circuit (110) can generate different reference currents (IREF) based on different reference voltages (VREF) selected by the selection switch (162). The reference current (IREF) generated by the reference current generation circuit (110) can be variously adjusted, so that the light emitting current (IEM1) having the intensity required for the subpixel (SP-1) can be accurately and easily obtained. Accordingly, the contrast ratio can be precisely and accurately controlled, so that the image quality can be improved.

[0226] Fig. 13 is a block diagram illustrating a display device according to the 11th embodiment.

[0227] The eleventh embodiment embodies a voltage generation circuit (150), a reference current generation circuit (110), and a light-emitting circuit (130-1), and is similar to the fourth embodiment (Fig. 6). In the eleventh embodiment, components having the same functions as those in the fourth embodiment (Fig. 6) are assigned the same drawing reference numerals, and detailed descriptions are omitted. The omitted descriptions in the eleventh embodiment can be readily understood from the description of the fourth embodiment (Fig. 6).

[0228] Referring to FIG. 13, a display device according to the 11th embodiment may include a voltage generation circuit (150), a reference current generation circuit (110), a light-emitting circuit (130-1), at least one light-emitting element (120-1), etc.

[0229] The voltage generation circuit (150) may include a plurality of first transistors (151 to 153) connected in series between the third power line (143) and the fourth power line (144). Although three first transistors (151 to 153) are shown in the drawing, four or more may be provided.

[0230] The first transistor (151 to 153) may be a PMOS transistor, but may also be an NMOS transistor.

[0231] A plurality of first transistors (151 to 153) may be diode-connected, respectively. A predetermined voltage corresponding to a threshold voltage may be applied to the diode-connected first transistors (151 to 153). Accordingly, a constant current may flow to the voltage generation circuit (150) corresponding to a voltage in which a predetermined voltage is added as many times as the number of first transistors (151 to 153).

[0232] Meanwhile, one transistor (151) among the plurality of first transistors (151 to 153) can form a current mirror circuit with the fourth transistor (T4) of the reference current generation circuit (110). That is, the gate of one transistor (151) among the plurality of first transistors (151 to 153) and the gate of the fourth transistor (T4) of the reference current generation circuit (110) can be commonly connected to the X node. One transistor (151) among the plurality of first transistors (151 to 153) can output a reference voltage (VREF) to the X node using a constant current. The fourth transistor (T4) of the reference current generation circuit (110) can generate a reference current (IREF) based on the reference voltage (VREF).

[0233] The constant current flowing in the voltage generation circuit (150) and the reference current (IREF) flowing in the reference current generation circuit (110) can be expressed by mathematical expressions similar to mathematical expressions 1 and 2, respectively. Accordingly, the reference current (IREF) can be the same as or different from the constant current flowing in the voltage generation circuit (150).

[0234] As the number of the plurality of first transistors (151 to 153) of the voltage generation circuit (150) increases, the reference voltage (VREF) increases, and the reference current (IREF) generated from the reference current generation circuit (110) may also increase. Therefore, when the target reference current (IREF) to be obtained from the reference current generation circuit (110) is determined, the number of the plurality of first transistors (151 to 153) of the voltage generation circuit (150) and the threshold voltage, etc., may be determined so that the target reference current (IREF) is generated.

[0235] Meanwhile, the reference current generation circuit (110) may include a first transistor (T1), a second transistor (T2), a third transistor (T3), and a fourth transistor (T4) that are connected in series between a third power line (143) and a second power line (142). For example, the first transistor (T1) and the second transistor (T2) may be NMOS transistors, and the third transistor (T3) and the fourth transistor (T4) may be PMOS transistors, but this is not limited thereto.

[0236] The first transistor (T1) is connected between the second transistor (T2) and the third transistor (T3), and can form a current mirror circuit with the first transistor (T1) of the light-emitting circuit (130-1). The first transistor (T1) may be an NMOS transistor, but may also be a PMOS transistor.

[0237] The second transistor (T2) may be included in the first switch (S1) illustrated in FIGS. 3, 5 to 8, 10, and 11. The second transistor (T2) may be connected between the first transistor (T1) and the second power line (142). As illustrated in FIG. 4, the second transistor (T2) is turned on during the first on-period (SS1) of the reference current (IREF), so that the reference current (IREF) may flow to the first transistor (T1).

[0238] A third transistor (T3) may be included in the second switch illustrated in FIGS. 3, 5 to 7, and 9 to 11. The third transistor (T3) may be connected between the first transistor (T1) and the fourth transistor (T4). The fourth transistor (T4) may be turned on during the first on-period (SS1) of the reference current (IREF), so that the reference current (IREF) may flow to the first transistor (T1).

[0239] The second transistor (T2) and the third transistor (T3) may be transistors of different conductivity types. That is, the second transistor (T2) may be an NMOS transistor, and the third transistor may be a PMOS transistor, but this is not limited thereto.

[0240] The second transistor (T2) and the third transistor (T3) can be turned on and turned off simultaneously by the first control signal (D1, D2), but this is not limited thereto. For example, the second transistor (T2) can be turned on by the first control signal (D1) at a high level, and the third transistor (T3) can be turned on by the first control signal (D2) at a low level. For example, the second transistor (T2) and the third transistor (T3) can be turned on simultaneously during the on period and turned off simultaneously during the off period.

[0241] The fourth transistor (T4) may be included in the constant current source (111) illustrated in FIGS. 3 and 5 to 12.

[0242] The fourth transistor (T4) may be connected between the third power line (143) and the third transistor (T3). The fourth transistor (T4) may form a current mirror circuit with one transistor (151) of the plurality of first transistors (T1) of the voltage generation circuit (150). In this case, the constant current generated in the voltage generation circuit (150) may be copied to generate a reference current (IREF) in the reference current generation circuit (110). In other words, the reference voltage (VREF) converted by the constant current of the voltage generation circuit (150) may be output to the G node, and the reference current (IREF) may be generated in the reference current generation circuit (110) based on the reference voltage (VREF).

[0243] Meanwhile, a light emitting element (120-1) and a light emitting circuit (130-1) can be connected between the first power line (141) and the second power line (142).

[0244] The light emitting circuit (130-1) may include a first transistor (T11), a second transistor (T12), and a third transistor (T13) connected in series between the light emitting element (120-1) and the second power line (142).

[0245] The first transistor (T11) is connected between the second transistor (T12) and the third transistor (T13), and may form a current mirror circuit with the first transistor (T1) of the reference current generation circuit (110). The first transistor (T1) of the reference current generation circuit (110) and the first transistor (T11) of the light-emitting circuit (130-1) may be NMOS transistors, but may also be PMOS transistors.

[0246] The second transistor (T12) may be included in the first switch (SW11) illustrated in FIGS. 3, 5 to 8, 10, and 11. The second transistor (T12) may be connected between the first transistor (T11) and the second power line (142). As illustrated in FIG. 4, the second transistor (T12) may be turned on during the second on period (SS2) of the light-emitting current (IEM1), so that the light-emitting current (IEM1) may be supplied to the light-emitting element (120-1) to cause the light-emitting element (120-1) to emit light.

[0247] The third transistor (T13) may be included in the second switch (SW12) illustrated in FIGS. 3, 5 to 7, and 9 to 11. The third transistor (T13) may be connected between the first transistor (T11) and the fourth transistor (T4). The fourth transistor (T4) may be turned on during the first on-period (SS1) of the light-emitting current, so that the light-emitting current may be supplied to the light-emitting element (120-1) to cause the light-emitting element (120-1) to emit light.

[0248] The second transistor (T12) and the third transistor (T13) may be transistors of different conductivity types. For example, the second transistor (T12) may be an NMOS transistor and the third transistor (T13) may be a PMOS transistor, but this is not limited thereto.

[0249] The second transistor (T12) and the third transistor (T13) can be turned on and turned off simultaneously by the second control signal (C11, C12), but this is not limited thereto. For example, the second transistor (T12) can be turned on by the second control signal (C11) at a high level, and the third transistor (T13) can be turned on by the second control signal (C12) at a low level. For example, the second transistor (T12) and the third transistor (T13) can be turned on simultaneously during the on period and turned off simultaneously during the off period.

[0250] For convenience of explanation, the current mirror circuit formed by the first transistor (151) of the voltage generation circuit (150) and the fourth transistor (T4) of the reference current generation circuit (110) may be referred to as a first current mirror circuit. The current mirror circuit formed by the first transistor (T1) of the reference current generation circuit (110) and the first transistor (T11) of the light-emitting circuit (130-1) may be referred to as a second current mirror circuit.

[0251] Fig. 14 is a block diagram illustrating a display device according to the 12th embodiment.

[0252] The 12th embodiment is identical to the 11th embodiment (Fig. 13) except for the second transistor (154) and the current control transistor (170) of the voltage generation circuit (150). In the 12th embodiment, components having the same functions as those in the 11th embodiment (Fig. 13) are given the same drawing reference numerals, and detailed descriptions are omitted. The descriptions omitted in the 12th embodiment can be readily understood from the description of the 11th embodiment (Fig. 13).

[0253] Referring to FIG. 14, a display device according to the 12th embodiment may include a voltage generation circuit (150), a reference current generation circuit (110), a light-emitting circuit (130-1), at least one light-emitting element (120-1), a current control transistor (170), etc.

[0254] Since the reference current generation circuit (110), the light emitting circuit (130-1) and at least one light emitting element (120-1) have already been described, a detailed description thereof is omitted.

[0255] The voltage generation circuit (150) may include a plurality of first transistors (151 to 153) and a second transistor (154) between the third power line (143) and the fourth power line (144).

[0256] Each of the plurality of first transistors (151 to 153) can be diode-connected.

[0257] One transistor (151) among the plurality of first transistors (151 to 153) can form a current mirror circuit with the fourth transistor (T4) of the reference current generation circuit (110).

[0258] The second transistor (154) is connected between the last transistor (153) among the plurality of first transistors (151 to 153) and the fourth power line (144), but is not limited thereto.

[0259] The gate of the second transistor (154) of the voltage generation circuit (150) may be electrically connected to the gate of the second transistor (T2) of the reference current generation circuit (110). The second transistor (154) of the voltage generation circuit (150) and the second transistor (T2) of the reference current generation circuit (110) may be transistors of the same conductivity type. For example, the second transistor (154) of the voltage generation circuit (150) and the second transistor (T2) of the reference current generation circuit (110) may be NMOS transistors. Therefore,

[0260] Accordingly, the second transistor (154) of the voltage generation circuit (150) and the second transistor (T2) of the reference current generation circuit (110) can be turned on / off simultaneously by the first control signal (D1). For example, the second transistor (154) and the second transistor (T2) can be turned on simultaneously by the first control signal (D1) of a high level. For example, the second transistor (154) and the second transistor (T2) can be turned on simultaneously by the first control signal (D1) of a low level.

[0261] For example, the second transistor (154) of the voltage generation circuit (150) and the second transistor (T2) of the reference current generation circuit (110) may be turned on during one period, for example, the first on period (SS1) of a frame, and turned off during the remaining period, that is, the off period. When the second transistor (154) of the voltage generation circuit (150) and the second transistor (T2) of the reference current generation circuit (110) are turned off, a constant current may not flow in the voltage generation circuit (150) and a reference current (IREF) may not flow in the reference current generation circuit (110). Therefore, by preventing the constant current or the reference current (IREF) from flowing during the off period for each period, power consumption may be reduced.

[0262] Meanwhile, a current control transistor (170) may be connected between one transistor (151) of a plurality of first transistors (151 to 153) and a third power line (143). The gate of the current control transistor (170) may be commonly connected to the gate of the second transistor (154) of the voltage generation circuit (150) and the gate of the second transistor (T2) of the reference current generation circuit (110).

[0263] The current control transistor (170) may have a different conductivity type from the second transistor (T2) of the reference current generation circuit (110). For example, the second transistor (T2) of the reference current generation circuit (110) may be an NMOS transistor, and the current control transistor (170) may be a PMOS transistor.

[0264] In this case, when the second transistor (T2) of the reference current generation circuit (110) is turned on, the current control transistor (170) may be turned off. For example, the second transistor (154) of the voltage generation circuit (150) and the second transistor (T2) of the reference current generation circuit (110) may be turned on by a high-level first control signal (D1), but the current control transistor (170) may be turned off.

[0265] When the second transistor (T2) of the reference current generation circuit (110) is turned off, the current control transistor (170) can be turned on. For example, the second transistor (154) of the voltage generation circuit (150) and the second transistor (T2) of the reference current generation circuit (110) are turned off by a low-level first control signal (D1), but the current control transistor (170) can be turned on.

[0266] For example, when the second transistor (T2) of the reference current generation circuit (110) is turned off during the off-period of one cycle, the current control transistor (170) is turned on so that the third power voltage (PVDD) supplied to the third power line (143) can be output to the X node. In this case, since the gate and the source of each of the transistor (151) of the voltage generation circuit (150) constituting the current mirror circuit and the fourth transistor (T4) of the reference current generation circuit (110) have the same voltage, the constant current does not flow to the voltage generation circuit (150) and the reference current (IREF) does not flow to the reference current generation circuit (110). Therefore, by preventing the constant current or the reference current (IREF) from flowing during the off-period of each cycle, power consumption can be reduced.

[0267] Fig. 15 is a block diagram illustrating a display device according to the 13th embodiment.

[0268] The 13th embodiment is identical to the 12th embodiment (Fig. 14) except for a plurality of subpixels (SP-1 to SP-N) each including a light-emitting element (120-1) and a light-emitting circuit (130-1). In the 13th embodiment, components having the same functions as those in the 12th embodiment (Fig. 14) are given the same reference numerals, and detailed descriptions are omitted. Descriptions omitted in the 13th embodiment can be readily understood from the description of the 12th embodiment (Fig. 14).

[0269] Referring to FIG. 15, a display device according to the 13th embodiment may include a voltage generation circuit (150), a reference current generation circuit (110), a plurality of light-emitting circuits (130-1 to 130-N), a plurality of light-emitting elements (120-1 to 120-N), a current control transistor (170), etc.

[0270] Since the voltage generation circuit (150), the reference current generation circuit (110), and the current control transistor (170) have already been described, a detailed description thereof is omitted.

[0271] A reference current generation circuit (110) and a plurality of subpixels (SP-1 to SP-N) may be provided on a display panel. The plurality of subpixels (SP-1 to SP-N) may be connected between a first power line (141) and a second power line (142).

[0272] In this case, the plurality of subpixels (SP-1 to SP-N) may include a plurality of light-emitting circuits (130-1 to 130-N), a plurality of light-emitting elements (120-1 to 120-N), etc. One side of the plurality of light-emitting elements (120-1 to 120-N) may be electrically connected to a first power line (141), the other side of the plurality of light-emitting elements (120-1 to 120-N) may be electrically connected to one side of the light-emitting circuits (130-1 to 130-N), and the other side of the light-emitting circuits (130-1 to 130-N) may be electrically connected to a second power line (142).

[0273] The plurality of light-emitting circuits (130-1 to 130-N) may include a plurality of first transistors (T11 to TN1), a plurality of second transistors (T12 to TN2), a plurality of third transistors (T13 to TN3), a plurality of digital storages (135-1 to 135-N), etc. In the light-emitting circuits (130-1 to 130-N), one of the second transistors (T12 to TN2) and the third transistors (T13 to TN3) may be omitted.

[0274] Meanwhile, the reference current generation circuit (110) can be electrically connected to a plurality of subpixels (SP-1 to SP-N). The reference current generation circuit (110) can be electrically connected to a plurality of light-emitting circuits (130-1 to 130-N) of a plurality of subpixels (SP-1 to SP-N). The reference current generation circuit (110) can copy the reference current (IREF) to generate light-emitting currents (IEM1 to IEMN) in each of the plurality of light-emitting circuits (130-1 to 130-N).

[0275] The reference current generation circuit (110) may include a first transistor (T1) to a fourth transistor (T4). The first transistor (T1) of the reference current generation circuit (110) may form a current mirror circuit with a plurality of first transistors (T11 to TN1) of a plurality of light-emitting circuits (130-1 to 130-N). For example, the first transistor (T1) of the reference current generation circuit (110) and the plurality of first transistors (T11 to TN1) of the plurality of light-emitting circuits (130-1 to 130-N) may be NMOS transistors, but may also be PMOS transistors.

[0276] The plurality of first transistors (T11 to TN1) of the plurality of light-emitting circuits (130-1 to 130-N) can generate a plurality of light-emitting currents (IEM1 to IEMN) corresponding to the reference current (IREF) flowing in the first transistor (T1) of the reference current generation circuit (110), respectively. When the plurality of radiation ratios of the plurality of first transistors (T11 to TN1) of the plurality of light-emitting circuits (130-1 to 130-N) are the same, the plurality of light-emitting currents (IEM1 to IEMN) flowing in the plurality of first transistors (T11 to TN1) of the plurality of light-emitting circuits (130-1 to 130-N) can be the same. When the plurality of radiation ratios of the plurality of first transistors (T11 to TN1) of the plurality of light-emitting circuits (130-1 to 130-N) are 1, the plurality of light-emitting currents (IEM1 to IEMN) flowing in the plurality of first transistors (T11 to TN1) of the plurality of light-emitting circuits (130-1 to 130-N) may be equal to the reference current (IREF) flowing in the first transistor (T1) of the reference current generation circuit (110).

[0277] According to the 13th embodiment, a plurality of light-emitting currents (IEM1 to IEMN) for emitting light from a plurality of light-emitting elements (120-1 to 120-N) of a plurality of subpixels (SP-1 to SP-N) are simultaneously generated using a reference current (IREF) generated from a single reference current generating circuit (110), thereby greatly simplifying the circuit structure and making it easy and highly efficient to drive a plurality of subpixels (SP-1 to SP-N).

[0278] According to the 13th embodiment, by adjusting the copy ratio, a desired light emitting current (IEM1 to IEMN) can be generated in each of a plurality of light emitting circuits (130-1 to 130-N) of a plurality of subpixels (SP-1 to SP-N), so that the image quality can be improved through optimal grayscale expression or optimal brightness implementation.

[0279] Fig. 16 is a block diagram illustrating a display device according to the 14th embodiment.

[0280] The 14th embodiment embodies digital storage (135-1) and is similar to the 13th embodiment (Fig. 15). Components having the same functions as those in the 13th embodiment (Fig. 15) in the 14th embodiment are assigned the same reference numerals, and detailed descriptions are omitted. Any omitted descriptions in the 14th embodiment can be readily understood from the description of the 13th embodiment (Fig. 15).

[0281] Referring to FIG. 16, a display device according to the 14th embodiment may include a voltage generation circuit (150), a reference current generation circuit (110), a light-emitting circuit (130-1), at least one light-emitting element (120-1), a current control transistor (170), etc.

[0282] Since the voltage generation circuit (150), the reference current generation circuit (110), the light emitting circuit (130-1), and the current control transistor (170) have already been described, a detailed description thereof is omitted.

[0283] The light-emitting circuit (130-1) may include a first transistor (T11), a second transistor (T12), and a third transistor (T13) connected in series with each other, and a digital storage (135-1). The first transistor (T11) of the light-emitting circuit (130-1) may form a current mirror circuit with the first transistor (T1) of the reference current generation circuit (110). In the light-emitting circuit (130-1), one of the second transistor (T12) and the third transistor (T13) may be omitted.

[0284] Digital storage (135-1) may include a latch circuit. As illustrated in FIG. 16, the latch circuit may include an inverter element, a pair of NMOS transistors, a pair of PMOS transistors, a pair of switches, and the like.

[0285] Digital data (DM-1) and a program signal (PS1) can be input to a digital storage (135-1), i.e., a latch circuit. The program signal (PS1) may be a control signal for writing input data to the latch circuit. A pair of switches can be turned on / off by the program signal (PS1).

[0286] The digital storage (135-1) can generate a second control signal (C11, C12) having a second on-period (SS2) based on the on / off information of the digital data (DM-1) and the grayscale information of the program signal (PS1), and output the generated second control signal (C11, C12) to the second transistor (T12) and the third transistor (T13). Therefore, as illustrated in Fig. 17, in response to the second control signal (C11, C12), the second transistor (T12) and the third transistor (T13) are turned on, so that the light-emitting element (120-1) can emit light by the light-emitting current (IEM1) supplied during the second on-period (SS2).

[0287] Meanwhile, in response to the first control signal (D1, D2), the second transistor (T2) and the third transistor (T3) of the reference current generation circuit (110) are turned on, so that the reference current (IREF) can flow in the reference current generation circuit (110) during the first on-period (SS1). The second on-period (SS2) can be included within the first on-period (SS1).

[0288] The first on-period (SS1) and the second on-period (SS2) may be referred to as the first emission period and the second emission period, respectively.

[0289] The above detailed description should not be construed as limiting in any respect and should be considered illustrative only. The scope of the embodiments should be determined by a reasonable interpretation of the appended claims, and all modifications within the equivalency range of the embodiments are intended to be included within the scope of the embodiments.

Claims

1. In a display device including a plurality of subpixels, A reference current generation circuit including a constant current source generating a reference current; and A plurality of light-emitting circuits are provided in the plurality of subpixels and are electrically connected to the reference current generation circuit; Each of the above plurality of light-emitting circuits is To generate a luminescent current by using the reference current to emit light from the light-emitting element, Controlling the light-emitting time of the light-emitting element using digital data and program signals, The above reference current and the above luminous current are constant currents, Display device.

2. In paragraph 1, The above reference current generation circuit is, A first transistor connected to the above constant current source; Each of the above plurality of light-emitting circuits is including the first transistor of the reference current generation circuit and the first transistor constituting the mirror circuit; Display device.

3. In paragraph 2, The aspect ratio of the first transistor of each of the plurality of light-emitting circuits is greater than or equal to the aspect ratio of the first transistor of the reference current generation circuit. Display device.

4. In paragraph 2, The first transistor of each of the light-emitting element and the plurality of light-emitting circuits is connected between the first power line and the second power line, A first power voltage is supplied to the first power line, A second power voltage lower than the first power voltage is supplied to the second power line, Display device.

5. In paragraph 4, The first transistor of the reference current generation circuit and the first transistor of each of the plurality of light-emitting circuits are NMOS transistors commonly connected to the second power line. Display device.

6. In paragraph 4, The first transistor of the reference current generation circuit and the first transistor of each of the plurality of light-emitting circuits are PMOS transistors commonly connected to the first power line. Display device.

7. In paragraph 2, The above reference current generation circuit is, A switch connected to the first transistor and configured to turn the reference current on / off; Display device.

8. In paragraph 7, Each of the above plurality of light-emitting circuits is A switch connected to the first transistor and configured to turn the light emitting current on / off; Display device.

9. In paragraph 8, The second on-period of the above luminous current is included within the first on-period of the above reference current, Display device.

10. In paragraph 8, Each of the above plurality of light-emitting circuits is Further comprising a digital storage for generating a control signal for switching the switches of each of the plurality of light-emitting circuits using the digital data; Display device.

11. In paragraph 8, The switch of the above reference current generation circuit includes at least one transistor among a second transistor or a third transistor, Each of the switches of the plurality of light-emitting circuits includes at least one transistor among a second transistor or a third transistor, Display device.

12. In paragraph 11, The second transistor of the above reference current generation circuit and the second transistor of the plurality of light-emitting circuits are NMOS transistors, The third transistor of the reference current generation circuit and the third transistor of each of the plurality of light-emitting circuits are PMOS transistors. Display device.

13. In paragraph 11, The constant current source of the reference current generation circuit includes a fourth transistor connected to the one or more transistors of the reference current generation circuit. Display device.

14. In paragraph 13, Further comprising a voltage generation circuit connected to the reference current generation circuit and providing a reference voltage for regulating the reference current; Display device.

15. In paragraph 14, The above voltage generation circuit, a plurality of first transistors connected to each other between a third power line and a fourth power line; The above plurality of first transistors are each diode-connected, One of the plurality of first transistors constitutes a current mirror circuit with the fourth transistor of the reference current generation circuit. Display device.

16. In paragraph 14, The above voltage generation circuit, Further comprising a second transistor connected to another transistor among the plurality of first transistors and having a gate commonly connected to at least one transistor of the reference current generation circuit; Display device.

17. In paragraph 16, Further comprising a current control transistor connected between one of the plurality of first transistors and the third power line, and having a gate commonly connected to the second transistor of the voltage generation circuit and the at least one transistor of the reference current generation circuit; The current control transistor has a different conductivity type from at least one transistor of the reference current generation circuit. Display device.

18. In paragraph 14, Further comprising a selection switch for selecting one of the reference voltage and an external voltage and outputting the selected voltage to the reference current generation circuit; Display device.

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