Network-on-chip architecture with destination virtualization

By employing destination virtualization in NoC architectures, where virtual destination IDs are used to route data to decoder switches for address decoding, the limitations of existing NoC architectures in handling multiple targets are overcome, resulting in improved scalability and efficiency.

WO2025048926A1PCT designated stage expired Publication Date: 2025-03-06XILINX INC
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Patent Information

Application Number
PCT/US2024/033339
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-08-25
Filing Date
2024-06-11
Publication Date
2025-03-06

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Abstract

Embodiments herein describe using virtual destinations to route packets through a NoC (105). In one embodiment, instead of decoding an address into a target destination ID of the NoC (105), an ingress logic block (115) assigns packets for multiple different targets the same virtual destination ID. For example, these targets may be in the same segment or location of the NoC (105). Thus, instead of the ingress logic block (115) having to store entries in a lookup-table for each target, it can have a single entry for the virtual destination ID. The packets for the targets are then routed using the virtual destination ID to a decoder switch (140) in the NoC (105). This decoder switch (140) can then use the address in the packet (which is different than the destination ID) to select the appropriate target destination ID.
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Citation Information

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