Dielectric window and semiconductor device
By embedding heating components surrounding the openings in the dielectric window, the problems of low heating efficiency and uneven temperature distribution in the ceramic window are solved, and a more stable plasma etching process and lower pollution risk are achieved.
Patent Information
- Application Number
- PCT/CN2024/113546
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-09-06
- Filing Date
- 2024-08-21
- Publication Date
- 2025-03-13
AI Technical Summary
The existing ceramic windows have low heating efficiency and uneven temperature distribution in plasma etching process, resulting in uneven Polymer deposition during plasma etching, causing trace elements or particles to contaminate and reducing production yield.
A dielectric window is designed, including a first heating assembly embedded in the dielectric layer, and the first heating assembly is arranged around the openings of the dielectric layer. By optimizing the layout of the heating assembly and openings, the uniformity of the temperature distribution of the dielectric window is achieved.
The heating efficiency and uniformity of the dielectric window are improved, the stability of the plasma etching process is enhanced, and particle and trace elements are contaminated due to uneven heating.
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Figure CN2024113546_13032025_PF_FP_ABST
Abstract
Description
Dielectric window and semiconductor device
[0001] This application claims priority to the Chinese patent application filed with the China Patent Office on September 6, 2023, with application number 202311149707.4 and invention name “A dielectric window and semiconductor device”, the entire contents of which are incorporated by reference into this application. Technical Field
[0002] The present invention relates to the technical field of semiconductor devices, and more particularly to a dielectric window and a semiconductor device. Background Art
[0003] In an inductively coupled plasma (ICP) reaction chamber, electromagnetically coupled oscillations from a ceramic window, or inductive antenna, behind a dielectric window penetrate the window to excite the reactant gases within the reaction chamber, forming a plasma and performing plasma etching on wafers. In plasma etching systems, the ceramic window serves as a critical component and isolation interface between the reaction chamber and the inductive antenna. The ceramic window with the inductive antenna, combined with the gas nozzle, forms the upper electrode in the plasma etching chamber and also serves as a gas distribution plate, delivering reactant gases into the reaction chamber. Typically, the ceramic window is made of high-purity alumina, which offers strength and structural stability. Furthermore, the surface of the ceramic window in contact with the reaction chamber is coated with a plasma-resistant coating, such as Y2O3 or YF3, to prevent or mitigate plasma etching of the ceramic window surface, reducing or eliminating the potential for contamination of the reaction chamber. During plasma etching, heating of the ceramic window is required to achieve a more stable process. However, existing ceramic windows are heated using a heater located on the back of the window. Because ceramic windows often exceed 25mm in thickness, heating the window's other working surface via a backside heater can lead to performance drawbacks such as low heating efficiency and uneven temperature distribution. This uneven temperature distribution on the window surface can cause uneven polymer deposition during plasma etching, leading to trace element or particle contamination and reduced etching yield.
[0004] Summary of the Invention
[0005] In view of this, the present invention provides a dielectric window and semiconductor device that effectively solve the existing technical problems. It can not only improve the heating efficiency of the dielectric window, but also significantly improve the temperature distribution uniformity on the surface of the dielectric window. Thus, while improving the stability of the plasma etching process, it also avoids the problem of particle contamination and trace element contamination of the reaction chamber caused by the uneven heating of the dielectric window.
[0006] To achieve the above objectives, the present invention provides the following technical solutions:
[0007] A dielectric window, applied to a semiconductor device, comprising:
[0008] a dielectric layer, the dielectric layer comprising an opening extending through the dielectric layer;
[0009] A first heating component is embedded in the dielectric layer and is disposed around the opening.
[0010] Optionally, the dielectric window further includes:
[0011] The second heating element to the Nth heating element, the i-th heating element is embedded in the dielectric layer, and the i-th heating element is arranged around the i-1-th heating element, N is an integer greater than 1, and i is an integer greater than 1 and not greater than N.
[0012] Optionally, in a direction perpendicular to the surface where the dielectric layer is located, and among the first heating component to the Nth heating component, the distances between different heating components and the same plane are different.
[0013] Optionally, the dielectric layer includes a heating surface facing the reaction chamber of the semiconductor device;
[0014] The distance between the jth heating component and the heating surface is greater than the distance between the j+1th heating component and the heating surface, and j is an integer not less than 1 and less than N.
[0015] Optionally, the dielectric layer includes a first sub-dielectric layer to an N+1th sub-dielectric layer, the jth heating component is located between the jth sub-dielectric layer and the j+1th sub-dielectric layer, and j is an integer not less than 1 and less than N.
[0016] Optionally, the jth dielectric sub-layer or the j+1th dielectric sub-layer includes a groove, and the jth heating component is located in the groove.
[0017] Optionally, in the first to N+1th sub-dielectric layers, all sub-dielectric layers are made of the same material;
[0018] Alternatively, among the first to N+1th sub-dielectric layers, the material of at least one sub-dielectric layer is different from the materials of the other sub-dielectric layers.
[0019] Optionally, in the first to N+1th sub-dielectric layers, the material of any sub-dielectric layer includes at least one of Al2O3, YAG, YOF and Y2O3.
[0020] Optionally, at least one heating component from the first heating component to the Nth heating component includes a heating wire.
[0021] Optionally, the heating wire is made of metal, alloy or ceramic;
[0022] Alternatively, the heating wire includes a first conductive layer, a conductive core layer located on the first conductive layer, and a second conductive layer covering the conductive core layer, and the high-temperature oxidation resistance of the materials of the first conductive layer and the second conductive layer is greater than the high-temperature oxidation resistance of the material of the conductive core layer.
[0023] Optionally, the dielectric window further includes:
[0024] The first terminal to the Nth terminal, the kth terminal is connected to the kth heating component, wherein the kth terminal is embedded in the dielectric layer and includes a portion exposed outside the dielectric layer, and k is an integer not less than 1 and not greater than N.
[0025] Optionally, the kth terminal includes:
[0026] A connecting wire and an external pin, wherein the connecting wire is embedded in the dielectric layer and connected to the kth heating component, and the side of the connecting wire facing away from the connection end with the kth heating component includes a filling groove; the external pin is filled in the filling groove, and the external pin is exposed outside the dielectric layer.
[0027] Optionally, the high-temperature oxidation resistance of the material of the connecting wire is greater than the high-temperature oxidation resistance of the material of the external pin;
[0028] The resistance of the material of the connecting wire is greater than the resistance of the material of the external pin.
[0029] Optionally, the dielectric layer includes a heating surface facing the reaction chamber of the semiconductor device, wherein the dielectric window further includes:
[0030] A dense film covering the heating surface.
[0031] Optionally, the thickness of the dense film ranges from 0.1 to 500 μm.
[0032] Optionally, the dielectric window further includes:
[0033] A protective film covering the exposed surface of the dielectric layer, wherein the dense film is located on the heating surface side of the dielectric layer and the dense film is located on the side of the protective film away from the heating surface.
[0034] Optionally, the protective film has a thickness ranging from 0.1 to 500 μm.
[0035] Optionally, the protective film includes:
[0036] A plurality of sub-protective films are formed sequentially, wherein, among the plurality of sub-protective films, the initial sub-protective film covers the exposed surface of the dielectric layer, and the subsequent sub-protective film covers the exposed surface of the previous sub-protective film.
[0037] Optionally, the protective film includes:
[0038] An amorphous aluminum oxide sub-protective film and an yttrium oxide sub-protective film are formed in sequence;
[0039] Alternatively, an amorphous aluminum oxide sub-protective film, a crystalline aluminum oxide sub-protective film and a yttrium oxide sub-protective film are formed in sequence.
[0040] Optionally, the material of any one of the protective film and the dense film includes at least one of: Al2O3, Y2O3, YF3, YOF, ZrO2, Er2O3, SiC, SiO2, HfO2, Si3N4, AlN, B2O3, Nd2O3, Nb2O5, CeO2, Sm2O3, Yb2O3, YAG, EAG, YAM, YAP, EAM, and EAP.
[0041] Correspondingly, the present invention further provides a semiconductor device, which includes the above-mentioned dielectric window.
[0042] Optionally, the semiconductor device is a plasma etching device.
[0043] Compared with the existing technology, the technical solution provided by the present invention has at least the following advantages:
[0044] The present invention provides a dielectric window and semiconductor device, comprising: a dielectric layer, the dielectric layer including an opening extending through the dielectric layer; and a first heating component embedded in the dielectric layer and arranged around the opening. It can be seen that the technical solution provided by the present invention embeds the first heating component within the dielectric layer, and then, after the first heating component is powered on, controls the dielectric layer to heat from the inside out. This not only improves the heating efficiency of the dielectric window, but also significantly improves the uniformity of the temperature distribution on the surface of the dielectric window by arranging the first heating component around the opening. This improves the stability of the plasma etching process while also avoiding the problem of particle contamination and trace element contamination of the reaction chamber caused by uneven heating of the dielectric window. BRIEF DESCRIPTION OF THE DRAWINGS
[0045] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are merely embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying any creative work.
[0046] FIG1 is a schematic structural diagram of a dielectric window provided by an embodiment of the present invention;
[0047] FIG2 is a cross-sectional view taken along the AA′ direction in FIG1 ;
[0048] FIG3 is a schematic structural diagram of another dielectric window provided by an embodiment of the present invention;
[0049] FIG4 is a schematic structural diagram of another dielectric window provided by an embodiment of the present invention;
[0050] FIG5 is a schematic structural diagram of another dielectric window provided by an embodiment of the present invention;
[0051] FIG6 is a schematic structural diagram of another dielectric window provided by an embodiment of the present invention;
[0052] FIG7 is a schematic structural diagram of another dielectric window provided by an embodiment of the present invention;
[0053] FIG8 is a schematic structural diagram of another dielectric window provided by an embodiment of the present invention;
[0054] FIG9 is a schematic structural diagram of another dielectric window provided in an embodiment of the present invention;
[0055] FIG10 is a schematic structural diagram of another dielectric window provided in an embodiment of the present invention. DETAILED DESCRIPTION
[0056] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.
[0057] As described in the background art, in a plasma etching process, the ceramic window needs to be heated to achieve a more stable process. However, the existing heating efficiency of the ceramic window is low.
[0058] Based on this, an embodiment of the present invention provides a dielectric window and a semiconductor device, which effectively solve the existing technical problems. It can not only improve the heating efficiency of the dielectric window, but also significantly improve the temperature distribution uniformity of the dielectric window surface. Thus, while improving the stability of the plasma etching process, it also avoids the problem of particle contamination and trace element contamination of the reaction chamber caused by uneven heating of the dielectric window.
[0059] To achieve the above objectives, the technical solutions provided by the embodiments of the present invention are as follows. The technical solutions provided by the embodiments of the present invention are described in detail with reference to FIG. 1 to FIG. 10 .
[0060] As shown in Figures 1 and 2, Figure 1 is a schematic structural diagram of a dielectric window provided by an embodiment of the present invention, and Figure 2 is a cross-sectional view along the AA' direction in Figure 1. The dielectric window is applied to a semiconductor device, and the dielectric window includes:
[0061] The dielectric layer 100 includes an opening 110 penetrating the dielectric layer.
[0062] The first heating component 201 is embedded in the dielectric layer 100 and is disposed around the opening 110 , wherein the opening of the first heating component 201 is used to connect to a power source.
[0063] It should be noted that the semiconductor device provided in an embodiment of the present invention includes an inductive antenna and a reaction chamber. The inductive antenna is used to generate electromagnetic coupling oscillations, and the reaction chamber is used to perform plasma treatment on a substrate. A dielectric window is provided between the inductive antenna and the reaction chamber to isolate them. An opening is provided in the dielectric window, which is connected to the gas nozzle of the semiconductor device. In addition, the semiconductor device also includes components such as an electrostatic chuck, which are the same as those in the prior art and are not further described.
[0064] It can be understood that the technical solution provided by the embodiment of the present invention embeds the first heating component inside the dielectric layer, and then controls the dielectric layer to be heated from the inside to the outside after the first heating component is powered on. This not only improves the heating efficiency of the dielectric window, but also significantly improves the temperature distribution uniformity on the surface of the dielectric window by arranging the first heating component around the opening and optimizing the distance between the first heating component and the opening. This improves the stability of the plasma etching process while avoiding the problem of particle contamination and trace element contamination of the reaction chamber caused by uneven heating of the dielectric window.
[0065] In order to further improve the heating efficiency of the dielectric window and improve the heating uniformity of each area of the dielectric window, the dielectric window provided by the embodiment of the present invention can also include more heating components. Referring to Figure 3, which is a schematic diagram of the structure of another dielectric window provided by the embodiment of the present invention, it should be noted that the following figures are all described as an example of a dielectric window including a first heating component 201 and a second heating component 202. The dielectric window further includes:
[0066] From the second heating element 202 to the Nth heating element, the i-th heating element is embedded in the dielectric layer, and the i-th heating element is arranged around the i-1th heating element (as shown in FIG3 , the first heating element 201 is arranged around the opening 110, and the second heating element 202 is arranged around the first heating element 201, and the openings of the first heating element 201 and the second heating element 202 are used to connect to their respective power supplies), N is an integer greater than 1, and i is an integer greater than 1 and not greater than N.
[0067] As can be appreciated, the embodiments of the present invention increase the heating radiation area of the heating elements by disposing more heating elements within the dielectric layer, thereby further improving the heating efficiency of the dielectric window. Furthermore, arranging multiple heating elements in a nested manner can improve heating uniformity across the dielectric window, ensuring high temperature uniformity across the dielectric window, further improving the stability of the plasma etching process, and reducing the risk of trace element and particle contamination.
[0068] Optionally, the surrounding manner of the heating component provided in the embodiment of the present invention can be any regular or irregular shape such as circular, elliptical, polygonal, etc. The present invention does not impose any specific limitation on this, and needs to be specifically designed according to actual applications to achieve the best heating effect.
[0069] FIG4 is a schematic diagram illustrating the structure of another dielectric window according to an embodiment of the present invention. In this embodiment, in a direction X perpendicular to the surface of the dielectric layer 100, the spacings between the first heating element 201 and the Nth heating element and the same plane are different. As shown in FIG4 , the spacing b1 between the first heating element 201 and plane B is different from the spacing b2 between the second heating element 202 and plane B.
[0070] It can be understood that the embodiment of the present invention sets the distances between different heating components and the same plane to be different, and then optimizes the positions of different heating components in the dielectric layer to achieve the purpose of adjusting the heating efficiency of different areas of the dielectric window, thereby optimizing the temperature control effect of the dielectric window.
[0071] Further reference is made to FIG. 5 , which is a schematic structural diagram of another dielectric window according to an embodiment of the present invention. The dielectric layer 100 includes a heating surface 120 facing the reaction chamber of the semiconductor device. That is, the heating surface 120 is the surface of the dielectric layer 100 facing the reaction chamber. The spacing between the jth heating element and the heating surface 120 is greater than the spacing between the j+1th heating element and the heating surface 120, where j is an integer not less than 1 and less than N. As shown in FIG. 5 , in direction X, the spacing b11 between the first heating element 201 and the heating surface 120 according to an embodiment of the present invention is greater than the spacing b22 between the second heating element 202 and the heating surface 120.
[0072] It can be understood that the area of the dielectric window close to the opening provided in the embodiment of the present invention is closer to the center of the reaction chamber of the plasma etcher. Since the plasma density generated in the area closer to the opening is higher, the heating effect of the plasma on the surface of the dielectric window is greater, and it is easy to be heated by the plasma. Therefore, the distance between the first heating component close to the opening and the heating surface is set to a larger value to slow down the heat transfer efficiency of the first heating component to the area relative to the heating surface; at the same time, since the plasma density is weaker in the area farther from the central opening, the heating effect on the surface of the dielectric window is smaller. Therefore, the distance between the second heating component far from the opening and the heating surface is set to a smaller value to increase the heat transfer efficiency of the second heating component to the area relative to the heating surface, ultimately achieving the purpose of balancing the heating efficiency of different areas of the heating surface, thereby improving the heating and temperature control effects of the dielectric window.
[0073] 6 shows a schematic structural diagram of another dielectric window according to an embodiment of the present invention, wherein the dielectric layer 100 includes a first dielectric sub-layer 101 to an N+1th dielectric sub-layer, and the jth heating element is located between the jth dielectric sub-layer and the j+1th dielectric sub-layer, where j is an integer not less than 1 and less than N. As shown in the figure, the first heating element 201 is located between the first dielectric sub-layer 101 and the second dielectric sub-layer 102, and the second heating element 202 is located between the second dielectric sub-layer 102 and the third dielectric sub-layer 103.
[0074] It is understood that the dielectric layer provided in the embodiments of the present invention can be formed by pressing and sintering multiple sub-dielectric layers after preparing the heating component between two adjacent sub-dielectric layers. Optionally, in the first to Nth sub-dielectric layers provided in the embodiments of the present invention, when different materials are selected for different sub-dielectric layers, when selecting the materials for the sub-dielectric layers, it is preferred that all sub-dielectric layers have similar thermal expansion coefficients to avoid cracking or breaking during the pressing and sintering of the dielectric layers.
[0075] Furthermore, the N+1th dielectric sub-layer provided in the embodiment of the present invention is located on the side close to the reaction chamber, while the first dielectric sub-layer is located on the side away from the reaction chamber. Preferably, in the embodiment of the present invention, the plasma etching resistance of the N+1th dielectric sub-layer is set to be greater than the plasma etching resistance of the remaining dielectric sub-layers, so that the dielectric window can better resist etching by the plasma in the reaction chamber, thereby improving the performance of the dielectric window.
[0076] In one embodiment of the present invention, the j-th sub-dielectric layer or the j+1-th sub-dielectric layer provided in the embodiment of the present invention includes a groove, and the j-th heating element is located in the groove. Specifically, after forming the sub-dielectric layer, a groove of a predetermined shape and size is formed on the sub-dielectric layer, and then the heating element is formed in the groove through a process such as plating, printing, or printing, thereby facilitating the preparation of the heating element. Alternatively, the sub-dielectric layer provided in the embodiment of the present invention does not have a groove formed thereon, and the heating element is formed on the surface of the sub-dielectric layer through a process such as plating, printing, or printing, which is not specifically limited in this embodiment of the present invention.
[0077] In one embodiment of the present invention, all of the first through N+1 sub-dielectric layers provided by this embodiment of the present invention are made of the same material; alternatively, at least one of the first through N+1 sub-dielectric layers is made of a different material than the other sub-dielectric layers. Optionally, the material of any of the first through N+1 sub-dielectric layers includes at least one of Al2O3, YAG, YOF, and Y2O3.
[0078] Optionally, taking the sub-dielectric layer provided in the embodiment of the present invention as a ceramic material as an example, when preparing the dielectric layer, ceramic powders of the same material or different materials can be selected to be pressed into multiple sub-dielectric layers, and then the multiple sub-dielectric layers are pressurized and sintered using a conventional ceramic sintering process to form a dielectric layer. Specifically, after the ceramic powder is pressed into a ceramic plate, it can be mechanically cut into a sub-dielectric layer with a set shape and size requirements. Among them, when different ceramic powders are selected to form different sub-dielectric layers, the sub-dielectric layer in contact with the reaction chamber uses a ceramic powder resistant to plasma etching, such as YAG, Y2O3, etc., so that the dielectric layer formed by pressing and sintering can resist the corrosion of plasma and has higher stability. In addition, when different ceramic powders are selected to form different sub-dielectric layers, the ceramic powders need to be selected so that the difference in thermal expansion coefficients between the different sub-dielectric layers is small, so as to avoid cracking or breaking when multiple sub-dielectric layers are pressed and sintered to form a dielectric layer. For example, if at least one of Al2O3, YAG, YOF, and Y2O3 provided in the embodiment of the present invention is selected, since the thermal expansion coefficients of Al2O3, YAG, YOF, and Y2O3 are similar, the dielectric layer formed is not prone to cracking or damage. The sintering of the dielectric layer can be carried out in conventional sintering equipment for preparing Al2O3 ceramics, and the sintering temperature range is 1150-1950°C.
[0079] In one embodiment of the present invention, at least one of the first through Nth heating assemblies includes a heating wire, which is energized to generate heat to heat the dielectric window. Furthermore, in other embodiments of the present invention, the heating assemblies may also be other types of heaters, which are not specifically limited by the present invention.
[0080] Optionally, the heating wire is made of metal, alloy or ceramic; or, the heating wire includes a first conductive layer, a conductive core layer located on the first conductive layer and a second conductive layer covering the conductive core layer, and the high-temperature oxidation resistance of the materials of the first conductive layer and the second conductive layer is greater than the high-temperature oxidation resistance of the material of the conductive core layer.
[0081] It is understood that the material of the heating wire provided in the embodiment of the present invention can be a metal or alloy material, such as W, Mo, Ni-Cr alloy, Fe-Ni-Cr alloy. Alternatively, the material of the heating wire can be ceramic, such as SiC, ITO, BC, etc. Alternatively, the heating wire can be a structure in which a first conductive layer and a second conductive layer wrap around a conductive core layer, wherein the first conductive layer and the second conductive layer have a higher resistance to high-temperature oxidation than the conductive core layer, and the heating capacity of the conductive core layer is higher than the heating capacity of the first conductive layer and the second conductive layer. First, a first conductive layer resistant to high-temperature oxidation is prepared on the sub-dielectric layer by a process such as coating, printing, or printing. Then, a conductive core layer with good heating performance but poor high-temperature oxidation resistance is prepared on the first conductive layer by a process such as coating, printing, or printing. Finally, a second conductive layer is coated and wrapped around the conductive core layer by a process such as coating, printing, or printing to form a sandwich structure. The first conductive layer and the second conductive layer can protect the conductive core layer from high-temperature oxidation, so that the heating wire has good heating performance. The materials of the first conductive layer, the second conductive layer, and the conductive core layer can be metal, alloy, or ceramic, and the present invention does not impose specific limitations on this.
[0082] To facilitate powering the heating assembly, the heating assembly provided in the embodiment of the present invention is connected to a terminal. Referring to FIG7 , which is a schematic diagram of the structure of another dielectric window provided in the embodiment of the present invention, the dielectric window provided in the embodiment of the present invention further includes:
[0083] The first terminal 301 to the Nth terminal, the kth terminal being connected to the kth heating element, wherein the kth terminal is embedded in the dielectric layer 100 and includes a portion exposed outside the dielectric layer 100, and k is an integer not less than 1 and not greater than N. As shown in the figure, the first terminal 301 and the second terminal 302 include two terminals, an input terminal and an output terminal, and both terminals include a portion exposed outside the dielectric layer 100, wherein the two terminals of the first terminal 301 are correspondingly connected to the two terminals of the first heating element 201, and the two terminals of the second terminal 302 are correspondingly connected to the two terminals of the second heating element 202, for supplying power to the first heating element 201 and the second heating element 202.
[0084] Optionally, all terminals provided in embodiments of the present invention may be located on the same side of the dielectric layer, or at least one terminal may be located on a different layer of the dielectric layer than the other terminals, which is not specifically limited by the present invention. Accordingly, the kth terminal and the kth heating element are both located between the kth sub-dielectric layer and the k+1th sub-dielectric layer; and, when the kth sub-dielectric layer or the k+1th sub-dielectric layer includes a groove, the kth heating element and the kth terminal are both located within the groove.
[0085] Further referring to FIG. 8 , which is a schematic structural diagram of another dielectric window provided in an embodiment of the present invention, and FIG. 8 is a cross-sectional view taken along the CC′ direction in FIG. 7 , wherein the k-th terminal provided in an embodiment of the present invention (taking the second terminal 302 as an example in the figure) includes:
[0086] A connecting wire 310 and an external pin 320, wherein the connecting wire 310 is embedded in the dielectric layer 100 and connected to the kth heating component, and the connecting wire 310 includes a filling groove on the side away from the connection end thereof with the kth heating component; the external pin 320 is filled in the filling groove, and the external pin 320 is exposed outside the dielectric layer 100.
[0087] It can be understood that when preparing the terminal provided in the embodiment of the present invention, a connecting wire can be formed on the sub-dielectric layer through processes such as plating, printing or printing, and then the connecting wire is sintered to form a solid structure during the pressing and sintering process of the dielectric layer. The connecting wire is punched through a punching process to form a filling groove, and finally an external pin is filled in the filling groove to form a connector for the external power supply.
[0088] In one embodiment of the present invention, the material of the connecting wire provided by the embodiment of the present invention can be the same as that of the heating wire, and the connecting wire is prepared while forming the heating wire on the sub-dielectric layer, so that the connecting wire has good heating performance; at the same time, in order to avoid the adverse effects caused by overheating at the connecting wire, an external pin with good thermal conductivity and electrical conductivity is set at the connecting wire; wherein, the high-temperature oxidation resistance of the material of the connecting wire provided by the embodiment of the present invention is greater than the high-temperature oxidation resistance of the material of the external pin; and the resistance of the material of the connecting wire is greater than the resistance of the material of the external pin, thereby improving the performance of the terminal through the low-resistance external pin, and providing a high-temperature oxidation-resistant connecting wire to avoid oxidation problems of the terminal during the pressing and sintering process. Optionally, the material of the connecting wire provided by the embodiment of the present invention can be metal, alloy or ceramic (such as metal tungsten, ceramic Al2O3, etc.), and the material of the external pin can be metal (such as copper metal, because copper has a low melting point, when the filling slot is filled with copper material, the external pin can be formed by local casting extrusion, threaded connection and other processes).
[0089] Furthermore, in order to improve the looseness and hole problems of the heating surface, the dielectric window provided by the embodiment of the present invention also includes a dense film formed on the heating surface side. As shown in Figure 9, it is a structural schematic diagram of another dielectric window provided by the embodiment of the present invention, wherein the dielectric layer 100 provided by the embodiment of the present invention includes a heating surface 120 facing the reaction chamber of the semiconductor device (the heating surface 120 is the surface of the dielectric layer 100 facing the reaction chamber), wherein the dielectric window also includes:
[0090] The dense film 400 covers the heating surface 120 , wherein the porosity of the dense film 400 is smaller than the porosity of the heating surface 120 , and the looseness of the dense film 400 is smaller than the looseness of the heating surface 120 .
[0091] Optionally, the dense film provided in the embodiment of the present invention has a thickness ranging from 0.1 to 500 μm.
[0092] It is understandable that when the dielectric layer provided in the embodiments of the present invention is made of a material such as ceramic, the compression and sintering process of the dielectric layer may result in a small amount of looseness and holes in the formed dielectric layer due to volume shrinkage and burnout of the binder. By forming a dense film covering the heating surface on one side of the heating surface, the embodiments of the present invention effectively cover the defective structure of the dielectric layer, thereby reducing the etching effect of the plasma on the dielectric layer and reducing problems such as particle contamination that may occur during the plasma etching process.
[0093] In one embodiment of the present invention, the embodiment of the present invention can form the dense film using processes such as PEPVD (plasma enhanced physical vapor deposition) or CVD (chemical vapor deposition). Among them, PEPVD is a surface thin film deposition process that is carried out by combining the two processes of PVD and Plasma Enhancement. Among them, the PVD process can be carried out by vacuum evaporation (evaporation), ion bombardment sputtering (ion bombardment sputtering), magnetron sputtering (magnetron sputtering) and other process methods, and the plasma enhancement function can be achieved by ion bombardment in the plasma and ion beam bombardment (ion beam bombardment). Due to the bombardment effect of ions, the weak atomic bonds in the film growth process can be broken, and the atomic surface diffusion is promoted to form a dense crystalline or amorphous structure with consistent orientation. Therefore, compared with films prepared by other thin film deposition processes such as evaporation, plasma spraying, etc., the film formed by PEPVD has a dense structure and greatly enhanced plasma etching resistance. In addition, due to the combination of PVD and plasma processes, PEPVD can be carried out on the surface of workpieces at lower temperatures (such as <200°C), and the film thickness can reach more than 150 microns. It is very suitable for depositing ceramic films such as Y2O3 with sufficient thickness (such as >10μm) on the surface of ceramic workpieces. Therefore, in recent years, it has been widely used in plasma etching equipment to protect the surface film of key workpieces from plasma etching.
[0094] In one embodiment of the present invention, the dielectric window provided by the embodiment of the present invention may further include a protective film to protect the dielectric layer. Referring to FIG10 , there is shown a schematic structural diagram of another dielectric window provided by the embodiment of the present invention, wherein the dielectric window further includes:
[0095] The protective film 500 covers the exposed surface of the dielectric layer 100 , wherein the dense film 400 is located on the heating surface 120 side of the dielectric layer 100 , and the dense film 400 is located on the side of the protective film 500 away from the heating surface 120 .
[0096] Optionally, the protective film provided in the embodiment of the present invention has a thickness ranging from 0.1 to 500 μm.
[0097] It can be understood that the exposed surface of the dielectric layer provided in the embodiment of the present invention is fully covered by a protective film to protect the exposed surface of the dielectric layer, enhance the dielectric layer's resistance to chemical corrosion, plasma etching, etc., and further improve the stability and service life of the dielectric window.
[0098] In one embodiment of the present invention, the protective film provided by the present invention can be formed by ALD (Atomic Layer Deposition). ALD is a special chemical vapor deposition (CVD) process that grows a single atomic layer. The film growth process can generally be carried out in a low-temperature and low-pressure environment below 450°C. The process feature that is different from ordinary CVD is that the chemical precursor in the ALD process does not decompose before contacting the substrate surface. Instead, it undergoes a chemical decomposition reaction on the surface after being adsorbed on the substrate surface, and the chemical components (Radical) formed by the decomposition are evenly covered on the entire substrate surface to form an atomic layer deposition. Therefore, as long as the distribution of the reaction gas is controlled during the ALD process so that the chemical precursor can fully diffuse and contact the component surface, and is supplemented with sufficient time to purge and remove the remaining precursor, the ALD process can form a uniform multi-atomic layer stacked film on engineering components with complex geometric surfaces, inner and outer walls of cylindrical tubes, and inner surfaces of small pores. Since the ALD film is formed by atomic layer growth through the decomposition of the reaction body, the ALD film structure is very dense and can form all-round surface coverage of the substrate component. The film also has good interface bonding strength and structural thermal stability.
[0099] The protective film provided by the embodiment of the present invention can be a single-layer film, wherein the protective film provided by the embodiment of the present invention is preferably selected from a material resistant to plasma etching whose chemical composition and organizational structure are similar to those of the dielectric layer, such as when the dielectric layer material is Al2O3, the protective film is Al2O3, etc., and when the dielectric layer material is Y2O3, the protective film is Y2O3, YF3 or YOF, etc., so that the protective film and the dielectric layer have a small interface deformation stress, which is conducive to improving the stability of the dielectric window. Optionally, the protective film provided by the embodiment of the present invention can be an amorphous aluminum oxide sub-protective film, so that the amorphous aluminum oxide sub-protective film can prevent trace elements in the dielectric layer from diffusing into the protective film, thereby reducing trace element contamination during the use of semiconductor equipment.
[0100] Alternatively, the protective film provided by the embodiment of the present invention may also be a multilayer film, that is, the protective film provided by the embodiment of the present invention includes: a plurality of sub-protective films formed in sequence, wherein, among the plurality of sub-protective films, the initial sub-protective film covers the exposed surface of the dielectric layer, and the subsequent sub-protective film covers the exposed surface of the previous sub-protective film. Optionally, the protective film provided by the embodiment of the present invention includes: an amorphous aluminum oxide sub-protective film and a yttrium oxide sub-protective film formed in sequence; or, an amorphous aluminum oxide sub-protective film, a crystalline aluminum oxide sub-protective film, and a yttrium oxide sub-protective film formed in sequence.
[0101] It is understood that the protective film provided by the embodiments of the present invention first forms an amorphous aluminum oxide sub-protective film on the surface of the dielectric layer to prevent trace elements in the dielectric layer from diffusing into the protective film through the amorphous aluminum oxide sub-protective film, thereby reducing trace element contamination during the use of the semiconductor device. A yttrium oxide sub-protective film is then formed. Because the thermal expansion coefficients of aluminum oxide and yttrium oxide are very similar, and yttrium oxide has much higher plasma etching resistance than aluminum oxide in different plasma environments (containing O2, F, Cl, HBr, etc.), depositing the yttrium oxide sub-protective film on the surface of the amorphous aluminum oxide sub-protective film can further enhance the process stability of the dielectric window and its application range in different semiconductor devices.
[0102] Furthermore, in order to enhance the bonding force between the amorphous aluminum oxide sub-protective film and the yttrium oxide sub-protective film, the protective film provided in the embodiment of the present invention also includes a crystalline aluminum oxide sub-protective film located between the amorphous aluminum oxide sub-protective film and the yttrium oxide sub-protective film.
[0103] It should be noted that the protective film provided by the embodiments of the present invention is not limited to the above-mentioned methods. In other embodiments of the present invention, the protective film provided by the present invention may also include the superposition of other types of sub-protective films, which requires specific design based on parameters such as the environment and performance in actual applications.
[0104] In any of the above embodiments of the present invention, the material of either the protective film or the dense film provided in the embodiment of the present invention includes at least one of Al2O3, Y2O3, YF3, YOF, ZrO2, Er2O3, SiC, SiO2, HfO2, Si3N4, AlN, B2O3, Nd2O3, Nb2O5, CeO2, Sm2O3, Yb2O3, YAG, EAG, YAM, YAP, EAM, and EAP. Furthermore, based on the materials of the above-mentioned protective film and the dense film, either of the protective film or the dense film provided in the embodiment of the present invention may also be a composite ceramic film based on the above-mentioned materials.
[0105] Correspondingly, an embodiment of the present invention further provides a semiconductor device, which includes the dielectric window provided by any one of the above embodiments.
[0106] Optionally, the semiconductor device provided in the embodiment of the present invention may be a plasma etching device, which is not specifically limited in the present invention.
[0107] An embodiment of the present invention provides a dielectric window and a semiconductor device, comprising: a dielectric layer, the dielectric layer including an opening extending through the dielectric layer; and a first heating component, the first heating component being embedded in the dielectric layer and disposed around the opening. It can be seen that the technical solution provided by the embodiment of the present invention embeds the first heating component within the dielectric layer, and then, after the first heating component is powered on, controls the dielectric layer to be heated from the inside out. This not only improves the heating efficiency of the dielectric window, but also significantly improves the uniformity of the temperature distribution on the surface of the dielectric window by disposing the first heating component around the opening. This improves the stability of the plasma etching process while also avoiding the problem of particle contamination and trace element contamination of the reaction chamber caused by uneven heating of the dielectric window.
[0108] In the present invention, unless otherwise specified or limited, terms such as "mounted," "connected," "connect," and "fixed" should be understood in a broad sense. For example, they can refer to fixed connections, detachable connections, or integration; mechanical connections, electrical connections, or communication between them; direct connections or indirect connections through an intermediate medium; internal communication between two components, or interaction between two components, unless otherwise specified. Those skilled in the art will understand the specific meanings of the above terms in the present invention based on specific circumstances.
[0109] Although the embodiments of the present invention have been shown and described above, it will be understood that the above embodiments are illustrative and are not to be construed as limitations on the present invention. A person skilled in the art may change, modify, replace and modify the above embodiments within the scope of the present invention.
Claims
1. A dielectric window, applied to semiconductor equipment, characterized in that: include: a dielectric layer, the dielectric layer comprising an opening extending through the dielectric layer; The first heating component is embedded in the dielectric layer and is disposed around the opening.
2. The dielectric window according to claim 1, characterized in that The dielectric window further comprises: From the second heating element to the Nth heating element, the i-th heating element is embedded in the dielectric layer, and the i-th heating element is arranged around the i-1th heating element, N is an integer greater than 1, and i is an integer greater than 1 and not greater than N.
3. The dielectric window according to claim 2, characterized in that: In a direction perpendicular to the surface where the dielectric layer is located, and among the first heating element to the Nth heating element, the distances between different heating elements and the same plane are different.
4. The dielectric window according to claim 3, characterized in that: The dielectric layer includes a heating surface facing the reaction chamber of the semiconductor device; The distance between the jth heating component and the heating surface is greater than the distance between the j+1th heating component and the heating surface, and j is an integer not less than 1 and less than N.
5. The dielectric window according to claim 3, characterized in that: The dielectric layer includes a first sub-dielectric layer to an N+1th sub-dielectric layer, and the jth heating component is located between the jth sub-dielectric layer and the j+1th sub-dielectric layer, where j is an integer not less than 1 and less than N.
6. The dielectric window according to claim 5, characterized in that: The jth dielectric sub-layer or the j+1th dielectric sub-layer comprises a groove, and the jth heating component is located in the groove.
7. The dielectric window according to claim 5, characterized in that: In the first sub-dielectric layer to the N+1th sub-dielectric layer, all sub-dielectric layers are made of the same material; Alternatively, among the first to N+1th sub-dielectric layers, a material of at least one sub-dielectric layer is different from that of the other sub-dielectric layers.
8. The dielectric window according to claim 5, characterized in that: In the first to N+1th sub-dielectric layers, the material of any sub-dielectric layer includes at least one of Al2O3, YAG, YOF and Y2O3.
9. The dielectric window according to claim 2, characterized in that: At least one of the first to Nth heating assemblies includes a heating wire.
10. The dielectric window according to claim 9, characterized in that: The material of the heating wire is metal, alloy or ceramic; Alternatively, the heating wire includes a first conductive layer, a conductive core layer located on the first conductive layer, and a second conductive layer covering the conductive core layer, and the high temperature oxidation resistance of the materials of the first conductive layer and the second conductive layer is greater than the high temperature oxidation resistance of the material of the conductive core layer.
11. The dielectric window according to claim 2, characterized in that: The dielectric window further comprises: The first terminal to the Nth terminal, the kth terminal is connected to the kth heating component, wherein the kth terminal is embedded in the dielectric layer, and the kth terminal includes a portion exposed outside the dielectric layer, and k is an integer not less than 1 and not greater than N.
12. The dielectric window according to claim 11, characterized in that: The kth terminal comprises: A connecting wire and an external pin, wherein the connecting wire is embedded in the dielectric layer and connected to the kth heating component, and the connecting wire includes a filling groove on the side away from the connection end with the kth heating component; the external pin is filled in the filling groove, and the external pin is exposed outside the dielectric layer.
13. The dielectric window according to claim 12, characterized in that: The high temperature oxidation resistance of the material of the connecting wire is greater than the high temperature oxidation resistance of the material of the external pin; And the resistance of the material of the connecting wire is greater than the resistance of the material of the external pin.
14. The dielectric window according to claim 1, characterized in that The dielectric layer includes a heating surface facing a reaction chamber of the semiconductor device, wherein the dielectric window further includes: A dense film covers the heating surface.
15. The dielectric window according to claim 14, characterized in that: The thickness of the dense film ranges from 0.1 to 500 μm.
16. The dielectric window according to claim 14, characterized in that The dielectric window further comprises: a protective film covering the exposed surface of the dielectric layer, wherein the dense film is located on the heating surface side of the dielectric layer, and the dense film is located on the side of the protective film away from the heating surface.
17. The dielectric window according to claim 16, characterized in that: The thickness of the protective film ranges from 0.1 to 500 μm.
18. The dielectric window according to claim 16, characterized in that The protective film comprises: A plurality of sub-protective films are formed sequentially, wherein, among the plurality of sub-protective films, the initial sub-protective film covers the exposed surface of the dielectric layer, and the subsequent sub-protective film covers the exposed surface of the previous sub-protective film.
19. The dielectric window according to claim 18, characterized in that The protective film comprises: An amorphous aluminum oxide sub-protective film and an yttrium oxide sub-protective film are formed in sequence; Alternatively, an amorphous aluminum oxide sub-protective film, a crystalline aluminum oxide sub-protective film and a yttrium oxide sub-protective film are formed in sequence.
20. The dielectric window according to claim 14 or 16, characterized in that: The material of any one of the protective film and the dense film includes at least one of Al2O3, Y2O3, YF3, YOF, ZrO2, Er2O3, SiC, SiO2, HfO2, Si3N4, AlN, B2O3, Nd2O3, Nb2O5, CeO2, Sm2O3, Yb2O3, YAG, EAG, YAM, YAP, EAM, and EAP.
21. A semiconductor device, characterized in that: The semiconductor device comprises the dielectric window according to any one of claims 1-20.
22. The semiconductor device according to claim 21, characterized in that The semiconductor equipment is a plasma etching equipment.
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