Data processing method and apparatus, electronic device and storage medium

Abstract

Disclosed in the present application are a data processing method and apparatus, an electronic device and a storage medium. The method comprises: obtaining array data to be processed; performing first mapping processing on said array data to obtain target array data, and determining weightings corresponding to each piece of target data among the target array data during the first mapping processing; according to a first rule, performing multiply-accumulate operation processing on the target data having the weighting of 1 to obtain a first operation value; according to a second rule of multiplying the same column by the same value, performing multiply-accumulate operation processing on the target data of which the weighting is not 1 so as to obtain a second operation value; separately performing analog-to-digital conversion processing on the first operation value and the second operation value to obtain a first quantized value and a second quantized value; on the basis of the weightings, performing second mapping processing on the first quantized value and the second quantized value to obtain a third quantized value and a fourth quantized value; and adding the third quantized value and the fourth quantized value to obtain a target output value.

Description

Data processing method, device, electronic device and storage medium

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to the Chinese patent application filed with the China Patent Office on September 5, 2023, with application number 202311136280.4, the entire contents of which are incorporated by reference into this application. Technical Field

[0003] The present application relates to the field of information technology, and in particular to a data processing method, device, electronic device, and storage medium. Background Art

[0004] The traditional CIM (Computing in Memory) circuit architecture involves transferring the array data to be processed via peripheral circuitry to the array circuit for a multiplier and accumulation (MAC) operation, resulting in a randomly distributed MAC current or voltage value with a wide range. This MAC current or voltage value is then converted into a corresponding digital value via an ADC (Analog-to-Digital Converter) circuit with high dynamic range sampling. Because the array data to be processed is distributed randomly and has a wide range, this circuit architecture results in high power consumption in the array circuit and significantly impacts the ADC's sampling accuracy and conversion time, hindering the energy efficiency of the CIM circuit.

[0005] Summary of the Invention

[0006] In view of this, the embodiments of the present application provide a data processing method, device, electronic device and storage medium to at least solve the above-mentioned technical problems existing in the prior art.

[0007] According to the first aspect of the present application, an embodiment of the present application provides a data processing method, including:

[0008] Get the array data to be processed;

[0009] Performing a first mapping process on the array data to be processed to obtain target array data, and determining a weight corresponding to each target data in the target array data during the first mapping process; wherein the numerical range of the target data in the target array data is smaller than the numerical range of the data in the array data to be processed;

[0010] The target data with a weight of 1 is subjected to a multiplication and accumulation operation according to a first rule to obtain a first operation value; the target data with a weight not of 1 is subjected to a multiplication and accumulation operation according to a second rule of multiplying the same column by the same value to obtain a second operation value;

[0011] Performing analog-to-digital conversion on the first operation value and the second operation value respectively to obtain a first quantized value and a second quantized value;

[0012] Based on the weight, performing a second mapping process on the first quantized value and the second quantized value to obtain a third quantized value and a fourth quantized value, wherein the second mapping process is a reverse mapping process of the first mapping process;

[0013] The third quantized value and the fourth quantized value are added to obtain a target output value.

[0014] Optionally, performing a first mapping process on the array data to be processed to obtain target array data, and determining a weight corresponding to each target data in the target array data during the first mapping process, wherein a numerical range of the target data in the target array data is smaller than a numerical range of the data in the array data to be processed, includes:

[0015] Determine the numerical range corresponding to each data in the array data to be processed;

[0016] Based on the numerical range corresponding to each data, a first mapping process is performed on each data, so that data smaller than the first numerical range remains unchanged, and data larger than the first numerical range is mapped to data in the first numerical range, to obtain target array data, and the weight of each data when the first mapping process is performed is determined to be the weight corresponding to each target data in the target array data during the first mapping process.

[0017] Optionally, a first mapping process is performed on each data based on a numerical range corresponding to each data, so that data belonging to the first numerical range remains unchanged, and data larger than the first numerical range is mapped to data in a first array range, to obtain target array data, and a weight of each data when the first mapping process is performed is determined as the weight corresponding to each target data in the target array data when the first mapping process is performed, including:

[0018] If the data falls within the first numerical range, it is determined that the data remains unchanged when the first mapping process is performed on the data, and the weight corresponding to the target data obtained after the first mapping process is performed on the data is 1;

[0019] If the data belongs to the second numerical range, it is determined that the data is reduced by the first preset multiple when the first mapping process is performed on the data, and the weight corresponding to the target data obtained after the first mapping process is the first preset multiple; the second numerical range is larger than the first numerical range;

[0020] If the data belongs to the third numerical range, it is determined that the data is reduced by the second preset multiple when the first mapping processing is performed, and the weight corresponding to the target data obtained after the first mapping processing is performed on the data is the second preset multiple; the third numerical range is larger than the second numerical range, and the second preset multiple is larger than the first preset multiple.

[0021] Optionally, performing analog-to-digital conversion on the first operation value and the second operation value respectively to obtain the first quantized value and the second quantized value includes:

[0022] Calculate the difference between the first operation value and the second operation value and the reference value respectively by using an analog-to-digital converter;

[0023] If the absolute value of the difference is less than the threshold, the analog signals output by the analog-to-digital converter at different bits are sampled in a sampling order from low to high;

[0024] A first quantized value is determined based on a bit value of the analog-to-digital converter corresponding to an analog signal matching the first operation value, and a second quantized value is determined based on a bit value of the analog-to-digital converter corresponding to an analog signal matching the second operation value.

[0025] Optionally, calculating the difference between the second operation value and the reference value by an analog-to-digital converter includes:

[0026] determining a correction value corresponding to the second operation value through an analog-to-digital converter based on a weight of the target data corresponding to the second operation value;

[0027] Calculating a second difference between the second operation value and the correction value;

[0028] The difference between the second difference value and the reference value is used as the difference between the second calculated value and the reference value.

[0029] Optionally, based on the weight, a second mapping process is performed on the first quantized value and the second quantized value to obtain a third quantized value and a fourth quantized value, wherein the second mapping process is a reverse mapping process of the first mapping process, including:

[0030] Multiplying the weight of the target data corresponding to the first quantization value by the first quantization value to obtain a third quantization value;

[0031] The weight of the target data corresponding to the second quantized value is multiplied by the second quantized value to obtain a fourth quantized value.

[0032] According to a second aspect of the present application, an embodiment of the present application provides a data processing device, including:

[0033] The acquisition module is used to obtain the array data to be processed;

[0034] A first mapping module is configured to perform a first mapping process on the array data to be processed to obtain target array data, and determine a weight corresponding to each target data in the target array data during the first mapping process; wherein the numerical range of the target data in the target array data is smaller than the numerical range of the data in the array data to be processed;

[0035] An operation module is configured to perform a multiplication and accumulation operation on target data with a weight of 1 according to a first rule to obtain a first operation value; and to perform a multiplication and accumulation operation on first target data with a weight not equal to 1 according to a second rule of multiplying the same column by the same value to obtain a second operation value;

[0036] an analog-to-digital conversion module, configured to perform analog-to-digital conversion on the first operation value and the second operation value, respectively, to obtain a first quantized value and a second quantized value;

[0037] a second mapping module, configured to perform a second mapping process on the first quantized value and the second quantized value based on the weight to obtain a third quantized value and a fourth quantized value, wherein the second mapping process is a reverse mapping process of the first mapping process;

[0038] The adding module is used to add the third quantized value and the fourth quantized value to obtain a target output value.

[0039] Optionally, the first mapping module is used to determine a numerical range corresponding to each data in the array data to be processed;

[0040] Based on the numerical range corresponding to each data, a first mapping process is performed on each data, so that the data belonging to the first numerical range remains unchanged, and the data larger than the first numerical range is mapped to the data in the first numerical range to obtain the target array data, and the weight of each data when the first mapping process is performed is determined to be the weight corresponding to each target data in the target array data during the first mapping process.

[0041] According to a third aspect of the present application, an embodiment of the present application provides an electronic device, including:

[0042] At least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform the data processing method as described in the first aspect or any embodiment of the first aspect.

[0043] According to the fourth aspect of the present application, an embodiment of the present application provides a computer-readable storage medium, which stores computer instructions, and the computer instructions are used to enable a computer to execute the data processing method in the first aspect or any embodiment of the first aspect.

[0044] The data processing method, device, electronic device and storage medium provided by the embodiments of the present application obtain target array data by performing a first mapping process on the array data to be processed, and determine the weight corresponding to each target data in the target array data during the first mapping process; wherein the numerical range of the target data in the target array data is smaller than the numerical range of the data in the array data to be processed; in this way, the numerical range of the array data to be processed can be effectively converged, so that the numerical range of the input data of the multiplication and accumulation operation processing flow, that is, the target array data, is smaller, thereby reducing the computational power consumption of the array circuit; and the target data with a weight of 1 is subjected to a multiplication and accumulation operation according to a first rule to obtain a first operation value; the first target data with a weight not being 1 is subjected to a multiplication and accumulation operation according to a second rule of multiplying the same column by the same value to obtain a second operation value, so that the second operation value can be effectively converged. The calculated value remains linear, and the first calculated value maintains the conversion accuracy, which on the one hand reduces the conversion accuracy loss of the overall calculated value, and on the other hand enables the second quantized value corresponding to the second calculated value to be restored; then, the first calculated value and the second calculated value are respectively subjected to analog-to-digital conversion processing to obtain the first quantized value and the second quantized value; in this way, since the numerical range of the first calculated value and the second calculated value is small, the conversion accuracy and time of the analog-to-digital conversion circuit can be improved; then, based on the weight, the first quantized value and the second quantized value are subjected to a second mapping processing to obtain a third quantized value and a fourth quantized value, wherein the second mapping processing is the reverse mapping processing of the first mapping processing; in this way, the second quantized value corresponding to the second calculated value is restored; then the third quantized value and the fourth quantized value are added to obtain the target output value; in this way, the output data is restored.

[0045] The above description is only an overview of the technical solution of the present application. In order to more clearly understand the technical means of the present application, it can be implemented in accordance with the contents of the specification. In order to make the above and other purposes, features and advantages of the present application more obvious and easy to understand, the specific implementation methods of the present application are listed below. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following briefly introduces the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0047] FIG1 is a flow chart of a data processing method according to an embodiment of the present application;

[0048] FIG2 is a schematic diagram of a first mapping process in an embodiment of the present application;

[0049] FIG3 is a schematic diagram of a process for performing multiplication and accumulation operations on target data in an embodiment of the present application;

[0050] FIG4 is a schematic diagram of a second mapping process in an embodiment of the present application;

[0051] FIG5 is a schematic diagram of an analog-to-digital conversion process in an embodiment of the present application;

[0052] FIG6 is a schematic structural diagram of a data processing device according to an embodiment of the present application;

[0053] FIG7 is a schematic diagram of the hardware structure of an electronic device in an embodiment of the present application. DETAILED DESCRIPTION

[0054] To make the purpose, technical solutions, and advantages of the embodiments of the present application more clear, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without making creative efforts shall fall within the scope of protection of this application.

[0055] The present application provides a data processing method, as shown in FIG1 , including:

[0056] S101, obtaining array data to be processed.

[0057] S102, performing a first mapping process on the array data to be processed to obtain target array data, and determining the weight corresponding to each target data in the target array data during the first mapping process; wherein the numerical range of the target data in the target array data is smaller than the numerical range of the data in the array data to be processed.

[0058] In this embodiment, the first mapping process is mainly to reduce the numerical range of the array data to be processed, thereby obtaining target array data with a smaller numerical range.

[0059] In some embodiments, performing a first mapping process on the array data to be processed to obtain target array data, and determining a weight corresponding to each target data in the target array data during the first mapping process, wherein a numerical range of the target data in the target array data is smaller than a numerical range of the data in the array data to be processed, includes:

[0060] S1021, determining the numerical range corresponding to each data in the array data to be processed.

[0061] S1022, performing a first mapping process on each data based on the numerical range corresponding to each data, so that the data belonging to the first numerical range remains unchanged, and the data larger than the first numerical range is mapped to the data in the first numerical range, to obtain the target array data, and determining the weight of each data when the first mapping process is performed as the weight corresponding to each target data in the target array data during the first mapping process.

[0062] In some implementations, with respect to step S1021 , each data in the array of data to be processed may be compared with the upper limit and lower limit of each numerical range to determine the numerical range corresponding to each data.

[0063] For step S1022, performing a first mapping process on each data based on the numerical range corresponding to each data, so that data smaller than the first numerical range remains unchanged, and data larger than the first numerical range is mapped to data in the first array range, obtaining target array data, and determining a weight of each data when the first mapping process is performed as the weight corresponding to each target data in the target array data when the first mapping process is performed, may include:

[0064] If the data falls within the first numerical range, it is determined that the data remains unchanged when the first mapping process is performed on the data, and the weight corresponding to the target data obtained after the first mapping process is performed on the data is 1;

[0065] If the data belongs to the second numerical range, it is determined that the data is reduced by the first preset multiple when the first mapping processing is performed on the data. The weight corresponding to the target data obtained after the data is subjected to the first mapping processing is the first preset multiple. The target data obtained after the data is reduced according to the first preset multiple belongs to the first numerical range, that is, the data is mapped to data in the first numerical range; the second numerical range is greater than the first numerical range, specifically refers to: the lower limit value of the second numerical range is greater than or equal to the upper limit value of the first numerical range, for example, the lower limit value of the second numerical range is equal to the upper limit value of the first numerical range: the first numerical range is less than or equal to 5, and the second numerical range is greater than 5 and less than 7; the lower limit value of the second numerical range is greater than the upper limit value of the first numerical range: the first numerical range is less than or equal to 5, and the second numerical range is greater than 6 and less than 7.

[0066] If the data falls within the third numerical range, it is determined that the data is reduced by the second preset multiple when the first mapping process is performed on the data. The weight corresponding to the target data obtained after the first mapping process is the second preset multiple. The target data obtained after the data is reduced by the second preset multiple falls within the first numerical range, that is, the data is mapped to data in the first numerical range. The third numerical range is greater than the second numerical range, specifically, it means that the lower limit of the third numerical range is greater than or equal to the upper limit of the second numerical range. Because the third numerical range is greater than the second numerical range, in order to map the data in the third numerical range to the first numerical range, the second preset multiple needs to be greater than the first preset multiple.

[0067] It can be seen from this that when the data belongs to the first numerical range, the first mapping processing corresponding to the data remains unchanged, which can also be understood as a reduction factor of 1; when the data is greater than the first numerical range (belonging to the second numerical range or the third numerical range), the first mapping processing corresponding to the data is reduced by a preset multiple, and the corresponding preset reduction multiple can be determined according to the second numerical range or the third numerical range, so that the data belongs to the first numerical range after being reduced by the preset multiple.

[0068] In a specific implementation, the first mapping module shown in FIG2 can be used to perform the first mapping process on the array data to be processed. First, the array data to be processed is input to the comparator 12 through the input submodule 11. The preset values ​​N1, N2, and N3 are input to the comparator (CMP) 12 through the selection switch (MUX) 13, where N1 < N2 < N3. Then, the comparator 12 compares each data in the array data to be processed with the values ​​of N1, N2, and N3 respectively:

[0069] For example, if the data is less than N1, it can be considered that the data belongs to the first value range (less than or equal to N1), and the first enable signal en1 is generated, so that the data is sent to the selection switch 15 through the switch 14. The selection switch 15 outputs the data transmitted by the switch 14 based on the first enable signal en1. In this way, the data remains unchanged after the first mapping process, that is, the reduction factor is 1, and the weight corresponding to the target data corresponding to the data is 1;

[0070] For another example, if the data is greater than N1 and less than N2, it can be considered that the data belongs to the second numerical range (greater than N1 and less than N2). A second enable signal en2 is generated, causing the data to be sent to the selector switch 15 through the shifter (CLK) 16. The shifter 16 can right-shift the data by 1 bit, that is, reduce it by 2 times, and the resulting target data is less than or equal to N1. The selector switch 15 outputs the data sent by the shifter 16 based on the second enable signal en2. In this way, after the first mapping process, the data is reduced by 2 times, and the weight corresponding to the target data of this data is 2.

[0071] For example, if the data is greater than N2 and less than N3, it can be considered that the data belongs to the third numerical range (greater than or equal to N2 and less than or equal to N3). Then, a third enable signal en3 is generated, causing the data to be transmitted to the selection switch 15 through the shifter 17 (including two shifters). The shifter 17 can right-shift the data by 2 bits, that is, reduce it by 4 times, and the resulting target data is less than or equal to N1. The selection switch 15 outputs the data transmitted by the shifter 17 based on the third enable signal en3. In this way, after the first mapping process, the data is reduced by 4 times, and the weight corresponding to the target data of the data is 4.

[0072] S103, subjecting the target data with a weight of 1 to a multiplication-accumulation operation according to a first rule to obtain a first operation value; subjecting the target data with a weight not of 1 to a multiplication-accumulation operation according to a second rule of multiplying the same column by the same value to obtain a second operation value.

[0073] In this embodiment, the first rule is to multiply the same column by different values. A pre-set first array circuit 21 can be used to perform a multiplication-accumulation operation on the target data according to the first rule to obtain a first calculated value. If the weight corresponding to the target data output in FIG2 is 1, or the corresponding enable signal is en1, the target data is transmitted to the first array circuit 21 for multiplication-accumulation processing to obtain the corresponding first calculated value.

[0074] In a specific implementation, as shown in FIG3 , the first array circuit 21 is identical to a conventional array circuit, but the values ​​corresponding to each intersection 211 in the same column of the first array circuit 21 are different. For example, the values ​​corresponding to the intersections in the first left column of the first array circuit 21 from bottom to bottom are n1, n5, n6, n2, n9, n4, n8, n7, and n3, respectively. In this way, the first operation value can maintain conversion accuracy.

[0075] The second array circuit 22 can be used to perform a multiplication-accumulation operation on target data whose weight is not 1 to obtain a second operation value. If the weight corresponding to the target data output in FIG2 is not 1, or the corresponding enable signal is en2 or en3, the target data is transmitted to the first array circuit 22 for a multiplication-accumulation operation to obtain a corresponding second operation value. Among them, the second array circuit 22 is different from the traditional array circuit. The value corresponding to each intersection 221 in the same column of the second array circuit 22 is the same. For example, the value corresponding to each intersection in the first column on the left side of the second array circuit 22 is n1. In this way, the second operation value remains linear, and the second quantized value corresponding to the second operation value can be restored.

[0076] When the first array circuit 21 and the second array circuit 22 output data, they can selectively output data through the selection switch 23. When the selection switch 23 receives the second enable signal en2 or the third enable signal en3, the result of the second array circuit 22 (the second operation value) is output. When the selection switch 23 does not receive the second enable signal en2 or the third enable signal en3, or receives the first enable signal en1, the result of the first array circuit 21 (the first operation value) is output.

[0077] In this example, the values ​​corresponding to each intersection in the first array circuit 21 and the second array circuit 22 (i.e., n1, n2, n3, etc.) represent the neural network weights. Each weight is calculated through the neural network, and the weights can also be optimized through the neural network according to needs.

[0078] S104 , performing analog-to-digital conversion on the first operation value and the second operation value respectively to obtain a first quantized value and a second quantized value.

[0079] In this embodiment, after the first operation value and the second operation value are calculated, the analog-to-digital conversion module can be used to perform analog-to-digital conversion on the first operation value and the second operation value respectively, so that the first operation value and the second operation value are converted into digital signals, and the corresponding first quantization value and the second quantization value are obtained.

[0080] S105 , performing a second mapping process on the first quantized value and the second quantized value based on the weight to obtain a third quantized value and a fourth quantized value, wherein the second mapping process is a reverse mapping process of the first mapping process.

[0081] In this embodiment, the second mapping process is the reverse mapping process of the first mapping process. For example, if the first mapping process is to reduce the data by 2 times, the second mapping process is to increase the data by 2 times.

[0082] In this embodiment, since the weight of the target data corresponding to the first quantization value is 1 (i.e., the corresponding first mapping process is a reduction by a factor of 1), the second mapping process performed on the first quantization value is an expansion by a factor of 1. Therefore, it can be determined that the third quantization value obtained after the second mapping process of the first quantization value is the same as the first quantization value. For the second quantization value, the fourth quantization value can be obtained by performing an expansion by a corresponding factor based on the weight of the target data corresponding to the second quantization value.

[0083] In some embodiments, based on the weights, a second mapping process is performed on the first quantized value and the second quantized value to obtain a third quantized value and a fourth quantized value, wherein the second mapping process is a reverse mapping process of the first mapping process and may include:

[0084] S1051: Multiply the weight of the target data corresponding to the first quantization value by the first quantization value to obtain a third quantization value.

[0085] S1052: Multiply the weight of the target data corresponding to the second quantization value by the second quantization value to obtain a fourth quantization value.

[0086] In a specific implementation, a second mapping module as shown in FIG4 can be used to perform a second mapping process on the first quantized value and the second quantized value. The first quantized value and the second quantized value can be input to the input terminals of the second mapping module, respectively. Since the weight of the target data corresponding to the first quantized value is 1, a first enable signal en1 is generated, which is transmitted to switch 41 in the second mapping module. Therefore, when the second mapping module processes the first quantized value, the first quantized value is transmitted to selector switch 42 via switch 41 in the second mapping module under the activation of the first enable signal en1. Selector switch 42 outputs the first quantized value (i.e., the third quantized value) transmitted by switch 41. Thus, the first quantized value remains unchanged after the second mapping process. Since the weight of the target data corresponding to the second quantized value is not 1, a second enable signal en2 or a third enable signal en3 is generated. The second enable signal en2 is transmitted to switch 44, and the third enable signal is transmitted to switch 43. Switch 44 is connected to selector switch 42 via shifter 45. Shifter 45 can shift the second quantized value left by one bit, thereby multiplying it by two. The switch 43 is connected to the selection switch 42 via a shifter 46 (comprising two shifters). The shifter 46 can shift the second quantized value to the left by 2 bits, ie, increase it by 4 times.

[0087] When the second mapping module processes the second quantized value, the second quantized value is transmitted to the selection switch 42 via the switch 44 in the second mapping module under the activation of the second enable signal en2. The selection switch 42 outputs the fourth quantized value transmitted by the shifter 45. In this way, the second quantized value is doubled after the second mapping process, thereby restoring the second quantized value corresponding to the second operation value output by the second array circuit 22.

[0088] When the second mapping module processes the second quantized value, enabled by the third enable signal en3, the second quantized value is output to the selection switch 42 via the switch 43 in the second mapping module. The selection switch 42 selects to output the data (the fourth quantized value) sent by the shifter 46. Thus, the second quantized value is quadrupled after the second mapping process, thereby restoring the second quantized value corresponding to the second operation value output by the second array circuit 22.

[0089] S106: Add the third quantized value and the fourth quantized value to obtain a target output value.

[0090] In this embodiment, since the target data in the target array data is divided into two parts for processing, before outputting the data, the third quantization value corresponding to one part of the target data and the fourth quantization value corresponding to the other part of the target data are added together, so as to restore the final output data and ensure the accuracy of the output data.

[0091] The data processing method provided by the embodiment of the present application performs a first mapping process on the array data to be processed to obtain target array data, and determines the weight corresponding to each target data in the target array data during the first mapping process; wherein the first mapping process is to reduce the data in the array to be processed, and the reduced data all belong to a first numerical range. Therefore, the numerical range to which the target data in the target array data belongs is smaller than the numerical range to which the data in the array data to be processed belongs; in this way, the numerical range of the array data to be processed can be effectively converged, so that the numerical range of the input data of the multiplication and accumulation operation processing flow, that is, the target array data, is smaller, thereby reducing the computational power consumption of the array circuit; and the target data with a weight of 1 is subjected to a multiplication and accumulation operation according to a first rule to obtain a first operation value; the first target data with a weight not being 1 is subjected to a multiplication and accumulation operation according to a second rule of multiplying the same column by the same value, Obtaining the second operation value can keep the second operation value linear and the first operation value maintain the conversion accuracy, which on the one hand reduces the conversion accuracy loss of the overall operation value, and on the other hand, can enable the second quantization value corresponding to the second operation value to be restored; then, by performing analog-to-digital conversion processing on the first operation value and the second operation value respectively, the first quantization value and the second quantization value are obtained; in this way, since the numerical range of the first operation value and the second operation value is small, the conversion accuracy of the analog-to-digital conversion circuit can be improved and the conversion time can be shortened; then, based on the weight, the first quantization value and the second quantization value are subjected to a second mapping processing to obtain a third quantization value and a fourth quantization value, wherein the second mapping processing is the reverse mapping processing of the first mapping processing; in this way, the second quantization value corresponding to the second operation value is restored; then the third quantization value and the fourth quantization value are added to obtain the target output value; in this way, the restoration of the input data is achieved.

[0092] In an optional embodiment, step S104, performing analog-to-digital conversion on the first operation value and the second operation value to obtain the first quantized value and the second quantized value, includes:

[0093] S1041, using an analog-to-digital converter to calculate the differences between the first operation value and the second operation value and the reference value.

[0094] S1042: If the absolute value of the difference is less than the threshold, sample the analog signals output by the analog-to-digital converter at different bits in a sampling order from low to high.

[0095] S1043, determining a first quantization value based on the bit value of the analog-to-digital converter corresponding to the analog signal matching the first operation value, and determining a second quantization value based on the bit value of the analog-to-digital converter corresponding to the analog signal matching the second operation value.

[0096] In this embodiment, by comparing the difference between the first operation value and the reference value, and the difference between the second operation value and the reference value, it can be achieved that: when the absolute value of the difference is less than the threshold, the analog signals output by the analog-to-digital converter at different bits are sampled in a sampling order from low to high, which can greatly reduce the analog-to-digital conversion time and also reduce the conversion power.

[0097] In one implementation, the difference between the second operational value and the reference value is calculated by an analog-to-digital converter, including: determining a correction value corresponding to the second operational value by the analog-to-digital converter based on the weight of the target data corresponding to the second operational value; calculating a second difference between the second operational value and the correction value; and using the difference between the second difference and the reference value as the difference between the second operational value and the reference value.

[0098] In a specific implementation, the analog-to-digital converter shown in FIG5 can be used to perform analog-to-digital conversion on the first and second operational values. The analog-to-digital converter includes a normal mode and a fast mode. In normal mode, the analog-to-digital converter samples the analog signal outputted by the analog-to-digital converter at different bits (including Sign bits 0-n) in a sampling order from high to low. In fast mode, the analog-to-digital converter samples the analog signal outputted by the analog-to-digital converter at different bits in a sampling order from low to high. The reference value is VCM, VIN is the first or second operational value, and capacitor Cz is connected in series at the input. When the selector switch 51 in the analog-to-digital converter receives the second enable signal en2 or the third enable signal en3, the fast mode is activated. In fast mode, Vp is further converted to VIN-VCz (i.e., the difference between the second operational value and the correction value), where VIN is the second operational value, VCz is the correction value corresponding to the second operational value, and Vp is the operational value input to the comparator 52. This further improves the conversion efficiency of the analog-to-digital converter.

[0099] The present application also provides a data processing device, which is applied to a CIM circuit, as shown in FIG6 , and includes:

[0100] An acquisition module 61 is used to acquire array data to be processed and transmit it to a first mapping module 62;

[0101] A first mapping module 62 is configured to perform a first mapping process on the array data to be processed to obtain target array data and determine a weight corresponding to each target data in the target array data during the first mapping process; wherein the numerical range of the target data in the target array data is smaller than the numerical range of the data in the array data to be processed; the first mapping module 62 is the first mapping module shown in FIG2 ;

[0102] The operation module 63 is configured to perform a multiplication-accumulation operation on target data with a weight of 1 according to a first rule to obtain a first operation value; and to perform a multiplication-accumulation operation on first target data with a weight not equal to 1 according to a second rule of multiplying the same column by the same value to obtain a second operation value. The operation module 63 is the module shown in FIG3 , and includes a first array circuit 21 , a second array circuit 22 , and a selection switch 23 .

[0103] The analog-to-digital conversion module 64 is configured to perform analog-to-digital conversion on the first operation value and the second operation value to obtain a first quantized value and a second quantized value. The analog-to-digital conversion module 64 is the analog-to-digital converter shown in FIG5 .

[0104] A second mapping module 65 is configured to perform a second mapping process on the first quantized value and the second quantized value based on the weights to obtain a third quantized value and a fourth quantized value, wherein the second mapping process is a reverse mapping process of the first mapping process; the second mapping module 65 is the second mapping module shown in FIG4 ;

[0105] The adding module 66 is configured to add the third quantized value and the fourth quantized value to obtain a target output value.

[0106] In an optional embodiment, the first mapping module 62 is used to determine the numerical range corresponding to each data in the array data to be processed; based on the numerical range corresponding to each data, the first mapping processing is performed on each data, so that the data belonging to the first numerical range remains unchanged, and the data greater than the first numerical range is mapped to the data in the first numerical range to obtain the target array data, and the weight of each data when performing the first mapping processing is determined to be the weight corresponding to each target data in the target array data.

[0107] The data processing device provided by the embodiment of the present application obtains target array data by performing a first mapping process on the array data to be processed, and determines the weight corresponding to each target data in the target array data during the first mapping process; wherein the numerical range to which the target data in the target array data belongs is smaller than the numerical range to which the data in the array data to be processed belongs; in this way, the numerical range of the array data to be processed can be effectively converged, so that the numerical range of the input data of the multiplication and accumulation operation process, that is, the target array data, is smaller, thereby reducing the computational power consumption of the array circuit; and the target data with a weight of 1 is subjected to a multiplication and accumulation operation process according to a first rule to obtain a first operation value; the first target data with a weight not being 1 is subjected to a multiplication and accumulation operation process according to a second rule of multiplying the same column by the same value to obtain a second operation value, so that the second operation value can be kept linear. The first operation value maintains the conversion accuracy, which on the one hand reduces the conversion accuracy loss of the overall operation value, and on the other hand, enables the second quantization value corresponding to the second operation value to be restored; then, the first operation value and the second operation value are respectively subjected to analog-to-digital conversion processing to obtain the first quantization value and the second quantization value; in this way, since the numerical range of the first operation value and the second operation value is small, the conversion accuracy and time of the analog-to-digital conversion circuit can be improved; then, based on the weight, the first quantization value and the second quantization value are subjected to a second mapping processing to obtain a third quantization value and a fourth quantization value, wherein the second mapping processing is the reverse mapping processing of the first mapping processing; in this way, the second quantization value corresponding to the second operation value is restored; then the third quantization value and the fourth quantization value are added to obtain the target output value; in this way, the output data is restored.

[0108] According to an embodiment of the present application, the present application also provides an electronic device and a readable storage medium.

[0109] FIG7 shows a schematic block diagram of an example electronic device 800 that can be used to implement an embodiment of the present application. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital processing, cellular phones, smart phones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely examples and are not intended to limit the implementation of the present application described and / or required herein.

[0110] As shown in Figure 7, the device 800 includes a computing unit 801, which can perform various appropriate actions and processes according to a computer program stored in a read-only memory (ROM) 802 or a computer program loaded from a storage unit 808 into a random access memory (RAM) 803. Various programs and data required for the operation of the device 800 can also be stored in the RAM 803. The computing unit 801, the ROM 802, and the RAM 803 are connected to each other via a bus 804. An input / output (I / O) interface 805 is also connected to the bus 804.

[0111] Various components in device 800 are connected to I / O interface 805, including an input unit 806, such as a keyboard and mouse; an output unit 807, such as various types of displays and speakers; a storage unit 808, such as a magnetic disk and optical disk; and a communication unit 809, such as a network card, a modem, a wireless communication transceiver, etc. Communication unit 809 allows device 800 to exchange information / data with other devices via a computer network such as the Internet and / or various telecommunication networks.

[0112] The computing unit 801 can be a variety of general and / or special processing components with processing and computing capabilities. Some examples of the computing unit 801 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various dedicated artificial intelligence (AI) computing chips, various computing units that run machine learning model algorithms, digital signal processors (DSPs), and any appropriate processors, controllers, microcontrollers, etc. The computing unit 801 performs the various methods and processes described above, such as the data processing method. For example, in some embodiments, the data processing method can be implemented as a computer software program that is tangibly contained in a machine-readable medium, such as a storage unit 808. In some embodiments, part or all of the computer program can be loaded and / or installed on the device 800 via the ROM 802 and / or the communication unit 809. When the computer program is loaded into the RAM 803 and executed by the computing unit 801, one or more steps of the data processing method described above can be performed. Alternatively, in other embodiments, the computing unit 801 can be configured to perform the data processing method by any other appropriate means (e.g., by means of firmware).

[0113] Various embodiments of the systems and techniques described herein can be implemented in digital electronic circuit systems, integrated circuit systems, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), system-on-chip systems (SOCs), programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments can include being implemented in one or more computer programs that are executable and / or interpreted on a programmable system that includes at least one programmable processor, which can be a special purpose or general purpose programmable processor that can receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device.

[0114] The program code for implementing the methods of the present application can be written in any combination of one or more programming languages. Such program code can be provided to a processor or controller of a general-purpose computer, a special-purpose computer, or other programmable data processing device, so that when the program code is executed by the processor or controller, the functions / operations specified in the flow charts and / or block diagrams are implemented. The program code can be executed entirely on the machine, partially on the machine, as a stand-alone software package, partially on the machine and partially on a remote machine, or entirely on a remote machine or server.

[0115] In the context of the present application, a machine-readable medium can be a tangible medium that can contain or store a program for use by an instruction execution system, device or equipment or used in combination with an instruction execution system, device or equipment. A machine-readable medium can be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium can include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared or semiconductor system, device or equipment, or any suitable combination of the foregoing. A more specific example of a machine-readable storage medium can include an electrical connection based on one or more lines, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0116] To provide interaction with a user, the systems and techniques described herein can be implemented on a computer having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and pointing device (e.g., a mouse or trackball) through which the user can provide input to the computer. Other types of devices can also be used to provide interaction with the user; for example, the feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including acoustic input, voice input, or tactile input).

[0117] The systems and techniques described herein can be implemented in a computing system that includes back-end components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes front-end components (e.g., a user computer having a graphical user interface or a web browser through which a user can interact with implementations of the systems and techniques described herein), or a computing system that includes any combination of such back-end components, middleware components, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include a local area network (LAN), a wide area network (WAN), and the Internet.

[0118] A computer system may include a client and a server. The client and server are generally remote from each other and typically interact through a communication network. The client-server relationship arises through computer programs running on the respective computers and having a client-server relationship with each other. The server may be a cloud server, a server in a distributed system, or a server integrated with a blockchain.

[0119] It should be understood that the various forms of the processes shown above can be used to reorder, add, or delete steps. For example, the steps described in this application can be performed in parallel, sequentially, or in a different order, as long as the desired results of the technical solutions disclosed in this application can be achieved. This is not a limitation herein.

[0120] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features being referred to. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. Throughout the description of this application, "plurality" means two or more, unless otherwise specifically defined.

[0121] The above description is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this application should be included in the scope of protection of this application. Therefore, the scope of protection of this application should be based on the scope of protection of the claims.

Claims

1. A data processing method, characterized in that: include: Get the array data to be processed; Performing a first mapping process on the array data to be processed to obtain target array data, and determining a weight corresponding to each target data in the target array data during the first mapping process; wherein the numerical range of the target data in the target array data is smaller than the numerical range of the data in the array data to be processed; The target data with a weight of 1 is subjected to a multiplication-accumulation operation according to a first rule to obtain a first operation value; the target data with a weight not of 1 is subjected to a multiplication-accumulation operation according to a second rule of multiplying the same column by the same value to obtain a second operation value; Performing analog-to-digital conversion on the first operation value and the second operation value respectively to obtain a first quantized value and a second quantized value; Based on the weight, performing a second mapping process on the first quantized value and the second quantized value to obtain a third quantized value and a fourth quantized value, wherein the second mapping process is a reverse mapping process of the first mapping process; The third quantized value and the fourth quantized value are added to obtain a target output value.

2. The data processing method according to claim 1, characterized in that: Performing a first mapping process on the array data to be processed to obtain target array data, and determining a weight corresponding to each target data in the target array data during the first mapping process, wherein a numerical range of the target data in the target array data is smaller than a numerical range of the data in the array data to be processed, comprises: Determine the numerical range corresponding to each data in the array data to be processed; Based on the numerical range corresponding to each data, a first mapping process is performed on each data, so that the data belonging to the first numerical range remains unchanged, and the data larger than the first numerical range is mapped to the data in the first numerical range, to obtain the target array data, and the weight of each data when the first mapping process is performed is determined as the weight corresponding to each target data in the target array data when the first mapping process is performed. Heavy.

3. The data processing method according to claim 2, characterized in that: Based on the numerical range corresponding to each data, a first mapping process is performed on each data, so that data smaller than the first numerical range remains unchanged, and data larger than the first numerical range is mapped to data in a first array range, to obtain target array data, and a weight of each data when the first mapping process is performed is determined as a weight corresponding to each target data in the target array data when the first mapping process is performed, including: If the data belongs to the first numerical range, it is determined that the data remains unchanged when the first mapping process is performed on the data, and the weight corresponding to the target data obtained after the first mapping process is performed on the data is 1; If the data belongs to the second numerical range, it is determined that the data is reduced by a first preset multiple when the first mapping process is performed on the data, and the weight corresponding to the target data obtained after the first mapping process is performed on the data is the first preset multiple; the second numerical range is greater than the first numerical range; If the data belongs to the third numerical range, it is determined that the data is reduced by the second preset multiple when the first mapping processing is performed on the data, and the weight corresponding to the target data obtained after the first mapping processing on the data is the second preset multiple; the third numerical range is larger than the second numerical range, and the second preset multiple is larger than the first preset multiple.

4. The data processing method according to claim 1, characterized in that: Performing analog-to-digital conversion processing on the first operation value and the second operation value respectively to obtain a first quantized value and a second quantized value, including: Calculate the difference between the first operation value and the second operation value and a reference value respectively by using an analog-to-digital converter; If the absolute value of the difference is less than the threshold, sampling the analog signals output by the analog-to-digital converter at different bits in a sampling order from low bits to high bits; A first quantization value is determined based on a bit value of the analog-to-digital converter corresponding to an analog signal matching the first operation value, and a second quantization value is determined based on a bit value of the analog-to-digital converter corresponding to an analog signal matching the second operation value.

5. The data processing method according to claim 4, characterized in that: Calculating the difference between the second operation value and the reference value by an analog-to-digital converter includes: Based on the weight of the target data corresponding to the second operation value, determining a correction value corresponding to the second operation value through an analog-to-digital converter; Calculating a second difference between the second operation value and the correction value; The difference between the second difference and the reference value is used as the difference between the second calculated value and the reference value.

6. The data processing method according to claim 1, characterized in that: Based on the weight, performing a second mapping process on the first quantized value and the second quantized value to obtain a third quantized value and a fourth quantized value, wherein the second mapping process is a reverse mapping process of the first mapping process, including: Multiplying the weight of the target data corresponding to the first quantized value by the first quantized value to obtain a third quantized value; The weight of the target data corresponding to the second quantization value is multiplied by the second quantization value to obtain the fourth quantization value.

7. A data processing device, characterized in that: include: The acquisition module is used to obtain the array data to be processed; A first mapping module, used to perform a first mapping process on the array data to be processed to obtain target array data, and determine a weight corresponding to each target data in the target array data during the first mapping process; wherein the numerical range of the target data in the target array data is smaller than the numerical range of the data in the array data to be processed; An operation module, configured to perform a multiplication and accumulation operation on the target data with a weight of 1 according to a first rule to obtain a first operation value; and perform a multiplication and accumulation operation on the first target data with a weight not of 1 according to a second rule of multiplying the same column by the same value to obtain a second operation value; an analog-to-digital conversion module, configured to perform analog-to-digital conversion processing on the first operation value and the second operation value respectively to obtain a first quantized value and a second quantized value; a second mapping module, configured to map the first quantized value and the second quantized value based on the weight; The quantized values ​​are subjected to a second mapping process to obtain a third quantized value and a fourth quantized value, wherein the second mapping process is a reverse mapping process of the first mapping process; The adding module is used to add the third quantized value and the fourth quantized value to obtain a target output value.

8. The data processing device according to claim 7, characterized in that: The first mapping module is used to determine the numerical range corresponding to each data in the array data to be processed; Based on the numerical range corresponding to each data, a first mapping process is performed on each data, so that the data belonging to the first numerical range remains unchanged, and the data larger than the first numerical range is mapped to the data in the first numerical range, to obtain the target array data, and the weight of each data when the first mapping process is performed is determined as the weight corresponding to each target data in the target array data during the first mapping process.

9. An electronic device, characterized in that: include: at least one processor; And a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor executes the data processing method as described in any one of claims 1-6.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a computer to execute the data processing method according to any one of claims 1 to 6.

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