Direct-current conversion circuit

Abstract

The present application provides a direct-current conversion circuit, comprising a conversion circuit and a control circuit. The control circuit comprises a plurality of modulation circuits, compensation circuits, and control signal generation circuits. The conversion circuit generates a plurality of inductive currents by using a plurality of sets of control signals, and obtains an output signal on the basis of the plurality of inductive currents. On the basis of control deviation between the voltage of the output signal and a reference voltage, as well as a corresponding conversion current, each modulation circuit generates a modulation parameter, the conversion current being a sampling value of an inductive current. On the basis of the mean current value of a plurality of conversion currents and a corresponding conversion current, each compensation circuit generates a compensation parameter, and uses the compensation parameter to compensate for a corresponding modulation parameter so as to obtain a compensated modulation parameter. On the basis of a corresponding carrier signal among a plurality of carrier signals and a corresponding compensated modulation parameter, each control signal generation circuit generates a set of control signals, thus obtaining a plurality of sets of control signals, any two adjacent carrier signals having the same phase difference.

Description

A DC conversion circuit

[0001] Related applications

[0002] This application claims priority to Chinese patent application No. 202311183520.6 filed on September 13, 2023, the entire contents of which are incorporated by reference into this application. Technical Field

[0003] The present application relates to, but is not limited to, the field of current control technology, and in particular to a DC conversion circuit. Background Art

[0004] Three-phase interleaved parallel DC converters are widely used due to their compact size, high power density, low output current ripple, and high power quality. In existing technologies, the output voltage is adjusted by controlling the duty cycle of the switching transistors in a three-phase interleaved parallel DC converter. Its control circuits are divided into current-mode control circuits and voltage-mode control circuits, with the current-mode control circuit further divided into peak current control circuits and average current control circuits. The three-phase interleaved parallel DC converter and its control circuit form a DC conversion circuit.

[0005] When a peak current control circuit is used to control the switch tube of a three-phase interleaved parallel DC converter, harmonic oscillations will be generated due to the current imbalance problem caused by inconsistent amplitude ranges of the three-phase inductor currents in the three-phase interleaved parallel DC converter.

[0006] Summary of the Invention

[0007] The embodiments of the present application provide a DC conversion circuit that can solve the problem of unbalanced three-phase current in a three-phase staggered parallel DC converter and suppress the generation of harmonics.

[0008] An embodiment of the present application provides a DC conversion circuit, comprising: a conversion circuit and a control circuit; the control circuit comprises a plurality of modulation circuits, a plurality of compensation circuits and a plurality of control signal generating circuits; wherein the conversion circuit is used to generate a plurality of inductor currents using the plurality of control signals and a power supply; an output signal is obtained based on the plurality of inductor currents and an output load; each of the modulation circuits is used to generate a modulation parameter based on a control deviation between a voltage of the output signal and a reference voltage, and a corresponding conversion current; wherein the conversion current is a sampled value of the inductor current; each of the compensation circuits is used to generate a compensation parameter based on a current average of the plurality of conversion currents and a corresponding conversion current; the compensation parameter is compensated to the corresponding modulation parameter to obtain a compensated modulation parameter; each of the control signal generating circuits is used to generate a group of control signals based on a corresponding carrier signal in the plurality of carrier signals and the corresponding compensation modulation parameter to obtain a plurality of groups of control signals; the phase difference between two adjacent carrier signals in the plurality of carrier signals is the same.

[0009] In some embodiments, the modulation circuit includes: a first subtraction circuit, used to use the control deviation to subtract the corresponding conversion current to obtain a first current deviation value; a first proportional-integral regulator, used to perform proportional-integral regulation on the first current deviation value to generate the modulation parameter.

[0010] In some embodiments, the compensation circuit includes: a second subtraction circuit, used to subtract the corresponding conversion current from the current mean to obtain a second current deviation value; a coefficient operation circuit, used to multiply the second current deviation value by a preset coefficient to obtain an adjustment compensation parameter as the compensation parameter; the numerical range of the compensation parameter is the same as the amplitude range of the carrier signal; a first adder, which compensates the modulation parameter based on the compensation parameter to obtain the compensated modulation parameter.

[0011] In some embodiments, the compensation circuit further includes: a limiting circuit, configured to adjust the value of the adjustment compensation parameter to obtain the compensation parameter.

[0012] In some embodiments, the control circuit includes: a third subtraction circuit, used to subtract the reference voltage from the voltage of the output signal to obtain a voltage deviation value; a second proportional-integral regulator, used to perform proportional-integral regulation on the voltage deviation value to obtain the control deviation.

[0013] In some embodiments, the control circuit includes: a second adding circuit for adding the multiple conversion currents to obtain a total current; and a proportional operation circuit for dividing the total current by the number of the multiple conversion currents to obtain the current mean.

[0014] In some embodiments, the conversion circuit includes: a power supply, a bridge arm unit and an output load; the bridge arm unit includes a multi-phase interleaved parallel bridge arm module; each phase of the bridge arm module includes: a resistor, an inductor, a first switch tube and a second switch tube; wherein, the first end of the resistor is connected to the positive electrode of the power supply, the second end of the resistor is connected to the first end of the inductor, and the second end of the inductor is connected to the drain of the first switch tube and the source of the second switch tube; the source of the first switch tube is connected to the negative electrode of the power supply and the first end of the output load; the drain of the second switch tube is connected to the second end of the output load.

[0015] In some embodiments, the control signal generating circuit includes: a comparator circuit; a first output end of the comparator circuit is connected to the gate of the first switching tube in the corresponding single-phase bridge arm module, and a second output end of the comparator circuit is connected to the gate of the second switching tube in the corresponding bridge arm module; the comparator circuit is used to compare the corresponding carrier signal and the corresponding compensation modulation parameter, output the first control signal through the first output end, and output the second control signal through the second output end; the first control signal and the second control signal have opposite phases; the first control signal and the second control signal are a group of the control signals.

[0016] In some embodiments, the DC conversion circuit further includes: a sampling and holding circuit; the control signal generating circuit further includes a trigger signal generating circuit; the trigger signal generating circuit is used to generate a trigger signal according to the extreme value of the corresponding carrier signal in each cycle; the sampling and holding circuit is used to sample the multiple inductor currents generated by the multi-phase bridge arm module based on the trigger signals generated by the multiple trigger signal generating circuits to obtain the multi-channel conversion current; the multiple trigger signals and the multiple inductor currents correspond one to one.

[0017] In some embodiments, the conversion circuit includes: a first capacitor; the first capacitor is connected in parallel with the output load; and the first capacitor is used to filter the output signal.

[0018] In some embodiments, the control circuit includes: a slope compensation circuit, which is used to compensate the compensation slope into the first modulation circuit among the multiple modulation circuits based on the slope compensation method; the current value of the conversion current corresponding to the first modulation circuit is within a first current range; the current value of the conversion current corresponding to the second modulation circuit among the multiple modulation circuits is within a second current range; the second modulation circuit is another modulation circuit other than the first modulation circuit among the multiple modulation circuits; the first current range is different from the second current range.

[0019] A DC conversion circuit provided in an embodiment of the present application includes a conversion circuit and a control circuit; the control circuit includes multiple modulation circuits, multiple compensation circuits, and multiple control signal generating circuits; the conversion circuit is used to generate multiple conversion currents using multiple groups of control signals and power supplies, and obtain output signals based on the multiple conversion currents and output loads; the modulation circuit is used to generate a modulation parameter based on a control deviation between the voltage of the output signal and a reference voltage, and the corresponding conversion current; the compensation circuit is used to generate a compensation parameter based on the current average of the multiple conversion currents and the corresponding conversion current; the compensation parameter is compensated to the corresponding modulation parameter to obtain a compensated modulation parameter; the control signal generating circuit is used to generate a group of control signals based on a corresponding carrier signal in the multiple carrier signals and the corresponding compensation modulation parameter to obtain multiple groups of control signals; the phase difference between adjacent two carrier signals in the multiple carrier signals is the same, because the control signal generated by the control circuit is obtained by the modulation compensation parameter obtained by compensating the modulation parameter based on the compensation parameter and the multiple carrier signals, therefore, the multi-phase conversion currents generated by the conversion circuit controlled by the control signal are balanced, thereby suppressing the generation of harmonics in the DC conversion circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] FIG1a is a waveform simulation diagram of three-phase inductor currents of a three-phase interleaved parallel DC conversion circuit in the prior art;

[0021] FIG1b is a waveform simulation diagram of the total current of a three-phase interleaved parallel DC conversion circuit in the prior art;

[0022] FIG1c is a waveform simulation diagram of the voltage of a three-phase interleaved parallel DC conversion circuit in the prior art;

[0023] FIG2 is a schematic structural diagram of a DC conversion circuit provided in an embodiment of the present application;

[0024] FIG3 is a schematic structural diagram of a DC conversion circuit provided in an embodiment of the present application;

[0025] FIG4 is a schematic structural diagram of a DC conversion circuit provided in an embodiment of the present application;

[0026] FIG5 is a schematic structural diagram of a DC conversion circuit provided in an embodiment of the present application;

[0027] FIG6 is a schematic structural diagram of a DC conversion circuit provided in an embodiment of the present application;

[0028] FIG7 is a schematic structural diagram of a DC conversion circuit provided in an embodiment of the present application;

[0029] FIG8 is a schematic structural diagram of a conversion circuit of a DC conversion circuit provided in an embodiment of the present application;

[0030] FIG9 is a schematic structural diagram of a conversion circuit of a DC conversion circuit provided in an embodiment of the present application;

[0031] FIG10 is a schematic structural diagram of a conversion circuit of a DC conversion circuit provided in an embodiment of the present application;

[0032] FIG11 is a schematic structural diagram of a DC conversion circuit provided in an embodiment of the present application;

[0033] FIG12 is a schematic structural diagram of a DC conversion circuit provided in an embodiment of the present application;

[0034] FIG13 is a schematic structural diagram of a control circuit portion of a DC conversion circuit provided in an embodiment of the present application;

[0035] FIG14a is a waveform simulation diagram of a three-phase inductor current of a DC conversion circuit provided in an embodiment of the present application;

[0036] FIG14b is a waveform simulation diagram of the total current of a DC conversion circuit provided in an embodiment of the present application;

[0037] FIG14c is a waveform simulation diagram of a voltage of a DC conversion circuit provided in an embodiment of the present application. DETAILED DESCRIPTION

[0038] In order to make the purpose, technical solutions and advantages of this application clearer, the application will be further described in detail below with reference to the accompanying drawings. The described embodiments should not be regarded as limiting this application. All other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.

[0039] In the following description, reference is made to “some embodiments”, which describes a subset of all possible embodiments, but it will be understood that “some embodiments” may be the same subset or different subsets of all possible embodiments and may be combined with each other without conflict.

[0040] In the following description, the terms "first\second\third" involved are merely used to distinguish similar objects and do not represent a specific ordering of the objects. It can be understood that "first\second\third" can be interchanged with a specific order or sequence where permitted, so that the embodiments of the present application described in this embodiment can be implemented in an order other than that illustrated or described in this embodiment.

[0041] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the art to which this application pertains. The terms used herein are for the purpose of describing the embodiments of this application only and are not intended to limit this application.

[0042] A three-phase interleaved parallel DC converter circuit consists of a three-phase interleaved parallel DC converter and its control circuit. Three inductor currents exist in the three-phase interleaved parallel DC converter circuit: the first-phase inductor current, the second-phase inductor current, and the third-phase inductor current. Without a current-sharing module in this circuit, the amplitudes of the three-phase inductor currents would fall within different ranges. As shown in Figure 1a, the amplitude of the third-phase inductor current ranges from approximately 100 to 400 A, while the amplitudes of the first-phase and second-phase inductor currents range from approximately 140 to 550 A. Clearly, the amplitude range of the third-phase inductor current differs from the amplitude ranges of the first-phase and second-phase inductor currents. Furthermore, as shown in Figure 1a, the waveforms of the third-phase inductor current and the other two-phase inductor currents differ significantly: the waveforms of the first-phase and second-phase inductor currents are stable triangular waves, while the waveform of the third-phase inductor current is not triangular. This indicates that harmonic oscillations are occurring in the third phase of the three-phase interleaved parallel DC converter circuit. In the prior art, if the three-phase currents in a three-phase interleaved parallel DC converter circuit are unbalanced, harmonic oscillations will occur. The period of the three-phase inductor current is approximately 20μs. Ideally, in a three-phase interleaved parallel DC converter circuit, the total current period should be 1 / 3 of the three-phase inductor current period.

[0043] Figure 1b shows a simulated waveform of the total current obtained by superimposing the three-phase inductor currents in Figure 1a. It can be seen that the period of the total current in Figure 1b is approximately 20 μs, which means that the period of the total current is not 1 / 3 of the period of the three-phase inductor currents. Therefore, the period of the total current in the three-phase interleaved parallel DC-DC converter circuit that exhibits harmonic oscillation is not 1 / 3 of the period of the three-phase inductor currents.

[0044] Figure 1c shows the simulated voltage waveform corresponding to Figure 1a. The voltage period is approximately 20 μs, which means that the voltage period is not 1 / 3 of the three-phase inductor current period. Therefore, in the three-phase interleaved parallel DC-DC converter circuit where harmonic oscillation occurs, the voltage period is not 1 / 3 of the three-phase inductor current period.

[0045] In order to solve the problem of harmonic oscillation existing in the multi-phase interleaved parallel DC conversion circuit in the prior art, the present application provides a DC conversion circuit, which mainly reduces the probability of harmonic oscillation by achieving the balance of multi-phase inductive current.

[0046] FIG2 is a schematic diagram of the structure of a DC conversion circuit provided by an embodiment of the present application. Here, any modulation circuit is denoted as 201-i, any compensation circuit is denoted as 202-i, and any control signal generating circuit is denoted as 203-i; wherein i and N are both integers, 1≤i≤N, N≥2. As shown in FIG2 , the DC conversion circuit includes a control circuit 20 and a conversion circuit 21; the control circuit 20 includes a plurality of modulation circuits 201-1 to 201-N, a plurality of compensation circuits 202-1 to 202-N and a plurality of control signal generating circuits 203-1 to 203-N; the conversion circuit 21 is used to generate a plurality of inductor currents using a plurality of groups of control signals and power supplies, and obtain output signals based on the multi-channel inductor currents and the output load; each modulation circuit 201-i is used to control the deviation between the voltage of the output signal and the reference voltage, and the corresponding conversion circuit. flow, generating a modulation parameter; wherein the conversion current is a sampled value of the inductor current; each compensation circuit 202-i is used to generate a compensation parameter based on the current average of the multiple conversion currents and the corresponding conversion current; then, the compensation parameter is compensated to the corresponding modulation parameter to obtain the compensated modulation parameter; each control signal generating circuit 203-i is used to generate a group of control signals based on the corresponding carrier signal in the multiple carrier signals and the corresponding compensation modulation parameter to obtain multiple groups of control signals; the phase difference between two adjacent carrier signals in the multiple carrier signals is the same.

[0047] In the embodiment of the present application, the number of paths of the inductor current generated by the conversion circuit 21 is the same as the number of groups of control signals generated by the control circuit 20 .

[0048] It should be noted that the reference voltage is the ideal voltage of the output load of the conversion circuit 21, and the reference voltage can be adjusted according to user needs; the voltage of the output signal refers to the actual voltage of the output load. The control deviation is generated based on the difference between the reference voltage and the voltage of the output signal. In one embodiment, the power supply voltage of the conversion circuit 21 is 120V, and the ideal voltage of the output load set by the user is 340V. At this time, the multiple sets of control signals generated by the control circuit 20 are intended to boost the lower power supply voltage value of 120V of the conversion circuit 21 to the higher voltage value of 340V of the output load; however, in actual operation, the actual voltage of the output load of the conversion circuit 21 may only reach 200V. In other words, there is a voltage difference of 140V between the reference voltage and the voltage of the output signal; at this time, a corresponding control deviation is generated based on the voltage difference of 140V.

[0049] The multi-channel conversion current is obtained by sampling the multi-channel inductor current in the conversion circuit 21; the current mean of the multi-channel conversion current refers to the average value of the multi-channel conversion current. After sampling, the multi-channel inductor current generated by the conversion circuit 21 is fed back to the control circuit 20. The modulation circuit 201-i in the control circuit 20 generates multiple modulation parameters based on the multi-channel conversion current and the control deviation. The compensation circuit 202-i in the control circuit 20 generates multiple compensation parameters based on the multi-channel conversion current and the current mean, and then compensates the multiple compensation parameters accordingly to the multiple modulation parameters to generate multiple compensated modulation parameters.

[0050] The multi-channel carrier signal is generally a multi-channel triangular carrier signal, wherein the phase difference between adjacent two carrier signals in the multi-channel triangular carrier signal is the same. In one embodiment, the multi-channel carrier signal is a three-channel triangular carrier signal, wherein the three carrier signals are 120 degrees out of phase with each other, i.e., the phase difference between adjacent two triangular carrier signals is 120 degrees. In one embodiment, the multi-channel carrier signal is a multi-channel unit triangular carrier signal, wherein a unit triangular carrier signal is a triangular carrier signal with an amplitude of 1.

[0051] Each control signal generating circuit 203 - i generates a set of control signals based on the corresponding compensation modulation parameters and the corresponding carrier signal, and multiple control signal generating circuits 203 - i generate multiple sets of control signals; wherein the generated multiple sets of control signals are used to control the conversion circuit 21.

[0052] The compensation parameters compensate the corresponding modulation parameters so that the value range of the generated compensation modulation parameters is within the amplitude range of the carrier signal, and the value ranges of multiple compensation modulation parameters are close to each other. This ensures that the amplitude ranges of the multiple inductor currents generated by the multiple control signals in the DC converter circuit fall within the same range, resulting in balanced three-phase inductor currents.

[0053] In one embodiment, N can be 3. In this case, the control circuit 20 includes three modulation circuits, three compensation circuits, and three control signal generation circuits. Accordingly, the conversion circuit 21 uses three sets of control signals and a power supply to generate three inductor currents, and then obtains output signals based on the three inductor currents and the output load. Correspondingly, there are three carrier signals, generating three sets of control signals.

[0054] A DC conversion circuit provided in an embodiment of the present application includes a conversion circuit and a control circuit; the control circuit includes multiple modulation circuits, multiple compensation circuits, and multiple control signal generating circuits; the conversion circuit is used to generate multiple inductor currents using multiple sets of control signals and power supplies, and obtain output signals based on the multiple inductor currents and output loads; the modulation circuit is used to generate a modulation parameter based on a control deviation between the voltage of the output signal and a reference voltage, and a corresponding conversion current, wherein the conversion current is a sampled value of the inductor current; the compensation circuit is used to generate a compensation parameter based on the current average of the multiple conversion currents and the corresponding conversion current. ; Compensating the compensation parameter to the corresponding modulation parameter to obtain the compensation modulation parameter; a control signal generating circuit is used to generate a set of control signals based on a corresponding carrier signal in the multi-channel carrier signal and the corresponding compensation modulation parameter to obtain multiple sets of control signals; the phase difference between two adjacent carrier signals in the multi-channel carrier signal is the same. Since the control signal of the conversion circuit is generated by the compensation modulation parameter and the carrier signal, and the compensation modulation parameter is obtained by compensating the compensation parameter to the modulation parameter, therefore, the conversion circuit is controlled by the control signal, which will balance the generated multi-channel inductor currents and reduce the probability of harmonic oscillation in the DC conversion circuit.

[0055] FIG3 is a DC conversion circuit provided by an embodiment of the present application. Here, any first subtraction circuit is denoted as 30 - i , and any first proportional-integral regulator is denoted as 31 - i .

[0056] As shown in Figure 3, the modulation circuit 201-i includes: a first subtraction circuit 30-i, which is used to use the control deviation to subtract the corresponding conversion current to obtain a first current deviation value; a first proportional integral regulator 31-i, which is used to perform proportional integral regulation on the first current deviation value to obtain a modulation parameter.

[0057] In the embodiment of the present application, the first proportional-integral regulator 31 - i adjusts the first current deviation value input to itself to 0 through proportional-integral regulation, thereby outputting a modulation parameter.

[0058] Modulation circuit 201-i is also referred to as a current inner-loop circuit. The output of the current inner-loop circuit is the modulation parameter, which is only relevant to the corresponding conversion current path and is independent of the conversion current paths of the other paths. Therefore, deviations between the multiple conversion current paths are reflected in the multiple modulation parameters. If these modulation parameters are directly used to generate control signals, the resulting multiple sets of control signals will differ significantly. Using these significantly different control signals to control conversion circuit 21 will result in unbalanced currents in the multi-phase inductors of the DC converter circuit, further causing harmonic oscillations in the DC converter circuit.

[0059] In the embodiment of the present application, there are multiple current inner loop circuits, and the current inner loop circuits correspond to the conversion currents.

[0060] FIG4 is a DC conversion circuit provided by an embodiment of the present application. Here, any second subtraction operation circuit is denoted as 40 - i , any coefficient operation circuit is denoted as 41 - i , and any first addition operation circuit is denoted as 42 - i .

[0061] As shown in Figure 4, the compensation circuit 202-i in the DC conversion circuit includes: a second subtraction operation circuit 40-i, which is used to subtract the corresponding conversion current from the current average to obtain a second current deviation value; a coefficient operation circuit 41-i, which is used to multiply the second current deviation value by a preset coefficient to obtain an adjustment compensation parameter as a compensation parameter; the numerical range of the compensation parameter is the same as the amplitude range of the carrier signal; and a first addition operation circuit 42-i, which compensates the modulation parameter based on the compensation parameter to obtain a compensated modulation parameter.

[0062] In the embodiment of the present application, the coefficient operation circuit 42 - i can be implemented by a proportional-integral regulator. In this case, the proportional-integral regulator only performs proportional regulation and does not perform integral regulation.

[0063] It should be noted that the value range of the compensation parameter is the same as the amplitude range of the carrier signal. In one embodiment, the amplitude range of the carrier signal is 0 to B, and the corresponding value range of the compensation parameter is -0.5B to +0.5B.

[0064] By compensating the compensation parameters to the modulation parameters, the numerical ranges of the multiple compensation modulation parameters obtained can be made as close as possible, and the differences between the multiple groups of control signals obtained by the multiple compensation modulation parameters and the multi-channel carrier signals will be reduced. In this way, using the multiple groups of control signals obtained to control the conversion circuit will balance the multi-phase inductor currents in the DC conversion circuit and reduce the probability of harmonic oscillations in the DC conversion circuit.

[0065] FIG5 is a DC conversion circuit provided by an embodiment of the present application. Here, any limiting circuit is denoted as 43 - i.

[0066] In order to ensure that the compensation parameters obtained by the compensation circuit 202-i can play a good compensation role, as shown in Figure 5, the compensation circuit 202-i in the DC conversion circuit also includes a limiting circuit 43-i, wherein the limiting circuit 43-i is located between the coefficient operation circuit 41-i and the first addition operation circuit 42-i, and is used to adjust the value of the compensation parameter to obtain the compensation parameter.

[0067] The function of the amplitude limiting circuit 43-i is to adjust and limit the numerical range of the compensation parameter. In some embodiments, after the adjusted compensation parameter obtained by the coefficient calculation circuit 42-i is used as the compensation parameter to compensate the modulation parameter, an extreme situation may occur where the numerical range of the compensation modulation parameter is outside the amplitude range of the carrier signal. This extreme situation can directly cause errors in the entire DC conversion circuit. The amplitude limiting circuit 43-i in the compensation circuit 202-i reduces the probability of this extreme situation, thereby improving the stability of the entire conversion circuit.

[0068] An embodiment of the present application provides a DC conversion circuit as shown in Figure 6, wherein the DC conversion circuit further includes: a third subtraction circuit 50, used to subtract the reference voltage from the voltage of the output signal to obtain a voltage deviation value; and a second proportional-integral regulator 51, used to perform proportional-integral regulation on the voltage deviation value to obtain a control deviation.

[0069] The resulting control deviation is input into multiple modulation circuits 201-i, contributing to the generation of multiple modulation parameters. The circuit consisting of the third subtraction circuit 50 and the second proportional-integral regulator 51 is also known as the voltage outer loop circuit. As shown in Figure 5, in this embodiment of the present application, there is only one voltage outer loop circuit; multiple current inner loop circuits share this voltage outer loop circuit.

[0070] Figure 7 is a DC conversion circuit provided in an embodiment of the present application, wherein the DC conversion circuit further includes: a second addition circuit 60, used to add multiple conversion currents to obtain a total current; and a proportional operation circuit 61, used to divide the total current by the number of the multiple conversion currents to obtain the current mean.

[0071] In this embodiment of the present application, the obtained current mean is input into multiple compensation circuits 202-i to contribute to the generation of compensation parameters. The current mean is obtained by processing multiple conversion currents, which are obtained by sampling multiple inductor currents. In other words, the current mean is obtained by sampling and processing multiple inductor currents, rather than directly sampling and processing the total current of the conversion circuit 21. This eliminates the need to sample and filter the total current in the DC conversion circuit, simplifying signal processing.

[0072] The conversion circuit 21 is generally a multi-phase interleaved parallel DC converter. In some embodiments, the conversion circuit 21 is a three-phase interleaved parallel DC converter. In some embodiments, the conversion circuit 21 is a three-phase interleaved parallel boost DC converter.

[0073] FIG8 is a schematic structural diagram of a conversion circuit of a DC conversion circuit provided in an embodiment of the present application, which is specifically a schematic structural diagram of a three-phase staggered parallel boost DC converter.

[0074] As shown in Figure 8, the conversion circuit 21 includes: a power supply 210, a bridge arm unit 211 and an output load 212; wherein the bridge arm unit 211 includes a three-phase interleaved parallel bridge arm module, and each phase bridge arm module includes a resistor, an inductor, a first switch tube and a second switch tube. Specifically: the resistor R1, the inductor L1, the first switch tube V11 and the second switch tube V12 constitute the first phase bridge arm module, the resistor R2, the inductor L2, the first switch tube V21 and the second switch tube V22 constitute the second phase bridge arm module, and the resistor R3, the inductor L3, the first switch tube V31 and the second switch tube V32 constitute the third phase bridge arm module. Among them, the connection structure of each phase bridge arm module is as follows: the first end of the resistor is connected to the positive electrode of the power supply, the second end of the resistor is connected to the first end of the inductor, the second end of the inductor is connected to the drain of the first switching tube, the drain of the first switching tube is connected to the source of the second switching tube; the source of the first switching tube is connected to the negative electrode of the power supply and the first end of the output load; the drain of the second switching tube is connected to the second end of the output load.

[0075] The only difference between a multi-phase interleaved parallel DC converter and a three-phase interleaved parallel DC converter is the number of phases in the bridge arm modules. The component connections for a multi-phase interleaved parallel DC converter are identical to those for a three-phase interleaved parallel DC converter.

[0076] The operating principle of the three-phase interleaved parallel boost DC converter shown in Figure 8 is as follows: when the lower transistor (first switching transistor) of one phase bridge arm module is turned on, the upper transistor (second switching transistor) of the corresponding bridge arm module is turned off. Current flows from the power supply, sequentially through the resistor and inductor, then through the lower transistor and back to the negative terminal of the power supply. At this time, the power supply on the left side of the circuit charges the inductor. When the upper transistor turns on, the inductor discharges, and current flows through the upper transistor to charge the circuit on the right side. In this way, by adjusting the on-time of the upper and lower transistors, the charging and discharging time of the inductor can be controlled, thereby controlling the output voltage at the output load of the right circuit. The other two phases operate in staggered phases, thus generating three staggered inductor currents.

[0077] Figure 9 is a schematic diagram of the structure of a DC converter circuit according to an embodiment of the present application. As shown in Figure 9 , the converter circuit 21 further includes a first capacitor 213 connected in parallel with an output load 212. The first capacitor 213 is configured to filter the output signal of the output load. Furthermore, the first capacitor 213 can also serve as an energy storage device.

[0078] In some embodiments, the conversion circuit 21 further includes a resistor R. As shown in FIG10 , the resistor R and the first capacitor 213 are connected in series.

[0079] Figure 11 illustrates a DC conversion circuit provided in an embodiment of the present application. In this embodiment, conversion circuit 21 is a three-phase interleaved parallel boost DC converter. The DC conversion circuit is comprised of three-phase interleaved parallel boost DC converters and a corresponding control circuit. Any comparator circuit is denoted as 80-i.

[0080] As shown in Figure 11, the control signal generating circuit 203-i includes: a comparator circuit 80-i. It is used to compare the compensation modulation parameter input to itself with the corresponding carrier signal to generate a first control signal PWMi1 and a second control signal PWMi2. The first control signal PWMi1 and the second control signal PWMi2 are output to the conversion circuit 21 from the first output terminal and the second output terminal of the comparator circuit 80-i, respectively. The first control signal PWMi1 and the second control signal PWMi2 have opposite phases; the first control signal PWMi1 and the second control signal PWMi2 form a set of control signals. The first output terminal of the comparator circuit 80-i is connected to the gate of the first switch tube Vi1 in the corresponding single-phase bridge arm module, and the second output terminal of the comparator circuit 80-i is connected to the gate of the second switch tube Vi2 in the corresponding bridge arm module.

[0081] It should be noted that when the amplitude of the carrier signal is greater than the value of the compensation modulation parameter, the output value of the first output terminal of the comparator circuit 80-i is 1. When the amplitude of the carrier signal is less than the value of the compensation modulation parameter, the output value of the first output terminal of the comparator circuit 80-i is 0. Therefore, the first control signal is a pulse width modulation (PWM) wave. The output of the second output terminal of the comparator circuit 80-i is completely opposite to the output of the first terminal. That is, the phases of the first control signal PWMi1 and the second control signal PWMi2 are completely opposite. They form a set of control signals, respectively used to control the conduction and shutdown of the two switching transistors of a phase bridge arm module.

[0082] Figure 12 is a schematic diagram of the structure of a DC conversion circuit provided in an embodiment of the present application. In this embodiment, the conversion circuit 21 is a three-phase interleaved parallel boost DC converter. The DC conversion circuit is composed of three-phase interleaved parallel boost DC converters and corresponding control circuits. Here, any trigger signal generating circuit is denoted as 81-i.

[0083] As shown in Figure 12, the DC conversion circuit also includes: a sampling and holding circuit 90; the control signal generating circuit 203-i also includes: a trigger signal generating circuit 81-i; wherein the trigger signal generating circuit 81-i is used to generate a trigger signal according to the extreme value of the corresponding carrier signal in each cycle, and the three trigger signal generating circuits correspondingly generate three trigger signals SH1, SH2 and SH3; the sampling and holding circuit 90 is used to sample the three inductor currents generated by the multi-phase bridge arm module of the bridge arm unit 211 in the conversion circuit 21 based on the three trigger signals to obtain three conversion currents; wherein the three trigger signals and the three inductor currents correspond one to one.

[0084] The three conversion currents collected by the sample-and-hold circuits are input into the three modulation circuits 201 - i and the three compensation circuits 202 - i respectively.

[0085] It should be noted that when the conversion circuit 21 is a multi-phase interleaved parallel DC converter, the trigger signal generating circuit 81-i generates multiple trigger signals and samples the multi-path inductor currents generated by the multi-phase bridge arms to obtain multiple conversion currents; the multiple trigger signals and the multiple-path inductor currents correspond one to one.

[0086] In an embodiment of the present application, the period of the multi-channel inductor current is the same as the period of the carrier signal that generates the corresponding trigger signal. The time point for sampling the inductor current is determined according to the carrier signal, and the processing of the inductor current of the multi-phase bridge arm module is realized by sampling and holding once per cycle, which simplifies the signal processing work. The waveform of the conversion current sampled by the sampling and holding module is ideally a smooth line. And by comparing the magnitudes of the multi-channel conversion currents obtained by sampling, the one-phase bridge arm module that has harmonic oscillation can be quickly determined. If there is a conversion current that is significantly lower or higher than the conversion current of other channels, the bridge arm module corresponding to this conversion current has generated harmonic oscillation.

[0087] In an embodiment of the present application, the sampling and holding circuit obtains multi-channel conversion currents by sampling the inductor current generated by the multi-phase bridge arm module, further obtains the current average and participates in the calculation of the compensation parameters, rather than sampling the total current of the conversion circuit to obtain the total current and then further obtains the current average and participates in the calculation of the compensation parameters. In this way, a sampling resource and a signal processing resource are saved, and the current sharing effect of the entire DC conversion circuit is better.

[0088] In some embodiments, the DC conversion circuit further includes a slope compensation circuit. The slope compensation circuit is configured to apply a compensation slope to a first modulation circuit among the multiple modulation circuits based on a slope compensation method; the current value of the conversion current corresponding to the first modulation circuit is within a first current range; the current value of the conversion current corresponding to a second modulation circuit among the multiple modulation circuits is within a second current range; the second modulation circuit is a modulation circuit other than the first modulation circuit among the multiple modulation circuits; and the first current range is different from the second current range.

[0089] In an embodiment of the present application, a sample-and-hold circuit samples the inductor currents of the multi-phase bridge arms to obtain multiple conversion currents. The multiple conversion currents are then input into multiple modulation circuits in the control circuit to participate in the generation of modulation parameters. If the conversion current of one modulation circuit among the multiple modulation circuits is within a first current range, while the conversion currents of the other modulation circuits are within a second current range, and because the first current range is different from the second current range, the conversion current of the modulation circuit differs significantly from the conversion currents of the other modulation circuits, a compensation slope can be determined based on a slope compensation method, and the compensation slope can be applied to the modulation circuit, which is the first modulation circuit among the multiple modulation circuits.

[0090] In one embodiment, the first current range is 450~550A, and the second current range is 250~400A; the current value of one phase conversion current in the multi-phase conversion current is 510A, while the current values ​​of other phase conversion currents are in the range of 300A~360A; obviously, this phase conversion current value is significantly higher than the current values ​​of other phase conversion currents, and the modulation circuit corresponding to this phase conversion current is the first modulation circuit. The one-phase bridge arm module corresponding to the conversion current of the first modulation circuit generates harmonic oscillation. At this time, it is necessary to perform slope compensation on the first modulation circuit separately.

[0091] In one embodiment, the first current range is 350~450A, and the second current range is 600~750A; the current value of one phase conversion current in the multi-phase conversion current is 410A, while the current values ​​of other phase conversion currents are in the range of 620A~720A; obviously, this phase conversion current value is significantly lower than the current values ​​of other phase conversion currents, and the modulation circuit corresponding to this phase conversion current is the first modulation circuit. The one-phase bridge arm module corresponding to the conversion current of the first modulation circuit generates harmonic oscillation. At this time, it is necessary to perform slope compensation on the first modulation circuit separately.

[0092] Slope compensation is performed only on the first modulation circuit corresponding to the one-phase bridge arm module where harmonic oscillation occurs, so that the control circuit has a higher utilization rate of the control deviation generated by the voltage outer loop.

[0093] In some embodiments, the compensation slope can be used to compensate for the control deviation of the first modulation circuit or the first current deviation value of the first modulation circuit. The two compensation methods have the same effect. The compensation slope m is shown in formula (1). m=(V in -V o ) / L Formula (1)

[0094] Among them, V in is the power supply voltage of the conversion circuit, that is, the input voltage; V o is the actual voltage of the output load, that is, the voltage of the output signal, and L is the inductance value of the bridge arm module corresponding to the conversion current of the first modulation circuit.

[0095] FIG13 shows a DC conversion circuit according to an embodiment of the present application, wherein the DC conversion circuit is composed of a three-phase DC boost converter 21 connected in parallel, a corresponding control circuit 20 , and a sample-and-hold circuit 90 .

[0096] Among them, i1-samp represents the first conversion current obtained by sampling the first inductor current i1 generated by the first-phase bridge arm module, i2-samp represents the second conversion current obtained by sampling the second inductor current i2 generated by the second-phase bridge arm module, and i3-samp represents the third conversion current obtained by sampling the third inductor current i3 generated by the third-phase bridge arm module.

[0097] As shown in Figure 13, in the control circuit 20, the output signal voltage Uo and the reference voltage Uref of the three-phase interleaved parallel DC boost converters are input into a subtraction circuit to obtain a voltage deviation value. This voltage deviation value is then input into a proportional-integral regulator (PI) to obtain a control deviation. The control deviation is then input into the subtraction circuits of the three modulation circuits and subtracted from the three conversion currents i1-samp, i2-samp, and i3-samp, respectively, to obtain three first current deviation values. These three first current deviation values ​​are then input into the three proportional-integral regulators (PI) of the subsequent circuits to obtain three modulation parameters.

[0098] The three conversion currents i1-samp, i2-samp, and i3-samp are input into an addition circuit to obtain a total current. The total current is input into a proportional operation circuit and divided by the number of the three conversion currents, 3, to obtain a current mean. The current mean is input into three subtraction circuits and subtracted from the three conversion currents i1-samp, i2-samp, and i3-samp, respectively, to obtain three second current deviation values. The three second current deviation values ​​are respectively input into three coefficient operation circuits in the subsequent circuit and multiplied by a preset coefficient K to obtain three adjustment compensation parameters. The three adjustment compensation parameters are respectively input into three limiting circuits in the subsequent circuit. The three limiting circuits respectively adjust the three adjustment compensation parameters to obtain three compensation parameters. The three compensation parameters are respectively compensated to three modulation parameters through three subsequent addition circuits to generate three compensation modulation parameters. The three compensation modulation parameters are respectively: a first compensation modulation parameter, a second compensation modulation parameter, and a third compensation modulation parameter.

[0099] The three compensation modulation parameters correspond to three carrier signals. The phase difference between two adjacent carrier signals in the three carrier signals is the same. The first compensation modulation parameter and the first carrier signal are input into the comparator circuit COMP1 in the subsequent circuit to generate a first set of control signals; the second compensation modulation parameter and the second carrier signal are input into the comparator circuit COMP2 in the subsequent circuit to generate a second set of control signals; the third compensation modulation parameter and the third carrier signal are input into the comparator circuit COMP3 in the subsequent circuit to generate a third set of control signals. The first set of control signals includes the first control signal PWM11 and the second control signal PWM12; the second set of control signals includes the first control signal PWM21 and the second control signal PWM22; and the third set of control signals includes the first control signal PWM31 and the second control signal PWM32. The first control signal and the second control signal in each group have opposite phases.

[0100] These three sets of control signals are used to control the first and second switches of the three-phase bridge arm modules in the conversion circuit 21. Specifically, the first set of control signals controls the first and second switches V11 and V12 of the first-phase bridge arm module; the second set of control signals controls the first and second switches V21 and V22 of the second-phase bridge arm module; and the third set of control signals controls the first and second switches V31 and V32 of the third-phase bridge arm module. The conversion circuit 21 uses the power supply and the three sets of control signals to generate three inductor currents i1, i2, and i3. The conversion circuit 21 uses the three inductor currents and the output load Ro to generate an output signal, whose voltage is Uo.

[0101] The three conversion currents i1-samp, i2-samp, and i3-samp in control circuit 20 are obtained by sampling the three inductor currents i1, i2, and i3 via a sample-and-hold circuit. Specifically, the three control signal generating circuits of control circuit 20 include three trigger signal generating circuits S / H1, S / H2, and S / H3, respectively. These three trigger signal generating circuits generate trigger signals SH1, SH2, and SH3 based on the extreme values ​​of the corresponding carrier signal within each cycle. Based on the three trigger signals SH1, SH2, and SH3, the sample-and-hold circuit 90 samples the three inductor currents generated by the three-phase bridge arm modules of conversion circuit 21, respectively, to obtain the three conversion currents i1-samp, i2-samp, and i3-samp.

[0102] It should be noted that the three conversion currents i1 -samp, i2 -samp and i3 -samp are input into the control circuit 20 to participate in the generation of three sets of control signals.

[0103] Figure 14a is a waveform simulation diagram of the three-phase inductor current of a three-phase staggered parallel DC conversion circuit provided in an embodiment of the present application. As shown in Figure 14a, the three-phase inductor currents in the DC conversion circuit are all stable triangular waves, and the amplitude range of the three-phase inductor currents is all between -50 and 250A. In other words, the three-phase inductor currents in the embodiment of the present application are balanced, and the DC conversion circuit does not exhibit harmonic oscillation. The period of the three-phase inductor current is approximately 50 / 3μs.

[0104] Figure 14b is a simulated waveform diagram of the total current in a three-phase interleaved parallel DC converter circuit provided by an embodiment of the present application. The total current in Figure 11b is obtained by superimposing the three-phase inductor currents in Figure 14a. It can be seen that the period of the total current in Figure 14b is approximately 50 / 9μs; in other words, the period of the total current is 1 / 3 of the period of the three-phase inductor current. Therefore, it can be determined that this DC converter circuit does not experience harmonic oscillation.

[0105] Figure 14c is a simulated waveform diagram of the voltage of a three-phase interleaved parallel DC converter circuit provided in an embodiment of the present application. Figure 14c corresponds to Figure 14a. As shown in Figure 14c, the voltage period is approximately 50 / 9μs, that is, the voltage period is 1 / 3 of the period of the three-phase inductor current. Therefore, it can also be determined that the DC converter circuit does not experience harmonic oscillation.

[0106] The above description is merely an embodiment of the present application and is not intended to limit the scope of protection of the present application. Any modifications, equivalent replacements, and improvements made within the spirit and scope of the present application are included in the scope of protection of the present application.

Claims

1. A DC conversion circuit, wherein: The DC conversion circuit includes: a conversion circuit and a control circuit; the control circuit includes a plurality of modulation circuits, a plurality of compensation circuits and a plurality of control signal generating circuits; wherein, The conversion circuit is used to generate multiple inductor currents using multiple sets of control signals and power supplies; and obtain output signals based on the multiple inductor currents and output loads; Each of the modulation circuits is used to generate a modulation parameter based on a control deviation between the voltage of the output signal and a reference voltage, and a corresponding conversion current; wherein the conversion current is a sampled value of the inductor current; Each of the compensation circuits is used to generate a compensation parameter based on the current average of the multiple conversion currents and the corresponding conversion current; and to compensate the compensation parameter to the corresponding modulation parameter to obtain a compensated modulation parameter; Each of the control signal generating circuits is used to generate a set of control signals based on a corresponding carrier signal in the multi-channel carrier signal and the corresponding compensation modulation parameter to obtain multiple sets of control signals; the phase difference between two adjacent carrier signals in the multi-channel carrier signal is the same.

2. The DC conversion circuit according to claim 1, wherein: The modulation circuit comprises: A first subtraction circuit is used to subtract the corresponding conversion current from the control deviation to obtain a first current deviation value; The first proportional-integral regulator is used to perform proportional-integral regulation on the first current deviation value to generate the modulation parameter.

3. The DC conversion circuit according to claim 1, wherein: The compensation circuit comprises: A second subtraction circuit is used to subtract the corresponding conversion current from the current average value to obtain a second current deviation value; A coefficient operation circuit, used for multiplying the second current deviation value by a preset coefficient to obtain an adjustment compensation parameter as the compensation parameter; the value range of the compensation parameter is the same as the amplitude range of the carrier signal; The first adding circuit compensates the modulation parameter based on the compensation parameter to obtain the compensated modulation parameter.

4. The DC conversion circuit according to claim 3, wherein: The compensation circuit further includes: The limiting circuit is used to adjust the value of the adjustment compensation parameter to obtain the compensation parameter.

5. The DC conversion circuit according to claim 1, wherein: The DC conversion circuit also includes: a third subtraction circuit, configured to obtain a voltage deviation value by subtracting the voltage of the output signal from the reference voltage; The second proportional-integral regulator is used to perform proportional-integral regulation on the voltage deviation value to obtain the control deviation.

6. The DC conversion circuit according to claim 1, wherein: The DC conversion circuit also includes: A second adding circuit, used for adding the multiple converted currents to obtain a total current; The proportional operation circuit is used for dividing the total current by the number of the multi-channel conversion currents to obtain the current average value.

7. The DC conversion circuit according to claim 1, wherein: The conversion circuit comprises: a power supply, a bridge arm unit and an output load; the bridge arm unit comprises a multi-phase staggered parallel bridge arm module; The bridge arm module of each phase includes: a resistor, an inductor, a first switch tube and a second switch tube; Among them, the first end of the resistor is connected to the positive electrode of the power supply, the second end of the resistor is connected to the first end of the inductor, the second end of the inductor is connected to the drain of the first switch tube, and the drain of the first switch tube is connected to the source of the second switch tube; the source of the first switch tube is connected to the negative electrode of the power supply and the first end of the output load; the drain of the second switch tube is connected to the second end of the output load.

8. The DC conversion circuit according to claim 1, wherein: The control signal generating circuit comprises: a comparator circuit; a first output end of the comparator circuit is connected to the gate of the first switch tube in the corresponding one-phase bridge arm module, and a second output end of the comparator circuit is connected to the gate of the second switch tube in the corresponding bridge arm module; The comparator circuit is used to compare the corresponding carrier signal and the corresponding compensation modulation parameter, output a first control signal through the first output terminal, and output a second control signal through the second output terminal; the first control signal and the second control signal have opposite phases; the first control signal and the second control signal are a group of control signals.

9. The DC conversion circuit according to claim 7, wherein: The DC conversion circuit further includes: a sampling and holding circuit; the control signal generating circuit further includes a trigger signal generating circuit; The trigger signal generating circuit is used to generate a trigger signal according to the extreme value of the corresponding carrier signal in each cycle; The sampling and holding circuit is used to sample the multiple inductor currents generated by the multi-phase bridge arm module based on the trigger signals generated by the multiple trigger signal generating circuits to obtain the multiple conversion currents; the multiple trigger signals and the multiple inductor currents correspond one to one.

10. The DC conversion circuit according to claim 1, wherein: The conversion circuit comprises: a first capacitor; the first capacitor is connected in parallel with the output load; The first capacitor is used to filter the output signal.

11. The DC conversion circuit according to any one of claims 1 to 10, wherein: The control circuit comprises: A slope compensation circuit is used to compensate a compensation slope into a first modulation circuit among the multiple modulation circuits based on a slope compensation method; a current value of a conversion current corresponding to the first modulation circuit is within a first current range; a current value of a conversion current corresponding to a second modulation circuit among the multiple modulation circuits is within a second current range; the second modulation circuit is another modulation circuit among the multiple modulation circuits other than the first modulation circuit; the first current range is different from the second current range.

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