Resonant converter with parallel input half-bridges and method for controlling a resonant converter

Abstract

In order to specify a resonant converter (100) which also permits low-loss operation at operating points beyond its resonant points (fR), two half-bridges (HB1, HB2) switched in parallel to one another are each connected via a resonance choke (Lr1, Lr2) to a resonance node point (KP), and a bypass capacitor (C2) is switched between two port points of the half-bridges (HB1, HB2).

Description

[0001] Resonant converter with parallel input half-bridges and method for controlling a resonant converter

[0002] The present invention relates to an electrical resonant converter comprising an input stage having a first input terminal and a second input terminal for applying an electrical input voltage, an output stage having a first output terminal and a second output terminal for applying or outputting an electrical output voltage, and a resonant circuit defining at least one resonant frequency of the resonant converter for electrically coupling the input stage to the output stage. The input stage comprises a first half-bridge connected between the first and second input terminals and having an upper semiconductor switch and a lower semiconductor switch to generate a first transfer AC voltage. The resonant circuit comprises a first resonant circuit input connected to the first half-bridge between the upper and lower semiconductor switches of the first half-bridge.to receive the first transfer AC voltage and convert it into a resonant circuit output voltage output at a resonant circuit output, and wherein the output stage has an output stage input for receiving the resonant circuit output voltage and converting it into the output voltage. The invention also relates to a method for controlling a resonant converter.

[0003] Resonant converters accept an input voltage applied to an input of the resonant converter and convert it into an output voltage output at the output of the resonant converter. Both the input voltage and the output voltage can be either direct or alternating voltage. As is well known, in a resonant converter, during the conversion of an input voltage into an output voltage, a plurality of semiconductor switches are switched at a predetermined switching frequency—i.e., opened and closed again—in order to first convert the applied input voltage into an internal alternating voltage. The desired output voltage is then generated from the internal alternating voltage.

[0004] In a known manner, in resonant converters, a resonant circuit, usually provided between the input and output of the resonant converter, with at least one resonant frequency tuned to a switching frequency expected during operation of the resonant converter for switching the semiconductor switches, ensures that the semiconductor switches provided in the resonant converter can be switched (at least approximately) either current-free or voltage-free. A distinction is made between ZVS and ZCS resonant converters (ZVS: Zero Voltage Switching, ZCS: Zero Current Switching). An important reason for enabling (at least approximately) current-free or voltage-free switching is a phase shift of at least approximately 90 degrees between internal alternating voltages and internal currents, which typically occurs during operation at a resonance point.In this way, switching losses are reduced compared to other converter topologies, which in many cases enables particularly energy-efficient operation. Since the functionality of resonant converters is well known, e.g., from WO 2018 / 086806 A1, DE 10 2004 035 248 A1, or EP 2 795 781 B1, the basic principles of a resonant converter will not be discussed in detail here.

[0005] Due to the potential offered by resonant converters to reduce switching losses and thus save energy, while also protecting components, especially semiconductor switches, resonant converters have been and continue to be the subject of diverse current research activities. This is also reflected in the current state of the art.

[0006] For example, US 8,363,427 B2 teaches a bidirectional resonant converter in which the aim is to provide switching operation with as little loss as possible over a large load range by means of a full bridge provided in an input stage of the resonant converter.

[0007] US 2021 / 0099096 A1 also discloses a bidirectional resonant converter in which a full bridge is also provided in an input stage, wherein a high amplification in a reverse mode is realized by means of a suitable control method.

[0008] One problem that is inadequately addressed in the cited prior art, however, is changes in the operation of a resonant converter, which lead to deviations between the switching frequencies for switching the semiconductor switches in the resonant converter and the resonant frequencies of the resonant circuits of the resonant converter. However, such changes are often unavoidable in real operation. If a resonance point is left during operation, for example, because a load supplied by the resonant converter, a specified input voltage, or a required output voltage changes, this can lead to serious deteriorations in efficiency. The known prior art does not offer any approaches that would satisfactorily counteract efficiency deteriorations due to mismatches between the switching frequencies used and the given resonant frequencies.

[0009] It is therefore an object of the present invention to provide a resonant converter which is more robust in terms of its efficiency.

[0010] This object is achieved by the features of the independent claims. Specifically, the independent claims provide an electrical resonant converter comprising an input stage with a first input terminal and a second input terminal for applying an electrical input voltage, as well as an output stage with a first output terminal and a second output terminal for outputting an electrical output voltage, and a resonant circuit defining at least one resonant frequency of the resonant converter for electrically coupling the input stage to the output stage, wherein the input stage comprises a first half-bridge connected between the first and second input terminals, comprising an upper semiconductor switch and a lower semiconductor switch, in order to generate a first transfer AC voltage, wherein the resonant circuit has a first resonant circuit input,which is connected to the first half-bridge between the upper and lower semiconductor switches of the first half-bridge to receive the first transfer alternating voltage and to transfer it into a resonant circuit output voltage output at a resonant circuit output of the resonant circuit, and wherein the output stage has an output stage input to receive the resonant circuit output voltage and to transfer it into the output voltage.

[0011] According to the invention, for such a resonant converter, a second half-bridge connected in parallel to the first half-bridge with an upper semiconductor switch and a lower semiconductor switch is provided in the input stage in order to generate a second transmission alternating voltage.Likewise according to the invention, the resonant circuit has a second resonant circuit input which is connected to the second half-bridge between the upper and lower semiconductor switches of the second half-bridge in order to receive the second transfer alternating voltage, a relief capacitor is connected between the first resonant circuit input and the second resonant circuit input, and the first resonant circuit input and the second resonant circuit input are each connected via a resonant choke to a resonant node in the resonant circuit in order to transfer the first transfer alternating voltage and the second transfer alternating voltage via the resonant node into the resonant circuit output voltage output at the resonant circuit output.

[0012] Preferably, the upper semiconductor switches of the half-bridges provided in the input stage are directly connected to the first input pole, and the lower semiconductor switches are directly connected to the second input pole. This means that an electrically conductive connection exists between a first terminal of an upper semiconductor switch and the first input pole, in which no further electrical components are provided, and that, analogously, an electrically conductive connection exists between a second terminal of a lower semiconductor switch and the second input pole, in which no further electrical components are provided.

[0013] The second half-bridge provided according to the invention is further preferably a half-bridge that is symmetrical to the first half-bridge. Symmetrical is to be understood in this case as meaning that, starting from the connection to the first input pole, on the path to the second input pole, the same, i.e. identical, electrical circuit is implemented in the second half-bridge as in the first half-bridge. If the first half-bridge therefore has a first, upper semiconductor switch that is connected to the first input pole, and a second semiconductor switch that is connected on the one hand to the second input pole and on the other hand to a connection on the first semiconductor switch opposite the second input pole, then in the case of a symmetrical design the second half-bridge has the same arrangement of a first and a second semiconductor switch.The symmetrical design makes it possible, among other things, to generate identical current and voltage time profiles in both half-bridges. For example, if the upper semiconductor switch of the first half-bridge and the upper semiconductor switch of the second half-bridge are controlled identically, and if the lower semiconductor switch of the first half-bridge and the lower semiconductor switch of the second half-bridge are controlled identically, identical current and voltage profiles result in both half-bridges. If the respective semiconductor switches are controlled at different times, the current and voltage time profiles result that are offset in time but identical in their form (amplitude, frequency, periodicity, etc.).

[0014] As mentioned, the half-bridges according to the invention allow the generation of corresponding alternating transmission voltages. In this regard, it should be noted that, within the scope of the present invention, the currents arising in each half-bridge are in phase with the corresponding alternating transmission voltages of a corresponding half-bridge. This means that an alternating transmission voltage, for example, generated by the second half-bridge, is in phase with the alternating transmission current generated by the second half-bridge, i.e., the current flowing through the semiconductor switches of the second half-bridge. If, for example, additional capacitive or inductive components were provided in the half-bridges, a phase shift would occur between the alternating transmission voltage and the alternating transmission current, which would prevent phase equality.As explained later, it is of great advantage, particularly for the control and operation of a resonant converter according to the invention, that in-phase currents and voltages can be generated for each half-bridge.

[0015] With reference to the above statements regarding the phase equivalence of the alternating transmission voltage and the alternating transmission current of a half-bridge, it should also be noted that the snubber capacitor provided according to the invention between the first resonant circuit input and the second resonant circuit input advantageously does not cause a phase shift between the alternating transmission voltage and the alternating transmission current of a half-bridge. For this purpose, the snubber capacitor is preferably connected with a first terminal directly to the first resonant circuit input and with a second terminal directly to the second resonant circuit input.This means that a first terminal of the snubber capacitor is connected between the upper semiconductor switch and the lower semiconductor switch of the first half-bridge, and a second terminal of the snubber capacitor is connected between the upper semiconductor switch and the lower semiconductor switch of the second half-bridge. As explained above, a direct connection means an electrically conductive connection in which no electrical components are provided, i.e. no windings, no switches, no capacitors, except for a bare electrical conductor. In other words, the snubber capacitor according to the invention is not directly connected to either the first input pole or the second input pole. The topology according to the invention enables virtually loss-free operation in a simple and effective manner, even away from resonance points.This is made possible to a decisive extent by the resonant chokes, which prevent the currents flowing through the semiconductor switches provided in the half-bridges from increasing suddenly when the semiconductor switches are switched on, as well as by the discharge capacitor, through which a current driven by the resonant chokes due to their inductance can flow after the semiconductor switches have closed, so that no currents have to flow through closing semiconductor switches.

[0016] Advantageous topological embodiments of the resonant converter according to the invention are specified in the dependent claims 2 to 12.

[0017] Furthermore, the object is achieved by a method in which a second transfer alternating voltage is generated by controlling the upper semiconductor switch and the lower semiconductor switch of the second half-bridge connected in parallel to the first half-bridge, the resonant circuit receives the second transfer alternating voltage via the second resonant circuit input, which is connected to the second half-bridge between the upper and lower semiconductor switches of the second half-bridge, a relief capacitor is connected between the first resonant circuit input and the second resonant circuit input, and the first resonant circuit input and the second resonant circuit input are each connected to a resonant node in the resonant circuit via a resonant choke,to transfer the first transfer alternating voltage and the second transfer alternating voltage via the resonant node into the resonant circuit output voltage output at the resonant circuit output.

[0018] In a particularly advantageous manner, in a first control step, the upper semiconductor switches of both half-bridges can be closed simultaneously, then in a second control step, the upper semiconductor switch of the first half-bridge is opened first, then after a predetermined waiting period in a third control step, the upper semiconductor switch of the second half-bridge is opened, then in a fourth control step, the lower semiconductor switches of both half-bridges are closed simultaneously, then in a fifth control step, the lower semiconductor switch of the first half-bridge is opened first, then after a predetermined waiting period in a sixth control step, the lower semiconductor switch of the second half-bridge is opened, then in a seventh control step, the upper semiconductor switches of both half-bridges are closed simultaneously,then, in an eighth control step, the upper semiconductor switch of the second half-bridge is opened first, then, after a predetermined waiting period, in a ninth control step, the upper semiconductor switch of the first half-bridge is opened, then, in a tenth control step, the lower semiconductor switches of both half-bridges are closed simultaneously, then, in an eleventh control step, the lower semiconductor switch of the second half-bridge is opened first, and then, after a predetermined waiting period, in a twelfth control step, the lower semiconductor switch of the first half-bridge is opened.

[0019] This special form of control allows the opening and closing times of the semiconductor switches provided in the half-bridges of the resonant converter to be precisely matched to the intended components, taking into account in particular the time constants of the components crucial for the resonant converter according to the invention: resonant chokes and discharge capacitor. In particular, the described control sequence makes it possible to charge the discharge capacitor to the specified input voltage in each control cycle. In practical cases, this usually allows almost complete provision of the currents driven by the resonant chokes from the charge stored in the discharge capacitor. This means that only a negligible current flows through opening semiconductor switches, which significantly reduces switching losses even away from resonance points.

[0020] The present invention will be explained in more detail below with reference to Figures 1 to 5, which show exemplary, schematic and non-limiting advantageous embodiments of the invention.

[0021] Fig.1 a resonant converter according to the state of the art,

[0022] Fig.2 shows a resonance converter according to the invention,

[0023] Fig.3 shows a first possible embodiment of a resonance converter according to the invention,

[0024] Fig.4 shows a second possible embodiment of a resonant converter according to the invention,

[0025] Fig. 5a-e shows a sequence of control steps for controlling a resonant converter according to the invention. Fig. 1 shows a resonant converter (in this case an LLC converter) 10 according to the prior art, as is known in a comparable form, for example, from US Pat. No. 9,515,562 B2.

[0026] The resonant converter 10 shown in Fig.1 has an input stage I with a first input pole l+ and a second input pole L for applying an electrical input voltage u e and an output stage A with a first output terminal A+ and a second output terminal A. for outputting an electrical output voltage u a . In a manner well known from power electronics, the first input pole l+ and the second input pole I. form an input pole pair, between which the input voltage u e can be applied, and the first output pole A+ and the second output pole A. form an output pole pair A+, A-, between which the output voltage u a Typically, the input voltage is u e to an input DC voltage, and at the output voltage u a an output DC voltage.

[0027] As essential components for the operation of the resonant converter 10, two half-bridges HB1, HB2 are provided in the input stage I between the first and second input poles l+, I. Each half-bridge has an upper semiconductor switch Q1, Q3 and a lower semiconductor switch Q2, Q4. The semiconductor switches Q1, Q2, Q3, Q4 can be bipolar transistors, IGBTs ("insulated-gate bipolar transistors"), field-effect transistors (MOSFETs, JFETs, IGFETs), or other suitable switches. In a known manner, in Fig.1, but also in the following figures 2, 3 and 4, in addition to the semiconductor switches Q1, Q2, Q3, Q4 themselves, freewheeling diodes (also protective diodes, or “body diodes”) DQ1, DQ2, DQ3, DQ4 are shown, which protect the semiconductor switches Q1, Q2, Q3, Q4 in a known manner against overvoltages.If, for example, MOSFETs are used as semiconductor switches Q1, Q2, Q3, Q4, the freewheeling diodes DQ1, DQ2, DQ3, DQ4 are implicitly an integral part of the semiconductor switch. However, freewheeling diodes DQ1, DQ2, DQ3, DQ4 can also be provided separately as separate components. It should be noted that freewheeling diodes DQ1, DQ2, DQ3, DQ4 are not mandatory components for the present invention, and a construction of a resonant converter 100 according to the invention is fundamentally also conceivable without freewheeling diodes DQ1, DQ2, DQ3, DQ4. However, the freewheeling diodes DQ1, DQ2, DQ3, DQ4 can be used to implement particularly advantageous embodiments of the invention, which will be discussed in detail later.

[0028] In a similarly known manner, a half-bridge HB1 allows an electrical voltage applied to it to be "chopped" by switching semiconductor switches Q1, Q2 provided in the half-bridge HB1, and to be output as a pulsed (square-wave) voltage at an output or connection point usually provided between the semiconductor switches Q1, Q2. In the present resonant converter 10, the half-bridges HB1, HB2 act in precisely this manner, generating from the applied input voltage u e pulsed electrical voltages, hereinafter referred to as alternating transmission voltages Un, U12, which are present between the respective semiconductor switches Q1, Q2 and Q3, Q4 and which drive the currents in and h2, respectively.

[0029] From Fig. 1, it can be seen that the upper semiconductor switches Q1, Q3 of the half-bridges HB1, HB2 provided in input stage I are directly connected to the first input pole l+, and the lower semiconductor switches Q2, Q4 are directly connected to the second input pole I-. This also applies to the exemplary embodiments explained below. In the resonant converters according to Fig. 2 to Fig. 4, the upper semiconductor switches Q1, Q3 are directly connected to the first input pole l+, and the lower semiconductor switches Q2, Q4 are directly connected to the second input pole I-.

[0030] It is also already clear from Fig.1 that the half-bridges HB1, HB2 are symmetrical half-bridges. This means that the topology of the half-bridges HB1, HB2 is identical. Starting from the first input pole l+, both the first and the second half-bridge HB1, HB2 have an upper semiconductor switch Q1, Q3 and a lower semiconductor switch Q2, Q4 in order to establish an electrical connection with the second input pole I-. The connection of the half-bridges HB1, HB2 with the input poles l+, I- is thus made directly via the semiconductor switches Q1, Q2, Q3, Q4. This also applies to the exemplary embodiments explained below with reference to Figs.2-4.

[0031] To implement the control of the semiconductor switches Q1, Q2, Q3, Q4, a control unit 2 is provided in Fig. 1. The control unit 2 implements a well-known modulation method such as PWM, PFM, etc., wherein electrical control pulses are determined in a manner well-known from power electronics and supplied to the switches Q1, Q2, Q3, Q4 for control. For the present embodiments, it is important that the aforementioned control pulses are output in control periods Ts, which recur with a control frequency fs=1 / Ts. The temporal length of the control pulses is varied in order to realize, in a known manner depending on the application, a duty cycle required. This duty cycle describes the relationship between the temporal length of the control pulses and the duration of the control periods Ts, and ultimately, in an equally known manner, the generated output voltage u a determines.

[0032] A control unit 2 is typically a component of the resonant converter 10, but can also be implemented separately from the resonant converter 10 and simply wired to the switches Q1, Q2, Q3, and Q4 to control them. Possible implementations of a control unit 2 include microprocessor-based hardware, such as microcontrollers and integrated circuits (ASICs, FPGAs).

[0033] If the output voltage u ain the form of a DC output voltage, a rectifier GR must be provided in output stage A, which converts the aforementioned AC transmission voltages Un, U12 into DC values. The rectifier can be implemented as a half-wave rectifier, bridge rectifier, center-wave rectifier, etc., or, as in the case shown in Fig. 1, as a full-bridge rectifier. Diodes or semiconductor switches, such as MOSFETs, can be used as current valves in the rectifier GR, with semiconductor switches being used to ensure bidirectional operation.

[0034] Between the input stage I and the output stage A, a resonant circuit RK is provided in the resonant converter 10 shown in Fig.1, which on the one hand determines a resonant frequency fR of the resonant converter 100 due to the components installed in the resonant circuit RK and the topology of the resonant circuit RK, but on the other hand serves in particular to electrically couple the input stage I to the output stage A. “Electrical coupling” is to be understood as an electrical, magnetic, or electromagnetic connection that enables power transmission and can therefore be implemented, for example, conductively, for example through a continuous, electrically conductive connection, or, for example, inductively, for example through a transformer, or in some other way.

[0035] To specifically implement the electrical coupling of the input stage I with the output stage A via the resonant circuit RK, the resonant circuit RK has a first and a second resonant circuit input RE1, RE2, which are each connected between the upper and lower semiconductor switches Q1, Q2 and Q3, Q4 of the corresponding half-bridge HB1, HB2 with the respective half-bridge HB1, HB2. In this way, the resonant circuit RK is able to receive the aforementioned transfer alternating voltages Un, U12 and convert them into a resonant circuit output voltage URA ZU outputted at a resonant circuit output RA of the resonant circuit RK. This resonant circuit output voltage URA is subsequently transferred via an output stage input AE to the output stage A, and from there into the output voltage u a changed.

[0036] In the resonant circuit RK shown in Fig.1, a resonance capacitor C r , a resonance choke L rand a transformer T are provided to determine the at least one resonant frequency fR determined by the resonant circuit RK. For a resonant converter 10 according to Fig.1, the first and most important resonant frequency fR for operation can usually be estimated with a good approximation as A. The leakage inductance of the trans- Formators is often seen and considered as part of the resonance circuit RK.

[0037] In a known manner, the aim for a resonant converter 100 is to switch the switches Q1, Q2, Q3, and Q4 at a switching frequency fs that corresponds to a resonant frequency of the resonant converter 100, in this case the resonant frequency fR, in order to operate the resonant circuit RK at the resonance point. As explained above, in this way, a phase shift of approximately 90 degrees is achieved between the voltages un, u generated by the half-bridges HB1, HB2. !2and the currents flowing through the semiconductor switches Q1, Q2, Q3, Q4, respectively, a large voltage gain is achieved, which leads to lower currents for a given electrical power to be transmitted. Overall, this enables low-loss switching of the semiconductor switches Q1, Q2, Q3, Q4 and, as a direct consequence, low-loss operation of the entire resonant converter 10.

[0038] The ultimate purpose of a resonant converter 10 is to supply an electrical load R with the generated output voltage u a , which, as mentioned, is a product of the input voltage u ewith a duty cycle set for the switching frequency fs for switching the semiconductor switches Q1, Q2, Q3, Q4. A supplied load R is not part of the resonant converter 10 under consideration and is therefore only shown in dashed lines in the figures. An electrical load R can, in a known manner, be a general electrical DC consumer, such as a battery, a rechargeable battery to be charged, or a power supply unit. Further details on the implementation, alternative designs, and the operation of resonant converters can be found in the documents US 8,363,427 B2, US 11,411,502 B2, US 2015 / 0263634 A1, or US 2021 / 0099096 A1.

[0039] As described above, during real operation of a resonant converter 100, deviations of the switching frequency fs for switching the semiconductor switches from the resonant frequencies fR of the resonant circuit RK provided in the resonant converter can occur for a variety of reasons, with changes in a supplied load and wear and / or drift of components being the most frequently occurring causes in practice. If the resonance point is left during operation, for example because a load supplied by the resonant converter, a specified input voltage, or a required output voltage changes, this can lead to serious deteriorations in the given efficiency, which is usually due to the semiconductor switches Q1, Q2, Q3, Q4 no longer being switched current- and / or voltage-free.

[0040] How these problems and, in particular, the efficiency deterioration resulting from these problems is counteracted according to the invention is discussed below with reference to the resonant converter 100 according to the invention shown in Fig. 2. The statements made for Fig. 1, in particular with regard to input and output voltage, operation of a resonant converter at a resonance point, implementation of the output stage A, electrical coupling of the input stage I and output stage A, control unit 2, etc., also apply unchanged to the resonant converter 100 described below with reference to Fig. 2 to Fig. 4. In order to improve the efficiency away from resonance points, the half-bridges HB1, HB2 also provided in the resonant converter 100 according to the invention are initially connected differently compared to the resonant converter 10 from Fig. 1.Although the resonant circuit inputs RE1, RE2 provided in the resonant circuit RK continue to receive the alternating transmission voltages Un, U12 dropped between the respective upper and lower semiconductor switches Q1, Q2 and Q3, Q4, respectively, according to the invention, the first resonant circuit input RE1 and the second resonant circuit input RE2 are each connected via a resonant choke L. ri , L r 2 is connected to a resonant node KP in the resonant circuit RK. The resonant node KP is in turn electrically connected to the output stage input AE, so that the first transfer alternating voltage Un and the second transfer alternating voltage U12 are each transferred via the resonant node KP into the resonant circuit output voltage URA output at the resonant circuit output RA.

[0041] Since the specific design of the connection between the resonance node KP and the output stage input AE, as well as the specific implementation of the block GR in the output stage A are not of primary importance for a fundamental explanation of the invention and can in particular be implemented using different, alternative variants, these points are left open in the initially general illustration according to Fig. 2 and are only taken up in more detail in the following Figs. 3 and 4. In comparison to the concepts known from the prior art discussed above, such as in particular that in Fig. 1, the half-bridges HB1, HB2 do not form a full bridge, but act as half-bridges. The alternating transmission voltages Un, U12 generated by half-bridges HB1, HB2 are not added, as is otherwise the case with full bridges.

[0042] According to the invention, a relief capacitor O2 is further connected between the first resonant circuit input RE1 and the second resonant circuit input RE2. The first resonant choke L ri of the two resonance chokes L ri , L r 2 is connected between a first capacitor terminal 02+ of the relief capacitor 02, which is connected to the first resonant circuit input RE1, and the resonant node KP, and the second resonant choke Lr2 of the two resonant chokes L ri , L r 2 is connected between a second capacitor terminal 02- of the relief capacitor 02, which is connected to the second resonant circuit input RE2, and the resonant node KP, since the relief capacitor 02 would otherwise be short-circuited. Within the scope of the invention, this results in a Kirchhoff loop in the form of a series circuit comprising the resonant chokes L ri, L2 and the one between the resonant circuit inputs RE1 , RE2, but also between the resonant chokes L r i, L2 connected relief capacitor O2, which is connected between the two half-bridges HB1, HB2. The inventive implementation of the resonant circuit realizes several advantages. For example, the resonant chokes Lr1, Lr2 ensure that when the semiconductor switches Q1, Q2, Q3, Q4 are closed, a current in, h2 does not flow directly through the semiconductor switches Q1, Q2, Q3, Q4, since the inductances of the resonant chokes Lr1, Lr2 must first be charged and the current in, h2 only builds up over time. In this way, at least approximately current-free switching is possible even away from resonance points.

[0043] Conversely, the relief capacitor C2 helps ensure that when the semiconductor switches Q1, Q2, Q3, Q4 open, a current driven by the inductances of the resonant chokes Lr1, Lr2 can flow via the relief capacitor C2, e.g. by taking charge stored in the relief capacitor C2 and / or by closing a current path via a still closed semiconductor switch Q1, Q2, Q3, Q4 via the relief capacitor C2, and thus does not have to flow via an opening semiconductor switch Q1, Q2, Q3, Q4. In this way, when the semiconductor switches Q1, Q2, Q3, Q4 are switched off or closed, a voltage drop across an opening semiconductor switch Q1, Q2, Q3, Q4 is prevented and, at the same time, a current flow through this semiconductor switch Q1, Q2, Q3, Q4, which would lead to losses. The relief capacitor C2 therefore reduces the switching losses of the semiconductor switches Q1, Q2, Q3, Q4.

[0044] Possible, advantageous embodiments of a resonant converter 100 corresponding to the explanations in Fig.2 are shown below with reference to Figs. 3 and 4.

[0045] In the resonant converter 100 shown in Fig. 3, a transformer T with a primary winding L1 and a secondary winding L2 is provided in the resonant circuit RK between the resonant node KP and the resonant circuit output RA in order to couple the input stage I to the output stage A. The resonant node KP is electrically connected to a first winding terminal L1+ of the primary winding L1, and the resonant circuit output RA is electrically connected to a first winding terminal L2+ of the secondary winding L2. In this advantageous embodiment, the differences to the resonant converter 10 in Fig. 1 become particularly clear, since it is clearly evident that the transmission alternating voltages Un, Ui2 generated by the half-bridges HB1, HB2 are not added within the scope of the invention, but are fed in parallel to one another to the same resonant node KP in order to be subsequently passed on for the purpose of further transmission.In particular, the connection points of the half-bridges HB1, HB2 located between the respective semiconductor switches Q1, Q2 and Q3, Q4 are not connected to one another via a transformer T within the scope of the invention, but solely via the resonance chokes L. r i, L r2The parallel connection of the half-bridges HB1, HB2 according to the invention enables a current to flow even when, for example, only the semiconductor switch Q1 is closed, or only the semiconductor switch Q3 is closed, and all other semiconductor switches are open. In a full bridge known from the prior art, two diagonally opposite semiconductor switches must always be closed in order to enable a closed current path and thus a current flow, for example, the semiconductor switches Q1 and Q4 must be closed, or the semiconductor switches Q2 and Q3 must be closed. Within the scope of the invention, a flowing total current is thus divided between the upper semiconductor switches Q1, Q3 or the lower semiconductor switches Q2, Q4, typically in a ratio of at least approximately 1:1.

[0046] In the implementation shown in Fig.3, a second winding terminal L2+ of the primary winding L1 is also connected via a first resonance capacitor C ri with the first input terminal l+, and via a second resonance capacitor C r 2 is connected to the second input terminal I-. The resonance capacitors C r i, Cr2 define in this embodiment the resonance frequencies f relevant for the operation of the resonant converter 100 R , to which the switching frequency fs for switching the semiconductor switches Q1, Q2, Q3, Q4 must be adapted in accordance with the above explanations.

[0047] In order for the relief capacitor 02 to be able to use the resonance capacitors C ri , Cr2 and the resonance chokes L r i, L r 2 defined resonance frequency f R influenced as little as possible, the capacity of the relief capacitor 02 is typically chosen to be significantly smaller than that of the resonance capacitors C , C r2. Advantageously, a capacitance of a resonance capacitor C r , such as in particular a capacitance of the resonance capacitors CM, Cr2, by a predetermined factor, preferably by ten times or by 20 times or by 100 times, greater than the capacitance of the relief capacitor O2. Typically, in the practical implementation of the advantageous embodiment according to Fig.3, it is provided that the inductances of the resonance chokes L r i, Lr2 are larger by a predetermined factor, preferably ten times or 20 times or 100 times, than a main inductance or a stray inductance of the transformer T, in order to prevent any undesired cross-influences on the set resonance frequencies at this point either.

[0048] It should be noted that, at least theoretically, it is possible to dispense with the resonance capacitors CM, Cr2 and adjust the resonance frequencies solely via the relief capacitor O2. However, the problem with this approach is that, at switching frequencies commonly used in practice, this requires a higher level of efficiency compared to a setup with dedicated resonance capacitors C ri , Cr2 would often require significantly larger capacities of the relief capacitor O2, which would only allow slow voltage increases of the transmission alternating voltages Un, U12. For this reason, the use of at least one separate resonance capacitor C ri , Cr2 is advantageous, where adjustment of resonance frequencies via the relief capacitor C2 can be dispensed with.

[0049] In the case shown in Fig.3, with a selection of the relief capacitor C2 and / or the inductances of the transformer T in accordance with the above explanations, the dominant resonance frequency of the resonant converter 100 with the resonance chokes L r i, L r 2 and the resonance capacitors C ri , C r 2 in good approximation as can be estimated, from which the vanishing influence of the relief capacitor C2 and the inductances of the transformer T can be seen.

[0050] Since both resonance capacitors C ri , Cr2, as mentioned, are not indispensable components of a resonance converter 100 according to the invention, embodiments are also conceivable in which only a single resonance capacitor C ri is provided, and the complementary resonance capacitor C r2 is not used. The same applies to the backup capacitors C1 and C3 shown in Fig. 3, which are advantageous in many practical applications for stabilizing the input or output voltages, but are also not components that must be provided for the implementation of the invention.

[0051] Fig.4 shows a further implementation variant of the present invention, in which the resonance chokes L according to the invention ri , L r 2 are not implemented as separate components, but by means of a transformer T2, which has at least two chokes. The resonant chokes L ri, Lr2 are thus realized with just one component, which allows for space and cost savings in practical implementation. Furthermore, the windings of the second transformer T2 are wound in opposite directions, which eliminates the main inductance of the transformer T2, particularly in the control mode described below with reference to Fig. 5, leaving only the stray inductances of the transformer T2 as effective inductances. On the one hand, this ensures that the current and voltage dynamics in the respective paths can be determined solely by selecting the stray inductances, and on the other hand, cross-interference between the two paths is prevented.

[0052] In addition to the topology of the resonant converter 100 according to the invention described so far, it was recognized within the scope of the invention that the aforementioned positive effects of the invention can be further enhanced by suitable control. How this can be done in detail is shown below with reference to Fig. 5. In Fig. 5, Fig. 5a shows the time profiles of the currents in, h2, Fig. 5b shows the time profiles of the transmission alternating voltages Un, U12, and Fig. 5c shows a time profile of the voltage u dropping across the discharge capacitor C2. c , in Fig.5d states of the switch pair Q1, Q2 of the first half-bridge HB1 (0... open, 1... closed) and in Fig.5e states of the switch pair Q3, Q4 of the second half-bridge HB2.

[0053] The curves shown show that the alternating transfer currents in, i|2 occurring for each half-bridge HB1, HB2, i.e. the currents flowing through the semiconductor switches Q1, Q2, Q3, Q4 of the half-bridges, are in phase with the corresponding alternating transfer voltages Un, U12 of a half-bridge HB1, HB2. The current in shown in Fig. 5a is therefore in phase with the alternating transfer voltage Un. As explained earlier, this phase equality is only possible because the relief capacitor C2 does not cause a phase shift between the electrical quantities of a half-bridge HB1, HB2.

[0054] For the purpose of advantageously controlling a resonant converter 100 according to the invention, it can be provided according to Fig.5 that in a first control step S1 the upper semiconductor switches Q1, Q3 of both half-bridges HB1, HB2 are closed simultaneously, then in a second control step S2 the upper semiconductor switch Q1 of the first half-bridge HB1 is opened first, then after a predetermined waiting time T w in a third control step S3, to open the upper semiconductor switch Q3 of the second half-bridge HB2, then in a fourth control step S4, to close the lower semiconductor switches Q2, Q4 of both half-bridges HB1, HB2 simultaneously, then in a fifth control step S5, to first open the lower semiconductor switch Q2 of the first half-bridge HB1, then after a predetermined waiting time T win a sixth control step S6, to open the lower semiconductor switch Q4 of the second half-bridge HB2, then in a seventh control step S7, to close the upper semiconductor switches Q1, Q3 of both half-bridges HB1, HB2 simultaneously, then in an eighth control step S8, to first open the upper semiconductor switch Q3 of the second half-bridge HB2, then after a predetermined waiting time T w in a ninth control step S9, to open the upper semiconductor switch Q1 of the first half-bridge HB1, then in a tenth control step S10, to close the lower semiconductor switches Q2, Q4 of both half-bridges HB1, HB2 simultaneously, then in an eleventh control step S11, to first open the lower semiconductor switch Q4 of the second half-bridge HB2 and then after a predetermined waiting time T w to open the lower semiconductor switch Q2 of the first half-bridge HB1 in a twelfth control step S12.

[0055] The upper semiconductor switches Q1, Q3 and the lower semiconductor switches Q2, Q4 are therefore always switched on simultaneously, but switching off always occurs after a predetermined time period T w offset and alternating. This results in overall symmetrical currents i|i|2, whereby during the first six control steps S1-S6, the current i leads the current h2, while in the control steps S7-S12, the current h2 leads the current i. In this way, the discharge capacitor C2 is always charged and discharged evenly, so that no permanent voltage u develops during operation. c can form on the relief capacitor C2. Thanks to the offset control of the two half-bridges HB1, HB2, the half-bridges HB1, HB2 relieve each other when switched off, whereby the switching losses occurring at the semiconductor switches Q1, Q2, Q3, Q4 are reduced over a wide range, even above the resonance frequency fR.

[0056] With reference to the described control sequence, the almost loss-free switching achieved with the aid of the present invention can also be explained using voltages, using the example of the semiconductor switch Q3. Specifically, at the beginning of the switching off of the semiconductor switch Q3, when Q1 and Q3 were previously both switched on, the discharge capacitor C2 is initially charged to zero volts (both terminals of the discharge capacitor C2 have the potential of the input pole l+, the discharge capacitor C2 initially acts like a short circuit). The semiconductor switch Q3 thus switches off with an (almost) negligible voltage drop across it. After the opening of the semiconductor switch Q3, a current path is formed via the discharge capacitor C2 and the semiconductor switch Q1, so that the discharge capacitor C2 is discharged to the input voltage u via Q1, which is still switched on. eThe voltage increase is determined by the capacity of the discharge capacitor C2, the level of the input voltage u e and the flowing current h2. When Q1 is turned off, the relief capacitor C2 is connected to the input voltage u e charged, so that the terminal of the discharge capacitor C2 facing the semiconductor switch Q1 remains at the potential of the input terminal l+. The voltage difference across switch Q1 is thus again almost zero volts, and switch Q1 consequently also switches off at a vanishing voltage ("Zero Voltage Switching", "ZVS").

[0057] In an advantageous manner, the said waiting period T w depending on the capacity of the relief capacitor C2, or conversely, the capacity of the relief capacitor C2 can be adapted to a desired waiting time T w A desired waiting time T wcan be derived, for example, from a desired voltage increase of the transmission alternating voltages Un, Ui2, e.g. from a maximum voltage increase du ™ ax , which can arise in a known manner, in particular from considerations of electromagnetic compatibility ("EMC"). Since the discharge capacitor C2 is to be charged to the input voltage ue according to the above explanations, the waiting time T w e.g. by means of the regulation T w = d ^ ax Conversely, of course, the dUmax = a maximum voltage rise dt 7 can be determined. Furthermore, since the maximum values ​​of the currents in and h2 are typically known, the relationship C2= d ™* x a capacity of the relief dt capacitor C2 can be determined.

[0058] Likewise, when selecting the capacity of the relief capacitor C2, a common-mode interference current l cm (common mode current) must be taken into account. Common mode interference currents l cm in semiconductor switches Q1, Q2, Q3, Q4 often as parasitic interference currents via parasitic capacitances C par of the semiconductor switches Q1, Q2, Q3, Q4, which are caused by changes in the voltages (u) across the semiconductor switches Q1, Q2, Q3, Q4 e - un,i2) or un,i2. To a good approximation, these common-mode interference currents can be l cm as so that, for example, a maximum common-mode interference current l cm a maximum voltage change can be determined:

[0059] From a maximum voltage change determined in this way du ^ , t ' 2 can be calculated according to the above relationships, e.g. Tw = d ^ ax , capacity values ​​for a relief capacitor 02 or dt a waiting time T w be determined.

[0060] With the capacity of the relief capacitor 02 it is therefore possible to adjust the slope the semiconductor switches Q1, Q2, Q3, Q4. The larger the capacitance, the longer the oscillation takes and thus the build-up of the voltages across the semiconductor switches Q1, Q2, Q3, Q4. The relief capacitor 02 thus allows, on the one hand, a relief of the semiconductor switches Q1, Q2, Q3, Q4, in particular by reducing common-mode interference. cm , on the other hand, it also contributes to an improvement in the EMC behavior (“electromagnetic compatibility”), since at higher gradients stronger interference is emitted in the form of electromagnetic waves.

[0061] In a further, particularly advantageous embodiment of the present invention, in the described sequence for switching the semiconductor switches Q1, Q2, Q3, Q4, the electrical conditions in the freewheeling diodes DQ1, DQ2, DQ3, DQ4, which in the given case are connected in parallel to the semiconductor switches Q1, Q2, Q3, Q4, can also be taken into account. Specifically, the semiconductor switches Q1, Q3 can be switched on, i.e. closed, when current is already flowing in a freewheeling diode DQ1, DQ2, DQ3, DQ4, which is connected to a semiconductor switch Q1, Q2, Q3, Q4 to be switched.An important reason in the context of the present explanations why current already flows in a freewheeling diode DQ1, DQ2, DQ3, DQ4 before an associated semiconductor switch Q1, Q2, Q3, Q4 is closed is that the resonant chokes Lr1, Lr2 drive a current il1, il2 according to the induction principle, and a corresponding current path is formed via a freewheeling diode DQ1, DQ2, DQ3, DQ4. The voltage drop (u. e In such a case, the voltage across semiconductor switches Q1, Q2, Q3, and Q4 (un,i2) is almost zero volts, which allows for a further reduction in losses. Freewheeling diodes DQ1, DQ2, DQ3, and DQ4 can also be used to reduce the charge stored on a discharge capacitor C2.

Claims

Patent claims 1. Electrical resonant converter (100), comprising an input stage (I) with a first input pole (l+) and a second input pole (I.) for applying an electrical input voltage (u e ), an output stage (A) with a first output terminal (A+) and a second output terminal (A.) for outputting an electrical output voltage (u a), and a resonant circuit (RK) defining at least one resonant frequency (fp) of the resonant converter (100) for electrically coupling the input stage (I) to the output stage (A), wherein the input stage (I) has a voltage applied between the first and the second input pole (l+, I.) connected first half-bridge (HB1) with an upper semiconductor switch (Q1) which is directly connected to the first input pole (I+), and a lower semiconductor switch (Q2) which is directly connected to the second input pole (I-), in order to generate a first transfer alternating voltage (Un), wherein the resonant circuit (RK) has a first resonant circuit input (RE1) which is connected to the first half-bridge (HB1) between the upper and lower semiconductor switches (Q1, Q2) of the first half-bridge (HB1) in order to receive the first transfer alternating voltage (Un) and to transfer it into a resonant circuit output voltage (URA) which is output at a resonant circuit output (RA) of the resonant circuit (RK), and wherein the output stage (A) has an output stage input (AE) in order to receive the resonant circuit output voltage (URA) and to convert it into the output voltage (u. a), characterized in that in the input stage (I) a second half-bridge (HB2) is provided, which is connected in parallel to the first half-bridge (HB1) and symmetrical to the first half-bridge (HB1), with an upper semiconductor switch (Q3) which is directly connected to the first input pole (I+), and a lower semiconductor switch (Q4) which is directly connected to the second input pole (I-), in order to generate a second transmission alternating voltage (U12), that the resonant circuit (RK) has a second resonant circuit input (RE2) which is connected between the upper and lower semiconductor switches (Q3, Q4) of the second half-bridge (HB2) to the second half-bridge (HB2) in order to receive the second transmission alternating voltage (U12), that a relief capacitor (C2) is connected between the first resonant circuit input (RE1) and the second resonant circuit input (RE2),which is connected with a first terminal to the first resonant circuit input (RE1) and with a second terminal to the second resonant circuit input (RE2), and that the first resonant circuit input (RE1) and the second resonant circuit input (RE2) are each connected via a resonant choke (L, r i, L2) are connected to a resonance node (KP) in the resonance circuit (RK) to generate the first transfer alternating voltage (Un) and the second Transfer alternating voltage (U12) via the resonance node (KP) into the resonance circuit output voltage (URA) ZU output at the resonance circuit output (RA).

2. Electrical resonant converter (100) according to claim 1, characterized in that in the resonant circuit (RK), preferably between the resonant node (KP) and the resonant circuit output (RA), at least one resonant capacitor (C r) is provided to determine the at least one resonance frequency (fn) determined by the resonance circuit (RK).

3. Electrical resonant converter (100) according to claim 1 or 2, characterized in that a transformer (T) with a primary winding (Li) and a secondary winding (L2) is provided in the resonant circuit (RK) between the resonant node (KP) and the resonant circuit output (RA) in order to couple the input stage (I) to the output stage (A), wherein the resonant node (KP) is electrically conductively connected to a first winding terminal (Li+) of the primary winding (Li) and the resonant circuit output (RA) is electrically conductively connected to a first winding terminal (L2+) of the secondary winding (L2).

4. Electrical resonant converter (100) according to claim 3, characterized in that a second winding terminal (Li.) of the primary winding (L1) is connected to the first input pole (l+) via a first resonant capacitor (CM) and / or via a second resonant capacitor (C r 2) is connected to the second input terminal (I.) in order to determine the at least one resonance frequency (fn) and / or a first winding terminal (Li.) of the primary winding (Li) via a first resonance capacitor (C r i) is connected to the first input terminal (l+) and / or via a second resonance capacitor (C r 2) is connected to the second input pole (I.) in order to determine the at least one resonance frequency (fR).

5. Electrical resonant converter (100) according to claim 3 or 4, characterized in that a capacitance of the at least one resonant capacitor (C r) is greater by a predetermined factor, preferably ten times or 20 times or 100 times, than a capacitance of the relief capacitor (C2) and that an inductance of one of the resonance chokes (L ri , L2) is greater by a predetermined factor, preferably ten times or 20 times or 100 times, than a main inductance or leakage inductance of the transformer (T).

6. Electrical resonant converter (100) according to one of the preceding claims, characterized in that an input DC voltage is used as the input voltage (u e ) it is provided that an output DC voltage is used as the output voltage (u a ) and that the output stage (A) comprises a rectifier for generating the output DC voltage from the first and second transfer AC voltage (Un, U12).

7. Electrical resonant converter (100) according to one of the preceding claims, characterized in that a freewheeling diode (DQ1, DQ2, DQ3, DQ4) is connected in parallel to each of the semiconductor switches (Q1, Q2, Q3, Q4) provided in the first half-bridge (HB1) and the second half-bridge (HB2), which freewheeling diode is each designed to reduce at least part of an electrical charge stored on the discharge capacitor (02).

8. Electrical resonant converter (100) according to one of the preceding claims, characterized in that a first resonant choke (Lr1) of the two resonant chokes (L ri , Lr2) is connected between a first capacitor terminal (C2+) of the relief capacitor (C2) connected to the first resonant circuit input (RE1) and the resonant node (KP) and that a second resonant choke (L r 2) of the two resonance chokes (L ri, Lr2) is connected between a second capacitor terminal (C2-) of the relief capacitor (02) connected to the second resonant circuit input (RE2) and the resonant node (KP).

9. Electrical resonant converter (100) according to one of the preceding claims, characterized in that the resonant converter (100) has a control unit (2) which is designed to control the resonant converter (100) by closing the upper semiconductor switches (Q1, Q3) of both half-bridges (HB1, HB2) simultaneously in a first control step (S1), then opening the upper semiconductor switch (Q1) of the first half-bridge (HB1) in a second control step (S2), then after a predetermined waiting time (T w) in a third control step (S3) to open the upper semiconductor switch (Q3) of the second half-bridge (HB2), then in a fourth control step (S4) to close the lower semiconductor switches (Q2, Q4) of both half-bridges (HB1, HB2) simultaneously, then in a fifth control step (S5) to first open the lower semiconductor switch (Q2) of the first half-bridge (HB1), then after a predetermined waiting time (T w ) in a sixth control step (S6) to open the lower semiconductor switch (Q4) of the second half-bridge (HB2), then in a seventh control step (S7) to close the upper semiconductor switches (Q1, Q3) of both half-bridges (HB1, HB2) simultaneously, then in an eighth control step (S8) to first open the upper semiconductor switch (Q3) of the second half-bridge (HB2), then after a predetermined waiting time (T w) in a ninth control step (S9) to open the upper semiconductor switch (Q1) of the first half-bridge (HB1), then in a tenth control step (S10) to close the lower semiconductor switches (Q2, Q4) of both half-bridges (HB1, HB2) simultaneously, then in an eleventh control step (S11) to first open the lower semiconductor switch (Q4) of the second half-bridge (HB2) and then after a predetermined waiting time (T w ) in a twelfth control step (S12) to open the lower semiconductor switch (Q2) of the first half-bridge (HB1).

10. Electrical resonant converter (100) according to claim 9, characterized in that the capacitance of the relief capacitor (C2) is dependent on the predetermined waiting time (T w ) is selected.

11. Electrical resonant converter (100) according to claim 10, characterized in that the predetermined waiting time (T w) is selected as a function of a maximum voltage rise of the voltages (Un, U12) generated by the half-bridges (HB1, HB2).

12. Electrical resonant converter (100) according to claim 11, characterized in that the maximum voltage rise is determined from a common-mode interference current flowing through the semiconductor switches (Q1, Q2, Q3, Q4) of the half-bridges (HB1, HB2).

13. A method for operating an electrical resonant converter (100), wherein an electrical input voltage (u e ), wherein between a first output terminal (A+) and a second output terminal (A.) of an output stage (A) of the resonant converter (100) an electrical output voltage (u a), wherein the input stage (I) is electrically coupled to the output stage (A) via a resonant circuit (RK) which defines at least one resonant frequency (fp) of the resonant converter (100), wherein a first transfer alternating voltage (Un) is generated by an upper semiconductor switch (Q1), which is directly connected to the first input pole (l+), and a lower semiconductor switch (Q2), which is directly connected to the second input pole (I-), one between the first and second input poles (l+, I.) connected first half-bridge (HB1), wherein the resonant circuit (RK) receives the first transfer alternating voltage (Un) via a first resonant circuit input (RE1), which is connected between the upper and the lower semiconductor switch (Q1, Q2) of the first half-bridge (HB1) to the first half-bridge (HB1), and transfers it into a resonant circuit output voltage (URA) output at a resonant circuit output (RA) of the resonant circuit (RK), and wherein the output stage (A) has an output stage input (AE) in order to receive the resonant circuit output voltage (URA) and to convert it into the output voltage (u. a), characterized in that a second transmission alternating voltage (U12) is generated by controlling an upper semiconductor switch (Q3), which is directly connected to the first input pole (I+), and a lower semiconductor switch (Q4), which is directly connected to the second input pole (I-), a second half-bridge (HB2) which is connected in parallel to the first half-bridge (HB1) and symmetrical to the first half-bridge (HB1), that the resonant circuit (RK) is connected via a second resonant circuit input (RE2) which is connected between the upper and the lower semiconductor switch (Q3, Q4) of the second half-bridge (HB2) is connected to the second half-bridge (HB2), which receives the second transfer alternating voltage (U12), that a relief capacitor (C2) is connected between the first resonant circuit input (RE1) and the second resonant circuit input (RE2), wherein the relief capacitor (C2) is connected with a first terminal to the first resonant circuit input (RE1) and with a second terminal to the second resonant circuit input (RE2), and that the first resonant circuit input (RE1) and the second resonant circuit input (RE2) are each connected via a resonant choke (L ri , L2) is connected to a resonance node (KP) in the resonance circuit (RK) in order to transfer the first transfer alternating voltage (Un) and the second transfer alternating voltage (U12) via the resonance node (KP) into the resonance circuit output voltage (URA) output at the resonance circuit output (RA).

14. The method according to claim 13, characterized in that for controlling the semiconductor switches (Q1, Q2) of the first half-bridge (HB1) and for controlling the semiconductor switches (Q3, Q4) of the second half-bridge (HB2) in a first control step (S1) the upper semiconductor switches (Q1, Q3) of both half-bridges (HB1, HB2) are closed simultaneously, then in a second control step (S2) first the upper semiconductor switch (Q1) of the first half-bridge (HB1) is opened, then after a predetermined waiting time (T w ) in a third control step (S3) the upper semiconductor switch (Q3) of the second half-bridge (HB2) is opened, then in a fourth control step (S4) the lower semiconductor switches (Q2, Q4) of both half-bridges (HB1, HB2) are closed simultaneously, then in a fifth control step (S5) first the lower semiconductor switch (Q2) of the first half-bridge (HB1) is opened, then after a predetermined waiting time (T w) in a sixth control step (S6) the lower semiconductor switch (Q4) of the second half-bridge (HB2) is opened, then in a seventh control step (S7) the upper semiconductor switches (Q1, Q3) of both half-bridges (HB1, HB2) are closed simultaneously, then in an eighth control step (S8) first the upper semiconductor switch (Q3) of the second half-bridge (HB2) is opened, then after a predetermined waiting time (T w ) in a ninth control step (S9) the upper semiconductor switch (Q1) of the first half-bridge (HB1) is opened, then in a tenth control step (S10) the lower semiconductor switches (Q2, Q4) of both half-bridges (HB1, HB2) are closed simultaneously, then in an eleventh control step (S11) first the lower semiconductor switch (Q4) of the second half-bridge (HB2) is opened and then after a predetermined waiting time (T w) in a twelfth control step (S12) the lower semiconductor switch (Q2) of the first half-bridge (HB1) is opened.

15. The method according to claim 14, characterized in that the semiconductor switches (Q1, Q2, Q3, Q4) provided in the first and second half-bridge (HB1, HB2) closed when an electric current flows in freewheeling diodes (DQ1, DQ3) connected in parallel to the upper semiconductor switches (Q1, Q3).

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