Vibration suppression circuit

Abstract

Provided is a vibration suppression circuit connected to a DC bus to which DC power is supplied. The DC bus is connected to at least two capacitors, and the vibration suppression circuit absorbs energy of the DC bus and emits the energy to the DC bus, whereby electric vibration of the DC bus is suppressed. The vibration suppression circuit may emit energy to the DC bus at a voltage lower than the voltage when absorbing the energy of the DC bus.

Description

Vibration suppression circuit

[0001] The present invention relates to a vibration suppression circuit.

[0002] Conventionally, a power system in which battery units each made of a secondary battery are connected in parallel to a power conversion circuit is known (see Patent Document 1). Also, a snubber device attached to a terminal of a semiconductor module is known (see Patent Document 2). [Prior Art Literature] [Patent Document] [Patent Document 1] JP 2013-135482 A [Patent Document 2] JP 2020-124023 A General disclosure

[0003] (Problem to be solved) It is desirable to suppress vibrations generated in a circuit to prevent malfunctions due to overvoltage or undervoltage, or voltage fluctuations in connected devices. In addition, it is desirable to regenerate the energy of vibrations generated in the circuit when suppressing vibrations. (Means for solving the problem)

[0004] An embodiment of the present invention provides a vibration suppression circuit. The vibration suppression circuit may be connected to a DC bus to which DC power is supplied. In the vibration suppression circuit, the DC bus may be connected to at least two capacitors. Any of the vibration suppression circuits may absorb energy from the DC bus and release it to the DC bus to suppress electrical vibrations in the DC bus.

[0005] Any of the vibration suppression circuits described above may release the energy onto the DC bus at a voltage lower than the voltage at which the energy is absorbed onto the DC bus.

[0006] In any of the vibration suppression circuits described above, the voltage when absorbing the energy of the DC bus may be higher than the voltage of the DC bus.

[0007] In any of the vibration suppression circuits described above, the voltage at which the absorbed energy is released to the DC bus may be equal to the voltage of the DC bus.

[0008] In any of the vibration suppression circuits described above, the two capacitors may include a first capacitor and a second capacitor having a capacitance smaller than that of the first capacitor. In any of the vibration suppression circuits described above, the length of wiring between the vibration suppression circuit and the second capacitor may be shorter than the length of wiring between the vibration suppression circuit and the first capacitor.

[0009] Any of the vibration suppression circuits described above may be provided between the two capacitors.

[0010] Any of the vibration suppression circuits described above may be provided for each of the two capacitors.

[0011] In any of the vibration suppression circuits described above, a plurality of DC-DC converters each having the capacitor may be connected to the DC bus. In any of the vibration suppression circuits described above, a power conditioner each having the capacitor may be connected to the DC bus. Any of the vibration suppression circuits described above may be provided between at least one of the DC-DC converters and the power conditioner.

[0012] In any of the vibration suppression circuits described above, a limit switch may be provided between the DC-DC converter and the DC bus. Any of the vibration suppression circuits described above may be provided between the limit switch and the DC bus.

[0013] Any of the vibration suppression circuits described above may be provided for each of the plurality of DC-DC converters.

[0014] In any of the vibration suppression circuits described above, the wiring length between the vibration suppression circuit and the capacitor of the power conditioner may be shorter than the wiring length between the vibration suppression circuit and the capacitor of any of the plurality of DC-DC converters.

[0015] Any of the vibration suppression circuits described above may include a charging path that has an absorption capacitor and a discharge suppression diode connected to the DC bus and absorbs energy from the DC bus. Any of the vibration suppression circuits described above may include a discharging path that discharges energy to the DC bus via a path different from the discharge suppression diode at a lower voltage than the absorption capacitor.

[0016] In any of the vibration suppression circuits described above, the DC bus may include a reference potential line and a high potential line having a higher potential than the reference potential line. Any of the vibration suppression circuits described above may include n (n is an integer equal to or greater than 1) parallel charge paths, each including a positive-side capacitor, a first diode, and a negative-side capacitor connected in series in this order between the high potential line and the reference potential line of the DC bus. Any of the vibration suppression circuits described above may include n+1 parallel discharge paths, each including a second diode connected between the negative-side capacitor in the reference potential line or an Nth charge path (N is an integer satisfying 0≦N≦n) among the n charge paths, and the positive-side capacitor or the high potential line in an N+1th charge path among the n charge paths. Any of the vibration suppression circuits described above may include n+1 parallel discharge paths, each including a second diode connected between the negative-side capacitor in the reference potential line or an Nth charge path (N is an integer satisfying 0≦N≦n) among the n charge paths, and the positive-side capacitor or the high potential line in an N+1th charge path among the n charge paths.

[0017] Any of the vibration suppression circuits described above may include the discharge suppression diode and the absorption capacitor connected in series between a high potential line and a reference potential line of the DC bus, and may include the charging path for allowing a current to flow from the high potential line to the reference potential line. Any of the vibration suppression circuits described above may include the absorption capacitor and a DCDC converter connected to the DC bus, and may include the discharging path for allowing a current to flow from the reference potential line to the high potential line.

[0018] Any of the vibration suppression circuits described above may include an absorption potential line having a higher potential than the high potential line. Any of the vibration suppression circuits described above may include the charge path having the emission suppression diode connected between the high potential line and the absorption potential line of the DC bus and the absorption capacitor connected between the absorption potential line and the reference potential line, and allowing current to flow from the high potential line to the reference potential line. Any of the vibration suppression circuits described above may include the discharge path having a transistor and an inductor connected between the absorption potential line and the high potential line, and a diode connected between the reference potential line and the connection point of the transistor and the inductor, and allowing current to flow from the reference potential line to the high potential line.

[0019] Any of the vibration suppression circuits described above may include the discharge path having a constant voltage element connected to the absorption capacitor and the DC bus, and allowing current to flow from the reference potential line to the high potential line.

[0020] The above summary of the invention does not list all of the features of the present invention, and subcombinations of these features may also be inventions.

[0021] 1 is a diagram showing an example of a power storage system 100 including a vibration suppression circuit 60 according to an embodiment of the present invention. FIG. 1 is a diagram showing the periphery of the DC bus 30 in FIG. 1. FIG. 2 is a diagram showing an operation in which the vibration suppression circuit 60 absorbs energy from the DC bus 30. FIG. 3 is a diagram showing an operation in which the vibration suppression circuit 60 releases energy to the DC bus 30. FIG. 4 is a diagram showing a current waveform flowing in the DC bus 30 of the embodiment. FIG. 5 is a schematic diagram explaining the arrangement of the vibration suppression circuit 60. FIG. 6 is a diagram showing the periphery of the DC bus 30 in a comparative example. FIG. 7 is a diagram showing a current waveform flowing in the DC bus 30 in the comparative example. FIG. 8 is a diagram showing another example of the vibration suppression circuit 60. FIG. 9 is a diagram showing another example of the vibration suppression circuit 60.

[0022] The present invention will be described below through embodiments of the invention, but the following embodiments do not limit the scope of the invention as claimed. Furthermore, not all of the combinations of features described in the embodiments are necessarily essential to the solution of the invention.

[0023] In this specification, the expression "connected" is not limited to a direct connection without an intervening element, but also includes an indirect connection via an intervening element. Furthermore, in this specification, the expressions "connected between... and...," "provided between... and...," or "disposed between... and..." do not limit the physical arrangement, but rather mean "electrically connected between... and...."

[0024] FIG. 1 is a diagram showing an example of a power storage system 100 including an vibration suppression circuit 60 according to an embodiment of the present invention. The power storage system 100 is connected to a power facility, stores power from the power facility, and supplies power to the power facility. The power facility includes, for example, a power generation facility that uses renewable energy. The power storage system 100 stores surplus power in the power generation facility, and supplies power from the power storage system 100 when there is a power shortage in the power generation facility. The power facility may be a power grid. The power storage system 100 supplies power to the power grid and stores power from the power grid.

[0025] The power storage system 100 includes one or more DC-DC converters 10, one or more DC batteries 20, a DC bus 30, a power conditioner 40, and a transformer 50. The DC batteries 20 may be secondary batteries. The DC batteries 20 output a predetermined battery voltage. A DC-DC converter 10 is provided for each DC battery 20. The DC-DC converter 10 is provided between the DC batteries 20 and the DC bus 30. The DC-DC converter 10 converts (e.g., boosts) the battery voltage to the voltage of the DC bus 30. The battery voltage is the voltage at the output terminal of the DC battery 20. The DC-DC converter 10 may convert (e.g., step down) the voltage of the DC bus 30 to the battery voltage to charge the DC battery.

[0026] The DC-DC converter 10-1 of this example includes a switch SW11, a switch SW12, an inductor L1, and a capacitor C11. The DC-DC converter 10-1 of this example converts voltage by operating as a step-up chopper or a step-down chopper. However, the configuration of the DC-DC converter 10-1 is not limited to this. The DC-DC converter 10-1 only needs to be able to convert voltage.

[0027] A plurality of DC-DC converters 10 are connected to a DC bus 30. Although three DC-DC converters 10 and three DC batteries 20 are shown in FIG. 1 , the power storage system 100 may include more or fewer DC-DC converters 10 and DC batteries 20.

[0028] DC power is supplied to the DC bus 30. In this example, one or more DC batteries 20 are connected to the DC bus 30. Each DC-DC converter 10 may operate so that the voltage of the DC bus 30 is maintained at a predetermined value. In this example, the DC bus 30 includes a high potential line 32 and a reference potential line 24. The high potential line 32 has a higher voltage than the reference potential line 24. The reference potential line 24 is connected to the low-voltage side terminal of each DC battery 20. The high potential line 32 is connected to the output terminal of each DC-DC converter 10. The voltage of the DC bus 30 is the voltage difference between the high potential line 32 and the reference potential line 24.

[0029] The power conditioner 40 converts DC power and AC power. One side of the power conditioner 40 is connected to the DC bus 30, and the other side is connected to the transformer 50. The power conditioner 40 converts the DC power of the DC bus 30 into AC power and supplies it to the transformer 50. The power conditioner 40 also converts the AC power of the transformer 50 into DC power and supplies it to the DC bus 30.

[0030] The power conditioner 40 of this example has a capacitor C1 that is charged by the voltage of the DC bus 30 or the voltage from the transformer 50. The power conditioner 40 of this example includes a three-phase inverter that converts DC power from the capacitor C1 into AC power and converts AC power from the transformer 50 into DC power. The three-phase inverter has switches SW1 to SW6, with switches SW1 and SW2, switches SW3 and SW4, and switches SW5 and SW6 corresponding to each arm of the three-phase inverter. An inductor ALC1 is connected to the connection point of the switches in each arm. A capacitor may be provided between each inductor ALC1 and a reference potential. However, the structure of the power conditioner 40 is not limited to this. It is sufficient for the power conditioner 40 to be able to convert DC power and AC power into each other.

[0031] The transformer 50 converts the voltage of the AC power. The transformer 50 converts the voltage of the AC power output from the power conditioner 40 and outputs it to the power equipment. The transformer 50 also converts the voltage of the AC power of the power equipment and outputs it to the power conditioner 40.

[0032] The DC bus 30 is connected to at least two capacitors. In this example, the DC bus 30 is connected to the capacitor C11 of the DC-DC converter 10 and the capacitor C1 of the power conditioner 40. Therefore, as an example, an LC circuit is formed near the DC bus 30 by the inductance of the capacitors C11, C1, and the wiring of the DC bus. Note that the at least two capacitors may both be capacitors provided in the DC-DC converters 10, such as the capacitor C11 of the DC-DC converter 10-1 and the capacitor C21 of the DC-DC converter 10-2.

[0033] When an external voltage (or current) is applied to the LC circuit, the voltage (or current) oscillates within the circuit. Furthermore, if the resonant frequency of the LC circuit matches the switching frequency or an integral multiple thereof during the step-up / step-down operation of the DC-DC converter 10, resonance occurs, causing an increase in the current value.

[0034] The power storage system 100 includes a vibration suppression circuit 60 connected to the DC bus 30. The vibration suppression circuit 60 suppresses electrical vibrations occurring in the above-described LC circuit. The configuration of the vibration suppression circuit 60 will be described later. The electrical vibrations may be current vibrations or voltage vibrations.

[0035] The vibration suppression circuit 60 may be provided between the power conditioner 40 and at least one DC-DC converter 10. The vibration suppression circuit 60 may be provided between at least one DC-DC converter 10 and the DC bus 30, may be provided inside the DC bus 30, or may be provided between the DC bus 30 and the power conditioner 40.

[0036] A limit switch SW13 may be provided between the DC-DC converter 10 and the DC bus 30. Furthermore, a free wheel diode Dd11 may be provided between the limit switch SW13 and the reference potential line 24. The limit switch SW13 limits the current flowing through the DC bus 30. The limit switch SW13 may be provided separately from a switch provided in the chopper circuit of the DC-DC converter 10. The free wheel diode Dd11 serves to ensure a current path for current flowing through the inductance of the DC bus 30 while the limit switch SW13 is off. The limit switch SW13 and the free wheel diode Dd11 may be provided for each DC-DC converter 10.

[0037] The vibration suppression circuit 60 may be provided between the limit switch SW13 and the DC bus 30. The vibration suppression circuit 60 may be provided between the free wheel diode Dd11 and the DC bus 30.

[0038] FIG. 2 is a diagram illustrating the periphery of the DC bus 30 in FIG. 1. FIG. 2 illustrates the DC-DC converter 10-1 and the power conditioner 40 as examples. The configuration of the DC-DC converter 10-1, excluding the capacitor C11, is also illustrated. The capacitor C11 may be included in the DC-DC converter 10-1, or may be provided between the DC-DC converter 10-1 and the DC bus 30. The same applies to the power conditioner 40. The limit switch SW13 and the freewheeling diode Dd11 in FIG. 1 are also omitted. As described above, another DC-DC converter 10 (e.g., the DC-DC converter 10-2) may be connected instead of the power conditioner 40. The inductor L represents the inductance of the wiring of the DC bus 30.

[0039] The vibration suppression circuit 60 is connected between the high potential line 32 and the reference potential line 24 of the DC bus 30. In addition to when a voltage is applied due to the switching operation of the DC-DC converter 10 described above, when the current (voltage) of the DC bus 30 suddenly changes due to a sudden change in the load of the power conditioner 40 or the parallel-on or parallel-off of the DC-DC converter 10, a pulse current (pulse voltage) is generated due to the inductance of the wiring of the DC bus 30, and current oscillation begins in the DC bus 30. In this specification, the current (voltage) that causes electrical oscillation in the DC bus 30 may be referred to as a pulse current (pulse voltage). The vibration suppression circuit 60 suppresses electrical oscillation in the DC bus 30 by absorbing energy in the DC bus 30 and discharging it to the DC bus 30. Absorbing the energy of the DC bus 30 may mean absorbing the energy of the pulse current (pulse voltage).

[0040] The vibration suppression circuit 60 has an absorption capacitor and a discharge suppression diode connected to the DC bus 30, and is equipped with a charge path 61 that absorbs energy from the DC bus 30, and a discharge path 62 that discharges to the DC bus 30 at a voltage lower than that of the absorption capacitor via a path different from that of the discharge suppression diode. In this embodiment, a positive-side capacitor Cp and a negative-side capacitor Cn, which will be described later, correspond to the absorption capacitor, and a first diode D1 corresponds to the discharge suppression diode.

[0041] The vibration suppression circuit 60 of this example has n parallel charge paths 61 and n+1 parallel discharge paths 62. Note that the number n is an integer equal to or greater than 1, and in this embodiment, for example, is 3. Also, in this embodiment, as an example, the three charge paths 61 will be described as a first charge path 61-1, a second charge path 61-2, and a third charge path 61-3, in that order from the left side of the figure. Also, the four discharge paths 62 will be described as a first discharge path 62-1, a second discharge path 62-2, a third discharge path 62-3, and a fourth discharge path 62-4, in that order from the left side of the figure.

[0042] Each charging path 61 has a positive-side capacitor Cp, a first diode D1, and a negative-side capacitor Cn connected in series in this order between the high potential line 32 and the reference potential line 24. The positive-side capacitor Cp and the negative-side capacitor Cn may absorb electrical oscillations generated in the DC bus 30 by the pulse voltage. As an example, the positive-side capacitor Cp and the negative-side capacitor Cn may be a film capacitor or a multilayer ceramic capacitor.

[0043] The first diode D1 is arranged with its anode facing the high potential line 32 and its cathode facing the reference potential line 24. This allows each charging path 61 to pass current from the high potential line 32 to the reference potential line 24.

[0044] Each discharge path 62 has a second diode D2. The second diode D2 is connected between the reference potential line 24 or the negative-side capacitor Cn in the Nth charge path 61 (where N is an integer satisfying 0≦N≦n) among the n charge paths 61, and the positive-side capacitor Cp in the N+1th charge path 61 among the n charge paths 61, or the high-potential line 32. For example, the second diode D2 in the first discharge path 62-1 is connected between the reference potential line 24 and the positive-side capacitor Cp of the first charge path 61-1. The second diode D2 in the second discharge path 62-2 is connected between the negative-side capacitor Cn of the first charge path 61-1 and the positive-side capacitor Cp of the second charge path 61-2. The second diode D2 in the third discharge path 62-3 is connected between the negative-side capacitor Cn of the second charge path 61-2 and the positive-side capacitor Cp of the third charge path 61-3. The second diode D2 of the fourth discharge path 62-4 is connected between the negative-side capacitor Cn of the third charge path 61-3 and the high potential line 32. The second diode D2 is arranged with its anode facing the Nth charge path 61-N or the reference potential line 24 and its cathode facing the N+1th charge path 61-(N+1) or the high potential line 32. This allows each discharge path 62 to pass current from the reference potential line 24 to the high potential line 32 via at least one of the negative-side capacitor Cn and the positive-side capacitor Cp.

[0045] 3 is a diagram showing the operation of the vibration suppression circuit 60 to absorb energy from the DC bus 30. When electrical vibration due to a pulse current occurs in the DC bus 30, current flows from the high-potential line 32 through the positive-side capacitor Cp, the first diode D1, and the negative-side capacitor Cn of each charging path 61 to the reference potential line 24. The dashed-dotted arrows in the diagram indicate the current path during absorption. As a result, the energy of the DC bus 30 is absorbed by charging the positive-side capacitor Cp and the negative-side capacitor Cn of the charging path 61.

[0046] 4 is a diagram showing the operation of the vibration suppression circuit 60 to release energy to the DC bus 30. The vibration suppression circuit 60 releases the absorbed energy described above to the DC bus 30. The vibration suppression circuit 60 passes a current through the reference potential line 24, the second diode D2 of each discharge path 62, and the high potential line 32, and at this time releases the energy stored in the positive-side capacitor Cp and / or the negative-side capacitor Cn on the anode / cathode side of the second diode D2. The dashed arrows in the diagram indicate the current paths during release.

[0047] Here, the voltages of the positive-side capacitor Cp and the negative-side capacitor Cn during energy absorption and release operations of the vibration suppression circuit 60 will be described. The relationship between the voltages of the positive-side capacitor Cn and the negative-side capacitor Cp of each charging path 61 during energy absorption operation is expressed by the following equation (1). In the equation, E is the voltage of capacitor C11 and capacitor C1, and Vdc-off is the voltage between the high potential line 32 and the reference potential line 24 when electrical vibration due to the pulse voltage occurs. Furthermore, Vp(1) to Vp(3) are the voltages of the positive-side capacitor Cp in the first charging path 61-1 to the third charging path 61-3. Furthermore, Vn(1) to Vn(3) are the voltages of the negative-side capacitor Cn in the first charging path 61-1 to the third charging path 61-3.

[0048] E≦(Vp(1)+Vn(1)) =(Vp(2)+Vn(2)) =(Vp(3)+Vn(3)) =Vdc-off…(1)

[0049] The relationship between the voltages of the positive-side capacitor Cp and the negative-side capacitor Cn of each charging path 61 during the energy release operation is expressed by the following equation (2): where Vdc-on is the inter-terminal voltage between the high potential line 32 and the reference potential line 24 during the energy release operation.

[0050] E≧Vp(1) =(Vn(1)+Vp(2)) =(Vn(2)+Vp(3)) =Vn(3) =Vdc-on...(2)

[0051] From equations (1) and (2), the relationship between the voltages of the positive-side capacitors Cp and the negative-side capacitors Cn is expressed by the following equation (3) (see also the voltages shown in FIGS. 3 and 4): where Vdc is the voltage between the high potential line 32 and the reference potential line 24 in a steady state (the voltage of the DC bus 30).

[0052] E=Vdc≒Vp(1) =Vn(3) =1.5× Vp(2) =1.5× Vn(2) =3× Vn(1) =3× Vp(3) … (3)

[0053] From equation (3), it can be seen that the charging voltage (4E / 3 in FIG. 3 as an example) in each charging path 61 when the vibration suppression circuit 60 absorbs energy is higher than the discharging voltage (E in FIG. 3 as an example) in each discharging path 62 when the vibration suppression circuit 60 releases energy. That is, the vibration suppression circuit 60 releases energy to the DC bus 30 at a voltage lower than the voltage when absorbing energy from the DC bus 30. The voltage when absorbing energy from the DC bus 30 is higher than the voltage of the DC bus. Furthermore, the voltage when releasing the absorbed energy to the DC bus 30 is equal to the voltage of the DC bus 30. Note that, even when a current flowing due to a pulse voltage flows into the vibration suppression circuit 60 from the power conditioner 40 side, a similar effect can be obtained due to the symmetry of the circuit, and therefore a detailed description thereof will be omitted.

[0054] The vibration suppression circuit 60 for the DC bus 30 described above is provided with n parallel charging paths 61 each having a positive-side capacitor Cp and a negative-side capacitor Cn. Therefore, electrical vibrations generated in the DC bus 30 by the pulse voltage pass through each charging path 61 and charge the positive-side capacitor Cp and the negative-side capacitor Cn to a voltage higher than the voltage between the high potential line 32 and the reference potential line 24. This prevents damage to various devices due to electrical vibrations.

[0055] The vibration suppression circuit 60 is also provided with n+1 discharge paths 62 that pass current from the reference potential line 24 side to the high potential line 32 side via at least one of the negative side capacitor Cn and the positive side capacitor Cp. Therefore, when the vibration suppression circuit 60 releases the energy absorbed to the DC bus 30, the energy stored in the positive side capacitor Cp and the negative side capacitor Cn is discharged, and the discharge voltage of each discharge path 62 drops to the voltage between the high potential line 32 and the reference potential line 24.

[0056] Here, when the vibration suppression circuit 60 absorbs energy, the charge voltage in each of the n charge paths 61 is higher than the discharge voltage in each discharge path 62 when the vibration suppression circuit 60 releases energy. Therefore, even if the energy stored via the charge paths 61 is discharged via the discharge paths 62, it cannot further charge the charge paths 61. Therefore, the energy charged in the positive-side capacitor Cp and the negative-side capacitor Cn is charged and discharged through the vibrational operation between the inductor L and the positive-side capacitor Cp or the negative-side capacitor Cn, and is stored in the positive-side capacitor Cp or the negative-side capacitor Cn and regenerated without being consumed as circuit loss. This reduces circuit loss due to vibrational operation and enables efficient energy utilization. Furthermore, the tolerance of the inductor L of the high-potential line 32 and the reference potential line 24 can be increased. In other words, the degree of freedom in the wiring length of the high-potential line 32 and the reference potential line 24 can be increased.

[0057] In the vibration suppression circuit 60 according to this embodiment, the wiring inductance of each of the n (three in this embodiment, as an example) charge paths 61 may be smaller than the wiring inductance of each discharge path 62. Furthermore, the wiring length of each charge path 61 may be shorter than the wiring length of each discharge path 62. For example, the wiring length of each charge path 61 connecting the high potential line 32 and the reference potential line 24 may be shorter than the wiring length of each discharge path 62 connecting the high potential line 32 and the reference potential line 24. Furthermore, the wiring length of each wiring portion of the three charge paths 61 may be shorter than the wiring length of each wiring portion of the n+1 discharge paths 62. As an example, in this embodiment, each charge path 61 is linearly arranged between the high potential line 32 and the reference potential line 24, and the wiring portion of the charge path 61 is linear. Note that the wiring portion does not need to include an inductor as a circuit element.

[0058] 5 is a diagram showing the waveform of a current flowing through the DC bus 30 according to the embodiment. In FIG. 5, the horizontal axis represents time, and the vertical axis represents current, with the point in time when the pulse current is generated being set to 0. Positive current represents the current when the vibration suppression circuit 60 is being charged, and negative current represents the current when it is being discharged. That is, the integral value of the positive current waveform corresponds to the energy absorbed by the vibration suppression circuit 60, and the integral value of the negative current waveform corresponds to the energy regenerated (released) by the vibration suppression circuit 60.

[0059] As described above, the charging voltage of the vibration suppression circuit 60 is higher than the discharging voltage, so the energy discharged by the discharging path 62 does not recharge the charging path 61. In addition, the voltage when the absorbed energy is released to the DC bus 30 is approximately equal to the voltage of the DC bus 30. Therefore, vibrations do not occur in the second and subsequent cycles indicated by the dotted lines in the figure.

[0060] FIG. 6 is a schematic diagram illustrating the arrangement of a vibration suppression circuit 60. The vibration suppression circuit 60 may be disposed between two capacitors. This allows vibrations occurring between the two capacitors to be suppressed. The two capacitors may be disposed between the high potential line 32 and the reference potential line 24. In this example, the two capacitors may include a first capacitor and a second capacitor having a smaller capacitance than the first capacitor. In the example of FIG. 6, capacitor C1 is the first capacitor and capacitor C11 is the second capacitor. When the charge stored in a capacitor fluctuates by a predetermined amount, the smaller the capacitance of the capacitor, the greater the fluctuation in the capacitor voltage. In other words, pulse voltage is more likely to occur. Therefore, the wiring length L12 between the vibration suppression circuit 60 and the second capacitor may be shorter than the wiring length L11 between the vibration suppression circuit 60 and the first capacitor.

[0061] The wiring length between the vibration suppression circuit 60 and the capacitor C1 of the power conditioner 40 may be shorter than the wiring length between the vibration suppression circuit 60 and the capacitor of any of the plurality of DC-DC converters 10. The wiring length between the vibration suppression circuit 60 and the capacitor C1 of the power conditioner 40 may be shorter than the wiring length between the vibration suppression circuit 60 and the capacitor of any of the plurality of DC-DC converters 10.

[0062] A vibration suppression circuit 60 may be provided for each of the two capacitors. That is, the vibration suppression circuit 60 may be connected to wiring near each capacitor. For example, the first vibration suppression circuit 60 may be arranged closer to the second capacitor than the first capacitor, and the second vibration suppression circuit 60 may be arranged closer to the first capacitor than the second capacitor. The same number of vibration suppression circuits 60 as the number of capacitors connected to the DC bus 30 may be provided. Furthermore, the vibration suppression circuit 60 may be provided for each of the multiple DC-DC converters 10. For example, the vibration suppression circuit 60 may be provided inside each DC-DC converter 10, or may be provided between each DC-DC converter 10 and the DC bus 30. The same number of vibration suppression circuits 60 as the number of DC-DC converters 10 connected to the DC bus 30 may be provided. By providing multiple vibration suppression circuits 60, electrical vibration can be further suppressed and more energy can be regenerated. At least one of the vibration suppression circuits 60 may be provided between any two capacitors, and all of the vibration suppression circuits 60 may be provided between any two capacitors.

[0063] FIG. 7A is a diagram showing the periphery of the DC bus 30 in the comparative example. FIG. 7B is a diagram showing the waveform of a current flowing through the DC bus 30 in the comparative example. FIG. 7A corresponds to FIG. 2 in the embodiment, and FIG. 7B corresponds to FIG. 5 in the embodiment. Descriptions of the same reference numerals will be omitted. The DC bus 30 in this example is not provided with a vibration suppression circuit 60. Therefore, after a pulse current is generated, electrical vibration occurs in the DC bus 30. The generated vibration gradually decreases due to losses caused by the resistance components of the DC bus 30. In other words, a large amount of loss occurs because energy is not regenerated.

[0064] 8 is a diagram showing another example of a vibration suppression circuit 60. The vibration suppression circuit 60 of this example also includes a charge path 61 that allows current to flow from the high potential line 32 to the reference potential line 24, and a discharge path 62 that allows current to flow from the reference potential line 24 to the high potential line 32. The charge path 61 of this example includes a discharge suppression diode D3 and an absorption capacitor Ca that are connected in series between the high potential line 32 and the reference potential line 24 of the DC bus 30. The discharge suppression diode D3 is arranged with its anode facing the high potential line 32 and its cathode facing the reference potential line 24. The discharge path 62 of this example includes the absorption capacitor Ca and a DC-DC converter 70 connected to the DC bus 30. The absorption capacitor Ca of this example functions as a component of both the charge path 61 and the discharge path 62.

[0065] When a pulse current occurs in the DC bus 30, the subsequent electrical oscillation charges the absorption capacitor Ca through the charging path 61. Because the discharge suppression diode D3 limits the current in the charging path 61, the energy charged in the absorption capacitor Ca is not discharged through the charging path 61. In this example as well, the energy absorbed by the oscillation suppression circuit 60 from the DC bus 30 is discharged to the DC bus 30 through the discharging path 62.

[0066] As described above, the voltage value (amplitude) of the electrical vibration generated by the pulse voltage is greater than the voltages of the capacitors C11 and C1. That is, it is greater than the voltage of the DC bus 30. Therefore, the voltage of the absorbing capacitor Ca charged by the electrical vibration is greater than the voltage of the DC bus 30. The DCDC converter 70 converts the voltage of the absorbing capacitor Ca to the voltage of the DC bus 30. By matching the voltages in this way, the vibration suppression circuit 60 releases the absorbed energy to the DC bus 30. The vibration suppression circuit 60 of this example also suppresses the electrical vibration of the DC bus 30, reducing losses, and regenerating energy.

[0067] 9 is a diagram showing another example of a vibration suppression circuit 60. The vibration suppression circuit 60 of this example includes an absorption potential line 34, a charging path 61, and a discharging path 62. The absorption potential line 34 has a higher potential than the high potential line 32. The charging path 61 of this example passes a current from the high potential line 32 to the reference potential line 24 via the absorption potential line 34. The charging path 61 of this example includes an emission suppression diode D3 connected between the high potential line 32 and the absorption potential line 34, and an absorption capacitor Ca connected between the absorption potential line 34 and the reference potential line 24. The anode of the emission suppression diode D3 is connected to the high potential line 32, and the cathode is connected to the absorption potential line 34. The potential of the absorption potential line 34 is higher than the potential of the reference potential line 24 by the voltage of the absorption capacitor Ca.

[0068] The discharge path 62 in this example includes a transistor Tr, an inductor L2, a diode Di, and an absorption capacitor Ca. The transistor Tr is connected between the absorption potential line 34 and the high potential line 32. The inductor L2 is connected between the transistor Tr and the high potential line 32. The diode Di is connected between the connection point of the transistor Tr and the inductor L2 and the reference potential line 24. The anode of the diode Di is connected to the reference potential line 24, and the cathode is connected to the transistor Tr and the inductor L2. The transistor Tr may be provided with a free-wheeling diode.

[0069] When the transistor Tr is turned on in a state in which the absorption capacitor Ca is charged by the above-described electrical vibration, a current flows from the reference potential line 24 to the high potential line 32 via the absorption potential line 34. In other words, the charge stored in the absorption capacitor Ca is discharged through the discharge path 62. When the transistor Tr is then turned off, an induced electromotive force is generated in the inductor L2, and a current flows from the reference potential line 24 to the high potential line 32 via the diode Di. Therefore, the vibration suppression circuit 60 of this example can also suppress vibration of the DC bus 30 and perform energy regeneration.

[0070] 10 is a diagram showing another example of a vibration suppression circuit 60. The vibration suppression circuit 60 of this example has a charge path 61 that allows current to flow from the high potential line 32 to the reference potential line 24, and a discharge path 62 that allows current to flow from the reference potential line 24 to the high potential line 32. The configuration of the charge path 61 is the same as that of FIG. 8. The vibration suppression circuit 60 of this example has an absorption capacitor Ca and a constant voltage element SA connected to the DC bus 30. The constant voltage element SA may be a surge absorber.

[0071] The operation of the charging path 61 in this example is the same as that shown in Figure 8. However, in this example, a constant voltage element SA is provided in the discharging path 62, so the voltage of the absorbing capacitor Ca is maintained at a value higher than the voltage of the DC bus. Therefore, compared to the cases shown in Figures 2, 8, and 9, electrical oscillations caused by the pulse voltage can be quickly canceled, resulting in a faster attenuation of the current. Therefore, this example also reduces losses.

[0072] Although the present invention has been described above using embodiments, the technical scope of the present invention is not limited to the scope described in the above embodiments. It will be apparent to those skilled in the art that various modifications and improvements can be made to the above embodiments. It is clear from the claims that such modifications and improvements can also be included within the technical scope of the present invention.

[0073] 10... DC-DC converter, 20... DC battery, 24... reference potential line, 30... DC bus, 32... high potential line, 34... absorption potential line, 40... power conditioner, 50... transformer, 60... vibration suppression circuit, 61... charging path, 62... discharging path, 70... DC-DC converter, 100... power storage system

Claims

1. A vibration suppression circuit connected to a DC bus to which DC power is supplied, the DC bus being connected to at least two capacitors, the vibration suppression circuit absorbing energy from the DC bus and discharging it to the DC bus, thereby suppressing electrical vibration in the DC bus.

2. The vibration suppression circuit according to claim 1, wherein the vibration suppression circuit releases the energy into the DC bus at a voltage lower than the voltage at which the energy is absorbed into the DC bus.

3. The vibration suppression circuit according to claim 2, wherein the voltage when absorbing the energy of the DC bus is higher than the voltage of the DC bus.

4. The vibration suppression circuit according to claim 3, wherein the voltage when the absorbed energy is released to the DC bus is equal to the voltage of the DC bus.

5. The vibration suppression circuit according to claim 1, wherein the two capacitors include a first capacitor and a second capacitor having a smaller capacitance than the first capacitor, and the length of wiring between the vibration suppression circuit and the second capacitor is shorter than the length of wiring between the vibration suppression circuit and the first capacitor.

6. The vibration suppression circuit according to claim 1, wherein the vibration suppression circuit is provided between the two capacitors.

7. The vibration suppression circuit according to claim 1, wherein the vibration suppression circuit is provided for each of the two capacitors.

8. The vibration suppression circuit according to claim 1, wherein a plurality of DCDC converters having the capacitor and a power conditioner having the capacitor are connected to the DC bus, and the vibration suppression circuit is provided between at least one of the DCDC converters and the power conditioner.

9. The vibration suppression circuit according to claim 8, further comprising: a limit switch provided between said DC-DC converter and said DC bus; and said vibration suppression circuit provided between said limit switch and said DC bus.

10. The vibration suppression circuit according to claim 8, wherein the vibration suppression circuit is provided for each of the plurality of DCDC converters.

11. The vibration suppression circuit according to claim 8, wherein the wiring length between the vibration suppression circuit and the capacitor of the power conditioner is shorter than the wiring length between the vibration suppression circuit and the capacitor of any of the plurality of DCDC converters.

12. The vibration suppression circuit according to claim 1, comprising: an absorption capacitor and a discharge suppression diode connected to the DC bus, a charging path for absorbing energy from the DC bus; and a discharging path for discharging to the DC bus at a lower voltage than the absorption capacitor via a path different from the discharge suppression diode.

13. The vibration suppression circuit according to claim 12, wherein the DC bus comprises: a reference potential line; and a high potential line having a higher potential than the reference potential line; and the vibration suppression circuit comprises: n (n is an integer of 1 or more) parallel charging paths each having a positive side capacitor, a first diode, and a negative side capacitor connected in series between the high potential line and the reference potential line of the DC bus in that order, and passing a current from the high potential line to the reference potential line; and n+1 parallel discharge paths each having a second diode connected between the negative side capacitor in the reference potential line or an Nth charging path (N is an integer such that 0≦N≦n) among the n charging paths, and the positive side capacitor or the high potential line in the N+1th charging path among the n charging paths, and passing a current from the reference potential line to the high potential line via at least one of the negative side capacitor and the positive side capacitor.

14. The vibration suppression circuit according to claim 12, wherein the DC bus comprises a reference potential line and a high potential line having a higher potential than the reference potential line, and the vibration suppression circuit comprises: a charging path having the emission suppression diode and the absorption capacitor connected in series between the high potential line and the reference potential line of the DC bus, and passing a current from the high potential line to the reference potential line; and a discharging path having a DCDC converter connected to the absorption capacitor and the DC bus, and passing a current from the reference potential line to the high potential line.

15. The vibration suppression circuit according to claim 12, wherein the DC bus comprises a reference potential line and a high potential line having a higher potential than the reference potential line, and the vibration suppression circuit comprises an absorption potential line having a higher potential than the high potential line, the discharge suppression diode connected between the high potential line and the absorption potential line of the DC bus, and the absorption capacitor connected between the absorption potential line and the reference potential line, the charging path having a current flowing from the high potential line to the reference potential line via the absorption potential line, and a transistor and an inductor connected between the absorption potential line and the high potential line, and a diode connected between the reference potential line and the connection point of the transistor and the inductor, the discharging path having a current flowing from the reference potential line to the high potential line.

16. The vibration suppression circuit according to claim 12, wherein the DC bus comprises a reference potential line and a high potential line having a higher potential than the reference potential line, and the vibration suppression circuit comprises: the charging path has the emission suppression diode and the absorption capacitor connected in series between the high potential line and the reference potential line of the DC bus, and allows a current to flow from the high potential line to the reference potential line; and the discharging path has a constant voltage element connected to the absorption capacitor and the DC bus, and allows a current to flow from the reference potential line to the high potential line.

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