Power supply selection switch circuit, chip, and radio frequency front-end module

Abstract

The present application discloses a power supply selection switch circuit, a chip, and a radio frequency front-end module. The power supply selection switch circuit comprises a power supply selection switch and a boost circuit; the power supply selection switch is an N-type field effect transistor, a drain thereof is configured to receive a power supply voltage, and a source thereof is configured to be connected to a power amplifier and when being turned on, supply power to the power amplifier by means of the power supply voltage; an input end of the boost circuit is configured to receive the power supply voltage, an output end thereof is connected to a gate of the N-type field effect transistor, and the boost circuit is configured to raise the received power supply voltage by a preset amplitude and then output same; the preset amplitude is greater than an on threshold voltage of the N-type field effect transistor and less than 1.1 times of a withstand voltage of the N-type field effect transistor. According to the present application, the N-type field effect transistor is used as the power supply selection switch and has a small parasitic capacitance. A voltage difference between the gate and the drain of the N-type field effect transistor is controlled within a preset range by means of the boost circuit, so that the N-type field effect transistor has a small on-resistance, so as to meet both the requirements of a small on-resistance and a small parasitic capacitance.

Description

Power selection switch circuit, chip and RF front-end module

[0001] This application is based on the Chinese patent application with application number 202311210322.4 filed on September 19, 2023 and entitled "Power selection switch circuit, chip and RF front-end module", and claims its priority. Technical Field

[0002] The present application relates to the field of radio frequency technology, and in particular to a power selection switch circuit, a chip, and a radio frequency front-end module. Background Art

[0003] Power amplifiers are widely used in communications, broadcasting, radar, industrial processing, medical equipment, and scientific research. In different operating modes or scenarios, power amplifiers require different power supplies. Therefore, a power selector switch is typically provided between the power amplifier and the power supply to select whether to connect the power supply to the power amplifier.

[0004] With the development of power amplifier technology, the number of operating modes of power amplifiers has increased. In some operating modes, the power supply voltage required by the power amplifier will vary within a certain range. However, the power selection switches currently on the market cannot meet the requirements of keeping the on-resistance and parasitic capacitance very small when the power supply changes.

[0005] Application Contents

[0006] This application proposes a power selection switch circuit, chip and radio frequency front-end module, which can meet the requirements of small on-resistance and small parasitic capacitance of the power selection switch.

[0007] In a first aspect, the present application provides a power selection switch circuit, comprising: a power selection switch, the power selection switch is an N-type field effect transistor, the drain of the N-type field effect transistor is used to receive a power supply voltage, the source of the N-type field effect transistor is used to connect to a power amplifier, and when turned on, the power amplifier is powered by the power supply voltage; a boost circuit, the input end of the boost circuit is used to receive the power supply voltage, and the output end is connected to the gate of the N-type field effect transistor, the boost circuit is used to raise the received power supply voltage to a preset amplitude and then output it; wherein the preset amplitude is greater than the turn-on threshold voltage of the N-type field effect transistor and less than 1.1 times the withstand voltage value of the N-type field effect transistor.

[0008] As an implementation manner, the preset amplitude is at least twice the turn-on threshold voltage of the N-type field effect transistor.

[0009] As an implementation manner, the turn-on threshold voltage of the N-type field effect transistor is less than or equal to 1V, and the preset amplitude is greater than or equal to 3V.

[0010] As an implementation manner, the withstand voltage of the N-type field effect transistor is 5V, and the preset amplitude is less than or equal to 5.5V.

[0011] As an implementation method, the preset amplitude is equal to the withstand voltage value of the N-type field effect transistor.

[0012] As an implementation manner, the withstand voltage of the N-type field effect transistor is 5V, and the preset amplitude is 5V.

[0013] As an embodiment, the boost circuit includes: a voltage-current conversion circuit, used to convert the power supply voltage into a first current, wherein the ratio of the power supply voltage to the first current is a first resistance value; a current mirror circuit, used to mirror the first current according to a preset current ratio to obtain a second current; a current-voltage conversion circuit, used to receive the second current and the third current, and convert the sum of the second current and the third current into a first voltage, and output the first voltage to the gate of the N-type field effect transistor; wherein the sum of the second current and the third current is a fourth current, the ratio of the first voltage to the fourth current is a second resistance value, the ratio of the preset amplitude to the third current is equal to the second resistance value, and the ratio of the first resistance value to the second resistance value is equal to the current ratio.

[0014] As an embodiment, a voltage-current conversion circuit includes an operational amplifier, a first transistor and a first resistor, wherein: the first electrode of the first transistor is used to receive the power supply voltage of the boost circuit, the first input terminal of the operational amplifier is used to receive the power supply voltage, the second input terminal of the operational amplifier is connected to the second electrode of the first transistor, and the output terminal of the operational amplifier is connected to the control electrode of the first transistor; one end of the first resistor is connected to the second electrode of the first transistor, and the other end is used for grounding; wherein the resistance value of the first resistor is equal to the first resistance value.

[0015] As an embodiment, the current-voltage conversion circuit includes a second resistor, one end of the second resistor is respectively connected to the output end of the current source and the current mirror circuit, and the other end of the second resistor is used for grounding; wherein, the current source is used to output a third current, and the resistance value of the second resistor is equal to the second resistance value.

[0016] As an implementation method, the current ratio is 1, and the second resistance value is equal to the first resistance value.

[0017] As an embodiment, the boost circuit includes a first bootstrap switch circuit and a second bootstrap switch circuit; the first bootstrap switch circuit and the second bootstrap switch each receive a power supply voltage and a second voltage with a preset amplitude, and generate a third voltage based on the power supply voltage and the second voltage, and the amplitude of the third voltage is equal to the sum of the amplitude of the power supply voltage and the preset amplitude; the output ends of the first bootstrap switch circuit and the second bootstrap switch circuit are respectively connected to the gate of the N-type field effect transistor; wherein the second bootstrap switch circuit is used to output the third voltage in a first time period, and the first bootstrap switch circuit is used to output the third voltage in a second time period, and the first time period and the second time period are connected.

[0018] As an embodiment, the first bootstrap switching circuit includes a first capacitor, wherein: in a first time period, the first end of the first capacitor is used to receive a second voltage, and the second end of the first capacitor is used to be grounded; in a second time period, the first end of the first capacitor is used to connect to the gate of the N-type field effect transistor, and the second end of the first capacitor is used to receive the power supply voltage.

[0019] As an embodiment, the first bootstrap switch circuit also includes a first switch, a second switch, a third switch and a fourth switch, wherein: the first end of the first switch is used for grounding, and the second end is connected to the second end of the first capacitor; the first end of the second switch is used for connecting to a voltage source to receive a second voltage output by the voltage source, and the second end of the second switch is connected to the first end of the first capacitor; the first end of the third switch is used for receiving a power supply voltage, and the second end is connected to the second end of the first capacitor; the first end of the fourth switch is connected to the first end of the first capacitor, and the second end of the fourth switch is connected to the gate of the N-type field effect transistor; wherein the first switch and the second switch are turned on in the first time period and turned off in the second time period; the third switch and the fourth switch are turned off in the first time period and turned on in the second time period.

[0020] As an embodiment, the second bootstrap switching circuit includes a second capacitor, wherein: in a first time period, the first end of the second capacitor is used to connect to the gate of the N-type field effect transistor, and the second end of the second capacitor is used to receive the power supply voltage; in a second time period, the first end of the second capacitor is used to receive the second voltage, and the second end of the second capacitor is used to be grounded.

[0021] As an embodiment, the second bootstrap switch circuit also includes a fifth switch, a sixth switch, a seventh switch and an eighth switch, wherein: the first end of the fifth switch is used for grounding, and the second end is connected to the second end of the second capacitor; the first end of the sixth switch is used for connecting to a voltage source to receive the second voltage output by the voltage source, and the second end of the sixth switch is connected to the first end of the second capacitor; the first end of the seventh switch is used for receiving the power supply voltage, and the second end is connected to the second end of the first capacitor; the first end of the eighth switch is connected to the first end of the second capacitor, and the second end of the eighth switch is connected to the gate of the N-type field effect transistor; wherein the fifth switch and the sixth switch are turned off in the first time period and turned on in the second time period; the seventh switch and the eighth switch are turned on in the first time period and turned off in the second time period.

[0022] As an implementation method, the boost circuit includes a charge pump, wherein an input end of the charge pump is used to receive a power supply voltage, and an output end of the charge pump is connected to a gate of an N-type field effect transistor.

[0023] As an implementation manner, the amplitude of the clock signal of the charge pump at a high level is 1 / N of a preset amplitude, where N is a positive integer.

[0024] In a second aspect, the present application provides a chip comprising the power selection switch circuit of any one of the first aspects.

[0025] As an embodiment, the chip includes at least two power selection switch circuits, the drain of the N-type field effect transistor in each power selection switch circuit is used to connect to the corresponding power supply module to receive the power supply voltage output by the corresponding power supply module, and the source of the N-type field effect transistor in each power selection switch circuit is used to connect to the power supply end of the power amplifier; the chip also includes an enable circuit, which is used to enable at least one power selection switch circuit.

[0026] As an implementation method, the chip further includes a power amplifier.

[0027] In a third aspect, the present application provides a radio frequency front-end module, comprising a power amplifier and a power selection switch circuit as in the first aspect.

[0028] As an embodiment, the RF front-end module further includes a substrate and a first chip and a second chip arranged on the substrate, the power amplifier is integrated in the first chip, and the power selection switch circuit is integrated in the second chip.

[0029] As an implementation method, the RF front-end module further includes a third chip and a control circuit. The control circuit is integrated in the third chip. The control circuit is connected to the power amplifier and is used to control the operation of the power amplifier.

[0030] As an embodiment, the RF front-end module further includes a substrate and a fourth chip disposed on the substrate, and the power amplifier and the power selection switch circuit are both integrated in the fourth chip.

[0031] The above-mentioned power selection switch circuit uses an N-type field-effect transistor as the power selection switch, which can have a small parasitic capacitance. A boost circuit is used to make the gate voltage of the N-type field-effect transistor follow the power supply voltage and the gate-drain voltage difference remain at a preset amplitude. The voltage range of the preset amplitude is cleverly set to ensure that the NMOS tube maintains a small on-resistance Ron without being broken down. Compared with the related art, the power selection switch circuit of the embodiment of the present application can simultaneously reduce the parasitic capacitance and on-resistance of the power selection switch, which helps to reduce the loss in the power supply path and improve the power efficiency of the power amplifier. It can be applied to more application scenarios and more demanding power supply modes. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0033] FIG1 shows a schematic diagram of a power selection switch circuit provided in an embodiment of the present application.

[0034] FIG2 shows an application schematic diagram of a power selection switch circuit provided in an embodiment of the present application.

[0035] FIG3 shows a schematic diagram of the circuit structure of a boost circuit provided in an embodiment of the present application.

[0036] FIG4 shows a schematic diagram of the circuit structure of another boost circuit provided in an embodiment of the present application.

[0037] FIG5 shows a schematic diagram of the circuit structure of another boost circuit provided in an embodiment of the present application.

[0038] FIG6 shows a schematic diagram of the circuit structure of a first bootstrap switch circuit provided in an embodiment of the present application.

[0039] FIG7 shows a schematic diagram of the circuit structure of a second bootstrap switch circuit provided in an embodiment of the present application.

[0040] FIG8 shows a schematic diagram of the circuit structure of another boost circuit provided in an embodiment of the present application.

[0041] FIG9 shows a schematic diagram of a circuit structure of a charge pump unit provided in an embodiment of the present application.

[0042] FIG10 shows a schematic diagram of a chip structure provided in an embodiment of the present application.

[0043] FIG11 shows a schematic diagram of another chip structure provided in an embodiment of the present application.

[0044] FIG12 shows a schematic structural diagram of a radio frequency front-end module provided in an embodiment of the present application.

[0045] FIG13 shows a schematic structural diagram of another RF front-end module provided in an embodiment of the present application.

[0046] FIG14 shows a schematic structural diagram of another RF front-end module provided in an embodiment of the present application.

[0047] FIG15 shows a schematic structural diagram of another RF front-end module provided in an embodiment of the present application. DETAILED DESCRIPTION

[0048] In order to enable those skilled in the art to better understand the present invention, the following will provide a clear and complete description of the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments in the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.

[0049] The terms "first," "second," and the like in this application are used to distinguish between different objects, not to describe a particular order. Furthermore, the terms "including," "having," and any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, product, or apparatus comprising a series of steps or elements is not limited to the listed steps or elements, but may optionally include steps or elements not listed, or may optionally include other steps or elements inherent to the process, method, product, or apparatus.

[0050] References herein to "embodiments" mean that a particular feature, structure, or characteristic described in connection with the embodiments may be included in at least one embodiment of the present application. The appearance of this phrase in various places in the specification does not necessarily refer to the same embodiment, nor does it constitute an independent or alternative embodiment that is mutually exclusive of other embodiments. It is understood, both explicitly and implicitly, by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0051] Because some performance indicators of a power amplifier, such as energy efficiency, are related to its supply voltage, different power supplies are required for different operating modes or scenarios. Therefore, a power selector switch is typically provided between the power amplifier and the power supply to select whether to connect the power supply to the power amplifier. In the semiconductor field, this switch can be implemented using a field-effect transistor.

[0052] The N-type field-effect transistor (MOSFET) conducts when the gate voltage is greater than the source / drain voltage. When the drain receives the power supply voltage Vcc, a higher voltage than the power supply voltage Vcc must be supplied to the gate to turn the MOSFET on. However, if the power supply voltage Vcc varies, if the power supply voltage Vcc is large, the difference between the gate voltage of the N-type MOSFET and the power supply voltage Vcc will be too small, resulting in an excessively large on-resistance Ron of the N-type MOSFET, which may even prevent it from conducting. If the power supply voltage Vcc is low, the N-type MOSFET may break down. Therefore, related technologies generally use P-type MOSFETs or transmission gates as power selection switches.

[0053] In a related technology, the power selection switch usually uses a P-type field-effect transistor. The conduction condition of the P-type field-effect transistor is that the gate voltage is less than the source / drain voltage. Therefore, the source of the P-type field-effect transistor receives the power supply voltage Vcc, and a low level is applied to the gate of the P-type field-effect transistor to turn on the P-type field-effect transistor. The parasitic capacitance of the P-type field-effect transistor can meet the isolation requirements, but its size and on-resistance Ron are larger than those of the N-type field-effect transistor, and the switching speed is slower. In addition, in the scenario where the power supply voltage Vcc changes, when the power supply voltage VCC is small, the voltage difference between the gate and the source is small, and the on-resistance Ron is further increased, which is even more unable to meet the use requirements.

[0054] In another related technology, a transmission gate consisting of a P-type field-effect transistor and an N-type field-effect transistor connected in parallel is used as a power selection switch. Because the N-type field-effect transistor has a smaller on-resistance, and the resistance decreases when connected in parallel, the on-resistance of the N-type field-effect transistor and the P-type field-effect transistor is smaller when connected in parallel, which can meet the requirement of low on-resistance Ron. However, due to the characteristic that the capacitance increases when capacitors are connected in parallel, the parasitic capacitance of the N-type field-effect transistor and the P-type field-effect transistor connected in parallel increases, which will reduce the isolation of the power selection switch from the RF signal. In addition, the parallel connection of the two transistors will increase the switch area and cost.

[0055] The development of fifth-generation mobile communication technology (5G) requires the use of RF front-ends with higher frequencies, wider bandwidths, and higher-order QAM modulation compared to previous 4G or 3G technologies. This places more stringent demands on various performance indicators such as efficiency, power consumption, and isolation of the power amplifier in the RF front-end. Consequently, improvements are required in the power amplifier's power supply mode, power path losses, and isolation. However, in some power supply modes, the power amplifier's power selector switch must have both low on-resistance and very low parasitic capacitance. However, related technologies can only achieve a compromise between these two requirements and cannot meet both requirements simultaneously.

[0056] In order to maintain the requirements of small on-resistance and parasitic capacitance when the power supply changes, the present application provides a power selection switch circuit, which uses an N-type field-effect transistor as a power selection switch, which has a small parasitic capacitance; by controlling the gate voltage of the N-type field-effect transistor to follow the power supply voltage change, it can maintain a small on-resistance without being broken down, thereby solving the problem that the existing technology cannot provide a power selection switch with both small on-resistance and small parasitic capacitance when the power supply changes.

[0057] Please refer to Figure 1, which shows a schematic diagram of the structure of a power selection switch circuit provided in one embodiment of the present application. As shown in Figure 1, the power selection switch circuit 10 includes a power selection switch 101 and a boost circuit 102. The input end of the boost circuit 102 is used to receive the power supply voltage Vcc, and the output end of the boost circuit 102 is connected to the power selection switch 101. The boost circuit 102 is used to raise the received power supply voltage Vcc by a preset amplitude ΔV to obtain a control voltage Vg, that is, the control voltage Vg = Vcc + ΔV. The boost circuit 102 outputs the control voltage Vg to the power selection switch 101 to control the power selection switch 101 to conduct.

[0058] In the embodiment of the present application, the power selection switch 101 is implemented using an N-type field-effect transistor NM1, wherein the gate of the N-type field-effect transistor NM1 is connected to the output end of the boost circuit 102, thereby receiving the control voltage Vg, the drain of the N-type field-effect transistor NM1 is used to receive the power supply voltage Vcc, and the source is used to connect to the power amplifier PA. When the N-type field-effect transistor NM1 is turned on under the action of the control voltage Vg, the power supply voltage Vcc is transmitted to the power amplifier PA through the turned-on N-type field-effect transistor NM1, thereby powering the power amplifier PA.

[0059] In the embodiment of the present application, the drain voltage Vd of the N-type field-effect transistor NM1 is the power supply voltage Vcc. The power supply voltage Vcc is received and boosted by a preset amplitude ΔV by the boost circuit 102 to control the N-type field-effect transistor NM1, such that the gate voltage of the N-type field-effect transistor NM1 is Vg = Vcc + ΔV, and the gate-drain voltage difference Vgd = Vg - Vd = ΔV. Therefore, regardless of whether the power supply voltage Vcc changes, and the magnitude of the change, the gate-drain voltage difference of the N-type field-effect transistor NM1 can be maintained at the preset amplitude ΔV. The preset amplitude ΔV is greater than the turn-on threshold voltage Vth of the N-type field-effect transistor NM1, that is, the gate-drain voltage difference of the N-type field-effect transistor NM1 is greater than its threshold voltage. Therefore, the N-type field-effect transistor NM1 can maintain a small on-resistance Ron, enabling rapid turn-on and low insertion loss after turn-on. In addition, the breakdown voltage of a field-effect transistor is generally greater than or equal to 1.1 times its withstand voltage. However, the present application sets the preset amplitude ΔV to be less than 1.1 times the withstand voltage of the N-type field-effect transistor NM1, thereby ensuring that the voltage difference between any two poles of the N-type field-effect transistor NM1 is less than its breakdown voltage, thereby preventing the N-type field-effect transistor NM1 from being broken down and improving the reliability of the power selection switch.

[0060] Based on this, the power selection switch circuit provided in the embodiments of the present application uses an N-type field-effect transistor (MOSFET) as the power selection switch. Its low parasitic capacitance provides excellent isolation from RF signals when the MOSFET is turned off. A boost circuit is used to ensure that the gate voltage of the N-type MOSFET follows the power supply voltage and maintains the gate-drain voltage difference at a preset amplitude. The voltage range of the preset amplitude is cleverly set to ensure that the NMOS transistor maintains a low on-resistance Ron without experiencing breakdown. Compared to related technologies, the power selection switch circuit in the embodiments of the present application can simultaneously reduce the parasitic capacitance and on-resistance of the power selection switch, helping to reduce losses in the power supply path and improve the power efficiency of the power amplifier. It is applicable to a wider range of application scenarios and more demanding power supply modes. For example, it can be applied not only to power amplifiers using the APT (average power tracking) power supply mode, but also to power amplifiers using the ET (envelope tracking) power supply mode.

[0061] Optionally, the N-type field effect transistor in the embodiment of the present application may be an N-channel semiconductor field effect transistor or an N-channel metal oxide semiconductor field effect transistor (NMOS).

[0062] As an embodiment, as shown in FIG2 , the power selection switch circuit 10 is applied to a radio frequency front-end module, which further includes a power supply module and a power amplifier PA. The power supply voltage Vcc is generated by the power supply module. For example, the power supply module can be a direct current switching power supply (DC-DC) to generate a fixed or variable power supply voltage Vcc according to the power supply mode requirements of the power amplifier PA. The power selection switch circuit 10 is connected between the power supply module and the power amplifier PA. When turned on, it transmits the power supply voltage output by the corresponding power supply module to the power amplifier PA to power the power amplifier PA.

[0063] It should be understood that in the power selection switch circuit 10, the drain of the N-type field-effect transistor NM1 and the input of the boost circuit can be directly connected to the output of the power supply module, or indirectly connected to the output of the power supply module through circuit elements such as resistors and transistors, as long as the power supply voltage can be obtained. In other words, the power supply voltage Vcc obtained by the drain of the N-type field-effect transistor NM1 and the input of the boost circuit can be the output voltage of the power supply module, or it can be a voltage obtained by dividing the output voltage of the power supply module or other processing, and this application does not limit this.

[0064] In one embodiment, the preset amplitude ΔV is at least twice the turn-on threshold voltage of the N-type field-effect transistor NM1. In other words, the gate-drain voltage difference of the N-type field-effect transistor is at least twice its turn-on threshold voltage. For example, when the turn-on threshold voltage of the N-type field-effect transistor is 1V, the preset amplitude ΔV is ≥ 2V, and the gate-drain voltage difference Vgd of the N-type field-effect transistor is ≥ 2V.

[0065] An N-type field-effect transistor (MOSFET) can be turned on when the gate-drain voltage difference is greater than the turn-on threshold voltage. However, when the gate voltage difference approaches its turn-on threshold voltage, the N-type MOSFET has a higher on-resistance, which affects its switching speed and insertion loss after turning on. In this embodiment, the preset amplitude is set to at least twice the turn-on threshold voltage of the N-type MOSFET, so that the gate-drain voltage difference of the N-type MOSFET is at least 1 times greater than the turn-on threshold voltage. This can reduce the on-resistance of the N-type MOSFET, speed up its switching speed, and reduce the insertion loss after turning on, thereby enabling the N-type MOSFET to simultaneously meet the requirements of low on-resistance and low parasitic capacitance.

[0066] In one embodiment, the N-type field-effect transistor NM1 has a turn-on threshold voltage Vth less than or equal to 1V, and a preset amplitude ΔV greater than or equal to 3V. Thus, the gate-drain voltage difference of the N-type field-effect transistor NM1 is at least 2V greater than its turn-on threshold voltage Vth, which can further reduce the on-resistance of the N-type field-effect transistor NM1, accelerate its switching speed, further deepen the conduction level of the N-type field-effect transistor NM1, and further reduce its insertion loss after conduction. Exemplarily, the N-type field-effect transistor NM1 is an NMOS transistor with a turn-on threshold voltage Vth of 0.7V. The preset amplitude ΔV is greater than or equal to 3V, which is at least 2.3V greater than its turn-on threshold voltage Vth, enabling the NMOS transistor to be turned on more quickly and deeply.

[0067] As an embodiment, the N-type field effect transistor NM1 is a 5V device, that is, the withstand voltage value of the N-type field effect transistor NM1 is 5V. When the voltage difference between any two poles of the N-type field effect transistor NM1 exceeds 10% of the withstand voltage value (that is, the voltage difference between any two poles exceeds 5.5V), the N-type field effect transistor NM1 is at risk of breakdown. Therefore, the preset amplitude ΔV can be set to be less than or equal to 5.5V to reduce the risk of breakdown of the N-type field effect transistor NM1 and ensure the reliability of the power selection switch circuit 10.

[0068] As an embodiment, the preset amplitude ΔV is set equal to the withstand voltage of the N-type field effect transistor NM1. For example, when the withstand voltage of the N-type field effect transistor NM1 is 5V, the preset amplitude ΔV can be set to 5V. In this way, the N-type field effect transistor NM1 can obtain the minimum on-resistance Ron without breaking down, thereby maximizing its switching speed and reducing its insertion loss after turning on.

[0069] In the embodiment of the present application, the boost circuit 102 can have various implementations, and the preset amplitude ΔV that the boost circuit 102 raises based on the power supply voltage Vcc can also be flexibly set as needed. For example, the following embodiments describe some implementations of the boost circuit 102 in conjunction with Figures 3-8.

[0070] In some embodiments, as shown in FIG3 , the boost circuit 102 includes a voltage-to-current conversion circuit 1021, a current mirror circuit 1022, and a current-to-voltage conversion circuit 1023. The voltage-to-current conversion circuit 1021 is configured to convert a power supply voltage Vcc into a first current I1. The ratio of the power supply voltage Vcc to the first current I1 is represented by a first resistance r1, where r1 = Vcc / I1. The current mirror circuit 1022 is configured to mirror the first current I1 at a predetermined current ratio k to generate a second current I2, i.e., I2 = k*I1. The current-to-voltage conversion circuit 1023 is configured to receive the second current I2 and the third current I3 and convert the sum of the second and third currents into a first voltage V1. If the sum of the second current I2 and the third current I3 is represented by a fourth current I4, and the ratio of the first voltage V1 to the fourth current I4 is represented by a second resistance r2, then I4 = I2 + I3, and r2 = V1 / I4.

[0071] In this embodiment, the third current I3 is set according to the desired preset amplitude ΔV and the second resistance r2, so that the ratio of the preset amplitude ΔV to the third current I3 is equal to the second resistance r2, then ΔV=r2*I3. By converting the above formulas, we can get:

[0072] V1=r2*I4

[0073] =r2*(I2+I3)

[0074] =r2*I2+r2*I3

[0075] =r2*I2+ΔV

[0076] =r2*k*I1+ΔV

[0077] =r2*k*(Vcc / r1)+ΔV

[0078] =Vcc*k*r2 / r1+ΔV

[0079] In this embodiment, by setting the circuit parameters of the voltage-current conversion circuit 1021, the current mirror circuit 1022 and the current-voltage conversion circuit 1023, the ratio of the first resistance r1 to the second resistance r2 is equal to the current ratio k, then k = r1 / r2. Combining the above formula, it can be obtained that: V1 = Vcc + ΔV, and the first voltage V1 that is raised by the preset amplitude ΔV on the basis of the power supply voltage Vcc can be obtained.

[0080] The output terminal of the current-to-voltage conversion circuit 1023 is connected to the gate of the N-type field-effect transistor NM1, thereby outputting the first voltage V1 to the gate of the N-type field-effect transistor NM1 as the gate voltage Vg of NM1, so that the gate-drain voltage difference of the N-type field-effect transistor NM1 is equal to the preset amplitude ΔV. In combination with the above embodiments, by cleverly setting the value of the preset amplitude ΔV, the N-type field-effect transistor can simultaneously meet the requirements of low on-resistance and low parasitic capacitance.

[0081] The boost circuit of the embodiment of the present application can track changes in Vcc in real time, rapidly generating a first voltage V1 that is higher than the power supply voltage Vcc by a preset amplitude ΔV, thus offering the advantage of real-time response. By using the first voltage V1 to control the on / off state of an N-type field-effect transistor (NM1), the N-type field-effect transistor (NM1) can simultaneously meet the requirements of low on-resistance and low parasitic capacitance, thereby accelerating the switching speed of the N-type field-effect transistor (NM1), reducing its on-resistance and insertion loss, and improving the efficiency of the power amplifier.

[0082] As an embodiment, based on Ohm's law, a resistor element can be used to achieve conversion between current and voltage. Specifically, the voltage-current conversion circuit 1021 may include a first resistor R1. When the power supply voltage Vcc is applied to both ends of the first resistor R1, which has a resistance of r1, a current I1 flowing through the first resistor R1 is generated. The current-voltage conversion circuit 1023 may include a second resistor R2, wherein the resistance of the second resistor R2 is r2. When the fourth current I4 flows through the second resistor R2, a voltage difference of I4*r2 is generated across the second resistor R2. When one end of the second resistor R2 is grounded, the voltage at the other end is the first voltage V1=I4*r2.

[0083] Exemplarily, as shown in FIG4 , the voltage-current conversion circuit 1021 includes an operational amplifier A1, a first transistor M1, and a first resistor R1, wherein: the first electrode of the first transistor is used to receive a power supply voltage Vdd of the boost circuit, the first input terminal of the operational amplifier A1 is used to receive a power supply voltage Vcc, the second input terminal of the operational amplifier A1 is connected to the second electrode of the first transistor M1, and the output terminal of the operational amplifier is connected to the control electrode of the first transistor M1; one end of the first resistor R1 is connected to the second electrode of the first transistor M1 and the second input terminal of the operational amplifier A1, and the other end is used to be grounded; wherein the resistance value of the first resistor R1 is equal to the first resistance value r1, and in order for the boost circuit to work normally, the power supply voltage Vdd of the boost circuit is greater than its output voltage V1, that is, the difference between Vdd and Vcc is at least greater than a preset amplitude ΔV.

[0084] Optionally, the first transistor M1 may be a field effect transistor or a triode. If the first transistor M1 is a field effect transistor, the first electrode and the second electrode of the first transistor M1 are the source and the drain respectively; if the first transistor M1 is a triode, the first electrode and the second electrode of the first transistor M1 are the collector and the emitter respectively.

[0085] Based on the principle of virtual short circuit of the operational amplifier, the voltages at the two input terminals of the operational amplifier A1 are the same during normal operation. Therefore, the voltage at the second input terminal of the operational amplifier A1, that is, the voltage at one end of the first resistor R1, is equal to the power supply voltage Vcc received by the first input terminal of the operational amplifier A1. Since the other end of the first resistor R1 is grounded, the voltage difference across the first resistor R1 is Vcc. According to Ohm's law, the current flowing through the first resistor is I1 = Vcc / r1. Since the first transistor M1 is connected in series with the first resistor R1, the current flowing through the source and drain of the first transistor M1 is also I1. The first transistor M1 also includes a third electrode, which is the gate or base, and is used to connect to a current mirror circuit so that the current mirror circuit can mirror the current I1 flowing through the first transistor M1, thereby obtaining a second current I2.

[0086] For example, as shown in FIG4 , the current mirror circuit includes a second transistor M2 . The second transistor M2 and the first transistor M1 are of the same type, and the two are connected in a current mirror manner to mirror the first current I1 . Like the first transistor M1 , the second transistor M2 also includes a first electrode, a second electrode, and a third electrode. The third electrode of the second transistor M2 is connected to the third electrode of the first transistor M1 . The first electrode of the second transistor M2 is used to receive the power supply voltage Vdd of the boost circuit, and the second electrode of the second transistor M2 is used to output the second current I2 .

[0087] The ratio of the second current I2 to the first current I1 (i.e., the predetermined current ratio) is related to the sizes of the second transistor M2 and the first transistor M1. Taking a field-effect transistor as an example, the current ratio k is equal to the ratio of the width-to-length ratio of the second transistor M2 to the width-to-length ratio of the first transistor M1. If the second transistor M2 and the first transistor M1 are the same size, the current ratio k = 1.

[0088] For example, as shown in FIG4 , the third current I3 can be generated by a current source. In order to generate a first voltage V1 with an amplitude equal to Vcc+ΔV at one end of the second resistor R2, the required magnitude of the third current is determined according to the required preset amplitude ΔV and the resistance r2 of the second resistor R2, and a suitable current source is selected to obtain the third current. For example, when ΔV=5V and V1=Vcc+5V are required, a current source with an output current of 5V / r2 can be selected. Optionally, the current source can be implemented using a circuit structure similar to the voltage-current conversion circuit 1021, or it can be implemented using a digital current source. If the current source is a digital current source, the value of the required third current I3 is determined according to the required amplitude of ΔV and the resistance of the second resistor r2, and the corresponding code value is input to the digital current source to obtain the required third current I3. If the current source employs a circuit structure similar to that of the voltage-to-current conversion circuit 1021, a voltage having an amplitude equal to ΔV is input to the input terminal of the circuit structure, and a resistor having a resistance equal to r2 is employed in the circuit structure, thereby generating a third current I3 having a magnitude equal to ΔV / r2. It should be understood that the current source may also be implemented in other ways, and this application does not limit the specific implementation thereof; as long as the current source can generate a third current I3 having a magnitude equal to ΔV / r2, it will suffice.

[0089] As shown in FIG4 , the second electrode of the second transistor M2 and the output end of the current source are both connected to one end of the second resistor R2 , and the other end of the second resistor R2 is grounded. Therefore, the fourth current I4 flowing through the second resistor R2 is the sum of the second current I2 output by the second transistor M2 and the third current I3 output by the current source. The fourth current passes through the resistor R2 and generates a voltage difference equal to I4*r2 across the second resistor R2 , thereby obtaining a first voltage V1=I4*r2=Vcc+ΔV at the ungrounded end of the second resistor R2 . By connecting one end of the second resistor R2 to the gate of the N-type field-effect transistor NM1 , the first voltage V1 can be used to control the on / off state of the N-type field-effect transistor NM1 , maintaining the gate-drain voltage difference of the N-type field-effect transistor NM1 at a predetermined value ΔV, thereby simultaneously meeting the requirements of low on-resistance and low parasitic capacitance for the power selection switch.

[0090] As an implementation method, the resistance value of the first resistor R1 can be equal to the resistance value of the second resistor R2. At this time, the mirror ratio k of the current mirror circuit to the first current is 1, and the second transistor M2 and the first transistor M1 of the same size can be used to make the preset current ratio 1.

[0091] In some embodiments, the boost circuit 102 can also be implemented using a bootstrap switch. For example, as shown in FIG5 , the boost circuit 102 includes a first bootstrap switch circuit 1024 and a second bootstrap switch circuit 1025 . The first bootstrap switch circuit 1024 and the second bootstrap switch circuit 1025 each receive a power supply voltage Vcc and a second voltage V2 having a preset amplitude ΔV, and generate a third voltage V3 based on the power supply voltage Vcc and the second voltage V2. The amplitude of the third voltage V3 is equal to the sum of the amplitude of the power supply voltage Vcc and the preset amplitude ΔV, i.e., V3 = Vcc + ΔV.

[0092] The first bootstrap switch circuit 1024 is configured to output a third voltage V3 during a second time period T2, and the second bootstrap switch circuit 1025 is configured to output the third voltage V3 during a first time period T1. The first time period T1 and the second time period T2 are connected. The output terminals of the first bootstrap switch circuit 1024 and the second bootstrap switch circuit 1025 are respectively connected to the gate of the N-type field-effect transistor NM1, so that the third voltage V3 controls the conduction of the N-type field-effect transistor NM1.

[0093] The working principle of the bootstrap switch circuit is to use the charge transfer of the capacitor to raise the voltage on the capacitor plate. Since charging the capacitor requires a certain amount of time, a single bootstrap switch circuit can only generate the required third voltage V3 during part of a cycle. The embodiment of the present application provides two bootstrap switch circuits with alternating outputs. During the process of charging the capacitor inside the first bootstrap switch circuit, the second bootstrap switch circuit can output the third voltage V3; during the process of charging the capacitor inside the second bootstrap switch circuit, the first bootstrap switch circuit can output the third voltage V3. Thus, the third voltage V3 can be obtained during the complete cycle. When the power supply module corresponding to the power selection switch circuit 10 is selected, the gate voltage of the N-type field effect transistor NM1 is always maintained at Vcc+ΔV. Regardless of how the power supply voltage Vcc changes, the gate-drain voltage difference of the N-type field effect transistor NM1 remains unchanged at ΔV. Combined with the amplitude of ΔV set in the above embodiment, the N-type field effect transistor NM1 can maintain a small on-resistance Ron during the conduction period, thereby reducing the insertion loss of the power selection switch.

[0094] In one embodiment, both the first bootstrap switch circuit 1024 and the second bootstrap switch circuit 1025 operate periodically, and the operating cycles of the first bootstrap switch circuit 1024 and the second bootstrap switch circuit 1025 are of the same duration, but operate in opposite timings. In other words, within an operating cycle of the boost circuit 102, if the first bootstrap switch circuit 1024 outputs the third voltage V3 in the first half of the cycle and charges in the second half of the cycle, the second bootstrap switch circuit 1025 charges in the first half of the cycle and outputs the third voltage V3 in the second half of the cycle. Conversely, if the first bootstrap switch circuit 1024 charges in the first half of the cycle and outputs the third voltage V3 in the second half of the cycle, the second bootstrap switch circuit 1025 outputs the third voltage in the first half of the cycle and charges in the second half of the cycle.

[0095] As an embodiment, as shown in FIG6 , the first bootstrap switch circuit 1024 includes a first capacitor C1, wherein, in a first time period T1, a first end of the first capacitor C1 is used to receive a second voltage V2, and a second end of the first capacitor C1 is used to be grounded; and in a second time period T2, a first end of the first capacitor C1 is used to connect to a gate of an N-type field effect transistor NM1, and a second end of the first capacitor C1 is used to receive a power supply voltage Vcc.

[0096] During the first time period T1, the second voltage V2 charges the first capacitor C1, causing the voltage at the first end of the first capacitor to gradually rise to the second voltage V2. At the beginning of the second time period T2, the second end of the first capacitor C1 switches from grounding to receiving the power supply voltage Vcc, and the voltage at the second end of the first capacitor C1 rises by Vcc. Since the voltage across the capacitor cannot change suddenly, the voltage at the first end of the first capacitor C1 also rises by Vcc, becoming V2+Vcc, thereby obtaining the required third voltage V3=V2+Vcc=Vcc+ΔV. Based on the charge storage function of the capacitor, the voltage at the first end of the first capacitor C1 can be maintained at V3 during the second time period T2. When the second time period T2 ends, the first capacitor C1 is recharged and the above process is repeated. Therefore, the first end of the first capacitor C1 can output the third voltage V3 during the second time period T2 of each cycle.

[0097] The second bootstrap switch circuit 1025 includes a second capacitor C2, wherein, in the first time period T1, the first end of the second capacitor C2 is used to connect to the gate of the N-type field effect transistor NM1, and the second end of the second capacitor is used to receive the power supply voltage Vcc; in the second time period T2, the first end of the second capacitor C2 is used to receive the second voltage V2, and the second end of the second capacitor is used to be grounded.

[0098] The working principle of the second bootstrap switch circuit 1025 is the same as that of the first bootstrap switch circuit 1024 , except that the timing is reversed, and will not be further described here.

[0099] In this embodiment, in the first time period T1 of each cycle, the first end of the second capacitor C2 outputs the third voltage, and in the second time period T2 of each cycle, the first end of the first capacitor C1 outputs the third voltage, so that the boost circuit can maintain the output of the third voltage V3 throughout the entire cycle.

[0100] The two ends of the first capacitor C1 and the second capacitor C2 can be switched to different signal terminals through different switches to selectively switch to receive power supply voltage Vcc or ground or connect to the gate of N-type field effect transistor NM1.

[0101] Exemplarily, as shown in FIG6 , the first bootstrap switch circuit 1024 further includes a first switch S1, a second switch S2, a third switch S3, and a fourth switch S4, wherein: a first end of the first switch S1 is grounded, and a second end of the first switch S1 is connected to the second end of the first capacitor C1; a first end of the second switch S2 is connected to a voltage source to receive a second voltage V2 output by the voltage source, and a second end of the second switch S2 is connected to the first end of the first capacitor C1; a first end of the third switch S3 is used to receive a power supply voltage Vcc, and a second end of the switch S3 is connected to the second end of the first capacitor C1; a first end of the fourth switch S4 is connected to the first end of the first capacitor C1, and a second end of the fourth switch S4 is connected to the gate of the N-type field effect transistor NM1; wherein the first switch S1 and the second switch S2 are turned on in a first time period T1 and turned off in a second time period T2; the third switch S3 and the fourth switch S4 are turned off in the first time period T1 and turned on in the second time period T2.

[0102] In a first time period T1, the first switch S1 and the second switch S2 are turned on, the third switch S3 and the fourth switch S4 are turned off, the first end of the first capacitor C1 receives the second voltage V2 output by the voltage source, and the second end is grounded. The first capacitor C1 is charged by the second voltage V2, so that the voltage at the first end of the first capacitor C1 gradually rises to V2.

[0103] At the beginning of the second time period T2, the first switch S1 and the second switch S2 are turned off, and the third switch S3 and the fourth switch S4 are turned on. The second end of the first capacitor C1 is switched from ground to receiving the power supply voltage Vcc, and the voltage is raised by Vcc. The voltage at the first end of the first capacitor C1 is also raised by Vcc on the basis of V2, becoming V2+Vcc, thereby obtaining the required third voltage V3=V2+Vcc=Vcc+ΔV. Due to the charge storage effect of the capacitor, the voltage at the first end of the first capacitor C1 can be maintained at V3 during the second time period T2. When the second time period T2 ends and the next first time period T1 begins, the first capacitor C1 is recharged and the above process is repeated. Therefore, the first end of the first capacitor C1 can output the third voltage V3 during the second time period T2 of each cycle.

[0104] For example, as shown in FIG7 , the second bootstrap switch circuit 1025 further includes a fifth switch S5, a sixth switch S6, a seventh switch S7, and an eighth switch S8, wherein: a first end of the fifth switch S5 is grounded, and a second end of the fifth switch S5 is connected to the second end of the second capacitor C2; a first end of the sixth switch S6 is connected to a voltage source to receive a second voltage V2 output by the voltage source, and a second end of the sixth switch S6 is connected to the first end of the second capacitor C2; a first end of the seventh switch S7 is connected to the second end of the second capacitor C2 by receiving a power supply voltage Vcc, and a second end of the seventh switch S7 is connected to the second end of the second capacitor C2; a first end of the eighth switch S8 is connected to the first end of the second capacitor C2, and a second end of the eighth switch S8 is connected to the gate of the N-type field effect transistor NM1; wherein the fifth switch S5 and the sixth switch S6 are turned off in the first time period T1 and turned on in the second time period T2; and the seventh switch S7 and the eighth switch S8 are turned on in the first time period T1 and turned off in the second time period T2.

[0105] The working principle of the circuit shown in FIG7 is similar to that of FIG6 , except that the timing is reversed, and will not be described again here.

[0106] As an implementation method, the second voltage can be obtained by using the bandgap reference circuit and low-dropout regulator (LDO) in the chip, that is, the voltage source can reuse the bandgap reference circuit and low-dropout regulator (LDO) in the chip, thereby saving circuit area and reducing circuit cost.

[0107] As another implementation, the voltage source may also be implemented by a digital-to-analog converter (DAC), which can generate a voltage signal of a desired amplitude based on an input digital signal.

[0108] For example, when a voltage of V3 = Vcc + 5V needs to be output, the parameters of the LDO circuit can be set so that it outputs a voltage with an amplitude of 5V as the second voltage, or other 5V voltage sources can be selected to generate the second voltage V2 with an amplitude of 5V.

[0109] According to the bootstrap switch circuit structure shown in Figures 6 and 7, the boost circuit can maintain the output of the third voltage V3 throughout the entire cycle through two capacitors and a number of switches. The circuit structure is simple and the cost is low. The third voltage V3, which changes with the power supply voltage Vcc, is used to control the conduction or shutdown of the N-type field effect transistor NM1. This enables the power selection switch to simultaneously meet the requirements of small on-resistance and small parasitic capacitance, thereby accelerating the switching speed of the N-type field effect transistor NM1, reducing the on-resistance and insertion loss of the N-type field effect transistor NM1, and improving the efficiency of the power amplifier.

[0110] In some embodiments, the boost circuit 102 may also be implemented using a charge pump. For example, as shown in FIG8 , the boost circuit 102 includes a charge pump 1026 , wherein the input of the charge pump 1026 is configured to receive the power supply voltage Vcc, and the output of the charge pump 1026 is connected to the gate of the N-type field effect transistor NM1 .

[0111] After the charge pump 1026 is enabled, its output voltage Vout gradually increases based on the input voltage Vcc. When the output voltage Vout increases by a predetermined value, ΔV, the charge pump output voltage Vout stabilizes at Vcc + ΔV. For example, when Vcc is used as the input signal of the charge pump 1026 and a square wave signal with a high level of 5V and a low level of 0V is used as the clock signal of the charge pump 1026, the output voltage Vout of the charge pump 1026 will start to increase from Vcc and stabilize after reaching Vout = Vcc + 5V.

[0112] By connecting the output of charge pump 1026 to the gate of N-type field-effect transistor NM1, voltage Vcc+ΔV can be used to control the on / off of N-type field-effect transistor NM1. This ensures that the gate-drain voltage difference of N-type field-effect transistor NM1 remains constant at ΔV regardless of changes in power supply voltage Vcc. Combined with the magnitude of ΔV set in the aforementioned embodiment, the on-resistance Ron of N-type field-effect transistor NM1 can be kept small during the on-state period, thereby simultaneously meeting the requirements of low parasitic capacitance and low on-resistance.

[0113] As an embodiment, the charge pump 1026 includes at least one charge pump unit, and the output voltage of each charge pump unit is the sum of its input voltage and the high-level amplitude of the clock signal clk. The amplitude of the clock signal of the charge pump 1026 at a high level is 1 / N of the preset amplitude ΔV. Thus, after N charge pump units are cascaded, the power supply voltage Vcc can be raised to Vcc+ΔV, where N is a positive integer. For example, N can be equal to 1, i.e., the amplitude of the clock signal clk of the charge pump 1026 at a high level is equal to the preset amplitude ΔV. In this case, the charge pump 1026 can include only one charge pump unit.

[0114] For example, the charge pump unit may employ the circuit structure shown in FIG9 , wherein the amplitudes of ClkA and ClkB when they are high are both 1 / N times ΔV, and the high-level times of ClkA and ClkB do not overlap. Alternatively, the charge pump unit may employ other circuit structures, which are not limited in this application.

[0115] The embodiment of the present application raises the power supply voltage Vcc to Vcc+ΔV through a charge pump, which has the advantages of simple circuit structure and low cost.

[0116] An embodiment of the present application further provides a chip, as shown in FIG10 . The chip 90 may include one or more power selection switch circuits 10 as described in any of the above embodiments.

[0117] Among them, chip 90 can be applied to the RF front-end module, which also includes a power supply module and a power amplifier PA. The power selection switch circuit 10 is connected between the power supply module and the power amplifier PA, so that when it is turned on, the power supply voltage Vcc output by the power supply module is transmitted to the power amplifier PA to power the power amplifier PA.

[0118] In some embodiments, the power amplifier PA requires multiple power supply modules to supply power, and accordingly, multiple power supply selection switch circuits 10 are required. Each power supply module is connected to the power supply terminal of the power amplifier PA through a corresponding power supply selection switch circuit 10. Optionally, the multiple power supply selection switch circuits 10 can be integrated into a single chip or integrated into different chips.

[0119] Exemplarily, the chip 90 includes at least two power selection switch circuits 10, and the drain of the N-type field effect transistor in each power selection switch circuit 10 is used to connect to the corresponding power supply module to receive the power supply voltage output by the corresponding power supply module. The source of the N-type field effect transistor in each power selection switch circuit is used to connect to the power supply end of the power amplifier PA, so that when the N-type field effect transistor is turned on, the corresponding power supply module is selected to power the power amplifier PA.

[0120] The chip 90 of the embodiment of the present application adopts the above-mentioned power selection switch circuit 10, which can simultaneously meet the requirements of small parasitic capacitance and small on-resistance of the power selection switch, speed up the switching speed of the power selection switch and reduce its insertion loss.

[0121] As an embodiment, as shown in FIG11 , the chip 90 further includes an enabling circuit 901, which is configured to enable at least one power selection switch circuit 10. For example, when multiple power supply modules are provided in the RF front-end module, and the power amplifier only requires power from one of the power supply modules at the same time, the enabling circuit 901 selects the power selection switch circuit 10 corresponding to the currently required power supply module from the multiple power selection switch circuits 10 and enables it, while disabling the other power selection switch circuits 10, thereby preventing multiple power supply modules from simultaneously supplying power to the power amplifier PA and interfering with each other.

[0122] Optionally, the power selection switch circuit 10 and the power amplifier PA may be integrated into the same chip, or independently provided in different chips.

[0123] When the power selection switch circuit 10 and the power amplifier PA are integrated into the same chip, the chip 90 also includes the power amplifier PA. Integrating the power selection switch circuit 10 and the power amplifier PA together helps improve the chip integration and make the RF front-end module more miniaturized.

[0124] When the power selection switch circuit 10 and the power amplifier are independently provided in different chips, the power amplifier PA is not included in the chip 90, and the power amplifier PA can be integrated into other chips of the RF front-end module. In this case, the power selection switch circuit 10 and the power amplifier PA can adopt different chip processes. For example, the power selection switch circuit 10 can adopt a CMOS (Complementary Metal-Oxide-Semiconductor) process, and the power amplifier PA can adopt an HBT (Heterojunction bipolar transistor) process, making the production process of the RF front-end module more flexible.

[0125] An embodiment of the present application further provides a radio frequency front-end module, which includes a power amplifier PA and a power selection switch circuit 10 as described in any of the aforementioned embodiments.

[0126] Optionally, the RF front-end module further includes at least one power supply module for supplying power to the power amplifier PA, and the power selection switch circuit 10 is connected between the corresponding power supply module and the power amplifier PA. Alternatively, the power supply module can be disposed outside the RF front-end module and electrically connected to the power selection switch circuit 10 in the RF front-end module.

[0127] As an embodiment, as shown in FIG12 , the RF front-end module further includes a substrate 110 and a first chip 111 and a second chip 112 disposed on the substrate, wherein the power amplifier PA is integrated in the first chip 111, and the power selection switch circuit 10 is integrated in the second chip 112. In this embodiment, the power selection switch circuit 10 and the power amplifier PA are independently disposed in different chips. Therefore, the power selection switch circuit 10 and the power amplifier PA can flexibly adopt different chip processes according to different circuit parameters. For example, the power selection switch circuit 10 can select a CMOS (Complementary Metal-Oxide-Semiconductor) process, and the power amplifier PA can select an HBT (Heterojunction bipolar transistor) process, making the production process of the RF front-end module more flexible.

[0128] As an embodiment, the RF front-end module further includes a control circuit 15, which is connected to the power amplifier PA and is used to control the operation of the power amplifier PA, such as controlling the power supply mode, operating mode, output power, etc. For example, the control circuit 15 can be implemented using a CMOS process.

[0129] Alternatively, as shown in FIG13 , the control circuit 15 may be integrated into the second chip 112. In this case, the power selection switch circuit 10 and the control circuit 15 are integrated into the second chip 112, thereby increasing the integration of the second chip 112 and reducing the area of ​​the RF front-end module. Alternatively, the enable circuit may also be integrated into the second chip 112 to further increase the integration of the second chip 112.

[0130] Optionally, the control circuit 15 may be independent of the second chip 112. For example, as shown in FIG14 , the RF front-end module further includes a third chip 113, and the control circuit 15 is integrated into the third chip 113. In this way, the power selection switch circuit 10 and the control circuit 15 are independently provided in different chips, which does not affect the structure of the control circuit 15 and facilitates the use of the power selection switch circuit 10 in conjunction with conventional chip products having the control circuit 15. In this case, the enable circuit of the power selection switch circuit 10 may be integrated with the control circuit 15 in the third chip 113, or may be integrated with the power selection switch circuit 10 in the second chip 112.

[0131] As an embodiment, as shown in FIG15 , the RF front-end module includes a substrate 110 and a fourth chip 114 disposed on the substrate 110. The power amplifier PA and the power selection switch circuit 10 are both integrated into the fourth chip 114. In this embodiment, integrating the power selection switch circuit 10 with the power amplifier PA helps improve chip integration and further miniaturize the RF front-end module.

[0132] In the above-mentioned embodiments, each chip may be packaged on the substrate 110 by the same or different packaging processes, and electrical connections between different chips may be achieved through traces on the substrate 110 .

[0133] The above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. A power selection switch circuit, characterized in that: include: A power selection switch, wherein the power selection switch is an N-type field effect transistor, the drain of the N-type field effect transistor is used to receive a power supply voltage, the source of the N-type field effect transistor is used to connect to a power amplifier, and when turned on, the power supply voltage is used to power the power amplifier; A boost circuit, wherein the input end of the boost circuit is used to receive the power supply voltage, the output end is connected to the gate of the N-type field effect transistor, and the boost circuit is used to raise the received power supply voltage to a preset amplitude and then output it; The preset amplitude is greater than the conduction threshold voltage of the N-type field effect transistor and less than 1.1 times the withstand voltage of the N-type field effect transistor.

2. The power selection switch circuit according to claim 1, characterized in that: The preset amplitude is at least twice the turn-on threshold voltage of the N-type field effect transistor.

3. The power selection switch circuit according to claim 2, characterized in that: The conduction threshold voltage of the N-type field effect transistor is less than or equal to 1V, and the preset amplitude is greater than or equal to 3V.

4. The power selection switch circuit according to claim 1, characterized in that: The withstand voltage of the N-type field effect tube is 5V, and the preset amplitude is less than or equal to 5.5V.

5. The power selection switch circuit according to claim 1, characterized in that: The preset amplitude is equal to the withstand voltage value of the N-type field effect transistor.

6. The power selection switch circuit according to claim 4, characterized in that: The withstand voltage of the N-type field effect tube is 5V, and the preset amplitude is 5V.

7. The power selection switch circuit according to claim 1, characterized in that: The boost circuit comprises: a voltage-current conversion circuit, configured to convert the power supply voltage into a first current, wherein a ratio of the power supply voltage to the first current is a first resistance value; A current mirror circuit, used for mirroring the first current according to a preset current ratio to obtain a second current; a current-voltage conversion circuit, configured to receive the second current and the third current, convert the sum of the second current and the third current into a first voltage, and output the first voltage to the gate of the N-type field effect transistor; The sum of the second current and the third current is the fourth current, the ratio of the first voltage to the fourth current is the second resistance, the ratio of the preset amplitude to the third current is equal to the second resistance, and the ratio of the first resistance to the second resistance is equal to the Current ratio.

8. The power selection switch circuit according to claim 7, characterized in that: The voltage-current conversion circuit comprises an operational amplifier, a first transistor and a first resistor, wherein: The first electrode of the first transistor is used to receive the power supply voltage of the boost circuit, the first input end of the operational amplifier is used to receive the power supply voltage, the second input end of the operational amplifier is connected to the second electrode of the first transistor, and the output end of the operational amplifier is connected to the control electrode of the first transistor; One end of the first resistor is connected to the second electrode of the first transistor, and the other end is grounded; wherein the resistance value of the first resistor is equal to the first resistance value.

9. The power selection switch circuit according to claim 8, characterized in that: The current-voltage conversion circuit includes a second resistor, one end of the second resistor is respectively connected to the current source and the output end of the current mirror circuit, and the other end of the second resistor is used for grounding; wherein, the current source is used to output the third current, and the resistance value of the second resistor is equal to the second resistance value.

10. The power selection switch circuit according to claim 9, characterized in that: The current ratio is 1, and the second resistance is equal to the first resistance.

11. The power selection switch circuit according to claim 1, characterized in that: The boost circuit includes a first bootstrap switch circuit and a second bootstrap switch circuit; The first bootstrap switch circuit and the second bootstrap switch circuit each receive the power supply voltage and the second voltage having the preset amplitude, and generate a third voltage based on the power supply voltage and the second voltage, wherein the amplitude of the third voltage is equal to the sum of the amplitude of the power supply voltage and the preset amplitude; The output ends of the first bootstrap switch circuit and the second bootstrap switch circuit are respectively connected to the gate of the N-type field effect transistor; The second bootstrap switch circuit is used to output the third voltage in a first time period, and the first bootstrap switch circuit is used to output the third voltage in a second time period, and the first time period and the second time period are connected.

12. The power selection switch circuit according to claim 11, characterized in that: The first bootstrap switch circuit comprises a first capacitor, wherein: In the first time period, the first end of the first capacitor is used to receive the second voltage, and the second end of the first capacitor is used to be grounded; In the second time period, the first end of the first capacitor is used to connect to the gate of the N-type field effect transistor, and the second end of the first capacitor is used to receive the power supply voltage.

13. The power selection switch circuit according to claim 12, characterized in that: The first bootstrap switch circuit further includes a first switch, a second switch, a third switch and a fourth switch, wherein: A first end of the first switch is grounded, and a second end is connected to a second end of the first capacitor; The first end of the second switch is used to connect to a voltage source to receive the second voltage output by the voltage source, and the second end of the second switch is connected to the first end of the first capacitor; The first end of the third switch is used to receive the power supply voltage, and the second end is connected to the second end of the first capacitor; A first end of the fourth switch is connected to a first end of the first capacitor, and a second end of the fourth switch is connected to a gate of the N-type field effect transistor; Wherein, the first switch and the second switch are turned on in the first time period and turned off in the second time period; The third switch and the fourth switch are turned off in the first time period, and are turned on in the second time period.

14. The power selection switch circuit according to claim 11, characterized in that: The second bootstrap switch circuit comprises a second capacitor, wherein: In the first time period, the first end of the second capacitor is used to connect the gate of the N-type field effect transistor, and the second end of the second capacitor is used to receive the power supply voltage; In the second time period, the first end of the second capacitor is used to receive the second voltage, and the second end of the second capacitor is used to be grounded.

15. The power selection switch circuit according to claim 14, characterized in that: The second bootstrap switch circuit further includes a fifth switch, a sixth switch, a seventh switch and an eighth switch, wherein: A first end of the fifth switch is grounded, and a second end is connected to the second end of the second capacitor; The first end of the sixth switch is used to connect to a voltage source to receive the second voltage output by the voltage source, and the second end of the sixth switch is connected to the first end of the second capacitor; The first end of the seventh switch is used to receive the power supply voltage, and the second end is connected to the second end of the first capacitor; A first end of the eighth switch is connected to a first end of the second capacitor, and a second end of the eighth switch is connected to a gate of the N-type field effect transistor; The fifth switch and the sixth switch are turned off in the first time period and turned on in the second time period; The seventh switch and the eighth switch are turned on in the first time period and turned off in the second time period.

16. The power selection switch circuit according to claim 1, characterized in that: The boost circuit comprises a charge pump, an input end of the charge pump is used to receive the power supply voltage, and an output end of the charge pump is connected to the gate of the N-type field effect transistor.

17. The power selection switch circuit according to claim 16, characterized in that: The amplitude of the clock signal of the charge pump at a high level is 1 / N of the preset amplitude, where N is a positive integer.

18. A chip, characterized in that: It comprises a power selection switch circuit as described in any one of claims 1-17.

19. The chip according to claim 18, characterized in that: The chip comprises at least two power selection switch circuits, the drain of the N-type field effect transistor in each power selection switch circuit is respectively used to connect to the corresponding power supply module to receive the power supply voltage output by the corresponding power supply module, and the source of the N-type field effect transistor in each power selection switch circuit is used to connect to the power supply end of the power amplifier; The chip further includes an enabling circuit, and the enabling circuit is used to enable at least one of the power selection switch circuits.

20. The chip according to claim 18, characterized in that The chip also includes the power amplifier.

21. A radio frequency front-end module, characterized in that: It comprises a power amplifier and a power selection switch circuit as described in any one of claims 1-17.

22. The radio frequency front-end module according to claim 21, characterized in that: The RF front-end module also includes a substrate and a first chip and a second chip disposed on the substrate. The power amplifier is integrated in the first chip, and the power selection switch circuit is integrated in the second chip.

23. The radio frequency front-end module according to claim 22, characterized in that: The RF front-end module also includes a third chip and a control circuit. The control circuit is integrated in the third chip. The control circuit is connected to the power amplifier and is used to control the operation of the power amplifier.

24. The radio frequency front-end module according to claim 23, characterized in that: The RF front-end module also includes a substrate and a fourth chip arranged on the substrate, and the power amplifier and the power selection switch circuit are both integrated in the fourth chip.

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