Flyback converter with improved response

Abstract

A flyback converter is described, configured to operate in a continuous mode with two primary side switches and one secondary side switch, wherein operation contains three switch states; a Primary state wherein both primary side switches are on and current increases in a transformer primary, a Circulate state wherein only one primary switch is on and current circulates in the transformer primary, and a Secondary state wherein both primary switches are off, the secondary side switch is on, and current flows from a transformer secondary into an output of the converter.

Description

[0001] FLYBACK CONVERTER WITH IMPROVED RESPONSE

[0002] FIELD

[0003] This disclosure relates to systems and methods for electrical power supplies. More specifically, the disclosed embodiments relate to flyback converters.

[0004] INTRODUCTION

[0005] Flyback power converters are ubiquitous in power converter applications due to their simplicity of construction, low parts count, and low cost. However, they typically are limited to lower power levels and lower output currents. Achieving higher power levels is not difficult but achieving high output current levels can be a challenge due to high peak and RMS currents in the transformer secondary and output filter. Interleaving multiple phases has brought some improvement, such as in offline power factor correction (PFO) converters. However, as flyback converter output current pulses vary in duration and amplitude, reduction in output filtering requirements is limited.

[0006] SUMMARY

[0007] The present disclosure provides systems, apparatuses, and methods relating to flyback converters.

[0008] In some examples, an electronic circuit includes: a flyback converter configured to operate in a continuous mode, the flyback converter including: a coupled inductor having a primary winding and a secondary winding; a first switch having a first input terminal, a first output terminal, and a first control terminal, wherein the first input terminal is coupled to a voltage input terminal and the first output terminal is coupled to a first end of the primary winding; a second switch having a second input terminal, a second output terminal, and a second control terminal, wherein the second input terminal is coupled to a second end of the primary winding; and a third switch having a third input terminal, a third output terminal, and a third control terminal, wherein the third input terminal is coupled to a first end of the secondary winding.

[0009] In some examples, a continuous-mode flyback converter includes: a transformer having a primary winding and a secondary winding; a first switch having a first input terminal, a first output terminal, and a first control terminal, wherein the first input terminal is coupled to a voltage input terminal and the first output terminal is coupled to a first end of the primary winding; a second switch having a second input terminal, a second output terminal, and a second control terminal, wherein the second input terminal is coupled to a second end of the primary winding; and a third switch having a third input terminal, a third output terminal, and a third control terminal, wherein the third input terminal is coupled to a first end of the secondary winding.

[0010] In some examples, a method for converting a DC input voltage to a DC output voltage includes: transitioning a continuous-mode flyback converter between three different switch states, wherein the flyback converter includes a transformer, two primary side switches, and one secondary side switch, and the three switch states include: a primary state wherein the two primary side switches are on and current increases in a primary side of the transformer; a circulate state wherein only one of the two primary switches is on and current circulates in the primary of the transformer; and a secondary state wherein both primary switches are off, the secondary side switch is on, and current flows from a transformer secondary into an output of the converter.

[0011] Features, functions, and advantages may be achieved independently in various embodiments of the present disclosure, or may be combined in yet other embodiments, further details of which can be seen with reference to the following description and drawings.

[0012] BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Fig. 1 is a schematic diagram depicting an isolated two-switch flyback converter.

[0014] Fig. 2 is a schematic diagram depicting an isolated two-switch flyback converter with separate control.

[0015] Fig. 3 is a schematic diagram depicting a first illustrative flyback converter in accordance with aspects of the present disclosure.

[0016] Fig. 4 is a table depicting switch control states of the flyback converter of Fig. 3 during various operating states.

[0017] Fig. 5 depicts gate drive, transformer voltage, and current waveforms of a singlephase example of the flyback converter of Fig. 3.

[0018] Fig. 6 depicts gate drive and transformer currents for a pre-biased operating mode example of the flyback converter of Fig. 3. Fig. 7 is a schematic diagram depicting a multiphase power converter utilizing the flyback converter of Fig. 3.

[0019] Fig. 8 depicts transformer primary and secondary output currents for a two-phase interleaved example of the multiphase power converter of Fig. 7.

[0020] Fig. 9 depicts transformer primary and secondary output currents for a three-phase interleaved example of the multiphase power converter of Fig. 7.

[0021] Fig. 10 depicts transformer primary and secondary output currents for a four-phase interleaved example of the multiphase power converter of Fig. 7.

[0022] Fig. 1 1 is a schematic diagram depicting a second illustrative flyback converter in accordance with aspects of the present disclosure.

[0023] Fig. 12 is a table depicting switch control states of the flyback converter of Fig. 11 .

[0024] Fig. 13 is a schematic diagram depicting a third illustrative flyback converter in accordance with aspects of the present disclosure.

[0025] Fig. 14 is a table depicting switch control states of the flyback converter of Fig. 13.

[0026] Fig. 15 is a schematic diagram depicting a fourth illustrative flyback converter for use in DC-AC conversion.

[0027] Fig. 16 is a table depicting switch control states of the flyback converter of Fig. 15.

[0028] Fig. 17 is a schematic diagram depicting a first solid-state transformer implementation of an AC-AC converter in accordance with aspects of the present disclosure.

[0029] Fig. 18 is a table depicting switch control states of the converter of Fig. 17.

[0030] Fig. 19 is a schematic diagram depicting a second solid-state transformer implementation of an AC-AC converter in accordance with aspects of the present disclosure.

[0031] Fig. 20 is a table depicting switch control states of the converter of Fig. 19 for inverting and non-inverting output polarities.

[0032] Fig. 21 is a schematic diagram depicting an AC-AC converter variation of the flyback converter of Fig. 11 .

[0033] Fig. 22 is a table depicting switch control states of the converter of Fig. 21 . DETAILED DESCRIPTION

[0034] Various aspects and examples of an improved flyback converter are described below and illustrated in the associated drawings. Unless otherwise specified, a flyback converter in accordance with the present teachings, and / or its various components, may contain at least one of the structures, components, functionalities, and / or variations described, illustrated, and / or incorporated herein. Furthermore, unless specifically excluded, the process steps, structures, components, functionalities, and / or variations described, illustrated, and / or incorporated herein in connection with the present teachings may be included in other similar devices and methods, including being interchangeable between disclosed embodiments. The following description of various examples is merely illustrative in nature and is in no way intended to limit the disclosure, its application, or uses. Additionally, the advantages provided by the examples and embodiments described below are illustrative in nature and not all examples and embodiments provide the same advantages or the same degree of advantages.

[0035] This Detailed Description includes the following sections, which follow immediately below: (1 ) Definitions; (2) Overview; (3) Examples, Components, and Alternatives; (4) Advantages, Features, and Benefits; and (5) Conclusion. The Examples, Components, and Alternatives section is further divided into subsections, each of which is labeled accordingly.

[0036] Definitions

[0037] The following definitions apply herein, unless otherwise indicated.

[0038] “Comprising,” “including,” and “having” (and conjugations thereof) are used interchangeably to mean including but not necessarily limited to, and are open-ended terms not intended to exclude additional, unrecited elements or method steps.

[0039] Terms such as “first”, “second”, and “third” are used to distinguish or identify various members of a group, or the like, and are not intended to show serial or numerical limitation.

[0040] “AKA” means “also known as,” and may be used to indicate an alternative or corresponding term for a given element or elements. “Coupled” means connected, either permanently or releasably, whether directly or indirectly through intervening components.

[0041] “Processing logic” describes any suitable device(s) or hardware configured to process data by performing one or more logical and / or arithmetic operations (e.g., executing coded instructions). For example, processing logic may include one or more processors (e.g., central processing units (CPUs) and / or graphics processing units (GPUs)), microprocessors, clusters of processing cores, FPGAs (field-programmable gate arrays), artificial intelligence (Al) accelerators, digital signal processors (DSPs), and / or any other suitable combination of logic hardware.

[0042] A “switch” includes any suitable component configured to operate as an electrical switch, such as a transistor (e.g., a metal-oxide-semiconductor field-effect transistor (MOSFET), an insulated-gate bipolar transistor (IGBT), etc.), or other suitable switching device as understood by those of ordinary skill in the art, and may comprise any suitable material, such as silicon, silicon carbide, gallium nitride (GaN), etc.

[0043] A “controller” or “electronic controller” includes processing logic programmed with instructions to carry out a controlling function with respect to a control element. For example, an electronic controller may be configured to receive an input signal, compare the input signal to a selected control value or setpoint value, and determine an output signal to a control element to provide corrective action based on the comparison. In another example, an electronic controller may be configured to interface between a host device (e.g., a desktop computer, a mainframe, etc.) and a peripheral device (e.g., a memory device, an input / output device, etc.) to control and / or monitor input and output signals to and from the peripheral device.

[0044] “Providing,” in the context of a method, may include receiving, obtaining, purchasing, manufacturing, generating, processing, preprocessing, and / or the like, such that the object or material provided is in a state and configuration for other steps to be carried out.

[0045] In this disclosure, one or more publications, patents, and / or patent applications may be incorporated by reference. However, such material is only incorporated to the extent that no conflict exists between the incorporated material and the statements and drawings set forth herein. In the event of any such conflict, including any conflict in terminology, the present disclosure is controlling.

[0046] Overview

[0047] In general, flyback converters employing two separately controlled primary switches are described. Flyback converters described herein include more consistent transfer functions, elimination of the right-half-plane (RHP) zero, reduced phase delay, and improved transient response. Applications of the presently disclosed converters include typical flyback applications as well as applications requiring high and / or highly dynamic output current. Furthermore, flyback converters described herein provide unique benefits to data centers and similar applications.

[0048] Global data centers were estimated to consume 205 terawatt-hours in 2018, equivalent to 1 % of global electricity use. Flyback converters taught herein can contribute to efforts to increase data center efficiency and reduce power consumption while optimizing total operating costs. More specifically, one area for improvement is power distribution and delivery within the data center. While 380 VDC distribution has improved distribution efficiency, it requires multiple conversion steps, such as 48V, 12V, or other intermediate bus voltages, to arrive at the single or sub-volt level utilized by typical large digital ICs.

[0049] Converting 380 VDC to 1 VDC is typically a three-step process, while 48VDC to 1 VDC is typically a two-step process. Each conversion step reduces system efficiency, increasing system cost as well as energy costs. Accordingly, flyback converters of the present disclosure utilize an improved flyback topology and can implement either 380 VDC or 48 VDC (or another desired input voltage) to single and sub-one-volt levels in a single conversion step. Furthermore, the efficiency of the improved flyback converters taught herein can be higher than the cascaded overall efficiency of multiple series converters.

[0050] For high current and high dynamic current output requirements, flyback converters of the prior art have remained suboptimum. High current applications employing flyback converters typically require large amounts of output capacitance and high RMS current capacity in the output filter. For example, in a discontinuous output flyback converter operating at 50% duty cycle, peak output current is approximately four times the average DC output current. RMS current in the output capacitors approaches 1.3 times the average DC output current. This adds size, heat, and cost to the converter.

[0051] A continuous flyback converter can reduce this requirement to peak currents of roughly two times the average output current, with RMS current roughly the same as the output current. However, this can still be cost prohibitive for output currents several tens of amperes or higher.

[0052] Regarding dynamic current requirements, both existing continuous and discontinuous converter modes have challenges due to inherent limitations in their control functions. First, discontinuous converters have a single pole response to control changes, in either voltage mode or current mode. However, both are equally nonlinear due to power throughput varying with the square of the primary current. For example, doubling the duty cycle of a voltage mode discontinuous converter doubles the amplitude of magnetizing current into the transformer primary, but quadruples the power throughput and hence, the output current. Likewise in a peak current mode discontinuous converter, doubling the program peak primary current also quadruples the power and output current. This makes transient response a challenge because a loop that is optimized for stability at full load will have lower bandwidth and slower response at lighter loads. Optimizing at lighter loads may result in instability at full load.

[0053] Second, continuous mode flyback converters have their own distinct limitations. For voltage mode converters, output gain of D / (1 -D) means that gain varies with duty cycle. Next, a varying 1 -D also causes a shift in the output frequency response which is double pole in nature. Finally, a right half plane (RHP) zero exists in the transfer function, limiting loop bandwidth. For all these reasons, voltage mode is not commonly used in continuous flyback converters. Peak current mode control helps loop compensation in that response is single pole so the loop can move more easily between continuous and discontinuous operation. However, there is still a varying output gain due to a varying 1 - D, as well as a RHP zero in the transfer function. As a result, current mode continuous flyback converters are still limited in their control bandwidth, in turn limiting their ability to respond to high dynamic applications.

[0054] Because of this, high current and high dynamic current requirements are typically provided by forward mode converters such as buck converters, half bridge, full bridge, forward, etc. However, isolated versions of these converters typically require two magnetic components (separate power transformer and output filter), versus the single transformer of a flyback converter. They also require at least two output rectifiers (synchronous or discrete), versus a single rectifier for a flyback. Accordingly, for simplicity, low cost, and small size, a flyback converter can be a preferred solution if its shortcomings are addressed.

[0055] Flyback converters of the present disclosure are configured to resolve these issues, and can provide both high output currents and high dynamic output currents.

[0056] In general, flyback converters of the present disclosure may be DC-DC converters, DC-AC converters, and / or AC-AC converters.

[0057] Examples, Components, and Alternatives

[0058] The following sections describe selected aspects of illustrative flyback converters as well as related systems and / or methods. The examples in these sections are intended for illustration and should not be interpreted as limiting the scope of the present disclosure. Each section may include one or more distinct embodiments or examples, and / or contextual or related information, function, and / or structure.

[0059] A. Illustrative Flyback Converters

[0060] As shown in Figs. 3-22, this section describes illustrative flyback converters which are examples of the improved flyback converters described above.

[0061] With reference to Figs. 3-10, an illustrative flyback converter 100 is shown. Flyback converter 100 is an example of the improved flyback converters described above.

[0062] Figs. 1 and 2 depict known flyback converters. Fig. 1 shows an isolated two-switch flyback converter 10 and Fig. 2 shows an isolated two-switch flyback converter 20 with separate control for each switch. In each case, both switches turn on at substantially the same time. In the example depicted in Fig. 2, Q1 is controlled by a fixed square wave and Q2 is controlled by a PWM controller. Flyback converter 20 operates in a discontinuous mode as magnetizing current returns to zero before the start of the next switching cycle. Accordingly, when working at a fixed output operating voltage, the output current of converter 20 is proportional to the square of the duty cycle D. Referring to Fig. 1 , known flyback converters such as converter 10 operating in continuous mode divide the switching cycle into two parts, e.g., phases or states. The first part is the Tpri portion (in which duty cycle D is multiplied by the switching period), modulated by a controller with variable pulse width capability. During the Tpri portion, both primary MOSFETs are on and current ramps in the primary of the transformer. The second part of the switching cycle is the Tsec portion (1 -D multiplied by the switching period), where primary MOSFETs are turned off. Current flows through the transformer secondary and rectifier into the output.

[0063] For a 1 :1 transformer ratio:

[0064] Vout = Vin * D / (1-D) where Vin is the input voltage, Vout is the output voltage, and D is the duty cycle.

[0065] A significant control limitation of converter 10 is that the term 1 -D varies in the opposite direction of D, i.e., inversely. Because of this, when D is increased, such as in response to a fast load increase, in order to increase transformer current, 1 -D is reduced temporarily. Since the average output current in a continuous flyback converter is approximately proportional to 1 -D, the output current decreases temporarily in response to an increase in D. In the converter control transfer function, this is manifested as a right half plane (RHP) zero, in which the amplitude increases with frequency while the phase lags. This behavior cannot be directly compensated for, so known methods to maintain stability include limiting loop bandwidth to below the RHP zero frequency, typically set at less than 1 / 5thof the lowest RHP zero point.

[0066] Fig. 3 depicts improved flyback converter 100, a two-switch isolated flyback converter operating in continuous mode. Flyback converter 100 includes a transformer 102 comprising a coupled inductor having a primary winding 104 and a secondary winding 106, configured such that there is always magnetizing current flowing in either primary winding 104 or secondary winding 106.

[0067] On the primary winding side, flyback converter 100 includes two controllable switches, Q1 and Q2. In some examples, Q1 and / or Q2 comprise metal-oxide- semiconductor field-effect transistors (MOSFETs), e.g., comprising silicon, silicon carbide, or gallium nitride materials. In some examples, Q1 and / or Q2 comprise insulated gate bipolar transistors (IGBTs) and / or bipolar junction transistors (BJTs), depending on the application and operating frequency. Additionally, a rectifier diode D1 is disposed in series with Q1 and a snubber diode D2 is disposed in parallel with primary winding 104 to reduce ringing on the primary winding.

[0068] On the secondary winding side, flyback converter 100 includes a single controllable switch Q3, also referred to as an output rectifier. Output rectifier Q3 may comprise a MOSFET, e.g., comprising silicon, silicon carbide, or gallium nitride materials, controlled synchronously. Alternatively, in some examples, Q3 may comprise a diode, such as a silicon PN diode, silicon Schottky diode, silicon carbide diode, silicon carbide Schottky diode, gallium nitride (GaN) diode, or other appropriate diode, as understood by those skilled in the art. An RC snubber 108 comprising a resistor 110 and a capacitor 1 12 (AKA capacitor Csn) is disposed across the output winding to reduce ringing on output rectifier Q3. Additionally, an output capacitor 1 14 is provided across the output to provide charge for the load.

[0069] Due to the three-switch arrangement of flyback converter 100, the switching cycle of the converter is divided into three states, namely, a Primary state, a Circulation state (also referred to as a Circulate state), and a Secondary state, see Fig. 4., each of the three states corresponding to a unique combination of states of the three switches as controlled by a controller 1 16.

[0070] The Primary state, defined within a switching cycle as Tpri, comprises the state in which both Q1 and Q2 are closed (i.e., one) and Q3 is open (i.e., zero). In the primary state, current increases in primary winding 104 of transformer 102. For DC gain and AC transfer function purposes, Dpri is the ratio of Tpri / Tper, where Tperis the time period of the complete switching cycle.

[0071] The Circulation state, defined within a switching cycle as Tdr, comprises the state in which only one primary switch is on. For example, the Circulation state may include Q1 being open (i.e., zero) while Q2 remains closed (i.e., one) and Q3 remains open (i.e., zero). In some examples, the Circulation state may instead have Q1 closed (i.e., one) and Q2 open (i.e., zero) while Q3 remains open (i.e., zero). During Tcir, primary current circulates through the primary winding side of the converter with only resistive losses from the primary winding and conduction losses, e.g., from D1 and Q2. The Secondary state, defined within a switching cycle as Tsec, comprises the state in which both Q1 and Q2 are open (i.e., zero), and Q3 is closed (i.e., one), such that current transfers to the secondary output. For DC gain and AC transfer function purposes, Dsec refers to the ratio of TSec / Tper, where Tperis the time period of the complete switching cycle.

[0072] Notably, these states may be arranged in different orders and / or broken up into multiple substates if useful for a particular application. For example, it may be desirable to split Tcir into more than one substates. Additionally, or alternatively, Tsec may be separately modulated from TPri depending on application. Examples of different orderings and substate partitioning are described in more depth below.

[0073] In a first example, assume DPn is proportional to the Primary state time, Dsec is proportional to the Secondary state time, and Ddr is proportional to the Circulating state time. In this case, the gain equation is:

[0074] Vout = Vin * (DPri / Dsec).

[0075] In another example, if Dsec is fixed, then Vout is proportional to DPri and Vin. Dsec may be fixed over a range of desired values, depending on the application, or varied across the same range.

[0076] A unique aspect of this control method is that it results in an output voltage proportional to Dpri / DSec, rather than D / (1 -D) (as described above with respect to the prior art converters). In other words, the control method of flyback converter 100 eliminates the 1 -D term and thereby eliminates the mechanism that produces the RHP zero. That is, an increase in DPri does not result in a decrease in Dsec, and there is no temporary drop in output current. Because there is no RHP zero to avoid, the loop bandwidth can be greatly increased over existing converters.

[0077] This result is valid for both voltage and current mode control methods. DC gain is constant in both methods, proportional to DPri. In voltage mode, the output LC frequency is fixed, rather than moving with 1 -D per the equation below. For a standard continuous voltage mode flyback converter of the prior art: fi_c = (1 -D) / (n * 2TT * (Lm * Co)A0.5)

[0078] In contrast, for flyback converter 100, this becomes: fi_c = Dsec / (n * 2TT * (Lm * Co)A0.5) where n is the secondary winding turns ratio and Lmis the magnetizing inductance.

[0079] By setting Dsecto a fixed value, the loop gain is more consistent across the input line and output load range, thereby enabling better loop optimization.

[0080] Turning now to Fig. 5, waveforms and timings for an example of flyback converter 100 are shown.

[0081] For continuous flyback mode, turning on both Q1 and Q2 simultaneously puts a maximum voltage differential across output rectifier Q3 according to the equation:

[0082] VQ3 = Vout + Vin * Nsec / Npri where Nsec is the number of secondary turns and Npri is the number of primary turns in the transformer. RC snubber networks such as RC snubber 108 dissipate power in proportion to the square of the voltage transition across the snubber capacitor Csn:

[0083] Psn =1 / 2 * Csn * VQ32* f.

[0084] If Q1 and Q2 turn-on times are slightly staggered, e.g., by briefly moving to the Circulate state, as shown in Fig. 5, the snubber voltage transition is split into two parts, with each transition having a lower V2value. Accordingly, total snubber power is reduced, as is peak voltage ring across Q3. Similarly, staggering the turn-off of Q1 and Q2, e.g., by transitioning to Tcir, reduces snubber loss during this transition.

[0085] In some applications it may be advantageous to place most of Tcir at the end of the switching cycle after Tsec. This puts Tsec closer in time to the beginning of the switching period, reducing phase delay in the control loop. A second reason is that transformer magnetizing current is reduced during Tsec, so Tcir conduction losses are reduced.

[0086] In yet other cases, it is preferable to place Tsec first in the cycle. Consider the following high dynamic application:

[0087] For maximum load step capability, it can take multiple switching cycles to increase the transformer magnetizing current to sufficiently support high output load levels. If faster response is required, the power transformer primary current lPri may be pre-biased at a higher current than is needed at low loads. Accordingly, a sufficient level of current is always flowing in primary winding 104 of transformer 102 and available to transfer to secondary winding 106.

[0088] In this scenario, primary winding 104 is pre-biased to a desired current during Tpn, using one or more cycles as needed. Furthermore, Tprimay be extended as needed during the switching cycle to accomplish this in a shorter number of cycles. Tsec remains off and no current flows to the output, until pre-bias current is achieved.

[0089] Once pre-bias current is achieved, output current, as well as output voltage, is regulated by varying Tsec. For maximum current from the pre-biased transformer, Tsec is set to its maximum point. For low loads, Tcir may be extended and Tsec reduced, even to zero pulse width at no load. During that time, current simply recirculates in primary winding 104, kept at a desired level by TPn and current is conducted to the output during Tsec as needed.

[0090] This arrangement enables converter 100 to be faster than known converters typically used in high dynamic applications, such as multiphase buck regulators that are commonly used. As soon as output current is required, Tsec is initiated, providing prebiased output current in typically tens of nanoseconds, limited mainly by input voltage, output voltage, and transformer leakage inductance. Conversely, output current can be turned off in a similar amount of time, e.g., tens of nanoseconds.

[0091] Buck regulators and other forward operating converters (including isolated converters) typically use one or more output inductors to smooth switching pulses before outputting power into the load. The ability to quickly ramp inductor current up and down in response to a load step is limited by the equation: di = V * dt / L where V is determined by regulator input voltage, return voltage, output voltage, and the switching state.

[0092] Particularly on load release with low output voltages, inductor current can take up to several microseconds to ramp down to zero current. During this time the output voltage may overshoot its regulation point. A comparison is described in more depth below, with respect to the multiphase examples.

[0093] In pre-biased operation, the quickest response occurs by initiating the switching cycle with Tsec. This minimizes loop delay and is followed by part of Tcir, then next by Tpri to restore magnetizing current in transformer 102, and finally to Tdr until the end of the cycle.

[0094] In this case, average output current is defined as: lout = Ipri * Dsec * Npri / Nsec where lPri is the pre-biased magnetizing current in the transformer primary.

[0095] Accordingly, average output current is linear with Dsec, with a single pole response into Gout.

[0096] Turning now to Fig. 6, three switching cycles of pre-bias operation of converter 100 is shown. Primary winding current I PRI is shown in the bottom trace, with a dashed line indicating the determined pre-bias current level Ipre-bias. Secondary winding current I SEC is shown above it, along with gate signals for Q1 , Q2, and Q3, namely Q1 GATE, Q2 GATE, and Q3 GATE, respectively.

[0097] The switching cycle begins with Q2 gate shutting off and Q3 turning on, corresponding to a transition from Tcir to Tsec. In response, transformer current shifts to secondary winding 106 and output current flows to the output filter and load. The duration of Tsec could be any width or percentage of the switching cycle, as desired in the design, as will be seen by those skilled in the art.

[0098] With Tsec at its maximum width, maximum average current flows into the output. At the end of Tsec, a brief period of Tcir provides a two-step transition into TPri. This period of Tcir may be omitted if desired, e.g., by directly transitioning to TPn.

[0099] During TPn, primary winding current I PRI is ramped back to Ipre-bias in preparation for the next output cycle. While waiting, converter 100 transitions to the Tcir circulate state.

[0100] The second Tsec pulse width is shorter than the first, corresponding to a proportionally lower average output current. At the end of the secondary pulse, a Tcir period is initiated, waiting for the next TPri state.

[0101] As shown in Fig. 6, secondary current I SEC decays less in the reduced Tsec period, so TPri current begins at a higher value than its previous pulse. Accordingly, TPri requires less time to increase to I pre-bias.

[0102] The third Tsec is even narrower, reducing average output current even more. For zero average current output, this pulse can be eliminated, remaining in an extended Tcir until more output current is needed.

[0103] Pre-bias values may also be dynamically updated, or changed according to the operational state of the IC load. For example, for a standby or sleep state, pre-bias current Ipre-bias may be reduced or even set to zero as desired for more efficient light load operation. Accordingly, it is anticipated that in some applications, a combination of Dpriand Dsec modulation may be used, depending on output dynamic requirements. Both single edge and dual edge modulation may be employed as desired.

[0104] This high dynamic capability combined with modulation flexibility is particularly advantageous when driving large digital integrated circuits (IQs) such as processors, graphics processing units (GPUs), field programmable gate arrays (FPGAs), central processing units (CPUs), data processing units (DPUs), and / or other similar devices with high dynamic current requirements and multiple operating states.

[0105] Turning to Figs. 7-10, interleaved examples are shown, e.g., multiphase applications where Tsectimes are fixed and interleaved to greatly reduce peak and RMS current in the output filter. As shown in Fig. 7, a multiphase power converter 700 includes a plurality examples of flyback converter 100, labeled 1 -N, each flyback converter having an output with a certain phase, labeled Phase 1 - Phase N, as described in more depth below.

[0106] First consider a two-phase interleaved example, in which two examples of converter 100, are utilized in concert, 180° out-of-phase with each other. The two phases of the two-phase interleave example are referred to as Phase 1 and Phase 2. Example waveforms and timings of which is shown in Fig. 8.

[0107] Each phase of Phase 1 and Phase 2 has Dpri controllable from 0% to 50%, with Dpri + Dcir = 50%. Dsec is set at 50%. During the half cycle where Phase 1 is increasing magnetizing current in primary winding 104 of the first converter, i.e., during Tpri, followed by circulating during Tcir, Phase 2 is outputting current into the load during its Tsec. Likewise, during the other half cycle when Phase 2 is increasing magnetizing current in the primary winding of the second converter and circulating, Phase 1 is outputting current into the load during its Tsec.

[0108] While there may be differing rising and falling slopes to the output current waveforms, e.g., due to input voltage, output voltage, magnetizing inductance, and state transition, thereby preventing a perfect transition of output current among phases, the magnitude and RMS values are far less than that of prior art interleaved flyback converters. This is because the 1 -D output currents of prior art converters can vary significantly in time, limiting the benefit of interleaving. In contrast, if Dsec is controlled precisely, both gaps and / or overlaps in combined output current can be minimized. Additionally, this arrangement minimizes peak current and RMS current in the output filter capacitors and minimizes output noise.

[0109] Any number of interleaved phases may be employed in a similar manner. For example, primary and secondary current waveforms of a three-phase interleaved arrangement of three examples of converter 100 are shown in Fig. 9. For the three-phase interleaved example, Dpri+ Dcir = 33.33% and Dsec = 66.67% in each converter, and the three converters are phased 120° apart. In this arrangement, at any given point, one converter is in Tpri + Tdr, with the other two in Tsec. Precise timing is used to minimize output current discontinuity and / or overlap.

[0110] Turning to Fig. 10, primary and secondary current waveforms of a four-phase interleaved arrangement of four examples of converter 100 are shown. For the four-phase example, each phase has a Dpri + Dcir of 25% maximum and Dsecis set at 75%, and the four converters are phased 90° apart. In this arrangement, during the switching cycle, one phase will operate in Tpri + Tcir and the other three phases will operate in Tsec. Again, timing is adjusted to minimize discontinuity and overlap.

[0111] Interleaved converters of 5, 6, and higher phase count can likewise be implemented. Converters are equally spaced in phase, with one phase in Tpri + Tdr and the rest in Tsec.

[0112] Either analog or digital control may be employed, and a variety of control methods may be utilized for controlling converter 100. However, for multiphase applications, especially involving 3 or more phases, the converters may be digitally controlled, e.g., with peak current mode control for current sharing among phases.

[0113] Since there is always output current available in interleaved converters, as discussed above, modulating Dsec in one or more converters can provide extremely fast response to load changes, as previously described. This is particularly advantageous during output load release, where any or all phases may be immediately put into the Circulate state and output current stopped very quickly, e.g., on the order of tens of nanoseconds. Furthermore, modulating Dsec may be employed with or without pre-bias operation. Thus, flyback converter 100 is advantageous for high current and high dynamic current applications. Turning to Fig. 1 1 , flyback converter 1 100 is shown. Flyback converter 1100 utilizes fewer semiconductor switches than flyback converter 100. As shown in the switch control table of Fig. 12, flyback converter 1 100 has duty cycle portions with the following properties: TPri occurs when Q1 is closed, ramping current in T1 primary. Tcir occurs when Q2 is closed and Q1 is open. In the example depicted in Fig. 1 1 , current transfers to the secondary of T1 and circulates through Q3 and Q2, rather than remaining in the primary. Tsec occurs when Q1 and Q2 are both open and secondary current transfers to the output through Q4. Note that Q3 and Q4 can also be replaced with diodes for simpler control with unidirectional power flow. Furthermore, Q3 and Q4 can be either 0 or 1 during their specific states depending on whether desired power flow is unidirectional or bidirectional, respectively.

[0114] This form is useful for lower voltage input supplies where a single input switch voltage rating can easily withstand both the input voltage and the reflected flyback voltage. It is also useful where the output voltage is higher with output current proportionately lower. The lower output current is circulated with lower losses in Q2 and Q3. Furthermore, the Q1 duty cycle may be increased above 0.5, allowing more freedom in the transformer turns ratio selection to achieve desired output voltages.

[0115] In a multiphase, pre-bias application where at least one converter section can source current into the load, Q2 may be modulated at a higher frequency than Q1 . This creates a set of high frequency, narrow pulses into C1 , allowing for a smaller value of output capacitance for an equivalent amount of voltage ripple.

[0116] Turning to Fig. 13, flyback converter 1300 is shown. Converter 1300 utilizes two primary side switches and two secondary side switches, where Q1 and Q2 are controlled together, with Q4 providing the circulating path in the secondary and Q4 providing rectification into the output. Switch control for converter 1300 is shown in the table of Fig. 14.

[0117] With respect to converter 1300, Q4 may be either a bidirectional blocking switch or can be a unipolar switch, e.g., for outputs of approximately 2 volts or less, if Q4 employs GaN or SiC FETs, as reverse conduction voltage of GaN and SiC can be 2 volts or more, depending on their gate to source voltage. In other words, they may effectively block voltage in the reverse direction if the output voltage is below the reverse conduction voltage of the device.

[0118] Converter 1300 is advantageous for pre-biased, multiphase embodiments, e.g., those in which there is always secondary transformer current flowing from at least one phase. The primary switches are operated at an optimal frequency for efficiency and size, while the secondary switches operate at a much higher frequency. For example, the primary switches might operate at 400 kHz, but Q3 and Q4 could alternate up to 10MHz and beyond, because they are only switching the output voltage, minimizing switching losses.

[0119] A continuous stream of shorter, higher frequency output pulses greatly reduces output capacitor size for an equivalent amount of output ripple. It also allows for a much higher control bandwidth. Instead of being limited to below the primary operating frequency, it is limited by the higher Q4 / Q4 modulation frequency, allowing for faster load step response and reduced output voltage undershoot and overshoot.

[0120] Turning to Fig. 15, an example flyback converter 1500 configured for DC-AC applications is shown. Though the primary side appears to be in the form of a full bridge, it does not operate in a full bridge fashion. Rather, the primary side is operated as a dual direction flyback converter as will be explained below. An example of the switching control is shown in the table of Fig. 16.

[0121] With reference to Figs. 15 and 16, for positive voltage output, operation of converter 1500 is as follows:

[0122] The Primary state, defined within a switching cycle as Tpri, comprises the state in which both Q1 and Q4 are closed (i.e., one) and Q5 is open (i.e., zero). Q6 is closed for the complete switching cycle. In the primary state, current increases in primary winding of transformer T1. For DC gain and AC transfer function purposes, Dpri is the ratio of Tpri / Tper, where Tperis the time period of the complete switching cycle. Q2 and Q3 are open during this state.

[0123] The Circulation state, defined within a switching cycle as Tdr, comprises the state in which only one primary switch is on. For example, Q1 being open while Q4 remains closed, or Q1 remaining closed while Q4 is open. Q3 and Q5 remain open, while Q6 remains closed. During Tcir, primary current circulates through the primary winding of the converter with only resistive losses from the primary winding and conduction losses, e.g. from Q2 and Q4. During this time, Q2 may remain open and conduct through its internal diode, or it may be closed.

[0124] The Secondary state, defined within a switching cycle as Tsec, comprises the state in which both Q1 and Q4 are open (i.e., zero), and Q5 is closed (i.e., one), such that current transfers to the secondary output. For DC gain and AC transfer function purposes, Dsec refers to the ratio of Tsec / Tper, where Tperis the time period of the complete switching cycle. During this state, Q2 and Q3 remain open and Q6 remains closed.

[0125] With continued reference to Figs. 15 and 16, for negative voltage output, operation of converter 1500 is as follows:

[0126] For the Primary state, both Q2 and Q3 are closed (i.e., one) and Q6 is open (i.e., zero). Q5 is closed for the complete switching cycle. In the primary state, current increases in primary winding of transformer T1. For DC gain and AC transfer function purposes, DPn is the ratio of TPri / TPer, where Tperis the time period of the complete switching cycle. Q1 and Q4 are open during this state.

[0127] The Circulation state, defined within a switching cycle as T r, comprises the state in which only one primary switch is on. For example, Q3 being open while Q2 remains closed, or Q3 remaining closed while Q2 is open. Q4 and Q6 remain open, while Q5 remains closed. During Tcir, primary current circulates through the primary winding of the converter with only resistive losses from the primary winding and conduction losses, e.g. from Q2 and Q4. During this time, Q4 may remain open and conduct through its internal diode, or it may be closed.

[0128] The Secondary state, defined within a switching cycle as Tsec, comprises the state in which both Q2 and Q3 are open (i.e., zero), and Q6 is closed (i.e., one), such that current transfers to the secondary output. For DC gain and AC transfer function purposes, Dsec refers to the ratio of Tsec / Tper, where Tperis the time period of the complete switching cycle. During this state, Q1 and Q4 remain open and Q5 remains closed.

[0129] Note that Q2, Q4, Q5, and Q6 can be either 0 or 1 during specific states depending on if desired power flow is unidirectional or bidirectional, respectively.

[0130] As with DC-DC examples, multiple phases may be interleaved to reduce output ripple current and output capacitor value. The increased loop bandwidth and predictability of the invention above standard flyback converters applies equally to flyback-based DC- AC inverters, facilitating better load regulation and reduced waveform distortion.

[0131] Turning to Fig. 17, an illustrative AC-AC, solid-state transformer converter 1700 is shown. Converter 1700 may be substantially similar to converter 100, wherein converter 1700 replaces unidirectional switches with back-to-back switches for bidirectional operation. An example switch control for converter 1700 is shown in the table of Fig. 18.

[0132] With respect to Figs. 17 and 18, there are four output options. The first is to output an AC voltage waveform of the same frequency and polarity. The second is to output an AC voltage of the same frequency but opposite polarity. The third option is to output a DC haversine waveform and the fourth option is to output a combination of AC and DC pulses as desired. Note that Q3, Q4, Q7, and Q8, Q9, and Q10 can be either 0 or 1 during specific states depending on if desired power flow is unidirectional or bidirectional, respectively.

[0133] Turning to Fig. 19, AC-AC converter 1900 is shown. Converter 1900 is similar to converter 1500 wherein a rectifier is added to the input. Accordingly, similar portions of the circuit, along with reference designators, are the same as previously shown and described above with respect to converter 1500.

[0134] In converter 1900, the rectifier, made up of Q7, Q8, Q9, and Q10, converts AC into DC, which is then reconverted back to AC, e.g., through inverter 1500. Switch control for non-inverting and inverting output polarity is shown in the table of Fig. 20.

[0135] Note that Q2, Q4, Q5, and Q6 can be either 0 or 1 during specific states depending on whether desired power flow is unidirectional or bidirectional, respectively.

[0136] The rectifier circuit may take multiple forms, as will be understood by those skilled in the art. In the example shown in Fig. 19, synchronous control of the rectifier allows for bidirectional power flow through the converter. If unidirectional power flow is adequate or desired, Q7, Q8, Q9, and Q10 may be turned off, allowing only the internal diodes to conduct, or these switches may be replaced by a simple diode bridge.

[0137] C1 may be relatively low in value, and mainly filters high frequency pulses into the converter. The DC waveform is haversine shaped, following the input waveform. The converter output frequency is equal to the input frequency. Since the inverter portion of the circuitry can output either polarity, there are three output options. The first is to output an AC voltage waveform of the same frequency and polarity. The second is to output an AC voltage of the same frequency but opposite polarity. The third option is to output a DC haversine waveform or any combination of AC and DC pulses. Fig. 20 depicts switch states for these desired outputs, from either positive or negative input polarity.

[0138] If C1 is increased in value to provide a steady intermediate DC voltage, then the output frequency may be the same, or differ from the input frequency, allowing frequency conversion for loads that require it. It may be of any phase or waveform, or DC as desired.

[0139] The rectifier input may also be in the form of an active rectifier, providing a boosted and regulated intermediate DC voltage, enabling power factor correction and harmonic reduction in addition to frequency conversion.

[0140] Applications for the AC-AC implementations include AC voltage regulators or stabilizers, AC isolators, replacement of large, heavy low frequency transformers, frequency converters, and paralleling or combining AC sources of varying voltages and frequencies.

[0141] Another example AC-AC converter 2100 is shown in Figure 21 . Converter 2100 is an AC adaptation of converter 1 100, depicted in Fig. 11 . Switch control for converter 2100 is shown in Fig. 22. Note that Q5 and Q6 can be either 0 or 1 during specific states depending on if desired power flow is unidirectional or bidirectional, respectively. Converter 2100 reduces the number of switches required compared to other AC-AC converters, however, output phase and frequency is the same as input phase and frequency.

[0142] B. Illustrative Combinations and Additional Examples

[0143] This section describes additional aspects and features of improved flyback converters, presented without limitation as a series of paragraphs, some or all of which may be alphanumerically designated for clarity and efficiency. Each of these paragraphs can be combined with one or more other paragraphs, and / or with disclosure from elsewhere in this application, in any suitable manner. Some of the paragraphs below expressly refer to and further limit other paragraphs, providing without limitation examples of some of the suitable combinations. AO. A flyback converter configured to operate in a continuous mode with two primary side switches and one secondary side switch, wherein operation contains three switch states; a primary state wherein both primary side switches are on and current increases in a transformer primary, a circulate state wherein only one primary switch is on and current circulates in the transformer primary, and a secondary state wherein both primary switches are off, the secondary side switch is on, and current flows from a transformer secondary into an output of the converter.

[0144] A1 . The flyback converter of paragraph AO, wherein the secondary side switch is a diode.

[0145] A2. The flyback converter of paragraph AO or A1 , wherein the order of states is rearranged.

[0146] A3. The flyback converter of any one of paragraphs AO through A2, wherein each state may be divided into two or more substates.

[0147] A4. The flyback converter of any one of paragraphs AO through A3, wherein either one or both of the primary state and the secondary state may be modulated, independently or in concert with each other.

[0148] A5. The flyback converter of any one of paragraphs AO through A4, wherein a right half plane zero is eliminated in a transfer function of the flyback converter.

[0149] A6. The flyback converter of any one of paragraphs AO through A5, wherein primary current may be pre-biased for faster response.

[0150] A7. The flyback converter of any one of paragraphs A6, wherein a level of the pre-bias current is either fixed or adjustable.

[0151] A8. The flyback converter of any one of paragraphs AO through A7, wherein switching between primary and secondary states passes first through circulate state to reduce secondary switch voltage ring and secondary snubber losses.

[0152] A9. The flyback converter of any one of paragraphs AO through A8, further comprises at least one other flyback converter, and wherein two or more phases of the outputs of the flyback converters are interleaved. A10. The flyback converter of paragraph A9, wherein precise control of the various phase secondary states minimizes combined output current discontinuities and overlaps, thereby minimizing output filter noise and RMS current.

[0153] A1 1 . The flyback converter of paragraph A9 or A10, wherein at least one phase is always in secondary state, delivering current to the output.

[0154] A12. The flyback converter of any one of paragraphs AO through A1 1 , wherein modulating the secondary state will increase or decrease output current in a faster manner.

[0155] BO. An electronic circuit comprising: a flyback converter configured to operate in a continuous mode, the flyback converter including: a coupled inductor having a primary winding and a secondary winding; a first switch having a first input terminal, a first output terminal, and a first control terminal, wherein the first input terminal is coupled to a voltage input terminal and the first output terminal is coupled to both a first end of the primary winding and a first diode; a second switch having a second input terminal, a second output terminal, and a second control terminal, wherein the second input terminal is coupled to both a second end of the primary winding and a second diode; and a third switch having a third input terminal, a third output terminal, and a third control terminal, wherein the third input terminal is coupled to a first end of the secondary winding.

[0156] B0.1 The electronic circuit of paragraph BO, wherein the first diode and the second diode are reverse biased.

[0157] B1. The electronic circuit of paragraph BO and / or B0.1 , wherein the coupled inductor is a transformer.

[0158] B2. The electronic circuit of any of paragraphs BO through B1 , wherein the primary winding and the secondary winding have opposite polarities.

[0159] B3. The electronic circuit of any one of paragraphs BO through B2, further comprising processing logic configured to automatically control the state of each of the first, second, and third switches. B4. The electronic circuit of paragraph B3, wherein the processing logic comprises a single controller configured to control the first, second, and third switches.

[0160] B5. The electronic circuit of paragraph B3, wherein the processing logic is configured to transition the flyback converter between three different switch states, and the three switch states include: a primary state wherein the first and second switches are on and current increases in the primary winding of the transformer; a circulate state wherein only one of the first and second switches is on and current circulates in the primary winding of the transformer; and a secondary state wherein both the first and second switches are off, the third switch is on, and current flows from the secondary winding of the transformer into an output of the converter.

[0161] B6. The electronic circuit of paragraph B5, wherein the processing logic is configured to transition from the primary state through the circulate state to the secondary state.

[0162] B7. A power converter comprising a plurality of the circuits of paragraph B7, wherein a plurality of phases of outputs of the flyback converters are interleaved.

[0163] B8. The power converter of paragraph B7, wherein at least one phase of the plurality of phases is always in the secondary state, delivering current to the output.

[0164] B9. The electronic circuit of any one of paragraphs BO through B8, wherein each of the first, second, and third switches comprises a respective metal oxide silicon field effect transistor (MOSFET).

[0165] B10. The electronic circuit of any one of paragraphs BO through B9, wherein the flyback converter further includes: a resistor-capacitor (RC) snubber including a snubber resistor and a snubber capacitor, wherein the RC snubber is coupled to first end of the secondary winding.

[0166] B1 1 . The electronic circuit of any one of paragraphs BO through B10, wherein the flyback converter further includes: an output capacitor coupled to a second end of the secondary winding.

[0167] CO. A continuous-mode flyback converter, comprising: a transformer having a primary winding and a secondary winding; a first switch having a first input terminal, a first output terminal, and a first control terminal, wherein the first input terminal is coupled to a voltage input terminal and the first output terminal is coupled to both a first end of the primary winding and a negative terminal of a first diode; a second switch having a second input terminal, a second output terminal, and a second control terminal, wherein the second input terminal is coupled to both a second end of the primary winding and a positive terminal of a second diode; and a third switch having a third input terminal, a third output terminal, and a third control terminal, wherein the third input terminal is coupled to a first end of the secondary winding.

[0168] C0.1. The flyback converter of paragraph CO, wherein the first diode and the second diode are reverse biased.

[0169] 01. The flyback converter of paragraph CO and / or C0.1 , further comprising processing logic configured to automatically control the state of each of the first, second, and third switches.

[0170] 02. The flyback converter of paragraph C1 , wherein the processing logic is configured to transition the flyback converter between three different switch states, and the three switch states include: a primary state wherein the first and second switches are on and current increases in the primary winding of the transformer; a circulate state wherein only one of the first and second switches is on and current circulates in the primary winding of the transformer; and a secondary state wherein both the first and second switches are off, the third switch is on, and current flows from the secondary winding of the transformer into an output of the converter.

[0171] C3. The flyback converter of any one of paragraphs CO through 02, wherein each of the first, second, and third switches comprises a respective metal oxide silicon field effect transistor (MOSFET).

[0172] 04. The flyback converter of any one of paragraphs CO through 03, further comprising: a resistor-capacitor (RC) snubber including a snubber resistor and a snubber capacitor, wherein the RC snubber is coupled to first end of the secondary winding.

[0173] C5. The flyback converter of any one of paragraphs CO through C4, further comprising: an output capacitor coupled to a second end of the secondary winding.

[0174] DO. A method for converting a DC input voltage to a DC output voltage, the method comprising: transitioning a continuous-mode flyback converter between three different switch states, wherein the flyback converter includes a transformer, two primary side switches, two primary side diodes, and one secondary side switch, and the three switch states include: a primary state wherein the two primary side switches are on and current increases in a primary side of the transformer; a circulate state wherein only one of the two primary switches is on and current circulates in the primary of the transformer; and a secondary state wherein both primary switches are off, the secondary side switch is on, and current flows from a transformer secondary into an output of the converter.

[0175] D1. The method for converting a DC input voltage to a DC output voltage of paragraph DO, the method further comprising: interleaving a respective output of each of a plurality of the continuous-mode flyback converters of paragraph DO.

[0176] EO. A method for converting a DC input voltage to a DC output voltage, the method comprising: increasing current in a primary side of a transformer of a flyback converter by operating the flyback converter in a primary state, wherein the flyback converter comprises two primary side switches and one secondary side switch, wherein the two primary side switches are on; circulating current in the primary of the transformer by operating the flyback converter in a circulate state in which only one of the two primary switches is on; and flowing current from a secondary of the transformer into an output of the converter by operating the flyback circuit in a secondary state in which both primary switches are off.

[0177] FO. A flyback converter configured to operate with one primary side switch and three secondary side switches, wherein the flyback converter is configured to utilize three switch states: a primary state wherein the primary side switch is on and current increases in a transformer primary; a circulate state wherein the primary switch is off and current circulates in the transformer secondary through two secondary circulating switches; and a secondary state wherein the primary switch is off, the secondary side circulating switches are off, and current flows from a transformer secondary through a third secondary switch into an output of the converter.

[0178] F1 . The converter of paragraph FO, wherein one circulating switch and the third secondary switch are diodes.

[0179] GO. A flyback converter configured to operate with two primary side switches and two secondary side switches, wherein the flyback converter is configured to utilize three switch states: a primary state where both primary switches are on and current increases in a transformer primary; a circulate state wherein both primary switches are off and current circulates in the transformer secondary through a circulating switch; and a secondary state wherein both primary switches are off, the secondary circulate switch is off, and a second secondary switch conducts secondary current into the output of the converter.

[0180] G1 . The converter of paragraph GO, wherein the secondary circulate switch is either bi-directional or consists of a GaN or SiC semiconductor switch.

[0181] HO. A flyback converter configured to operate with four primary side switches and two secondary side switches, wherein the flyback converter is configured to utilize three switch states: a primary state wherein one pair of primary side switches is on and current increases in a transformer primary; a circulate state wherein only one primary switch is on and current circulates in the transformer primary; and a secondary state wherein all primary switches are off, both secondary side switches are on, and current flows from a transformer secondary into an output of the converter.

[0182] H1. The converter of paragraph HO, wherein the pair of primary switches is chosen during the primary state to increase transformer current in a desired direction, positive or negative.

[0183] H2. The converter of either paragraph HO and / or H1 , wherein driving the primary current in one direction or another corresponds to an output voltage of either positive or negative value.

[0184] H3. The converter of any one of paragraphs H0-H2, wherein driving the primary current in one direction or another corresponds to create a varying AC output waveform.

[0185] H4. The converter of any one of paragraphs H0-H3, wherein power flow can be unidirectional or bidirectional.

[0186] H5. The converter of any one of paragraphs H0-H4, wherein a full wave rectifier is added to the input side of the converter.

[0187] H6. The converter of paragraph H5, wherein the rectifier is made up of four diodes.

[0188] H7. The converter of paragraph H5, wherein the rectifier is made up of four switches.

[0189] H8. The converter of paragraph H5, wherein the rectifier is made up of an active rectifier circuit for the purpose of creating an intermediate DC voltage, enabling power factor correction and frequency conversion.

[0190] H9. The converter of any of paragraphs H0-H8, wherein the converter can accept input voltage of either positive or negative polarity, or a varying AC input waveform.

[0191] H10. The converter of any of paragraphs H0-H9, wherein the converter is an AC- AC converter. H1 1. The converter of any of paragraphs H0-H10, wherein the output of the converter is either in phase or out of phase with the input or is DC.

[0192] 10. A flyback converter configured to operate with four back-to-back primary side switches and two back-to-back secondary side switches; wherein the flyback converter is configured to utilize three switch states: a primary state where two pairs of primary switches are on to increase current in a transformer primary; a circulate state where two pairs of primary side switches are on to allow current to circulate in the primary; and a secondary state where primary switches are turned off and transformer current transfers to the secondary through the secondary pair of switches to the output of the converter.

[0193] 11. The converter of paragraph IO, wherein driving the primary current in one direction or another corresponds to create a varying AC output waveform.

[0194] 12. The converter of paragraph IO and / or 11 , wherein power flow is unidirectional or bidirectional.

[0195] 13. The converter of any of paragraphs I0-I2, wherein the output of the converter is in phase or out of phase with the input or is DC.

[0196] JO. A flyback converter configured to operate with two back-to-back primary side switches, two secondary side back-to-back circulating switches, and two back-to- back secondary side output switches; wherein the flyback converter is configured to utilize three switch states: a primary state wherein the primary side switches are on and current increases in a transformer primary; a circulate state wherein the primary switches are off and current circulates in the transformer secondary through two secondary circulating switches; and a secondary state wherein the primary switches are off, the secondary side circulating switches are off, and current flows from a transformer secondary through the output switches into an output of the converter.

[0197] J1. The converter of paragraph JO, wherein the converter can accept input voltage of either positive or negative polarity, or a varying AC input voltage. J2. The converter of paragraph JO and / or J 1 , wherein the converter can operate as an isolated AC-AC converter or solid-state transformer.

[0198] J3. The converter of any of paragraphs J0-J2, wherein power flow can be either unidirectional or bidirectional.

[0199] Advantages, Features, and Benefits

[0200] The different embodiments and examples of the flyback converters described herein provide several advantages over known solutions for providing output power, such as used in power supplies or power converters. For example, illustrative embodiments and examples described herein allow for much faster response to load changes.

[0201] Additionally, and among other benefits, illustrative embodiments and examples described herein result in an output voltage proportional to Dpri / Dsec, rather than D / (1 -D), thereby eliminating the mechanism that produces the RHP zero such that the loop bandwidth can be greatly increased over existing converters.

[0202] Additionally, and among other benefits, illustrative embodiments and examples described herein are better suited for high current and / or high dynamic current applications.

[0203] Additionally, and among other benefits, illustrative embodiments and examples described herein minimize peak current and RMS current in output filter capacitors, thereby minimizing output noise.

[0204] No known system or device can perform these functions. However, not all embodiments and examples described herein provide the same advantages or the same degree of advantage.

[0205] Conclusion

[0206] The disclosure set forth above may encompass multiple distinct examples with independent utility. Although each of these has been disclosed in its preferred form(s), the specific embodiments thereof as disclosed and illustrated herein are not to be considered in a limiting sense, because numerous variations are possible. To the extent that section headings are used within this disclosure, such headings are for organizational purposes only. The subject matter of the disclosure includes all novel and nonobvious combinations and subcombinations of the various elements, features, functions, and / or properties disclosed herein. The following claims particularly point out certain combinations and subcombinations regarded as novel and nonobvious. Other combinations and subcombinations of features, functions, elements, and / or properties may be claimed in applications claiming priority from this or a related application. Such claims, whether broader, narrower, equal, or different in scope to the original claims, also are regarded as included within the subject matter of the present disclosure.

Claims

CLAIMS:1 . An electronic circuit comprising: a flyback converter configured to operate in a continuous mode, the flyback converter including: a coupled inductor having a primary winding and a secondary winding; a first switch having a first input terminal, a first output terminal, and a first control terminal, wherein the first input terminal is coupled to a voltage input terminal and the first output terminal is coupled to both a first end of the primary winding and a first diode; a second switch having a second input terminal, a second output terminal, and a second control terminal, wherein the second input terminal is coupled to both a second end of the primary winding and a second diode; and a third switch having a third input terminal, a third output terminal, and a third control terminal, wherein the third input terminal is coupled to a first end of the secondary winding.

2. The electronic circuit of claim 1 , wherein the coupled inductor is a transformer.

3. The electronic circuit of claim 1 , wherein the primary winding and the secondary winding have opposite polarities.

4. The electronic circuit of claim 1 , further comprising processing logic configured to automatically control the state of each of the first, second, and third switches.

5. The electronic circuit of claim 4, wherein the processing logic comprises a single controller configured to control the first, second, and third switches.

6. The electronic circuit of claim 4, wherein the processing logic is configured to transition the flyback converter between three different switch states, and the three switch states include: a primary state wherein the first and second switches are on and current increases in the primary winding of the transformer; a circulate state wherein only one of the first and second switches is on and current circulates in the primary winding of the transformer; and a secondary state wherein both the first and second switches are off, the third switch is on, and current flows from the secondary winding of the transformer into an output of the converter.

7. The electronic circuit of claim 6, wherein the processing logic is configured to transition from the primary state through the circulate state to the secondary state.

8. A power converter comprising a plurality of the circuits of claim 6, wherein a plurality of phases of outputs of the flyback converters are interleaved.

9. The power converter of claim 9, wherein at least one phase of the plurality of phases is always in the secondary state, delivering current to the output.

10. The electronic circuit of claim 1 , wherein each of the first, second, and third switches comprises a respective metal oxide silicon field effect transistor (MOSFET).1 1 . The electronic circuit of claim 1 , wherein the primary winding of the transformer is supplied with a pre-bias current.

12. The electronic circuit of claim 1 , wherein the flyback converter further includes: an output capacitor coupled to a second end of the secondary winding.

13. A continuous-mode flyback converter, comprising:a transformer having a primary winding and a secondary winding; a first switch having a first input terminal, a first output terminal, and a first control terminal, wherein the first input terminal is coupled to a voltage input terminal and the first output terminal is coupled to both a first end of the primary winding and a negative terminal of a first diode; a second switch having a second input terminal, a second output terminal, and a second control terminal, wherein the second input terminal is coupled to both a second end of the primary winding and a positive terminal of a second diode; and a third switch having a third input terminal, a third output terminal, and a third control terminal, wherein the third input terminal is coupled to a first end of the secondary winding.

14. The flyback converter of claim 13, further comprising processing logic configured to automatically control the state of each of the first, second, and third switches.

15. The flyback converter of claim 14, wherein the processing logic is configured to transition the flyback converter between three different switch states, and the three switch states include: a primary state wherein the first and second switches are on and current increases in the primary winding of the transformer; a circulate state wherein only one of the first and second switches is on and current circulates in the primary winding of the transformer; and a secondary state wherein both the first and second switches are off, the third switch is on, and current flows from the secondary winding of the transformer into an output of the converter.

16. The flyback converter of claim 13, wherein each of the first, second, and third switches comprises a respective metal oxide silicon field effect transistor (MOSFET).

17. The flyback converter of claim 13, further comprising:a resistor-capacitor (RC) snubber including a snubber resistor and a snubber capacitor, wherein the RC snubber is coupled to first end of the secondary winding.

18. The flyback converter of claim 13, further comprising: an output capacitor coupled to a second end of the secondary winding.

19. A method for converting a DC input voltage to a DC output voltage, the method comprising: transitioning a continuous-mode flyback converter between three different switch states, wherein the flyback converter includes a transformer, two primary side switches, two primary side diodes, and one secondary side switch, and the three switch states include: a primary state wherein the two primary side switches are on and current increases in a primary side of the transformer; a circulate state wherein only one of the two primary switches is on and current circulates in the primary of the transformer; and a secondary state wherein both primary switches are off, the secondary side switch is on, and current flows from a transformer secondary into an output of the converter.

20. The method for converting a DC input voltage to a DC output voltage of claim 19, the method further comprising: interleaving a respective output of each of a plurality of the continuous-mode flyback converters of claim 19.

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